Semiconductor device
By designing a groove with flat and inclined sections in the cooling plate to overlap the insulating substrate corners, the semiconductor device achieves reliable bonding material supply and enhanced heat dissipation, addressing the solder insufficiency issue.
Patent Information
- Application Number
- DE112023006396
- Authority / Receiving Office
- DE · DE
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-05-24
- Publication Date
- 2026-03-05
AI Technical Summary
Insufficient supply of solder to grooves directly below the corners of an insulating substrate in semiconductor devices, leading to potential detachment issues and reduced heat-radiating efficiency.
Incorporating a groove in the cooling plate with a flat and inclined portion that overlaps the corner of the insulating substrate, ensuring sufficient thickness of the bonding material, particularly at the corners, to enhance reliability and heat dissipation.
The solution ensures reliable supply of bonding material to the corners, improving the reliability and heat-dissipation capabilities of semiconductor devices, especially under high-stress conditions.
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Abstract
Description
Technical field
[0001] The present disclosure relates to a semiconductor device. Background State of the art
[0002] A semiconductor device includes a heat-radiating plate for dissipating heat generated in a semiconductor chip. The heat-radiating plate of a semiconductor device described in patent document 1 has an L-shaped concave portion (having a "<"-like shape). This concave portion ensures a certain thickness of solder layer in a corner portion of an insulating substrate. This improves the detachment of the solder layer between a conductive structure of the insulating substrate and the heat-radiating plate, as well as the heat-radiating properties of the semiconductor chip. State of the art documents Patent document(s)
[0003] Patent document 1: Published Japanese patent application no. 2009-188164 Summary Problem to be solved by the invention
[0004] If the channel is only provided directly below four corner pieces of the insulating substrate, the amount of solder supplied to the channel may be insufficient.
[0005] To solve the above problems, one object of the present disclosure is to provide a semiconductor device suitable for reliably supplying a bonding material to a groove on a cooling plate provided directly below a corner part of an insulating substrate. Means to solve the problem
[0006] A semiconductor device according to the present disclosure comprises an insulating substrate and a cooling plate. The insulating substrate supports a semiconductor chip. The cooling plate supports the insulating substrate. The cooling plate has a groove. The groove is provided in a plan view along at least a portion of a circumferential edge portion of the insulating substrate. The groove has a flat portion in which a lower surface of the groove is flat, and an inclined portion having a downward slope in which the lower surface of the groove is inclined in the direction of the flat portion. The flat portion is provided such that, in a plan view, it overlaps a corner portion of the insulating substrate that is contained in the circumferential edge portion of the insulating substrate. Effects of the invention
[0007] According to the present disclosure, a semiconductor device is provided which is suitable for reliably supplying a bonding material to a groove on a cooling plate which is provided directly below four corners of an insulating substrate.
[0008] These and other tasks, features, aspects and advantages of the present disclosure will become more apparent from the following detailed description of the present disclosure when it is accepted in conjunction with the accompanying drawings. Brief description of the drawings [ Fig. Figure 1] is a perspective view showing a configuration of a semiconductor device according to embodiment 1. [ Fig. 2] is a top view showing a configuration of the semiconductor device. [ Fig. Figure 3] is a cross-sectional view showing a configuration of the semiconductor device. [ Fig. [4] is a perspective view showing a configuration of a cooling plate. [ Fig. Figure 5] is a top view showing a configuration of a semiconductor device according to embodiment 2. [ Fig. Figure 6] is a perspective view showing a configuration of a cooling plate of the semiconductor device. [ Fig. Figure 7] is a perspective view showing a configuration of a cooling plate of a semiconductor device according to embodiment 3. [ Fig. Figure 8] is a top view showing a configuration of the cooling plate. [ Fig. Figure 9] is a top view showing a configuration of a semiconductor device according to embodiment 4. [ Fig.
[10] is a top view showing a configuration of a semiconductor device according to embodiment 5. [ Fig.
[11] is a top view showing a configuration of a semiconductor device according to embodiment 6. [ Fig. Figure 12] is a top view showing a configuration of a semiconductor device according to a modification example of embodiment 6. [ Fig. Figure 13] is a cross-sectional view showing a configuration of a semiconductor device according to embodiment 7. [ Fig. Figure 14] is a cross-sectional view showing a configuration of a semiconductor device according to a modification example of embodiment 7. [ Fig. Figure 15] is a cross-sectional view showing a configuration of a semiconductor device according to the modification example of embodiment 7. Description of the embodiment(s)<Ausführungsform 1>
[0009] Fig. Figure 1 is a perspective view showing a configuration of a semiconductor device 101 according to embodiment 1. Fig. Figure 2 is a top view showing the configuration of the semiconductor device 101. Fig. Figure 3 is a cross-sectional view showing the configuration of the semiconductor device 101. Fig. 3 represents a cross-section along AA', which is in Fig. 2 are shown.
[0010] The semiconductor device 101 comprises a cooling plate 11, a first bonding material 12, an insulating substrate 13, a second bonding material 14 and a semiconductor chip 15.
[0011] The cooling plate 11 carries the insulating substrate 13. The cooling plate 11 is a plate made of a metal, such as Cu or Al, or a plate formed from a combined AlSiC material. The cooling plate 11 has the function of transferring heat generated in an electrical component, such as the semiconductor chip 15, to an external part.
[0012] Fig. Figure 4 is a perspective view showing a configuration of the cooling plate 11. The cooling plate 11 has a groove 16. The groove 16 according to embodiment 1 is provided in a top view along an entire circumferential edge portion of the insulating substrate 13. Since the insulating substrate 13 has a rectangular shape in a top view, as described below, the groove 16 extends to form an annular rectangular shape. The groove 16 has a flat portion 16A and an inclined portion 16B.
[0013] The flat part 16A is designed to overlap with a corner part that, in a top view, is contained within the circumferential edge portion of the insulating substrate 13. A lower surface of the groove 16 in the flat part 16A is flat, i.e., parallel to a lower surface of the cooling plate 11. In embodiment 1, four flat parts 16A are provided. The positions of the four flat parts 16A correspond to the positions of four corner parts of the insulating substrate 13. One planar form of the flat part 16A has an L-shape.
[0014] The inclined section 16B is provided in a top view along the other circumferential edge portion of the insulating substrate 13, namely the corner portion. The lower surface of the groove 16 in the inclined section 16B has a downward slope, inclined towards the flat portion 16A. A lower surface of the inclined section 16B has a point at a midpoint of the inclined section 16B in one direction of extension of the groove 16. In embodiment 1, four inclined sections 16B are provided. Two of the four inclined sections 16B are provided along a long side of the insulating substrate 13. The remaining two inclined sections 16B are provided along a short side of the insulating substrate 13.
[0015] The first bonding material 12 bonds the cooling plate 11 and the insulating plate 13. The first bonding material 12 is located between the cooling plate 11 and the insulating plate 13. Part of the bonding material is also located on the channel 16. The first bonding material 12 is, for example, a solder or a sintered material. The sintered material contains, for example, silver or copper.
[0016] The insulating substrate 13 supports the semiconductor chip 15. The insulating substrate 13 has a rectangular shape in a planar configuration. It comprises a substrate body 13A, a front surface metal structure 13B, and a back surface metal structure 13C. The substrate body 13A is made of ceramic, for example. In a top view, the substrate body 13A has a rectangular shape. The front surface metal structure 13B is located on the upper surface of the substrate body 13A. The back surface metal structure 13C is located on the lower surface of the substrate body 13A. Both the front surface metal structure 13B and the back surface metal structure 13C are made of metals such as copper or aluminum, for example. The back surface metal structure 13C is bonded to the cooling plate 11 by means of the first bonding material 12.
[0017] The second bonding material 14 bonds the insulating plate 13 and the semiconductor chip 15. The second bonding material 14 is positioned between the insulating plate 13 and the semiconductor chip 15. The second bonding material 14 is, for example, a solder or a sintered material. The sintered material contains, for example, silver or copper.
[0018] The semiconductor chip 15 is bonded to the front surface metal structure 13B of the insulating substrate by means of the second bonding material 14. The semiconductor chip 15 is, for example, made of a semiconductor such as silicon (Si). The semiconductor is preferably a so-called wide-bandgap semiconductor such as SiC, GaN, Ga₂O₃, or diamond. The semiconductor chip 15 is, for example, a power semiconductor chip or an integrated circuit (IC) for controlling the power semiconductor chip. The semiconductor chip 15 according to embodiment 1 has a vertical semiconductor element in which a current flows between an upper surface and a lower surface thereof. The semiconductor element is, for example, an insulated-gate bipolar transistor (IGBT), a metal-oxide-semiconductor field-effect transistor (MOSFET), or a Schottky blocking diode.The semiconductor element can be a reverse-conducting IGBT (RC-IGBT) in which an IGBT and a reverse-flow diode are formed in a semiconductor chip 15.
[0019] To summarize the foregoing, the semiconductor device 101 according to embodiment 1 comprises the insulating substrate 13 and the cooling plate 11. The insulating substrate 13 supports the semiconductor chip 15. The cooling plate 11 supports the insulating substrate 13. The cooling plate 11 has the groove 16. The groove 16 is provided in a top view along at least a portion of the circumferential edge portion of the insulating substrate 13. The groove 16 has the flat portion 16A, in which the lower surface of the groove 16 is flat, and the inclined portion 16B, which has a downward inclination, with the lower surface of the groove 16 inclined in the direction of the flat portion 16A. The flat portion 16A is designed to overlap, in a top view, with the corner portion of the insulating substrate 13 that is contained in the circumferential edge portion of the insulating substrate 13.The groove 16 according to embodiment 1 is provided in a top view along the entire circumferential edge part of the insulating substrate 13.
[0020] In a manufacturing process for the semiconductor device 101, which has such a configuration, the first bonding material 12, in a molten state, flows easily through the inclined portion 16B of the channel 16 into the flat portion 16A. This ensures a sufficient thickness of the first bonding material 12 immediately below the corner portion of the insulating substrate 13. Although stress is slightly concentrated in the first bonding material 12 immediately below the corner portion, its thickness is still sufficiently ensured, thus improving the reliability of the first bonding material 12. For example, the first bonding material 12 is hardly subject to delamination.
[0021] The semiconductor device 101 is used, for example, in a power control device. If the semiconductor chip 15 is made of SiC, the semiconductor device 101 is operated at a high temperature. Thus, although the stress occurring in the corner part of the insulating substrate 13 increases, the thickness of the first bonding material 12 is sufficiently ensured by the groove 16 described above; this improves the reliability of the semiconductor device 101. <Ausführungsform 2>
[0022] In embodiment 2, the same reference numerals are assigned to components similar to those in embodiment 1, and the detailed description thereof is omitted.
[0023] Fig. Figure 5 is a top view showing a configuration of a semiconductor device 102 according to embodiment 2. A representation of the first bonding material 12 is shown in Fig. 5 omitted. Fig. Figure 6 is a perspective view showing a configuration of the cooling plate 11 of the semiconductor device 102. The cooling plate 11 has a groove 26. The groove 26 has a flat part 26A and an inclined part 26B.
[0024] The flat part 26A is designed to overlap the corner part of the insulating substrate 13 in a top view, similar to embodiment 1. The flat part 26A has a rectangular shape. The inclined part 26B is designed along the other circumferential edge of the insulating substrate 13, similar to the corner part, in a manner similar to embodiment 1. The channel width of the flat part 26A according to embodiment 2 is greater than that of the inclined part 26B.
[0025] According to such a configuration, in a manufacturing process of the semiconductor device 102, the first bonding material 12 is easily fed to the flat part 26A. <Ausführungsform 3>
[0026] In embodiment 3, the same reference numerals are assigned to components similar to those in embodiment 1 or 2, and the detailed description thereof is omitted.
[0027] Fig. Figure 7 is a perspective view showing a configuration of the cooling plate 11 of the semiconductor device according to embodiment 3. Fig. Figure 8 is a top view showing a configuration of the cooling plate 11. Although one illustration is omitted, a planar shape of the insulating substrate 13 according to embodiment 3 is similar to that according to embodiment 1 and is rectangular in shape. The circumferential edge portion of the insulating substrate 13 has two long sides and two short sides.
[0028] The cooling plate 11 has a groove 36. The groove 36 extends along the entire circumferential edge portion of the insulating substrate 13. The groove 36 has a flat portion 36A and an inclined portion 36B.
[0029] The flat section 36A is designed to overlap the corner section of the insulating substrate 13 in a top view and is located along its short side. The inclined section 36B is located only along the long side of the insulating substrate 13. In other words, the inclined section 36B is not located along the short side of the insulating substrate 13.
[0030] Although one illustration is omitted, the flat part 36A and the inclined part 36B can be interchanged. That is, the inclined part 36B can be provided only along the short side of the insulating substrate 13. In this case, the flat part 36A is provided such that it overlaps the corner part of the insulating substrate 13 and is provided along its long side. The inclined part 36B is not provided along the long side of the insulating substrate 13.
[0031] As described above, since the inclined part 36B is provided along only one of the long side and the short side of the insulating substrate 13, the cooling plate 11 is simply machined in the process of manufacturing the semiconductor device. <Ausführungsform 4>
[0032] In embodiment 4, the same reference numerals are assigned to components similar to those in embodiments 1 to 3, and the detailed description thereof is omitted.
[0033] Fig. Figure 9 is a top view showing a configuration of a semiconductor device 104 according to embodiment 4. A representation of the first bonding material 12 is shown in Fig. Figure 9 is omitted. A planar form of the insulating substrate 13 is a rectangular shape. The circumferential edge portion of the insulating substrate 13 has two long sides and two short sides.
[0034] The cooling plate 11 of the semiconductor device 104 has a groove 46. The groove 46 is provided only along the two long sides and the corner portion as part of the circumferential edge portion of the insulating substrate 13. The groove 46 is not provided along the two short sides. The groove 46 has a flat portion 46A and a sloped portion 46B. The flat portion 46A is designed to overlap with the corner portion of the insulating substrate 13. The sloped portion 46B is provided along the two long sides.
[0035] According to such a configuration, the cooling plate 11 is simply machined in a manufacturing process of the semiconductor device 104. <Ausführungsform 5>
[0036] In embodiment 5, the same reference numerals are assigned to components similar to those in embodiments 1 to 4, and the detailed description thereof is omitted.
[0037] Fig. Figure 10 is a top view showing a configuration of a semiconductor device 105 according to embodiment 5. A representation of the first bonding material 12 is shown in Fig. Figure 10 is omitted. A planar form of the insulating substrate 13 is a rectangular shape. The circumferential edge portion of the insulating substrate 13 has two long sides and two short sides.
[0038] The cooling plate 11 of the semiconductor device 105 has a groove 56. The groove 56 is provided only along the two short sides and the corner portion as part of the circumferential edge portion of the insulating substrate 13. The groove 56 is not provided along the two long sides. The groove has a flat portion 56A and a sloped portion 56B. The flat portion 56A is designed to overlap with the corner portion of the insulating substrate 13. The sloped portion 56B is provided along the two short sides.
[0039] According to such a configuration, the cooling plate 11 is simply machined in a manufacturing process of the semiconductor device 105. <Ausführungsform 6>
[0040] In embodiment 6, the same reference numerals are assigned to components similar to those in one of embodiments 1 to 5, and the detailed description thereof is omitted.
[0041] Fig. Figure 11 is a top view of a configuration of a semiconductor device 106A according to embodiment 6. A representation of the first bonding material 12 is shown in Fig. Figure 11 has been omitted. The cooling plate 11 of the semiconductor device 106A has a groove 66. The groove 66 extends along the entire circumferential edge portion of the insulating substrate 13. The groove 66 has a flat portion 66A and an inclined portion 66B. The flat portion 66A is designed to overlap a corner portion of the insulating substrate 13 in a top view. The flat portion 66A is circular. The inclined portion 66B extends along the other circumferential edge portion of the insulating substrate 13 besides the corner portion.
[0042] Fig. Figure 12 is a top view showing a configuration of a semiconductor device 106B according to a modification example of embodiment 6. A representation of the first bonding material 12 is shown in Fig. 12 omitted. A planar form of the flat part 66A of the semiconductor device 106B is a triangular shape. A planar form of the flat part 66A can be a polygonal shape other than a triangle.
[0043] As described above, the flat part 66A has a circular or polygonal shape in a top view. The groove 66, which has a suitable shape, is arranged according to a design of the semiconductor device. <Ausführungsform 7>
[0044] In embodiment 7, the same reference numerals are assigned to components similar to those in one of embodiments 1 to 6, and the detailed description thereof is omitted.
[0045] Fig. Figure 13 is a cross-sectional view showing a configuration of the semiconductor device 107A according to embodiment 7. The cooling plate 11 of the semiconductor device 107A has a groove 76. One side surface 76C of the groove 76 is curved in a cross-sectional view. The curved side surface 76C corresponds to a side surface arranged on an inner side within two side surfaces that form the groove 76. According to such a configuration, in a manufacturing process of the semiconductor device 107A, the first bonding material 12 flows easily into the groove 76.
[0046] Fig. 14 and Fig.Figure 15 are cross-sectional views, each showing a configuration of semiconductor devices 107B and 107C according to a modification example of embodiment 7. One side surface 76C of the groove 76 is inclined in a cross-sectional view. The inclined side surface 76C corresponds to the side surface arranged on the inner side of the two side surfaces that form the groove 76. According to such a configuration, in a manufacturing process of the semiconductor devices 107B and 107C, the first bonding material 12 flows easily into the groove 76.
[0047] Although the present revelation is described in detail above, the foregoing description is descriptive in all aspects and does not limit the revelation. It is therefore understood that numerous examples of modification, which are not illustrated, can be devised.
[0048] In the present disclosure, any embodiment can be combined arbitrarily, or any embodiment can be suitably varied or omitted. Explanation of reference symbols
[0049] 11 Cooling plate, 12 First bonding material, 13 Insulating substrate, 13A Substrate body, 13B Front surface metal structure, 13C Back surface metal structure, 14 Second bonding material, 15 Semiconductor chip, 16 Trough, 16A Flat part, 16B Inclined part, 26 Trough, 26A Flat part, 26B Inclined part, 36 Trough, 36A Flat part, 36B Inclined part, 46 Trough, 46A Flat part, 46B Inclined part, 56 Trough, 56A Flat part, 56B Inclined part, 66 Trough, 66A Flat part, 66B Inclined part, 76 Trough, 76C Side surface, 101 to 107 Semiconductor device. QUOTES INCLUDED IN THE DESCRIPTION
[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature
[0000] JP 2009-188164
[0003]
Claims
[1] Semiconductor device comprising: an insulating substrate that supports a semiconductor chip; and a cooling plate that supports the insulating substrate, wherein the cooling plate has a groove which, in a top view, is provided along at least a part of a circumferential edge part of the insulating substrate, the channel has a flat part in which a lower surface of the channel is flat, and a sloping part which has a downward slope, wherein the lower surface of the channel is inclined in the direction of the flat part, and the flat part is designed to overlap in a top view with a corner part of the insulating substrate, which is contained in the circumferential edge part of the insulating substrate. [2] Semiconductor device according to claim 1, further comprising a bonding material that bonds the insulating substrate and the cooling plate, wherein the inclined part is provided in a top view along the other circumferential edge part of the insulating substrate than the corner part, the lower surface of the inclined section has a peak at a midpoint of the inclined section in one direction of extension of the channel, and Part of the bonding material is provided to the trough. [3] Semiconductor device according to claim 1 or 2, wherein The channel width of the flat part is greater than the channel width of the sloping part. [4] Semiconductor device according to any one of claims 1 to 3, wherein the circumferential edge part of the insulating substrate has a long side and a short side, the groove is provided along the entire circumferential edge portion of the insulating substrate, and The inclination section is provided along only one of the long sides and the short side of the insulating substrate. [5] Semiconductor device according to any one of claims 1 to 3, wherein the circumferential edge part of the insulating substrate has a long side and a short side, the groove is provided only along the long side and the corner part as part of the perimeter edge part of the insulating substrate, and The inclined section is provided along the long side. [6] Semiconductor device according to any one of claims 1 to 3, wherein the circumferential edge part of the insulating substrate has a long side and a short side, the groove is provided only along the short side and the corner part as part of the perimeter edge part of the insulating substrate, and The incline section is provided along the short side. [7] Semiconductor device according to any one of claims 1 to 6, wherein the flat part has a circular or polygonal shape in a top view. [8] Semiconductor device according to any one of claims 1 to 7, wherein a side surface of the groove is inclined or curved in a cross-sectional view. [9] Semiconductor device according to any one of claims 1 to 8, wherein the semiconductor chip is made of SiC.
Citation Information
Patent Citations
2009-188164