POWER CONVERTER DEVICE

Abstract

A power conversion device (10) comprising: a first power conversion unit (5) that converts the DC voltage applied by a first and a second capacitor unit (40, 42) into three-phase AC voltage; a second power conversion unit (6) that converts single-phase AC voltage or three-phase AC voltage into DC voltage and applies the DC voltage to the first and the second capacitor units (40, 42); a first parallel flat conductor (30) having three plate-shaped conductors to which high potential, medium potential and low potential from the first capacitor unit (40) are applied; a second parallel flat conductor (32) having three plate-shaped conductors to which high potential, medium potential and low potential from the second capacitor unit (42) are applied;and a third parallel flat conductor (34) arranged on a side opposite the first and second capacitor units (40, 42) with respect to the first and second parallel flat conductors (30, 32).

Description

Area

[0001] The present disclosure relates to a power conversion device comprising a first power conversion unit that converts DC voltage applied by a group of shared capacitors into three-phase AC voltage, and a second power conversion unit that converts single-phase AC voltage or three-phase AC voltage into DC voltage and applies the DC voltage to the group of shared capacitors. background

[0002] In the case of a power conversion device with a configuration where the first and second power conversion units are connected to a group of shared capacitors, differences exist in the distances between a multitude of power semiconductor modules belonging to the first power conversion unit and a multitude of capacitors belonging to the group of shared capacitors. These differences in distance cause a variation in the switching current between the power semiconductor modules and therefore lead to a variation in the switching loss.

[0003] The patent literature 1 cited below discloses a technique in which a slot is provided in a parallel flat conductor connecting a plurality of power semiconductor modules and a group of split capacitors to prevent fluctuation in the switching current. List of patent literature

[0004] Patent Literature 1: Japanese Patent Application Publication No. 2000-60126 Brief description of the invention Problem to be solved by the invention

[0005] In the case of the technique of providing a slot in the parallel flat conductor, the effect of the slot depends on the short and long side lengths of the slot, with the longer of each side being better. However, if the short side length of the slot is increased, it becomes necessary to increase the distance between the first and second power conversion units. Thus, the technique described above has the problem of increasing the overall size of the device. If, in addition, the long side length of the slot is increased, the remaining width of the parallel flat conductor decreases as a result of the slot. Therefore, the technique described above has the problem of weakening the mechanical strength of the parallel flat conductor. Consequently, to achieve the desired effect of the slot while simultaneously ensuring mechanical strength, some kind of support element is required.This leads to an increase in the size of the facility.

[0006] The present disclosure was made in consideration of the foregoing, and one objective of the present disclosure is to provide a power conversion device capable of reducing fluctuations in the switching current while ensuring the mechanical strength of a parallel flat conductor. Means to solve the problem

[0007] To solve the problems described above and achieve the objective, a power conversion device according to the present disclosure comprises first to third parallel flat conductors, first and second capacitor units, and first and second power conversion units. The first parallel flat conductor comprises at least one first high-potential conductor and one first low-potential conductor. The first high-potential conductor is a flat conductor to which a high potential is applied. The first low-potential conductor is a flat conductor to which a low potential is applied. The first high-potential conductor and the first low-potential conductor are arranged parallel to each other. The first capacitor unit comprises at least one capacitor that is electrically connected between the first high-potential conductor and the first low-potential conductor.The second parallel flat conductor has at least one second high-potential conductor and one second low-potential conductor. The second high-potential conductor is a flat conductor to which a high potential is applied. The second low-potential conductor is a flat conductor to which a low potential is applied. The second high-potential conductor and the second low-potential conductor are arranged parallel to each other. The second capacitor unit has at least one capacitor that is electrically connected between the second high-potential conductor and the second low-potential conductor. The first power conversion unit has a plurality of first power semiconductor modules that are electrically connected to the first parallel flat conductor and converts DC voltage, applied by the first and second capacitor units respectively, into three-phase AC voltage.The second power conversion unit comprises a plurality of second power semiconductor modules electrically connected to the second parallel flat conductor. The second power conversion unit converts single-phase or three-phase AC voltage into DC voltage and applies the DC voltage to the first and second capacitor units. The third parallel flat conductor comprises at least one third high-potential conductor and one third low-potential conductor. The third high-potential conductor is a plate-shaped conductor electrically connected to the first and second high-potential conductors. The third low-potential conductor is electrically connected to the first and second low-potential conductors. The third high-potential conductor and the third low-potential conductor are arranged parallel to each other.The third parallel flat conductor is arranged on a side opposite the first and second capacitor units with respect to the first and second parallel flat conductors. Effects of the invention

[0008] The power conversion device of the present disclosure achieves the effect of reducing fluctuations in the switching current while simultaneously ensuring the mechanical strength of the parallel flat conductor. Brief description of the drawings Fig. Figure 1 is a circuit diagram illustrating a configuration of a power conversion device according to a first embodiment. Fig. 2 is a circuit diagram that shows one of Fig. 1. Power conversion circuit for a single-phase application is illustrated. Fig. Figure 3 is a circuit diagram illustrating a configuration of a power conversion circuit with power semiconductor modules, which differs from those in Fig. 2. Distinguish. Fig. Figure 4 is a cross-sectional view of a first parallel flat conductor, first capacitors and second capacitors in the first embodiment, illustrating a connection relationship between the first parallel flat conductor and the first capacitors as well as a connection relationship between the first parallel flat conductor and the second capacitors. Fig. Figure 5 is a cross-sectional view of a second parallel flat conductor, third capacitors and fourth capacitors in the first embodiment, illustrating a connection relationship between the second parallel flat conductor and the third capacitors as well as a connection relationship between the second parallel flat conductor and the fourth capacitors. Fig. Figure 6 is an expanded perspective view of a third parallel flat conductor, the first parallel flat conductor and the second parallel flat conductor in the first embodiment, illustrating a connection relationship between the third parallel flat conductor and the first parallel flat conductor as well as a connection relationship between the third parallel flat conductor and the second parallel flat conductor. Fig. Figure 7 is a cross-sectional view of the third parallel flat conductor in the first embodiment, which schematically illustrates a structure of the third parallel flat conductor. Fig. Figure 8 is a circuit diagram illustrating a configuration of a power conversion device according to a first modification of the first embodiment. Fig. Figure 9 is a circuit diagram illustrating a configuration of a power conversion device according to a second modification of the first embodiment. Fig. Figure 10 is a circuit diagram illustrating a configuration of a power conversion device according to a third modification of the first embodiment. Fig. Figure 11 is an expanded perspective view of a main part of a power conversion device according to a second embodiment, illustrating a configuration of the main part of the power conversion device. Description of embodiments: The following is a

[0009] The power conversion device according to the embodiments of the present disclosure is described in detail with reference to the accompanying drawings. It should be noted that in the following description, a plurality of similar components are identified by reference numerals with indices, whereby the indexing is omitted where no distinction is made in the description. First embodiment.

[0010] Fig. Figure 1 is a circuit diagram illustrating a configuration of a power conversion device 10 according to a first embodiment. The power conversion device 10 according to the first embodiment comprises a first power conversion unit 5 and a second power conversion unit 6. Fig. Figure 1 illustrates a configuration of the power conversion device 10, which is applied to a drive control device for a rail vehicle.

[0011] The first power conversion unit 5 has three power conversion circuits 8a, 8b, and 8c. Each individual power conversion circuit 8, that is, the power conversion circuit 8 for a single-phase application, has four switching elements and two diodes. That is, each of the power conversion circuits 8a, 8b, and 8c has four switching elements and two diodes. The power conversion circuits 8a, 8b, and 8c are connected in parallel to form a three-phase, three-stage inverter. Four drive motors 7 are connected to an output end of the first power conversion unit 5.

[0012] Furthermore, the second power conversion unit 6 has two power conversion circuits 8d and 8e. The configuration of each individual power conversion circuit 8 is the same as in the first power conversion unit 5. That is, each of the power conversion circuits 8d and 8e has four switching elements and two diodes. The power conversion circuits 8d and 8e are connected in parallel to form a single-phase three-stage converter.

[0013] Single-phase alternating voltage is applied from a secondary winding 3 of a transformer 2 via a current collector 1 to the power conversion unit 10. The second power conversion unit 6 converts the applied single-phase alternating voltage into direct current. The first power conversion unit 5 converts the direct current output by the second power conversion unit 6 into alternating current and applies the alternating current to the drive motors 7. Each of the drive motors 7 is set in rotation by the applied alternating current and exerts a driving force on an axle of a rail vehicle (not shown).

[0014] It should be noted that Fig. 1 In the context of illustrating the power conversion device 10 according to the first embodiment, a case is represented in which the power conversion device 10 is applied to a rail vehicle to which single-phase alternating voltage is applied, but the power conversion device 10 can equally be applied to a rail vehicle to which three-phase alternating voltage is applied.

[0015] Fig. Figure 2 is a circuit diagram showing the power conversion circuit 8 for a single-phase application, taken from Fig. 1. As in Fig. As shown in Figure 2, the power conversion circuit 8 for a single-phase application has the switching elements Q1, Q2, Q3 and Q4. Fig. 2 is the high-potential side of the power conversion circuit 8, that is, the collector side of switching element Q1, designated P and referred to as the "P-side". The low-potential side of the power conversion circuit 8, that is, the emitter side of switching element Q4, is designated N and referred to as the "N-side". The switching elements Q1, Q2, Q3, and Q4 are connected in series between the P-side and the N-side in that order. A diode D is connected antiparallel to each of the switching elements Q1, Q2, Q3, and Q4. It should be noted that the switching elements Q1, Q2, Q3, and Q4 in the Fig. 1 and Fig. Figure 2 shows insulated-gate bipolar transistors (IGBTs) as examples; however, the switching elements Q1, Q2, Q3, and Q4 are not limited to IGBTs. The switching elements Q1, Q2, Q3, and Q4 can also be metal-oxide-semiconductor field-effect transistors (MOSFETs).

[0016] Furthermore, the power conversion circuit 8 includes capacitors C1 and C2. Capacitors C1 and C2 are connected in series between the P-side and the N-side, respectively. In the power conversion circuit 8, a junction between capacitor C1 and capacitor C2 is a center potential point M.

[0017] Furthermore, the power conversion circuit 8 includes diodes D1 and D2. Diodes D1 and D2 are connected in series in this order. A cathode of diode D1 is connected to a junction N1 between switching elements Q1 and Q2, and an anode of diode D2 is connected to a junction N2 between switching elements Q3 and Q4. Additionally, a junction between an anode of diode D1 and a cathode of diode D2 is connected to the center potential point M. Diodes D1 and D2 function as clamping diodes.

[0018] The current trend is to encapsulate two elements in a single module. Such a power semiconductor module is called a "2-in-1 module". Fig. Figure 2 shows an exemplary configuration in which the switching elements Q1 and Q2 are contained in a power semiconductor module 20a, the switching elements Q3 and Q4 are contained in a power semiconductor module 20b, and the diodes D1 and D2 are contained in a power semiconductor module 20c.

[0019] Fig. Figure 3 is a circuit diagram showing a configuration of the power conversion circuit 8 using power semiconductor modules that differ from those in Fig. 2. Distinguish. In Fig. 3 are components that are related to those in Fig. Items that are identical or equivalent are marked with the same reference symbols. Fig. Figure 3 shows an exemplary configuration in which the switching element Q1 and the diode D1 are contained in a power semiconductor module 20d, the switching elements Q2 and Q3 are contained in a power semiconductor module 20e, and the diode D2 and the switching element Q4 are contained in a power semiconductor module 20f.

[0020] The description refers again to Fig. 1. Regarding the configuration of the first power conversion unit 5 in Fig. 1. The capacitor C1, located on the high-potential side of each of the power conversion circuits 8a, 8b, and 8c—that is, each of the three capacitors C1—can be called the "first capacitor." The capacitor C2, located on the low-potential side of each of the power conversion circuits 8a, 8b, and 8c—that is, each of the three capacitors C2—can be called the "second capacitor." The first capacitor and the second capacitor together can be called the "first capacitor group." In the Fig. In the configuration of the first power conversion unit 5 shown in section 1, each of the nine power semiconductor modules 20, as shown in section 1, can be used. Fig. 2 or Fig. 3 are divided and referred to as the "first power semiconductor module".

[0021] Furthermore, regarding the configuration of the second power conversion unit 6 in Fig. 1. The capacitor C1, located on the high-potential side of each of the power conversion circuits 8d and 8e, that is, each of the two capacitors C1, may be referred to as the "third capacitor". The capacitor C2, located on the low-potential side of each of the power conversion circuits 8d and 8e, that is, each of the two capacitors C2, may be referred to as the "fourth capacitor". The third and fourth capacitors may together be referred to as the "second capacitor group". Furthermore, in the Fig. 1. Configuration of the second power conversion unit 6, each of the six power semiconductor modules 20, as shown in 1, Fig. 2 or Fig. 3 are divided and referred to as the "second power semiconductor module".

[0022] Next, a configuration of a main part according to the first embodiment is described. Fig. Figure 4 is a cross-sectional view of a first parallel flat conductor 30, the first capacitors and the second capacitors in the first embodiment, illustrating a connection relationship between the first parallel flat conductor 30 and the first capacitors as well as a connection relationship between the first parallel flat conductor 30 and the second capacitors.

[0023] The first parallel flat conductor 30 has a first high-potential conductor 30a, a first medium-potential conductor 30b, and a first low-potential conductor 30c. The first high-potential conductor 30a is a flat conductor to which a high potential is applied. The first medium-potential conductor 30b is a flat conductor to which a medium potential is applied. The first low-potential conductor 30c is a flat conductor to which a low potential is applied. The first high-potential conductor 30a, the first medium-potential conductor 30b, and the first low-potential conductor 30c are, as shown in Fig. 4 are shown, arranged parallel to each other. Although not shown, a flat insulating layer is inserted between these conductors to provide electrical insulation.

[0024] In Fig. In the diagram, three capacitors C1, which are the first capacitors, and three capacitors C2, which are the second capacitors, are arranged alternately and oriented. In each of the three capacitors C1, one electrode, serving as the positive electrode, is electrically connected to the first high-potential conductor 30a, and another electrode, serving as the negative electrode, penetrates the first high-potential conductor 30a and is electrically connected to the first medium-potential conductor 30b. Furthermore, in each of the three capacitors C2, one electrode, serving as the positive electrode, penetrates the first high-potential conductor 30a and the first medium-potential conductor 30b and is electrically connected to the first low-potential conductor 30c.As a result of these connections, opposing currents flow between the first high-potential conductor 30a and the first medium-potential conductor 30b, as well as between the first medium-potential conductor 30b and the first low-potential conductor 30c. This makes it possible to form the first parallel flat conductor 30 with low inductance.

[0025] It should be noted that the in Fig. The configuration shown in Figure 4 is an example, and the configuration of the first parallel flat conductor 30, the first capacitors, and the second capacitors is not limited to this example. Capacitors C1 and C2 do not have to be arranged alternately. Furthermore, in the first parallel flat conductor 30, the first high-potential conductor 30a, the first medium-potential conductor 30b, and the first low-potential conductor 30c are arranged in this order from the perspective of capacitors C1 and C2; however, the first low-potential conductor 30c, the first medium-potential conductor 30b, and the first high-potential conductor 30a can also be arranged in this order.

[0026] Fig. Figure 5 is a cross-sectional view of a second parallel flat conductor 32, the third capacitors and the fourth capacitors in the first embodiment, illustrating a connection relationship between the second parallel flat conductor 32 and the third capacitors as well as a connection relationship between the second parallel flat conductor 32 and the fourth capacitors.

[0027] The second parallel flat conductor 32 has a second high-potential conductor 32a, a second medium-potential conductor 32b, and a second low-potential conductor 32c. The second high-potential conductor 32a is a flat conductor to which a high potential is applied. The second medium-potential conductor 32b is a flat conductor to which a medium potential is applied. The second low-potential conductor 32c is a flat conductor to which a low potential is applied. The second high-potential conductor 32a, the second medium-potential conductor 32b, and the second low-potential conductor 32c are, as shown in Fig. 5 shown, arranged parallel to each other. Although not shown, a flat insulating layer is inserted between these conductors to provide electrical insulation.

[0028] In Fig. In the 5-part assembly, two capacitors C1, which are the third capacitors, and two capacitors C2, which are the fourth capacitors, are arranged alternately and oriented. In each of the two capacitors C1, one electrode, serving as a positive electrode, is electrically connected to the second high-potential conductor 32a, and another electrode, serving as a negative electrode, penetrates the second high-potential conductor 32a and is electrically connected to the second medium-potential conductor 32b. Furthermore, in each of the two capacitors C2, one electrode, serving as a positive electrode, penetrates the second high-potential conductor 32a and the second medium-potential conductor 32b and is electrically connected to the second low-potential conductor 32c.As a result of these connections, opposing currents flow between the second high-potential conductor 32a and the second medium-potential conductor 32b, as well as between the second medium-potential conductor 32b and the second low-potential conductor 32c. This makes it possible to form the second parallel flat conductor 32 with low inductance.

[0029] It should be noted that the in Fig. The configuration shown in Figure 5 is an example, and the configuration of the second parallel flat conductor 32, the third capacitors, and the fourth capacitors is not limited to this example. Capacitors C1 and C2 do not have to be arranged alternately. Furthermore, in the second parallel flat conductor 32, the second high-potential conductor 32a, the second medium-potential conductor 32b, and the second low-potential conductor 32c are arranged in this order from the perspective of capacitors C1 and C2; however, the second low-potential conductor 32c, the second medium-potential conductor 32b, and the second high-potential conductor 32a can also be arranged in this order.

[0030] Fig. Figure 6 is an expanded perspective view of a third parallel flat conductor 34, the first parallel flat conductor 30 and the second parallel flat conductor 32 in the first embodiment, illustrating a connection relationship between the third parallel flat conductor 34 and the first parallel flat conductor 30 and a connection relationship between the third parallel flat conductor 34 and the second parallel flat conductor 32. Fig. Figure 7 is a cross-sectional view of the third parallel flat conductor 34 in the first embodiment, which schematically illustrates a structure of the third parallel flat conductor 34.

[0031] Fig. 6 shows the one in relation to Fig. 4 described first parallel flat conductor 30, which in relation to Fig. 5 described second parallel flat conductor 32 and the one in Fig. 7 shown third parallel flat conductor 34. In addition, it shows Fig. 6. A first capacitor unit 40 and a second capacitor unit 42. The first capacitor unit 40 contains three capacitors C1, which are the first capacitors, and three capacitors C2, which are the second capacitors. The second capacitor unit 42 contains two capacitors C1, which are the third capacitors, and two capacitors C2, which are the fourth capacitors.

[0032] As in Fig. As shown in Figure 7, the third parallel flat conductor 34 has a third high-potential conductor 34a, a third medium-potential conductor 34b, and a third low-potential conductor 34c. The third high-potential conductor 34a is a flat conductor to which a high potential is applied. The third medium-potential conductor 34b is a flat conductor to which a medium potential is applied. The third low-potential conductor 34c is a flat conductor to which a low potential is applied. The third high-potential conductor 34a, the third medium-potential conductor 34b, and the third low-potential conductor 34c are arranged parallel to each other. Although not shown, a flat insulating layer is inserted between these conductors to provide electrical insulation.

[0033] The description refers again to Fig. 6. Three power semiconductor modules 20 for the U, V, and W phases, contained in the first power conversion unit 5, are arranged below the first capacitor unit 40. The first parallel flat conductor 30 is arranged in an L-shape. The L-shaped first parallel flat conductor 30 can make an electrical connection with the capacitors C1 and C2 (in Fig. 6 not shown) in the first capacitor unit 40 and can also establish an electrical connection with each of the three power semiconductor modules 20.

[0034] Furthermore, two power semiconductor modules 20 for the U and V phases, which are contained in the second power conversion unit 6, are arranged below the second capacitor unit 42. The second parallel flat conductor 32 is arranged in an L-shape. The L-shaped second parallel flat conductor 32 can make an electrical connection with the capacitors C1 and C2 (in Fig. 6 not shown) in the second capacitor unit 42 and can also establish an electrical connection with each of the two power semiconductor modules 20.

[0035] Furthermore, the third parallel flat conductor 34 is arranged on a side opposite the first and second capacitor units 40 and 42, with respect to the first parallel flat conductor 30 and the second parallel flat conductor 32. The third parallel flat conductor 34 and the first parallel flat conductor 30 are electrically connected to each other at a connection section 34d, and the third parallel flat conductor 34 and the second parallel flat conductor 32 are electrically connected to each other at a connection section 34e. The third parallel flat conductor 34, arranged in this way, enables an electrical connection between the first parallel flat conductor 30 and the second parallel flat conductor 32 without the first parallel flat conductor 30 and the second parallel flat conductor 32 being directly opposite each other.

[0036] Next, the effects of the power conversion device 10 according to the first embodiment will be described with reference to Fig. 6 described. It should be noted that in Fig. 6. A distance between a longitudinal center of the connecting section 34d and a longitudinal center of the connecting section 34e is referred to as the “distance between connecting sections” and is marked with “L”. Furthermore, a distance between the first parallel flat conductor 30 and the second parallel flat conductor 32 is referred to as the “conductor spacing” and is marked with “d”.

[0037] It is possible to make the distance L between the connecting sections larger than the conductor spacing d by applying the method for electrically connecting the first parallel flat conductor 30 and the second parallel flat conductor 32 via the third parallel flat conductor 34 according to the first embodiment. In contrast, when using the conventional method according to patent literature 1, there is the problem of mechanical strength, making it difficult to make the width of a slot made in the parallel flat conductor larger than the conductor spacing d.

[0038] When the power semiconductor modules 20 for the U, V, and W phases, contained in the first power conversion unit 5, utilize power from the second capacitor unit 42, the distance between each of the power semiconductor modules 20 for the U, V, and W phases and the second capacitor unit 42 is important if fluctuations in the switching current are to be prevented. If the method of the first embodiment is applied, the charge stored in the second capacitor unit 42 necessarily flows through the third parallel flat conductor 34. This reduces the influence of deviations in the distances between the connection section 34d and the power semiconductor modules 20 for the U, V, and W phases. This makes it possible to prevent fluctuations in the switching current between the power semiconductor modules 20 for the U, V, and W phases.

[0039] Furthermore, even if the power semiconductor modules 20 for the U and V phases, contained in the second power conversion unit 6, utilize power from the first capacitor unit 40, the distance between each of the power semiconductor modules 20 for the U and V phases and the first capacitor unit 40 is important if fluctuations in the switching current are to be prevented. If the method of the first embodiment is applied, the charge stored in the first capacitor unit 40 necessarily flows through the third parallel flat conductor 34. This reduces the influence of deviations in the distances between the connection section 34e and the power semiconductor modules 20 for the U and V phases. This makes it possible to prevent fluctuations in the switching current between the power semiconductor modules 20 for the U and V phases.

[0040] Furthermore, the method of the first embodiment does not require a slot to be made in the parallel flat conductor, as is necessary in the conventional technique. This avoids the problem of mechanical strength. Additionally, in the method of the first embodiment, the distance L between the connection sections can be freely adjusted according to the positional relationship between the respective power semiconductor modules 20 for the U, V, and W phases and the connection sections 34d, without being affected by the conductor spacing d. Thus, it is possible to prevent fluctuations in the switching current even when the first power conversion unit 5 and the second power conversion unit 6 are arranged close to each other.Furthermore, the third parallel flat conductor 34 is generally designed to have a large conductor width to reduce electrical resistance and a small thickness to improve heat dissipation. Thus, even with the inclusion of the third parallel flat conductor 34, the thickness of the power conversion device 10 hardly increases. Therefore, applying the method of the first embodiment can contribute to a reduction in the size of the power conversion device 10.

[0041] It should be noted that the in Fig. Figure 1 shows an example of a power conversion device 10 where the first power conversion unit 5 has a three-phase three-stage inverter and the second power conversion unit 6 has a single-phase three-stage converter. However, the power conversion device 10 is not limited to this example. The power conversion device 10 can also be configured as shown in the Fig. 8, Fig. 9 to Fig. 10 shown. Fig. Figure 8 is a circuit diagram illustrating a configuration of a power conversion device 10A according to a first modification of the first embodiment. Fig. Figure 9 is a circuit diagram illustrating a configuration of a power conversion device 10B according to a second modification of the first embodiment. Fig. Figure 10 is a circuit diagram illustrating a configuration of a power conversion device 10C according to a third modification of the first embodiment.

[0042] In the 10A power conversion unit according to the first modification in Fig. 8 is the first power conversion unit 5 of the configuration in Fig. 1 is replaced by a first power conversion unit 5A. The first power conversion unit 5A has a configuration of a three-phase two-stage inverter. In the case of a three-phase two-stage inverter, it is possible to form the first power conversion unit 5A by connecting three 8A power conversion circuits, each for a single-phase application and each comprising two switching elements and a single capacitor, in parallel.

[0043] In the power conversion unit 10B according to the second modification in Fig. 9 is the second power conversion unit 6 of the configuration in Fig. 1 is replaced by a second 6A power conversion unit. The second 6A power conversion unit has a single-phase two-stage converter configuration. In the case of a single-phase two-stage converter, it is possible to form the second 6A power conversion unit by connecting two 8A power conversion circuits, each for a single-phase application and each comprising two switching elements and a single capacitor, in parallel.

[0044] In the power conversion unit 10C according to the third modification in Fig. 10 is the first power conversion unit 5 of the configuration in Fig. 1 is replaced by the first power conversion unit 5A, and the second power conversion unit 6 of the configuration in Fig. Power conversion unit 1 is replaced by the second 6A power conversion unit. The first 5A power conversion unit has a three-phase two-stage inverter configuration, and the second 6A power conversion unit has a single-phase two-stage converter configuration. In the case of the three-phase two-stage inverter, the first 5A power conversion unit can be formed by connecting three 8A power conversion circuits, each for a single-phase application and each containing two switching elements and a single capacitor, in parallel. In the case of the single-phase two-stage converter, the second 6A power conversion unit can be formed by connecting two 8A power conversion circuits, each for a single-phase application and each containing two switching elements and a single capacitor, in parallel.

[0045] The technique of the first embodiment described above can be applied to each of the power conversion devices 10A, 10B and 10C according to the first to third modifications, thereby achieving the effects described above.

[0046] As described above, the power conversion device according to the first embodiment comprises first to third parallel flat conductors, a first and a second capacitor unit, and a first and a second power conversion unit. The first parallel flat conductor has at least one first high-potential conductor and one first low-potential conductor. The first high-potential conductor is a flat conductor to which a high potential is applied. The first low-potential conductor is a flat conductor to which a low potential is applied. The first high-potential conductor and the first low-potential conductor are arranged parallel to each other. The first capacitor unit has at least one capacitor that is electrically connected between the first high-potential conductor and the first low-potential conductor. The second parallel flat conductor has at least one second high-potential conductor and one second low-potential conductor.The second high-potential conductor is a flat conductor to which the high potential is applied. The second low-potential conductor is a flat conductor to which the low potential is applied. The second high-potential conductor and the second low-potential conductor are arranged parallel to each other. The second capacitor unit includes at least one capacitor electrically connected between the second high-potential conductor and the second low-potential conductor. The first power conversion unit includes a plurality of first power semiconductor modules electrically connected to the first parallel flat conductor and converts DC voltage, applied by the first and second capacitor units respectively, into three-phase AC voltage. An example of the first power conversion unit is a two-stage inverter.The second power conversion unit comprises a plurality of second power semiconductor modules electrically connected to the second parallel flat conductor. The second power conversion unit converts single-phase or three-phase AC voltage to DC voltage and applies the DC voltage to the first and second capacitor units. An example of the second power conversion unit is a two-stage converter. The third parallel flat conductor comprises at least one third high-potential conductor and one third low-potential conductor. The third high-potential conductor is a plate-shaped conductor electrically connected to the first and second high-potential conductors. The third low-potential conductor is electrically connected to the first and second low-potential conductors. The third high-potential conductor and the third low-potential conductor are arranged parallel to each other.The third parallel flat conductor is arranged on the side opposite the first and second capacitor units, relative to the first and second parallel flat conductors. With the power conversion device configured as described above, it is possible to reduce variations in the spacing between the multitude of first power semiconductor modules belonging to the first power conversion unit and the capacitors belonging to the second capacitor unit without having to cut a slot or similar feature into the first or second parallel flat conductor.Furthermore, with the power conversion device configured as described above, it is possible to reduce variations in the spacing between the multiple secondary power semiconductor modules belonging to the second power conversion unit and the capacitors belonging to the first capacitor unit, without requiring a slot or similar feature in the first or second parallel flat conductor. This enables the provision of a power conversion device that can reduce fluctuations in the switching current while simultaneously ensuring the mechanical strength of the first and second parallel flat conductors.

[0047] It should be noted that if the first power conversion unit is a three-stage inverter and the second power conversion unit is a two-stage converter in the configuration above, the first parallel flat conductor may further comprise a first intermediate-potential conductor, which is a plate-shaped conductor arranged parallel to the first high-potential conductor and the first low-potential conductor, with intermediate potential applied to the first intermediate-potential conductor. In this configuration, the capacitor contained in the first capacitor unit comprises a first capacitor and a second capacitor, the first capacitor being electrically connected between the first high-potential conductor and the first intermediate-potential conductor, and the second capacitor being electrically connected between the first intermediate-potential conductor and the first low-potential conductor.The effects described above can also be achieved with a power conversion device configured in this way.

[0048] Furthermore, if the first power conversion unit in the above configuration is a two-stage inverter and the second power conversion unit is a three-stage converter, the second parallel flat conductor can further comprise a second center-potential conductor, which is a plate-shaped conductor arranged parallel to the second high-potential conductor and the second low-potential conductor, with center potential applied to the second center-potential conductor. In this configuration, the capacitor contained in the second capacitor unit comprises a third capacitor and a fourth capacitor, the third capacitor being electrically connected between the second high-potential conductor and the second center-potential conductor, and the fourth capacitor being electrically connected between the second center-potential conductor and the second low-potential conductor.The effects described above can also be achieved with a power conversion device configured in this way.

[0049] Furthermore, if the first power conversion unit is a three-stage inverter and the second power conversion unit is a three-stage converter in the configuration above, the first parallel flat conductor may further comprise a first intermediate potential conductor, which is a plate-shaped conductor arranged parallel to the first high potential conductor and the first low potential conductor, with intermediate potential applied to the first intermediate potential conductor, and the second parallel flat conductor may further comprise a second intermediate potential conductor, which is a plate-shaped conductor arranged parallel to the second high potential conductor and the second low potential conductor, with intermediate potential applied to the second intermediate potential conductor.In this configuration, the capacitor contained in the first capacitor unit comprises a first capacitor and a second capacitor, wherein the first capacitor is electrically connected between the first high-potential conductor and the first medium-potential conductor, and the second capacitor is electrically connected between the first medium-potential conductor and the first low-potential conductor. Furthermore, the capacitor contained in the second capacitor unit comprises a third capacitor and a fourth capacitor, wherein the third capacitor is electrically connected between the second high-potential conductor and the second medium-potential conductor, and the fourth capacitor is electrically connected between the second medium-potential conductor and the second low-potential conductor. The effects described above can also be achieved with a power conversion device configured in this way. Second embodiment.

[0050] Fig. Figure 11 is an expanded perspective view of a main part of the power conversion device 10 according to a second embodiment, illustrating a configuration of the main part of the power conversion device 10. Fig. 11. A first gate driver circuit 50 and a second gate driver circuit 52 were built in Fig. The configuration shown in section 6 has been added. Apart from that, the configuration of the second embodiment is identical or equivalent to that shown in [reference to relevant section]. Fig. The configuration shown is shown in Figure 6. Therefore, identical or equivalent components are designated with the same reference numerals, and repeated descriptions are omitted.

[0051] The first gate driver circuit 50 is a driver circuit that applies a drive voltage to the gates of twelve switching elements contained in the power semiconductor modules 20 of the first power conversion unit 5. The second gate driver circuit 52 is a driver circuit that applies a drive voltage to the gates of eight switching elements contained in the power semiconductor modules 20 of the second power conversion unit 6. These driver circuits are configured as described in Fig. The arrangement is shown in Figure 11. More precisely, the first gate driver circuit 50 is arranged on a surface of the third parallel flat conductor 34, with the surface not facing the first parallel flat conductor 30. Furthermore, the second gate driver circuit 52 is arranged on the surface of the third parallel flat conductor 34, with the surface not facing the second parallel flat conductor 32.

[0052] In the case of configuration in Fig. In the case of configuration 11, interference noise radiated by the first capacitor unit 40 and the second capacitor unit 42 is shielded by the first parallel flat conductor 30 and the second parallel flat conductor 32. Furthermore, in the case of configuration in Fig. 11. Interference noise that has penetrated the first parallel flat conductor 30 and the second parallel flat conductor 32 is additionally shielded by the third parallel flat conductor 34. Therefore, the first gate driver circuit 50 and the second gate driver circuit 52 are arranged in positions where they are less affected by radiated interference noise. As a result, the number of noise filter components in the first gate driver circuit 50 and the second gate driver circuit 52 can be reduced.

[0053] As described above, the power conversion device according to the second embodiment comprises a first gate driver circuit that applies a drive voltage to the gate of the switching element contained in the first power semiconductor module, and a second gate driver circuit that applies a drive voltage to the gate of the switching element contained in the second power semiconductor module. The first gate driver circuit is arranged on a surface of the third parallel flat conductor, with the surface not facing the first parallel flat conductor, and the second gate driver circuit is arranged on the surface of the third parallel flat conductor, with the surface not facing the second parallel flat conductor.In the power conversion device configured as described above, noise radiated by the first and second capacitor banks can be shielded by the first and second parallel flat conductors, and noise penetrating the first and second parallel flat conductors can be additionally shielded by the third parallel flat conductor. This allows for a reduction in the number of noise filter components in the first and second gate driver circuits, thus achieving a cost reduction.

[0054] It should be noted that the configurations described in the above embodiments are examples, and it is possible to combine these configurations with other known techniques or to partially omit or modify them without leaving the scope of protection of the present disclosure. Reference symbol list 1 pantograph; 2 Transformer; 3 Secondary winding; 5.5A first power conversion unit; 6, 6A second power conversion unit; 7 Drive motor; 8, 8a, 8b, 8c, 8d, 8e, 8A Power conversion circuit; 10, 10A, 10B, 10C power conversion unit; 20, 20a, 20b, 20c, 20d, 20e, 20f Power semiconductor module; 30 first parallel flat conductor; 30a first high-potential conductor; 30 burst medium potential conductors; 30c first low-potential conductor; 32 second parallel flat conductor; 32a second high-potential conductor; 32b second intermediate potential conductor; 32c second low-potential conductor; 34 third parallel flat conductor; 34a third high-potential conductor; 34b third intermediate potential conductor; 34c third low-potential conductor; 34d, 34e connecting section; 40 first capacitor unit; 42 second capacitor unit; 50 first gate driver circuit; 52 second gate driver circuit; C1, C2 Capacitor; D, D1, D2 Diode; M Mid-potential point; N1, N2 connection point; Q1, Q2, Q3, Q4 switching element. QUOTES INCLUDED IN THE DESCRIPTION

[0000] This list of documents cited by the applicant was automatically generated and is included solely for the reader's convenience. The list is not part of the German patent or utility model application. The DPMA accepts no liability for any errors or omissions. Cited patent literature

[0000] JP 2000-60126

[0004]

Claims

Power conversion device comprising: a first parallel flat conductor having at least one first high-potential conductor and one first low-potential conductor, wherein the first high-potential conductor is a flat conductor to which a high potential is applied, and wherein the first low-potential conductor is a flat conductor to which a low potential is applied, and wherein the first high-potential conductor and the first low-potential conductor are arranged in parallel; a first capacitor unit comprising at least one capacitor electrically connected between the first high-potential conductor and the first low-potential conductor;a second parallel flat conductor comprising at least a second high-potential conductor and a second low-potential conductor, wherein the second high-potential conductor is a plate-shaped conductor to which the high potential is applied, and wherein the second low-potential conductor is a plate-shaped conductor to which the low potential is applied, and wherein the second high-potential conductor and the second low-potential conductor are arranged in parallel; a second capacitor unit comprising at least one capacitor electrically connected between the second high-potential conductor and the second low-potential conductor; a first power conversion unit comprising a plurality of first power semiconductor modules electrically connected to the first parallel flat conductor, wherein the first power conversion unit converts DC voltage applied by one of the first and second capacitor units, respectively, into three-phase AC voltage;comprising a second power conversion unit comprising a plurality of second power semiconductor modules electrically connected to the second parallel flat conductor, wherein the second power conversion unit converts single-phase AC voltage or three-phase AC voltage into DC voltage and applies the DC voltage to the first and second capacitor units;and a third parallel flat conductor comprising at least a third high-potential conductor and a third low-potential conductor, wherein the third high-potential conductor is a plate-shaped conductor electrically connected to the first and second high-potential conductors, wherein the third low-potential conductor is electrically connected to the first and second low-potential conductors, wherein the third high-potential conductor and the third low-potential conductor are arranged in parallel, and wherein the third parallel flat conductor is arranged on a side opposite the first and second capacitor units with respect to the first and second parallel flat conductors. Power conversion device according to claim 1, wherein the first parallel flat conductor further comprises a first intermediate potential conductor, which is a plate-shaped conductor arranged parallel to the first high potential conductor and the first low potential conductor, wherein intermediate potential is applied to the first intermediate potential conductor, the capacitor contained in the first capacitor unit comprises a first capacitor and a second capacitor, wherein the first capacitor is electrically connected between the first high potential conductor and the first intermediate potential conductor, wherein the second capacitor is electrically connected between the first intermediate potential conductor and the first low potential conductor, the first power conversion unit is a three-stage inverter, and the second power conversion unit is a two-stage converter. Power conversion device according to claim 1, wherein the second parallel flat conductor further comprises a second intermediate potential conductor, which is a plate-shaped conductor arranged parallel to the second high potential conductor and the second low potential conductor, wherein intermediate potential is applied to the second intermediate potential conductor, the capacitor contained in the second capacitor unit comprises a third capacitor and a fourth capacitor, wherein the third capacitor is electrically connected between the second high potential conductor and the second intermediate potential conductor, wherein the fourth capacitor is electrically connected between the second intermediate potential conductor and the second low potential conductor, the first power conversion unit is a two-stage inverter, and the second power conversion unit is a three-stage converter. Power conversion device according to claim 1, wherein the first parallel flat conductor further comprises a first intermediate potential conductor, which is a plate-shaped conductor arranged parallel to the first high potential conductor and the first low potential conductor, wherein intermediate potential is applied to the first intermediate potential conductor; the second parallel flat conductor further comprises a second intermediate potential conductor, which is a plate-shaped conductor arranged parallel to the second high potential conductor and the second low potential conductor, wherein intermediate potential is applied to the second intermediate potential conductor; the capacitor contained in the first capacitor unit comprises a first capacitor and a second capacitor, wherein the first capacitor is electrically connected between the first high potential conductor and the first intermediate potential conductor.wherein the second capacitor is electrically connected between the first medium-potential conductor and the first low-potential conductor, the capacitor contained in the second capacitor unit comprises a third capacitor and a fourth capacitor, wherein the third capacitor is electrically connected between the second high-potential conductor and the second medium-potential conductor, wherein the fourth capacitor is electrically connected between the second medium-potential conductor and the second low-potential conductor, the first power conversion unit is a three-stage inverter, and the second power conversion unit is a three-stage converter. Power conversion device according to one of claims 1 to 4, comprising: a first gate driver circuit for applying a drive voltage to a gate of a switching element contained in the first power semiconductor module; and a second gate driver circuit for applying a drive voltage to a gate of a switching element contained in the second power semiconductor module, wherein the first gate driver circuit is arranged on a surface of the third parallel flat conductor, the surface not facing the first parallel flat conductor, and the second gate driver circuit is arranged on the surface of the third parallel flat conductor, the surface not facing the second parallel flat conductor.

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