Data encoding method and chip, data decoding method and chip, and display device

Abstract

The present application discloses a data encoding method and a data encoding chip, a data decoding method and a data decoding chip, and a display device. Image data to be input into a display panel is acquired, comprising several sub-image data sets, each of which comprises several data combinations. The address of a specific data set in each of the data combinations of each of the sub-image data sets is acquired, wherein the specific data set has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2. The address and the bit value of the first of the specific data sets in the data combination are written to a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data sets.The address and bit value of the (N+1)th of the specific data in the data combination are written into the bits where the Nth of the specific data in the data combination is located.

Description

[0001] The present application claims priority over the Chinese patent application filed on July 3, 2024, with application number 202410882823.5, the entire contents of which are incorporated by reference into this application. Technical field

[0002] The present application relates to the field of display technologies, in particular a data encoding method and a data encoding chip, a data decoding method and a data decoding chip, and a display device. State of the art

[0003] In a display device, high-speed data transmission is typically carried out via a point-to-point interface protocol, which may be a new high-speed point-to-point interface protocol (China Standard Point-to-Point Interface, CSPI).

[0004] The technical solution of the CSPI protocol uses 8b / 9b encoding to recode a data stream, so that the number of consecutive bits of 1 or 0 in the data stream does not exceed 5, i.e., after every 5 consecutive bits of 1, a bit of 0 must be inserted, or after every 5 consecutive bits of 0, a bit of 1 must be inserted to achieve DC balance. Disclosure of registration

[0005] Although DC balance can be achieved by using 8b / 9b encoding technology, transmitting 8-bit data requires 9 bits of bandwidth, resulting in an additional overhead of 11.1%. The greater the overhead, the more bandwidth is sacrificed, leading to increased power consumption at both the sending and receiving ends.

[0006] By means of embodiments of the present application, a data encoding method is provided which includes:

[0007] Capturing image data to be entered into a display panel; wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of the display panel, and each of which comprises multiple data combinations;

[0008] Capturing an address of a specific data in each of the data combinations of each of the sub-image data, wherein the specific data has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2;

[0009] Writing an address and a bit value of the first of the specific data in the data combination to a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data; and

[0010] Writing an address and a bit value of the (N+1)th of the specific data in the data combination into the bits where the Nth of the specific data in the data combination is located, where N is a positive integer.

[0011] Furthermore, the embodiments of the present application provide a data decoding method which includes:

[0012] Receiving encoded image data, wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of a display panel, and each of which comprises multiple data combinations;

[0013] Converting the first of the replacement data in at least one of the data combinations back into a specific datum using data written into at least one preset bit combination of a row configuration information of the sub-image data, wherein the specific datum has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2; and

[0014] Converting the (N+1)th of the substitute data in the data combination back into the specific data using the Nth of the substitute data in the data combination, wherein the Nth of the substitute data comprises an address and a converted bit value of the (N+1)th of the substitute data, where N is a positive integer.

[0015] Furthermore, the embodiments of the present application provide an encoding chip comprising computer instructions configured to perform the following steps:

[0016] Capturing image data to be entered into a display panel; wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of the display panel, and each of which comprises multiple data combinations;

[0017] Capturing an address of a specific data in each of the data combinations of each of the sub-image data, wherein the specific data has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2;

[0018] Writing an address and a bit value of the first of the specific data in the data combination to a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data; and

[0019] Writing an address and a bit value of the (N+1)th of the specific data in the data combination into the bits where the Nth of the specific data in the data combination is located, where N is a positive integer.

[0020] The embodiments of the present application also provide a decoding chip comprising computer instructions configured to perform the following steps:

[0021] Receiving encoded image data, wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of a display panel, and each of which comprises multiple data combinations;

[0022] Converting the first of the replacement data in at least one of the data combinations back into a specific datum using data written into at least one preset bit combination of a row configuration information of the sub-image data, wherein the specific datum has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2; and

[0023] Converting the (N+1)th of the substitute data in the data combination back into the specific data using the Nth of the substitute data in the data combination, wherein the Nth of the substitute data comprises an address and a converted bit value of the (N+1)th of the substitute data, where N is a positive integer.

[0024] The embodiments of the present application further provide a display device comprising a display panel, an encoding chip and a decoding chip, wherein the encoding chip is configured to perform the data encoding method provided by the embodiments of the present application and to output the encoded image data to the decoding chip, wherein the decoding chip is configured to perform the data decoding method provided by the embodiments of the present application for the encoded image data and to output the decoded image data to the display panel, and wherein the display panel is configured to display an image depending on the decoded image data output by the decoding chip. Brief description of the characters Fig. 1 is a flowchart of a data encoding method according to an embodiment of the present application; Fig. Figure 2 is a schematic view of a pixel unit according to an embodiment of the present application; Fig. Figure 3 is a schematic view of a definition of a data block address according to an embodiment of the present application; Fig. Figure 4 is a schematic view of a definition of an address within the data block according to an embodiment of the present application; Fig. Figure 5 is a schematic view of a bit structure of a preset bit combination according to an embodiment of the present application; Fig. Figure 6 is a schematic view of a definition of row configuration information according to an embodiment of the present application; Fig. Figure 7 is a schematic view of coded image data according to an embodiment of the present application; Fig. Figure 8 is a schematic view of coded partial image data according to an embodiment of the present application; Fig. Figure 9 is a schematic view of command meanings according to an embodiment of the present application; Fig. Figure 10 is a schematic view of a type of coded image data; Fig. Figure 11 is a schematic view of a data encoding process according to an embodiment of the present application; Fig. Figure 12 is a schematic view of an address marker within the data block, according to an embodiment of the present application; Fig. Figure 13 is a flowchart of a data decoding procedure according to an embodiment of the present application; Fig. Figure 14 is a schematic view of an encoding chip according to an embodiment of the present application; Fig. Figure 15 is a schematic view of a decoding chip according to an embodiment of the present application; and Fig. Figure 16 is a schematic view of a display device according to an embodiment of the present application. Detailed descriptions

[0025] The following section describes the technical solutions in the embodiments of the present application in connection with the figures in those embodiments. The described technical solutions are used solely to explain and describe the ideas of the present application and should therefore not be considered as limiting the scope of protection of the present application.

[0026] Furthermore, in the exemplary embodiments of the present application, "several" denotes two or more. In the exemplary embodiments of the present application, the terms "first", "second", etc. serve to distinguish between different technical features and do not indicate any order, quantity, or importance.

[0027] The various embodiments provided by the present application are similar to each other, and features in different embodiments can be combined with each other.

[0028] The order in which the following embodiments are described does not restrict the preferred order of the embodiments.

[0029] Exemplary embodiments of the present application provide a data encoding method and a data encoding chip, a data decoding method and a data decoding chip, and a display device. The display device can be integrated into a display device. The display device can be, but is not limited to, a television, a smartphone, a tablet computer, a notebook computer, a desktop computer, a smart speaker, a smartwatch, etc.

[0030] In the embodiments of the present application, the data coding method provided by the present application is described from the perspective of the display device, which is used as the implementing subject for the description.

[0031] It will be on Fig. 1 referenced. Fig. Figure 1 is a flowchart of a data encoding method according to an embodiment of the present application. The data encoding method may comprise at least one of the following steps 110 to 140.

[0032] Step 110: Capturing image data to be entered into a display panel, wherein the image data comprises multiple sub-image data, each of the sub-image data being configured for input into a row of pixel units of the display panel, and each of the sub-image data comprising multiple data combinations.

[0033] A display panel is a component for displaying images, which may comprise multiple pixel units, each of which can emit light, display colors, or reflect light to create an image. The type of display panel can be selected according to the specific application. For example, the display panel may be a liquid crystal display (LCD), an organic light-emitting diode (OLED) panel, a mini-LED display panel, or a micro-LED display panel, which is not limited by the embodiments described in this application. The pixel units contained in the display panel may be arranged in rows and / or columns. For example, the display panel may comprise multiple rows of pixel units and multiple columns of pixel units, as shown in Fig. 2 shown.

[0034] In the embodiments of the present application, the image data for input into the display panel comprises several bits, wherein the bit values ​​of the individual bits present in the image data and the sub-image data are 0 or 1. Since the sub-image data is configured for input into a row of pixel units of the display panel, the division of the sub-image data in the image data can correspond to the division of the number of rows of pixel units in the display panel. For example, if the display panel comprises L rows of pixel units, the image data can comprise L sub-image data, where L is a positive integer.

[0035] In each of the image data subsets, several data combinations are provided in the embodiments of the present application, each data combination being a bit sequence in the image data subsets. Each image subset can comprise the same number of data combinations. Optionally, each image subset comprises X data combinations, where X is a positive integer, such as 10, 12, or 15. Furthermore, each data combination can have the same number of bits. Optionally, each data combination has Y bits, where Y is a positive integer, such as 450, 468, 486, 504, 520, or 540.In a practical application process, the number of data combinations contained in the sub-image data can first be determined, and then, based on the number of data combinations, the number of bits that each data combination has can be determined; alternatively, the number of bits that each data combination has can first be determined, and then, based on the number of bits, the number of data combinations contained in the sub-image data can be determined.

[0036] In some cases, the sub-image data may contain one or more empty data combinations, and / or one or more empty bits within the data combination. "Empty" here means that a bit value within a bit is empty. Therefore, one can also say that a specific data combination or combinations may not be present in the sub-image data, and / or that a specific bit or bits may not be present in the data combination.

[0037] Assuming, for example, that each sub-image data set is preset to contain 15 data combinations, and each data combination has 540 bits, for a 966 / 960 channel in the CSPI protocol, the result of 966 / 960 multiplied by 8 bits is approximately 15 times 540 bits, so that every data combination is present, but certain bits are missing in the last data combination, i.e., certain empty bits are present in the last data combination. Under the same assumption, for a 726 / 720 channel in the CSPI protocol, the result of 726 / 720 multiplied by 8 bits is approximately 11 times 540 bits, so that the last four data combinations are missing, i.e., four empty data combinations are present, and furthermore, certain bits are missing in the fifth-to-last data combination, i.e., certain empty bits are present in the fifth-to-last data combination.

[0038] Step 120: Capturing an address of a specific data point in each of the data combinations of each of the sub-image data points, where the specific data point has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2.

[0039] The specific datum refers to a datum where the bit values ​​of the M consecutive bits are equal. The value of M can be set depending on the actual situation. For example, M can be 4, 5, 6, 7, 8, or 9. By way of example, in a case where M is 9, the specific datum includes 000000000 and 111111111; and in a case where M is 5, the specific datum includes 00000 and 11111.

[0040] The address of the specific data is used to specify its precise position within the data combination. For each data combination of each of the sub-image data, it can be queried whether a specific data is present in that data combination; if a specific data is queried, the address of that specific data is generated.

[0041] In some embodiments, each data combination comprises multiple data blocks, each data block corresponding to multiple data addresses. The address of the specific data includes a data block address and an address within the data block, where the data block address is the address of a data block containing the specific data in the data combination, and the address within the data block is the address of the specific data within a data block containing the specific data.

[0042] The data block address and the address within the data block can be represented by bit values. The number of bits in the data block address can be determined based on the number of data blocks in the data combination, and the number of bits in the address within the data block can be determined based on the number of addresses within the data block. For example, assume that each data combination contains 6 data blocks and each data block contains 28 addresses. Since distinguishing 6 data blocks requires 6 distinct values, and distinguishing 28 addresses requires 28 distinct values, and since 6 distinct values ​​require at least 3 bits and 28 distinct values ​​require at least 5 bits, the data block address can be 3 bits and the address within the data block can be 5 bits. Based on this, it shows Fig. 3. An example of a possible definition of the data block address and Fig. Figure 4 shows an example of a possible definition of the address within the data block. It is understood that in Fig. 4. An “address within the data block” and an “associated address within the data block” represent different definitions of the same address, where the “address within the data block” uses a binary definition and the address is represented by bit values, while the “associated address within the data block” uses a decimal definition and the address is represented by numerical values.

[0043] Of course, the address of the specific data can also be represented in other ways. For example, the address of the specific data can be determined based on the position of the first bit, the last bit, or any bit of the specific data in the data combination.

[0044] In a case where the address of the specific date is represented by the data block address and the address within the data block, it is possible to query for any combination of data whether a specific date exists in each of the data blocks of that combination. If a specific date is queried, the data block address and the address within the data block of that specific date are generated. Optionally, it is possible to query sequentially or in parallel whether a specific date exists in each of the data blocks. Upon completion of the query process for specific data in all data blocks, a data block address and an address within the data block of each queried specific date are generated.Alternatively, it can be queried successively whether a specific date is present in the individual data blocks, whereby each time a specific date is queried, a data block address and an address within the data block of that specific date are generated.

[0045] In some embodiments, the above-mentioned step 120 comprises the following steps 122 to 128.

[0046] Step 122: Determine if a data in M ​​bits corresponding to an S-th address in a K-th data block in the data combination is the specific data; where K is a positive integer less than or equal to P and K has an initial value of 1, where P is a positive integer, where S is a positive integer less than or equal to Q and S has an initial value of 1, where Q is a positive integer.

[0047] Each data combination comprises P data blocks, where each data block comprises Q addresses, and where P and Q are positive integers, such as P being 5, 6, 7, or 8 and Q being 10, 28, or 44. For any given data combination, starting with the first address within the first data block of that data combination (i.e., starting with K equal to 1 and S equal to 1), it is successively assessed whether a data element in the M bits corresponding to the individual addresses in each data block is the specific data element, until the query process for specific data element corresponding to the last address in the last data block is completed (i.e., until K+1 is greater than P and S+1 is greater than Q).

[0048] For the K-th data block of the data combination, when querying the S-th address in the K-th data block, the date in the M bits corresponding to the S-th address can be read; then it is assessed whether the date in the M bits corresponding to the S-th address is the specific date. Optionally, the M bits corresponding to an address within the data block refer to M bits that begin with the bit corresponding to that address in the data block as the start bit.

[0049] Since the specific date refers to a date where the bit values ​​of M consecutive bits are identical, determining whether the date in the M bits is the specific date can be done by successively assessing whether a bit value of a current bit of the M bits is identical to a bit value of the next bit. If so, the date in the M bits is the specific date; if not, the date in the M bits is not a specific date. Alternatively, a bit value of the first bit of the M bits can be read first, and then successively assessing whether the bit values ​​of the subsequent bits of the M bits are identical to the bit value of the first bit. If so, the date in the M bits is the specific date; if not, the date in the M bits is not a specific date.

[0050] Step 124: Generating the data block address and the address within the data block of the specific date, if a date in the M bits is the specific date.

[0051] If, for the M bits corresponding to the S-th address in the K-th data block, the data in these M bits is the specific data, a data block address and an address within the data block of this specific data are generated in real time, the data block address being used to specify the K-th data block, and the address within the data block being used to specify the S-th address in the K-th data block.

[0052] Step 126: Setting S to S+1 and re-executing from the step of determining whether a date in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific date.

[0053] After the determination in step 122, regardless of whether the data in the M bits corresponding to the S-th address is the specific data or not, step 126 must be executed to further determine whether a data in M ​​bits corresponding to the next address is the specific data. That is, S is set to S+1, and the process is executed again from the step of determining whether the data in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific data.

[0054] It is understood that after the determination in step 122, and in a case where the date in the M bits corresponding to the S-th address is the specific date, step 124 is performed first, followed by step 126; that in a case where the date in the M bits corresponding to the S-th address is not a specific date, step 126 is performed directly.

[0055] Step 128: If S+1 is greater than Q, set K to K+1 and set S to 1, and repeat from the step of determining if a data point in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific data point, until K+1 is greater than P.

[0056] Whenever S is set to S+1 in step 126, it can first be assessed whether S+1 is greater than Q. If S+1 is less than or equal to Q, addresses in the current data block have not yet been fully queried, and the query process continues for specific data of the next address in the current data block. This means that, based on the new value of S, the process returns to step 122 and this step is executed again. If S+1 is greater than Q, all addresses in the current data block have been fully queried, and the query process continues for specific data of the next data block. This means that K is set to K+1 and S is set to 1. Based on the new value of K and the new value of S, the process returns to step 122 and this step is executed again.

[0057] Similarly, whenever K is set to K+1 in step 128, it can first be assessed whether K+1 is greater than P. If K+1 is less than or equal to P, the data blocks contained in the current data combination have not yet been fully queried, and the query process continues for specific data of the next data block of the current data combination. This means that, based on the new value of K and the new value of S, the process returns to step 122 and executes this step again. If K+1 is greater than P, the data blocks contained in the current data combination have been fully queried, and the query process continues for specific data of the next data combination. This means that steps 122 to 128 are executed again for the next data combination.

[0058] Step 130: Writing the address and bit value of the first of the specific data in the data combination to a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data.

[0059] The sub-image data each corresponds to a line configuration information (Line Config), wherein the line configuration information is used to specify relevant parameters of a line of pixel units corresponding to the sub-image data in the displayed image. In the embodiments of the present application, several preset bit combinations are added to the line configuration information, each of the preset bit combinations corresponding to a data combination in the sub-image data.

[0060] Each preset bit combination is used to specify the address and bit of the first piece of specific data in a data combination corresponding to that preset bit combination. For any given data combination, if a specific piece of data is present in that data combination, the address and bit value of the first piece of specific data in that data combination are written to the preset bit combination in the row configuration information of the sub-image data corresponding to that data combination.Optionally, based on steps 122 to 128 above, in a case where the evaluation result of step 122 determines for the first time that a data element in M ​​bits within the data combination is the specific data element, step 124 can be executed to generate the address of the first of the specific data elements. The address and bit value of the first of the specific data elements in the data combination are then written to the preset bit combination of the row configuration information. Alternatively, after the addresses of all specific data elements in the data combination have been generated, the address and bit value of the first of the specific data elements in the data combination are written to the preset bit combination of the row configuration information.

[0061] In some embodiments, each preset bit combination comprises a first bit combination, a second bit combination, and a third bit combination arranged sequentially. If the address of the specific data includes a data block address and an address within the data block, the above step 130 comprises: writing the data block address of the first of the specific data in the data combination to the first bit combination of the preset bit combination; writing the bit value of the first of the specific data in the data combination to the second bit combination of the preset bit combination; writing the address within the data block of the first of the specific data in the data combination to the third bit combination of the preset bit combination.

[0062] The respective bit combinations have one or more bits, and the number of bits in each combination can be set depending on the actual situation. For example, the number of bits in the first bit combination is identical to the number of bits in the data block address of the specific data, the number of bits in the third bit combination is identical to the number of bits in the address within the data block of the specific data, and the number of bits in the second bit combination is 1, since the bit value of the specific data can only take two values: 0 and 1. Assuming that the data block address of the specific data has 3 bits and the address within the data block has 5 bits, a possible bit structure of the preset bit combination of the row configuration information is shown in the following. Fig. 5 shown.

[0063] In some embodiments, each of the sub-image data comprises T data combinations arranged sequentially, wherein the row configuration information of each of the sub-image data comprises preset bit combinations arranged sequentially, where T is a positive integer. For example, T is 10, 12, or 15. Based on this, the above step 130 comprises: writing the address and bit value of the first of the specific data in the R-th data combination to the R-th preset bit combination of the row configuration information of the sub-image data, where R is a positive integer less than or equal to T. This ensures that the order of the multiple data combinations in the corresponding sub-image data matches the order of the multiple preset bit combinations in the corresponding row configuration information.

[0064] In some embodiments, the data encoding method further includes: writing a first preset dummy date into the R-th preset bit combination of the row configuration information of the sub-image data if no specific date is present in the R-th data combination.

[0065] In some embodiments, the data encoding method further includes: filling the R-th preset bit of the row configuration information of the sub-image data with a second preset dummy data if no R-th data combination is present. Regarding the explanation of why a specific data combination or combinations are not present in the sub-image data, reference is made to the explanation of step 110 described above, which is not repeated here.

[0066] The first preset dummy date is used to indicate that no specific date is present in the data combination, and the second preset dummy date is used to indicate that no data combination exists. Optionally, in a case where the address of the specific date includes a data block address and an address within the data block, the first and second preset dummy dates may include a preset dummy data block address and / or a dummy address within the data block. For an explanation of the dummy data block address and the dummy address within the data block, see [reference to relevant documentation]. Fig. 3 and Fig. 4 referred.

[0067] For example, if the preset bit combination comprises a first bit combination, a second bit combination, and a third bit combination arranged sequentially, the dummy data block address in the first preset dummy date and the second preset dummy date is filled into the first bit combination of the preset bit combination, with the dummy address within the data block in the first preset dummy date and the second preset dummy date being filled into the third bit combination of the preset bit combination; furthermore, the second bit combination of the preset bit combination can be filled with either 0 or 1.Thus, the preset bit combination filled with the first preset dummy date and the second preset dummy date can be any of the following possible bit values: 000000000, 000011101, 000011110, 000011111, 000100000, 000111101, 000111110, 000111111, 111000000, 111011101, 111011110, 111011111, 111100000, 1111111101, 111111110, 111111111.

[0068] It is understood that in the embodiments of the present application, the first preset dummy date and the second preset dummy date may have the same bit values ​​or different bit values. For example, both the first preset dummy date and the second preset dummy date are 111011111. Alternatively, the first preset dummy date is 000111111, while the second preset dummy date is 111000000.

[0069] In some embodiments, the default bit combination is a header bit combination (Header), and the line configuration information further includes an instruction bit combination (CMD) and a register bit combination (Reserve). In a case where the sub-screen data comprises X data combinations, the line configuration information includes 1T CMD bit combinations, XT header bit combinations, and 4T reserve bit combinations.

[0070] X is, for example, 15. One possible definition of the row configuration information is in Fig. Figure 6 shows data transferred from an encoding chip of a display device to a decoding chip (i.e., the encoded image data). Fig. 7 is shown, with one row of data (i.e., coded sub-image data) in Fig. 8 is shown, where the meanings of commands that are in the Fig. 6 to 8 occur, in Fig. 9 are shown. In addition, it shows Fig. 10 exemplary data that, according to the prior art, are transferred from an encoding chip of a display device to a decoding chip. Based on the data encoding method provided by the embodiments of the present application, the line configuration information comprises an original CMD bit combination and is compatible with a data encoding method in the original CSPI protocol.

[0071] Step 140: Writing an address and a bit value of an (N+1)th of the specific data in the data combination into the bits where the Nth of the specific data in the data combination is located, where N is a positive integer.

[0072] For any given data combination, in a case where the data combination contains two or more specific data items, the address and bit value of the (N+1)th of the specific data items in the data combination are written into the bits containing the Nth of the specific data items in the data combination, where N is a positive integer.The address and bit value of the second specific data item in the data combination are written to the bits containing the first specific data item in the data combination; the address and bit value of the third specific data item in the data combination are written to the bits containing the second specific data item in the data combination; and so on, each time writing the address and bit value of the current specific data item in the data combination to the bits containing the previous specific data item in the data combination, until writing the address and bit value of the last specific data item in the data combination to the bits containing the penultimate specific data item in the data combination.

[0073] In some embodiments, a bit structure where the specific data is substituted in the data combination (i.e., a bit structure of bits into which addresses and bit values ​​have been written, after which those addresses and bit values ​​of the bits containing the specific data have been written) is identical to the bit structure of the preset bit combination of the row configuration information. Setting the same bit structure ensures that a consistent encoding standard is followed during an encoding process, thereby improving encoding efficiency. It is understood that in this embodiment, the number of bits that a specific data contains is identical to the number of bits that a preset bit combination contains, i.e., both consist of M bits.

[0074] For example, if the preset bit combination comprises a first, a second, and a third bit combination arranged sequentially, the bit structure in which the specific data is replaced also comprises three bit combinations arranged sequentially. When writing the address and bit value to the bits containing the specific data, the data block address, the bit value, and the address within the data block are written sequentially to these three bit combinations. For further explanation of the bit structure and number of bits of the preset bit combination, refer to the explanation in step 130 described above, which is not repeated here.

[0075] In some embodiments, the data encoding method further comprises: writing a third preset dummy data into the bits containing the last of the specific data in the data combination, wherein the third preset dummy data is used to indicate the end of an encoding process for the data combination. This means that, for any given data combination, at the end of the query process for specific data of that data combination, the last of the specific data in that data combination can be determined, wherein the third preset dummy data is written into the bits containing the last of the specific data in the data combination to indicate the end of the encoding process for that data combination.Optionally, in a case where the address of the specific date includes a data block address and an address within the data block, the third preset dummy date includes a preset dummy data block address and / or a dummy address within the data block. For an explanation of the dummy data block address and the dummy address within the data block, see [reference to relevant documentation]. Fig. 3 and Fig. 4 referred.

[0076] After the third preset dummy data has been written to the bits where the last of the specific data in the data combination is located, any of the following possible bit values ​​may be present, for example: 000000000, 000011101, 000011110, 000011111, 000100000, 000111101, 000111110, 000111111, 111000000, 111011101, 111011110, 111011111, 111100000, 1111111101, 111111110, 111111111.

[0077] The data encoding method provided by the embodiments of the present application is explained below using a specific example. Fig. Figure 11 shows an example of a data combination with 540 bits, where the data combination is divided into 6 data blocks, and each data block then has 90 bits. For each data block, as in Fig. Figure 12 shows that, starting with the first bit of each data block, the first bit is marked as address 1; thereafter, an address is marked every two bits, so that 28 addresses can be marked for each data block.

[0078] In a data encoding process, the display device, starting with the first address (address 1) in the first data block (1st block (90 bits)), assesses whether a 9-bit data entry (1st search 9 bit), using the bit corresponding to address 1 as its start bit, is specific data (i.e., whether all the bit values ​​are 0 or all 1). Regardless of whether it is specific data or not, it must then assess whether a 9-bit data entry (2nd search 9 bit), using the bit corresponding to address 2 as its start bit, is specific data; and so on, until it assesses whether a 9-bit data entry (28th search 9 bit), using the last address in the last data block (6th block (90 bits)) as its start bit, is specific data.

[0079] When, in the above-mentioned query process for specific data, it is determined for the first time that a 9-bit date is a specific date, the data block address, the bit value, and the address within the data block of this specific date (the first specific date) are filled into the header bit combination of the row configuration information.

[0080] As in Fig. As shown in Figure 11, with 9 bits (En: 4th search 9bit), which use as the start bit the bit corresponding to the fourth address in the first data block, specific data is determined for the first time, such that the specific data 000000000 is the first of the specific data; where the data block address of the first of the specific data is 001 and is written to the first bit combination (d0d1d2) of the header bit combination; where the bit value of the first of the specific data is 0 and is written to the second bit combination (d3) of the header bit combination; where the address within the data block of the first of the specific data is 00100 and is written to the third bit combination (d4d5d6d7d8) of the header bit combination; resulting in a bit value of 001000100 at the header bit combination.

[0081] In the above-mentioned query process for specific data, each time the next specific data is queried, an address and a bit value of the next specific data are written into the bits where the current specific data is located, where a bit structure where the specific data is replaced is identical to the bit structure of the header bit combination, so that the address and bit value of each specific data can be specified by bits where the previously replaced specific data is located.

[0082] As in Fig. As shown in Figure 11, at 9 bits (En: 28th search 9bit), which use the last address (data address 28) in the last data block (En: 6th block (90bit)) as the start bit, a specific data is determined for the second time, such that the specific data 111111111 is the second of the specific data; wherein the second of the specific data has a data block address of 110, a bit value of 1 and an address within the data block of 11100, wherein the address and bit value of the second of the specific data are written into the bits where the first of the specific data is located; whereby the bit value at the bits where the replaced first of the specific data is located is 110111100.

[0083] After completion of the aforementioned query process for specific data, the last of the specific data in the data combination can be determined. The third preset dummy data is then written to the bits containing the last of the specific data to indicate the end of the encoding process for the data combination. This third preset dummy data comprises a preset dummy data block address and / or a dummy address within the data block.

[0084] As in Fig. As shown in Figure 11, the 9 bits (En: 28th search 9bit) that use the last address (data address 28) in the last data block (En: 6th block (90bit)) as the start bit are used to determine a specific date for the last time, such that the specific date 111111111 is the last of the specific data (and simultaneously the second of the specific data in this data combination); the third preset dummy date is written to the bits containing the last of the specific data. Assuming that 000 is a possible dummy data block address and 11101 is a possible dummy address within the data block, the third preset dummy date can be 000111101. Thus, the bit value at the bits containing the replaced last of the specific data is 000111101.

[0085] In summary, the embodiments of the present application eliminate a situation in which multiple logical ones or multiple logical zeros originally occur continuously in the image data by replacing data in the image data, where several consecutive bit values ​​are identical, with addresses and bit values ​​of other data, where several consecutive bit values ​​are identical, thereby achieving a DC balance and effectively avoiding bit errors caused by a DC offset in a decoding process.

[0086] Furthermore, in the embodiments of the present application, no new bits are added based on the original bits of the image data when replacing data where several consecutive bit values ​​are identical. Instead, additional row configuration information is provided for the respective sub-image data, wherein the address and the bit value of the first data where several consecutive bit values ​​are identical are written into the corresponding preset bit combination of the row configuration information of the sub-image data in the respective data combinations of the sub-image data.Since the number of bits in the image data is significantly larger than the number of bits in the line configuration information, compared to the prior art, where a large number of redundant bits are inserted into the image data, only a few additional bits need to be configured in the embodiments of the present application. This reduces the overhead of the data transmission and also avoids excessive power consumption at the sending and receiving ends. For example, the transmission of 8-bit data using 8b / 9b encoding technology requires a bandwidth of 9 bits, with an overhead of 11.1%. In contrast, in the embodiments of the present application, each transmission of 540-bit data requires an additional 9 bits as a preset bit combination of the line configuration information, with an overhead of 1.6%.

[0087] Furthermore, the technical solutions of the embodiments of the present application assign corresponding information to the addresses and bit values ​​of the respective data originally present in the image data, where several consecutive bit values ​​are identical, after encoding. This allows the addresses and bit values ​​of the respective data originally present in the image data, where several consecutive bit values ​​are identical, to be recorded during the decoding process based on the preset bit combination of the line configuration information or based on the replaced data in the image data. This enables the respective replaced data in the image data, where several consecutive bit values ​​are identical, to be restored, thus ensuring that the encoded image data can be decoded correctly.It is evident that the embodiments of the present application ensure the reliability of the encoding and decoding process while achieving DC balance and reducing the additional effort.

[0088] It will be on Fig. 13 Referenced. Fig. Figure 13 is a flowchart of a data decoding method according to an embodiment of the present application. The data decoding method may comprise at least one of the following steps 210 to 230.

[0089] Step 210: Receiving encoded image data, wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of the display panel, and each of which comprises multiple data combinations.

[0090] Step 220: Converting the first of the replacement data in at least one of the data combinations back into a specific datum using data written into at least one preset bit combination of a row configuration information of the sub-image data, where the specific datum has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2.

[0091] Step 230: Converting the (N+1)th of the substitute data in the data combination back into the specific data using the Nth of the substitute data in the data combination, where the Nth of the substitute data includes an address and a converted bit value of the (N+1)th of the substitute data, where N is a positive integer.

[0092] The substitute data refers to a data that is formed by replacing the specific data in the data combination during encoding. That is, during encoding, after the address and bit value of the (N+1)th of the specific data in the data combination have been written into the bits containing the Nth of the specific data in the data combination, the original bits containing the Nth of the specific data are replaced by the Nth of the substitute data.

[0093] It is understood that the address of the Nth of the substitute data and the address of the Nth of the specific data are identical, while the converted-back bit value of the Nth of the substitute data and the bit value of the Nth of the specific data are also identical. Since, during encoding, the address and bit value of the first of the specific data in the respective data combinations are written into the respective preset bit combinations of the line configuration information of the sub-image data, during decoding, based on the data written into at least one preset bit combination of the line configuration information of the sub-image data, the address and converted-back bit value of the first of the substitute data in at least one data combination can be captured, thus converting the first of the substitute data back into the first of the specific data.Furthermore, since during encoding the address and bit value of the (N+1)th of the specific data in the data combination are written into the bits in which the Nth of the specific data in the data combination is located, during decoding based on the Nth of the replacement data in the data combination the address and the converted bit value of the (N+1)th of the replacement data in the data combination can be captured and thus the (N+1)th of the replacement data is converted back into the (N+1)th of the specific data.

[0094] In some embodiments, the sub-image data T comprises data combinations arranged sequentially, wherein the row configuration information T comprises preset bit combinations arranged sequentially, where T is a positive integer. The above-mentioned step 220 comprises: converting the first of the substitute data in the R-th data combination of the sub-image data back into the specific data using data written into the R-th preset bit combination of the row configuration information of the sub-image data, where R is a positive integer less than or equal to T.This means that, based on the data written into the R-th preset bit combination of the row configuration information of the sub-image data, the address and the converted bit value of the first of the substitute data in the R-th data combination of the sub-image data can be determined, and thereby the first of the substitute data in the R-th data combination can be converted back into the first of the specific data.

[0095] In some embodiments, a date written into the R-th preset bit combination of the row configuration information of the sub-image data is a first preset dummy date if no substitute date is present in the R-th data combination of the sub-image data.

[0096] In some embodiments, a date written into the R-th preset bit combination of the row configuration information of the sub-image data is a second preset dummy date if no R-th data combination is present in the sub-image data.

[0097] In some embodiments, a date written to the R-th preset bit combination of the row configuration information of the sub-image data is the first preset dummy date; when the first preset dummy date is read from the R-th preset bit combination of the row configuration information of the sub-image data, a decoding operation for the R-th data combination of the sub-image data is terminated.

[0098] In some embodiments, a date written to the R-th preset bit combination of the row configuration information of the sub-image data is the second preset dummy date; when the second preset dummy date is read from the R-th preset bit combination of the row configuration information of the sub-image data, a decoding operation for the R-th data combination of the sub-image data is terminated.

[0099] In some embodiments, the last of the substitute data in the data combination is a third preset dummy date; when the third preset dummy date is read from the data combination, a decoding operation for the data combination is terminated. That is, during encoding, the third preset dummy date is written to the bits containing the last of the specific data in the data combination, so that the last of the substitute data in the encoded data combination is the third preset dummy date; and when, during decoding, the third preset dummy date is read from the encoded data combination, it is determined that this substitute date is the last of the substitute data to complete the decoding process for the data combination.

[0100] In some embodiments, the data combination comprises multiple data blocks, each data block corresponding to multiple data addresses; wherein the address of the specific date comprises a data block address and an address within the data block, the data block address being the address of a data block containing the specific date in the data combination, and the address within the data block being the address of the specific date within a data block containing the specific date. It is understood that the address of the substitute date also comprises a data block address and an address within the data block, the data block address being the address of a data block containing the substitute date in the data combination, and the address within the data block being the address of the substitute date within a data block containing the substitute date.

[0101] In some embodiments, the bit structure of the replacement data is identical to the bit structure of the preset bit combination of the row configuration information.

[0102] In some embodiments, the bit structure of each preset bit combination of the row configuration information comprises a first bit combination, a second bit combination, and a third bit combination arranged sequentially. A data entry written into the first bit combination of the preset bit combination is the data block address of the first of the substitute data in the encoded data combination; in other words, a data entry written into the first bit combination is the data block address of the first of the specific data in the data combination before encoding. A data entry written into the second bit combination of the preset bit combination is the reverse-converted bit value of the first of the substitute data in the encoded data combination; in other words, a data entry written into the second bit combination is the bit value of the first of the specific data in the data combination before encoding.A date written into the third bit combination of the preset bit combination is the address within the data block of the first of the substitute data in the coded data combination; in other words, a date written into the third bit combination is the address within the data block of the first of the specific data in the data combination before encoding.

[0103] In some embodiments, the bit structure of the substitute data comprises a first bit combination, a second bit combination, and a third bit combination arranged sequentially. A data entry written into the first bit combination of the Nth substitute data in the encoded data combination is the data block address of the (N+1)th substitute data in the encoded data combination; in other words, a data entry written into the first bit combination is the data block address of the (N+1)th specific data in the data combination before encoding. A data entry written into the second bit combination of the Nth substitute data in the encoded data combination is the reverse-converted bit value of the (N+1)th substitute data in the encoded data combination; in other words, a data entry written into the second bit combination is the bit value of the (N+1)th specific data in the data combination before encoding.A date written into the third bit combination of the Nth of the substitute data in the coded data combination is the address within the data block of the (N+1)th of the substitute data in the coded data combination; in other words, a date written into the third bit combination is the address within the data block of the (N+1)th of the specific data in the data combination before encoding.

[0104] It is understood that with regard to the definitions of terms, specific implementation methods and corresponding advantageous effects, etc., in the data decoding method provided by the embodiments of the present application, reference can be made to the explanations in the data encoding method provided by the embodiments of the present application, which is not repeated here.

[0105] To better implement the data encoding method provided by the embodiments of the present application, the embodiments of the present application further provide an encoding chip based on the data encoding method described above, wherein the encoding chip comprises computer instructions, wherein the computer instructions can be configured to execute the data encoding method described above, wherein the meanings of the terms here are the same as in the data encoding method described above, and wherein, with regard to specific implementation details, reference can be made to the explanations in the embodiments of the method.

[0106] For example, the coding chip is in Fig. 14 shown, where the computer instructions of the coding chip are in modules which are in Fig. The encoding chip can be located in the 14 shown. In this case, the encoding chip can comprise: a data acquisition module 1410, an information acquisition module 1420, and a data writing module 1430.

[0107] The 1410 data acquisition module is configured to capture image data to be entered into a display panel, wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of the display panel, and each of which comprises multiple data combinations.

[0108] The information acquisition module 1420 is configured to capture an address of a specific data in each of the data combinations of each of the sub-image data, where the specific data has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2.

[0109] The 1430 data write module is configured to write the address and bit value of the first of the specific data in the data combination to a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data. The 1430 data write module is further configured to write the address and bit value of the (N+1)th of the specific data in the data combination to the bits containing the Nth of the specific data in the data combination, where N is a positive integer.

[0110] In some embodiments, the data combination comprises several data blocks, wherein the address of the specific date comprises a data block address and an address within the data block, wherein the data block address is an address of a data block in which the specific date is located in the data combination, and wherein the address within the data block is an address of the specific date within a data block in which the specific date is located.

[0111] In some embodiments, the above-mentioned information acquisition module 1420 is further configured to assess whether a data element in M ​​bits corresponding to an S-th address in a K-th data block in the data combination is the specific data element, where K is a positive integer less than or equal to P and has an initial value of 1, where P is a positive integer, where S is a positive integer less than or equal to Q and has an initial value of 1, where Q is a positive integer; that it generates the data block address and the address within the data block of the specific data element if a data element in the M bits is the specific data element; that it sets S to S+1 and allows re-execution from the step of determining whether a data element in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific data element;that if S+1 is greater than Q, it sets K to K+1, sets S to 1, and allows re-execution from the step of determining whether a data point in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific data point, until K+1 is greater than P.

[0112] In some embodiments, each preset bit combination comprises a first bit combination, a second bit combination, and a third bit combination arranged sequentially. The data write module 1430 mentioned above is further configured to write the data block address of the first of the specific data in the data combination to the first bit combination of the preset bit combination; write the bit value of the first of the specific data in the data combination to the second bit combination of the preset bit combination; and write the address within the data block of the first of the specific data in the data combination to the third bit combination of the preset bit combination.

[0113] In some embodiments, the sub-image data T comprises data combinations arranged sequentially, wherein the row configuration information T comprises preset bit combinations arranged sequentially, where T is a positive integer. The data write module 1430 mentioned above is further configured to write the address and bit value of the first of the specific data in the R-th data combination to the R-th preset bit combination of the row configuration information of the sub-image data, where R is a positive integer less than or equal to T.

[0114] In some embodiments, it is provided that in a case where no specific date is present in the R-th data combination, the above-mentioned data write module 1430 is further configured to write a first preset dummy date into the R-th preset bit combination of the row configuration information of the sub-image data.

[0115] In some embodiments, it is provided that in a case where no R-th data combination is present, the above-mentioned data write module 1430 is further configured to write a second preset dummy date into the R-th preset bit combination of the row configuration information of the sub-image data.

[0116] In some embodiments, the above-mentioned data write module 1430 is further configured to write a third preset dummy data into the bits where the last of the specific data in the data combination is located.

[0117] It is understood that in the actual implementation, the above-mentioned individual modules can be implemented as independent entities or can be combined in any way and implemented as the same or multiple entities.

[0118] To better implement the data decoding method provided by the embodiments of the present application, the embodiments of the present application further provide a decoding chip based on the data decoding method described above, wherein the decoding chip comprises computer instructions, wherein the computer instructions can be configured to execute the data decoding method described above, wherein the meanings of the terms here are the same as in the data decoding method described above, and wherein reference can be made to the explanations in the embodiments of the method with regard to specific implementation details.

[0119] For example, the decoding chip is in Fig. 15 shown, where the computer instructions in the decoding chip are in modules that are in Fig. The 15 shown may be located there. In this case, the decoding chip may comprise a data receiving module 1510 and a data recovery module 1520.

[0120] The 1510 data reception module is configured to receive encoded image data, wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of the display panel, and each of which comprises multiple data combinations.

[0121] The Data Recovery Module 1520 is configured to convert the first of the replacement data in at least one of the data combinations back into a specific date using data written to at least one preset bit combination of a row configuration information of the sub-image data, where the specific date has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2. The Data Recovery Module 1520 is further configured to convert the (N+1)th of the replacement data in the data combination back into the specific date using the Nth of the replacement data in the data combination, where the Nth of the replacement data includes an address and a converted bit value of the (N+1)th of the replacement data, where N is a positive integer.

[0122] It is understood that in the actual implementation, the above-mentioned individual modules can be implemented as independent entities or can be combined in any way and implemented as the same or multiple entities.

[0123] An average professional can understand that the above-mentioned computer instructions can be stored in a computer-readable storage medium and can be loaded and executed by a processor.

[0124] For this purpose, the embodiments of the present application provide a computer-readable storage medium in which computer instructions are stored, wherein the computer instructions can be loaded by a processor to perform steps in any data encoding or data decoding procedure provided by the embodiments of the present application.

[0125] For example, the computer commands can perform the following steps:

[0126] Capturing image data to be entered into a display panel, wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of the display panel, and each of which comprises multiple data combinations;

[0127] Capturing an address of a specific data in each of the data combinations of each of the sub-image data, wherein the specific data has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2;

[0128] Writing the address and bit value of the first of the specific data in the data combination into a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data;

[0129] Writing an address and a bit value of the (N+1)th of the specific data in the data combination into the bits where the Nth of the specific data in the data combination is located, where N is a positive integer.

[0130] As another example, the computer commands can perform the following steps:

[0131] Receiving encoded image data, wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of the display panel, and each of which comprises multiple data combinations;

[0132] Converting the first of the replacement data in at least one of the data combinations back into a specific datum using data written into at least one preset bit combination of a row configuration information of the sub-image data, wherein the specific datum has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2;

[0133] Converting the (N+1)th of the substitute data in the data combination back into the specific data using the Nth of the substitute data in the data combination, wherein the Nth of the substitute data comprises an address and a converted bit value of the (N+1)th of the substitute data, where N is a positive integer.

[0134] The computer-readable storage medium can include: a read-only memory (ROM, Read Only Memory), a random access memory (RAM, Random Access Memory), a magnetic disk or an optical disk, etc.

[0135] Since the computer instructions stored in the computer-readable storage medium can execute the steps in any data encoding or data decoding method provided by the embodiments of the present application, the advantageous effects achievable by any data encoding or data decoding method provided by the embodiments of the present application can be obtained. For details, reference is made to the preceding embodiments, which are not repeated here.

[0136] Furthermore, the embodiments of the present application provide a display device as described in Fig. Figure 16 shows a schematic structural view of the display device affected by the embodiments of the present application.

[0137] Specifically, the display device comprises a display panel, an encoding chip, and a decoding chip, wherein the encoding chip is configured to perform the steps in the embodiments of the data encoding method and output the encoded image data to the decoding chip, wherein the decoding chip is configured to perform the steps in the embodiments of the data decoding method for the encoded image data and output the decoded image data to the display panel, wherein the display panel is configured to display an image depending on the decoded image data output by the decoding chip.

[0138] Regarding the specific implementation of the above-mentioned individual processes and the corresponding advantageous effects, reference can be made to the above detailed descriptions of the exemplary embodiments of the data encoding method and the exemplary embodiments of the data decoding method, which are not repeated here.

[0139] A data encoding method, a data encoding chip, a data decoding method, a data decoding chip, and a display device, as provided by the embodiments of the present application, are presented in detail. The principles and embodiments of the present application are explained here with reference to specific examples. The foregoing description of the embodiments is merely helpful for understanding the method of the present application and its core idea. For those skilled in the art, modifications to the detailed embodiments and the scope of application can be made in accordance with the ideas of the present application. In summary, the contents of this description should not be understood as limiting the scope to the present application.

Claims

A data encoding method comprising: capturing image data to be input into a display panel; wherein the image data comprises multiple sub-image data, each of which is configured for input into a row of pixel units of the display panel, and each of which comprises multiple data combinations; capturing an address of a specific data element in each of the data combinations of each of the sub-image data, wherein the specific data element has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2; writing an address and a bit value of the first of the specific data elements in the data combination to a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data;and writing an address and a bit value of the (N+1)th of the specific data in the data combination into the bits where the Nth of the specific data in the data combination is located, where N is a positive integer. The method of claim 1, wherein the data combination comprises multiple data blocks, wherein the address of the specific data comprises a data block address and an address within the data block, wherein the data block address is an address of a data block in which the specific data is located in the data combination, and the address within the data block is an address of the specific data within the data block in which the specific data is located;and wherein acquiring an address of a specific date in each of the data combinations comprises each of the sub-image data: determining if a date in M ​​bits corresponding to an S-th address in a K-th data block in the data combination is the specific date, where K is a positive integer less than or equal to P and K has an initial value of 1, where P is a positive integer, where S is a positive integer less than or equal to Q and S has an initial value of 1, and where Q is a positive integer; generating the data block address and the address within the data block of the specific date if the date in the M bits is the specific date; setting S to S+1 and re-executing from the step of determining if a date in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific date;and if S+1 is Q, set K to K+1 and set S to 1, and repeat from the step of determining whether a data point in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific data point, until K+1 is P. The method of claim 1, wherein the data combination comprises multiple data blocks, wherein the address of the specific data comprises a data block address and an address within the data block, wherein the data block address is an address of a data block in which the specific data is located in the data combination, and the address within the data block is an address of the specific data within the data block in which the specific data is located; wherein each of the preset bit combinations comprises a first bit combination, a second bit combination, and a third bit combination arranged sequentially;and wherein writing an address and a bit value of the first of the specific data in the data combination to a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data comprises: writing the data block address of the first of the specific data in the data combination to the first bit combination of the preset bit combination; writing the bit value of the first of the specific data in the data combination to the second bit combination of the preset bit combination; and writing the address within the data block of the first of the specific data in the data combination to the third bit combination of the preset bit combination.; The method of claim 1, wherein the sub-image data T comprises data combinations arranged sequentially, wherein the row configuration information T comprises preset bit combinations arranged sequentially, where T is a positive integer; and wherein writing an address and a bit value of the first of the specific data in the data combination into a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data comprises: writing the address and the bit value of the first of the specific data in the R-th data combination into the R-th preset bit combination of the row configuration information of the sub-image data, wherein R is a positive integer less than or equal to T. Method according to claim 4, wherein the method further comprises: writing a first preset dummy date into the R-th preset bit combination of the row configuration information of the sub-image data if no specific date is present in the R-th data combination. Method according to claim 4, wherein the method further comprises: writing a second preset dummy data into the R-th preset bit combination of the row configuration information of the sub-image data if no R-th data combination is present. The method of claim 1, wherein the method further comprises: writing a third preset dummy data into the bits in which the last of the specific data in the data combination is located. Method according to claim 1, wherein the number of bits that one of the preset bit combinations has is equal to M. Method according to claim 1, wherein M is 9. Data decoding method, comprising: Receiving encoded image data, wherein the image data comprises multiple sub-image data, each of the sub-image data being configured for input into a row of pixel units of a display panel, and each of the sub-image data comprising multiple data combinations; Converting back the first of the substitute data in at least one of the data combinations into a specific datum using data written into at least one preset bit combination of a row configuration information of the sub-image data, wherein the specific datum has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2;and converting back the (N+1)th of the substitute data in the data combination into the specific data using the Nth of the substitute data in the data combination, wherein the Nth of the substitute data comprises an address and a converted bit value of the (N+1)th of the substitute data, where N is a positive integer. The method of claim 10, wherein the sub-image data T comprises data combinations arranged sequentially, wherein the row configuration information T comprises preset bit combinations arranged sequentially, where T is a positive integer; and wherein the conversion back of the first of the replacement data in at least one of the data combinations into a specific datum using data written into at least one preset bit combination of a row configuration information of the sub-image data comprises: converting back the first of the replacement data in the R-th data combination of the sub-image data into the specific datum using data written into the R-th preset bit combination of the row configuration information of the sub-image data; where R is a positive integer less than or equal to T. Method according to claim 11, wherein the decoding for the R-th data combination of the sub-image data is terminated when a first preset dummy data is read from the R-th preset bit combination of the row configuration information of the sub-image data. Method according to claim 11, wherein the decoding for the R-th data combination of the sub-image data is terminated when a second preset dummy data is read from the R-th preset bit combination of the row configuration information of the sub-image data. Method according to claim 10, wherein the decoding for the data combination is terminated when a third preset dummy data is read from the data combination. The method of claim 10, wherein the data combination comprises multiple data blocks, wherein the address of the substitute data comprises a data block address and an address within the data block, wherein the data block address is an address of a data block in which the substitute data is located in the data combination, and the address within the data block is an address of the substitute data within the data block in which the substitute data is located; and wherein each of the preset bit combinations of the row configuration information comprises a first bit combination, a second bit combination, and a third bit combination arranged sequentially; wherein a data written into the first bit combination of the preset bit combination is the data block address of the first of the substitute data in the encoded data combination;a date written into the second bit combination of the preset bit combination, which is the converted bit value of the first of the replacement data in the coded data combination; and a date written into the third bit combination of the preset bit combination, which is the address within the data block of the first of the replacement data in the coded data combination. An encoding chip comprising computer instructions configured to perform the following steps: capturing image data to be input into a display panel; wherein the image data comprises multiple sub-image data, each sub-image data being configured for input into a row of pixel units of the display panel, and each sub-image data comprising multiple data combinations; capturing an address of a specific data element in each of the data combinations of each sub-image data element, wherein the specific data element has M bits, and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2; writing an address and a bit value of the first of the specific data elements in the data combination to a preset bit combination of several preset bit combinations of a row configuration information of the sub-image data element;and writing an address and a bit value of the (N+1)th of the specific data in the data combination into the bits where the Nth of the specific data in the data combination is located, where N is a positive integer. Chip according to claim 16, wherein the data combination comprises multiple data blocks, wherein the address of the specific data comprises a data block address and an address within the data block, wherein the data block address is an address of a data block in which the specific data is located in the data combination, and the address within the data block is an address of the specific data within the data block in which the specific data is located;and wherein the computer instructions are further configured to perform the following steps: Determine if a date in M ​​bits corresponding to an S-th address in a K-th data block in the data combination is the specific date, where K is a positive integer less than or equal to P and K has an initial value of 1, where P is a positive integer, where S is a positive integer less than or equal to Q and S has an initial value of 1, and where Q is a positive integer; Generate the data block address and the address within the data block of the specific date if the date in the M bits is the specific date; Set S to S+1 and re-execute from the step of determining if a date in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific date;and if S+1 is Q, set K to K+1 and set S to 1, and repeat from the step of determining whether a data point in the M bits corresponding to the S-th address in the K-th data block in the data combination is the specific data point, until K+1 is P. Chip according to claim 16, wherein the data combination comprises multiple data blocks, wherein the address of the specific data comprises a data block address and an address within the data block, wherein the data block address is an address of a data block in which the specific data is located in the data combination, and the address within the data block is an address of the specific data within the data block in which the specific data is located; wherein each of the preset bit combinations comprises a first bit combination, a second bit combination, and a third bit combination arranged sequentially; and wherein the computer instructions are further configured to perform the following steps: writing the data block address of the first of the specific data in the data combination to the first bit combination of the preset bit combination;Writing the bit value of the first of the specific data in the data combination to the second bit combination of the preset bit combination; and writing the address within the data block of the first of the specific data in the data combination to the third bit combination of the preset bit combination. A decoding chip comprising computer instructions configured to perform the following steps: receiving encoded image data, wherein the image data comprises multiple sub-image data, each of the sub-image data being configured for input into a row of pixel units of a display panel, and each of the sub-image data comprising multiple data combinations; converting back the first of the substitute data in at least one of the data combinations into a specific datum using data written into at least one preset bit combination of a row configuration information of the sub-image data, wherein the specific datum has M bits and the bit values ​​of the M bits are all 0 or all 1, where M is an integer greater than or equal to 2;and converting back the (N+1)th of the substitute data in the data combination into the specific data using the Nth of the substitute data in the data combination, wherein the Nth of the substitute data comprises an address and a converted bit value of the (N+1)th of the substitute data, where N is a positive integer. Display device, characterized in that it comprises a display panel, an encoding chip and a decoding chip, wherein the encoding chip is configured to perform the data encoding method according to one of claims 1 to 9 for image data and to output the encoded image data to the decoding chip, wherein the decoding chip is configured to perform the data decoding method according to one of claims 10 to 15 for the encoded image data and to output the decoded image data to the display panel, and wherein the display panel is configured to display an image depending on the decoded image data output by the decoding chip.

Images