METHOD AND DEVICE FOR SYNCHRONIZING DECENTRALIZED CONTROL DEVICES

Description

[0001] The present invention relates to a method and a control system for synchronizing decentralized control devices, each of which generates and outputs control signals clocked according to its own internal control clock, and to a system with such decentralized control devices.

[0002] When operating multiple decentralized control devices or control loops in parallel, it is necessary or at least advisable under certain conditions to synchronize the individual control loops or devices to reduce the negative effects of unsynchronized devices or loops. If decentralized control devices are not synchronized, so that they generate and output their control signals only according to their own control clock, this can lead to increased compensating currents, magnetic coupling, increased power losses, or increased noise emissions, for example, when operating frequency converters.

[0003] Such decentralized control devices are used, for example, in frequency converter systems, which are employed in various industrial applications and can be installed, for instance, in a control cabinet. These frequency converter systems, or other power electronic systems with circuit breakers, filter chokes, filters, braking resistors, or other power electronic components, can operate in power ranges from several hundred kilowatts up to the megawatt range and are used, for example, to control actuators or other systems such as manufacturing and production plants, lifting equipment like hoists or elevators, refinery plants, cement production equipment, or in water treatment.

[0004] Such decentralized control devices are used, for example, in frequency converter systems marketed by the applicant under the product name Liduro LCU.

[0005] From US 2011 / 267854 A1, a method for synchronizing the output AC voltage of a power converter to an external AC voltage is known. In particular, the supply of a load with a mains voltage of a power supply network or the output voltages of a plurality of inverters is disclosed.

[0006] Document WO 02 / 097959 A1 describes the synchronization of several power converters in a dual-ring network, where the power converters are connected in series due to their dual-ring arrangement.

[0007] Publication US 2015 / 076903 A1 (KANAYAMA FUMIAKI [JP] ET AL) March 19, 2015 (2015-03-19) discloses the general terms of the independent claims.

[0008] To avoid the aforementioned negative effects of unsynchronized control devices, a central master controller is typically used to generate the output signals. How Figure 2As shown, output signals from the central main controller can be distributed via lines to various decentralized controllers or output stages. The decentralized output stages or control devices do not generate their own control signals according to their own internal clock, but rather use the signals coming from the central main controller. In effect, the controller outputs of the main controller and the decentralized control devices are therefore identical.

[0009] Such synchronization prevents interference caused by unsynchronized control signals, such as increased compensating currents and power losses, problems due to magnetic coupling, or increased noise emissions. However, it also means that individual control devices and their connected system components can no longer be deliberately controlled with a desired phase shift or operated with their own control clock. Furthermore, increased data traffic on the data bus places greater demands on the computing power of the central main controller, which can simultaneously lead to delays in control speed.

[0010] The present invention therefore aims to provide an improved method and an improved control system of the type mentioned above, avoiding the disadvantages of the prior art and advantageously developing the latter further. In particular, the disadvantages of non-synchronized decentralized control devices, such as increased balancing currents, power losses, and noise emissions, are to be avoided without sacrificing flexibility and reducing reaction time and performance in component control.

[0011] According to the invention, the aforementioned problem is solved by a method according to claim 1 or claim 2, and by a control system according to claim 6 or claim 7. Preferred embodiments of the invention are the subject of the dependent claims.

[0012] It is therefore proposed to retain the decentralized control architecture and the decentralized control signal generation, each with its own control clock, while synchronizing the control clocks of the various control devices. The adjustment and / or shifting of the internal control clocks of the decentralized control devices can be performed by the decentralized control devices themselves. According to the invention, a synchronization clock is provided by one control device to the other control devices. Each of the other control devices receiving the synchronization clock determines a clock difference between the provided synchronization clock and its own internal control clock. Depending on this determined clock difference, the respective internal control clock is accelerated and / or decelerated to align its own internal control clock with the external synchronization clock.

[0013] By providing a synchronization clock and determining the clock difference between their own control clock and the provided synchronization clock, the decentralized control devices can be synchronized with each other. However, each control device can still generate its own control signal and define its clock and / or pulse width. This avoids the aforementioned disadvantages of unsynchronized control devices while simultaneously retaining the advantages of decentralized control signal generation.

[0014] In a further development of the invention, the control devices can accelerate and / or decelerate their own internal control clock in such a way that the measured or determined clock difference to the externally specified synchronization clock is reduced to as close to zero as possible and / or the most complete possible synchronization of the control signals is achieved.

[0015] According to the invention, at least one of the control devices, or a subgroup of the control devices, provides for a deliberate, predetermined shift of its own control clock relative to the externally specified synchronization clock. The respective control devices can thereby delay or accelerate their own internal control clock in the manner described, so that the measured or otherwise determined clock difference to the externally specified synchronization clock assumes a predetermined value.

[0016] In a further development of the invention, the acceleration or deceleration of the internal control clock depending on the specific clock difference can be carried out within a time-limited time window, in particular within a time window immediately after the start of the control devices.

[0017] In a further development of the invention, the adjustment of the control clocks, in particular the aforementioned acceleration and / or deceleration, can also be performed multiple times in recurring cycles or successive time windows, or even continuously, to achieve permanent synchronization of the control outputs. Advantageously, the control devices can continuously or cyclically compare the continuously provided external synchronization clock with their own internal control clock to determine the clock difference continuously or cyclically. If a deviation in the control clock occurs that exceeds a predetermined limit, the respective control device can again decelerate or accelerate the control clock to correct the clock difference or to eliminate the deviation as far as possible.

[0018] The decentralized control devices are interconnected via a synchronization link, which may be a bus system, a fixed wiring connection, or a wireless communication link. The synchronization signal is transmitted to all participating control devices via this link, allowing the receiving control devices to adjust their own control clocks.

[0019] The aforementioned synchronization clock is specified by one of the decentralized control devices itself, which in this case acts as the master control device, while the control devices receiving the synchronization clock provided by the master control device form slave control devices.

[0020] The functionality of the control devices is defined by parameterization. Each parameterized control device assumes the function of a master or slave control device through its corresponding parameterization. This ensures redundancy of the decentralized control devices. If a master control device fails, a slave control device is automatically configured to act as a master control device through failure detection.

[0021] For example, the decentralized control devices can have an implemented detection functionality that detects the failure to receive a central synchronization clock, whereupon one of the decentralized control devices detecting the failure can take over the functionality of the master control device and provide the central synchronization signal.

[0022] Advantageously, the control devices can be provided with a predetermined priority, according to which only one decentralized control loop or only one decentralized control device takes over the functionality of the master and provides the synchronization clock.

[0023] The invention is explained in more detail below with reference to a preferred embodiment and an accompanying drawing. The drawing shows: Fig. 1: a schematic representation of a system with several decentralized control devices with a device for synchronizing the control devices according to an advantageous embodiment of the invention, and Fig. 2: a system of several decentralized control devices which are synchronized by a central main control according to the prior art.

[0024] How Figure 1As shown, the control system 1 comprises several decentralized control devices 2, 3, 4, each of which may include an output stage through which a control and / or regulation signal can be output.

[0025] The control devices 2, 3, 4 mentioned above can each comprise various control modules, in particular power control modules for controlling a frequency converter or another power electronic component. For example, the control devices 2, 3, 4 can include a microcontroller with a program memory in which a control program can be stored, but also various other control modules such as semiconductor devices, inductors, resistors, switching amplifiers, pushbuttons, and current controllers and / or converters.

[0026] The aforementioned control devices 2, 3 and 4 are advantageously designed to be parameterizable, so that by parameterization one of the control devices 2 can be configured as the master control device, which can specify a synchronization clock that is provided to the other control devices 3 and 4.

[0027] How Figure 1 As shown, the control devices 2, 3, and 4 can be connected to each other via a connecting line 5 for synchronization, through which the synchronization clock signal is provided from the master control device 2 to the other control devices 3 and 4. The receiving control devices 3 and 4 can be configured as slave control devices via the aforementioned parameterization, which adjust their own internal control clock to the received synchronization clock.

[0028] The control devices 2, 3 and 4 can each have a clock difference determination device 6, which determines the clock difference between the received synchronization clock and its own internal control clock, which is specified by a control clock device 7.

[0029] In Advantageously, a clock control device 8 is further implemented in the control devices 2, 3 and 4, for example in the form of a software function, by means of which the control clock device 7 can be controlled and the internal control clock specified therein can be accelerated and delayed and / or shifted in order to achieve an adaptation to the externally specified synchronization clock.

[0030] Depending on a specific clock difference, the clock control device 8 controls the control clock device 7 so that it briefly increases or decreases its control clock until the desired adjustment to the received synchronization clock is achieved. Advantageously, this brief increase or decrease of the control clock occurs immediately after the start of the control devices 2, 3, and 4. Afterwards, the synchronization can be monitored and the respective internal control clock can be permanently adjusted, thus ensuring continuous synchronization or adjustment of the controllers or control outputs.

[0031] Depending on the control task, a slave control device or several slave control devices 3, 4 can deliberately shift their own internal control clock relative to the predetermined synchronization clock. InSimilarly, the clock difference determination device 6 can measure or determine the clock difference to the received synchronization clock, whereupon the clock control device 8 can accelerate or delay the control clock of the control clock device 7 until the desired clock shift is achieved.

Claims

1. Method for synchronising control devices (2, 3, 4), by which clocked control signals are generated and output, in each case following an individual, internal control clock pulse, wherein the control devices (2, 3, 4) are interconnected by a connection line (5) for transmitting a synchronisation clock pulse signal, wherein selectively one of the control devices (2) is determined, by parameterisation, as a master control device, which provides the synchronisation clock pulse to the other control devices (3, 4), wherein the other control devices (3, 4) are determined, by parameterisation, as slave control devices, wherein if the synchronisation clock pulse is absent one of the control devices previously functioning as a slave control device is determined as the master control device, which specifies the synchronisation clock pulse, wherein the other control devices (3, 4), determined by parameterisation as a slave control device, which receive the mentioned synchronisation clock pulse, determine a clock pulse difference between the provided synchronisation clock pulse and the individual, internal control clock pulse and accelerate and / or slow the individual, internal control clock pulse depending on the determined clock pulse difference, as a result of which the mentioned individual, internal control clock pulse is adjusted to the provided synchronisation clock pulse, characterised in that the respective individual, internal control clock pulse of at least one of the control devices (3, 4) determined by parameterisation as a slave control device is furthermore accelerated and / or slowed by a clock pulse control device (8) implemented in the mentioned at least one control device (3, 4) in such a way that the determined clock pulse difference from the received synchronisation clock pulse assumes an intentional predetermined value that is different from zero.

2. Method for synchronising control devices (2, 3, 4), by which clocked control signals are generated and output, in each case following an individual, internal control clock pulse, wherein the control devices (2, 3, 4) are interconnected by a connection line (5) for transmitting a synchronisation clock pulse signal, wherein selectively one of the control devices (2) is determined, by parameterisation, as a master control device, which provides the synchronisation clock pulse to the other control devices (3, 4), wherein the other control devices (3, 4) are determined, by parameterisation, as slave control devices, wherein if the synchronisation clock pulse is absent one of the control devices previously functioning as a slave control device is determined as the master control device, which specifies the synchronisation clock pulse, wherein the other control devices (3, 4), determined by parameterisation as a slave control device, which receive the mentioned synchronisation clock pulse, determine a clock pulse difference between the provided synchronisation clock pulse and the individual, internal control clock pulse and accelerate and / or slow the individual, internal control clock pulse depending on the determined clock pulse difference, as a result of which the mentioned individual, internal control clock pulse is adjusted to the provided synchronisation clock pulse, characterised in that the respective individual, internal control clock pulse of at least one of the control devices (3, 4) determined by parameterisation as a slave control device is furthermore accelerated and / or slowed by a clock pulse control device (8) implemented in the mentioned at least one control device (3, 4) in such a way that the individual, internal control clock pulse of the mentioned at least one control device (3, 4) assumes an intentional predetermined shift with respect to the received synchronisation clock pulse.

3. Method according to either of the two preceding claims, wherein the respective individual, internal control clock pulse of at least one control device (3, 4) is accelerated and / or slowed by a clock pulse control device (8) implemented in the mentioned control device (3, 4) in such a way that the determined clock pulse difference from the received synchronisation clock pulse approaches zero.

4. Method according to any of the preceding claims, wherein the determination of the clock pulse difference and the mentioned acceleration and / or slowing of the control clock pulse takes place in at least one time window immediately after starting the control devices (2, 3, 4).

5. Method according to any of the preceding claims, wherein the mentioned determination of the clock pulse difference and the mentioned acceleration and / or slowing of the individual, internal control clock pulse is performed multiple times, cyclically or continuously, by the control devices (3, 4).

6. Control system comprising a plurality of control devices (2, 3, 4) which each generate and output clocked control signals following an individual, internal control clock pulse, wherein the control devices (2, 3, 4) are configured to be parameterisable and are interconnected by a connection line (5), wherein one of the control devices (2) is configured, by parameterisation, to function as a master control device and to provide a synchronisation clock pulse to the other control devices (3, 4), wherein the other control devices (3, 4) are configured, by parameterisation, to function as slave control devices, wherein if the synchronisation clock pulse is absent one of the control devices previously functioning as a slave control device is configured to function as the master control device and to provide the synchronisation clock pulse, wherein a clock pulse difference determination means (6) for determining a clock pulse difference between the received synchronisation clock pulse and the individual, internal control clock pulse, and a clock pulse control device (8) for accelerating and / or slowing the individual, internal control clock pulse depending on the determined clock pulse difference and adjusting the individual, internal control clock pulse to the received synchronisation clock pulse are provided at least on the other control devices (3, 4) that receive the synchronisation clock pulse, characterised in that the clock pulse control device (8) of at least one control device (3, 4) configured, by parameterisation, as a slave control device is configured for accelerating and / or slowing the individual, internal control clock pulse of the control device (3, 4) in such a way that the determined clock pulse difference assumes an intentional predetermined value different from 0.

7. Control system comprising a plurality of control devices (2, 3, 4) which each generate and output clocked control signals following an individual, internal control clock pulse, wherein the control devices (2, 3, 4) are configured to be parameterisable and are interconnected by a connection line (5), wherein one of the control devices (2) is configured, by parameterisation, to function as a master control device and to provide a synchronisation clock pulse to the other control devices (3, 4), wherein the other control devices (3, 4) are configured, by parameterisation, to function as slave control devices, wherein if the synchronisation clock pulse is absent one of the control devices previously functioning as a slave control device is configured to function as the master control device and to provide the synchronisation clock pulse, wherein a clock pulse difference determination means (6) for determining a clock pulse difference between the received synchronisation clock pulse and the individual, internal control clock pulse, and a clock pulse control device (8) for accelerating and / or slowing the individual, internal control clock pulse depending on the determined clock pulse difference and adjusting the individual, internal control clock pulse to the received synchronisation clock pulse are provided at least on the other control devices (3, 4) that receive the synchronisation clock pulse, characterised in that the clock pulse control device (8) of at least one control device (3, 4) configured, by parameterisation, as a slave control device is configured for accelerating and / or slowing the individual, internal control clock pulse of the control device (3, 4) in such a way that the individual, internal control clock pulse of the mentioned at least one control device (3, 4) assumes an intentional predetermined shift with respect to the received synchronisation clock pulse.

8. Control system comprising a plurality of control devices according to either of the two preceding claims, wherein the control devices (2, 3, 4) comprise a determination means for determining the absence of the synchronisation clock pulse signal, and a reconfiguration module for reconfiguring a slave control device into the master control device in the absence of the synchronisation clock pulse signal.

9. Control system comprising a plurality of control devices according to any of claims 6 to 8, wherein the clock pulse control device (8) of at least one control device (3, 4) is configured to accelerate and / or slow the individual, internal control clock pulse of the control device (3, 4) such that the determined clock pulse difference becomes zero or approaches zero.

10. Control system comprising a plurality of control devices according to any of claims 6 to 9, wherein the clock pulse difference determination means (6) and the clock pulse control device (8) of at least one control device (3, 4) are configured to perform the determination of the clock pulse difference from the synchronisation clock pulse and the acceleration and / or slowing of the individual, internal control clock pulse in at least one time window immediately after starting the control device (3, 4), preferably cyclically multiple times or continuously.