Configurable-performance resistive memory and associated methods

Abstract

The invention provides a resistive memory comprising: - a layer comprising a titanium-based material (11); - a second layer comprising a first phase-change material (12); and - a first electrode (13) and a second electrode (14) which are separated by the first and second layers (11, 12), the first layer (11) being in contact with the first electrode (13). The invention also relates to a method for initialising a resistive memory, the method comprising a step of using an electric current to fuse a portion of the titanium-based material and a portion of the first phase-change material of each second layer so as to form a second phase-change material (20) comprising titanium.

Description

DESCRIPTION TITLE: CONFIGURABLE PERFORMANCE RESISTIVE MEMORY AND ASSOCIATED PROCESSES TECHNICAL FIELD OF THE INVENTION

[0001] The technical field of the invention is that of resistive memories and more particularly of phase change memories, known as PCRAM for "Phase Change Random Access Memory" in English. TECHNOLOGICAL BACKGROUND OF THE INVENTION

[0002] Resistive memories can offer long-term storage while minimizing energy consumption. This is because these memories are non-volatile; information is encoded as a resistance value within the memory, and electrical energy is only required when reading information (i.e., measuring the resistance value) or when writing information to the resistive memory (also called switching). Resistive memories are therefore well-suited for storing persistent information in a device or integrated circuit. They are often implemented, for example, at the level of a functional block within a device or integrated circuit, also known as the "back end of line," to store information over long periods (such as calculation instructions or results).

[0003] Recent developments in resistive memory include reducing the switching current amplitude, thereby improving the switching speed of resistive memories. The article [“Thermal Barrier Phase Change Memory” J. Shen et al., ACS Appl. Mater. Interfaces, Jan. 2019, 11, 5, 5336-5343] discloses, for example, a resistive memory with a reduced switching time. The disclosed resistive memory comprises a plurality of layers of phase-change material, specifically Sb2Te3, separated by semi-metallic layers, specifically TiTe2. This Sb2Te3 / TiTe2 bilayer arrangement results in a switching current reduced by approximately 85%, thus offering a switching time reduced to approximately 10 ns.

[0004] This type of memory can therefore be considered as random access memory and can be implemented in a logical functional block of a device or integrated circuit, also called "front end of line" in English.

[0005] While an Sb2Te3 / TiTe2 resistive memory can offer a reduced switching time, thanks to the reduction of the switching current, it presents on the other hand a degradation of the permanence of the information storage (also called retention permanence), which means that it can no longer be considered for long-term storage at the business block level.

[0006] Therefore, when manufacturing a device or integrated circuit, it is necessary to create different types of resistive memories to achieve either long-term storage or high switching speeds. The manufacturing process is thus more complex because it requires the deposition of different materials and therefore additional masking and unmasking steps depending on the materials deposited and the target material.

[0007] Therefore, there is a need to provide resistive memory whose performance can be adjusted. SUMMARY OF THE INVENTION

[0008] The invention solves, at least partially, the problems mentioned above, by proposing a method for initializing a resistive memory in order to modify its performance and more particularly its switching speed or its retention level.

[0009] To this end, the invention relates to a method for initializing an uninitialized resistive memory, said uninitialized resistive memory comprising: at least one first layer, comprising a titanium-based material, said titanium-based material being conductive; at least one second layer, extending over said at least one first layer, comprising a first phase-change material, said first phase-change material being suitable for being doped with titanium; the method comprising a step of circulating an electric current, said initialization current, in each of the first and second layers, the initialization current being sized to generate a temperature gradient within each first and second layer involving the melting of at least a portion of the titanium-based material of each first layer throughout its thickness and of at least a portion of the first phase-change material of each second layer layer, said fusion resulting in the formation, from the first phase-change material and the titanium-based material, of a second phase-change material comprising titanium.

[0010] By initialization current sized to perform a certain function (in particular the generation of the thermal gradient), we mean that the initialization current is adapted to perform this function.

[0011] Resistive memory is understood to mean a memory that can have at least two states, the current state of the memory being read by measuring its resistance.

[0012] A titanium-based material is defined as a material in which titanium is one of the constituents. This includes, for example, a titanium alloy, such as TiTe.

[0013] A conductive material is defined as an electrical conductor and, advantageously, a thermal conductor. For example, the electrical resistivity of titanium-based materials is less than 1000 pQ cm⁻¹, or even less than or equal to 700 pQ cm⁻¹. Resistivity is preferably measured at a temperature below 700 °C, or even less than or equal to 400 °C.

[0014] A phase-change material is defined as a material capable of switching, under the influence of a parameter such as an electric current, from a first state to a second state or from the second state to the first state. The first state has a resistivity, and the second state has a second resistivity, different from the first. The first state corresponds, for example, to a first phase of the material, and the second state corresponds, for example, to a second phase of the material. The first phase may be a crystalline phase, and the second phase may be an amorphous phase.

[0015] By "suitable for titanium doping," we mean that titanium can interact electronically with the first phase-change material and modify at least one switching property of said first phase-change material. For example, a phase-change material doped with titanium will have its phase-change temperature lowered.

[0016] By circulation of an electric current, we mean the passage of an electric current through each of the first and second layers.

[0017] Generating a temperature gradient means locally modifying the temperature of said layers by adding a quantity of heat dissipated by the Joule effect.

[0018] By melting at least part of a titanium-based material of a first layer over its entire thickness, it is understood that at least a portion of said titanium-based material passes into a molten state, said portion reaching two faces of said first layer, said two faces being opposite each other.

[0019] Formation of a second phase-change material means the mixing of molten materials, in this case the titanium-based material and the first phase-change material, and the combination of the first molten phase-change material with titanium from said molten titanium-based material.

[0020] Uninitialized resistive memory allows information to be stored in the first phase-change material of each second layer. The flow of the initialization current through the resistive memory forms an "active" region within the memory, comprising the second phase-change material. This second phase-change material consists of the first phase-change material doped with titanium from the titanium-based material. The active region can store information, but it exhibits a higher switching speed than the first phase-change material. The switching speed depends on the concentration of titanium doping the first phase-change material, which in turn depends on the volume of the active region, which itself depends on the current flowing through the two layers.Thus, the flow of a predetermined electrical current in the resistive memory allows the performance of said memory to be configured.

[0021] In addition to the characteristics mentioned in the preceding paragraph, the initialization process according to the invention may have one or more additional characteristics from among the following, considered individually or in all technically possible combinations: the second phase-change material has a concentration of titanium, from the titanium-based material, the initialization current being chosen to control said concentration; said process includes a step of determining a minimum initialization current associated with a maximum concentration of titanium in the second phase-change material, said maximum concentration of titanium in the second phase-change material being strictly less than the concentration of titanium in the pure titanium-based material, the initialization current used during the circulation step being greater than or equal to the minimum initialization current; the minimum initialization current is greater than or equal to a read current and a switching current of the initialized resistive memory;said process includes a step of determining a maximum initialization current, the maximum initialization current being associated with a minimum concentration of titanium in the second phase-change material, said minimum concentration of titanium in the second phase-change material being less than or equal to 1 / 100, the initialization current used during the circulation step being less than or equal to the maximum initialization current;the uninitialized resistive memory has at least one intermediate active region, each intermediate active region being disposed between a first layer and a second layer, each intermediate active region comprising at least one third phase-change material comprising titanium, the initialization current also flowing in each of the intermediate active regions, the initialization current being sized to also generate a temperature gradient within each intermediate active region also involving the melting of at least a part of the third phase-change material in each intermediate active region, said melting resulting in the formation, from the first phase-change material and the titanium-based material and the third material; phase change, of a second phase change material comprising titanium; said process includes a step of solidifying the second phase change material so as to form at least one solid region, called the "active region", comprising at least a part of the second phase change material; the titanium-based material comprises a first element, called the "carrier element", neutral with respect to the switching properties of the first phase change material, the carrier element being preferably germanium, antimony or tellurium; the titanium-based material comprises impurities, introduced intentionally or unintentionally, which can influence the electronic properties of the first phase change material, said impurities being advantageously carbon or nitrogen;the titanium-based material is chosen such that melting at least part of each first layer also dissociates at least part of the constituents of said titanium-based material; by dissociate, it is understood that the chemical bond of part of the constituents of said material can be broken; the dissociation of the constituents of said titanium-based material can also be obtained by heating said material with an electrical pulse having preferably an intensity of less than 100 mA, or even less than 10 mA and even more preferably less than or equal to 5 mA; the electrical pulse having preferably a duration of less than 10 ps, ​​or even less than 1 ps and even more preferably less than 500 ns; the titanium-based material has a resistivity of less than 1000 pQ cm and preferably less than or equal to 700 pQ cm;the first phase-change material comprises a titanium concentration lower than the titanium concentration of the pure titanium-based material, the first phase-change material comprising a titanium concentration preferably of zero; the titanium-based material comprises a titanium concentration such that heat treatment of said material at a temperature less than or equal to 400 °C alters its resistivity by less than 70%, or even less than 40%, the titanium concentration being preferably between 25% and 65%, or even between 40% and 50%, for example equal to 45%; the first phase-change material is an alloy, preferably stoichiometric; by stoichiometric alloy is understood that the stoichiometric coefficients of each constituent of said alloy are natural numbers; a stoichiometric alloy is also thermodynamically stable and does not give rise to phase separation, for example during a manufacturing step or a programming step; the first phase-change material is a binary alloy or a ternary alloy comprising germanium, antimony, tellurium, gallium or selenium;said first phase-change material may also include traces, introduced intentionally or unintentionally, of nitrogen, carbon, boron, oxygen, or silicon; the first and second layers each have a melting point within ]400 °C; 1000 °C] and preferably within [450 °C; 700 °C]; in other words, the titanium-based material and the first phase-change material each have a melting point within ]400 °C; 1000 °C[ and preferably within [450 °C; 700 °C]; the thickness of each second layer is greater than the thickness of each first layer and preferably greater than four times, or even twenty times, the thickness of each first layer, the thickness of each first layer being preferably between 0.5 nm and 20 nm and the thickness of each second layer being preferably between 10 nm and 200 nm;the uninitialized resistive memory comprises a first electrode and a second electrode, the first electrode being in contact with a; first layer, the second electrode extending over a second layer, the first electrode having a width less than one width of each first layer, the second electrode having a width greater than the width of the first electrode; by in contact, it is understood that there is no intermediate element between the first electrode and the first layer in contact; the uninitialized resistive memory comprises a first electrode, a second electrode, two second layers and a first layer, each of the second layers extending over one of the faces of the first layer, the first electrode being in contact with one of the two second layers, the second electrode being in contact with another of the two second layers, the first and second electrodes each having a width greater than or equal to the width of the first layer; the resistive memory comprises an alternation of first and second layers.

[0022] The invention also relates to an initialized memory obtained after implementation of the initialization process according to the invention, said initialized resistive memory comprising: at least a first layer, comprising a titanium-based material; at least a second layer, extending over said at least a first layer, comprising a first phase-change material; and at least an active region, each active region being disposed between a first layer and a second layer, each active region comprising a second phase-change material comprising titanium.

[0023] The titanium concentration of the second phase-change material is advantageously higher than the titanium concentration of the first phase-change material and advantageously lower than the titanium concentration of the titanium-based material.

[0024] The invention finally relates to a method of storing a message in a set of uninitialized resistive memories, each uninitialized resistive memory comprising: a first layer, comprising a titanium-based material, said titanium-based material being conductive; a second layer, extending over the first layer and comprising a first phase-change material, said first phase-change material being capable of being doped with titanium;the set of uninitialized resistive memories comprising a first subset of uninitialized resistive memories and a second subset of uninitialized resistive memories, distinct from the first subset of uninitialized resistive memories, the storage method comprising a step of initializing each resistive memory of the first subset of uninitialized resistive memories by implementing the initialization method according to the invention, the stored message being formed by the uninitialized resistive memories or by the initialized resistive memories.

[0025] This process results in initialized memories, which are programmed using a "high" current, and uninitialized memories. The initialized memories are then programmed into the desired state ("SET" or "RESET") with a write (or "programming") current lower than the initialization current. The uninitialized memories are unaffected by the programming current; they remain in their "uninitialized" state.

[0026] Advantageously, the storage method includes a programming step for each uninitialized memory in the second subset and each initialized memory in the first subset. Thus, the memories, whether initialized or not, store a dummy message. This makes it more difficult to determine the true message stored in all the memories.

[0027] The invention and its various applications will be better understood by reading the following description and examining the accompanying figures. BRIEF DESCRIPTION OF THE FIGURES

[0028] The figures are shown for illustrative purposes only and are not intended to limit the invention. Unless otherwise specified, the same element appearing in different figures has a unique reference numeral.

[0029] [Fig. 1 ], [Fig. 2], [Fig. 3], [Fig. 4] schematically represent the first, second, third and fourth embodiments of an uninitialized resistive memory according to the invention.

[0030] [Fig. 5] represents a measurement of the resistivity of four layers of titanium alloy exhibiting different stoichiometries.

[0031] [Fig. 6] represents a cumulative state distribution of a set of uninitialized resistive memories according to the invention as a function of resistance.

[0032] [Fig. 7] represents the variation of resistivity as a function of temperature of three layers of titanium alloy exhibiting different stoichiometries.

[0033] [Fig. 8] and [Fig. 9] schematically represent a first and a second embodiment of an initialized resistive memory obtained at the end of an implementation of an initialization process according to the invention.

[0034] [Fig. 10] schematically represents a dilution rate of a titanium-based material in an active region of a resistive memory obtained at the end of an initialization process according to the invention, as a function of a dimension of this active region.

[0035] [Fig. 11] schematically represents a method of implementing an initialization process according to the invention.

[0036] [Fig. 12] schematically represents a step in the initialization process according to the invention.

[0037] [Fig. 13] schematically represents a measurement of the resistance of a resistive memory according to the invention during the implementation of the initialization process and after its implementation.

[0038] [Fig. 14], [Fig. 15], [Fig. 16] schematically represent a measurement of the resistance of two resistive memories according to the invention as a function of an applied current and a duration of application of a current.

[0039] [Fig. 17] schematically represents a method of implementing a storage process according to the invention. DETAILED DESCRIPTION

[0040] The invention aims to provide a resistive memory whose performance, and more particularly the write speed or retention level, is configured (which will also be called initialized).

[0041] The invention relates in particular to a method for initializing a so-called "uninitialized" memory. Figures [Fig. 1], [Fig. 2], [Fig. 3], and [Fig. 4] schematically represent, in cross-sectional view, an uninitialized resistive memory 1 (also called memory) implemented by the method of the invention. The uninitialized resistive memory comprises at least a first layer 11 and at least a second layer 12. In these embodiments, the memory 1 also comprises a first electrode 13 and a second electrode 14, said first and second electrodes 13, 14 being separated by each first and second layer 11, 12.

[0042] In [Fig. 1] and [Fig. 2], the first layer is arranged on the first electrode 13. The second electrode is arranged on the second layer 12. The second layer 12 extends over the first layer 11.

[0043] In [Fig.3], memory 1 comprises an alternation of first and second layers 11, 12. One of the first layers 11 is disposed on the first electrode 13. The second electrode is disposed on one of the second layers 12. In this alternation, each second layer 12 extends over one of the first layers 11.

[0044] In [Fig. 4], the memory 1 comprises two second layers 12 and a first layer 11. Each second layer 12 extends over one face of the first layer 11. A second layer 12 extends over the lower electrode 13, in contact with it. The first layer 11 then extends over the second layer 12, which is in contact with the electrode 13.

[0045] Common to the embodiments of [Fig. 1], [Fig. 2], [Fig. 3], and [Fig. 4], each first layer 11 comprises a titanium-based material. The titanium-based material is electrically conductive. For example, it has a resistivity of less than 1000 pQ cm⁻¹ and advantageously less than or equal to 700 pQ cm. The low resistivity of the titanium-based material improves the gradualness of memory 1 initialization (i.e., the configuration of its performance, as described below) and therefore its control. Conversely, an insulating alloy makes controlling memory 1 initialization difficult. Indeed, an insulating alloy requires a potentially high breakdown voltage, which can degrade memory 1 during its initialization. It is therefore preferable to avoid them.

[0046] Common to the embodiments of [Fig. 1], [Fig. 2], [Fig. 3], and [Fig. 4], each second layer 12 comprises a first phase-change material. A phase-change material is defined as a material that can exhibit either an amorphous or a crystalline phase depending on its thermal history. These are preferably solid phases that are stable over a temperature range that can extend around room temperature. Phase-change materials considered in an information storage context are those exhibiting a measurable difference in resistivity between the amorphous and crystalline phases. For example, the resistivity difference between the two phases is 300% or more. An amorphous phase generally has a higher resistivity than a crystalline phase.Thus, encoding information in the resistance of the first phase-change material of each second layer 12 amounts to modifying the phase in which the latter is located.

[0047] The resistivity difference between the crystalline and amorphous phases is chosen so that it is easily measurable, allowing the determination of the information stored in the uninitialized memory. In binary representation, a high state, for example, is a state of low resistance (and therefore high conductance) of the first material undergoing a phase change, corresponding, for example, to a crystalline phase of said first material. A low state, for example, is a state of high resistance (and therefore low conductance) of the first material undergoing a phase change, corresponding, for example, to an amorphous phase of said first material.

[0048] The phase change, and therefore the change in resistivity, in a second layer 12 can be induced by the flow of an electric current pulse that locally heats the first phase-change material. Depending on the amplitude and shape of the electric current pulse, the first phase-change material of said second layer 12 either: either quenching in the amorphous phase; or crystallization in the crystalline phase.

[0049] By pulse shape, we mean the variation in current amplitude over time. For example, a so-called "rectangular" pulse may have a rise in current to a maximum amplitude for a first duration, this maximum amplitude maintained for a second duration, and a fall to zero current for a third duration.

[0050] The maximum current amplitude heats the first phase-change material to a temperature that allows the phase change to occur. The holding time and the drop time, for example, impact the cooling rate of the phase-change material and can therefore induce quenching or crystallization of the first phase-change material. Long holding and drop times, for instance, allow crystallization of the first phase-change material, while short holding and drop times allow quenching of the first phase-change material.

[0051] The term "crystallization rate" refers to the inverse of the time required for the crystallization of the first phase-change material. The term "quenching rate" refers to the inverse of the time required for the quenching of the first phase-change material.

[0052] The term "transition temperature" refers to the temperature required to crystallize or quench the first phase-change material of the second layer. This transition temperature differs from the "melting temperature," at which the initially solid first phase-change material melts. A specific electric current must be applied to heat the first phase-change material, thus enabling its subsequent crystallization or quenching. Furthermore, a higher electric current results in a greater quantity of the first phase-change material that can undergo crystallization or quenching.

[0053] The crystallization rate of resistive memory is limited by the current required to reach the transition temperature. It can The tempering speed of resistive memory can also be limited by the physical process of crystallization itself. The tempering speed of resistive memory is also limited in the same way.

[0054] The initialization process modifies the crystallization and quenching rates of the uninitialized memory 1 by adding titanium to the first phase-change material. For this to work, the first phase-change material must be suitable for doping with titanium. Indeed, certain additional elements such as titanium, which we will call dopants, when combined with certain phase-change materials, modify the transition temperature and the crystallization and / or quenching rates of these materials. The transition temperature then tends to decrease while the crystallization and / or quenching rates tend to increase.The combination of titanium with the first phase-change material (following memory initialization) therefore makes it possible to reduce the current to be applied to achieve the crystallization or quenching of said material, thus increasing the speed of writing information into the resistive memory.

[0055] While adding titanium to the first material increases crystallization and quenching speeds, it reduces the level of memory retention.

[0056] In the uninitialized resistive memory 1, the first phase-change material is titanium-free and exhibits a high retention level. When the resistive memory 1 is initialized (principles and processes described with reference to [Fig. 8] to [Fig. 15]), the first material contains titanium and exhibits a high crystallization and / or quenching rate. Each first layer 11 of the memory 1 then acts as a titanium reservoir, allowing the performance (retention level or operating speed) of the resistive memory 1 to be modified. It is advantageous for the first phase-change material to be chosen for its suitability for titanium doping.

[0057] Finally, to improve the doping effect, it is advantageous for the titanium-based material and the initial phase-change material to exhibit good miscibility once melted. In this way, the phase-change material resulting from the mixture of these two materials then displays good structural and electronic homogeneity.

[0058] Figure 1 schematically represents, in cross-section, a first embodiment of the uninitialized resistive memory 1. In this embodiment, the memory 1 comprises only a first layer 11 and a second layer 12. The first and second electrodes 13 and 14 are separated by the first layer 11 and the second layer 12. The first layer 11 is in contact with the first electrode 13 and is electrically connected to it. The second layer 12 is in contact with the first layer 11 and is electrically connected to it. The second electrode 14 is in contact with the second layer 12 and is electrically connected to it. The first and second electrodes 13, 14 and the first and second layers 11, 12 are therefore electrically connected in series so that an electric current can flow between the two electrodes 13, 14 and through the first and second layers 11, 12.

[0059] The first layer 11 extends, for example, over an insulating substrate S, comprising, for example, a dielectric material. The plane of the layers P then corresponds to the surface of the insulating substrate S. The first layer 11 has a thickness A that can be between 0.5 nm and 20 nm. The thickness A of the first layer is measured perpendicular to the plane of the layers P. The second layer 12 extends over the first layer 11, that is, parallel to the plane of the layers P. The second layer 12 has a thickness B, measured perpendicular to the plane of the layers P. It can be between 10 nm and 200 nm. The thickness B of the second layer 12 is advantageously greater than the thickness A of the first layer 11 and preferably greater than four times, or even twenty times, the thickness A of the first layer 11.

[0060] It is advisable to ensure that the thickness B of the second layer is sufficient to guarantee adequate thermal insulation at the second electrode 14. Good insulation reduces the current required to program memory 1. A second layer thickness B of approximately 50 nm provides sufficient insulation. However, it is preferable to avoid excessive thickness B, as this can hinder the integration of memory 1.

[0061] In the embodiment of [Fig. 1], the first electrode 13, also called the "lower" electrode, is oriented perpendicularly to the plane of the P layers. It passes, for example, through the substrate S, in the same way as a via conductor, to open onto the surface of said substrate S. It can also be disposed in a trench made in the substrate S and disposed under the first layer 11. The first layer 11 then extends into contact with substrate S and the first electrode 13. The first layer 11 is thus electrically connected to the first electrode 13.

[0062] The first layer 11 can have a width N between 50 nm and 300 nm. It can also have a depth (not shown in [Fig. 1] to [Fig. 4] because it is perpendicular to the cutting planes) also between 50 nm and 300 nm.

[0063] The lower electrode 13 has a width L, measured parallel to the plane of the P layers. The width L of the lower electrode 13 is advantageously less than the width N (or depth) of the first layer 11. In this way, the first electrode 13 can be in contact with a central portion 111 of the first layer 11. By central portion 111, we mean a portion of the first layer 11 located away from the flank 112 of said first layer 11. The contact of the first electrode 13 at a central portion 111 of the first layer 11 facilitates the initialization of memory 1, as described below. The width L of the lower electrode 13 is, for example, between 1 nm and 50 nm.

[0064] The lower electrode 13 can also have a depth (also not shown on [Fig. 1] to [Fig. 4] because it is perpendicular to the cutting planes) advantageously between 50 nm and 300 nm.

[0065] According to a preferred implementation, the first layer has a width x depth of 300 x 300 nm. The lower electrode 13 then has a width x depth of 5 x 50 nm.

[0066] The second electrode 14, which can also be called the "upper" electrode, extends directly into contact with the second layer 12, parallel to the plane of the P layers. The second electrode 14 has a width M, substantially equal to the width N of the first layer 11. It can also have a depth substantially equal to the depth of the first layer 11. The second electrode 14 is therefore wider than the lower electrode 13.

[0067] By substantially equal, we mean equal to within 20%, or even more advantageously to within 10%. The advantage of substantially equal dimensions is to simplify manufacturing steps (such as the delimitation of memory 1).

[0068] The fabrication of a memory 1 according to the embodiment shown in [Fig. 1] can be carried out by successively forming, from the substrate S and the lower electrode 13 (which is already integrated into the substrate S), the first layer 11, the second layer 12, and the upper electrode 14. The thickness of the upper electrode 14 is advantageously between 10 nm and 100 nm. The memory 1 is then delimited by means of an etching. The memory 1 can have, viewed from above, a circular or rectangular shape. The delimitation of the memory 1 is advantageously carried out so as to place the central portion 111 of the first layer 11 directly above the lower electrode 13.

[0069] The first and second layers 11, 12 can be produced by physical vapor deposition (PVD) and / or chemical vapor deposition (CVD) and / or atomic layer deposition (ALD). The lower and upper electrodes 13, 14 can also be formed by PVD or CVD, for example, from TiN.

[0070] Figure 2 schematically represents, in cross-section, a second embodiment of memory 1. Unlike the embodiment of Figure 1, the lower electrode 13 does not pass through the insulating substrate S but extends across it and is therefore parallel to the plane of the layers P. The first layer 11 then extends along its entire length in contact with the lower electrode 13. The width L of the first electrode 13 is equal to that of the first layer 11 and the upper electrode 14. The depths of the lower electrode 13 and the first layer 11 are therefore approximately equal. Consequently, a central portion of the first layer 11 is no longer visible in this embodiment.

[0071] The fabrication of a memory 1 according to the embodiment of [Fig. 2] differs from the fabrication previously described in that the lower electrode 13 is deposited before the first layer 11, for example directly onto the substrate S. The delimitation of the memory 1 also differs in that it can delimit within a at the same time the entirety of memory 1, including in particular the delimitation of the lower electrode 13.

[0072] Figure 3 schematically represents, in cross-section, a third embodiment of memory 1. Unlike the embodiment in Figure 1, memory 1 comprises an alternation of first and second layers. 11, 12. Each first layer 11 comprises the titanium-based material. Each second layer 12 comprises the first phase-change material. The first layers 11 advantageously have the same thickness A to within 20%, or even within 10%. Similarly, the second layers 12 also advantageously have the same thickness B to within 20%, or even within 10%.

[0073] The alternating first and second layers 11, 12 form an integer n of bilayers. The alternation is therefore of the type [M1 / M2]xn, where M1 represents each first layer and M2 represents each second layer. The alternation of the first and second layers 11, 12 extends between the lower electrode 13 and the upper electrode 14. A first layer 11 extends over the lower electrode 13, in contact with it. The upper electrode 14 extends over a second layer 12 of the [M1 / M2]xn alternation. In this way, the alternation electrically connects the lower electrode 13 to the upper electrode 14.

[0074] Figure 4 schematically represents, in cross-section, a fourth embodiment of the uninitialized resistive memory 1. Unlike the embodiment in Figure 2, memory 1 comprises two second layers. 12. One of the second layers 13 extends, for example, over the lower electrode 13, in contact with it. The first layer 11 then extends over this second layer 12. The two second layers 12 have substantially the same thickness B (measured perpendicular to the plane of the layers). In this embodiment, the first layer 11 is no longer in direct contact with the lower electrode 13 but is electrically connected to it via one of the second layers 12. The second layers 12 advantageously comprise the same first phase-change material.

[0075] In this embodiment, the lower and upper electrodes 13, 14 each have a width L, M equal to the width N of the first layer. In a development of this embodiment, the lower and upper electrodes 13, 14 have a width L, M greater than or equal to the width N of the first layer. The same is true for the depths of the lower and upper electrodes 13, 14 and of the first layer 11. The two second layers 12 also have the same width N and depths as the first layer 11.

[0076] Common to the embodiments of [Fig. 1], [Fig. 2], [Fig. 3], and [Fig. 4], the first phase-change material can comprise a binary or ternary alloy. Each element of said alloy then preferentially belongs to one of the element groups IIIB, IVB, VB, or VIB of the periodic table. These groups include, for example, the elements Ga, Ge, Sb, Te, and Se. The first phase-change material can therefore be GeSbTe, GeSb, GeTe, or SbTe. Each element of said binary or ternary alloy is preferentially a metalloid, comprising, for example, Ge, Sb, and Te. It is also preferentially a so-called "stoichiometric" alloy in that the stoichiometric coefficients of each constituent (for example, Ge, Sb, and Te) are natural numbers.

[0077] In a preferred embodiment, the first phase-change material is a chalcogenide, and in particular a Ge-type ternary alloy x Sb y You z (where x, y, and z are stoichiometric coefficients). The first chalcogenide material can exhibit a stoichiometry {x, y, z} = {2, 2, 5} and thus forms Ge2Sb2Tes. This particular alloy is known as "GST225". Other Ge-type alloys x Sb y You z can be implemented, such as GeTe, Sb2Tes, GeiSb2Te4 (called "GST124") or GeiSb4Te? (called "GST147").

[0078] The first phase-change material of the second layer 12 may also include traces, intentional or unintentional, of an element that influences the electronic behavior of the first phase-change material. These are, for example, traces of carbon or nitrogen.

[0079] Common to the embodiments of [Fig. 1], [Fig. 2], [Fig. 3], and [Fig. 4], each first layer 11 comprises a titanium-based material. Each first layer 11 thus acts as a titanium reservoir that can be mixed with the first phase-change material of each second layer 12. Mixing the titanium from the first layer with a portion of the first phase-change material thus forms a second material. phase change, exhibiting a higher switching speed than the first phase change material.

[0080] The titanium-based material may include a first element complementary to titanium, called the "carrier element." The carrier element is preferably neutral with respect to the electronic properties of the first phase-change material. It may be one of the elements of the first phase-change material, for example, belonging to one of the element groups IIIB, IVB, VB, or VIB of the periodic table. For example, the titanium-based material may be TiTe, TiGe, or TiSb. When the first phase-change material is a ternary alloy of the "GST" type, the element may be tellurium Te, in which case the titanium-based material is the Ti alloy P You q(where p and q are the mixing coefficients of the elements in atomic percentages). This titanium-based material may also include one or more other carrier elements. For example, when the first phase-change material is a GST, the titanium-based material may be the TiSbTe alloy.

[0081] The titanium-based material may also contain impurities. These impurities are preferentially active with respect to the electronic properties of the first phase-change material. They may be nitrogen or carbon, in which case the titanium-based material of the first layer 11 may be a TipCr alloy or a Ti alloy. P N r (where r is also a mixing coefficient in atomic percentage).

[0082] The titanium-based material may also include a carrier element and impurities as described previously. This material may therefore be of the form Ti P Youq Cr or Ti P You q N r .

[0083] The conductive nature of the titanium-based material makes it easier to configure the performance of the resistive memory and improves the reproducibility of the configuration on a set of resistive memories according to the invention.

[0084] Preferably, the resistivity of the titanium-based material in each first layer 11 is less than 1000 pQ cm⁻¹. The mixture of elements in the titanium-based material can be adjusted to make it conductive. For example, the TiTe2 alloy has a resistivity of approximately 4000 pQ cm⁻¹, making it a poor candidate for forming a first layer 11. Furthermore, the TiTe2 alloy exhibits semi-metallic characteristics, which can reduce the control and reproducibility of the memory performance configuration (resistivity tends to decrease with temperature). In contrast, the TiTe alloy has a resistivity below 1000 pQ cm⁻¹ and can therefore be a good candidate for forming a first layer 11. The closer the resistivity of the titanium-based material in a first layer 11 is to the resistivity of the lower electrode, the better the reproducibility of the memory performance configuration. The resistivity of the titanium-based material in each first layer 11 is, advantageously, below 700 pQ cm⁻¹.

[0085] Figure 5, for example, shows a measurement of the resistivity of a titanium-based material, once deposited as a thin film (less than 20 nm thick), as a function of the atomic percentage of Ti. The titanium-based material considered is the Ti alloy. P You q (where q = 1 - p). Four different atomic percentages p are considered: Ti₂oTeso; Ti₂sTe₅; Ti₄oTeo; Ti₄sTe₅₅. Figure 5 represents the resistivity as a function of the atomic percentage of titanium (that of tellurium can be deduced from this). The resistivity decreases as the percentage of titanium increases in the alloy. Thus, the Ti₄oTeo and Ti₄sTe₅ alloys could be good candidates for forming a first layer 11 of the uninitialized resistive memory 1.

[0086] Figure 6 shows the cumulative resistance distribution of a set of uninitialized resistive memories 1. This set comprises 4096 memories (4 k-bytes). Each of the 4096 memories consists of a first layer 11 and a second layer 12 (an embodiment similar to that illustrated in Figure 1). The first layer 11 of each memory 1 is made of TiTe, and the second layer 12 of each memory 1 is made of GST225. The TiTe alloy, due to its metallic nature and, in particular, its low resistivity, has little influence on the behavior of each memory 1. The cumulative resistance distribution thus exhibits an abrupt transition, indicating that all the memories have similar resistance values. The effect of having a very low dispersion distribution ensures that initialization is performed with memories having very similar morphologies.Memories initialized using the same initialization electrical current will therefore exhibit low variability in behavior.

[0087] The low resistivity of the titanium-based material allows the first layer 11 to act as an electrode and improve the distribution of the electric field at the level of the second layer 12. This results in a homogenization of the behavior of each uninitialized resistive memory 1, resulting in a cumulative distribution of resistances.

[0088] It is also advantageous for the titanium-based material to be stable even when it undergoes thermal annealing. Indeed, the uninitialized resistive memory 1 can be implemented at the level of a logic block of an integrated circuit (the "front end of line"). The fabrication of the logic block (the "back end of line") may involve one or more annealing cycles up to a temperature of 400 °C. It is therefore advantageous for the titanium-based material to retain its electrical properties, such as its conductivity, after thermal annealing up to 400 °C. In this respect, it is advantageous for the titanium-based material of each first layer 11 and the first phase-change material of each second layer 12 to have a melting point above 400 °C, and preferably above 450 °C.

[0089] Figure 7, for example, shows the variation in resistivity observable on three titanium-based materials, including Ti alloys. P You qThe final resistivity (RF) of two annealed alloys is shown during annealing up to 400 °C. The alloys considered are Ti₂₅Te₅, Ti₄₀Te₅, and Ti₄₉Te₅₅. Each curve represents the resistivity during the annealing temperature rise. Each alloy shows a reduction in resistivity as the temperature increases. This reduction in resistivity during annealing is not due to the metallic nature of each alloy, which typically exhibits an increase in resistivity above a certain temperature. The reduction in resistivity during annealing is attributed to the improved crystalline structure of the alloys. Two of the alloys considered, Ti₄₀Te₅ and Ti₄₉Te₅₅, show a moderate reduction during the temperature rise. The RF resistivity after annealing for the two aforementioned alloys is also reported: RF(Ti₄₀Te₅) and RF(Ti₄₉Te₅₅). The annealed resistivity Rf of the Ti25Te5 alloy is not reported because its value falls outside the ranges considered [102 pQ cm; 10 4 pQ cm].

[0090] The Ti4oTeeo alloy exhibits sufficient stability after annealing to form a first layer 11 of an uninitialized resistive memory 1. Indeed, its Resistivity varies by less than 70%. However, the resistivity variation of the Ti4sTe55 alloy after annealing is less, being less than 40%.

[0091] In general, a conductive alloy, having a percentage (or stoichiometry) of titanium between 40% and 50%, is an acceptable candidate for forming a first layer 11. A percentage of titanium of 45% is however preferred.

[0092] A second phase-change material can be formed by mixing the molten titanium-based material with the first molten phase-change material. The good miscibility of the titanium-based material with the first phase-change material when melted allows for the formation of a homogeneous second phase-change material. This second phase-change material is unique in that it contains titanium. The titanium originates from the titanium-based material, which dissociates at least partially. Dissociation means that the chemical bonds of some of the constituents of the titanium-based material are broken, notably due to temperature. The second phase-change material comprises the first phase-change material doped with titanium from the titanium-based material. At least one region 20, called the "active region," is formed by the second phase-change material.

[0093] Figures 8 and 9 schematically represent, in cross-section, two embodiments of a resistive memory 2, referred to as "initialized," obtained after implementation of the initialization process according to the invention (described below), i.e., comprising at least one active region 20. An initialized memory 2 is a memory whose performance has been configured. Each active region 20 can be obtained by the flow of an electric current through the first and second layers 11, 12. The electric current then heats said layers 11, 12, notably by Joule heating, and a thermal gradient is established within the initialized memory. When the electric current reaches a threshold, the temperature within the first and second layers 11, 12 is such that each of them melts, at least partially, creating one or more volumes (or bubbles) of molten material within them.The percolation of volumes of molten material in the thickness of each first layer and at the interface between the first and second layers allows the formation of a volume in which titanium-based material and the first. phase change material mixes and combines. The solidification of said volume thus forms at least one active region 20, comprising at least part of the second phase change material (i.e. the first phase change material doped by means of a concentration of titanium).

[0094] The miscibility of the titanium-based material with the first phase-change material allows the two materials to form a homogeneous molten mass which, after solidification, will form an active region 20. Furthermore, the ability of the titanium in the titanium-based material to combine with the first phase-change material allows the formation of a second phase-change material with electrical properties different from those of the first. An active region 20 can store information, i.e., switch from a low-resistivity state to a high-resistivity state. Thanks to the titanium, the crystallization rate of the second phase-change material is increased compared to the crystallization rate of the first phase-change material (without titanium). The switching rate to a high- or low-resistivity state is therefore higher.

[0095] The switching speed of an active region 20 is therefore higher than the switching speed of a second layer (or of the uninitialized memory 1 in general). Furthermore, the switching current of the active region (which heats the second material to its transition temperature) is lower than the switching current of a second layer 12. An active region 20 can therefore be switched without switching a second layer 12.

[0096] The titanium in the titanium-based material may be able to combine spontaneously with the first phase-change material, for example by insertion, without necessarily requiring the dissociation of the alloy. However, the combination of titanium with the first phase-change material may require the dissociation of a portion of the titanium-based material, for example, to allow the titanium atoms to combine by insertion or substitution with the first material.

[0097] The bonding forces within the titanium-based material can be weak enough that, once melted, the material partially dissociates and releases titanium atoms. The bonding energy of titanium within its material is, For example, chosen so that it is less than or equal to the latent heat of liquefaction of the first phase-change material. In this way, when enough energy is supplied to the uninitialized memory 1 is sufficient to melt the first phase-change material, a portion of the titanium-based material is then dissociated, leaving titanium atoms free.

[0098] The dissociation of the titanium-based material can also be achieved by means of additional heating, obtained using an electrical pulse. The amplitude of the electrical pulse used for dissociating the titanium-based material is advantageously less than or equal to the amplitude of an initializing current (described below) enabling the fusion of the titanium-based material and the first phase-change material. The amplitude of the electrical pulse is preferably less than 100 mA, so as not to degrade the materials of the uninitialized memory 1. Preferably, an amplitude less than 10 mA, or even less than or equal to 5 mA, is sufficient. The electrical pulse has a duration preferably less than 10 ps, ​​or even less than 1 ps, and even more preferably less than 500 ns.

[0099] Each active region 20 is arranged between the upper and lower electrodes 14, 13. In the embodiments of [Fig. 8] and [Fig. 9], an active region 20 has a hemispherical shape (called a dome) of radius R. Its base is parallel to the plane of the layers P and coincides with the surface of the substrate S. The first layer 11 and the active region 20 also lie on the same plane.

[0100] When the lower electrode 13 passes through the substrate S, as in [Fig. 8] and [Fig. 9], the active region 20 is positioned directly above and against the lower electrode 13. Furthermore, due to its formation mechanism, the active region 20 is located at its point of contact with the lower electrode 13. The radius R of the active region 20 is advantageously greater than the thickness A of the first layer 11 (to allow for mixing of the titanium-based material with the first material). In the example of [Fig. 8], the radius R is less than the combined thickness A + B of the first and second layers 11, 12.

[0101] In the example of [Fig. 9], the radius R is greater than the total thickness A + B of the first and second layers 11, 12. In this latter case, the active region 20 connects the lower and upper electrodes 13, 14 together.

[0102] In both examples, the first layer 11 differs from the uninitialized memory 1 in that it surrounds a portion 21 of the active region 20 (that is, the latter passes through it in its entirety), called the "lower dome portion." In other words, the active region 20 passes through the first layer 11. Because of this, read and / or program currents preferentially flow through the active region 20, so that electrical conduction in the active region 20 is minimally influenced by the remaining first layer 11.

[0103] The second layer 12 of the initialized memory 2 also differs from memory 1 in that it also surrounds a portion 22 of the active region 20, called the "upper dome portion".

[0104] When a current is applied between the lower and upper electrodes 13, 14 of the uninitialized resistive memory 1, said current flows through the first layer 11 and the second layer 12. The heating in each layer depends on the current density at each point of said layers 11, 12. The through-hole lower electrode 13, as illustrated in [Fig. 1], [Fig. 3], [Fig. 8], and [Fig. 9], concentrates the electric current at the point of contact between said lower electrode 13 and a first layer 11, and more particularly at a central portion 111 of a first layer 11. The current density is concentrated at the central portion 111 and in the vicinity of this portion 111. The iso-density curves can exhibit a substantially hemispherical shape originating from the lower electrode 13.When the current density exceeds a critical density, it causes the materials to melt, creating a volume of molten material. The interface between the solid and liquid media (i.e., the surface of the molten material volume) also follows iso-density curves and can also exhibit a substantially hemispherical shape from the lower electrode 13.

[0105] Depending on the amplitude of the current applied between the lower and upper electrodes 13, 14, the surface area of ​​the molten material can reach the second layer 12. Some of the titanium atoms in the titanium-based material then combine with the phase-change material to form the second phase-change material, which has different electrical properties from the first phase-change material. The solidification of the material volume melting (for example, following the cessation of the current) finalizes the formation of the active region 20 as illustrated in [Fig.8] and [Fig.9],

[0106] Active region 20 thus presents a second phase-change material, solidified and containing titanium. This titanium forms, for example, a new alloy with the first phase-change material.

[0107] The active region 20 allows information to be stored by encoding it in a resistivity value of the second phase-change material. Indeed, the second phase-change material of the active region 20 can exhibit, just like the first phase-change material, an amorphous or a crystalline phase. However, titanium combined with the first phase-change material tends to increase the crystallization and / or quenching rate of the second phase-change material (and therefore the switching speed of the active region 20). Thus, the presence of the active region 20, located between the lower and upper electrodes 13, 14, allows information to be stored in the initialized memory 2. Unlike an uninitialized memory 1, the information switching speed is improved.

[0108] The second phase-change material in the active region 20, illustrated in [Fig. 8] and [Fig. 9], comprises a volume of the first layer 11 corresponding to the lower portion 21 of the active region 20 and a volume of the second layer 12 corresponding to the upper portion 22 of the active region 20.

[0109] The second phase-change material has a titanium concentration. This titanium concentration is proportional to the dilution ratio of the titanium-based material in the second phase-change material. This dilution ratio is equal to the ratio of the volume of the lower portion 21 of the active region to the total volume of the active region 20. It therefore depends on the volume of the active region 20 and thus on a dimension of the active region 20, such as its radius R. In the example in [Fig. 8], the active region 20 has a hemispherical shape, and its total volume depends on its radius R. The dilution ratio of the titanium-based material in the active region 20 corresponds to the volume of the lower portion 21 of the active region 20 relative to the total volume of the active region 20. The volume of the lower portion 21 of the active region 20 is given by ^21 R 2 arcsin

[0110] Thus, the dilution rate D of the titanium-based material in the first phase-change material is equal to 2 / D = — arcsin n \

[0111] The dilution rate D therefore depends directly on the ratio of the thickness A of the first layer 11 to the dimension of the active region 20, in this case its radius R.

[0112] Figure 10 illustrates the variation in the dilution ratio D of the titanium-based material in the first phase-change material, as calculated above, as a function of the A / R ratio. The larger the radius of the active region 20 (low A / R ratio), the more the titanium-based material is diluted in the amount of the first phase-change material. Conversely, the smaller the radius of the active region 20 (high A / R ratio), the more concentrated the titanium-based material. The uninitialized memory 1 considered for this calculation has an infinite second-layer thickness B (allowing for an A / R ratio of 0 and a value [0, 0]).

[0113] Consequently, a large active region 20 contains a second phase-change material with a low titanium concentration. Conversely, a small active region 20 contains a second phase-change material with a high titanium concentration. Therefore, a small active region 20 exhibits a high crystallization and / or quenching rate (since the properties of the phase-change material are significantly affected), while a large active region 20 exhibits a low crystallization and / or quenching rate.

[0114] The size of the active region 20 depends on the size of the total volume of molten material. This, in turn, depends on the parameters leading to its formation, such as the current density in each layer. Indeed, a moderate current density will create a small volume of molten material, while a high current density will create a large volume. The current density in the The amplitude of the first and second layers 11 and 12 is proportional to the amplitude of the current applied to these layers. Therefore, by controlling the amplitude of the applied current, it is possible to control the size of the active region 20. Controlling the current amplitude thus allows control of the dilution rate of the titanium-based material in the active region 20. Consequently, controlling the current amplitude allows control of the titanium concentration in the second phase-change material.

[0115] It is advantageous for the first layer 11 to have a thickness A less than the thickness B of the second layer 12. This makes the dilution of the titanium-based material in the first material more efficient. The thickness B of the second layer 12 is, for example, four times, or even twenty times, greater than the thickness A of the first layer 11. When the thickness A of the first layer If the thickness A of the first layer 11 is greater than the thickness B of the second layer B, the variation in titanium concentration as a function of the active region dimension is smaller. This scenario can improve control of the titanium concentration when the initial current is difficult to control. Conversely, the minimum dimension of the active region required to allow dilution of the titanium-based material increases with the thickness A of the first layer 11. Therefore, the minimum current required to form the active region 20 is also higher.

[0116] The dilution of the titanium-based material is also effectively achieved when the first phase-change material of the second layer Layer 12 has an initial titanium concentration (i.e., before mixing) that is lower than the initial titanium concentration of the titanium-based material in the first layer 11. Thus, the melting and mixing of the two materials (first material and titanium-based material) tends to dilute the titanium rather than concentrate it. The first phase-change material in the second layer 12, for example, has a zero titanium concentration.

[0117] Figure 11 schematically represents a method 3 for initializing a memory 1. Implementing this method allows obtaining an initialized resistive memory 2 as illustrated in Figure 8 or Figure 9. The initialization method 3 includes a step 32 of circulating an electric current, called the initialization current, between the first and second electrodes 13, 14 of the resistive memory 1 so as to form the active region 20. The initialization current being chosen so as to fuse a part of the titanium-based material from the first layer 11 of the resistive memory 1 and a part of the first phase-change material from the second layer 12 of the uninitialized resistive memory 1. This mechanically results in a mixing of the molten materials; and a doping of the first molten material with titanium so as to form the second phase-change material.

[0118] The melting is made possible in particular by the establishment of a thermal gradient in the first and second layers 11, 12.

[0119] The initialization process 3 also includes a solidification step 33 of the second phase-change material to form the active region 20. The solidification 33 is achieved, for example, by stopping the initialization current.

[0120] The mixing of the molten materials and the combination of titanium with the first material can take place concomitantly throughout the entire duration of the application of the initializing current.

[0121] In order that the initialization current used is not too high and does not degrade the memory 1, it is advantageous that the melting temperature of the first and second layers 11, 12 be less than 1000 °C and even more preferably less than 700 °C.

[0122] The initialization process 3, as illustrated in [Fig. 11], may also include a preliminary step 31 of determining the initialization current. The initialization current is, for example, between two extreme currents.

[0123] An implementation of the determination step 31 is illustrated in [Fig.12]. It implements, for example, an uninitialized resistive memory called "sacrificial" because the initialization of this memory is carried out beyond the extreme currents (in order to be able to determine said currents).

[0124] Figure 12 schematically shows a resistance curve that can be measured across the terminals of the sacrificial memory as a function of the applied current.

[0125] The resistance exhibits an initial plateau at low current until the applied current reaches a point known as the "minimum inrush current." From this minimum current, the resistance curve shows its first bend. The curve The resistance curve also exhibits a region where the variation has a continuous slope before a second bend, reaching a current known as the "maximum initialization current." The resistance curve then plateaus, with a slight or decreasing slope. Beyond the second bend, the curve may also show a drop in resistance where the active region 20 connects the lower and upper electrodes 13, 14.

[0126] The melting of materials has little influence on the resistance measurement across the memory. Indeed, as long as the materials remain pure, they do not cause a change in the trend of the resistance curve. The first bend therefore corresponds to the mixing of the titanium-based material from the first layer 11 with the first phase-change material from the second layer 12. The initialization current is thus chosen to be greater than or equal to the minimum initialization current, allowing the creation of a molten volume mixing the titanium-based material and the first phase-change material. The minimum initialization current indicates that the volume of molten material has a dimension greater than the thickness A of the first layer 11. The first bend corresponds, for example, to the portion of the curve in [Fig. 10] observable for an A / R ratio greater than 0.8 and also including a bend.

[0127] As the current increases, the volume of molten material also increases, thereby diluting the titanium-based material. The linear variation of the resistance thus provides a gradual and precise control over the size of the molten volume (and therefore the dilution of the titanium-based material). This represents an optimal initialization range within which it may be advantageous to choose the initializing current.

[0128] The second bend occurs when the mechanism reaches a saturation regime. On the one hand, the dilution of the titanium-based material may be high, and increasing the volume of molten material dilutes the titanium-based material less effectively. On the other hand, increasing the volume of molten material may show saturation because it has reached a limit to its expansion, such as the flanks of the first and / or second layers 11, 12 or one of the electrodes 13, 14.

[0129] The determination 31 of the minimum and maximum initialization currents can be split into two sub-steps corresponding to the determination of a minimum and maximum initialization current respectively.

[0130] The determination of said extreme currents can also be carried out sequentially, by increasing the current in steps, said steps being able to be separated by a period during which no current is applied, allowing for example the cooling and solidification of the active region 20.

[0131] The determination of the minimum and maximum initialization currents can also be carried out by analyzing the composition of the active region. A series of memories can be initialized by applying different currents (for example, arbitrarily). An analysis of the composition of each initialized memory, and more particularly of each active region, allows the minimum and maximum initialization currents to be determined. For example, it can be expected that the minimum initialization current will allow the formation of an active region with a maximum titanium concentration in the second phase-change material. This titanium concentration in the second material is strictly lower than the initial titanium concentration in the pure titanium-based material (i.e., before mixing) and advantageously strictly higher than the titanium concentration in the first pure phase-change material.It can also be expected that the maximum initialization current will allow the formation of an active region 20 exhibiting a minimum titanium concentration in the second phase-change material, this concentration being preferably less than or equal to 1 / 100, but advantageously strictly greater than the titanium concentration in the first pure phase-change material.

[0132] The application 32 of the initializing current and the solidification 33 of the active region 20 can be performed sequentially, several times. The amplitude of the initializing current can, for example, increase each time. Thus, the size of the active region 20 increases with each application of the initializing current. This implementation method allows for a gradual approach to the desired performance. However, this method of forming the active region 20 does not allow the memory to be initialized by applying an initializing current with an amplitude lower than an amplitude already used.

[0133] Furthermore, applying a current higher than the initialization current used to initialize memory 2 can result in additional initialization of that memory 2. It is therefore advantageous to read or switch the initialized memory with a lower current than that used for initialization. In other words, it is It is advantageous to initialize memory 2 with an initialization current greater than or equal to the read current and the switching current in order to avoid an unwanted additional initialization of the memory during its read or switching.

[0134] The memory to be initialized may be in an intermediate initialization state. This intermediate initialization state is obtained, for example, after a first initialization. The resistive memory in an intermediate initialization state then exhibits an active region called the "intermediate" region. This intermediate active region includes, for example, a third phase-change material that also contains titanium. This intermediate active region is obtained, for example, by first melting the first and second layers. The third intermediate phase-change material then has a higher concentration of titanium than the concentration that will be reached in the second phase-change material.The circulation of an initializing current (32) also generates a temperature gradient within the intermediate active region, leading to its melting and the mixing of the third phase-change material with the titanium-based material of the first layer (also partially melted) and with the first phase-change material (also partially melted). This results in the formation of a second phase-change material from the first phase-change material, the titanium-based material, and the third phase-change material. Furthermore, the active region (20) formed by the second phase-change material has a dimension (such as its radius) greater than one dimension of the intermediate active region.

[0135] Figure 13 shows a measurement of the average resistance of a set of 4096 uninitialized memories 1 during different modes of use or during their initialization. The current applied to each memory is a pulse exhibiting, sequentially, a 10 ns rise to a maximum amplitude, a maintenance of this maximum amplitude for a duration of 300 ns, and a 10 ns fall.

[0136] A first resistance curve, called the initialization curve, measured during the initialization of each memory unit, is represented by squares (also indicated by "INIT" in [Fig. 13]). The initialization curve partly exhibits the same trend as the curve discussed with reference to [Fig. 12]. In particular, it shows an initial plateau for low current values ​​(less than 1.3 mA), a first observable bend for a current between 1.3 mA and 1.6 mA and a linear portion between 1.6 mA and 1.8 mA. The maximum applied current is the initialization current. In this example, the initialization current is 1.8 mA. Following initialization 3 (comprising here a circulation step 32 of the initialization current and a cooling / solidification step 33 of the second phase-change material formed), each resistive memory 1 is initialized and presents an active region 20 in which information can be encoded.

[0137] A second resistance curve, called the control curve, represented by diamonds (also indicated by "Ctrl" in the figure), shows the resistance variation of each initialized memory chip 2 after initialization, as the current decreases from the initialization current (1.8 mA) to zero. The control curve does not show the same trend as the initialization curve, demonstrating the change in behavior of each resistive memory chip.

[0138] A third resistance curve, represented by circles (also indicated by "SET" in the figure), shows the variation in resistance of each initialized memory 2 as the applied current increases. This third curve overlaps the control curve, demonstrating that the memories are stable and exhibit the same behavior.

[0139] The conductive nature of the titanium-based material in the first layer allows for controlled initialization of each resistive memory cell, thus properly configuring their performance. In contrast, an insulating first layer does not allow for proper control of the initialization current flow through each memory cell. For example, a high voltage must be applied across an insulating material to induce breakdown and allow sufficient current to flow for initialization. However, controlling the current flowing through the memory at the time of breakdown becomes difficult. This method reduces control over initialization and results in significant performance variability across all memory cells.

[0140] It is also advantageous for the first layer 11 to have a metallic character. Indeed, a material exhibiting insulating, semiconducting, or semi-metallic characteristics shows a different temperature dependence than a material exhibiting metallic characteristics. For example, as As the temperature increases, a material with metallic characteristics experiences a monotonic increase in resistivity above a certain temperature. Thus, as the initialization current and temperature increase in the first layer, the resistivity of the first layer also increases. The metallic nature of the first layer limits the increase in current and temperature, allowing for easy and precise control of the initialization current flowing through the memory. Conversely, as the temperature increases, a material with semi-metallic characteristics experiences a decrease in resistivity above a certain temperature. Thus, as the initialization current and temperature increase in the first layer, the resistivity of the first layer decreases.The semi-metallic nature of the first layer accelerates the increase in current and temperature, potentially leading to a runaway effect where the initial current can create an excessively large active region, or even degrade the first and / or second layers. This phenomenon is more pronounced with insulating or semiconducting materials. The strong non-linearity of these materials' resistivity with respect to voltage and temperature further increases the risk of runaway and, consequently, memory degradation.

[0141] The third resistance curve of [Fig. 13] shows a characteristic trend in the behavior of phase-change resistive memories in a low resistance state, also called the "high" state, "programmed" state, or "SET" state in English.

[0142] A fourth resistance curve, represented by triangles (also indicated by "RESET" in the figure), shows the change in resistance of each initialized memory 2 after all the memories 2 have been switched to a high-resistance state, also called the "low" state, the "erased" state, or the "RESET" state. Unlike the third curve, the fourth curve clearly shows a characteristic pattern of resistive memory behavior in a low state.

[0143] Figure 13 also shows an example of a read current that can be used to read the resistivity state of an initialized memory, as well as a switching current range for the active region 20 of each initialized memory 2. The initialization current used is greater than the reading current and the maximum switching current.

[0144] Figures 14, 15, and 16 illustrate the differences in behavior between two resistive memories initialized with two different initialization currents. A first memory was initialized with an initialization current of 1.5 mA, and a second memory was initialized with an initialization current of 1.8 mA. Each of the first and second memories therefore comprises an active region. However, the active region of the first memory, having been formed with a lower current than that of the second memory, exhibits a higher titanium concentration than the active region of the second memory.

[0145] Figure 14 shows two resistance curves as a function of the current applied across the terminals of the two resistive memories 2, when they are in a low resistance state (high state or "SET"). The first memory, initialized with a lower initialization current, exhibits a lower resistance than the second memory, initialized with the higher current.

[0146] The variation of resistance as a function of current also shows a different slope between the two memories, the first memory (initialized at 1.5 mA) showing a lower slope than the second memory (initialized at 1.8 mA).

[0147] Figures 15 and 16 show a resistance measurement of the two memories when they are in a high-resistance state (labeled "RESET" in the figures) or a low-resistance state (labeled "SET" in the figures). The switching between these states is performed with different fall times. The fall time is the duration during which the current used to perform the switching decreases to zero. Figure 15 shows the resistance change for the first memory (initialized with an initialization current of 1.5 mA), while Figure 16 shows the resistance change for the second memory (initialized with an initialization current of 1.8 mA). The ratio of the resistance value in the high-resistance state to the resistance value in the low-resistance state is called the "programming window."The two figures show that the programming window increases sharply as the fall time increases. Increasing the fall time improves the crystallization of the second material in the active region 20 and therefore reduces the associated resistivity (i.e., the programming window). The second memory exhibits a wider programming window than the first memory. However, for equivalent SET resistance (represented by the dashed lines), the first memory requires a fall time of 10 ns while the second memory requires a fall time of 10,000 ns.

[0148] The first memory, initialized with an initialization current of 1.5 mA, has a higher switching speed (in this case, a higher programming speed) than the second memory. Therefore, the first memory can be used in place of static (SRAM, for "Static Random Access Memory") or dynamic (DRAM, for "Dynamic Random Access Memory") RAM. It can be connected to a processing unit.

[0149] Unlike SRAM or DRAM, resistive initialized memory, whose storage mechanism is based on the ability of the active region to change phase, has low power consumption (because it does not require a continuous supply to maintain a state), reduced latency, and high integration density.

[0150] Conversely, the second memory, initialized with a higher initialization current, for example 1.8 mA, has a low write speed but offers lower recrystallization sensitivity, therefore a better storage level.

[0151] Figure 17 schematically represents an implementation of a method for storing a message 4 in a set of resistive memories. This storage method uses the ability of the uninitialized memories 1 according to the invention to be initialized to store the message, without however offering easy reading of this message in the absence of an encryption key.

[0152] Storage method 4 takes advantage of the small difference in resistivity between initialized and uninitialized memory when they are in the same resistance state (e.g., high resistance or low resistance). The resistance difference can be less than 20%, or even less than 10%.

[0153] To this end, the set of uninitialized memories comprises a first subset of uninitialized resistive memories according to the invention and a a second subset of uninitialized resistive memories according to the invention. The two subsets are distinct from each other. That is to say, each of the uninitialized memories in the set belongs exclusively to the first subset mentioned above or exclusively to the second subset mentioned above.

[0154] The storage method 4 includes a first step 41 of initializing each memory of the first subset by implementing the initialization method 3 as described previously. Each initialized memory is then, at low current, in an initialized state.

[0155] The stored message is then formed by either the uninitialized or the initialized memories. The small difference in resistance between an initialized and an uninitialized memory in the same resistance state (high or low) makes it impossible to determine which memory contains the information. It is therefore necessary to know the encryption key used to form the first and second subsets to determine the stored message.

[0156] As a reminder, uninitialized, or "blank," memory is memory that does not contain an active region. Conversely, initialized memory is memory that contains an active region.

[0157] The storage method 4 can also include a second step 42 consisting of programming, for example randomly, each uninitialized memory in the second subset and each initialized memory in the first subset. Programming a memory means switching that memory into a low-resistance or high-resistance state. Thus, the memories, whether initialized or not, store a false message in their respective resistance states, making it possible to hide the true message to be stored in the initialized or uninitialized state. It is therefore more difficult to determine the true message that is stored in the set of memories.

[0158] Furthermore, without precise knowledge of the parameters used to program the memories of the second subset (such as its amplitude or the crystallization speed of the devices), it is difficult to force the reading of the encrypted message by attempting to reprogram each resistive memory in order to distinguish the memories from the programmed memories. Indeed, the initialized memories have a switching current lower than the switching current of the non-initialized memories. initialized. Reprogramming all the memories would then tend to erase the stored message rather than reveal it.

Claims

DEMANDS

1. Resistive memory (1) characterized in that it comprises: - at least a first layer (11), comprising a titanium-based material, said titanium-based material being conductive; - at least a second layer (12), extending over said at least a first layer (11), comprising a first phase-change material, said first phase-change material being suitable for being doped with titanium; - a first electrode (13) and a second electrode (14), the first and second layers (11, 12) separating the first electrode (13) from the second electrode (14) by electrically connecting the first electrode (13) to the second electrode (14) in series, the first electrode (13) being in contact with said at least one first layer or, when there are several first layers, in contact with one of the first layers.

2. Resistive memory (1) according to the preceding claim, wherein the titanium-based material of each first layer (11) comprises a first element, called a "carrier element", neutral with respect to the switching properties of the first phase-change material.

3. Resistive memory (1) according to any one of the preceding claims, wherein the titanium-based material is to be selected from TiTe, TiGe and TiSb.

4. Resistive memory (1) according to any one of the preceding claims, wherein the thickness (B) of each second layer (12) is greater than the thickness (A) of each first layer (11).

5. Resistive memory (1) according to any one of the preceding claims, wherein the titanium-based material of each first layer (11) comprises impurities that can influence electronic properties of the first phase-change material.

6. Resistive memory (1) according to any one of the preceding claims, wherein the titanium-based material has a resistivity of less than 1000 pQ cm.

7. Resistive memory (1) according to any one of the preceding claims, wherein the titanium-based material comprises a titanium concentration such that heat treatment of said titanium-based material at a temperature less than or equal to 400 °C changes its resistivity by less than 70%.

8. Resistive memory (1) according to any one of the preceding claims, wherein the first phase-change material is a ternary alloy comprising germanium, antimony, tellurium, gallium or selenium.

9. Resistive memory (1) according to any one of the preceding claims, wherein each first and second layer (11, 12) has a melting temperature within ]400 °C; 1000 °C[.

10. Resistive memory (1) according to any one of the preceding claims, wherein at least a portion of the titanium-based material of each first layer (11) over its entire thickness and at least a portion of the first phase-change material of each second layer (12) are fused to form, from the first phase-change material and the titanium-based material, a second phase-change material comprising titanium.

11. Method for initializing (3) a resistive memory (1) according to any one of claims 1 to 10, the method (3) comprising a step of circulating (32) an electric current, referred to as the initializing current, in each of the first and second layers (11, 12), the initializing current being adapted to generate a temperature gradient within said first and second layers (11, 12) involving the melting of at least a part of the titanium-based material of each first layer (11) over its entire thickness and of at least a part of the first phase-change material of each second layer (12), said melting resulting in the formation, from the first phase-change material and the titanium-based material, of a second phase-change material comprising titanium.

12. An initialization method (3) according to the preceding claim, wherein the second phase-change material has a concentration of titanium, derived from the molten titanium-based material, the initialization current being chosen to control said concentration.

13. An initialization method (3) according to any one of claims 11 to 12, wherein the resistive memory (1) has at least one intermediate active region, each intermediate active region being disposed between a first layer (11) and a second layer (12), each intermediate active region comprising at least one third phase-change material comprising titanium, the initialization current also flowing in each of the intermediate active regions, the initialization current being adapted to generate a temperature gradient within each intermediate active region also involving the melting of at least a portion of the third phase-change material in each intermediate active region, said melting resulting in the formation, from the first phase-change material and the titanium-based material and the third phase-change material,of a second phase-change material comprising titanium.

14. Method of storing (4) a message in a set of resistive memories (1) according to any one of claims 1 to 10, the set of resistive memories comprising a first subset of resistive memories and a second subset of resistive memories, distinct from the first subset of resistive memories, the storage method (4) comprising a step of initializing (41) each resistive memory of the first subset of resistive memories by implementing the initialization method (3) according to any one of claims 11 to 13, the stored message is formed by the uninitialized resistive memories or by the initialized resistive memories.

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