Apparatus for operating a hardware-based artificial neural network, and use and method for training same

Abstract

The invention relates to an apparatus for operating a hardware-based artificial neural network, said apparatus comprising at least one hardware-based artificial neural network (11, 24, 32, 41, 51, 71, 81, 101, 111, 121, 131, 171, 221) having a plurality of electrically interconnected network nodes, each network node comprising at least one electronic component, characterised in that the hardware-based artificial neural network has in particular an immutable hardware structure, the apparatus comprising at least one interference device (12, 22, 35, 42, 52a, 52b, 72, 82, 102, 112, 122, 132, 172, 222, 225) for coupling at least one interference signal in at least one region of the hardware-based artificial neural network and at least one coupling device (15, 23, 34, 43, 53a, 53b, 73, 83, 103, 113, 123, 133, 173), the coupling device being positioned between the interference device and the hardware-based artificial neural network and being designed to transmit the at least one interference signal from the interference device to the entirety of the at least one region, and / or the apparatus having at least one switching element, which can be actuated separately by means of at least one control signal, for dimming and / or switching a supply voltage for the at least one electronic component on and off. The invention provides an improved hardware-based artificial neural network which exhibits improved performance.

Description

[0001] Device for operating a hardware-based artificial neural network and use and method for training the same

[0002] The invention relates to a device for operating a hardware-based artificial neural network, its use and a method for training the same.

[0003] Artificial intelligence can be used to recognize patterns in technical applications, e.g., in image recognition or in monitoring machine parameters. Artificial neural networks that mimic the function of biological neurons can provide artificial intelligence. These artificial neural networks can be trained evolutionarily using training data, with the training adapting the artificial neural networks to improve their ability to perform their tasks. The individual elements of the artificial neural network are reconnected with each training run.

[0004] In principle, such systems can be implemented as a hardware-based system, i.e. in which the hardware physically forms the network, or as a software-based system, in particular as a virtual network that is simulated or emulated on hardware, for example a main memory and / or processor. In hardware-based systems, changeable electronic elements are linked together to form an artificial neural network. Dozens of linked elements can be removed without the system losing its performance. Furthermore, hardware-based artificial neural networks can contain elements that are not linked to the rest of the network, i.e. elements that are not integrated and unused and cannot be removed without reducing or losing the performance of the hardware-based artificial neural network.

[0005] In order to reduce this effect, it is known, for example, from Cramer, B. , Stöckel, D. , Kreft, M. , Wibral, M. , Schemmel, J. , Meier, K. , & Priesemann, V. Control of criticality and computation in spiking neuromorphic networks with plasticity, Nature Communications, 11 ( 1 ) ( 2020 ) 2853 , to implement the largest possible signal-to-noise ratio between the linked elements, as this allows the number of subcomponents to be increased into the thousands and the number of evolutionarily linkable connections to be increased into the tens of thousands.

[0006] Compared to software-based artificial neural networks, hardware-based artificial neural networks currently have a significantly more limited number of elements and connections, lower trainability, and lower complexity and flexibility.

[0007] Known artificial neural networks are specialized for individual tasks after training. Furthermore, software-based artificial neural networks, in particular, are susceptible to external manipulation because they are created from program code and / or the simulating or emulating hardware is usually connected to the Internet. Furthermore, the output data of the artificial neural networks can potentially be read by unauthorized persons.

[0008] There is therefore a need for widely applicable, autonomous, protected and universally deployable artificial neural networks.

[0009] The object of the invention is therefore to provide an improved hardware-based artificial neural network in which the aforementioned disadvantages are eliminated.

[0010] The problem is solved by the features of the independent claims. Advantageous further developments are the subject of the dependent claims and the following description.

[0011] According to a first aspect, the invention relates to a device for operating a hardware-based artificial neural network, comprising at least one hardware-based artificial neural network with a plurality of electrically interconnected network nodes, each network node having at least one electronic component, wherein the invention provides that the hardware-based artificial neural network has in particular an unchangeable hardware structure, wherein the device has at least one interference device for coupling at least one interference signal into at least one area of ​​the hardware-based artificial neural network and at least one coupling device,wherein the coupling device is arranged between the interference device and the hardware-based artificial neural network and is designed to transmit the at least one interference signal from the interference device into the entire at least one area and / or wherein the device has at least one switching element that can be separately controlled by means of at least one control signal for dimming and / or switching on and off a supply voltage for the at least one electronic component.

[0012] A hardware-based artificial neural network is understood to mean both networks based on biological neural networks, where the nodes generally have comparable properties (weight, transfer function, etc.) and which are arranged in layers, and electronic circuits in which the nodes of the network, in contrast to biologically based neural networks, have various digital and / or analog circuit elements or components. These can also be connected stochastically not in the form of layers as in biologically based networks, but instead as an electronic circuit, so that in some of the circuit elements, for example, connections intended as outputs can be used as inputs and vice versa. This can result in "meaningless" overall circuits from the point of view of conventional electronics, which acquire their "intelligence" through training.Hardware-based artificial neural networks can therefore also be referred to as trainable electronic networks. Furthermore, the circuit elements can form the nodes of the corresponding network. The hardware-based artificial neural network can also be referred to as a physical neural network.

[0013] In contrast to a software-based artificial neural network, in which the output of the individual nodes in a network level is determined sequentially one after the other, the output of the nodes of a hardware-based artificial neural network is obtained for all nodes in a level at the same time. This means that in software-based artificial neural networks, the number of nodes influences the time required to calculate the output of the artificial neural network. In contrast, in hardware-based artificial neural networks, the number of nodes in a level therefore plays no role in the time required to determine the output. Only the number of levels determines the time it takes to determine the output data.

[0014] An electronic component is understood to be both a separately manufactured and / or usable component and a component that is manufactured and used at the same time as other components, such as during the exposure of a silicon wafer, for example in the context of the manufacture of a semiconductor chip.

[0015] The invention provides a device for operating a hardware-based artificial neural network, in which device an interference signal is coupled into at least one area of ​​the hardware-based artificial neural network. The interference signal is coupled into the entire area, i.e. the interference signal is present in the entire area or the area corresponds to the regions of the hardware-based artificial neural network covered by the interference signal. The at least one area can be smaller than the entire hardware-based artificial neural network. The device further comprises an interference device which can couple an interference signal into a hardware-based artificial neural network. In order to couple the interference signal, a coupling device is provided between the interference device and the hardware-based artificial neural network.In one example, the coupling device can merely have an air-filled space between the interference device and the hardware-based artificial neural network. The interference signal emitted by the interference device is conducted through the coupling device to the at least one region and coupled in there. The coupling of the interference signal causes an increase in the noise in the at least one region, such that the signal-to-noise ratio is reduced when signals are transmitted between the elements, e.g. nodes, of the hardware-based artificial neural network. Contrary to all efforts in the implementation of electronic circuits, this counterintuitively results in a spatial and / or temporal and / or partial reduction of the signal-to-noise ratio in the at least one region of the hardware-based artificial neural network instead of an increase in the signal-to-noise ratio.This reduction is limited to the at least one area in which the interference signal is coupled in, i.e. it is limited to a few electronic components of the circuit of the hardware-based artificial neural network. The signal-to-noise ratio (S / N) is defined by: S / N = 10 * log (useful power / noise power), specified in decibels (dB), or S / N = 20 * log (useful signal voltage / noise signal voltage). Signals that are easy to transmit have an S / N of greater than 15 dB, an S / N of less than 10 dB is considered to be very noisy. If the useful signal power is equal to the noise signal power, the signal can no longer be identified at the receiver. Alternatively or additionally, the device has at least one switching element which supplies a supply voltage for the electronic components, i.e. among other things for the nodes or parts of the nodes of the hardware-based artificial neural network which can be switched on and / or off.The at least one switching element can be arranged in the at least one area and switched by the interference signal, which can then be referred to as a control signal. A switching element can therefore be controlled by an interference signal designed as a control signal. If several switching elements are present, each switching element can be controlled separately by control signals. The electronic components can therefore be dimmed or switched on or off using the supply voltage. Each switching element can control a separate electronic component. The control signals for the switching elements can form a control signal pattern over the area of ​​the hardware-based artificial neural network. The hardware-based artificial neural network can be trained by adapting the control signal pattern.The invention therefore enables the hardware-based artificial neural network to be trained by changing the interference signals and / or the control signals. Changing the connections between the nodes or the nodes themselves of the small-based artificial neural network is no longer necessary. The hardware-based artificial neural network can therefore have an unchangeable hardware structure. An unchangeable hardware structure means that the hardware structure, for example, has no means for physically separating lines between network nodes or that the network nodes have no means for changing their mode of operation. In this example, changes in the mode of operation of the network nodes and in the electrical connections between the network nodes of the hardware structure can be brought about solely by means of the interference signals and the control signals for the control voltage.The interference signals or control signals change the connections between nodes or the way the nodes function. Changing the interference signals and control signals replaces the adaptation or changing of the connections between the nodes of the artificial hardware-based neural network. It is therefore no longer necessary to provide a hardware-based network whose connections can be changed. A change can be generated by changing the interference signals or the supply voltage of the individual electronic components, so that the training of the artificial hardware-based neural network can be shifted to changing the control signals or signals. This provides a highly flexible hardware-based network that can be trained for different tasks. A separate control signal or control signal can be used for each task.A disturbance signal for the electronic component can be determined. The task for the hardware-based artificial neural network can thus be set by introducing a corresponding control signal or disturbance signal into an electronic component. This allows a single hardware-based artificial neural network to perform a variety of tasks, for example, first recognizing images and then recognizing audio data. This provides a broadly applicable, autonomous, protected, and universally deployable artificial neural network.According to one example, the hardware-based artificial neural network can have at least one component in the at least one region which is designed to reduce the signal-to-noise ratio upon receipt of the at least one interference signal, wherein the interference device preferably generates an optical, acoustic, capacitive, electromagnetic, quantum-mechanical, ohmic, thermal and / or ionizing interference signal and / or the switching element is preferably designed to receive an optical, acoustic, capacitive, electromagnetic, quantum-mechanical, ohmic, thermal and / or ionizing control signal.

[0016] The signal-to-noise ratio is reduced by increasing the noise in the component. For this purpose, the component can be designed to be sensitive to the interference signal. For example, when using an optical interference signal, the noise in the component can be increased during the transmission of electrical signals in the component. The component can, for example, be arranged in an electrical connection between two network nodes or within a network node. Furthermore, the switching element can be controlled by the control signal. The control signal can control the switching element in such a way that the supply voltage is dimmed and / or switched on or off.

[0017] According to a further example, the interference device can have a plurality of individually controllable interference elements for coupling an interference signal into the hardware-based neural network, wherein the interference elements preferably couple an interference signal into different regions of the hardware-based artificial neural network.

[0018] In this way, a plurality of regions of the hardware-based artificial neural network, wherein the regions preferably cover the entire hardware-based artificial neural network, can be influenced by interference signals. Since the interference elements can be controlled independently of one another, each region in the hardware-based artificial neural network can be individually exposed to its own interference signal. The regions can overlap and / or be separate from one another. Furthermore, for example, the plurality of interference elements can be distributed on a plane, preferably arranged in an array, the coupling device having a medium with a plurality of coupling elements for transmitting the at least one interference signal into the at least one region, the coupling elements being distributed in the plane like the interference elements.

[0019] This allows the interference elements to generate an interference signal pattern, which is then transmitted to the hardware-based artificial neural network via the coupling device with the coupling elements. Since the distribution of the interference elements in the plane is known, interference signals can be applied to specific areas in the hardware-based artificial neural network. In particular, the distribution of the interference elements in the plane can be designed such that the interference elements are arranged analogously to the components of the neural network. This allows interference signals to be coupled into individual components in a targeted manner.

[0020] Furthermore, at least some of the plurality of interference elements can be designed as a resistance heater, Peltier element, light-emitting diode, electromagnetic radiator and / or transmitter, and / or piezo component.

[0021] In a further example, the at least one region may have an extent that corresponds to the extent of the hardware-based artificial neural network, or may be smaller than the extent of the hardware-based artificial neural network.

[0022] If the at least one region has the same extent as the hardware-based artificial neural network, the interference device or the coupling device can be designed homogeneously in order to apply an interference signal homogeneously to the entire hardware-based artificial neural network. By means of a finer degree of structuring, the interference signals can be coupled into different regions in a component, e.g. only at a signal input or a signal output of a circuit element of the hardware-based artificial neural network. If the extent of the at least one region is, for example, equal to the extent of a component of the hardware-based artificial neural network and each component is assigned an area, an independent interference signal can be coupled into each component of the neural network.

[0023] The plurality of coupling elements can thus have a structure that is identical to the structure of the plurality of interference elements. Furthermore, the structure of the coupling elements can also correspond to the structure of the hardware-based artificial neural network. However, it cannot be ruled out that the structure of the coupling elements can be finer or coarser than the structure of the interference elements or the hardware-based artificial neural network.

[0024] According to a further example, the device may comprise at least one semiconductor chip, wherein the semiconductor chip comprises the hardware-based artificial neural network, wherein the hardware-based artificial neural network is preferably formed in an integrated circuit, more preferably in a field programmable gate array (FPGA) or in an application-specific integrated circuit (ASIC).

[0025] The neural network can be embodied as a circuit on the semiconductor chip, wherein the nodes of the neural network can be embodied as components of the circuit. In the example that the elements of the neural network are embodied as components of a field programmable gate array, the field programmable gate array can be configured such that the circuit structure of the elements of the field programmable gate array forms a neural network. A hardware-based artificial neural network, which is also implemented in a field programmable gate array, can in principle be further trained. In contrast to this, a hardware-based artificial neural network is hard-wired on an application-specific integrated circuit and can have been optimized beforehand in another way. However, with the invention, training of the hardware-based artificial neural network per se is no longer necessary. That is to say.For example, with any integrated circuit into which interference signals can be coupled and / or the supply voltage of the individual parts of the circuit can be changed, the artificial hardware-based neural network can be trained by changing the interference signals or control signals. Even when using a field-programmable array, the array can be trained by changing the introduced control signals or interference signals, without having to reprogram the array.

[0026] It is further conceivable that the device can have a shielding device for shielding external interference signals which are of the same type as the at least one interference signal, wherein the shielding device surrounds the hardware-based artificial neural network, the coupling device and the interference device.

[0027] The shielding device can, for example, be designed as an encapsulation that forms an outer shell of the device. The interference device, the coupling device, and the hardware-based artificial neural network are therefore surrounded by the shielding device. The shielding device can shield external interference signals that can change the signal-to-noise ratio in an uncontrolled and non-reproducible manner. Thus, the interference signals from the interference device almost exclusively cause the change in the signal-to-noise ratio in the areas of the neural network.

[0028] According to a further example, it is conceivable that the device can further comprise at least one memory for storing the at least one interference signal used by the at least one interference device and / or the at least one control signal, at least one control unit for controlling the at least one interference device and / or the at least one switching element, and / or at least one output unit for outputting an output signal, in particular a further processed output signal, of the hardware-based artificial neural network.

[0029] Interference signals or control signals can be stored in the memory during training and after training. For example, during a training process all interference signals or control signals for an electronic component that were used during training can be stored in the memory in order to avoid repeating training runs with the same parameters. Furthermore, after training the optimized control signal or control signal for the electronic component can be stored in the memory. If several electronic components are present, the corresponding control signal or interference signals can be stored in the memory for each electronic component. A large number of control signals or interference signals can be referred to as a signal pattern or signal pattern pair. The signal patterns or signal pattern pairs can be read out from the memory if necessary.The memory can be designed to store a plurality of different signal patterns or signal pattern pairs. Each signal pattern or signal pattern pair can be trained for a specific task. Then, for example, the task type for each signal pattern or signal pattern pair can also be stored in the memory. For example, one signal pattern or signal pattern pair can be trained for determining categories of image elements and another signal pattern or signal pattern pair can be trained for recognizing speech patterns.

[0030] Furthermore, it is conceivable, for example, that the interference device can be designed as a control device for providing at least one control signal for at least one switching element.

[0031] The control device can then, for example, read the control signals that are currently to be used from the memory in order to then use them. To do this, the control device can, for example, receive a value that determines the task that the network is to perform. Based on this value, the corresponding control signal or control signals can then be read from the memory, which the control device must transmit to the switching element or elements so that the artificial hardware-based neural network can perform the task.

[0032] According to one example, a plurality of devices explained above can be combined in an arrangement of a plurality of devices according to the preceding description, wherein the hardware-based artificial neural networks of the devices are electrically connected to one another in series and / or in parallel, wherein preferably the interference devices of at least a first device of the plurality of devices and a second device of the plurality of devices are designed as a common interference device, wherein further preferably an output level of the hardware-based artificial neural network of a third device of the plurality of devices is designed to control the interference device of a fourth device of the plurality of devices.

[0033] Advantages and effects, as well as further developments of the arrangement, arise from the advantages and effects, as well as further developments of the device described above. To avoid repetition, reference is made in this regard to the preceding description.

[0034] The arrangement comprises at least two devices according to the preceding description. In the arrangement, the output level of a hardware-based artificial neural network of a first device is, among other things, electrically connected to an input of a disturbance device of a second device or of several other devices. The first device can then control the disturbance device of the second device or influence its function. In this way, all devices can be coupled to the disturbance devices of other devices in the arrangement via an electrical connection of their neural networks.

[0035] According to a further example, a system comprising a plurality of arrangements according to the preceding description can be provided, wherein a first arrangement of the plurality of arrangements is designed to control at least one jamming device in a second arrangement of the plurality of arrangements.

[0036] Advantages and effects, as well as further developments of the system, arise from the advantages and effects, as well as further developments of the device and arrangement described above. To avoid repetition, reference is made to the preceding description in this regard.

[0037] The first arrangement can, for example, form a base level whose devices emit an output signal which is processed as an input signal by the devices of the second arrangement, for example after further processing. At least one interference device of a device of the second arrangement can be coupled to the output level of at least one device of the first arrangement. This can be referred to as feedforward coupling. It is also conceivable that at least one interference device of a device of the first arrangement can be coupled to the output level of at least one device of the second arrangement. This can be referred to as feedforward coupling.

[0038] Furthermore, several systems can be viewed as subsystems and combined into a complex system, with the subsystems being coupled together as described above. This allows the creation of a more complex system with even greater performance. Such a complex system could, for example, process signals of various types (optical and acoustic), with one subsystem processing the optical signals and another subsystem processing the acoustic signals.

[0039] In a second aspect, the invention relates to a method for training an artificial neural network in a device according to the preceding description, the method comprising at least the following steps: defining target output data when processing provided training data; feeding the training data into the hardware-based artificial neural network and coupling at least one interference signal into the at least one area of ​​the hardware-based artificial neural network by means of the at least one interference device; determining output data of the hardware-based artificial neural network; determining whether there is at least one deviation between the output data and the target output data that is outside a predetermined tolerance range; if the deviation is within the tolerance range: terminating the method;and if the deviation is outside the predetermined tolerance range: changing the hardware-based artificial neural network and preferably changing the at least one interference signal; or changing the at least one interference signal and / or changing the at least one control signal; and repeating the aforementioned steps, in particular the steps of terminating the method and changing the at least one interference signal and / or changing the at least one control signal.;

[0040] Advantages and effects, as well as further developments of the method, arise from the advantages and effects, as well as further developments of the device described above. To avoid repetition, reference is made to the preceding description in this regard.

[0041] In a first alternative, the method is used to train a hardware-based artificial neural network in a state disturbed by the interference device. The neural network is therefore trained by disrupting the signal transmission in the at least one area into which an interference signal is coupled. During each training run, in addition to the changes made to the hardware-based artificial neural network, changes are also made to the at least one coupled interference signal. For this purpose, at least one parameter of the at least one interference signal, e.g. an intensity, a frequency, a duration, etc., can be changed. By changing the at least one parameter, the at least one interference signal is also changed. The method can therefore be used to include an interference device in the training of a neural network.As a result, the method can provide a trained hardware-based artificial neural network that has increased performance than a neural network into which no interference signals are coupled.

[0042] In a second alternative, a disturbance signal or control signal is received during training, with which the unchanged hardware-based artificial neural network can solve a task set by the training. Training is carried out by simply changing the at least one disturbance signal and / or the at least one control signal until the physically unchanged hardware-based artificial neural network successfully completes the training. Changing the physical connections, i.e., for example, physically disconnecting or reconnecting the network nodes or physically changing the network nodes themselves, is not intended, but should not be ruled out.In this alternative, therefore, only a disturbance signal and / or a control signal or a pattern of disturbance signals and / or control signals needs to be found with which the hardware-based artificial neural network can successfully complete the training. In order to solve the task that was trained after training, the hardware-based artificial neural network then only needs to be exposed to the disturbance signal and / or control signal or the pattern of disturbance signals and / or control signals. This means that even with a single hardware-based artificial neural network, different tasks can be carried out by carrying out correspondingly different training sessions with which different disturbance signals and / or control signals or patterns of disturbance signals and / or control signals can be determined.

[0043] According to one example, a signal-to-noise ratio of at most 15 dB, preferably at most 10 dB, more preferably at most 0 dB can be generated by means of the coupled interference signal in the at least one region.

[0044] As a rule, easily transmittable signals have a signal-to-noise ratio of more than 15 dB. A signal-to-noise ratio of less than 10 dB is considered to be very noisy. If the useful signal power is equal to the noise signal power, the signal can no longer be identified at the receiver. Nevertheless, a neural network can in principle recognize patterns in the noise even with a signal-to-noise ratio of 0 dB or less, so that the output of the subsequent nodes of the neural network can be influenced even if the signal is no longer identifiable. The signal-to-noise ratio can also be less than 0 dB, preferably at least -40 dB, more preferably -15 dB, more preferably -10 dB.

[0045] Furthermore, it is conceivable, for example, that the hardware-based artificial neural network can remain unchanged in its structure.

[0046] In another example, it is conceivable that before the step of defining target output data when processing provided training data, the hardware-based artificial neural network can be trained, for example, without the introduction of interference signals.

[0047] This allows the neural network to be trained, as is known from the prior art, to initially achieve an initial performance level, e.g., a first accuracy value for recognizing specific patterns. Through subsequent further training with the introduction of interference signals, the first performance level can be exceeded, for example, achieving a second accuracy value for recognizing the specific patterns that is greater than the first accuracy value.

[0048] According to a further example, the last determined interference signal and / or control signal can be stored, preferably together with a marker value for identifying the target output data used, wherein the method is carried out at least once again with the same device with changed target output data and training data after the step of terminating (185) of the method.

[0049] It is further conceivable, for example, that the at least one interference device can have at least a large number of individually controllable interference elements, each interference element being designed to couple an interference signal into the hardware-based neural network, each interference element preferably coupling an interference signal into a different area of ​​the hardware-based artificial neural network, and the large number of controllable interference elements can be controlled in such a way that the interference signals form a predefined interference signal pattern via the hardware-based artificial neural network, preferably several training sessions of the hardware-based artificial neural network with different predefined interference signal patterns being carried out one after the other.

[0050] The predefined interference signal pattern can, for example, be used for an initial training run. In subsequent training runs, the interference signal pattern can be changed by altering the activity of one or more of the individually controllable interference elements, e.g. by reducing or increasing the signal strength. Because a predefined interference signal pattern can be initially coupled in, training can be accelerated by using interference signal patterns that have already been classified as suitable. Furthermore, the predefined interference signal pattern can also be used unchanged throughout the entire training session.

[0051] It is also conceivable, for example, that the interference signals and / or control signals can be test signals, whereby when the test signals are used when predefined test data is fed in, predefined output data is only provided if no part of the hardware-based artificial neural network is damaged, replaced and / or tampered with. The test signals can be used to check whether the hardware-based artificial neural network has been compromised, for example changed. If the hardware-based artificial neural network subjected to the test signals does not provide the predefined output data with the test data, it can be assumed that the hardware-based artificial neural network cannot fulfill the tasks assigned to it or is delivering false or manipulated results. This can increase the security when using hardware-based artificial neural networks.

[0052] According to a third aspect, the invention relates to the use of a device according to the preceding description, wherein the device is operated successively with at least two different signal sets, in particular for different tasks, wherein each signal set has at least one interference signal and / or control signal

[0053] The different signal sets can be assigned to different tasks. For example, one signal set can enable the hardware-based artificial neural network to analyze images. A second signal set can, for example, be suitable for recognizing specific objects in the images. Another signal set can, for example, perform a completely different task, such as speech recognition.

[0054] Advantages and effects, as well as further developments of the use of the device, arise from the advantages and effects, as well as further developments of the device and method described above. To avoid repetition, reference is made to the preceding description in this regard.

[0055] In a further example, a method for training artificial neural networks in an arrangement according to the preceding description may further be provided, wherein the method for training an artificial neural network in a device according to the preceding description is applied to the hardware-based artificial neural networks of the devices, preferably after the devices outside the arrangement have been separately trained by means of the method for training an artificial neural network in a device according to the preceding description.

[0056] Advantages and effects, as well as further developments of the method for training artificial neural networks in an arrangement, arise from the advantages and effects, as well as further developments of the device, arrangement, and further method described above. To avoid repetition, reference is made in this regard to the preceding description.

[0057] Using the method for training artificial neural networks in an array, all of the devices in the array can be coordinated with one another during training in order to improve the array's performance. For this purpose, the devices in the array can be trained together from the outset. Alternatively, each of the devices can first be trained individually, in which case the corresponding interfering signal device is not influenced by the output signals of another device. Only in a second training session, in which the devices in the array are coordinated with one another, can the interfering devices be influenced by the output signals of other devices in the array.

[0058] In a further example, a method for training artificial neural networks in a system according to the preceding description may be provided, wherein the method for training an artificial neural network in a device according to the preceding description is applied to the hardware-based artificial neural networks of the devices, preferably after the arrangements outside the system have been separately trained by means of the method for training artificial neural networks in an arrangement according to the preceding description.

[0059] Advantages and effects, as well as further developments of the method for training artificial neural networks in a system, arise from the advantages and effects, as well as further developments of the device, arrangement, system, and other previously described methods. To avoid repetition, reference is made to the preceding description in this regard.

[0060] In the method for training artificial neural networks in a system, the various arrangements of the system are coordinated with one another. In this case, the arrangements can first be trained individually, without the devices of other arrangements influencing the interference signal devices. Furthermore, in this case too, before training the arrangements, the devices of the arrangements can first be trained separately from one another, without the interference devices being influenced by other devices. Alternatively, the arrangements and the devices they contain can be coordinated with one another in a single training of the system, wherein output signals from the arrangements can influence the interference devices of other arrangements.

[0061] The invention is described below using an exemplary embodiment with the aid of the accompanying drawings. They show:

[0062] Figure 1A, B shows a schematic representation of the device;

[0063] Figure 2A, B is a schematic representation of the device according to Figure 1A, b with further details;

[0064] Figure 3 is a schematic representation of an example of the

[0065] Device with an FPGA chip; Figure 4A, B a schematic representation of the example from

[0066] Figure 3 in further versions;

[0067] Figure 5 is a schematic representation of an example of the

[0068] Device with two jamming devices;

[0069] Figure 6 is a schematic representation of a basic structure of an FPGA chip;

[0070] Figure 7 is a schematic representation of an example of the

[0071] Device with capacitive interference elements;

[0072] Figure 8 is a schematic representation of an example of the

[0073] Device with heating and cooling disturbance elements;

[0074] Figure 9 is a schematic representation of an example of the

[0075] Device with heating disturbance elements;

[0076] Figure 10 is a schematic representation of an example of the

[0077] Device with sound-emitting interference elements;

[0078] Figure 11 is a schematic representation of an example of the

[0079] Device with interference elements that emit electromagnetic radiation;

[0080] Figure 12 is a schematic representation of an example of the

[0081] Device with a pattern-generating jamming signal device;

[0082] Figure 13 is a schematic representation of an arrangement with a plurality of devices;

[0083] Figure 14 is a schematic representation of a system with a plurality of arrangements;

[0084] Figure 15 is a schematic representation of another

[0085] Example of the system in an alternative representation;

[0086] Figure 16 is a schematic representation of an example with a plurality of systems interconnected via the jamming devices; Figure 17 is a schematic representation of further examples of an arrangement of devices;

[0087] Figure 18 is a flowchart of the method for training artificial neural networks in a system;

[0088] Figure 19A, B shows a comparison between a conventional circuit and a circuit of a hardware-based artificial neural network adapted for the invention;

[0089] Figure 20A, B shows a further comparison between a conventional circuit and a circuit of a hardware-based artificial neural network adapted for the invention;

[0090] Figure 21 shows an array-like structure of the semiconductor chip with the artificial hardware-based neural network;

[0091] Figure 22A-C shows an example of the device as a semiconductor chip with interference device and switching elements for the supply voltage;

[0092] Figure 23 shows an overview diagram with a section of the

[0093] Overall system of the hardware-based artificial neural network;

[0094] Figure 24 shows a device with further peripherals;

[0095] Figure 25 Layers of a hardware-based artificial neural network;

[0096] Figure 26 shows a serial query of a hardware-based artificial neural network with different tasks;

[0097] Figure 27 shows an overall structure of the device.

[0098] Figures 1A and 1B show the devices, which are further described below: according to Figure 1A in a spatial arrangement, according to Figure 1B the essential components of the device in section. This is an example of an FPGA chip on a control board 13, the individual components of which are linked, configured and trained to form a hardware-based artificial neural network 11 via an evolutionary learning process. This level of the hardware-based artificial neural network 11 largely corresponds to the chip-based systems and controls described in the prior art and industrially available.

[0099] In the following, the term "FPGA" is used to represent all freely configurable electronic semiconductor chips. At a distance d, which will be specified in more detail in the following examples, there is another level, optionally structured in the form of an array, as a disturbance device 12, the elements of which can be switched on / off or adjusted in a controlled manner as disturbance elements, shown here as small spheres. The elements for the control are not shown here.

[0100] This level of the interference device 12 can generate interference signals in patterns and is referred to as the "interference signal level". It or its elements can generate interference signals which, via the space that is part of a coupling device 15, couple into the level of the hardware-based artificial neural network 11 locally in at least one area of ​​the hardware-based artificial neural network 11, wherein the interference signal is coupled into the entire area. The area therefore corresponds to the regions of the hardware-based artificial neural network 11 covered by the interference signal. The area can cover the entire network, i.e. the interference signal can couple into the entire network. This can be done homogeneously. Furthermore, if, for example, several areas are provided, the extent of the areas can be assigned to a group of individual components of the FPGA, individual individual components or merely sub-regions of the individual components.

[0101] Corresponding interference signal array components can be miniaturized heating or cooling elements, optical, acoustic, ohmic, electromagnetic, capacitive, mechanical or even quantum-mechanical components. Anything that can couple into an electronic circuit as implemented at the level of the hardware-based artificial neural network 11 can be used. The signals generated in the interference device 12 can be coupled as a pattern into the level of the hardware-based artificial neural network 11 via the coupling device 15, which is also referred to below as the “coupling space”. Depending on the elements at the level of the interference device 12, the coupling device 15 can be a medium that mediates, for example, a thermal, ohmic, electromagnetic, capacitive, mechanical or even quantum-mechanical transmission of the signals. In the simplest case, it can be a homogeneous medium, e.g.gas, liquid or solid. As a rule, however, the medium can have a vertically and / or horizontally structured combination of different materials in order to achieve a local effect in the direction of the plane of the hardware-based artificial neural network 11 and adapted to its array structuring, i.e. the medium of the coupling device 15 can be adapted to the arrangement of the linkable elements of the FPGA chip, i.e. to the hardware-based artificial neural network. The distance d can also be varied, but is usually chosen to be small in comparison to the surface area of ​​the plane of the hardware-based artificial neural network 11 in order to be able to generate local effects in the hardware-based artificial neural network 11, in particular in the FPGA chip.

[0102] In contrast to conventional uses of semiconductor chips and semiconductor components, the components on board the level of the hardware-based artificial neural network 11 can be partially and not completely shielded from external influences, so that only couplings from the level of the interference device 12 are possible.

[0103] Therefore, due to the increased sensitivity of the components of the hardware-based artificial neural network 11 to external signals, an encapsulation can be provided as a shielding device 14 of the device against precisely these interference signals.

[0104] In this basic arrangement of a hardware-based artificial neural network 11 according to the invention, the main component for the evolutionary learning process is the level of the hardware-based artificial neural network 11. The level of the disturbance device 12 forms a higher-level, yet subordinate component, which makes this process more complex at the level of the hardware-based artificial neural network 11 and can also be optimized via the or a second evolutionary algorithm and learning process. The overall unit comprising 11 to 15 can be understood and referred to as an intelligent hardware AI system and referred to as the AI ​​basic unit.

[0105] The training process can be carried out in two variants. In a first alternative, the hardware-based artificial neural network 11 and the perturbation device 12 can be modified simultaneously in the evolution process. In a second alternative, only the hardware-based artificial neural network 11 can be trained first, and if this training shows positive results, the perturbation device 12 can be added. If the device has more than one hardware-based artificial neural network 11 and more than one perturbation device 12, any combination can be subjected to separate and joint training according to the first or second alternative.

[0106] In contrast to systems from the state of the art, highly complex systems can be realized and controlled by avoiding undefined interference and the defined separation of the interference signals by the interference device 12 and the coupling device, and the probability of achieving a positive training result increases.

[0107] Figures 2A and 2B show an example to illustrate the spatial relationships. Figure 2A shows a three-dimensional exploded view, and Figure 2B shows a section along line SS in Figure 2A.

[0108] An FPGA chip 24 in which the hardware-based artificial neural network is implemented can be arranged on a board 21, e.g. a multi-level circuit board for controlling and configuring the FPGA via the connections 26. The configuration can be done via digital computers. The FPGA 24 is not encapsulated in a shielding manner, but can instead be covered with the coupling medium 23 of the coupling device, followed by the interference device 22, which is shown here as an array in a checkerboard pattern with individual interference elements for locally generating interference signals for the FPGA. The interference device 22 is in turn connected to a board 25 for controlling the interference elements via the connections 27. In the simplest case, any patterns can be generated by switching the interference elements of the interference device on and off, which patterns act locally on the FPGA chip 24 via the coupling medium 23.

[0109] Regarding the distance d in Fig. 1A, it is small in this example compared to the area of ​​the FPGA chip 24. Typically, this distance is between 0.1 mm and 5 mm, preferably 0.5 mm. The geometric relationships can be seen in section SS in Fig. 2B.

[0110] For example, the array of the interference device 22 can consist of small heating elements or Peltier elements coupled via a medium 23 with high thermal conductivity, e.g., a metal or diamond layer. This layer can be structured in an array-like manner into columns with good and poor thermal conductivity and can transmit a temperature pattern to the FPGA. This allows a variable, trainable, and switchable interference signal pattern to be generated.

[0111] A first degree of structuring of the interference device, which is a measure of the structuring of the distribution of the interference elements, can be adapted to the structuring of the FPGA, whose structuring in this example can be specified with a second degree of structuring, i.e., it can be chosen to be geometrically identical. Then, in each area in which an interference signal from the interference device couples into the hardware-based artificial neural network implemented in the FPGA, a basic element of the FPGA is arranged. This means that each interference element influences a basic element of the FPGA.

[0112] However, this is not mandatory, since the first degree of structuring can be structured either finer or coarser than the second degree of structuring. Preferably, the ratio of the first degree of structuring to the second degree of structuring has values ​​in a range between 10:1 for the finer structuring and 0.1:1 for the coarser structuring. The coupling medium 23 of the coupling device can have a structuring that is specified with a third degree of structuring. The third degree of structuring can also be finer or coarser than the second degree of structuring.

[0113] Figure 3 shows a compact technical arrangement of the device described in Figures 1A and 1B. An FPGA chip 32 with the connectable basic electronic components 33 can be arranged in a semiconductor chip receptacle 31, e.g., a ceramic with a plurality of contact pads. The coupling medium 34 can be arranged above it, and the interference device 35 with an array of interference elements can be arranged directly on it.

[0114] The entire chip can then be encapsulated to shield it from external influences 36 . In the case of electromagnetic elements in the interference device, this can be, for example, a metal encapsulation; in the case of optical interference signals, it can be an opaque enclosure.

[0115] This compact chip design allows the combination of such chips on a board to form complex structures or even stacks, as explained in the following examples. With such chips, a multitude of basic IC units and their combinations can be assembled into levels and hierarchies.

[0116] Figures 4A and 4B schematically illustrate the exemplary combination of compact chip systems. Figure 4A shows a device as a basic unit according to Figure 3, comprising the FPGA 41, the coupling medium 43 of the coupling device and the interference device 42 with the electrical contact pads 44. The thickness of the coupling medium can vary between 100 pm and 5 mm, preferably 200 pm to 600 pm. Furthermore, the coupling medium can have a plurality of coupling elements, which can be structured or unstructured according to a third structuring degree. In particular, structuring of the coupling medium is provided for the use of signal patterns.

[0117] Figure 4B shows two devices combined. The combination of the two devices comprises two FPGAs 41, which are connected to a common jamming device 42 via two coupling media 43. The FPGAs are aligned head-to-head.

[0118] In a similar way, further combinations can be realized as horizontal or vertical stacks. The advantage of a common jamming device for multiple FPGAs is the reduction in control effort.

[0119] Furthermore, interference signal patterns can be generated that are either predefined or have been progressively optimized during training with the FPGA. Such systems also offer the advantage that the upper and lower FPGAs can be exposed to different interference signal patterns at different times, one after the other or alternately, resulting in more complex training and more complex circuit systems with minimal switching effort.

[0120] Figure 5 shows another variant. In this example, an FPGA 51 is arranged between two coupling media 53a and 53b and two interference signal levels 52a and 52b. This provides numerous possibilities for coupling interference signals, given the increasing, yet well-defined, complexity of the device.

[0121] For example, a symmetrical coupling of identical interference signal patterns from above and below onto the center of the FPGA chip can be provided. Alternatively, an asymmetrical coupling of identical or different interference signal patterns into the FPGA chip can be provided. In a further alternative, for example, a temporally separated coupling from above and from below can be provided. Furthermore, an alternating coupling of asymmetric interference signals from above and below can be provided.

[0122] Figure 6 schematically illustrates the basic principle and structure of FPGA chip arrays. Since FPGAs are typically structured as arrays, the representation with rows 1 to m and columns 1 to n was chosen for clarity.

[0123] Basic electronic elements, whose positions can be identified by the indices 11, 12, [...], m5, mn, can be connected to one another in a short-circuit-proof configuration to form a hardware-based artificial neural network via four connections A, B, C, and D. Even incorrect wiring, such as using the output of an element as an input, is permitted in hardware-based artificial neural networks.

[0124] As shown by way of example with the basic elements at positions 11 to 15 in the top row of the array shown, the elements of the FPGA can be digital or analog circuits. The symbols used correspond to the electronic nomenclature. Mixtures of analog and digital devices are also possible. The electronic elements mn are not shielded against interference as usual, but may even have components that are sensitive to optical, acoustic, thermal, electromagnetic and other signals generated by the interference device. The type of configuration and the evolutionary programs used for training are state of the art and are therefore not explained in detail here.

[0125] Figure 7 shows the three levels of the device (hardware-based artificial neural network, coupling device and jamming device) with capacitive interference.

[0126] In this example, the FPGA 71, as a hardware-based artificial neural network, has a second level of structuring that is finer than the first and third levels of structuring of the interference signal device 72 and the coupling device 73. The structuring of the FPGA, the interference device, and the coupling device can be similar or different. Accordingly, not just a single basic element of the FPGA, but a group of basic elements simultaneously, or only a subsection of a basic element, can be influenced.

[0127] The interference device 72 can have, for example, metal plates or metal pads 72a as interference elements, which are embedded in an electrically insulating medium 72b. Each pad 72a can be controlled via a computer program in a similar way to the operation of the FPGA. In the simplest example, three configurations of each pad are possible, as shown at 74: 1. Application of a positive or negative voltage Ux, 2. Open pad, i.e. no potential connection, whereby the pad seeks its own potential in the chip environment, and 3. Connection to ground, so that any desired charge pattern can be generated in the array.

[0128] In the example shown, the coupling device 73 is structured in the same way, so that a material with a high dielectric constant 73a can be arranged as a coupling element under each metal pad, embedded in a medium with a low dielectric constant 73b. Together with the surface of the FPGA 71, the metal pads form local capacitors, via which displacement currents can be coupled into the respective locally adjacent regions of the hardware-based artificial neural network.

[0129] In the evolutionary training process, similar to the training of the hardware-based artificial neural network, the assignments of the interference elements 72a can also be varied using an evolutionary algorithm. This means that at the beginning a random assignment with input signals can be generated and applied to the interference device 72. The artificial neural network implemented in the FPGA can then receive an input signal. If this is correctly interpreted by the neural network at the output, nothing is changed in the configuration of the interference device 72 and the next training signal is applied to the FPGA. If this is, for example, incorrectly evaluated, the assignment of a few pads or interference elements is changed randomly, just as is the case with the switching connections in the FPGA. The two algorithms can, but do not have to, match.If this is done several hundred to a thousand times, which can be referred to as "generations" in the evolutionary algorithm, the desired success rate of the entire device can be achieved.

[0130] Figure 8 shows a 3-level AI chip in which interference signals can be generated via an array of heating and / or Peltier elements 82, which in this example represent the interference elements. The temperature can be transferred from the interference elements to the local basic elements of the FPGA 81 via the coupling device 83. The basic elements arranged in an array at positions 11 to mn of the FPGA can either be manufactured to be temperature-sensitive using conventional semiconductor manufacturing processes or are designed in such a way that their signal behavior reacts to small temperature differences, e.g., several degrees or fractions thereof.

[0131] In this example, the coupling device 83 is also composed of two components: the highly thermally conductive, cylindrical regions 83a and the poorly thermally conductive regions 83b in between. The material 83a can be, for example, a metal such as copper or silver, or a diamond layer processed using semiconductor technology. The insulating material 83b can be a poorly thermally conductive plastic, glass, or even a ceramic material.

[0132] In this example, the disturbance device 82 can comprise a plurality of heating and / or cooling elements, e.g., miniaturized resistance elements or Peltier elements, as disturbance elements. In this way, any desired temperature patterns can be transmitted to the underlying FPGA. The temperature differences can be selected within a wide range, e.g., within a range between -20°C and 100°C, but preferably in the range of degrees or less, close to room temperature.

[0133] In box 85, shown at the top center of Figure 8, the structure of this basic unit is shown in vertical section SS. Here, too, the array structure of the levels of the interference device, the coupling device, and the neural network need not match, ie, the number of interference elements and coupling elements can, but does not have to, correspond to the number of basic electronic elements.

[0134] The generated temperature patterns are typically static, meaning they remain constant for the neural network's duty cycle, which corresponds to one decision pass. However, it is also possible to generate dynamic changes across multiple decision passes of the FPGA.

[0135] The training is carried out analogously to the description in Fig. 7.

[0136] Figure 9 shows a device with a jamming device that only has heating elements. Otherwise, this example is constructed as described in Figures 7 and 8. Figure 10 shows a jamming device 102 that has miniaturized sound transmitters as jamming elements, which, for example, emit sound signals of varying frequencies via vibration. The sound transmitters can be piezo elements or piezo crystals, or small membranes that generate individually controlled sound patterns.

[0137] In this example, the coupling device 103 can have sound-transmitting regions 103a, e.g. a mechanical solid-state coupling or miniature sonotrodes, and sound-damping spaces 103b, e.g. sound-absorbing materials, e.g. material with very small cavities.

[0138] The basic elements of the FPGA 101 can be designed in such a way that they can be disturbed to a certain extent by sound frequencies. The effect can be amplified and made more complex if the electronic basic elements of the FPGA have, for example, sound receiver components. This can be the case partially or for all of the basic elements of the FPGA. The advantage of using sound is its wide frequency range, which extends from infrasound through the human hearing range to ultrasound. This allows not only sound patterns of one frequency to be generated, but also sound patterns of different frequencies.

[0139] This example clearly demonstrates the expanded possibilities offered by incorporating interference devices and coupling devices into hardware-based artificial neural networks. In interconnected arrangements and systems, as explained in the following figures, each of these interference devices can be operated as a fixed sound pattern with its intensity varied, its frequency shifted as a whole, its frequency composition / spectrum altered, its pattern modified, or a combination of the above options.

[0140] If it is assumed that the overall system comprising hardware-based artificial neural network, interference device and coupling device has been optimized for a specific frequency pattern and achieves its highest success rate in this control, a change / detuning of the interference signals would lead to a poorer result. In extreme cases, the neural network only functions in a certain intensity interval or frequency interval. This makes it possible to use the interference signals alone to worsen or improve devices if they were previously operated suboptimally. This opens up possibilities for interconnecting many devices in a hierarchical or equal manner in such a way that the success rate of one neural network can be used to influence other hardware-based artificial neural networks connected to it via their interference signals.

[0141] Figure 11 shows an FPGA 111 comprising an artificial neural network of the type already described. In this example, the interference device 112 can comprise miniaturized transmitters for high-frequency electromagnetic waves up to the microwave range as interference elements. These transmitters can, for example, be configured as antennas or can transmit their signal to the FPGA via the coupling device 113 using a waveguide 113a as a coupling element.

[0142] Similarly, the jamming device can incorporate infrared or LED elements in the visible or UV spectral range as jamming elements. Furthermore, coupling can be carried out via fiber optic cables or small pinholes as coupling elements. This device also offers a very broad spectrum of possible operating and training modes, analogous to Fig. 10.

[0143] Figure 12 shows an alternative device with a disturbance device that can generate disturbance signals in patterns. For this purpose, the coupling device 123 has two or more levels 123a, 123b, on each of which patterns can be applied, e.g. concentric rings on each level that are alternately transparent and non-transparent, with the centers of the concentric rings of the two levels being shifted against one another. This results in symmetrical or asymmetrical superposition patterns. The disturbance device 122 can then have a light-emitting diode array. In this case, the coupling device 123 is not an array as in the previous examples. Instead, the superposition pattern can define the pattern formation of the disturbance signals in the neural network. The FPGA chip 121 can have, for example, light-sensitive components such as in its basic electronic elements.

[0144] Figure 13 shows an arrangement of devices as an ensemble of basic units corresponding to Figures 3 to 5. FPGA chips 131 can be electrically contacted on the control board 135, and the interference devices 132 can be electrically contacted on the underside of the transparently depicted overhead control board 136. The coupling devices 133 are arranged between them.

[0145] The basic AI units 134 can be trained separately and / or jointly, as already described, via first controls 139 of the control board 135 for the FPGAs 131 and second controls 140 of the control board 136 for the jamming devices 132. If each basic AI unit 134 has been trained on a different feature group, for example, a first one on the recognition of cats, a second on dogs, a third on horses, etc., then the arrangement in Fig. 13 forms a more complex AI system with higher performance / intelligence than the basic AI units represent as individual devices.

[0146] The jamming devices can also be partially electrically connected to one another, as schematically illustrated by the broken lines 137 and 138. This provides a further possibility for controlling and evolving the entire arrangement.

[0147] Via these connections, signals can be transmitted between the interference devices 132 which change the performance of other basic AI units in a defined manner, e.g. exclusively via the respective coupling of interference signals with which the corresponding artificial neural networks in the FPGAs can be influenced as already explained above. This can be done, for example, by increasing or reducing the intensity of the interference signal in the connected basic AI unit. This means that the respective basic AI unit can be improved or even operate optimally, e.g. the devices connected via the dashed connecting line 138, or it can be detuned and thus deteriorated or switched off, e.g. the devices connected via the connecting line 137. If, in the animal recognition example given above, e.g.Assuming that half of the basic Kl units can recognize animals and the other half can recognize works of art that look like animals, this can be achieved by wiring things up in such a way that at the beginning many of the basic Kl units are controlled in the suboptimal range by detuning the respective interference devices and are run, for example, at 80% of their maximum capacity. If the devices are supplied with an input signal, for example the image of a mule, the individual basic Kl units classify this input signal with different results.

[0148] The devices that can recognize cats, for example, give a 2% match between a mule and a cat. The devices that can recognize horses, for example, give a 90% match. The devices that can recognize works of art can, for example, also react in the recognition range of a few percent up to 60% in the case of horse sculptures. The basic AI unit with the highest match rate, in this case the device that can recognize horses, can then switch its jamming device to optimal function. Furthermore, previously detuned jamming devices of the basic AI units connected to it can also be switched to the optimal jamming signal mode. For example, one basic AI unit can recognize wild horses, one can recognize zebras, and one can recognize half-breeds of the horse family.At the same time, through connections to the devices capable of detecting art objects, it can suppress all but the one with the highest hit percentage. This device with the highest hit percentage for detecting art objects can, through its connections, activate other devices capable of detecting art objects, by optimally adapting the jamming devices.

[0149] Now a new run through the mule image can be started until it is decided which object in the overall system the mule is closest to and whether it is an animal or an object.

[0150] Such an arrangement has one more training level than the basic units, namely the networking of the devices with each other, which can also be done via evolutionary optimization strategies.

[0151] With a plurality, at least two, arrangements according to Fig. 13, hierarchically or otherwise complexly organized systems can be constructed, as shown in Figure 14. A basic level 141 is shown, comprising any number of basic Kl units, wherein, for reasons of clarity, only four devices designated a1 to a4 are shown as examples in Figure 14, which devices can be networked with one another in an activating or suppressing manner via electrical connections 143 between the associated interference devices. The input signal 144 can be fed into all basic Kl units a1 to a4 at this level, e.g. by connecting the inputs of the devices in parallel.

[0152] The basic Kl unit with the highest detection probability can couple to the next higher level 142. There, the input signal 144 can also be applied to all basic Kl units. For reasons of clarity, only two devices b1, b2 are shown in level 142, which can also be partially or completely interconnected via electrical connections 143 between the jamming devices. A basic Kl unit with the highest detection probability can also be determined at this level, which can then generate the output signal 147.

[0153] As a rule, the number of basic units can be greatest in the lowest level and decrease towards higher levels. However, this is not mandatory. Extended evaluation categories or even new connections can be established with each level. For example, in the higher levels, after the object has been recognized, patterns can be compared and acoustic signals can be added in the next level to reveal contradictions that would otherwise lead to a

[0154] This would lead to misinterpretation. For example, if an object identified as a cat neighs like a horse. Such a system can have larger KL basic units in higher levels than in lower levels.

[0155] Figure 15 shows on the left a system with a hierarchical Kl structure, consisting of three levels 151, 152 and 153 with the input

[0156] 154 and the output 155 analogous to Fig. 14. Such complex AI circuits are shown below, as shown on the right in Figure 15, as cylinder 156, with the input 154 and the output

[0157] 155 in order to represent more complex structures .

[0158] Figure 16 schematically illustrates an even more complex structure. It consists of a plurality of systems according to Figure 15, depicted as cylinders 164-166. They can be oriented in the same direction in a plane, although for reasons of clarity, only the respective input 161 of cylinder 164 is oriented downwards and the respective output 169 is oriented upwards.

[0159] The systems can be arranged in domains marked by a specific pattern on the top of the corresponding cylinders, with each pattern marking a system of a domain.

[0160] Fig. 16 depicts three domains that can be composed of three system types: 164, 165, and 166. As can be seen with system type 166, not all systems in a domain need be located in close proximity. Individual systems can also be arranged as solitary units in another domain (not shown here). In this way, strong and weak interactions between the domains can be achieved via the perturbation devices.

[0161] The systems of a domain can receive a common input signal. It is expedient to organize the domains such that they each receive different or modified input signals, e.g., parts of the general input signal, which are designated by reference symbols 161, 162, and 163 in Figure 16.

[0162] Reciprocal or directed connections can exist between the systems, through which they can be excited or suppressed, or even excite or suppress other systems. These connections can usually originate from the highest level, i.e., the result level (see Fig. 15). When input signals 161 to 163 are present, the individual systems can already produce more complex responses with different recognition probabilities than without these connections.

[0163] Analogous to the operation of the individual systems according to Figs. 14 and 15, the systems can strengthen and weaken each other within and beyond the domain. Through connections to other domains, which can easily be located far apart, as exemplified by the connecting arrow from system 164a to system 164b, the activity of larger system ensembles can be controlled via the perturbation devices. These system ensembles exhibit an additional training level in addition to those already described above.

[0164] The system with the highest hit rate in a domain can be coupled via a switch level 167, which feeds the result into a projection level 168, in which the results of the other domains with high hit rates and the input signal can be coupled and displayed for comparison.

[0165] This arrangement makes it possible, for example, to implement pandemonium-like structures such as those suspected of existing in the human brain. The systems correspond to the columnar structure of the cerebral cortex, and the domains, for example, to the optical, acoustic, haptic and olfactory cortex. The cross-connections between the systems and between the domains allow association-analog modes to be generated and trained, which ultimately are nothing other than links between phenomena that are not actually related to one another, for example the conversion of an optical pattern into music, etc. As can be seen, the underlying devices, e.g.FGPA with jamming devices, their networking and influencing via the jamming devices, the linking of devices into arrangements and their consolidation into systems, and subsequently, through the arrangement of the systems into levels and domains, create an overall AI system that can be made universally intelligent through a multitude of sequential and / or jointly executed evolutionary training cycles. The more extensive the systems, the more complex the training structure can be.

[0166] Alternative devices are shown in Figures 17A to 17D. In the event that the interference device 172 is not to be arranged close to the FPGAs 171, in order to couple interference signals not in such fine patterns as in Figures 1 to 16, but rather more broadly and for many FPGAs in the same or similar way, the device can have several FPGAs 171 and control boards, which are arranged, for example, according to Figure 17A, in a square around a common interference device 172, which can be designed as a column. Such a group of four FPGAs 171, or, for example, a group of eight (only seven are shown for reasons of clarity), can then form a basic unit in conjunction with the interference device 172 and the coupling device 173 arranged between them.

[0167] Figures 17B to 17D show further examples of devices in plan views. In Figure 17B, the FPGAs of a device are arranged in a triangular arrangement, and in Figure 17C, they are arranged in a hexagonal arrangement.

[0168] Figure 17D shows a device whose FPGAs, and thus hardware-based artificial neural networks, are arranged in a quadrilateral chain system. The coupling medium of the coupling device 173 can be a gas or a material that transmits the respective interference signals well to the FPGA chips. As a rule, it can be formed homogeneously due to the broad effect from the interference signal column 172. Alternatively, it can have a layered or other composition of materials that transmit well and poorly. Other groupings can be carried out in an analogous manner. What they all have in common is that they can be combined to form more complex arrangements, systems, and ensembles, as described in Figures 13 to 16.

[0169] Figure 18 shows a flowchart illustrating a method for training a system according to the preceding description, wherein a method 180 for training an artificial neural network in a device according to the preceding description is first carried out. In this case, the devices of the system can first be trained.

[0170] In a first optional step 187 of method 180, the hardware-based artificial neural network of a device can initially be trained without coupling in interference signals. In this step, the hardware-based artificial neural network is trained to a preliminary performance value.

[0171] In a further step 181, target output data can be defined, representing the desired result of the processing of provided training data by the hardware-based artificial neural network. This step can be performed at any time before the subsequent steps and also simultaneously or before the optional step 187.

[0172] Furthermore, in a step 182, the provided training data can be used to train the hardware-based artificial neural network. For this purpose, the training data are fed into the input level of the neural network, with the interference device injecting interference signals into at least one region of the hardware-based artificial neural network. Parts of a node of the hardware-based artificial neural network, an entire node, or multiple nodes can be arranged in the at least one region.

[0173] In a further step 183, the output data of the hardware-based artificial neural network is determined. Since the network is hardware-based, the training data is processed simultaneously in all nodes of a network layer, so that the output data is available within a few milliseconds.

[0174] Next, in a step 184, a deviation between the output data and the target output data is determined. If the deviation lies outside a predefined tolerance range, e.g., if the deviation is more than 1%, the hardware-based artificial neural network is reconfigured. Furthermore, at least one interference signal can optionally also be changed. If multiple interference signals are used, it is sufficient to change a single interference signal, e.g., by controlling an interference element of the interference device.

[0175] Steps 182 to 184 are repeated with the modified hardware-based artificial neural network and the input of the possibly modified interference signals.

[0176] If the deviation is within the predefined tolerance range, the training of the device is terminated with step 185.

[0177] Once all devices have been trained using method 180, an array of the devices can be trained in a further method 188. For this purpose, the devices of the array that are coupled to one another via the interference devices are trained according to steps 182 to 186. However, it is not excluded that the array can also be trained without previously performing the method for the devices.

[0178] The training of the arrangement can be carried out analogously to method 180, wherein at least some interference devices can be influenced or controlled by the hardware-based artificial neural networks of other devices.

[0179] Once all arrangements of a system have been trained using method 188, the system can be trained according to method 189. For this purpose, the devices or arrangements of the system coupled to one another via the interference devices are trained according to steps 182 to 186. However, it is not excluded that the system can also be trained without first performing the method for the arrangements or devices.

[0180] Furthermore, an ensemble can be trained by first training the systems according to the above description and then training the entire ensemble. However, it is not excluded that the ensemble can also be trained without prior training of the systems, the arrangement, and / or the devices.

[0181] A further exemplary embodiment is described below in which the structure of the artificial hardware-based neural network is not changed during training. The artificial hardware-based neural network can be designed as a semiconductor chip which can have dimensions ranging from a fraction of an inch to several inches in side length. A large number of analog and / or digital electronic basic circuits, each with x-inputs and y-outputs, can be processed on the semiconductor chip in an array arrangement, as has previously been the case with FPGA chips, for example. Assuming a square size of a semiconductor substrate with a side length of 2 inches and the realization of a complete electronic assembly or basic circuit made up of electronic components on a chip area of ​​2 pm x 2 pm, this results in a total number of linkable assembly fields of more than 100 million.This is a sufficiently high number to create even highly complex artificial hardware-based neural networks. Unlike previous approaches, however, these electronic modules are hard-wired, meaning not all inputs and outputs need to be used. All basic circuits, and thus each of the millions of module arrays, is connected to a supply voltage, regardless of whether it is integrated into the network or not. The modules are not limited to one connection with neighboring modules and can also be connected multiple times.

[0182] The selected connections can be made entirely without circuit logic, i.e. randomly, or in a specific proportion, e.g. 40% random, 60% electrically sensible connections, as is the case with previous artificial hardware-based neural networks after training. The connections between the assemblies or electronic components can also follow a proven network pattern derived from previous artificial hardware-based neural networks, separate models, or training runs. This has the advantage that the artificial hardware-based neural network can be produced in large quantities as a consistently identical semiconductor chip.In contrast to previous FPGA chips and other artificial hardware-based neural networks, the artificial hardware-based neural network in this embodiment can no longer be trained directly. This means that connections in the artificial hardware-based neural network can no longer be added or removed by external wiring. The highly complex switching matrix previously required for this is no longer necessary, which significantly simplifies the semiconductor system.

[0183] In this example, the respective electronic assemblies or components can instead be provided with optically addressable components, for example photoresistors, photodiodes and / or phototransistors, during chip processing and, if necessary, modified compared to conventional switching technology so that each of the millions of assembly fields can be influenced at one or more points via optical coupling. However, instead of or in addition to the optically addressable components, acoustically, capacitively, electromagnetically, quantum mechanically, ohmically, thermally and / or ionizingly addressable components can be used. The explanations for this example apply analogously to each of the previously explained component addressing options.

[0184] For example, a corresponding assembly can be created by replacing some of the non-light-sensitive components typically already present in the respective electronic circuit and inserting additional light-sensitive components. The replacement does not have to follow any electrical logic or sensible reason.

[0185] This is illustrated by way of example in Fig. 19A and Fig. 19B for an analog circuit, and Fig. 20A and 20B for a digital circuit, each showing a discrete component diagram. In principle, any circuit commonly used in electronics can be used and modified in this way. The more complex the circuits, the more possibilities for optically induced influence arise, as in this example.

[0186] Fig. 19A shows an instrumentation amplifier. Fig. 19B shows exemplary modifications using photoresistors, which can replace existing individual resistors or resistors in groups, or can be introduced additionally. The additional photoresistor branch does not represent a meaningful electrical change, but it does significantly influence the signal flow of the amplifier. This is precisely a characteristic of the inventive modifications in the basic circuits of the artificial hardware-based neural network.

[0187] In an analogous manner, all possible analog circuits as are commonly used in electronics are suitable for such modifications, which can also have photodiodes, phototransistors and other light-sensitive components or components that can be addressed in other ways as explained above, individually or in combination. The appropriately modified circuits are processed in a known manner using semiconductor technology in a multi-level design, so that the above-mentioned miniaturization permits the high number of component fields, which is preferably at least in the upper million range, on the chip. Appropriate optical couplings can then also be introduced, for example, into elements such as operational amplifiers themselves, which in semiconductor technology are also processed from transistors, resistors, etc. on a silicon chip.Assuming an average of 3 to 15 photoelements per basic circuit, the possible influences at the local semiconductor chip level in a 2-inch chip amount to several billion, which is more than enough variation potential for a neural network.

[0188] Fig. 20B shows, as an example, corresponding modifications for a digital circuit using a NAND gate. Fig. 20A shows the conventional circuit implemented with discrete components using diode-transistor logic technology.

[0189] A further inventive deviation from the conventional semiconductor implementation in the artificial hardware-based neural network is that the assembly fields are not permanently connected to a common supply voltage (U ss) but via a switching element, for example a photoresistor, a photodiode, a phototransistor or even without light sensitivity via a thyristor, field effect transistor etc., each of which is connected separately. The switching element can be used to switch the supply voltage for the corresponding electronic component of the artificial hardware-based neural network on and off and to dim it. The array-like structure of the semiconductor chip for the artificial hardware-based neural network can, as shown in Figure 21, be explained for example by means of a chip 211 with side lengths a and b of 2 inches each, on which the assembly fields with the photo-modified circuits 212 are located in an arrangement of rows n and columns m.Each module circuit can have inputs and outputs which can be permanently connected to other modules, even in several levels, and which can together form the complex structure of the artificial hardware-based neural network. With typical dimensions c and d of the module fields of 1 pm to 5 pm each, this results in total numbers of 10 million to several hundred million electronic module fields or individual circuits according to Fig. 19A, B and 20A, B. Both the processing of the individual circuits and the creation of the connections between the electronic components across several levels can be carried out, for example, according to the state of the art, as can the definition of an input and output area. The flat surface of the chip can be kept optically transparent for the coupling of light.

[0190] To selectively influence the component arrays of the artificial hardware-based neural network, an LED array with the highest possible resolution and the same or similar dimensions as the artificial hardware-based neural network can be used as a perturbation device. The perturbation device can be galvanically decoupled from the artificial hardware-based neural network. Such arrays can be state-of-the-art and made of, for example, indium gallium nitride as a material. Furthermore, due to the currently comparatively low light output, they can be limited to pixel pitch dimensions of approximately 10 pm (fine pixel pitch LED technology).However, as light-sensitive LCD chips in digital cameras demonstrate, it is technologically possible to reduce the size of LED elements in arrays to pixel pitch dimensions in the sub-micrometer range (down to 50 nm), because the high light output required for large screens or displays is not important in the application described here. Such miniaturization is advantageous, but not absolutely necessary. It is sufficient to enable very local illumination of the surface of the artificial hardware-based neural network, if possible separately for each light-sensitive electronic component of the artificial hardware-based neural network. In this arrangement, light output plays a subordinate role for artificial hardware-based neural networks, in contrast to screens, so that optical near-field effects can also be used, which allow very local illumination in the sub-micrometer range.

[0191] Since such arrays are typically used to create small screens, light strips, and the like, the LED elements can also be controlled using state-of-the-art technology, allowing any desired light pattern to be generated, the resolution of which depends only on the number of pixels and the pixel pitch ratio. In addition to LEDs, other miniaturized light sources can also be used in array form, e.g., OLEDs or QDOTs.

[0192] In the application described here, the aim is to generate a light pattern with the highest possible resolution; normally, light / dark of any wavelength is sufficient to illuminate the artificial hardware-based neural network. Where a light-emitting LED element is located above a photosensitive assembly field of the artificial hardware-based neural network, this circuit can be selectively changed in its electrical behavior, as is indicated, for example, in Fig. 22C. For this purpose, the interference device 222 is positioned overhead and at a small distance, for example in the sub-millimeter range and below, above the artificial hardware-based neural network 221, as shown in Fig. 22A. In this example, the interference device 222 has a large number of LED elements 224 as interference elements, although only a section of the LED elements 224 is shown in Fig. 22A.To laterally limit the light irradiation of the LED elements 224 and make it even more localized, a mask 411 can be arranged between the artificial hardware-based neural network 221 and the interference device 222, as shown in Fig. 22B. To avoid difficult adjustments in this sandwich structure, the mask 411 can also be processed directly on a transparent surface of the artificial hardware-based neural network as a thin layer, particularly in the micrometer to submicrometer range. Diffractive elements and / or light of different wavelengths, possibly combined with optical filters, can also be used.

[0193] The designations in Fig. 22A-C are as follows: 223 - section of electronic assembly fields; 224 - section of LED elements; 228 and 410 - light-sensitive components in the basic circuit field 223; 411 and 412: mask with openings 227. Fig. 22B shows a sectional view of one of the array fields of the interference device 222 and an electronic component field of the artificial hardware-based neural network, as well as a control device 225 for providing control signals for switching elements. The control device can be designed analogously to the interference device.

[0194] As a result of training the artificial hardware-based neural network, a complex light pattern can be generated across the array of LED elements in the perturbation device, which shapes the artificial hardware-based neural network and defines its purpose for use as artificial intelligence. Due to the multitude of possible influences due to millions of LED pixels and many photosensitive components in the basic circuit fields of the artificial hardware-based neural network, a comparable number of degrees of freedom can now exist as those required for training an artificial hardware-based neural network, which can also be referred to as artificial intelligence, without anything having to be changed in the hardware structure of the artificial hardware-based neural network.The technologically difficult task of connecting and disconnecting electrical connections between nodes in conventional artificial hardware-based neural networks has been replaced by the generation of individual illumination patterns and the introduction of numerous light-sensitive electronic components. The generation of illumination patterns can be computer-controlled, thus eliminating the limitations in upscaling artificial hardware-based neural network systems and the training problems. At the same time, compatibility with digital computers is ensured. The number of degrees of freedom for manipulation can be increased by using different wavelengths of light, time-dependent signals, etc.The perturbation device is galvanically decoupled in the form described, which greatly simplifies the multi-level structure of the semiconductor component of the artificial hardware-based neural network.

[0195] To further increase the degrees of freedom and the possibilities for further influencing the semiconductor chip array of the artificial hardware-based neural network using purely electrical means, a switching array can be used as part of a control device. This allows the supply voltages of the individual basic circuit fields or electronic components of the artificial hardware-based neural network to be switched on and off or dimmed. This can be done in a separate chip system and is explained below using a second optical, galvanically isolated array as an example. Alternatively, it can be integrated in galvanically coupled form into the semiconductor chip of the artificial hardware-based neural network.

[0196] As shown in Fig. 22A, the semiconductor chip 221 with the array of modified basic circuits 223, which are part of the artificial hardware-based neural network, can be made optically transparent on the top and bottom and placed between the perturbation device 222 and the control device 225, both of which can consist of LED arrays 224 and 226. The arrows indicate how the arrays can be mounted from below and above on the surface of 221. A section through the 3-component system consisting of the perturbation device 222, the artificial hardware-based neural network 221, and the control device 225 is shown schematically in Fig. 22B. The semiconductor chip of the artificial hardware-based neural network with its many layers 413, which can form the basic circuit fields 223 and can contain light-sensitive elements 228, is located in the middle.On the underside it can have an opaque thin layer 229 so that the light from the array of LEDs 226 of the control device 225 only reaches the photosensitive components 410 in the supply voltage control of all the base circuits, but cannot go any further to the photosensitive components 228 in the base circuit levels and vice versa for the upper light level of the interference device. On the underside too, a layer with the function of a diaphragm 412 can be processed or inserted analogously to layer 411, as for the upper LED array. The LEDs 224 and 226, only three shown hatched here, can, depending on the trained pattern, irradiate the photosensitive components 228 of the base circuit fields through the diaphragm layers and, from below, irradiate the light-sensitive dimming transistors 410, for example, for generating the individual supply voltages.By influencing the supply voltage of each of the millions of basic circuit fields from below via the control device, the circuits of the array of the artificial hardware-based neural network can be switched on, off or dimmed individually and independently of one another.

[0197] The control device 225 can also be used to train the artificial hardware-based neural network and can form a second two-dimensional light pattern. This can significantly increase the number of possible modifications of the overall device.

[0198] The connection, interruption, or dimming of the supply voltage can be achieved via electrical switching elements, in particular phototransistors, photoresistors, photodiodes, thyristors, field-effect transistors, Zener diodes, etc., and also in miniaturized form using conventional semiconductor processing. An example circuit showing how the supply voltage U ss The switching and dimming of the individual base circuits via phototransistors TI and T2 is shown in Fig. 22C for two base circuit arrays 223 BS1 and BS2. Only when light falls on the transistors TI and / or T2 is the supply voltage applied to the respective base circuit array BS1 and / or BS2 of the artificial hardware-based neural network.

[0199] However, the execution of the

[0200] Control device for influencing the supply voltage via a second photo array, because this is also galvanically isolated and coupled to the artificial hardware-based neural network. Dimming in particular corresponds to a shift in the weights of the individual basic circuit components of the overall network. Seen in this way, the component arrays of the artificial hardware-based neural network can represent the nodes of the artificial software-based neural networks in an analogous manner. Dimming can change their weight, while switching nodes on or off, adding or removing nodes and influencing the electrical behavior of the circuit via light coupling can represent a process analogous to that in the artificial hardware-based neural network of this example, making and breaking connections in the artificial software-based neural network.The example illustrates the high number of changes that can now be easily controlled electronically and computer-aided in highly scaled, complex networks, as required for artificial intelligence systems, thus eliminating the previous disadvantages of artificial hardware-based neural networks.

[0201] An overview diagram with a section of the overall device system is shown in Fig. 23. It is a compact chip-based sandwich structure, comprising the artificial hardware-based neural network 221 with the basic circuit fields 223, hatched, the disturbance device 222 with the LED array 224, the mask 235, the control device 226, and a switching element array 237 for controlling the supply voltage USS of the individual basic circuit fields 223 of the artificial hardware-based neural network.

[0202] The system can be trained by using known learning algorithms to make changes only to the interference device and the control device, but not, as has been the case so far, to the artificial hardware-based neural network. For example, LED controls can be changed randomly, new LED controls can be introduced into the pattern, and basic circuit fields can be switched off and new ones switched on or dimmed according to a learning algorithm. With a sufficient number of iteration steps, the artificial hardware-based neural network can learn by developing its properties through the coupling of the light pattern developing in the interference device in combination with the second light pattern, which can also develop as an array pattern in the control device and can influence the photosensitive components of the artificial hardware-based neural network.Due to the enormous number of possible settings of such a combination of components, particularly in the multi-digit billion range, the inventive system corresponds in its degrees of freedom and learning to the avoidable physical detaching and coupling of conventional or artificial hardware-based neural networks, but without the previous technological disadvantages.

[0203] The training procedure can be variable and operates according to the principle of making a change only if the result does not serve the training goal. For example, the step size can be varied by changing the number and type of changes per learning cycle. For the training procedure, a known method from the state of the art can be used.

[0204] As explained in the example according to Figures 19A to 22, the training of the system can be carried out to an optical, two-dimensional array pattern with a resolution of more than 10 7 up to 10 9 and more pixels and a switching pattern of more than 10 8 Switching states, also in two-dimensional array form. These numbers reflect the enormous possibilities for influencing the artificial hardware-based neural network. The decisive advantage is that both arrays are independent of each other, and the patterns of the arrays develop individually through training. At the end of the training, they are fully defined, particularly in their xy coordinates, and are stored as control patterns for the perturbation device and the control device.

[0205] If we take image recognition as a training example, for example distinguishing between wolves and dogs, then the training leads to two individual array patterns, one pattern in the jamming device and another pattern in the control device, which the system classifies correctly with a high hit rate. If we repeat the training with other images, other patterns emerge which also lead to a high hit rate. The patterns of the arrays can therefore be referred to as individual patterns. These patterns can be stored in separate electronics or a connected computer, for example like a digital image. They can be retrieved at a later time and can be regenerated by the jamming device and the control device and thus repeated without the hardware structure of the artificial hardware-based neural network being changed.

[0206] This is a key advantage, as the entire system can be trained again, e.g. to distinguish between beech and oak trees. This will result in two other array patterns, which are also saved so that they can be recalled later. This can be repeated with any number of training objectives. The result is a library of array pattern combinations of the jamming device and the control device, each as pairs, which, when loaded from memory and generated on the jamming device and the control device, can allow the artificial hardware-based neural network to use exactly the distinctions achieved during training. This means that with one pattern pair the artificial hardware-based neural network can recognize and distinguish between wolves and dogs, with another between beech and oak trees, and so on.

[0207] The particular advantage of the device according to the invention compared to artificial software-based neural networks is that the artificial hardware-based neural network of the device can produce results very quickly after training has been completed because it does not have to run through an extensive computer program. The speed advantage arises because, when input signals are applied, a large number of pulses pass through the chip of the electronic network at the speed of sound of the electronic components, with the switching frequencies generally being in the upper MHz to GHz range. Since a large number of pulses pass through the electronic network in parallel, coupled forwards and backwards, but also delayed and sometimes one after the other, the result is available very quickly after one pass through the chip, i.e. in the millisecond, microsecond range or even shorter.

[0208] The step toward a more widely usable, even universal AI is now achieved through the serial retrieval of, for example, pattern pairs one after the other from any number of pattern pairs for all possible, already trained discrimination tasks. A certain degree of universal intelligence has already been achieved if the system has been trained in such a way that, for example, given an image at the input and the dog-wolf distinction, it only has three possible answers:

[0209] 1 . It's a wolf!

[0210] 2 . It's a dog !

[0211] 3 . It is neither of the two!

[0212] The device can be used as a universal artificial intelligence as follows: An image is applied to the device's inputs, e.g. a landscape with trees, houses, animals, cars, etc., and the jamming device and the control device generate one pattern pair after the other, already obtained from training, whereby the same input image can be used each time. The device's determined responses are stored for each pattern pair. If one run of the device takes, for example, 1 ms, then in 1 s you get 1,000 answers of the type: it is a dog / it is a beech tree / it is a house / it is not a fish / it is not a mountain, etc. If you take the answers that confirm something, then you already have a description of what can be seen in the image, a first interpretation. This could be a step towards universal intelligence.

[0213] The diagram of the device according to the example from Figures 19A to 23 can be expanded for multiple to universal use via a peripheral, as is shown by way of example in Figure 24. 241 designates the device with the interference device 222 as an optical array and the control device 225 as a supply voltage switching array, with the artificial hardware-based neural network 221 in between. 242 stands for an input module via which, for example, images in a standardized pixel representation can be input. 243 represents the control electronics for the LED array of the interference device and 244 represents a memory for the array patterns which stores the control data of the individual training results and can generate them in the interference device via the control electronics 243 if required. Analogously, 245 stands for control electronics of the switching device and 246 for a memory for the switching array pattern. The memories 244 and 246 may form a common memory.The result is further processed in 248 , listed , displayed on a screen or acoustically .

[0214] Even though a serial query of the pattern pairs to be fed in takes time, this is more than compensated for by another advantage. Currently, increasingly powerful artificial hardware- and software-based neural networks require ever more extensive networks with a more than linear increase in complexity, which, among other things, leads to the limitations already described. The solution presented here also reduces this problem of an unmanageable increase in complexity and effort, because the artificial hardware-based neural network, whose hardware structure remains unchanged, is always used to answer the various questions.The problem of technologically difficult network expansion is shifted to the generation of a large number of corresponding pattern pairs, which is much simpler in terms of data technology and information technology than hardware or software network expansion.

[0215] The following is an estimate of the switching speeds / clock rates of a device according to Fig. 24.

[0216] LEDs have switching times of less than 1 ps with peak values ​​between 1 ns and 10 ns . The response delay of the LED in an array is therefore not time-limiting in the presented case, but rather the control of the LED array until the complete light pattern is formed . The data transmission to the arrays would be carried out via electrical conductors in this example . The achievable transmission rates for these are currently between 1 Gbit / s and 40 Gbit / s , e.g. mass storage interface SATA Express , serial interfaces such as SAS-1 and -3 or Serial ATA, Thunderbolt interfaces, USB 4 . Assuming an LED array of 10 7pixels, the switching rates for the pixel patterns of the entire array are in the ms range and below, with the current image refresh rates for large LED screens being 360 frames / s and for small LED displays 1920 and 3840 frames / s. By parallelisation this can be reduced again by a factor of 10, so that it can be assumed that around 1,000 to 30,000 patterns / s can be generated. The great advantage of the device is its rapid throughput which, as already explained, is determined by the switching times of the electronic components and the length of the dominant connections in the network. If one assumes switching frequencies in the upper MHz up to GHz, e.g. CMOS technology, then the operating speed or the clock rate of the usability of the artificial hardware-based neural network is in the ms range and below.This means that the artificial hardware-based neural network can provide more than 1,000 decisions per second regarding pattern changes. This rate can also be increased by parallelizing multiple devices. This results in potential clock rates for various device queries of 1,000 to 10,000 per second.

[0217] To increase the security of such AI systems, the manufacturer or operator can generate special pattern pairs. When loaded onto the arrays, these pairs produce a known, specific response, demonstrating that the artificial hardware-based neural network has not been altered, replaced, or otherwise tampered with, particularly as a challenge response procedure and as a test task. This also fulfills the requirement of enabling authentication using one or more test patterns.

[0218] Updates can be implemented in the AI ​​system by loading additional or improved pattern pairs into the corresponding memories (cf. Fig. 24), since the semiconductor chip of the artificial hardware-based neural network can remain unchanged during these extensions. Fig. 25 shows a device system comprising several levels. For example, the image of an animal 252 in pixel format is fed into the input level 251. Levels 253 and 254 can be chips of different dimensions according to Fig. 22, which can be followed by others (represented by dots). Level 253 is, for example, more complex than level 254 and can have, for example, more than a million circuit modules. Level 254 can be less complex than level 253, e.g., have fewer than 10,000 circuit modules.Each layer again includes two LED arrays 256, 257 and 258, 259, which can then have different dimensions, for example, in the number of LED elements. Output layer 255 can present the result. In this example, the statement "It is a lion" in written form.

[0219] Fig. 26 illustrates the serial query of a device that has been trained with n different LED array pattern pairs to recognize animals, faces, landscapes, etc. This can be done sequentially in an ordered, here t x , t2, t3... t n, or even in a random chronological sequence. The device shown would perform a classification into broad categories, e.g., when presented with the image of a giraffe, the classification "Is an animal." This could be followed by another device of this type, which then, when presented with the image of an animal, performs further and more detailed classifications and recognizes what type of animal it is ("giraffe"). A subsequent device could now have been trained on giraffes and recognize that it is the head of a specific species of giraffe (e.g., "Africa, Serengeti, adult, female"), etc.

[0220] More complex arrangements and systems with universal intelligence can be developed using such hierarchically structured devices.

[0221] Fig. 27 shows the overall structure in its parts more clearly and also summarizes the possibilities of light influences on the circuit blocks of the central network electronics.

[0222] The luminous flux of each pixel can be either over the working period of the central network (ie, during the run after application of an image): a) constant, b) a function of time (alternating or discontinuously periodic) and / or c) stochastic (superimposed noise).

[0223] The example described above does not limit the invention in any way. Rather, the invention can be modified in many ways. All of the features of the invention described above can be essential to the invention alone or in combination with one another.

Claims

Claims Device for operating a hardware-based artificial neural network, comprising at least one hardware-based artificial neural network (11, 24, 32, 41, 51, 71, 81, 101, 111, 121, 131, 171, 221) with a plurality of electrically interconnected network nodes, wherein each network node has at least one electronic component, characterized in that the hardware-based artificial neural network has in particular an unchangeable hardware structure, wherein the device has at least one disturbance device (12, 22, 35, 42, 52a, 52b, 72, 82, 102, 112, 122, 132, 172, 222, 225) for coupling at least one Interference signal in at least one area of ​​the hardware-based artificial neural network and at least one coupling device (15, 23, 34, 43, 53a, 53b, 73, 83, 103, 113, 123, 133, 173), wherein the coupling device is arranged between the interference device and the hardware-based artificial neural network and is designed to transmit the at least one interference signal from the interference device into the entire at least one area and / or wherein the device has at least one switching element that can be controlled separately by means of at least one control signal for dimming and / or switching a supply voltage for the at least one electronic component on and off.Device according to claim 1, wherein the hardware-based artificial neural network has at least one component in the at least one region which is designed to reduce the signal-to-noise ratio upon receipt of the at least one interference signal, wherein the interference device preferably generates an optical, acoustic, capacitive, electromagnetic, quantum-mechanical, ohmic, thermal and / or ionizing interference signal and / or the switching element is preferably designed to receive an optical, acoustic, capacitive, electromagnetic, quantum-mechanical, ohmic, thermal and / or ionizing control signal. Device according to one of the preceding claims, wherein the interference device has a plurality of individually controllable interference elements (72a) for coupling an interference signal into the hardware-based neural network, wherein the interference elements preferably couple an interference signal into different regions of the hardware-based artificial neural network. Device according to claim 3, wherein the plurality of interference elements are distributed on a plane, preferably arranged in an array, wherein the coupling device has a medium with a plurality of coupling elements (73a, 83a, 103a, 113a) for transmitting the at least one interference signal into the at least one region, wherein the coupling elements, like the interference elements, are distributed on the plane.Device according to one of claims 1 to 4, wherein the at least one region has an extent that corresponds to the extent of the hardware-based artificial neural network or is smaller than the extent of the hardware-based artificial neural network. Device according to one of the preceding claims, wherein the device has at least one semiconductor chip, wherein the semiconductor chip has the hardware-based artificial neural network. Device according to one of the preceding claims, wherein the device has a shielding device (14, 36) for shielding external interference signals that are of the same type as the at least one interference signal, wherein the shielding device surrounds the hardware-based artificial neural network, the coupling device and the interference device.Device according to one of the preceding claims, wherein the device further comprises at least one memory for storing the at least one interference signal used by the at least one interference device and / or the at least one control signal, at least one control unit for controlling the. at least one disturbance device and / or the at least one switching element, and / or at least one output unit for outputting a, in particular further processed, output signal of the hardware-based artificial neural network. Device according to one of the preceding claims, wherein the disturbance device is designed as a control device for providing at least one control signal for at least one switching element. Method for training an artificial neural network in a device according to one of claims 1 to 9, wherein the method (180) comprises at least the following steps: Defining ( 181 ) target output data when processing provided training data; feeding ( 182 ) the training data into the hardware-based artificial neural network and coupling at least one interference signal into the at least one region of the hardware-based artificial neural network by means of the at least one interference device; Determining ( 183 ) output data of the hardware-based artificial neural network; Determining ( 184 ) whether there is at least one deviation between the output data and the target output data which is outside a predetermined tolerance range ; if the deviation is within the tolerance range : Terminating ( 185 ) the method ; and if the deviation is outside the predetermined tolerance range : Changing ( 186 ) the at least one interference signal and / or changing the at least one control signal, andRepeating (187) the aforementioned steps 182 to 184 and in particular 185 or 186. Method according to claim 10, wherein by means of the coupled-in interference signal in the at least one region a signal-to-noise ratio of at most 15 dB, preferably at most 10 dB, more preferably at most 0 dB is generated. Method according to claim 10 or 11, wherein the hardware-based artificial neural network remains unchanged in its structure. Method according to one of claims 10 to 12, wherein the most recently determined interference signal and / or control signal is stored, preferably together with a marker value for identifying the target output data used, wherein the method is carried out at least once again with the same device with changed target output data and training data after the step of terminating (185) the method.Method according to one of claims 10 to 13, wherein the interference signals and / or control signals are test signals, wherein, when using the test signals when feeding in predefined test data, predefined output data are only provided if no part of the hardware-based artificial neural network is damaged, replaced and / or tampered with. Use of a device according to one of claims 1 to 9, wherein the device is operated sequentially with at least two different signal sets, in particular for different tasks, wherein each signal set has at least one interference signal and / or control signal.

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