Heterostructure and method of forming the same

Abstract

Various embodiments may relate to a heterostructure including a substrate and a buffer layer on the substrate, a first region of the buffer layer having a regrowth portion. The heterostructure may further include a fully strained channel layer on a second region of the buffer layer such that two dimensional hole gas is formed at an interface between the fully strained channel layer and the second region of the buffer layer. The heterostructure may additionally include a fully relaxed channel layer on the regrowth portion of the buffer layer. The heterostructure may also include a fully strained or completely lattice matched barrier layer on the fully relaxed channel layer such that two dimensional electron gas is formed at an interface between the fully strained or completely lattice matched barrier layer and the fully relaxed channel layer, wherein the first region of the buffer layer having the regrowth portion.

Description

HETEROSTRUCTURE AND METHOD OF FORMING THE SAMECROSS-REFERENCE TO RELATED APPLICATION

[0001] This application claims the benefit of priority of Singapore application No. 10202260366P filed December 8, 2022, the contents of it being hereby incorporated by reference in its entirety for all purposes.TECHNICAL FIELD

[0002] Various embodiments of this disclosure may relate to a hetero structure. Various embodiments of this disclosure may relate to a method of forming a heterostructure.BACKGROUND

[0003] Complementary metal-oxide semiconductor (CMOS) technology is the semiconductor technology used in most of today's integrated circuits (ICs), also known as chips. The building blocks of the CMOS are complementary n-channel and p-channel semiconductors-based transistors in a single IC. Silicon (Si) semiconductor-based CMOS technology has revolutionized the electronics industry. Silicon CMOS is highly successful, and both n-channel and p-channel transistors are readily available. However, with ever increasing usage of electronic devices, energy consumption is also increasing, and most of the energy consumption is wasted on stepping down the voltage to CMOS compatible voltages of ~1 V.

[0004] With high voltage complementary technology, without the usage of several stepdown stages, one can directly convert the voltage from high voltage (~50 V) to 1 V, which is used for various electronic applications. High voltage complementary technology not only saves energy but also reduces the size of electronic systems. This will directly translate into more energy efficient and compact technologies. Wide bandgap semiconducting materials are suitable for developing high voltage complementary technology.

[0005] Out of the limited choices of the wide bandgap materials (such as gallium nitride (GaN), silicon carbide (SiC), and gallium oxide (Ga2Os)) for the development of high voltage complementary technology, gallium nitride (GaN) comes as a front runner. GaN with a large bandgap and high saturation velocity enables not only high voltage and high power operation, but also enables high frequency operation. In the communication sector, with wireless communication networks continuously pushing the frequency of operation to much higherlimits, transistor amplifier technology that can operate not just at higher frequencies but also with better output power and efficiency is required. GaN based n-type high electron mobility transistors (HEMTs) have been evolved to meet the above mentioned requirements. However, the lack of complementary p-channel transistor technology in the GaN system has long been the fundamental obstacle for the development of energy-efficient high speed GaN technologies. Currently, GaN n-channel transistors in electronic systems are slowed down to be compatible with the operational speed of Si CMOS technologies, which is neither an energy efficient nor a higher frequency option.

[0006] The lack of nitride complementary technology can be attributed to the lack of suitable p-type dopants that can result in nitride p-channel transistors with higher conductivity and higher current operation. Recently, efforts to realize GaN p-type transistors have been increased, resulting in the evolution of three choices of promising technologies for GaN p- channel transistors and for developing nitride complementary technology. The first of the three choices is p-type GaN transistors with an magnesium-doped (Mg-doped) GaN channel. Even though the technology is promising, the conductivity achieved was lower due to the higher activation energy of Mg, which is 100 - 200 meV, limiting its suitability for high performance p-channel transistors and complementary technology. The second choice uses polarization induced doping, where heterojunction between GaN and temary / quatemary materials such as gallium nitride / aluminum gallium nitride (GaN / AlGaN), indium gallium nitride / gallium nitride (InGaN / GaN), and gallium nitride / aluminum indium gallium nitride (GaN / AlInGaN) were explored. In these heterostructures, the two-dimensional hole gas (2DHG) is generated at the interface between undoped GaN and the back barrier layer, resulting in improved conductivity compared to the choice 1 structure. However, due to the lower concentration of 2DHG, the conductivities achieved were still below the levels required for high performance transistors. Moreover, in most of these heterostructures, it was found that a single or multiple Mg-doped p-type layers on the surface of polarization induced p-type layer is necessary to stabilize the 2DHG in the system. On the other hand, the third choice of technology uses undoped GaN / AlN layers with GaN pseudomorphically grown (resulting in fully strained GaN layers) over the AIN layer. Such a system demonstrated high conductivity hole gas, and p- channel HEMTs were demonstrated with high current densities of 420 mA / mm and high frequency of operation of 20 GHz fr / fMAx.

[0007] With the demonstration of GaN-based p-type HEMT using fully strained GaN / AlN heterostructure, nitride complementary technology was proposed on the AIN platform. The main idea for developing complementary technology on the AIN platform is to achieve high density two-dimensional electron gas (2DEG) at the top AlN / GaN interface and hole gas at the bottom GaN / AIN interface in an AlN / strained GaN / AlN heterostructure. In addition, the AIN platform provides a huge back barrier, thus reducing the spreading of the 2DHG into the buffer, resulting in improved device gain and efficiency. Moreover, the high thermal conductivity of AIN provides a better heat sink, improving the reliability of GaN HEMTs. It has been proposed that inductively coupled plasma-reactive ion etching (ICP-RIE) etching of the AIN barrier eliminates the upper 2DEG, revealing the 2DHG for the p-type HEMT development. However, in such a proposal, etch-exposed p-channel and 2DHG stability would still need to be addressed. Further, recess control plays a crucial role in such a technology, which has often been considered very challenging for reproducibility. Moreover, a lot of optimizations are required for the ohmic / Schottky contact formation on such an etch exposed surface. In addition, the coexistence of 2DEG and the buried 2DHG always results in a parallel conduction path for n-channel transistors. Moreover, the proximity of polarization charges in the AlN / strained GaN / AlN hetero structure leads to the partial depletion of 2DEG and 2DHG, results in lesser control over the charge of the individual channels. It limits the design of these heterostructures for high power and high frequency applications.SUMMARY

[0008] Various embodiments may provide a hetero structure. The heterostructure may include a substrate. The heterostructure may also include a buffer layer on the substrate, a first region of the buffer layer having a regrowth portion. The hetero structure may further include a fully strained channel layer on a second region of the buffer layer such that two dimensional hole gas (2DHG) is formed at an interface between the fully strained channel layer and the second region of the buffer layer, wherein the second region of the buffer layer and the fully strained channel layer form a p-channel portion of the heterostructure. The heterostructure may additionally include a fully relaxed channel layer on the regrowth portion of the buffer layer, the fully relaxed channel layer separated from the fully strained channel layer by a gap. The heterostructure may also include a fully strained or completely lattice matched barrier layer on the fully relaxed channel layer such that two dimensional electron gas (2DEG) is formed at aninterface between the fully strained or completely lattice matched barrier layer and the fully relaxed channel layer, wherein the first region of the buffer layer having the regrowth portion, the fully relaxed channel layer and the fully strained or completely lattice matched barrier layer form a n-channel portion of the hetero structure. The n-channel portion of the hetero structure may be devoid of two dimensional hole gas (2DHG).

[0009] Various embodiments may provide a method of forming a hetero structure. The method may include forming a buffer layer on a substrate, a first region of the buffer layer having a regrowth portion. The method may also include forming a fully strained channel layer on a second region of the buffer layer such that two dimensional hole gas (2DHG) is formed at an interface between the fully strained channel layer and the second region of the buffer layer, wherein the second region of the buffer layer and the fully strained channel layer form a p- channel portion of the heterostructure. The method may further include forming a fully relaxed channel layer on the regrowth portion of the buffer layer, the fully relaxed channel layer separated from the fully strained channel layer by a gap. The method may additionally include forming a fully strained or completely lattice matched barrier layer on the fully relaxed channel layer such that two dimensional electron gas (2DEG) is formed at an interface between the fully strained or completely lattice matched barrier layer and the fully relaxed channel layer, wherein the first region of the buffer layer having the regrowth portion, the fully relaxed channel layer and the fully strained or completely lattice matched barrier layer form a n-channel portion of the hetero structure. The n-channel portion of the hetero structure may be devoid of two dimensional hole gas (2DHG).BRIEF DESCRIPTION OF THE DRAWINGS

[0010] In the drawings, like reference characters generally refer to the same parts throughout the different views. The drawings are not necessarily drawn to scale, emphasis instead generally being placed upon illustrating the principles of various embodiments. In the following description, various embodiments of the invention are described with reference to the following drawings.FIG. 1 is a general illustration of a heterostructure according to various embodiments.FIG. 2 is a general illustration of a method of forming a hetero structure according to various embodiments.FIG. 3A is a schematic of a hetero structure according to various embodiments.FIG. 3B is a schematic of the heterostructure shown in FIG. 3A after reactive ion etching (RIE) or inductive coupled plasma-reactive ion etching (ICP-RIE) according to various embodiments.FIG. 4A is a schematic of another heterostructure according to various embodiments.FIG. 4B is a schematic of the hetero structure shown in FIG. 4A according to various embodiments, but in which the interface between the fully relaxed channel layer and the regrowth portion of the buffer layer is at a same level as the interface between the fully strained channel layer and the second region of the buffer layer.FIG. 5 is a schematic of yet another hetero structure according to various embodiments.FIG. 6 shows the schematic of a cross-section of the unintentionally doped (UID) gallium nitride / aluminum nitride (GaN / AlN) heterostructure according to various embodiments.FIG. 7 shows (a) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x- axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (a) according to various embodiments; (b) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (b) according to various embodiments; a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx (* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (c) according to various embodiments; and (d) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (d) according to various embodiments.FIG. 8 shows a table summarizing the sheet resistance, mobility, sheet carrier concentration, and type of charge carriers for all samples (a) - (d) according to various embodiments.FIG. 9 shows a plot of capacitance (x IO10Farads or F) as a function of applied bias (in volts or V) illustrating the capacitance-voltage (C-V) measurements on samples (a) and (c) according to various embodiments, with the inset showing an optical microscopy image of the contact.FIG. 10 shows a plot of two-dimensional hole gas (2DHG) concentration (x 1013per square centimeters or cm-2) as a function of gallium nitride (GaN) thickness (in nanometers or nm) illustrating the variation of 2DHG concentration with channel thickness for different GaN surface potentials ((|)) of 0.5, 1.0, 1.5, 2.0, and 2.5 eV according to various embodiments.FIG. 11 shows a schematic of a gallium nitride / aluminum nitride / gallium nitride / aluminum nitride (GaN / AlN / GaN / AlN) heterostructure on the silicon carbide (SiC) substrate according to various embodiments.FIG. 12 shows (a) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x- axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (e) according to various embodiments; and (b) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (f) according to various embodiments.FIG. 13 shows a table summarizing the results of Hall effect measurements performed on sample (e) and sample (f) according to various embodiments.FIG. 14 shows (a) a plot of energy bands Ec, EF, EV (in electron-volts or eV) / carrier concentration (x IO20per cubic centimeter or cm-3) as a function of depth (in nanometers or nm) illustrating the calculated energy band profiles as well as the calculated two-dimensional electron gas (2DEG) and two-dimensional hole gas (2DHG) of sample (e) according to various embodiments; and (b) a plot of energy bands Ec, EF, EV (in electron-volts or eV) / carrier concentration (x IO20per cubic centimeter or cm-3) as a function of depth (in nanometers or nm) illustrating the calculated energy band profiles as well as the calculated two-dimensional electron gas (2DEG) and two-dimensional hole gas (2DHG) of sample (f) according to various embodiments.FIG. 15 shows (a) a plot of capacitance (x IO10Farads or F) / integrated charge (x 1013cm-2) as a function of applied bias (in Volts or V) illustrating capacitance and integrated charge as a function of applied bias according to various embodiments; and (b) a plot of carrier concentration (per cubic centimeter or cm-3) as a function of thickness (in nanometer or nm) illustrating the estimated carrier concentration from capacitance-voltage (C-V) measurements as a function of sample thickness according to various embodiments.FIG. 16A shows a schematic of a N-polar high-electron-mobility transistor (HEMT) heterostructure according to various embodiments.FIG. 16B shows a plot of energy bands Ec, EF, EV (in electron-volts or eV) / carrier concentration ns(x IO20per cubic centimeter or cm-3) as a function of thickness / depth from surface (in nanometers or nm) illustrating the simulated energy band profiles as well as the simulated two-dimensional electron gas (2DEG) and two-dimensional hole gas (2DHG) distribution as a function of thickness / depth according to various embodiments.FIG. 16C shows a plot of capacitance (x IO10Farads or F) / integrated charge (x 1012per square centimeter or cm-2) as a function of applied bias (in Volts or V) illustrating capacitance and integrated charge as a function of applied bias obtained using a Schottky contact of 100 pm diameter according to various embodiments.FIG. 16D shows a plot of carrier concentration (per cubic centimeter or cm-3) as a function of thickness / depth illustrating the estimated carrier concentration from capacitance-voltage (C- V) measurements as a function of sample depth / thickness (in nanometers or nm).FIG. 17 shows a table summarizing the Hall measurements on N-polar high-electron-mobility transistor (HEMT) heterostructure.DESCRIPTION

[0011] The following detailed description refers to the accompanying drawings that show, by way of illustration, specific details and embodiments in which the invention may be practiced. These embodiments are described in sufficient detail to enable those skilled in the art to practice the invention. Other embodiments may be utilized and structural, logical, and electrical changes may be made without departing from the scope of the invention. The various embodiments are not necessarily mutually exclusive, as some embodiments can be combined with one or more other embodiments to form new embodiments.

[0012] Features that are described in the context of an embodiment may correspondingly be applicable to the same or similar features in the other embodiments. Features that are described in the context of an embodiment may correspondingly be applicable to the other embodiments, even if not explicitly described in these other embodiments. Furthermore, additions and / or combinations and / or alternatives as described for a feature in the context of an embodiment may correspondingly be applicable to the same or similar feature in the other embodiments.

[0013] In the context of various embodiments, the articles “a”, “an” and “the” as used with regard to a feature or element include a reference to one or more of the features or elements.

[0014] In the context of various embodiments, the term “about” or “approximately” as applied to a numeric value encompasses the exact value and a reasonable variance, e.g. within 10% of the specified value.

[0015] As used herein, the term “and / or” includes any and all combinations of one or more of the associated listed items.

[0016] By “comprising” it is meant including, but not limited to, whatever follows the word “comprising”. Thus, use of the term “comprising” indicates that the listed elements are required or mandatory, but that other elements are optional and may or may not be present.

[0017] By “consisting of’ is meant including, and limited to, whatever follows the phrase “consisting of’. Thus, the phrase “consisting of’ indicates that the listed elements are required or mandatory, and that no other elements may be present.

[0018] Embodiments described in the context of one of the heterostructures are analogously valid for the other heterostructure. Similarly, embodiments described in the context of a method are analogously valid for a heterostructure, and vice versa.

[0019] The coexistence of 2DEG and the buried 2DHG in AlN / strained GaN / AlN has been only demonstrated through indirect measurements such as terahertz (THz) -based conductivity measurements. Further, in such a structure, the buried 2DHG was only revealed after etching the top AIN barrier layer and eliminating 2DEG. However, this demonstration does not give any experimental evidence for the coexistence of 2DEG and the buried 2DHG in this structure. In another case, a Hall sample with the majority area containing the etched top AIN barrier resulted in 3D hole gas behavior with measurement temperature and hall coefficient changes to negative upon more excitation current. Although an explanation is provided for such behavior by assuming buried-2DHG in the sample, it is still an interpretation and does not provide conclusive evidence of 2DHG underneath 2DEG. The term “buried-2DHG” as described herein may refer to the 2DHG present under the 2DEG. To the best of our knowledge, a direct proof of the coexistence of 2DEG and buried-2DHG in the same AlN / GaN / AlN heterostructure has not been demonstrated to date. However, note that the coexistence of 2DHG on top of 2DEG was demonstrated in GaN / AlNGaN / GaN heterostructure, where the top 2DHG was stabilized by the Mg-doped p-type GaN layer. The lack of direct proof for the coexistence of 2DEG and buried-2DHG in the same AlN / strainedGaN / AlN heterostructure limits the application of this structure for developing complementary technology on the AIN platform. To date, the complementary n-channel and p-channel transistor technology on the same wafer using AIN / strained GaN / AIN heterostructure has not been demonstrated. Hence, there is a need for direct proof of the coexistence of 2DEG and the 2DHG in AlN / GaN / AlN hetero structure and a framework for developing the complementary transistors technology with 2DEG and the 2DHG in the same heterostructure with AIN buffer / substrate.

[0020] Various embodiments may relate to a heterostructure suitable for CMOS technology. Various embodiments may relate to a hetero structure including a p-channel portion and a n- channel portion, but in which the two dimensional hole gas (2DHG) and the two dimensional electron gas (2DEG) are not interdependent on each other. Various embodiments may relate to a hetero structure devoid of a buried 2DHG under a 2DEG.

[0021] FIG. 1 is a general illustration of a heterostructure according to various embodiments. The heterostructure may include a substrate 102. The hetero structure may also include a buffer layer 104 on the substrate 102, a first region of the buffer layer 104 having a regrowth portion 104a. The heterostructure may further include a fully strained channel layer 106 on a second region of the buffer layer 104 such that two dimensional hole gas (2DHG) is formed at an interface between the fully strained channel layer 106 and the second region of the buffer layer 104, wherein the second region of the buffer layer 104 and the fully strained channel layer 106 form a p-channel portion of the heterostructure. The heterostructure may additionally include a fully relaxed channel layer 108 on the regrowth portion 104a of the buffer layer 104, the fully relaxed channel layer 108 separated from the fully strained channel layer 106 by a gap. The hetero structure may also include a fully strained or completely lattice matched barrier layer 110 on the fully relaxed channel layer 108 such that two dimensional electron gas (2DEG) is formed at an interface between the fully strained or completely lattice matched barrier layer 110 and the fully relaxed channel layer 108, wherein the first region of the buffer layer 104 having the regrowth portion 104a, the fully relaxed channel layer 108 and the fully strained or completely lattice matched barrier layer 110 form a n-channel portion of the heterostructure. The n-channel portion of the heterostructure may be devoid of two dimensional hole gas (2DHG).

[0022] In other words, various embodiments may include a hetero structure including a n- channel portion and a p-channel portion. The n-channel portion may include a first region of abuffer layer 104 including a regrowth portion 104a, a fully relaxed channel layer 108 and a fully strained or completely lattice matched barrier layer 110. The p-channel portion may include a second region of the buffer layer 104 and a fully strained channel layer 106. The n- channel portion and the p-channel portion may be lateral to each other and may both be over a substrate.

[0023] For avoidance of doubt, the dashed lines used to denote the 2DHG and 2DEG in FIG. 1 are spaced from the interfaces of layer 106 / layer 104 and layer 108 / layer 110, respectively, as the peaks of the 2DHG and 2DEG distributions may be away from the respective interface. This also applies for other figures as provided herein. According to various embodiments, one or more portions of the 2DHG may overlap or almost overlap with the interface between fully strained channel layer 106 and buffer layer 104. Similarly, according to various embodiments, one or more portions of the 2DEG may overlap or almost overlap with the interface between fully relaxed channel layer 108 and fully strained or completely lattice matched barrier layer 110. In various embodiments, the 2DHG may have any suitable sheet hole concentration, any value e.g. above 1013cm'2. In various embodiments, the 2DEG may have any suitable sheet electron concentration, any value e.g. above 1012cm'2.

[0024] The channel layer 108 may be fully relaxed when the strain arising due to lattice mismatch with the underlying buffer layer 104 (i.e. regrowth portion 104a) is relaxed due to the formation of misfit dislocations at the interface between the channel layer 108 and the buffer layer 104 (i.e. regrowth portion 104a), such that there is no residual strain in the channel layer 108. In various embodiments, the fully relaxed channel layer 108 may have a thickness of any suitable dimensions, e.g. 60 nm or more. Generally speaking, a thicker fully relaxed channel layer 108 may lead to a higher sheet electron concentration in the 2DEG. A thicker fully relaxed channel layer 108 may also lead to improved mobility. The above mentioned may be due to the reduced back polarization effects on the 2DEG as thickness of the channel layer 108 increases.

[0025] The channel layer 106 may be fully strained due to lattice mismatch with the underlying buffer layer 304, and there is no strain relaxation mechanism present in the channel layer 106. In various embodiments, the fully strained channel layer 106 may have a thickness of any suitable dimensions, e.g. 11 nm or less, e.g. 7.5 nm, 8 nm or 10 nm. Generally, the thickness of the fully strained channel layer 106 may be dependent on the growth conditions and the substrate 102 as described herein. The fully strained channel layer 106 may also bereferred to as a coherently grown channel layer or a pseudomorphically grown channel. Likewise, the terms “fully strained”, “coherently grown” and “pseudomorphically grown” may be used interchangeably. Generally speaking, a thicker and fully strained channel layer 106 may lead to a higher sheet hole concentration in the 2DHG.

[0026] In various embodiments, the surface potential of the fully strained channel layer 106 may lie between 1.5 eV and 2.0 eV above the valence band (inclusive of both end values).

[0027] In various embodiments, the fully strained channel layer 106 may be a fully strained gallium nitride (GaN) layer. The fully relaxed channel layer 108 may be a fully relaxed gallium nitride (GaN) layer.

[0028] In various embodiments, the buffer layer 104 may include aluminum nitride (AIN).

[0029] In various embodiments, the substrate 102 may include silicon carbide (SiC), sapphire (AI2O3), aluminum nitride (AIN), or silicon (Si). When both the buffer layer 104 and the substrate 102 include AIN, the buffer layer 104 and the substrate 102 may form a monolithic, continuous AIN structure. In this case, the buffer layer 104 may be a buffer region, i.e. a top region of the AIN structure, while the substrate 102 may be a substrate region of the AIN structure under the buffer region.

[0030] In various embodiments, the fully strained or completely lattice matched barrier layer 110 may include aluminum nitride (AIN) or scandium aluminum nitride (ScxAli-xN, where 0 < x < 1).

[0031] In various embodiments, the fully strained or completely lattice matched barrier layer 110 may include a ternary material or a quaternary material.

[0032] In various embodiments, the heterostructure may further include a cap layer on the fully strained or completely lattice matched barrier layer 110.

[0033] In various embodiments, the hetero structure may also include a further cap layer on the fully strained channel layer 106. The cap layer on the fully strained or completely lattice matched barrier layer 110 may be doped with dopants of n-type, while the further cap layer on the fully strained channel layer 106 may be doped with dopants of p-type. For instance, the cap layer on the fully strained or completely lattice matched barrier layer 110 may be a gallium nitride (GaN) layer doped with silicon or germanium, while the further cap layer on the fully strained channel layer 106 may be a gallium nitride (GaN) or indium gallium nitride (InGaN) layer doped with magnesium. The cap layer may be selectively etched. The unetched portions of the cap layer may form a source electrode and a drain electrode on the fully strained orcompletely lattice-matched barrier layer 110, thereby forming a n-channel transistor. The further cap layer may be selectively etched. The unetched portions of the further cap layer may form a further source electrode and a further drain electrode on the fully strained channel layer 106, thereby forming a p-channel transistor.

[0034] In various other embodiments, the cap layer on the fully strained or completely lattice matched barrier layer 110 may be undoped. An interface between the fully relaxed channel layer 108 and the regrowth portion 104a of the buffer layer 104 may be at a same or lower level than the interface between the fully strained channel layer 106 and the second region of the buffer layer 102. The cap layer may be an undoped gallium nitride (GaN) layer. Portions of the fully relaxed channel layer 108 may be doped with n-type dopants to form a source region and a drain region, thereby forming a n-channel transistor, while portions of the fully strained channel layer 106 may be doped with p-type dopants to form a further source region and a further drain region, thereby forming a p-channel transistor.

[0035] In yet various other embodiments, the hetero structure may include first contacts including n-type dopants, the first contacts in contact with the fully relaxed channel layer 108 and the fully strained or completely lattice matched barrier layer 110. The heterostructure may also include second contacts including p-type dopants, the second contacts in contact with the fully strained channel layer 106 and the second region of the buffer layer 104. For instance, the first contacts may include gallium nitride (GaN) or indium gallium nitride (InGaN), the second contacts may include gallium nitride (GaN) or indium gallium nitride (InGaN), and the cap layer may be an undoped gallium nitride (GaN) layer.

[0036] As mentioned above, the n-channel portion of the hetero structure may be devoid of 2DHG. In other words, there may not be parallel conduction in the n-channel portion. Instead, the n-channel portion of the heterostructure may include hole or hole-like trap states. The thicker fully relaxed channel layer 108 may greatly reduce the back polarization on the 2DEG.

[0037] In various embodiments, the gap separating the fully relaxed channel layer 108 from the fully strained channel layer 106 may be greater than the thickness of the fully strained channel layer 106 as well as the thickness of the fully relaxed channel layer 108. For instance, the gap may be at least 1000 nm wide for a 60 nm fully relaxed channel layer 108.

[0038] As mentioned above, the barrier layer 110 may be fully strained or lattice matched. In other words, the barrier layer 110 may be fully strained due to lattice mismatch with the underlying fully relaxed channel layer 108, and there is no strain relaxation mechanism presentin the barrier layer 110. Alternatively, the lattice constant of the barrier layer 110 may match (i.e. equal to) that of the underlying fully relaxed channel layer 108.

[0039] FIG. 2 is a general illustration of a method of forming a hetero structure according to various embodiments. The method may include, in 202, forming a buffer layer on a substrate, a first region of the buffer layer having a regrowth portion. The method may also include, in 204, forming a fully strained channel layer on a second region of the buffer layer such that two dimensional hole gas (2DHG) is formed at an interface between the fully strained channel layer and the second region of the buffer layer, wherein the second region of the buffer layer and the fully strained channel layer form a p-channel portion of the heterostructure. The method may further include, in 206, forming a fully relaxed channel layer on the regrowth portion of the buffer layer, the fully relaxed channel layer separated from the fully strained channel layer by a gap. The method may additionally include, in 208, forming a fully strained or completely lattice matched barrier layer on the fully relaxed channel layer such that two dimensional electron gas (2DEG) is formed at an interface between the fully strained or completely lattice matched barrier layer and the fully relaxed channel layer, wherein the first region of the buffer layer having the regrowth portion, the fully relaxed channel layer and the fully strained or completely lattice matched barrier layer form a n-channel portion of the hetero structure. The n-channel portion of the heterostructure may be devoid of two dimensional hole gas (2DHG).

[0040] In other words, the method may include forming a n-channel portion including a first region of a buffer layer including a regrowth portion, a fully relaxed channel layer and a fully strained or completely lattice matched barrier layer, as well as a p-channel portion including a second region of the buffer layer and a fully strained channel layer.

[0041] For avoidance of doubt, FIG. 2 is intended to illustrate some of the steps of forming a hetero structure according to various embodiments, and is not intended to limit the sequence of the various steps. For instance, step 204 may occur before step 206. In various embodiments, the p-channel portion may be formed before forming the n-channel portion. A portion of the fully strained channel layer may be selectively etched together with a portion of the buffer layer, before a region of the buffer layer (i.e. the first region of the buffer layer) is regrown to form the regrowth portion, and the fully relaxed channel layer is formed on the regrowth portion.

[0042] In various embodiments, the fully relaxed channel layer may have a thickness of any suitable dimensions, e.g. 60 nm or more.

[0043] In various embodiments, the fully strained channel layer may have a thickness of any suitable dimensions, e.g. 11 nm or less.

[0044] In various embodiments, the fully strained channel layer may be a fully strained gallium nitride (GaN) layer. The fully relaxed channel layer may be a fully relaxed gallium nitride (GaN) layer.

[0045] In various embodiments, the buffer layer may include aluminum nitride (AIN).

[0046] In various embodiments, the substrate may include silicon carbide (SiC), sapphire (A12O3), aluminum nitride (AIN), or silicon (Si).

[0047] In various embodiments, the fully strained or completely lattice matched barrier layer may include aluminum nitride (AIN) or scandium aluminum nitride (ScxAli-xN, where 0 < x < 1).

[0048] In various embodiments, the fully strained or completely lattice matched barrier layer 110 may include a ternary material or a quaternary material.

[0049] In various embodiments, the heterostructure may further include a cap layer on the fully strained or completely lattice matched barrier layer.

[0050] In various embodiments, the hetero structure may also include a further cap layer on the fully strained channel layer. The cap layer on the fully strained or completely lattice matched barrier layer may be doped with dopants of n-type, while the further cap layer on the fully strained channel layer may be doped with dopants of p-type. For instance, the cap layer on the fully strained or completely lattice matched barrier layer may be a gallium nitride (GaN) layer doped with silicon or germanium, while the further cap layer on the fully strained channel layer may be a gallium nitride (GaN) or indium gallium nitride (InGaN) layer doped with magnesium. The method may include selectively etching the cap layer such that unetched portions of the cap layer form a source electrode and a drain electrode on the fully strained or completely lattice-matched barrier layer, thereby forming a n-channel transistor. The method may also include selectively etching the further cap layer such that unetched portions of the further cap layer form a further source electrode and a further drain electrode on the fully strained channel layer, thereby forming a p-channel transistor.

[0051] In various other embodiments, the cap layer on the fully strained or completely lattice matched barrier layer may be undoped. An interface between the fully relaxed channel layer and the regrowth portion of the buffer layer may be at a same or lower level than the interface between the fully strained channel layer and the second region of the buffer layer.The cap layer may be an undoped gallium nitride (GaN) layer. Portions of the fully relaxed channel layer may be doped with n-type dopants to form a source region and a drain region, thereby forming a n-channel transistor, while portions of the fully strained channel layer may be doped with p-type dopants to form a further source region and a further drain region, thereby forming a p-channel transistor.

[0052] In yet various other embodiments, the method may include forming first contacts including n-type dopants, the first contacts in contact with the fully relaxed channel layer and the fully strained or completely lattice matched barrier layer. The method may also include forming second contacts including p-type dopants, the second contacts in contact with the fully strained channel layer and the second region of the buffer layer. For instance, the first contacts may include gallium nitride (GaN) or indium gallium nitride (InGaN), the second contacts may include gallium nitride (GaN) or indium gallium nitride (InGaN), and the cap layer may be an undoped gallium nitride (GaN) layer.

[0053] Various embodiments may relate to a nitride based complementary technology heterostructure with n-channel and p-channel transistors, which may include 2DEG and 2DHG respectively. The p-channel transistor may contain GaN epilayer pseudomorphically grown on AIN buffer / substrate layer. The n-channel transistor may contain GaN / top barrier / relaxed GaN / AlN buffer regrown alongside of the p-channel transistor in the selected areas, after etching the pseudomorphic GaN layer and some AIN buffer layer. By this approach, unambiguous and reproducible 2DHG may be achieved without removing top 2DEG. The 2DEG and 2DHG may not be interdependent on each other, which may provide more freedom for the design of the n-channel and p-channel transistors.

[0054] FIG. 3 A is a schematic of a heterostructure according to various embodiments. The heterostructure may include an AIN buffer layer 304 epitaxially grown over a substrate 302. In various embodiments, the substrate 302 may include AIN. In such a case, the AIN buffer layer 304 and the AIN substrate 302 may form a monolithic structure. A GaN-1 channel layer 306 (fully strained) may be coherently grown over the AIN buffer layer 304 to achieve 2DHG at GaN / AlN interface. As there is no other barrier layer on top of the coherently grown GaN channel layer 306, the 2DHG may be achieved unambiguously.

[0055] A P++ GaN or InGaN cap layer 312 (e.g. doped with a dopant such as magnesium (Mg)) may be grown on the top of the GaN channel layer 306. The cap layer 312 may be used for ohmic contact purposes. The total layer thickness of the p++ GaN or InGaN cap layer 312may be maintained such that there is no relaxation of the underlying GaN-1 channel layer 306. The concentration of the dopant in the cap layer 312 may be of any suitable value, e.g. any value greater than 1019cm'3. The cap layer 312, the channel layer 306 and the region of the buffer layer 304 in which the cap layer 312 and the channel layer 306 are over may form a p- channel portion of the hetero structure.

[0056] The as-grown wafer may be patterned and masked using dielectric materials such as silicon dioxide (SiCh) or silicon nitride (SiN) in the areas where 2DHG needs to be preserved.

[0057] In the unmasked areas, inductive coupled plasma-reactive ion etching (ICP-RIE) or RIE may be performed to completely remove the GaN epilayer as well as some thickness of the AIN buffer layer 304.

[0058] An AlN / relaxed GaN channel layer / barrier layer (AIN, ScAlN or ternary or quaternary ) / GaN cap layer hetero structure may be grown in the unmasked areas. A thin AIN portion 304a may be regrown from the AIN buffer layer 304 using epitaxial growth methods such as molecular beam epitaxy (MBE) or metal-organic chemical vapor deposition (MOCVD) techniques. Regrowth of AIN may help avoid parallel conduction due to the regrowth interface. The thickness of the GaN-2 channel layer 308 may be selected such that the GaN layer 308 is fully relaxed. The thicker relaxed GaN-2 channel layer 308 may not provide any 2DHG at the interface between the GaN-2 channel layer 308 and the AIN buffer layer 304 (or the regrowth portion 304a). Moreover, a thick GaN-2 channel layer 308 may also reduce the back polarization effect on 2DEG concentration at the interface between the barrier layer 310 and the GaN-2 channel layer 308. The reduced back polarization may offer freedom to design the barrier layer 310 to achieve the required 2DEG and mobility. The barrier layer 310 may be fully strained or lattice matched to the GaN-2 channel layer 308. Finally, a GaN cap layer 314, doped with a dopant such as silicon (Si) or germanium (Ge), may be deposited on the barrier layer 310 to enable lower contacts for GaN n-HEMT. The concentration of the dopant in the cap layer 314 may be of any suitable value, e.g. any value greater than 1018cm'3. The cap layer 314, the barrier layer 310, the channel layer 308 and the regrowth portion 304a may form a n- channel portion of the hetero structure.

[0059] FIG. 3B is a schematic of the hetero structure shown in FIG. 3 A after reactive ion etching (RIE) or inductive coupled plasma-reactive ion etching (ICP-RIE) according to various embodiments. The GaN cap layer 314 may be etched such that the remaining unetched portions form source electrode 314a and drain electrode 314b. The cap layer 312 may be etched suchthat the remaining unetched portions form source electrode 312a and drain electrode 312b. Accordingly, the p-channel portion of the hetero structure may form a p-channel transistor, while the n-channel portion of the heterostructure may form a n-channel transistor.

[0060] FIG. 4A is a schematic of another hetero structure according to various embodiments. The heterostructure may include an AIN buffer layer 404 epitaxially grown over a substrate 402. In various embodiments, the substrate 402 may include AIN. In such a case, the AIN buffer layer 404 and the AIN substrate 402 may form a monolithic structure. A GaN-1 channel layer 406 (fully strained) may be coherently grown over the AIN buffer layer 404 (or substrate 402) to achieve 2DHG at GaN / AlN interface. As there is no other barrier layer on top of the coherently grown GaN channel layer 406, the 2DHG may be achieved unambiguously. The channel layer 406 and the region of the buffer layer 404 in which the channel layer 406 is over may form a p-channel portion of the hetero structure.

[0061] The as-grown wafer may be patterned and masked using dielectric materials such as silicon dioxide (SiO2) or silicon nitride (SiN) in the areas where 2DHG needs to be preserved.

[0062] In the unmasked areas, inductive coupled plasma-reactive ion etching (ICP-RIE) or RIE may be performed to completely remove the GaN epilayer as well as some thickness of the AIN buffer layer 404.

[0063] An AlN / relaxed GaN channel layer / barrier layer (AIN, ScAlN or ternary or quaternary ) / GaN cap layer heterostructure may be grown in the unmasked areas.

[0064] An AlN / relaxed GaN channel layer / barrier layer (AIN, ScAlN or ternary or quaternary ) / GaN cap layer heterostructure may be grown in the unmasked areas. A thin AIN portion 404a may be regrown from the AIN buffer layer 404 using epitaxial growth methods such as molecular beam epitaxy (MBE) or metal-organic chemical vapor deposition (MOCVD) techniques. Regrowth of AIN may help avoid parallel conduction due to the regrowth interface. The thickness of the GaN-2 channel layer 408 may be selected such that the GaN layer 408 is fully relaxed. The thicker relaxed GaN-2 channel layer 408 may not provide any 2DHG at the interface between the GaN-2 channel layer 408 and the AIN buffer layer 404 (or the regrowth portion 404a). Moreover, a thick GaN-2 channel layer 408 may also reduce the back polarization effect on 2DEG concentration at the interface between the barrier layer 410 and the GaN-2 channel layer 408. The reduced back polarization may offer freedom to design the barrier layer 410 to achieve the required 2DEG and mobility. The barrier layer 410 may be fully strained or lattice matched to the GaN-2 channel layer 408. Finally, a GaN cap layer 414may be deposited on the barrier layer 410. The cap layer 414, the barrier layer 410, the channel layer 408 and the regrowth portion 404a may form a n-channel portion of the hetero structure.

[0065] Subsequently, portions of the fully relaxed channel layer 408 may be doped with n- type dopants to form a source region and a drain region, such that the n-channel portion forms a n-channel transistor. Also, portions of the fully strained channel layer 406 may be doped with p-type dopants to form a further source region and a further drain region, such that the p- channel portion forms a p-channel transistor.

[0066] FIG. 4B is a schematic of the heterostructure shown in FIG. 4A according to various embodiments, but in which the interface between the fully relaxed channel layer 408 and the regrowth portion 404a of the buffer layer 404 is at a same level as the interface between the fully strained channel layer 406 and the second region of the buffer layer 404. The heterostructure may also include the substrate 402, the barrier layer 410 and the cap layer 414. In contrast, FIG. 4A shows the hetero structure in which the interface between the fully relaxed channel layer 408 and the regrowth portion 404a of the buffer layer 404 is at a lower level compared to the interface between the fully strained channel layer 406 and the second region of the buffer layer 404. The structures in FIG. 4A or 4B may result primarily depending on the amount of AIN that is etched prior to regrowth.

[0067] FIG. 5 is a schematic of yet another hetero structure according to various embodiments. The hetero structure may include an AIN buffer layer 504 epitaxially grown over a substrate 502. In various embodiments, the substrate 502 may include AIN. In such a case, the AIN buffer layer 504 and the AIN substrate 502 may form a monolithic structure. A GaN- 1 channel layer 506 (fully strained) may be coherently grown over the AIN buffer layer 504 (or substrate 502) to achieve 2DHG at GaN / AlN interface. As there is no other barrier layer on top of the coherently grown GaN channel layer 506, the 2DHG may be achieved unambiguously. The channel layer 506 and the region of the buffer layer 504 in which the channel layer 506 is over may form a p-channel portion of the heterostructure.

[0068] The as-grown wafer may be patterned and masked using dielectric materials such as silicon dioxide (SiO2) or silicon nitride (SiN) in the areas where 2DHG needs to be preserved.

[0069] In the unmasked areas, inductive coupled plasma-reactive ion etching (ICP-RIE) or RIE may be performed to completely remove the GaN epilayer as well as some thickness of the AIN buffer layer 504.

[0070] An AlN / relaxed GaN channel layer / barrier layer (AIN, ScAlN or ternary or quaternary ) / GaN cap layer heterostructure may be grown in the unmasked areas. A thin AIN portion 504a may be regrown from the AIN buffer layer 504 using epitaxial growth methods such as molecular beam epitaxy (MBE) or metal-organic chemical vapor deposition (MOCVD) techniques. Regrowth of AIN may help avoid parallel conduction due to the regrowth interface. The thickness of the GaN-2 channel layer 508 may be selected such that the GaN layer 508 is fully relaxed. The thicker relaxed GaN-2 channel layer 508 may not provide any 2DHG at the interface between the GaN-2 channel layer 508 and the AIN buffer layer 504 (or the regrowth portion 504a). Moreover, a thick GaN-2 channel layer 508 may also reduce the back polarization effect on 2DEG concentration at the interface between the barrier layer 510 and the GaN-2 channel layer 508. The reduced back polarization may offer freedom to design the barrier layer 510 to achieve the required 2DEG and mobility. The barrier layer 510 may be fully strained or lattice matched to the GaN-2 channel layer 508. A cap layer 514 may be deposited on the barrier layer 510. The cap layer 514, the barrier layer 510, the channel layer 508 and the regrowth portion 504a may form a n-channel portion of the hetero structure.

[0071] n++ regrown contacts 516a, 516b may be present on the 2DEG portion of the heterostructure while p++ regrown contacts 518a, 518b may be present on the 2DHG portion of the heterostructure. The n++ regrown contacts 516a, 516b may act as the source electrode and the drain electrode of the n-channel transistor based on the n-channel portion, while the P++ regrown contacts 518a, 518 may act as the source electrode and the drain electrode of the p-channel transistor based on the p-channel portion. The contacts 516a, 516b may be doped with a n-type dopant such as silicon (Si) or germanium (Ge). The concentration of the n-type dopant may be of any suitable value, e.g. any value greater than 1019cm'3. The contacts 518a, 518b may be doped with a p-type dopant such as magnesium. The concentration of the p-type dopant may be of any suitable value, e.g. any value greater than 5 x 1019cm'3.

[0072] In the existing methods for nitride complementary technology (technology with nitride n-channel and p-channel transistors), p-type doping and p-channel transistors were achieved through three methods: (1) Mg-doped GaN channel; (2) Polarization induced 2DHG at the hetero-interface of GaN and ternary or quaternary barrier layers; and (3) Polarization induced 2DHG at GaN and AIN hetero -interface. Methods (1) and (2) result in poor conductivity and hence limiting their suitability for high performance p-channel transistors and complementary technology. On the other hand, method 3 demonstrated high conductivity holegas at the interface of fully strained GaN on AIN, and hence it is more suitable for the development of p-channel transistors and complementary technology. Using method 3 and by using the AIN platform, a methodology for nitride complementary technology was previously proposed. In this method previously proposed, the 2DEG and the buried-2DHG were achieved through the growth of the AlN / strained GaN / AlN hetero structure.

[0073] However, the previously proposed method and the hetero structure has the following limitations to implementing nitride’s complementary technology. Firstly, in the previously proposed method, to access the buried-2DHG, it is necessary to eliminate the 2DEG at the top AlN / GaN interface by etching the top AIN barrier layer. Such recess etching leads to recess etch control and reproducibility complications. Moreover, the recess etch exposed area may lead to the alteration of surface states of the p-channel GaN layer, which may affect the formation or reduction of high concentration 2DHG. Secondly, in the previously proposed method, the n-channel transistor always has an active 2DHG at the bottom GaN / AlN interface. If the 2DHG exists as proposed, it may limit the n-type transistor operation due to parallel conduction. Thirdly, it should be noted that the GaN thickness should be relatively thinner for maintaining coherent growth over the AIN buffer and to achieve a high conductance p-channel layer. Hence, even if there is no 2DHG present at the bottom GaN / AlN interface, the proximity of negative polarization of the bottom GaN / AlN interface may affect the formation and concentration of 2DEG present at the top AlN / GaN interface. Fourthly, with a thin GaN channel layer, the concentration of 2DEG and 2DHG are interdependent, as the polarization charges at the corresponding interfaces are close to each other. This interdependence may severely limit the design of the individual n-type and p-channel transistors.

[0074] Various embodiments may have advantages over the previously proposed AlN / GaN / AlN heterostructure methodology.

[0075] In the heterostructure described herein according to various embodiments, the 2DHG may need not be accessed or achieved by the removal of the 2DEG or by etching the top-barrier layer. Hence, recess etch control of the AIN layer and reproducibility complications with recess etching may be eliminated. Moreover, various embodiments may provide unambiguous formation of 2DHG if the GaN channel is grown coherently over the AIN buffer layer. In addition and in accordance to various embodiments, by the regrowth of AlN / fully relaxed GaN / top barrier / GaN hetero structure on the same wafer with the thicker and relaxed GaN channel, the formation of 2DHG at the bottom fully relaxed GaN / AlN interface can beeliminated, which may further eliminate the possibility of parallel conduction in n-channel transistors of nitride complementary heterostructures. Also, in various embodiments, the thicker GaN channel in the n-channel transistor heterostructure may reduce the negative polarization effect of the bottom GaN / AlN interface on the top 2DEG, resulting in not only a higher concentration of 2DEG, but also a better control over the design of the top barrier for n- channel transistors. Thus, the interdependency of 2DEG and 2DHG on each other may have been reduced or eliminated, thus providing independent control over the design of n-channel transistors and p-channel transistors for developing complementary technology on AIN buffer / substrate.

[0076] It has been previously proposed that an AlN / GaN / AlN hetero structure based on AIN platform is suitable for generating 2DEG and 2DHG. Such a structure is proposed to result in high concentrations of 2DEG and 2DHG, simultaneously. However, to date, the direct evidence of the coexistence of 2DEG and the buried 2DHG in this hetero structure has not been demonstrated experimentally. The evidence for the coexistence of 2DEG and 2DHG is through the indirect observation of conductance measurements using terahertz (THz) and Fourier transform infrared (FTIR) measurements. In another proof of the existence of buried-2DHG underneath the 2DEG, a Hall sample with a majority area containing an etched top AIN barrier was used. It resulted in 3D hole gas behavior with measurement temperature and hall coefficient changes to negative upon more excitation current. Though an explanation is provided for such behavior by assuming buried-2DHG in the sample, it is still an interpretation and does not provide conclusive evidence of 2DHG underneath 2DEG. Thus, for developing complementary technology, it is necessary to understand the condition for the formation of the buried-2DHG and verify its coexistence with the 2DEG in the nitride heterostructures on the AIN platform. Such a study may lead to a better design of the AlN / GaN / AlN hetero structure. The study may also help in the overall establishment of nitride complementary technology on AIN buffer / substrate.

[0077] To understand the necessary condition for the formation of 2DHG at the GaN / AlN interface, a series of experiments were performed by varying the thickness of the GaN channel layer on the AIN buffer layer. FIG. 6 shows the schematic of a cross-section of the unintentionally doped (UID) gallium nitride / aluminum nitride (GaN / AlN) heterostructure according to various embodiments. The studied GaN / AlN HEMT heterostructures were grown using the plasma assisted-molecular beam epitaxy (PA-MBE) growth technique on 1” x 1” Si-face 4H-SiC substrate. It should be noted that Si-face SiC substrates result in metal-polar heterostructures. The epi-structure growth started with a 200 nm thick AIN buffer layer, grown in extremely nitrogen-rich (N-rich) growth conditions (IIVV « 1) to avoid Si carryover from the SiC substrate to the GaN / AlN interface. Reflection high energy electron diffraction (RHEED) showed a bright spotty pattern during N-rich AIN layer growth. On the nitrogen-rich (N-rich) 200 nm AIN layer, a 100 nm thick AIN layer was grown in slightly metal-rich growth conditions to achieve 2D growth mode. RHEED patterns become streaky for the 2D AIN growth. After achieving the 2D AIN layer, any excess Al metal on the surface of the AIN layers was consumed by opening the plasma source to the substrate for 1 min. After the plasma consumption process, RHEED patterns become bright streaky. Subsequently, the GaN channel layer growth was performed in a slightly metal-rich growth condition (III / V > 1), and the resulting RHEED pattern is dark streaky. Four samples, namely samples (a), (b), (c), and (d), were grown with varied GaN channel thicknesses of 30, 16, 11, and 8 nm, respectively. X-ray reflection measurements were performed to accurately determine the thickness of GaN channel layers. Atomic force microscopy (AFM) scan showed smooth surface morphologies on all the samples with a root mean square roughness in the range of 0.7 to 1.1 nm.

[0078] X-ray diffraction reciprocal space mapping (XRD RSM) scans were obtained along the GaN (105) diffraction plane for all the samples and are shown in FIG. 7. FIG. 7 shows (a) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (a) according to various embodiments; (b) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x- axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (b) according to various embodiments; a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (c) according to various embodiments; and (d) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (d) according to various embodiments.

[0079] Diffraction patterns for the GaN channel and AIN buffer layers were aligned along the Qxaxis of RSM, indicating coherent growth of the GaN channel for samples (c) and (d). As shown in FIG. 7 (a) and (b), the spreading of the reciprocal diffraction patterns of GaN channel layers of samples (a) and (b) indicates partial relaxation. These measurements suggested that the GaN channel layer thickness should be limited to less than 11 nm for its coherent growth on the developed three dimensional - two dimensional (3D-2D) AIN buffer layers on the SiC substrate. Hall effect measurements with indium contacts were performed in the Van der Pauw configuration on samples (a) to (d). FIG. 8 shows a table summarizing the sheet resistance, mobility, sheet carrier concentration, and type of charge carriers for all samples (a) - (d) according to various embodiments. As listed in the table, samples (a) and (b) showed very high resistivity, and the measurements are non-conclusive. On the other hand, samples (c) and (d) showed the presence of 2DHG, with their sheet carrier concentrations of 4.40 x 1013and 4.17 x 1013cm-2, respectively.

[0080] Capacitance-voltage (C-V) measurements were performed to further confirm the presence and absence of 2DHG in the sample with coherently grown (sample (c)) and relaxed GaN layer (sample (a)), respectively. FIG. 9 shows a plot of capacitance (x IO10Farads or F) as a function of applied bias (in volts or V) illustrating the capacitance-voltage (C-V) measurements on samples (a) and (c) according to various embodiments, with the inset showing an optical microscopy image of the contact. C-V measurements were performed on a circular titanium Ti (40 nm) / gold Au (250 nm) Schottky contact of 300 pm diameter with surrounded ohmic contact of nickel Ni (50 nm) / gold Au (100 nm), as shown in the inset of FIG. 9. The Ni / Au ohmic contact was annealed in the oxygen atmosphere at 450 °C. C-V measurements were performed from -1 to 5 V at the frequency of 5 KHz. As shown in FIG. 9, the coherently grown GaN layer (sample (c)) shows the presence of charge with a large capacitance value, while the sample grown with the relaxed GaN layer (sample (a)) results in almost constant and very low capacitance, an indication of the absence of the charge in the heterostructure. The capacitance obtained for sample (c) at 0 V is only half of the value expected for a sample with a Schottky contact with 300 pm and a GaN channel thickness of 11 nm. The lower capacitance could be due to the high contact resistance of Ni / Au ohmic contact. To obtain a better ohmic contact, a p++ GaN layer may be useful under the Ni / Au ohmic contact. However, high contact resistance of Ni / Au ohmic contact in this sample may also cause the contact to act as a Schottky contact and be connected in series with the Ti / AuSchottky contact, which explains why the measured capacitance is only half of the expected capacitance value. Nevertheless, the existence of plateau of capacitance confirmed the presence of high concentration of 2DHG in this sample. On the other hand, an almost constant capacitance (across different applied biases) was observed for sample (a), which indicates a lack of charge and strong trapping of the Fermi level in this sample, possibly at the relaxed GaN / AlN interface. Based on the XRD RSM, Hall effect, and C-V measurements, it can be confirmed that the formation of 2DHG may be observed only in the samples where the GaN channel layer is grown coherently, and the samples with partial or full relaxation of the GaN channel layer may result in the absence of the 2DHG at the interface.

[0081] The 2DHG concentration in GaN / AlN hetero structure is simulated as a function of GaN layer thickness and GaN surface potentials (((>) of 0.5, 1.0, 1.5, 2.0, and 2.5 eV using the 1-dimensional Poisson-Schrodinger solver. The simulated 2DHG data closely matches with the simulated data from a previous study. The 2DHG measurements of samples (c) and (d) are also plotted on the same plot to extract the GaN surface potential for samples (c) and (d). FIG. 10 shows a plot of two-dimensional hole gas (2DHG) concentration (x 1013per square centimeters or cm-2) as a function of gallium nitride (GaN) thickness (in nanometers or nm) illustrating the variation of 2DHG concentration with channel thickness for different GaN surface potentials (([)) of 0.5, 1.0, 1.5, 2.0, and 2.5 eV according to various embodiments. Experimentally obtained hole gas concentrations are also plotted as scattered points. As shown in FIG. 10, the surface potential of the GaN channel layer in the GaN / AlN hetero structure lies between 1.5 eV and 2.0 eV. This value is closely matched with the surface potential obtained for similar heterostructures with 2DHG at GaN / AlN interface. Thus, for the samples with 2DHG in GaN / AlN heterostructure, the surface potential may be closer to the middle of the GaN band gap-

[0082] Having understood the condition for the formation of 2DHG and determined the surface potential of the GaN channel layer in the GaN / AlN heterostructure, the effect of top GaN cap / AIN barrier layers on the pseudomorphically grown GaN on the AIN buffer layer is investigated. This observation allows for the investigation of the coexistence of 2DEG and 2DHG in the single nitride AlN / GaN / AlN heterostructure, as presented in the proposed method on the AIN platform.

[0083] FIG. 11 shows a schematic of a gallium nitride / aluminum nitride / gallium nitride / aluminum nitride (GaN / AlN / GaN / AlN) heterostructure on the silicon carbide (SiC)substrate according to various embodiments. The formation of 2DEG in GaN-cap / AlN barrier / fully relaxed GaN / AlN heterostructure and GaN-cap / AlN barrier / coherently grown GaN / AlN hetero structure may be investigated. Hence, two heterostructures were grown, samples (e) and (f). The epilayer structure of sample (e) is GaN (1 nm) / AIN (5.9 nm) / GaN (62 nm) / AIN (300 nm). The epilayer structure of the sample (f) is GaN (2.6 nm) / AIN (6 nm) / GaN (10 nm) / AIN (300 nm). XRD RSM mapping of the samples (e) and (f) are presented in FIG. 12. FIG. 12 shows (a) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (e) according to various embodiments; and (b) a plot of z-axis Qz(* 107, in relative lattice units or rlu) as a function of x-axis Qx(* 107, in relative lattice units or rlu) illustrating the X-ray diffraction reciprocal space mapping (XRD RSM) along the gallium nitride GaN (105) plane of sample (f) according to various embodiments. Sample (e) showed a relaxed GaN channel layer, while sample (f) showed a coherently grown GaN channel layer.

[0084] FIG. 13 shows a table summarizing the results of Hall effect measurements performed on sample (e) and sample (f) according to various embodiments.

[0085] Despite having almost similar AIN barrier thicknesses, sample (e) with a relaxed GaN channel layer showed a higher 2DEG concentration of 3.94 x 1013cm’2. However, sample (f) with a coherently grown GaN layer showed a lower 2DEG concentration of only 0.5 x 1013cm’2. To understand the observed difference in the 2DEG concentrations of samples (e) and (f), Poisson-Schrodinger (PS) simulations were performed. In the PS simulations, a GaN cap surface potential of 0.6 eV was assumed based on the calibration of the PS simulator using the 2DEG density obtained from a baseline GaN cap / AlGaN / GaN HEMT heterostructure, grown using PA-MBE growth system. FIG. 14 shows (a) a plot of energy bands Ec, EF, EV (in electron-volts or eV) / carrier concentration (x IO20per cubic centimeter or cm-3) as a function of depth (in nanometers or nm) illustrating the calculated energy band profiles as well as the calculated two-dimensional electron gas (2DEG) and two-dimensional hole gas (2DHG) of sample (e) according to various embodiments; and (b) a plot of energy bands Ec, EF, EV (in electron-volts or eV) / carrier concentration (x IO20per cubic centimeter or cm-3) as a function of depth (in nanometers or nm) illustrating the calculated energy band profiles as well as the calculated two-dimensional electron gas (2DEG) and two-dimensional hole gas (2DHG) of sample (f) according to various embodiments. Ec, EF and Ev represent the conduction band,Fermi level and valence band respectively. As shown in FIG. 14, simulation results also showed a higher 2DEG sheet carrier concentration of 4.46 x 1013cm’2for sample (e), while sample (f) showed a lower 2DEG sheet carrier concentration of 0.76 x 1013cm’2. Thus, the PS simulations confirmed that the observed difference in the 2DEG concentration between samples (e) and (f) is expected for these heterostructures. The simulated values are slightly different when compared with the obtained 2DEG concentration. Note that the surface potential is fixed in these simulations. Hence, to accurately get the 2DEG concentration, it is necessary to change the surface potential. However, the change of surface potential is not discussed here. The difference in the 2DEG concentration between sample (e) and sample (f) can be mainly attributed to the effect of negative polarization due to the back GaN / AlN interface. It should be noted that a similar net negative polarization charge exists at the bottom GaN / AlN interface of both samples (e) and (f). However, for sample (e), its thicker GaN channel reduces the negative polarization effect on the 2DEG, resulting in lesser depletion and hence, a higher 2DEG concentration of 3.94 x 1013cm’2as shown in FIG. 13. On the other hand, the lower 2DEG concentration in sample (f) can be attributed to the greater depletion of the 2DEG in sample (f), where thin GaN channel brings negative polarization charge much closer to the 2DEG, resulting in its greater depletion.

[0086] From the simulation data in FIG. 14, it can also be noticed that both heterostructures of samples (e) and (f) should result in a high concentration of 2DHG at the back GaN / AlN interface. However, the GaN channel layer in the sample (e) is relaxed. Hence, as highlighted in the preceding paragraphs, no 2DHG may exist at this interface. On the other hand, the heterostructure with GaN cap / AIN barrier / fully strained GaN / AlN buffer of sample (f) should have high 2DHG at the bottom GaN / AlN interface. The previously proposed method suggested that this high concentration of buried-2DHG provides the necessary charge for p-channel GaN HEMT heterostructure. Moreover, it was also suggested that the presence of buried-2DHG results in parallel conduction and uncertainty over the measured carrier concentration and mobility in the Hall measurements of these heterostructures.

[0087] In order to decouple the 2DEG from parallelly conducting buried-2DHG, C-V measurements were performed on sample (f) with circular nickel Ni (40 nm) / gold Au (250 nm) Schottky contact of 300 pm diameter with surrounded ohmic contact of titanium Ti (20 nm) / aluminum Al(120 nm) / nickel Ni (40 nm) / gold Au (80 nm). Ohmic contact formation was obtained by rapid thermal annealing in the nitrogen atmosphere at 825 °C for 30 s. C-Vmeasurements were performed from -15 to 1 V at the frequency of 5 KHz. FIG. 15 shows (a) a plot of capacitance (x IO10Farads or F) / integrated charge (x 1013cm-2) as a function of applied bias (in Volts or V) illustrating capacitance and integrated charge as a function of applied bias according to various embodiments; and (b) a plot of carrier concentration (per cubic centimeter or cm'3) as a function of thickness (in nanometer or nm) illustrating the estimated carrier concentration from capacitance-voltage (C-V) measurements as a function of sample thickness according to various embodiments. For the estimation of the carrier concentration, the dielectric constant of AIN (8.57) is used. As shown in FIG. 15(a), the total integrated carrier concentration is approximately 0.41 x 1013cm'2, which is of similar order as that of the measured carrier concentration of 0.5 x 1013cm’2. Hence, it suggests that the 2DEG concentration obtained using Hall measurements on this sample is indeed reasonable, and there is no parallel conduction effect of 2DHG in the Hall measurements.

[0088] The absence of parallel conduction effect in the Hall effect measurements of sample (f) may be explained in two ways: either the lower conductivity of 2DHG has no impact on the Hall measurements, or there is no 2DHG in the heterostructure. From the coherently grown GaN / AlN heterostructures of samples (c) and (d), a high concentration of 2DHG should exist at GaN / AlN interface, which is also supported by PS simulations in FIG. 14(b). The coexistence of 2DEG and the buried-2DHG in AlN / GaN / AlN heterostructure is also suggested through the indirect observation of conductance measurements using THz and FTIR measurements. However, from FIG. 15(b) of the carrier concentration profile as a function of depth, it can be noticed that no 2DHG is present at GaN / AlN interface. If a high density buried- 2DHG is present at this interface, the depletion profile of electrons should end at or near the bottom GaN / AlN interface. Hence, we conclude that in AlN / GaN / AlN heterostructure, even though the GaN channel is grown pseudomorphically, the buried-2DHG is not observed. This result is consistent with the observation of the absence of buried-2DHG underneath 2DEG in the AlGaN / GaN multichannel HEMT hetero structure.

[0089] To prove the universality of this observation of the absence of buried-2DHG underneath the 2DEG, in addition to the studied Ga-polar AlN / GaN / AlN heterostructures and AlGaN / GaN MC-HEMT heterostructures highlighted in a previous study, an N-polar GaN HEMT heterostructure was grown by MBE growth method on C-face SiC substrate.

[0090] FIG. 16A shows a schematic of a N-polar high-electron-mobility transistor (HEMT) heterostructure according to various embodiments. FIG. 16B shows a plot of energy bands Ec, 1EF, EV (in electron-volts or eV) / carrier concentration ns(x IO20per cubic centimeter or cm-3) as a function of thickness / depth from surface (in nanometers or nm) illustrating the simulated energy band profiles as well as the simulated two-dimensional electron gas (2DEG) and two- dimensional hole gas (2DHG) distribution as a function of thickness / depth according to various embodiments. The energy band diagrams as well as 2DEG and 2DHG distributions are obtained from the PS simulation. FIG. 16C shows a plot of capacitance (x IO10Farads or F) / integrated charge (x 1012per square centimeter or cm-2) as a function of applied bias (in Volts or V) illustrating capacitance and integrated charge as a function of applied bias obtained using a Schottky contact of 100 pm diameter according to various embodiments. FIG. 16D shows a plot of carrier concentration (per cubic centimeter or cm-3) as a function of thickness / depth (in nanometers or nm) illustrating the estimated carrier concentration from capacitance-voltage (C-V) measurements as a function of sample depth / thickness. FIG. 17 shows a table summarizing the Hall measurements on N-polar high-electron-mobility transistor (HEMT) heterostructure.

[0091] It can be noticed from FIG. 16B that the 2DHG is expected underneath the 2DEG in the N-polar HEMT hetero structure too. However, since the Fermi level is pinned at the top GaN / AlGaN interface resulting in 2DEG, 2DHG may not be present in this heterostructure based on the prior work.

[0092] To prove this, we have conducted Hall and C-V measurements on this sample too. As shown in FIG. 16C, the integrated carrier concentration is approximately 0.9 x 1013cm-2, which is close to that of the Hall measurement carrier concentration of 0.93 x 1013cm'2. The matching of carrier concentration from Hall and C-V measurements indicates that there is no parallel conduction effect of 2DHG in the Hall measurements. From FIG. 16D of the carrier concentration profile as a function of thickness, it can also be noted that there is no buried- 2DHG at the negatively polarized AlGaN / GaN interface. As suggested previously, presence of 2DHG will not allow the depletion to continue into the GaN buffer layer. Hence, this study also suggests that there may be no buried-2DHG underneath the 2DEG in N-polar GaN HEMT heterostructure. Thus, irrespective of the polarity, the absence of buried-2DHG underneath the 2DEG may be observed at negative polarization interface in the Ill-nitride heterostructure.

[0093] An important question related to the charge balance in the heterostructure arises when the buried-2DHG is absent at the negative polarization interface. In the absence of 2DHG, hole trap states may exist at negative GaN / AlGaN interface to balance the charge. Inthe case of N-polar HEMT heterostructures, it has previously been reported that a hole-like trap state, situated at 0.06 eV above the valence band, compensates for the negative polarization at AlGaN / GaN interface and acts as a donor state to form 2DEG in N-polar unintentionally doped HEMT devices. Through positron annihilation study, it has also been shown that the presence of a high concentration of N- vacancies at the negative polarization interface of AlGaN / GaN in N-polar heterostructures. N-vacancies with deep-donor character may act as efficient hole traps. The presence of hole trap states at the negative polarization interface of a Ga-polar dualchannel AlGaN / GaN HEMT heterostructure has been demonstrated through deep-level transient spectroscopy measurements. In this heterostructure, hole gas is supposed to exist at this negative polarization interface according to conventional thinking. However, the direct evidence of the presence of hole traps may be proof for the absence of buried-2DHG underneath 2DEG at the negative polarization interface in Ga-polar heterostructures.

[0094] Moreover, perfect pinching-off of the 2DEG in the reported AlN / GaN / AlN heterostructure also suggests that the buried 2DHG may not exist in this hetero structure. It should be noted that the formation of 2DHG in GaN / AlN heterostructures or GaN / AlGaN (or AlxInyGai-x yN) heterostructures is challenging, and it often requires the Mg-doped p-GaN top layer for the stabilization of the 2DHG. In these heterostructures, the top p-type GaN layer helps to probably stabilize the surface potential near and below the middle of the GaN band gap, and enables the Fermi level intersecting the quantum well, leading to accumulation of the 2DHG. Considering all these points, it can be implied that the formation of 2DEG in GaN- cap / AlN barrier / fully strained GaN / AlN heterostructure may move the Fermi level away from the quantum well at the bottom GaN / AlN interface, resulting in the absence of 2DHG in this heterostructure. Supporting this point, it has been reported that the etching of the top AIN barrier layer and the elimination of the 2DEG reintroduces the 2DHG at the fully strained GaN / AlN interface. Thus, in the GaN-cap / AlN barrier / fully strained GaN / AlN buffer heterostructure, the buried 2DHG may not be present, and to replenish the 2DHG, reactive ion etching of the top GaN / AlN epilayers may be necessary.

[0095] Overall, five key observations can be drawn from this work for the development of complementary technology on AIN buffer lay er / AIN substrate: (1) relaxed GaN channel layer on the AIN buffer does not result in the buried 2DHG formation; (2) a condition for the formation of highly conducting and unambiguous 2DHG in GaN / AlN hetero structure is fully strained or pseudomorphically grown GaN channel growth; (3) with the pseudomorphicallygrown GaN growth in GaN / AlN / GaN / AlN hetero structure, the 2DEG concentration reduces due to the depletion effect of the negative polarization from the bottom GaN / AlN interface; (4) with the top AIN barrier layer and the presence of 2DEG in GaN cap / AIN barrier / GaN channel / AIN heterostructure, 2DHG also diminishes at the bottom GaN / AlN interface; and (5) to achieve a high concentration of 2DEG in GaN cap / AlN barrier / GaN channel / AlN heterostructure, the GaN channel should be thick and relaxed.

[0096] The fourth key observation in this work is a direct contradiction to the existing art, which suggests that buried-2DHG forms underneath the 2DEG in GaN / AlN / GaN / AlN heterostructure. As proved in this work, buried 2DHG may not form under 2DEG, irrespective of whether the GaN channel is relaxed or coherent. As such, it may not be possible to achieve n-channel and p-channel HEMTs from the same hetero structure by forming buried 2DHG under 2DEG as claimed in the existing art. This implies that in order to develop nitride complementary electronics on the AIN platform and to fully utilize the advantages of the AIN platform, one has to form separate n-channel and p-channel portions. As mentioned, separating n-channel and p-channel portions may be beneficial for the design and control of the individual channels. Considering this point, various embodiments may achieve the interdependence of the 2DEG and the 2DHG through the regrowth method, as explained earlier. In various embodiments, the pseudomorphic GaN channel on the AIN platform may provide unambiguous 2DHG, while regrown GaN-cap / top-barrier / relaxed GaN / AlN hetero structure may provide 2DEG. Hence, this may provide independent design and control of high conductivity 2DEG and 2DHG over the AIN buffer layer / substrate, which is not provided by the earlier proposed technologies. Moreover, this methodology may establish unambiguous and reproducible 2DHG without the need for removing 2DEG on the top of the heterostructure. Thus, the proposed methodology may provide a better way of achieving complementary technology with high-conductivity p-channel transistors.

[0097] Complementary transistor technology using wide bandgap semiconductor materials, like the one described in this work, enables electronic circuit’s operation at higher voltages- reducing the necessity of voltage step-down stages in power electronics and logic circuits. Electronic circuits with fewer stepping-down stages are both compact and an environmental- friendly energy-saving approach. The ever-expanding digital technology-based industries, such as the mobile phone industry, laptops, chargers, and display technologies, can be directly impacted by the proposed technology developed in this investigation. For example, owing tothe effective power conversion, mobile phones and laptops will have longer-lasting batteries and will be much smaller. Additionally, implementing the suggested nitride complementary technology in lieu of current generation CMOS technology in the data centers will reduce the enormous amounts of electricity consumption. Nitride based complementary technology is also advantageous to be used in mobile communication sectors with frequency of operation in the 5G and beyond-5G spectrum. This technology not only enables faster operations of the mobile base stations but also makes them energy efficient and compact. The proposed technology may also play a vital role in electric vehicles, where power management applications are necessary.

[0098] In addition to civil applications, various embodiments may have a major impact on defense and space industries, where integrated electronics may require operations in harsh environments. The developed nitride complementary technology may be operated at higher temperatures and in harsh environments. Hence, various embodiments involving nitride complementary technology based on AIN buffer layer / AIN substrate may have a significant influence on the electronic sector and may be able to meet the demands of future civil and defense applications.

Claims

Claims1. A heterostructure including: a substrate; a buffer layer on the substrate, a first region of the buffer layer having a regrowth portion; a fully strained channel layer on a second region of the buffer layer such that two dimensional hole gas (2DHG) is formed at an interface between the fully strained channel layer and the second region of the buffer layer, wherein the second region of the buffer layer and the fully strained channel layer form a p- channel portion of the heterostructure; a fully relaxed channel layer on the regrowth portion of the buffer layer, the fully relaxed channel layer separated from the fully strained channel layer by a gap; and a fully strained or completely lattice matched barrier layer on the fully relaxed channel layer such that two dimensional electron gas (2DEG) is formed at an interface between the fully strained or completely lattice matched barrier layer and the fully relaxed channel layer, wherein the first region of the buffer layer having the regrowth portion, the fully relaxed channel layer and the fully strained or completely lattice matched barrier layer form a n-channel portion of the heterostructure; wherein the n-channel portion of the heterostructure is devoid of two dimensional hole gas (2DHG).

2. The heterostructure according to claim 1, wherein the fully relaxed channel layer has a thickness of 60 nm or more.

3. The heterostructure according to claim 1 or claim 2, wherein the fully strained channel layer has a thickness 11 nm or less.

4. The heterostructure according to any one of claims 1 to 3,wherein the fully strained channel layer is a fully strained gallium nitride (GaN) layer; and wherein the fully relaxed channel layer is a fully relaxed gallium nitride (GaN) layer. erostructure according to any one of claims 1 to 4, wherein the buffer layer comprises aluminum nitride (AIN). erostructure according to any one of claims 1 to 5, wherein the substrate comprises silicon carbide (SiC), sapphire (AI2O3), aluminum nitride (AIN), or silicon. erostructure according to any one of claims 1 to 6, wherein the fully strained or completely lattice matched barrier layer comprises aluminum nitride (AIN) or scandium aluminum nitride (ScxAli-xN, where 0 < x < 1). erostructure according to any one of claims 1 to 7, wherein the fully strained or completely lattice matched barrier layer comprises a ternary material or a quaternary material. erostructure according to any one of claims 1 to 8, further comprising: a cap layer on the fully strained or completely lattice matched barrier layer. erostructure according to claim 9, further comprising: a further cap layer on the fully strained channel layer; wherein the cap layer on the fully strained or completely lattice matched barrier layer is doped with dopants of n-type; and wherein the further cap layer on the fully strained channel layer is doped with dopants of p-type. erostructure according to claim 10,wherein the cap layer on the fully strained or completely lattice matched barrier layer is a gallium nitride (GaN) layer doped with silicon or germanium; and wherein the further cap layer on the fully strained channel layer is a gallium nitride (GaN) or indium gallium nitride (InGaN) layer doped with magnesium. erostructure according to claim 10 or claim 11, wherein the cap layer is selectively etched; and wherein the unetched portions of the cap layer form a source electrode and a drain electrode on the fully strained or completely lattice-matched barrier layer, thereby forming a n-channel transistor; wherein the further cap layer is selectively etched; and wherein the unetched portions of the further cap layer form a further source electrode and a further drain electrode on the fully strained channel layer, thereby forming a p-channel transistor. erostructure according to claim 9, wherein the cap layer on the fully strained or completely lattice matched barrier layer is undoped; and wherein an interface between the fully relaxed channel layer and the regrowth portion of the buffer layer is at a same or lower level than the interface between the fully strained channel layer and the second region of the buffer layer. erostructure according to claim 13, wherein the cap layer is an undoped gallium nitride (GaN) layer. erostructure according to claim 13 or claim 14, wherein portions of the fully relaxed channel layer are doped with n-type dopants to form a source region and a drain region, thereby forming a n-channel transistor; and wherein portions of the fully strained channel layer are doped with p-type dopants to form a further source region and a further drain region, thereby forming a p-channel transistor.erostructure according to claim 9, further comprising: first contacts comprising n-type dopants, the first contacts in contact with the fully relaxed channel layer and the fully strained or completely lattice matched barrier layer; and second contacts comprising p-type dopants, the second contacts in contact with the fully strained channel layer and the second region of the buffer layer. erostructure according to claim 16, wherein the first contacts comprise gallium nitride (GaN) or indium gallium nitride (InGaN); wherein the second contacts comprise gallium nitride (GaN) or indium gallium nitride (InGaN); and wherein the cap layer is an undoped gallium nitride (GaN) layer. od of forming a heterostructure, the method comprising: forming a buffer layer on a substrate, a first region of the buffer layer having a regrowth portion; forming a fully strained channel layer on a second region of the buffer layer such that two dimensional hole gas (2DHG) is formed at an interface between the fully strained channel layer and the second region of the buffer layer, wherein the second region of the buffer layer and the fully strained channel layer form a p-channel portion of the heterostructure; forming a fully relaxed channel layer on the regrowth portion of the buffer layer, the fully relaxed channel layer separated from the fully strained channel layer by a gap; and forming a fully strained or completely lattice matched barrier layer on the fully relaxed channel layer such that two dimensional electron gas (2DEG) is formed at an interface between the fully strained or completely lattice matched barrier layer and the fully relaxed channel layer, wherein the first region of the buffer layer having the regrowth portion, the fully relaxed channel layer and the fullystrained or completely lattice matched barrier layer form a n-channel portion of the heterostructure; wherein the n-channel portion of the heterostructure is devoid of two dimensional hole gas (2DHG). thod according to claim 18, wherein the fully relaxed channel layer has a thickness of 60 nm or more. thod according to claim 18 or claim 19, wherein the fully strained channel layer has a thickness of 11 nm or less. thod according to any one of claims 18 to 20, wherein the fully strained channel layer is a fully strained gallium nitride (GaN) layer; and wherein the fully relaxed channel layer is a fully relaxed gallium nitride (GaN) layer. thod according to any one of claims 18 to 21, wherein the buffer layer comprises aluminum nitride (AIN). thod according to any one of claims 18 to 22, wherein the substrate comprises silicon carbide (SiC), sapphire (AI2O3), aluminum nitride (AIN), or silicon. thod according to any one of claims 18 to 23, wherein the fully strained or completely lattice matched barrier layer comprises aluminum nitride (AIN) or scandium aluminum nitride (ScxAli-xN, where 0 < x < 1). thod according to any one of claim 18 to 24, wherein the fully strained or completely lattice matched barrier layer comprises a ternary material or a quaternary material.thod according to any one of claims 18 to 25, further comprising: forming a cap layer on the fully strained or completely lattice matched barrier layer. thod according to claim 26, further comprising: forming a further cap layer on the fully strained channel layer wherein the cap layer on the fully strained or completely lattice matched barrier layer is doped with dopants of n-type; and wherein the further cap layer on the fully strained channel layer is doped with dopants of p-type. thod according to claim 27, wherein the cap layer on the fully strained or completely lattice matched barrier layer is a gallium nitride (GaN) layer doped with silicon or germanium; and wherein the further cap layer on the fully strained channel layer is a gallium nitride (GaN) or indium gallium nitride (InGaN) layer doped with magnesium. thod according to claim 27 or claim 28, further comprising: selectively etching the cap layer such that unetched portions of the cap layer form a source electrode and a drain electrode on the fully strained or completely lattice-matched barrier layer, thereby forming a n-channel transistor; and selectively etching the further cap layer such that unetched portions of the further cap layer form a further source electrode and a further drain electrode on the fully strained channel layer, thereby forming a p-channel transistor. thod according to claim 26, wherein the cap layer on the fully strained or completely lattice matched barrier layer is undoped; and wherein an interface between the fully relaxed channel layer and the regrowth portion of the buffer layer is at a same or lower level than the interface between the fully strained channel layer and the second region of the buffer layer.thod according to claim 30, wherein the cap layer is an undoped gallium nitride (GaN) layer. thod according to claim 30 or claim 31, wherein portions of the fully relaxed channel layer are doped with n-type dopants to form a source region and a drain region, thereby forming a n-channel transistor; and wherein portions of the fully strained channel layer are doped with p-type dopants to form a further source region and a further drain region, thereby forming a p-channel transistor. thod according to claim 26, further comprising: forming first contacts comprising n-type dopants, the first contacts in contact with the fully relaxed channel layer and the fully strained or completely lattice matched barrier layer; and forming second contacts comprising p-type dopants, the second contacts in contact with the fully strained channel layer and the second region of the buffer layer. thod according to claim 33, wherein the first contacts comprise gallium nitride (GaN) or indium gallium nitride (InGaN); wherein the second contacts comprise gallium nitride (GaN) or indium gallium nitride (InGaN); and wherein the cap layer is an undoped gallium nitride (GaN) layer.

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