Method for operating an insulated dc / dc converter having a secondary-side current doubler and an active clamping capacitor for increasing the voltage range

EP4710418A1Pending Publication Date: 2026-03-18BRUSA HYPOWER AG
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Patent Information

Authority / Receiving Office
EP · EP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-05-06
Publication Date
2026-03-18

AI Technical Summary

Technical Problem

Existing DC/DC converters have limited input voltage range due to fixed output voltage, restricting their versatility and applicability as battery voltages increase, particularly with the shift from 400 V to 600 V to 800 V, necessitating a method to expand the operational voltage range without hardware modifications.

Method used

The method involves a DC/DC converter with a transformer having a center tap and snubber capacitance, utilizing alternating switching states between lower and upper switches to double the output voltage range by clamping and buffering voltage peaks, allowing operation across a broader input voltage range without modifying existing hardware.

Benefits of technology

This approach effectively doubles the achievable output voltage range, enabling the DC/DC converter to handle higher input voltages while maintaining performance, thus enhancing its applicability across various voltage standards without requiring hardware changes.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention relates to a method for operating a DC / DC converter (10), wherein the DC / DC converter (10) has a primary side (1), a secondary side (2), and a transformer (3) having a central tap (39), wherein a top transformer tap (33) and a bottom transformer tap (34) are connected, via a full-bridge circuit, to a top connection point of a snubber capacitor (45) by means of top switches (35, 37), and to a bottom connection point of a snubber capacitor (45) by means of bottom switches (36, 38), and wherein a bottom secondary-side DC terminal (48) is connected to the bottom connection point of the snubber capacitor (45), and a top secondary-side DC terminal (47) is connected to the central tap (39) via a filter inductor (43). In the process, in an operating state, the top switches (35, 37) alternatingly inject positive voltage pulses of the secondary voltage between the central tap (39) and the top connection point of the snubber capacitor (45), wherein the top switches (35, 37) are closed between the voltage pulses, and the bottom switches (36, 38) are open.
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Description

[0001] Method for operating an isolated DC / DC converter with a secondary current doubler and an active clamping capacitor for increasing the voltage range

[0002] The invention relates to the field of electronic power converters. It relates to a method for operating a DC / DC converter, a control unit for a DC / DC converter, and a DC / DC converter according to the preamble of the corresponding independent patent claims.

[0003] The power electronics market places high demands on high-voltage (HV) to low-voltage (LV) DC / DC converters with low power, for example, around 3 kW, used to supply low-voltage batteries. The voltage of such low-voltage batteries typically ranges from 10.5 V to 15.5 V. The converter must operate over a wide input voltage range, ideally without derating. Furthermore, a very low price for the product with as many features as possible is preferred. Electric vehicle manufacturers tend to increase the voltage of high-voltage batteries, and different customers may require different input voltage levels. Starting from today's battery voltage of 400 V, battery voltages of around 600 V to 800 V will become the new standard. Corresponding DC / DC converters should cover the widest possible voltage range to ensure versatility.

[0004] Figure 1 shows the structure of such a DC / DC converter, converting a primary input voltage Vp to a secondary output voltage Vs. Two full bridges 19, 40 are coupled through a transformer 3. The transmitted power is controlled by intermittently applying a voltage to the primary side of the transformer. The output voltage is regulated by the ratio between the on- and off-time (duty cycle) of this voltage on the primary side. Two lower switches S6 and S8 on the secondary side rectify the voltage applied to the transformer and short-circuit the secondary transformer windings in a free-wheeling state. In Figure 2, the diagram a) shows example waveforms with a duty cycle of 25%. Two upper switches S5 and S7 on the secondary side are used only as snubbers for high voltage peaks on the secondary side caused by the stray inductance of the transformer.In the steady state, the voltage at the center tap 39 of transformer 3 is equal to the secondary side.

[0005] Output voltage, ie <v c f> = VS. Thus, the DC input / output transfer function M(d) is given by where n is the transformer's transformation ratio and d is the primary duty cycle, with 0 < d < 0.5. With this known control method, the maximum output voltage s is limited to Vp / n. Assuming a fixed output voltage, as is common in the converter's application, since it is loaded by a low-voltage battery, the input voltage range is also limited accordingly.

[0006] The object of the invention is therefore to provide a method for operating a DC / DC converter, a control unit for a DC / DC converter, and a DC / DC converter of the type mentioned above, which allow for a wider range of applications. In particular, this should make it possible to operate with a wider range of input voltages for a given voltage on the output side. This object is achieved by a method for operating a DC / DC converter, a control unit for a DC / DC converter, and a DC / DC converter having the features of the corresponding independent patent claims.

[0007] The method is used to operate a DC / DC converter, wherein the DC / DC converter has a primary side, a secondary side and a transformer with a center tap, wherein an upper transformer tap and a lower transformer tap are connected via a full bridge circuit with upper switches to an upper connection point of a snubber capacitance and with lower switches to a lower connection point of the snubber capacitance, a lower secondary-side DC connection is connected to the lower connection point of the snubber capacitance and an upper secondary-side DC connection is connected via a filter inductance to the center tap,

[0008] In a first operating state, the lower switches alternately switch positive voltage pulses of the secondary voltage between the center tap and the lower secondary-side DC connection with a control level d between zero and 0.5, whereby the lower switches are closed between these voltage pulses and the upper switches divert currents, which would lead to voltage peaks when the lower switches are switched off, into the snubber capacitance.

[0009] In a second operating state, the upper switches alternately switch positive voltage pulses of the secondary voltage between the center tap and the upper connection point of the snubber capacitance, whereby between the voltage pulses the upper switches are closed and the lower switches are open.

[0010] In the second operating state, when the transformer is de-energized on the primary side, the first upper switch and the second upper switch are closed, thereby clamping the voltage at the center tap to the voltage at the first connection point of the snubber capacitor. By closing the upper switches between voltage pulses in the second operating state, the voltage at the upper secondary-side DC connection is formed based on the voltage at the snubber capacitor. This doubles the total voltage range that can be covered by the output voltage. This doubling refers to the maximum voltage that can be achieved in the first operating state, with the lower switches remaining closed and the duty cycle limited to 0.5.

[0011] In embodiments, in the second operating state, following the application of a voltage pulse by closing one of the upper switches, this upper switch is opened again in order to limit the discharge of the snubber capacitance.

[0012] This causes the voltage across the snubber capacitance to begin to oscillate.

[0013] The process for operating a DC / DC converter is described below with a higher level of detail: The DC / DC converter has a primary side, a secondary side and a transformer, where

[0014] • the transformer has a secondary-side upper transformer tap, lower transformer tap and a center tap,

[0015] • the secondary side has a lower secondary DC connection and an upper secondary DC connection,

[0016] • a filter inductance is connected between the upper secondary DC connection and the center tap,

[0017] • a first upper switch is connected between the upper transformer tap and a first connection point of a snubber capacitor, the second connection point of which is connected to the lower secondary DC connection, • a second upper switch is connected between the lower transformer tap and the first connection point of the snubber capacitor,

[0018] • a first lower switch is connected between the upper transformer tap and the lower secondary DC connection,

[0019] • a second lower switch is connected between the lower transformer tap and the lower secondary DC connection,

[0020] • each of the switches has a freewheeling diode,

[0021] In an extended operating state, the DC / DC converter repeatedly goes through the following states in this order:

[0022] • first state: the transformer is de-energized on the primary side, the first upper switch and the second upper switch are closed, the first lower switch and the second lower switch are open;

[0023] • second state: the transformer generates a positive voltage at the upper transformer tap with respect to the lower transformer tap, the second upper switch is opened and the second lower switch is closed;

[0024] • third state: the first upper switch is opened;

[0025] • fourth state: the transformer is de-energized on the primary side, the first upper switch and the second upper switch are closed and the second lower switch is opened;

[0026] • fifth state: the transformer generates a negative voltage at the upper transformer tap with respect to the lower transformer tap, the first upper switch is opened and the first lower switch is closed;

[0027] • sixth state: the second upper switch is opened.

[0028] The third and sixth states are optional, meaning they are skipped in embodiments.

[0029] In embodiments, the period of time during which the first state and / or the fourth state is active is where d is a modulation factor of the DC / DC converter and 0.5 <d<l gilt, und f sw is the switching frequency, i.e. the frequency with which the cycle repeats across the six states.

[0030] In embodiments, the period of time during which the second state and / or the fifth state is active is where n is the turns ratio of the primary winding to each of the secondary windings, Zi p the leakage inductance of the primary winding, Zi si and / .| S 2 are the leakage inductances of the secondary windings, and C sn ubber is the capacity of the snubber capacity.

[0031] In embodiments, the transmitted power is reduced at a duty cycle above 0.5. In embodiments, the transmitted power is reduced by reducing the output current. This allows the method to be implemented on existing circuit hardware and increase the transmittable voltage ratio without requiring hardware modification.

[0032] The control unit according to the invention for a DC / DC converter is programmed to execute the method according to one of the preceding patent claims. The control unit further comprises sensors for detecting currents and / or voltages in the DC / DC converter, as well as control stages for controlling the switches of the DC / DC converter. The DC / DC converter according to the invention comprises such a control unit. A computer program for operating the control unit for a DC / DC converter according to the invention can be loaded into an internal memory of a digital data processing unit of the control unit and comprises computer program code means which, when executed in the control unit, cause it to execute the method according to the invention. In a preferred embodiment of the invention, a computer program product comprises a data carrier, or a computer-readable medium, on which the computer program code means are stored.

[0033] Further preferred embodiments emerge from the dependent patent claims. Features of the method claims can be combined mutatis mutandis with the device claims, and vice versa.

[0034] The subject matter of the invention is explained in more detail below with reference to preferred embodiments, which are illustrated in the accompanying drawings. They show schematically:

[0035] Figure 1 shows the structure of a DC / DC converter;

[0036] Figure 2a) primary and secondary voltage curves in a first operating state of the DC / DC converter;

[0037] Figure 2b) primary and secondary voltage curves in a second operating state of the DC / DC converter;

[0038] Figure 2c) Relationships between drive levels and output voltage; Figure 3 Signal curves in the second operating state;

[0039] Figure 4 shows a reduction of the transmitted power in the second operating state.

[0040] In principle, identical or functionally identical parts are provided with identical reference numerals in the figures. Figure 1 shows the structure of a DC / DC converter. The DC / DC converter (10) has a primary side 1, a secondary side 2, and a transformer 3. The primary side 1 has an upper primary-side DC terminal 11 and a lower primary-side DC terminal 12, via which a primary-side bridge circuit 19 is fed, which applies voltage pulses to the primary side of the transformer 3.

[0041] The transformer 3 has an upper secondary winding 31 and a lower secondary winding 32, with a secondary-side upper transformer tap 33, lower transformer tap 34 and a center tap 39.

[0042] The secondary side 2 has a lower secondary DC terminal 48 and an upper secondary DC terminal 47, with a filter inductance 43 connected between the upper secondary DC terminal 47 and the center tap 39. A secondary bridge circuit 40 has:

[0043] • a first upper switch 35, which is connected between the upper transformer tap

[0044] 33 and a first connection point of a snubber capacitor 45, the second connection point of which is connected to the lower secondary-side DC connection 48,

[0045] • a second upper switch 37, which is connected between the lower transformer tap

[0046] 34 and the first connection point of the snubber capacity 45,

[0047] • a first lower switch 36, which is connected between the upper transformer tap

[0048] 33 and the lower secondary DC terminal 48,

[0049] • a second lower switch 38, which is connected between the lower transformer tap

[0050] 34 and the lower secondary side DC terminal 48, wherein each of the switches 35, 36, 37, 38 has a freewheeling diode.

[0051] The lower secondary-side DC terminal 48 and the upper secondary-side DC terminal 47 are connected to each other by a filter capacitor 44. This means that the filter capacitor 44 is connected between the lower secondary-side DC terminal 48 and the upper secondary-side DC terminal 47.

[0052] Figure 2a) shows the primary and secondary voltage waveforms in a first operating state of the DC / DC converter. This corresponds to a conventional control of the DC / DC converter. In the steady state, the voltage at the output choke averaged over the switching period is zero, so that the output voltage JA of the DC / DC converter is equal to the averaged center tap voltage. <vct>is. In the known hard-switched control method, the mean average voltage is controlled by adjusting the duty cycle d of the primary voltage, as shown in Figure 2a. In the prior art, both low-side MOSFETs (S6, S8) of secondary side 2 are turned on in the freewheeling state, i.e., the first lower switch 36 and the second lower switch 38.

[0053] Figure 2b) shows primary and secondary side voltage waveforms in a second operating state of the DC / DC converter. Here, both high-side MOSFETs (S5, S7) of secondary side 2 are switched on, i.e., the first upper switch 35 and the second upper switch 37. (This is in contrast to the prior art, according to which the two upper switches are switched the same as on the primary side.) Depending on which MOSFETs (low- or high-side) are used during freewheeling, different voltage waveforms result at the center tap (Figure 2a and Figure 2b, respectively). The use of the second operating state ("high-side freewheeling") therefore enables an extension of the output voltage range, and the snubber capacitor 45 is also used as an energy buffer in this operating state.

[0054] Figure 2c) shows relations between drive levels and output voltage, respectively the averaged center tap voltage <vct>.

[0055] • For output voltages between zero and Vp / n, the DC / DC converter operates in the first operating state. The primary side's duty cycle dpri is equal to the DC / DC converter's duty cycle d and takes values ​​between zero and 0.5.

[0056] • For output voltages between Vp / n and 2Vp / n, the DC / DC converter operates in the second operating mode. The primary side's duty cycle dpri is equal to 0.5- |0.5-<7|, where d takes on values ​​between 0.5 and 1. The duty cycle d of the DC / DC converter specifies the ratio between the output voltage and the maximum output voltage.

[0057] This removes the limitation of the duty cycle d of the DC / DC converter, as shown on the left y-axis in Figure 2c. If the duty cycle value is to be above 0.5, the upper switches (first upper switch 35 and second upper switch 37) are used during freewheeling to short-circuit the secondary windings of the transformer. This allows the maximum average center tap voltage of up to 2Vp / n to be applied. On the primary side, the duty cycle remains in the original range, i.e., 0 < dpri < 0.5. The range of the duty cycle and the secondary duty cycle, however, is now 0 < d < 1, and the relationship between dpri and d is given by d pri = 0.5 - |0.5 - d|.

[0058] The charging time of the snubber capacitor 45 is preferably limited according to the values ​​of the stray inductances (Llp, Llsl, Idsl) of the transformer 3 and the snubber capacitor 45 to minimize the effective current of the power transistors S5 and S7. During the active primary state, the corresponding secondary switch S5 or S7 is switched on for half the resonant time. This time is calculated as follows:

[0059] Switches S5 and S7 are also active during freewheeling to clamp the center tap to the voltage of the snubber capacitor 45, thus enabling an output voltage Vs higher than Vp / n. In the freewheeling state, the snubber capacitor 45 is discharged by the current of the filter inductor 43. Therefore, the on-time for the two switches S5 and S7 is divided into two periods. Part of the time (Toni-sss?) can be calculated based on the required duty cycle, i.e., how long the switches must clamp the center tap to the snubber capacitor voltage:

[0060] As already explained, another part of the time (T on 2-s5S7) on the oscillating circuit period during the snubber time interval in which the snubber

[0061] Capacity is charged:

[0062] ^on2-S5S7 — 7h a ]f_p erjot j

[0063] Figure 3 shows signal waveforms in the second operating state, ie the PWM signals and the transformer waveforms. It is assumed that the period begins when S2 and S3 are switched off, which is shown on the left side of Figure 3. Switch S5 is switched on for time T on i-s5S7 + T on 2-s5S7 switched on, and S7 only for the time T on i-s5S7. After that, S5 is turned off to prevent the current of the snubber capacitance 45 from oscillating and discharging the snubber capacitance 45. At the beginning of the second half-period, S5 must be turned on again, but only for the time interval T on i-s5S7 to short-circuit the transformer during the freewheeling interval. S7 must also be closed at this time for the time T on i-s5S7 + T on 2-S5S7 are switched on. For the remainder of the half-period, S7 remains off. Then the period ends and begins again with S5 and S7 switching on. In Figure 3, the value of d is approximately 0.6 and the value of d_pri is approximately 0.4.

[0064] In embodiments, the snubber capacitance 45 is sufficiently large, and the switching off S5 or S7, which would be necessary to prevent the current of the snubber capacitance 45 from oscillating and discharging the snubber capacitance 45, can be omitted. This is particularly possible in situations where the DC / DC converter is designed from the outset to operate in the second operating state.

[0065] In DC / DC converters that are not designed from the outset to operate in the second operating state, switches S5 and S7 are generally not designed for high current carrying capacity. Due to this limitation of the switches used, such converters must implement a derating for the output power, depending on the drive level d. This means that above a certain drive level, the transmitted power is reduced. This allows the possible output voltage range to be increased at full power up to this drive level, and overall, a significantly larger output voltage range can be achieved, albeit at reduced power.

[0066] Figure 4 shows such a reduction in the transmitted power in the second operating state, starting at a duty cycle of slightly above 0.5. The exact value at which the power is to be reduced and the degree of reduction are determined based on the specific parameters of the DC / DC converter, so that the permissible operating parameters of the components are not exceeded.

[0067] For a given output voltage, the second operating state can thus increase the range of input voltages with which a given DC / DC converter can be operated without requiring any changes to the hardware of the DC / DC converter.

[0068] For example, with an output voltage of 14 V, the input voltage range can be extended from 200 V - 400 V to 125 V - 400 V. LIST OF REFERENCE SYMBOLS

[0069] 1 primary page

[0070] 2 Secondary side

[0071] 3 Transformer

[0072] 10 DC / DC converters

[0073] 11 upper primary side DC connection

[0074] 12 lower primary side DC connection

[0075] 19 primary side bridge circuit

[0076] 31 upper secondary winding

[0077] 32 lower secondary winding

[0078] 33 upper transformer tap

[0079] 34 lower transformer tap

[0080] 35 first upper switch

[0081] 36 first lower switch

[0082] 37 second upper switch

[0083] 38 second lower switch

[0084] 39 Center tap

[0085] 40 secondary side bridge circuit

[0086] 41 upper connecting rail

[0087] 42 lower connecting rail

[0088] 43 Filter inductance

[0089] 44 filter capacity

[0090] 45 snubber capacity

[0091] 47 upper secondary DC connection

[0092] 48 lower secondary DC connection< / vct> < / vct>

Claims

PATENT CLAIMS 1. A method for operating a DC / DC converter (10), wherein the DC / DC converter (10) has a primary side (1), a secondary side (2) and a transformer (3) with a center tap (39), wherein an upper transformer tap (33) and a lower transformer tap (34) are connected via a full-bridge circuit with upper switches (35, 37) to an upper connection point of a snubber capacitor (45) and with lower switches (36, 38) to a lower connection point of the snubber capacitor (45), (2) a lower secondary-side DC connection (48) is connected to the lower connection point of the snubber capacitor (45) and an upper secondary-side DC connection (47) is connected via a filter inductance (43) to the center tap (39), wherein • in a first operating state, the lower switches (36, 38) alternately switch positive voltage pulses of the secondary voltage between the center tap (39) and the lower secondary-side DC connection (48) with a control level d between zero and 0.5, o wherein the lower switches (36, 38) are closed between these voltage pulses, and the upper switches (35, 37) divert currents, which would lead to voltage peaks when the lower switches are switched off, into the snubber capacitance (45); • in a second operating state, the upper switches (35, 37) alternately switch positive voltage pulses of the secondary voltage between the center tap (39) and the upper connection point of the snubber capacitance (45), o wherein between the voltage pulses the upper switches (35, 37) are closed and the lower switches (36, 38) are open.

2. Method according to claim 1, wherein in the second operating state, in each case following the application of a voltage pulse by means of one of the upper Switch (35, 37), the respective upper switch (35, 37) is opened to limit discharging of the snubber capacity (45).

3. A method for operating a DC / DC converter (10), preferably according to claim 1 or 2, wherein the DC / DC converter (10) has a primary side (1), a secondary side (2) and a transformer (3), wherein • the transformer (3) has a secondary-side upper transformer tap (33), lower transformer tap (34) and a center tap (39), • the secondary side (2) has a lower secondary side DC connection (48) and an upper secondary side DC connection (47), • a filter inductance (43) is connected between the upper secondary DC connection (47) and the center tap (39), • a first upper switch (35) is connected between the upper transformer tap (33) and a first connection point of a snubber capacitor (45), the second connection point of which is connected to the lower secondary-side DC connection (48), • a second upper switch (37) is connected between the lower transformer tap (34) and the first connection point of the snubber capacitance (45), • a first lower switch (36) is connected between the upper transformer tap (33) and the lower secondary DC connection (48), • a second lower switch (38) is connected between the lower transformer tap (34) and the lower secondary DC connection (48), • wherein each of the switches (35, 36, 37, 38) has a freewheeling diode, characterized in that in an extended operating state, the DC / DC converter (10) repeatedly passes through the following states in this order: • first state: the transformer (3) is de-energized on the primary side, the first upper switch (35) and the second upper switch (37) are closed, the first lower switch (36) and the second lower switch (38) are open; • second state: the transformer (3) generates a positive voltage at the upper transformer tap (33) with respect to the lower transformer tap (34), the second upper switch (37) is opened and the second lower switch (38) is closed; • optional third state: the first upper switch (35) is opened; • fourth state: the transformer (3) is de-energized on the primary side, the first upper switch (35) and the second upper switch (37) are closed and the second lower switch (38) is opened; • fifth state: the transformer (3) generates a negative voltage at the upper transformer tap (33) with respect to the lower transformer tap (34), the first upper switch (35) is opened and the first lower switch (36) is closed; • optional sixth state: the second upper switch (37) is opened.

4. The method according to claim 3, wherein the period of time during which the first state and / or the fourth state is active, where d is a control level of the DC / DC converter (10) and 0.5 <d<l gilt, und f sw is the switching frequency, i.e. the frequency with which the cycle repeats across the six states.

5. Method according to claim 3 or 4, wherein the period of time during which the second state and / or the fifth state is active, where n is the turns ratio of the primary winding to each of the secondary windings, Zi pthe leakage inductance of the primary winding, Zi si and Zis2 are the leakage inductances of the secondary windings, and Csnubber is the capacitance of the snubber capacitance (45).

6. Method according to one of the preceding claims, wherein the transmitted power is reduced at a modulation level above 0.

5.

7. The method according to claim 6, wherein the transmitted power is reduced by reducing the output current.

8. Control unit for a DC / DC converter, programmed to carry out the method according to one of the preceding claims.

9. DC / DC converter with a control unit according to claim 8.

10. DC / DC converter for carrying out the method according to one of claims 1 to 7 with the exception of claim 2, in which the snubber capacitance 45 is designed to be sufficiently large so that switching-off operations which would be necessary to prevent the current of the snubber capacitance 45 from oscillating and discharging the snubber capacitance 45 are not required.