3-way symmetric doherty power amplifier arrangement

Abstract

3-way Doherty power amplifier arrangement (100) is disclosed. The 3-way Doherty power amplifier arrangement (100) comprises a main power amplifier (PM) and two auxiliary power amplifiers (PAux1, PAux2). The 3-way Doherty power amplifier arrangement (100) further comprises a first quadrature coupler (QC1) and a second quadrature coupler (QC2). An input port (P11) of the first quadrature coupler (QC1) is coupled to a load, Output (OutM) of the main power amplifier (PM) is coupled to a through port (P13) of the first quadrature coupler (QC1), an isolated port (P14) of the first quadrature coupler (QC1) is open, and a coupled port (P12) of the first quadrature coupler (QC1) is connected to an input port (P21) of the second quadrature coupler (QC2). Output (OutA1) of the first auxiliary power amplifier (PAux1) is connected to a coupled port (P22) of the second quadrature coupler (QC2), output (OutA2) of the second auxiliary power amplifier (PAux2) is connected to a through port (P23) of the second quadrature coupler (QC2), an isolated port (P24) of the second quadrature coupler (QC2) is connected to an alternating current signal ground.

Description

[0001]3-WAY SYMMETRIC DOHERTY POWER AMPLIFIER ARRANGEMENT TECHNICAL FIELD Embodiments herein relate to power amplifier arrangement. In particular, they relate to 3-way symmetric Doherty power amplifier arrangement. Further, the embodiments relate to an electronic apparatus comprising the power amplifier arrangement. BACKGROUND In a wireless communication system, a transmitter employs power amplifiers (PA) to increase radio frequency (RF) signal power before transmission. A PA is expected to amplify input signals linearly and generate output signals with larger power but with identical characteristics to the input signals. New frequency bands are assigned for the 5thand 6thgeneration (5G / 6G) wireless communication networks, along with increased signal bandwidth. To get high spectral efficiency and high-speed data transmission, highly modulated signals have been applied in the 5G wireless communication networks. The high-order modulated signals have a large peak-to-average power ratio (PAPR). To adopt a high PAPR signal, the power amplifier must operate at a power back-off level from its peak power. The amount by which the power level is lowered from the maximum power is called power back-off. There are two power back-off types, input power back-off (IPBO) and output power back-off (OPBO). The IPBO is the power level at a PA input relative to the input power which produces the maximum output power. The OPBO is the power level at a PA output relative to the maximum output power level. For example, if the maximum output power level is +40dBm, the measured output power level of a power amplifier is +34dBm, then the OPBO level is 6dB. Doherty power amplifier (DPA) is one of the promising approaches for improving power added efficiency (PAE) over the 6-dB OPBO. PAE is defined by an equation PAE =100 × (Pout - Pin) / PDC, where PDC is input direct current (DC) power, Pout is RF output power and Pin is RF input power of the PA. A DPA operating with a wide bandwidth is also desired, to support applications such as multi-band, multi-standard transmitters. Various 3-stage or 3-way DPAs consisting of one main amplifier and two auxiliary amplifiers have been developed to improve efficiency and bandwidth. In the papers of A . Barthwal, et.al., “Bandwidth Enhancement of Three-Stage Doherty Power Amplifier Using Symmetric Devices”, IEEE Transactions on Microwave Theory and Techniques, Vol.63, No 8, pp.778-786, Aug.2015, J. Xia, et al., “Improved Three-Stage Doherty Amplifier Design With Impedance Compensation in Load Combiner for Broadband Applications”, IEEE Transactions on Microwave Theory and Techniques, Vol.67, No 2, pp.778-786, Feb.2019, and X. Zhang, et.al., “A 38GHz Deep Back-Off Efficiency Enhancement PA with Three-Way Doherty Network Synthesis Achieving 11.3 dBm Average Output Power and 14.7% Average Efficiency for 5G NR OFDM”, in Proc. IEEE RFIC Symp., June 2022, pp.239–242, symmetric 3-stage DPAs have been disclosed. Asymmetric DPAs have been disclosed in the papers of A. Barthwal, et.al., “Dual Input Digitally Controlled Broadband Three-Stage Doherty Power Amplifier With Back-Off Reconfigurability”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, vol.68, no.4, pp.1421-1429, April 2021, Y. Xu, et al. “Three-Stage Load Modulated Power Amplifier With Efficiency Enhancement at Power Back-Off”, IEEE Transactions on Microwave Theory and Techniques, vol.69, no 6, pp.3017- 3119, June 2021, Y. Cao, et. Al., “Continuous-Mode Hybrid Asymmetrical Load Modulated Balanced Amplifier with Three-Way Modulation and Multi-Band Reconfigurability”, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—I: REGULAR PAPERS, VOL.69, NO.3, MARCH 2022, and Y. Cao et al, “Hybrid asymmetrical load modulated balanced amplifier with wide bandwidth and three-way-Doherty efficiency enhancement”, IEEE MICROWAVE AND WIRELESS COMPONENTS LETTERS, VOL.31, NO.6, pp.721-724, JUNE 2021. However, there are problems with the existing 3-way DPA solutions. For example, symmetric 3-way DPA has a relatively narrow bandwidth. The performance of symmetric 3- way DPA is sensitive to the amplifier device’s parasitic capacitance at output. The asymmetric DPA requires a reduced drain supply voltage to the main amplifier and one of the auxiliary amplifiers, which results in a low power utilization factor, defined as ^^^^ ^^ ^^, ^^ ^^ ^^ / ( ^^^^ ^^ ^^, ^^ ^^ ^^ ^^+ ^^^^ ^^ ^^, ^^ ^^ ^^1.+ ^^^^ ^^ ^^, ^^ ^^ ^^2.). This means the power capability of amplifier transistors is not fully utilized and the cost of amplifier is increased. To maintain a good PAE or drain efficiency at higher power back-off level, gate biases of the two auxiliary amplifiers need to be tuned as a function of frequency, which requires extra digital control circuits. Further, utilizing tunable delay lines in a DPA to extend bandwidth is not a trivial task, considering linearity, losses, and digital control circuits. SUMMARY Therefore, it is an object of embodiments herein to provide a power amplifier arrangement with improved performance. According to one aspect of embodiments herein, the object is achieved by a 3-way power amplifier arrangement. The 3-way power amplifier arrangement comprises a main power amplifier having an input and an output, a first auxiliary power amplifier having an input and an output, a second auxiliary power amplifier having an input and an output. The 3-way power amplifier arrangement further comprises a first quadrature coupler comprising two or more coupled transmission lines and a second quadrature coupler comprising two or more coupled transmission lines. An input port of the first quadrature coupler is coupled to a load. The output of the main power amplifier is coupled to a through port of the first quadrature coupler, an isolated port of the first quadrature coupler is open, a coupled port of the first quadrature coupler is connected to an input port of the second quadrature coupler. An input port of the second quadrature is coupled to the coupled port of the first quadrature coupler. The output of the first auxiliary power amplifier is connected to a coupled port of the second quadrature coupler, the output of the second auxiliary power amplifier is connected to a through port of the second quadrature coupler, and an isolated port of the second quadrature coupler is connected to an alternating current (AC) signal ground. According to some embodiments herein, the main power amplifier, the first and second auxiliary power amplifiers may be configured to have same size and same supply voltage. According to some embodiments herein, the size of the main power amplifier, first and second auxiliary power amplifiers may be configured based on a desired output power and the supply voltage such that optimum load resistance ^^^^ ^^ ^^of the main and auxiliary amplifiers are determined. According to some embodiments herein, a characteristic impedance and a coupling coefficient of the two or more coupled transmission lines in the first quadrature coupler may be selected based on characteristic of a substrate or printed circuit board that the 3-way Doherty power amplifier arrangement is implemented on; and a characteristic impedance and a coupling coefficient of the two or more coupled transmission lines in the second quadrature coupler are determined based on the characteristic impedance and coupling coefficient of the two or more coupled transmission lines in the first quadrature coupler. The power amplifier arrangement according to embodiments herein has following advantages but not limited to: The power amplifier arrangement according to embodiments herein has wider bandwidth compared to other symmetric DPAs thanks to using coupled lines based quadrature couplers as power combiner at outputs of the main and auxiliary power amplifiers; The performance of the power amplifier arrangement according to embodiments herein is less sensitive to the variation of the parasitic capacitance at the power amplifier transistors’ output; The power amplifier arrangement according to embodiments herein has improved power utilization factor since the drain supply voltages for the main amplifier and auxiliary amplifiers are equal. Therefore, embodiments herein provide a power amplifier arrangement with improved performance on e.g. bandwidth, power utilization factor and sensitivity to the parasitic capacitance etc. BRIEF DESCRIPTION OF THE DRAWINGS Examples of embodiments herein are described in more detail with reference to attached drawings in which: Figure 1 is a schematic block diagram illustrating a power amplifier arrangement according to an embodiment herein; Figure 2 (a) is a simplified schematic block diagram illustrating a Lange coupler; (b) is a simplified schematic block diagram illustrating a quadrature coupler comprising two coupled transmission lines; Figure 3 is a diagram showing the fundamental output currents versus a voltage drive level of the power amplifier arrangement according to embodiments herein; Figure 4 is a simplified schematic block diagram illustrating the power amplifier arrangement according to embodiments herein; Figure 5 is a schematic block diagram illustrating a power amplifier arrangement according to an embodiment herein; Figure 6 is a diagram showing simulation results on drain efficiency versus output power for the power amplifier arrangement according to embodiments herein; and Figure 7 is a block diagram illustrating an electronic apparatus in which embodiments herein may be implemented. DETAILED DESCRIPTION Figure 1 shows a schematic block diagram of a power amplifier arrangement 100 according to embodiments herein, which is a 3-way Doherty power amplifier. The 3-way Doherty power amplifier arrangement 100 comprises a main power amplifier PM having an input InM and an output OutM. The 3-way Doherty power amplifier arrangement 100 further comprises a first auxiliary power amplifier PAux1 having an input InA1 and an output OutA1, and a second auxiliary power amplifier PAux2 having an input InA2 and an output OutA2. The 3-way Doherty power amplifier arrangement 100 may further comprise an input power splitter PS having an input Pin, a first output Out1, a second output Out2 and a third output Out3. The inputs InM, InA1, InA2 of the main power amplifier PM, the first and second auxiliary power amplifiers PAux1, PAux2 are coupled to the first, second and third output Out1, Out2, Out3 of the input power splitter PS respectively. The input power splitter PS maybe an anolog power splitter or maybe made in digital domain. The 3-way Doherty power amplifier arrangement 100 further comprises a first quadrature coupler QC1 comprising two or more coupled transmission lines TL11 / TL12, a second quadrature coupler QC2 comprising two or more coupled transmission lines TL21 / TL22. An input port P11 of the first quadrature coupler QC1 is coupled to a load. The output OutM of the main power amplifier PM is coupled to a through port P13 of the first quadrature coupler QC1, an isolated port P14 of the first quadrature coupler QC1 is open, a coupled port P12 of the first quadrature coupler QC1 is connected to an input port P21 of the second quadrature coupler QC2. The output OutA1 of the first auxiliary power amplifier PAux1 is connected to a coupled port P22 of the second quadrature coupler QC2, the output OutA2 of the second auxiliary power amplifier PAux2 is connected to a through port P23 of the second quadrature coupler QC2, an isolated port P24 of the second quadrature coupler QC2 is connected to an alternating current (AC) signal ground. The impedance of port P11 of the first quadrature coupler QC1 is the load resistance ^^^^, and this port is connected to an output matching network OMN which transforms ^^^^into 50 Ω. The input power Pin is split into three paths by the input power splitter PS, providing inputs for the main amplifier PM and auxiliary amplifiers PAux1, PAux2 with proper amplitudes and phases, to make sure that output powers from all amplifiers will be added constructively. In the first and second quadrature couplers QC1, QC2, a phase difference between the coupled port P12, P22 and through port P13, P23 is nominally 90 degrees. According to some embodiments herein, the first and second quadrature couplers QC1, QC2 may be Lange couplers comprising multiple transmission lines. According to some embodiments herein, the first quadrature coupler QC1 may comprise two coupled transmission lines TL11 / TL12 as shown in Figure 1. A first terminal of a first transmission line TL11 is the input port P11, a second terminal of the first transmission line TL11 is the through port P13, a first terminal of a second transmission line TL12 is the coupled port P12 and a second terminal of the second transmission line TL12 is the isolated port P14. According to some embodiments herein, the second quadrature coupler QC2 may comprise two coupled transmission lines TL21 / TL22, a first terminal of a first transmission line TL21 is the input port P21, a second terminal of the first transmission line TL21 is the through port P23, a first terminal of a second transmission line TL22 is the coupled port P22 and a second terminal of the second transmission line TL22 is the isolated port P24. According to embodiments herein, the 3-way Doherty power amplifier arrangement 100 is a 3-way symmetric Doherty power amplifier. That is the main power amplifier PM, the first and second auxiliary power amplifiers PAux1, PAux2 are symmetric and are configured to have same size and same supply voltage. In the flowing, as an example, the design equations will be derived for the 3-way symmetric Doherty power amplifier arrangement 100 using quadrature couplers based on two coupled transmission lines. The design equations for the 3-way symmetric Doherty power amplifier arrangement 100 using Lange couplers comprising multiple transmission lines can be derived similarly. Figure 2 (a) shows a simplified schematic of a Lange coupler and Figure 2 (b) shows a simplified schematic of a quadrature coupler based on two coupled transmission lines TL1, TL2. The length of the coupled transmission lines TL1, TL2 is a quarter-wavelength at the centre frequency of operating frequency band of the power amplifier arrangement 100. For transverse electromagnetic wave (TEM) and symmetric transmission lines, impedance matrix for the 4-port coupled lines is given by: where ^^ =√−1, ^^−and ^^+depend on the even- and odd-mode impedances, ^^0 ^^and ^^0 ^^of the coupled transmission lines: ^^ and ^^ , are determined by Z =√Z ^^−0 ^^ 0 ^^ 0 oeZoo, and coupling coefficient ^^ = , 0 < ^^ < 1: The 3-way symmetric Doherty power amplifier arrangement 100 is configured to operate in 3 power ranges, i.e. low power region, intermediate power region and high power region. Figure 3 shows amplitudes of the fundamental output currents of the main amplifier PM and auxiliary amplifiers PAux1, PAux2 versus a voltage drive level to the 3-way Doherty power amplifier arrangement 100. Imain, Iaux1and Iaux2denote the amplitude of the fundamental output currents from the main and two auxiliary amplifiers, respectively. The main power amplifier PM is configured to operate in a voltage drive level range of 0 < ^^ ≤ 1, wherein ^^ is the normalized voltage drive level to the 3-way Doherty power amplifier arrangement 100. The first auxiliary power amplifier PAux1 is configured to start operating when the voltage drive level ^^ reaches a first voltage drive level and the second power amplifier PAux2 is configured to start operating when the voltage drive level ^^ reaches a second voltage drive level ^^2. ^^1and ^^2are also called lower power back-off level and higher power back-off level, respectively. Figure 4 is a simplified schematic diagram showing an equivalent circuit of the 3-way symmetric Doherty power amplifier arrangement 100. For simplicity, the amplifiers are represented by current sources ^^^^ ^^ ^^ ^^, ^^^^ ^^ ^^1and ^^^^ ^^ ^^2. The magnitudes of the output currents of the main amplifier PM and auxiliary amplifiers PAux1, PAux2 depend on the normalized voltage drive level as shown in Figure 3. The amplitude of the fundamental output currents from the main and two auxiliary amplifiers may be expressed as: where ^^^^denotes the maximum fundamental current, assuming ^^^^is the same for all transistors in the main amplifier PM and auxiliary amplifiers PAux1, PAux2, since the 3-way Doherty power amplifier arrangement 100 is symmetric. The fundamental voltage of the main amplifier PM increases with the drive level ^^ and gets saturated as ^^ = ^^1. The fundamental voltage of the first auxiliary amplifier increases with ^^ and gets saturated as ^^ = ^^2. The second auxiliary amplifier gets saturated as ^^ = 1. The maximum fundamental voltage is Vm for all amplifiers. In the low power region, i.e. ^^ ≤ only the main amplifier is turned on, both first and second auxiliary amplifiers PAux1, PAux2 are turned off with infinitive impedance. Hence port P12 of QC1 is open, ^^2= 0. Port P13 is connected to the main amplifier PM which has fundamental current and voltage equal to ^^3= ^^^^ ^^ ^^ ^^= (see equation (4a)) and ^^3= ^^^^, respectively. The load resistance of the main amplifier is ^^ =^^ ^^^^1^^^^= denotes optimal load resistance of the main and auxiliary amplifiers at full power. Port P14 is open, ^^4= 0. Utilizing equation (1), one obtains impedance matrix for QC1: Current and voltage of port P11 of QC1 is given by ^^1= ^^ ^^^^and ^^1= − ^^ ^^^^^^^^, where ^^^^denotes the amplitude of the fundamental current through the load ^^^^, and ^^ represents the900phase difference between ^^1and ^^3. Inserting currents and voltages of ports P11 and P13 into equation (5), one obtains where ^^0and ^^ denote characteristic impedance and coupling coefficient of QC1. In the intermediate power region, ≤ ^^^^, the first auxiliary amplifier Paux1 is turned on at the lower power back-off level . The second auxiliary amplifier PAux2 is switched off. The main amplifier PM is in the on state. At port P13 of QC1, the current and voltage are ^^3= ^^^^ ^^ ^^ ^^= ^^2^^^^, and ^^3= ^^^^, respectively. While port P14 of QC1 is open, ^^4= 0. Inserting ports’ currents and voltages into equation (1) one obtains the current and voltage of port P12 of QC1 − ^^ ^^2= 2 ^^−^^2^^^^(7b) Port P12 of QC1 is connected to port P21 of QC2. Thus, the current and voltage of port P21 of QC2 are given = − ^^2and ^^1′= ^^2. Port P22 of QC2 is connected with the auxiliary amplifier PAux1, thus, its current ^^ = (see equation (4b)) and ^^2′= − ^^ ^^^^, where − ^^ represents the phase of output current of the first auxiliary amplifier PAux1. Port P24 of QC2 is grounded, so ^^4′= 0. Inserting the ports’ currents and voltages of QC2 into equation (1), one obtains: From equation (8b) one yields: ′ Since ^^ = In the high-power region, i.e. 1, all amplifiers are turned on. When ^^ = 1, the maim amplifier delivers ^^^^ ^^ ^^ ^^= ^^^^and ^^^^ ^^ ^^ ^^= ^^^^. The port P12 current and voltage of QC1 are derived as: (11a) (11b) For QC2, port P21 current and voltage are given = − ^^2and ^^1′= ^^2. Voltage at port P22 is ^^2′= − ^^ ^^^^and current at port P22 is ^^2′= − ^^ ^^^^. The magnitudes of the output current and voltage of the second auxiliary amplifier PAux2 are ^^^^and ^^^^, respectively. Thus, voltage at port P23 is ^^3′= ^^^^and current at port P23 is ^^3′= ^^^^. Port P24 is grounded, so ^^4′= 0. Inserting ports currents and voltages into equation (1), one yields: ′^^′ ^^ ^^ ^^^^ ^^ ^^=^^+ − ^^−^^′−(12) and 4 ^^^^ ^^ ^^^^−′= ^^+′^^−(13) Inserting equations (2) and (3) into equations (12) and (13), one obtains: and Comparing equations (9) and (15), gives According to some embodiments herein, an example design procedure may be described as following based on the design equations (6), (10), (14)-(16) derived above. The design procedure may be performed in any suitable order: • Determining the operating ranges for the main amplifier PM and auxiliary amplifiers PAux1, PAux2 by selecting ξ1 = 1 / 3 and ξ2 = 1 / 2 according to equation (10) ^^2= and equation • Configuring or selecting the size of the main power amplifier PM based on a desired output power and the supply voltage, so the optimum load resistance ^^^^ ^^ ^^of the main and auxiliary amplifiers is determined. The optimal load impedance ^^^^ ^^ ^^of the main amplifier PM is determined by the maximum current of the main amplifier ^^^^and the supply voltage ^^^^of the main ^^ amplifier ^^^^^^ ^^ ^^= At the optimal load impedance ^^^^ ^^ ^^the main power amplifier delivers a maximum output power. The sizes of the first and second auxiliary power amplifiers PAux1, PAux2 are the same as the main amplifier PM. • Determining or selecting QC1’s characteristic impedance ^^0and coupling coefficient ^^ based on characteristic of a substrate or printed circuit board (PCB) that the 3-way Doherty power amplifier arrangement 100 is implemented on. The variation range of these two parameters are determined by the characteristic of the substrate or PCB, including how many metal layers the substrate or PCB has and the distances between the metal layers, as well as the widths of TLs etc. • Determining a coupling coefficient ^^′of QC2 based on the characteristic impedance ^^0and coupling coefficient ^^ of the first quadrature coupler QC1 according to equation • Determining the characteristic impedance ^^^′^of the second quadrature coupler QC2 based on its coupling coefficient ^^′and the optimum load resistance ^^^^ ^^ ^^according to equation • Calculating the load resistance ^^^^of the first quadrature coupler QC1 based on the optimum load resistance ^^^^ ^^ ^^, the characteristic impedance ^^0and coupling coefficient ^^ of the first quadrature coupler QC1 and the first voltage drive level ^^1according to equation • If ^^^^is not equal to the system impedance i.e.50 Ω, an output impedance matching network OMN is designed and added to the input port P11 of the first quadrature coupler QC1. • According to the characteristic impedance, coupling coefficient, and centre operating frequency, the quadrature coupler is synthesized, i.e. the length, width and separation of the coupled transmission lines are configured. The embodiments herein are not limited to the above described preferred embodiments. Various alternatives, modifications and equivalents may be used. Figure 5 shows one variation of the proposed the 3-way symmetric Doherty power amplifier arrangement 500. In this 3-way symmetric Doherty power amplifier arrangement 500, the main amplifier PM is connected to port P3 of a quadrature coupler QC. Two auxiliary amplifiers PAux1, PAux2 are connected by a first transmission line TL1. Then, the two auxiliary amplifiers PAux1, PAux2 are connected to port P2 of the quadrature coupler QC via a second transmission line TL2. The characteristic impedance of TL1 should be equal to ^^^^ ^^ ^^, and the characteristic impedance of TL2 should be equal to ^^^^ ^^ ^^ / 2. To demonstrate the proposed 3-way power amplifier arrangement 100 has improved performance compared to the prior art 3-way DPA solutions, simulations have been done. In the simulations, an ideal transistor model with the following properties is assumed for the main and auxiliary power amplifiers: maximum RF-current Im = 1.04 A, maximum RF-voltage Vm = 25 V, knee voltage Vknee = 0.5, optimum load impedance at the full power Ropt = 24 Ω. An output capacitance Cds = 0.7 pF is assumed at the output of the power amplifier transistor, which is tuned out at the centre frequency, fc, by adding an inductor, ^^ 1 in shunt with Cdsdirectly at the drain of the power amplifier transistor. centre frequency is assumed to be 4 GHz. By using, = 0.5, and selecting QC1’s characteristic impedance of ^^ 35 Ω, and coupling coefficient ^^ = 0.707, the load resistance ^^^^= 34 Ω is obtained. According to (14) and (15), the characteristic impedance and coupling coefficient of QC2 are equal to 25.5 Ω and 0.729, respectively. Utilizing the found parameters in the simulation yields the simulated drain efficiency (DE) versus output power Pout at different frequencies as shown in Figure 6, where the frequencies labelled in figure is a normalized frequency ^^0= ^^ / ^^^^. Normalized frequency ^^0is swept from 0.8 to 1.2 with step of 0.1. The fractional bandwidth is 40%. At centre frequency ^^0= 1, the simulated DE has 3 peaks at OPBA of 46dBm- 36.5dBm=9.5 dB and 46dBm-40dBm=6 dB, as well as at maximum output power 46dBm, which agrees with the theoretical expectation. The design equations are thus validated by the simulations. At the centre frequency ^^0=1, the simulated DE curves are identical for prior art 3-way DPAs solutions and the proposed 3-way power amplifier arrangement 100. As the frequency departs from the centre frequency, the DEs of the prior art 3-way DPAs degrades much more quickly than for the proposed 3-way power amplifier arrangement 100. Therefore, the proposed 3-way symmetric power amplifier arrangement 100 is suitable for wide bandwidth applications. The sensitivity to the parasitic output capacitance is also simulated for the DE, gain, as well as maximum output power. The parasitic capacitance varies ±10% from the nominal value of 700 fF, i.e.630 fF, 700 fF, and 770 fF. The simulations show that when the capacitance changes from 630 fF to 770 fF, at centre frequency, ^^0= 1, the changes of DE, gain, as well as maximum output power is neglectable. Compared to prior art 3-way DPAs, the proposed 3-way power amplifier arrangement 100 is less sensitive to changes in the parasitic output capacitance, when the frequency departs from the center frequency. The simulations also reveal that the higher coupling coefficient of the coupler lines, the better is DE. The proposed 3-way symmetric power amplifier arrangement 100 has better DE, e.g. at least 20% larger, than other prior art 3-way DPAs, when ^^ = 0.75 and the frequencies departs from the centre frequency. The variation of DE, i.e. the DE sensitivity, of the proposed 3-way power amplifier arrangement 100 is less than the prior art 3-way DPAs. The proposed 3-way symmetric power amplifier arrangement 100 also has less variation of small signal gain, e.g. at least 3 dB lower than other prior art 3-way DPAs. Therefore, it has been demonstrated that the 3-way power amplifier arrangement 100 according to embodiments herein has some advantages: Having wider bandwidth compared to other 3-way symmetric DPAs; The performance is less sensitive to the variation of the parasitic capacitance at the amplifier output than other 3-way symmetric DPAs. Improved power utilization factor since the drain supplier voltage of the main amplifier is equal to that of the auxiliary amplifiers. The currents of all amplifiers increase linearly. To summarize, the 3-way power amplifier arrangement 100 according to embodiments herein is a 3-way symmetric DPA based on two quadrature couplers QC1, QC2. The quadrature coupler may be realized by two or more coupled transmission lines. A coupled port of the first quadrature coupler is connected to an input port of the second quadrature coupler. The outputs of the main and auxiliary amplifiers are connected to the through port P13 of the first quadrature coupler QC1, the coupled port P22 of the second quadrature coupler QC2 and the through port P23 of the second quadrature coupler QC2, respectively. The isolation port P14 of the first quadrature coupler QC1 is open, and the isolation port P24 of the second quadrature coupler QC2 is grounded. The characteristic impedance ^^0and coupling coefficient ^^ of the first quadrature coupler QC1 are selected based on the characteristic of the substrate or printed circuit board that the 3-way Doherty power amplifier arrangement 100 is implemented on. The characteristic impedance ^^^′^and coupling coefficient ^^′of the second quadrature coupler QC2 are determined based on the characteristic impedance ^^0and coupling coefficient ^^ of the first quadrature coupler QC1. The 3-way power amplifier arrangement 100 according to embodiments herein may be employed in various electronic devices or apparatus etc. Figure 7 shows a block diagram for an electronic device or apparatus 700. The electronic device or apparatus 700 comprises a power amplifier arrangement 100 according to embodiments herein. The electronic apparatus 700 may be a transmitter, a transceiver, a base station, a mobile device, a user equipment, a wireless communication device, or a radar for a communication system. The electronic apparatus 700 may comprise other units, where a memory 720, a processing unit 730 are shown. The embodiments herein are not limited to the above described preferred embodiments. Various alternatives, modifications and equivalents may be used. Those skilled in the art will understand that the power amplifier arrangement 100, 500 according to embodiments herein may be implemented in Printed Circuit Board with discreate transistors or any semiconductor technology, e.g. Bi-polar, N-type Metal Oxide Semiconductor (NMOS), P-type Metal Oxide Semiconductor (PMOS), Complementary Metal Oxide Semiconductor (CMOS), Silicon on Insulator (SOI) CMOS, field-effect transistor (FET), MOSFET technology etc. When using the word "comprise" or “comprising” it shall be interpreted as non-limiting, i.e. meaning "consist at least of". Therefore, the above embodiments should not be taken as limiting the scope of the invention, which is defined by the appended claims.

Claims

Claims 1. A 3-way Doherty power amplifier arrangement (100) comprising: a main power amplifier (PM) having an input (InM) and an output (OutM); a first auxiliary power amplifier (PAux1) having an input (InA1) and an output (OutA1); a second auxiliary power amplifier (PAux2) having an input (InA2) and an output (OutA2); a first quadrature coupler (QC1) comprising two or more coupled transmission lines (TL11 / TL12); a second quadrature coupler (QC2) comprising two or more coupled transmission lines (TL21 / TL22); and wherein an input port (P11) of the first quadrature coupler (QC1) is coupled to a load; the output (OutM) of the main power amplifier (PM) is coupled to a through port (P13) of the first quadrature coupler (QC1); an isolated port (P14) of the first quadrature coupler (QC1) is open; a coupled port (P12) of the first quadrature coupler (QC1) is connected to an input port (P21) of the second quadrature coupler (QC2); the output (OutA1) of the first auxiliary power amplifier (PAux1) is connected to a coupled port (P22) of the second quadrature coupler (QC2); the output (OutA2) of the second auxiliary power amplifier (PAux2) is connected to a through port (P23) of the second quadrature coupler (QC2); an isolated port (P24) of the second quadrature coupler (QC2) is connected to an alternating current signal ground.

2. The 3-way Doherty power amplifier arrangement (100) according to claim 1, wherein a phase difference between the coupled port (P12, P22) and through port (P13, P23) is 90 degrees in the first and second quadrature couplers (QC1, QC2), and wherein the first quadrature coupler (QC1) comprises two coupled transmission lines (TL11 / TL12), a first terminal of a first transmission line (TL11) is the input port (P11), a second terminal of the first transmission line (TL11) is the through port (P13), a first terminal of a second transmission line (TL12) is the coupled port (P12) and a second terminal of the second transmission line (TL12) is the isolated port (P14), and the second quadrature coupler (QC2) comprises two coupled transmission lines (TL21 / TL22), a first terminal of a first transmission line (TL21) is the input port (P21), a second terminal of the first transmission line (TL21) is the through port (P23), a first terminal ofa second transmission line (TL22) is the coupled port (P22) and a second terminal of the second transmission line (TL22) is the isolated port (P24).

3. The 3-way Doherty power amplifier arrangement (100) according to claim 1, wherein the first and second quadrature couplers (QC1, QC2) are Lange couplers comprising multiple transmission lines, and wherein a phase difference between the coupled port (P12, P22) and through port (P13, P23) in the first and second quadrature couplers (QC1, QC2) is 90 degrees.

4. The 3-way Doherty power amplifier arrangement (100) according to any one of claims 1-3, wherein the main power amplifier (PM), the first and second auxiliary power amplifiers (PAux1, PAux2) are symmetric and are configured to have same size and same supply voltage.

5. The 3-way Doherty power amplifier arrangement (100) according to any one of claims 1-4, wherein the main power amplifier (PM) is configured to operate in a voltage drive level range of 0 < ^^ ≤ 1, wherein ^^ is the normalized voltage drive level to the 3-way Doherty power amplifier arrangement (100); the first auxiliary power amplifier (PAux1) is configured to start operating when the voltage drive levelreaches a first voltage drive leveland the second power amplifier (PAux2) is configured to start operating when the voltage drive level ^^ reaches a second voltage drive level ^^2, and wherein the first and second voltage drive levels have a relationship according to an equation ^^2 =6. The 3-way Doherty power amplifier arrangement (100) according to any one of claims 1-5, wherein the size of the main power amplifier (PM), first and second auxiliary power amplifiers (PAux1, PAux2) are configured based on a desired output power and the supply voltage such that an optimum load resistance ^^^^ ^^ ^^of the main and auxiliary amplifiers is determined.

7. The 3-way Doherty power amplifier arrangement (100) according to any one of claims 1-6, wherein a characteristic impedance and a coupling coefficient of the two or more coupled transmission lines (TL11 / TL12) in the first quadrature coupler (QC1) areselected based on characteristic of a substrate or printed circuit board that the 3-way Doherty power amplifier arrangement (100) is implemented on; and a characteristic impedance ^^^′^and a coupling coefficient ^^′of the two or more coupled transmission lines (TL21 / TL22) in the second quadrature coupler (QC2) are determined based on the characteristic impedance ^^0and coupling coefficient ^^ of the two or more coupled transmission lines (TL11 / TL12) in the first quadrature coupler (QC1).

8. The 3-way Doherty power amplifier arrangement (100) according to claim 7, wherein the coupling coefficient ^^′of the two or more coupled transmission lines (TL21 / TL22) in the second quadrature coupler (QC2) are determined according to an equation9. The 3-way Doherty power amplifier arrangement (100) according to claim 8, wherein the characteristic impedance ^^^′^of the two or more coupled transmission lines (TL21 / TL22) in the second quadrature coupler (QC2) are determined based on its coupling coefficient ^^′and the optimum load resistance ^^^^ ^^ ^^according to an equation10. The 3-way Doherty power amplifier arrangement (100) according to any one of claims 7-9, wherein the load impedance RL of the first quadrature coupler (QC1) is determined based on the optimum load resistance ^^^^ ^^ ^^, the characteristic impedance ^^0and coupling coefficient ^^ of the two or more coupled transmission lines (TL11 / TL12) in the first quadrature coupler (QC1) and the first voltage drive levelaccording to an equation11. The 3-way Doherty power amplifier arrangement (100) according to claim 10, wherein when the load impedance ^^^^of the first quadrature coupler (QC1) is not equal to 50 Ω, the 3-way Doherty power amplifier arrangement (100) further comprises an output impedance matching network (OMN), and wherein the input port (P11) of the first quadrature coupler (QC1) is coupled to the load via the output impedance matching network.

12. The 3-way Doherty power amplifier arrangement (100) according any one of claims 1- 11, further comprises an input power splitter (PS) having an input (Pin), a first output (Out1), a second output (Out2) and a third output (Out3), and wherein the inputs (InM, InA1, InA2) of the main power amplifier (PM), the first and second auxiliary power amplifiers (PAux1, PAux2) are coupled to the first, second and third output (Out1, Out2, Out3) of the input power splitter (PS) respectively.

13. An electronic apparatus (700) comprising a power amplifier arrangement (100) according to any one of claims 1-12.

14. The electronic apparatus (700) according to claim 13, wherein the electronic apparatus (700) is any one of a transmitter, a transceiver, a base station, a mobile device, a user equipment, a wireless communication device or a radar for a communication system.

Images