Power converter and method for operating a power converter

Abstract

A power converter (10) comprises a switching circuit (11) and a control circuit (12). The switching circuit (11) is configured as a rectifier or an inverter. The control circuit (12) is configured to provide a number of control signals (SC1 to SC6) to the switching circuit (11). The number of control signals (SC1 to SC6) are pulse-width modulated signals with a switching frequency (fC). The control circuit (12) is configured to select the switching frequency (fC) out of a first number N of predefined discrete frequency values. Moreover, a method for operating a power converter is provided.

Description

[0001] DESCRIPTION

[0002] POWER CONVERTER AND METHOD FOR OPERATING A POWER CONVERTER

[0003] TECHNICAL FIELD

[0004] A power converter and a method for operating a power converter are provided .

[0005] BACKGROUND

[0006] A power converter is e . g . implemented as uninterruptible power supply ( abbreviated UPS ) or uninterruptible power source .

[0007] In the UPS market , customers want products that have a high electrical ef ficiency . Even incremental changes in electrical ef ficiency can lead to signi ficant di f ferences in operating costs . However, many techniques for increasing the ef ficiency also require designing and implementing expensive hardware changes which drive up the development and material costs and may make the product unattractive to customers . Developments that increase the electrical ef ficiency with little cost increase are thus highly desirable .

[0008] A power converter comprises switches . A part of the losses of the power converter results from switching losses of the switches . These losses often increase with an increasing number of switching procedures during a period of time .

[0009] It is an obj ect of the present application to provide a power converter and a method for operating a power converter with reduced switching losses . This obj ect is achieved by the sub ect-matter of the independent claims . Further embodiments and developments are given in the dependent claims .

[0010] SUMMARY

[0011] In an embodiment , a power converter comprises a switching circuit and a control circuit . The switching circuit is implemented as a recti fier or an inverter . The control circuit is configured to provide a number of control signals to the switching circuit . The number of control signals are pulse-width modulated signals , abbreviated PWM signals , with a switching frequency . The control circuit is configured to select the switching frequency out of a first number N of predefined discrete frequency values .

[0012] Advantageously, the switching frequency is a variable frequency . The switching frequency can be kept low such that switching losses are low . The control circuit is configured to select a higher switching frequency only when advantageous for power conversion . The first number N of predefined discrete frequency values are N di f ferent frequency values . The switching frequency can also be named carrier frequency .

[0013] In an embodiment of the power converter, the switching frequency is a value out of at least two di f ferent predefined frequency values .

[0014] In an embodiment of the power converter, the first number N is in a range between two and five . In an embodiment of the power converter, a first frequency value f l and a second frequency value f2 of the first number N of frequency values follow the equation : f2 = 2 • f l

[0015] In an embodiment of the power converter, the switching frequency is a value out of at least three di f ferent frequency values .

[0016] In an embodiment of the power converter, the first number N is three . The switching frequency is a value out of a group consisting of a first , a second and a third frequency value . The third frequency value is higher than the second frequency value . The second frequency value is higher than the first frequency value .

[0017] In an embodiment of the power converter, the first frequency value f l , the second frequency value f2 and the third frequency value f3 of the first number N of predefined discrete frequency values follow the equations : f3 = 2 • f2 and f2 = 2 • f l

[0018] In an embodiment of the power converter, the control circuit is configured to set the switching frequency of the switching frequency starting from a start point of time during a period of time from the third frequency value via the second frequency value , the first frequency value , the second frequency value , the third frequency value , the second frequency value , the first frequency value , the second frequency value to the third frequency value . For example , the start point of time is a zero crossing of an AC voltage , such as e.g. a desired AC voltage at an output side of the power converter or of an input AC voltage at an input side of the power converter.

[0019] In an embodiment of the power converter, the power converter comprises an analog-to-digital converter, abbreviated AD converter. The AD converter is coupled to an output side of the switching circuit or of the power converter. In an example, the AD converter is configured to operate at a constant frequency.

[0020] In an embodiment of the power converter, the constant frequency fA of the AD converter follows the equation: fA = 2 • n • fl, wherein n is an integer number such as 1, 2, 3 etc. and fl is the smallest frequency value of the first number N of predefined discrete frequency values.

[0021] In an embodiment of the power converter, the control circuit is configured such that the switching frequency changes its value at predetermined times (e.g. during a period of an AC voltage) or at predetermined phase angles of the AC voltage. The AC voltage is e.g. the desired AC voltage at the output side of the power converter or of the input AC voltage at the input side of the power converter.

[0022] In an embodiment of the power converter, the control circuit sets a duty cycle of a control signal of the number N of control signals. The control signals of the number N of control signals typically have different duty cycles. A desired output voltage of the power converter is achieved by varying the duty cycle or duty cycles , whereas the first number N of predefined discrete frequency values are predetermined and the points of time for setting another switching frequency of the first number N of predefined discrete frequency values are predetermined . Thus , the control of the power converter can be achieved with low ef fort .

[0023] In an embodiment of the power converter, the control circuit performs a dead time compensation . In a power converter, a dead time is a brief delay between the deactivation of one switch and the activation of its complement . The dead time is implemented to avoid accidental short-circuit . The dead time causes the ef fective duty cycle transmitted to the power converter from the controller to be slightly lower than the commanded value as a function of the switching frequency . When the control signal switches from one predefined discrete frequency value to another, the ef fect of the dead time upon the duty cycle transmitted to the power converter will change , which will introduce harmonic distortion . From empirical observation, this distortion caused by the change in frequency can be compensated by multiplying the duty cycle generated by the controller by a gain . Thus , a duty cycle of a control signal of the number of control signals is adj usted, when the control signal switches from one predefined discrete frequency value to another predefined discrete frequency value . Advantageously, the gain-based dead time compensation scheme is added to reduce the harmonic distortion caused by the change in switching frequency .

[0024] In an embodiment of the power converter, the control circuit is configured to change the switching frequency during a period of the AC voltage at predetermined times or at predetermined phase angles with respect to a zero crossing of the AC voltage ( or every second zero crossing) .

[0025] In an embodiment of the power converter, the switching circuit is reali zed as a recti fier . The AC voltage is an input voltage tapped at an input side of the recti fier . The switching circuit performs an AC-to-DC conversion .

[0026] In an alternative embodiment of the power converter, the switching circuit is reali zed as an inverter . The AC voltage is an output voltage tapped at an output side of the inverter or of the power converter or an AC voltage desired at the output side of the inverter or of the power converter . The switching circuit is implemented e . g . as a two-level inverter . The switching circuit performs a DC-to-AC conversion .

[0027] In a further development of the power converter, the switching circuit being reali zed as an inverter comprises a first input , a second input and an output , a first switch coupled to the first input and to the output , and a second switch coupled to the output and to the second input .

[0028] In an embodiment of the power converter, the control circuit is configured to provide a first control signal of the number of control signals to a control terminal of the first switch and a second control signal of the number of control signals to a control terminal of the second switch . In an embodiment , the power converter comprises a first output terminal and a filter circuit which is coupled to the output of the switching circuit and to the first output terminal . The filter circuit is e . g . a low-pass filter . In an example , the filter circuit is an inductive-capacitive filter .

[0029] In an embodiment of the power converter, the filter circuit comprises a first inductor which couples the output of the switching circuit to the first output terminal .

[0030] In an embodiment of the power converter, the filter circuit comprises a first capacitor which couples the first output terminal to a neutral line .

[0031] In an embodiment , a method for operating a power converter comprises generating a number of control signals by a control circuit , wherein the number of control signals are pulsewidth modulated signals with a switching frequency and the switching frequency is selected out of a first number N of predefined discrete frequency values , and providing the number of control signals to the switching circuit which is configured as a recti fier or an inverter .

[0032] The power converter described above is particularly suitable for the method for operating a power converter . Features described in connection with the power converter can therefore be used for the method and vice versa .

[0033] In an embodiment , the power converter reali zes a discrete variable switching frequency pulse-width modulation ( abbreviated VSF PWM) for power electronics ef ficiency improvement .

[0034] In an embodiment , the power converter implements a control strategy for power electronic switching converters that enables an electrical ef ficiency improvement without requiring hardware changes . It introduces additional slower switching frequencies in the controller to reduce device switching loss by maximi zing the inductor current ripple utili zation . It uses discrete switching frequencies for compatibility with fixed- frequency analog-to-digital sampling .

[0035] In an embodiment , the variable switching frequency pulsewidth modulation ( shorted as VSF PWM) is a software-based method for increasing the ef ficiency of a power electronics converter without requiring hardware changes . It modi fies the switching frequency of the switching devices or switches throughout the electrical line cycle to achieve higher electrical ef ficiency with manageable impact on other key speci fications . As a design requirement , it maintains the maximum current switching ripple that would otherwise be experienced in non-VSF PWM operation . The electrical ef ficiency is increased by reducing the switching energy loss , with experimental validation revealing an ef ficiency gain of at least 0 . 21 percentage points in an example across the load range . It is designed for compatibility with existing firmware . As a tradeof f , it slightly degrades the converter transient response performance and increases the total harmonic distortion, abbreviated THD .

[0036] In an embodiment , VSF PWM is implemented by first determining which switching frequencies are compatible with the underlying firmware sampling rate and modulation update rate . Then, a design equation is used to predict the switching current ripple throughout a line cycle for each identi fied switching frequency . Based on this analysis , the algorithm is developed for selecting the switching frequency based on the voltage phase angle calculated by the controller .

[0037] In an embodiment , the VSF PWM is di f ferent from published documents in the following ways : ( 1 ) the power converter uses discrete switching frequencies instead of a continuous switching frequency range ; ( 2 ) the power converter modi fies the switching frequency of each converter phase separately;

[0038] ( 3 ) the sampling mechanism is not controlled by the switching frequency .

[0039] BRIEF DESCRIPTION OF THE DRAWINGS

[0040] The following description of figures of examples or embodiments may further illustrate and explain aspects of the power converter and the method for operating a power converter . Arrangements , structures and devices with the same structure and the same ef fect , respectively, appear with equivalent reference symbols . In so far as arrangements , structures and devices correspond to one another in terms of their function in di f ferent figures , the description thereof is not repeated for each of the following figures .

[0041] Figures 1A and IB show exemplary embodiments of a power supply and a power converter ;

[0042] Figures 2A to 2G show exemplary embodiments of characteristics of a power converter ; and Figures 3A to 3C show further exemplary embodiments of characteristics of a power converter.

[0043] DETAILED DESCRIPTION

[0044] Figure 1A shows an exemplary embodiment of a power converter 10. The power converter 10 comprises a switching circuit 11 which is configured as a rectifier or an inverter, and a control circuit 12. The control circuit 12 provides a number of control signals SCI to SC6 to the switching circuit 11.

[0045] The power converter 10 comprises an analog-to-digital converter 13, abbreviated AD converter, coupled to an output side of the switching circuit 11 or of the power converter 10. An input of the AD converter 13 is connected e.g. to a first output terminal 31 of the power converter 10. An output of the AD converter 13 is connected e.g. to an input of the control circuit 13.

[0046] The switching circuit 11 is realized as an inverter. The switching circuit 11 comprises a first input 14, a second input 15, a first output 16, a first switch 21 coupled to the first input 14 and to the output 16 and a second switch 22 coupled to the first output 16 and to the second input 15. The first and the second switch 21, 22 are realized e.g. as metal-oxide-semiconductor field-effect transistors, abbreviated MOSFET, as insulated gate bipolar transistors, abbreviated IGBT.

[0047] The control circuit 12 provides a first control signal SCI of the number of control signals SCI to SC6 to a control terminal of the first switch 21 and a second control signal

[0048] SC2 of the number of control signals SCI to SC6 to a control terminal of the second switch 22 .

[0049] The number of control signals SCI to SC6 are pulse-width modulated signals with a switching frequency fC . The first and the second control signal SCI , SC2 have the identical value of the switching frequency fC at a point of time (which means always ) . The switching frequency fC has a variable frequency value . The switching frequency fC varies . The switching frequency fC is reali zed as a carrier frequency . The power converter 10 comprises e . g . a phase-locked loop circuit 19 , abbreviated PLL circuit . An output of the PLL circuit 19 is connected to the control circuit 12 . An input of the PLL circuit 19 is connected to an oscillator (not shown) or an AC voltage (not shown) which is used as reference .

[0050] The power converter 10 comprises the first output terminal 31 and a filter circuit 20 . The filter circuit 20 is coupled to the first output 16 of the switching circuit 11 and to the first output terminal 31 . The filter circuit 20 comprises a first inductor 34 which couples the first output 16 of the switching circuit 11 to the first output terminal 31 . The filter circuit 20 comprises a first capacitor 37 which couples the first output terminal 31 to a neutral line 30 . In an example , the neutral line N is connected to a reference potential terminal or a ground terminal .

[0051] Each control signal of the number of control signals SCI to SC6 has a switching frequency fC which is from the same set of predefined discrete frequency values . The switching frequency fC is a value out of at least two predefined frequency values f l , f2 . In an example , f l< f2 . A first frequency value f l and a second frequency value f2 of at least two predefined frequency values follow e . g . the equation : f2 = 2 • f l

[0052] Similarly, the switching circuit 11 comprises a second output 17 , a third switch 23 coupled to the first input 14 and to the second output 17 and a fourth switch 24 coupled to the second output 17 and to the second input 15 .

[0053] The control circuit 12 provides a third control signal SC3 of the number of control signals SCI to SC6 to a control terminal of the third switch 23 and a fourth control signal SC4 of the number of control signals SCI to SC6 to a control terminal of the fourth switch 24 . The third and the fourth control signal SC3 , SC4 have the identical value of the switching frequency fC at a point of time (which means always ) . Said value may be equal or may be di f ferent from the switching frequency fC of the first and the second control signal SCI , SC2 at this point of time .

[0054] The power converter 10 comprises a second output terminal 32 . The filter circuit 20 is coupled to the second output 17 of the switching circuit 11 and to the second output terminal 32 .

[0055] The filter circuit 20 comprises a second inductor 35 which couples the second output 17 of the switching circuit 11 to the second output terminal 32 . The filter circuit 20 comprises a second capacitor 38 which couples the second output terminal 32 to the neutral line 30 .

[0056] Correspondingly, the switching circuit 11 comprises a third output 18 , a fi fth switch 25 coupled to the first input 14 and to the third output 18 and a sixth switch 26 coupled to the third output 18 and to the second input 15 . The control circuit 12 provides a fi fth control signal SC5 of the number of control signals SCI to SC6 to a control terminal of the fi fth switch 25 and a sixth control signal SC6 of the number of control signals SCI to SC6 to a control terminal of the sixth switch 26 . The fi fth and the sixth control signal SC5 , SC6 have the identical value of the switching frequency fC at a point of time (which means always ) . Said value may be equal or may be di f ferent from the values of the switching frequency fC of the first to the fourth control signal SCI to SC4 at this point of time .

[0057] The power converter 10 comprises a third output terminal 33 . The filter circuit 20 is coupled to the third output 18 of the switching circuit 11 and to the third output terminal 33 . The filter circuit 20 comprises a third inductor 36 which couples the third output 18 of the switching circuit 11 to the third output terminal 33 . The filter circuit 20 comprises a third capacitor 39 which couples the third output terminal 33 to the neutral line 30 . A load connected to the outputs 31 to 33 is represented by three resistors .

[0058] Figure IB shows an exemplary embodiment of a power supply 50 with a power converter 10 which is a further development of the power converter 10 shown in Figure 1A. The power supply 50 comprises the power converter 10 . The switching circuit 10 as shown in Figures 1A and IB is implemented as three-phase inverter. The filter circuit 20 is realized as three-phase output LC filter. The power converter 10 comprises a first and a second smoothing capacitor 41, 42. The first smoothing capacitor 41 couples the first input 14 to the neutral line 30. The second smoothing capacitor 42 couples the second input 15 to the neutral line 30.

[0059] The power converter 50 comprises a battery 51 and a battery converter 52. The battery converter 52 couples the battery 51 to the power converter 10, e.g. to the first and the second input 14, 15 of the switching circuit 11. The battery converter 52 is realized e.g. as a two-phase interleaved battery converter.

[0060] Additionally, the power supply 50 comprises a further power converter 53. The further power converter 53 comprises a further switching circuit 57. The further switching circuit

[0061] 57 is realized as a rectifier, e.g. as a three-phase rectifier. The further switching circuit 57 is coupled to a supply input of the power supply 50 and to the power converter 11. The supply input comprises a first, a second and a third supply input 54 to 56 and e.g. the neutral line 30. The further switching circuit 57 has a first and a second rectifier output which are coupled or connected to the first and the second input 14, 15 of the switching circuit 11. The further power converter 53 comprises a further filter circuit

[0062] 58 which couples the first, the second and the third supply input 54 to 56 and the neutral line 30 to the further switching circuit 57. The further filter circuit 58 is realized as three-phase input LC filter.

[0063] In an embodiment, the control circuit 12 additionally generates control signals for the switches of the further switching circuit 57. The control signals of the further switching circuit 57 are generated similarly to the control signals SCI to SC6 of the switching circuit 11.

[0064] Figures 2A and 2B show an exemplary embodiment of a characteristic of a power converter 10 which is a further development of the power converter shown in Figures 1A and IB. An input voltage VIN, e.g. an input voltage of a first phase A, and an angle cp is shown as a function of a time t. The angle cp is a phase-locked loop angle, abbreviated PLL angle. The switching frequency fC has a value out of three frequency values fl, f2, f3.

[0065] The first, the second and the third frequency value fl, f2 and f3 follow the equations: f3 = 2 • f2 and f2 = 2 • fl

[0066] For example, fl = 9 kHz, f2 = 18 kHz and f3 = 36 kHz.

[0067] The control circuit 12 is configured to set the switching frequency fC starting from a start point of time (e.g. a zero crossing of the input voltage) from the third frequency value f3 via the second frequency value f2, the first frequency value fl, the second frequency value f2, the third frequency value f3, the second frequency value f2, the first frequency value fl and the second frequency f2 to the third frequency value f3. The control circuit 12 is configured such that the switching frequency fC changes its value at predetermined times tl to t8 or at predetermined phase angles of the input AC voltage which is illustrated in Figure 2B. The control circuit 12 changes the switching frequency fC during a period of the AC voltage at the predetermined times tl to t8 or at predetermined phase angles with respect to a zero crossing of the AC voltage or a phase angle of -n = - 180 °C . At the two peaks of the AC voltage during a period, the lowest carrier frequency fC (namely the first frequency value f l ) is set by the control circuit . At the two zero-crossings of the AC voltage during a period, the highest carrier frequency fC (namely the third frequency value f3 ) is set by the control circuit 12 .

[0068] A method for operating a power converter comprises generating a number of control signals SCI to SC6 by a control circuit 12 , wherein the number of control signals SCI to SC6 are pulse-width modulated signals with a switching frequency fC, and providing the number of control signals SCI to SC6 to the switching circuit 11 . The number of control signals SCI to SC6 are pulse-width modulated signals with di f ferent values of the switching frequency fC . The control circuit 12 selects the switching frequency fC out of a first number N of predefined discrete frequency values . The control signals of the same phase are pulse-width modulated signals with the same value of the switching frequency fC . In Figures 2A and 2B, the first number N is three . The switching circuit 11 is reali zed as an inverter . The AC voltage is an output voltage tapped at an output side of the inverter .

[0069] As shown in Figures 2A and 2B, the PLL (phase locked loop ) angle tracks the input AC voltage VIN and is used to determine the switching frequency fC in VSF PWM : in Figure 2A: the phase A input AC voltage VIN, and in Figure 2B, the PLL angle cp . The annotated regions indicate the switching frequency as determined by the PLL angle cp, where f3 = 36 kHz ( fast ) , f2 = 18 kHz (medium) , and f l = 9 kHz ( slow) . In an alternative embodiment , the switching circuit 11 is reali zed as a recti fier and the AC voltage is an input voltage tapped at an input side of the recti fier .

[0070] Figures 2C and 2D show exemplary embodiments of a characteristic of a power converter 10 which is a further development of the power converter shown in Figures 1A, IB, 2A and 2B . In a three phase system, the control circuit 12 uses six states S I to S 6 . The switching frequencies fC for the three phases A, B, C are indicated in the table . Thus , the switching frequency fC for the first phase A can be di f ferent from the switching frequencies fC of the second and the third phase B, C at a point of time .

[0071] In Figures 2C and 2D, the DLL angle-based approach is illustrated for determining the switching frequency fC for all three phases A, B, C . Figure 2C shows a waveform of the PLL angle cp with the di f ferent switching frequency states S I to S 6 in one line cycle , where the di f ferent sections indicate which phase is currently operating at a non-36 kHz switching frequency fC . Figure 2D shows an alternative illustration of the selection of the switching frequency fC for each phase as described by a unit circle representing the phase of the PLL angle cp .

[0072] Figures 2E shows an exemplary embodiment of a characteristic of a power converter which is a further development of the power converter shown in Figures 1A, IB and 2A to 2D . The analog-to-digital converter 13 operates at a constant frequency fA. The constant frequency fA follows the equation : f A = 2 n • f l , wherein n is an integer number such as 1, 2, 3 etc. and fl is the smallest frequency value of the switching frequency fC.

[0073] In Figure 2E, a timing diagram of the VSF PWM implementation is illustrated; from top to bottom:

[0074] - ADC (analog to digital converter) SOC (start of conversion) and EOC (end of conversion) and rectifier and inverter control function calls;

[0075] - signal with the constant frequency fA of the AD converter 13: 72 kHz ADC saw tooth counter;

[0076] - carrier wave with f3 = 36 kHz;

[0077] - carrier wave with f2 = 18 kHz;

[0078] - carrier wave with fl = 9 kHz.

[0079] Between an end of conversion and a next start of conversion, the control circuit 12 has time to perform other tasks such as rectifier control (abbreviated RCTL) , inverter control (abbreviated ICTL) or other tasks. The vertical lines indicate moments where the voltages and currents are sampled by the AD converter 13. The crosses on the 9 kHz waveform indicate samples that need to be discarded.

[0080] Figures 2F shows an exemplary embodiment of a characteristic of a power converter 10 which is a further development of the power converters shown in Figures 1A, IB and 2A to 2E. A predicted switching current ripple CR according to the equation below in one 50 Hz line cycle is elucidated, when the uninterruptible power module, abbreviated UPM, is operating at different switching frequencies fC: f3=36 kHz (bottom) , f2=18 kHz (middle) , and fl=9 kHz (top) . The maximum switching current ripple when operating at 36 kHz is shown by the hori zontal line at about 45 A. Operation above the line is undesirable . In VSF PWM, the power converter 10 is operated at the slowest possible switching frequency fC that allows the current ripple to remain below a limit value ( line at 45 A) . The Figure 2 F marks the events where the control circuit 12 performs transition from one switching frequency fC to another to meet this requirement .

[0081] A design equation for predicting current ripple is e . g . :

[0082] Vdc 2 (cot) 4Lfswherein Ai ( t ) is the current switching ripple in one switching period, D is the magnitude of the duty or modulation wave , Vcis the magnitude of the filter capacitor voltage , I is the magnitude of the inductor current without switching ripple , RLis the inductor' s equivalent series resistance , Vdc is the DC voltage measured from 14 to 15 , L is the filter inductance , and fsis the switching frequency .

[0083] Figures 2G shows an exemplary embodiment of a characteristic of a power converter 10 which is a further development of the power converter shown in Figures 1A, IB and 2A to 2 F . In the upper part of Figure 2G, simulated inductor current waveforms I under fundamental switching frequency PWM, abbreviated FSF PWM ( legacy) operation is shown and in the lower part of Figure 2G, VSF PWM operation current waveforms ( according to examples of the power converter 10 above ) are shown . The three lines show the average current IAV, the upper amplitude values UPP of the current I and the lower amplitude values LOW of the current I .

[0084] In VSF PWM, multiple values of the switching frequency fC are used instead of one . The change in switching frequency fC is timed such that the maximum switching current ripple in VSF PWM never exceeds the maximum switching current ripple observed in FSF PWM .

[0085] Figure 3A to 30 shows further exemplary embodiments of characteristics of a power converter 10 which is a further development of the power converter shown in Figures 1A, IB and 2A to 2G . In Figures 3A to 30, a FSF PWM versus VSF PWM comparison is shown : in Figure 3A ef ficiency EF, in Figure 3B input current THD ( iTHD) , and in Figure 3C output voltage THD (vTHD) as a function of a load LO in percent of a full load at 720 V DC link and a fan or fans running at full speed . THD is the abbreviation for total harmonic distortion . The solid lines represent the VSF PWM operation and the lines with short dashes represent the FSF PWM operation . The lines with long dashes show the di f ference between the FSF PWM and VSF PWM curves and use the right-hand axes .

[0086] The invention is not limited to the description of the embodiments . Rather, the invention comprises each new feature as well as each combination of features , particularly each combination of features of the claims , even i f the feature or the combination of features itsel f is not explicitly given in the claims or embodiments . Reference numerals

[0087] 10 power converter

[0088] 11 switching circuit

[0089] 12 control circuit

[0090] 13 analog-to-digital converter

[0091] 14 first input

[0092] 15 second input

[0093] 16 - 18 output

[0094] 19 phase-locked loop

[0095] 20 filter circuit

[0096] 21 - 26 switch

[0097] 30 neutral line

[0098] 31 to 33 output terminal

[0099] 34 to 36 inductor

[0100] 37 to 39 capacitor

[0101] 41 , 42 smoothing capacitor

[0102] 50 power supply

[0103] 51 battery

[0104] 52 battery converter

[0105] 53 further power converter

[0106] 54 to 56 input terminal

[0107] 57 further switching circuit

[0108] 58 further filter circuit

[0109] A, B, C phase

[0110] CR current ripple fA constant frequency fC switching frequency f l , f2 , f3 frequency value

[0111] SCI to SC6 control signal t time

[0112] VIN input AC voltage angle

Claims

Claims1. A power converter (10) , comprising a switching circuit (11) which is configured as a rectifier or an inverter, and a control circuit (12) configured to provide a number of control signals (SCI to SC6) to the switching circuit (11) , wherein the number of control signals (SCI to SC6) are pulsewidth modulated signals with a switching frequency (fC) , and wherein the control circuit (12) is configured to select the switching frequency (fC) out of a first number N of predefined discrete frequency values.

2. The power converter (10) of claim 1, wherein the first number N is in a range between two and five .

3. The power converter (10) of claim 1 or 2, wherein a first frequency value and a second frequency value of the first number N of frequency values are fl and f2, and wherein f2 = 2 • fl .

4. The power converter (10) of any one of claims 1 to 3, wherein the first number N is three and the switching frequency is a value out of a first, a second and a third frequency value (fl, f2, f3) .

5. The power converter (10) of claim 4, wherein the first, the second and the third frequency value fl, f2, f3 of the first number N of predefined discrete frequency values follow the equations:f3 = 2 • f2 and f2 = 2 • fl .

6. The power converter (10) of claim 4 or 5, wherein the control circuit (12) is configured to set the switching frequency (fC) starting from a start point of time from the third frequency value (f3) via the second frequency value (f2) , the first frequency value (fl) , the second frequency value (f2) , the third frequency value (f3) , the second frequency value (f2) , the first frequency value (fl) and the second frequency value (f2) to the third frequency value ( f 3 ) .

7. The power converter (10) of any one of claims 1 to 6, wherein the power converter (10) comprises an analog-to- digital converter (13) coupled to an output side of the switching circuit (11) or of the power converter (10) and configured to operate at a constant frequency (fA) .

8. The power converter (10) of claim 7, wherein the constant frequency fA follows the equation: fA = 2 • n • fl, wherein n is an integer number such as 1, 2, 3 etc. and fl is the smallest frequency value of the switching frequency (fC) .

9. The power converter (10) of any one of claims 1 to 8, wherein the control circuit (12) is configured such that the switching frequency (fC) changes its switching frequency at predetermined times or at predetermined phase angles of an AC voltage.

10. The power converter (10) of any one of claims 1 to 9, wherein the switching circuit (11) is realized as a rectifier and the AC voltage is an input voltage tapped at an input side of the rectifier.

11. The power converter (10) of any one of claims 1 to 9, wherein the switching circuit (11) is realized as an inverter and the AC voltage is an output voltage tapped at an output side of the inverter or of the power converter (10) or an AC voltage desired at the output side of the inverter or the power converter (10) .

12. The power converter (10) of claim 11, wherein the switching circuit (11) comprises: a first input (14) , a second input (15) and an output (16) , a first switch (21) coupled to the first input (14) and to the output (16) and a second switch (22) coupled to the output (16) and to the second input (15) .

13. The power converter (10) of claim 12, wherein the control circuit (12) is configured to provide a first control signal (SCI) of the number of control signals (SCI to SC6) to a control terminal of the first switch (21) and a second control signal (SC2) of the number of control signals (SCI to SC6) to a control terminal of the second switch ( 22 ) .

14. The power converter (10) of claim 12 or 13, wherein the power converter (10) comprises a first output terminal (31) anda filter circuit (20) which is coupled to a first output (16) of the switching circuit (11) and to the first output terminal ( 31 ) .

15. The power converter (10) of claim 14, wherein the filter circuit (20) comprises a first inductor (34) which couples the first output (16) of the switching circuit (11) to the first output terminal (31) .

16. The power converter (10) of claim 14 or 15, wherein the filter circuit (20) comprises a first capacitor (34) which couples the first output terminal (31) to a neutral line (30) .

17. A method for operating a power converter (10) , comprising generating a number of control signals (SCI to SC6) by a control circuit (12) , wherein the number of control signals (SCI to SC6) are pulse-width modulated signals with a switching frequency (fC) having a switching frequency, and providing the number of control signals (SCI to SC6) to the switching circuit (11) which is configured as a rectifier or an inverter, and wherein the control circuit (12) selects the switching frequency out of a first number N of predefined discrete frequency values.

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