Transformer in a housing substrate

Abstract

Transformer in a Housing Substrate This description relates to a device comprising at least one chip (94, 112) in a housing, the housing comprising a support (72) on which the at least one chip (94, 112) rests, and a protective layer (134) covering the at least one chip, the support comprising, by means of a stack of layers of an insulating material, a transformer (35) being formed in the support (72) by first (78) and second (84) conductive tracks. Figure for the abstract: Fig. 3A

Description

Title of the invention: Transformer in a housing substrate technical field

[0001] This description relates generally to electronic devices, and more particularly to devices comprising a transformer. Previous technique

[0002] An electrical transformer is an electrical machine that modifies the voltage and current values ​​delivered by an alternating electrical energy source into a system of voltage and current values ​​of different values, for example, of the same frequency. It creates galvanic isolation between its primary and secondary windings.

[0003] There are several types of transformers, including, for example, transformers in which energy is transferred from the primary to the secondary winding via a magnetic circuit. These two circuits are then magnetically coupled. This provides galvanic isolation between the two circuits. Summary of the invention

[0004] There is a need for a transformer in a case providing good galvanic isolation.

[0005] One embodiment overcomes all or part of the known disadvantages of transformers in a case.

[0006] One embodiment provides for a device comprising at least one chip in a package, the package comprising a support, on which rests the at least one chip, and a protective layer covering the at least one chip, the support comprising by a stacking of layers in an insulating material, a transformer being formed in the support by first and second conductive tracks.

[0007] According to one embodiment, the transformer includes a primary comprising one or more first windings formed by one or more of the first conductive tracks.

[0008] According to one embodiment, the primary comprises a single first winding formed by a first conductive track in a single layer of the stack.

[0009] According to one embodiment, the transformer includes a secondary comprising one or more second windings formed by one or more of the second conductive tracks.

[0010] According to one embodiment, the secondary comprises two second windings.

[0011] According to one embodiment, each second winding comprises a first portion in a first layer of the stack, and a second portion in a second layer of the stack.

[0012] According to one embodiment, the first portions of the second windings are in the same first layer and are intertwined, and the second portions are in the same second layer, and are intertwined.

[0013] According to one embodiment, a first end of one of the second windings is connected to a first end of the other of the second windings.

[0014] According to one embodiment, the first ends of the second windings are connected to a contact pad located in the lower layer of the support.

[0015] According to one embodiment, the first and second tracks each form a spiral surrounding a first region.

[0016] According to one embodiment, a control circuit is located on the support, opposite the first region.

[0017] According to one embodiment, a rectifier circuit is located on a region of the support outside the spirals formed by the first and second windings.

[0018] According to one embodiment, the support, the control circuit and the rectifier circuit are covered with an overmolding layer.

[0019] According to one embodiment, the second ends of the second windings are connected to the second circuit.

[0020] According to one embodiment, the first (78) and second (84) conductive tracks are separated by layers of the stack not comprising conductive tracks in the region opposite the first (78) and second (84) conductive tracks. Brief description of the drawings

[0021] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:

[0022] [Fig.1] represents an example of application of the embodiments;

[0023] Fig. 2 represents an example of a circuit in which embodiments may to be applied;

[0024] [Fig.3A] represents a perspective view of an embodiment of a housing comprising a transformer;

[0025] [Fig.3B] represents a cross-sectional view of the embodiment of [Fig.3A];

[0026] [Fig.3C] represents another cross-sectional view of the embodiment of [Fig.3A];

[0027] [Fig.3D] represents another cross-sectional view of the embodiment of [Fig.3A];

[0028] [Fig. 3E] represents another cross-sectional view of the embodiment of [Fig. 3A]; and

[0029] [Fig.4] schematically represents part of the embodiment of [Fig.3A]. Description of the implementation methods

[0030] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.

[0031] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been represented and are detailed.

[0032] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.

[0033] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.

[0034] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.

[0035] Figure 1 shows an example of the application of the embodiments described below. In particular, Figure 1 illustrates the application of a transformer to the control of a triac. As an alternative, the transformer embodiment can also be applied to the control of a thyristor, the thyristor then replacing the triac.

[0036] Fig. 1 represents a circuit 1 comprising a motor 10. Circuit 1 corresponds, for example, to a circuit of a washing machine.

[0037] Circuit 1 includes a control circuit 11. The control circuit includes a microcontroller 12 (MCU). The microcontroller 12 is connected, preferably connected, to a reference node 14. Node 14 corresponds, for example, to ground.

[0038] Circuit 1 comprises two transistors T1 and T2 connected, preferably connected, in series between node 14 and a node 16. More specifically, transistor T1 is connected, preferably connected, by its conduction terminals, for example drain and source, between node 16 and a node 18. Transistor T2 is connected, preferably connected, by its conduction terminals, between node 18 and node 14. Transistors T1 and T2 are for example controlled by microcontroller 12. The control terminals of transistors T1 and T2 are therefore connected, preferably connected, to microcontroller 12.

[0039] Similarly, circuit 1 comprises two transistors T3 and T4 connected, preferably connected, in series between node 14 and node 16. More specifically, transistor T3 is connected, preferably connected, by its conduction terminals between node 16 and a node 20. Transistor T4 is connected, preferably connected, by its conduction terminals between node 20 and node 14. Transistors T3 and T4 are, for example, controlled by microcontroller 12. The control terminals of transistors T3 and T4 are therefore connected, preferably connected, to microcontroller 12. In order to simplify [Fig. 1], the connections between the control terminals of transistors T3 and T4 and microcontroller 12 are not shown.

[0040] Furthermore, the circuit 1 comprises two transistors T5 and T6 connected, preferably connected, in series between node 14 and node 16. More specifically, transistor T5 is connected, preferably connected, by its conduction terminals between node 16 and a node 22. Transistor T6 is connected, preferably connected, by its conduction terminals between node 22 and node 14. Transistors T5 and T6 are, for example, controlled by microcontroller 12. The control terminals of transistors T5 and T6 are therefore connected, preferably connected, to microcontroller 12. In order to simplify [Fig. 1], the connections between the control terminals of transistors T5 and T6 and microcontroller 12 are not shown.

[0041] Each transistor T1, T2, T3, T4, T5, T6 is connected, preferably connected, in parallel with a diode D1, D2, D3, D4, D5, D6. Thus, diode D1, respectively D3, D5, is connected, preferably connected, by its cathode to node 16 and by its anode to node 18, respectively 20, 22. In addition, diode D2, respectively D4, D6, is connected, preferably connected, by its cathode to node 18, respectively 20, 22, and by its anode to node 14.

[0042] The circuit 11 further includes a diode bridge 24. The diode bridge 24 includes two diodes P1 and P2 connected, preferably connected, in series between node 14 and node 16. The diode bridge 24 includes two other diodes P3 and P4 connected, preferably connected, in series between node 14 and node 16. Diode P1 is connected, preferably connected, to node 14 by its anode and to a node 26 by its cathode. Diode P2 is connected, preferably connected, to node 26 by its anode and to node 16 by its cathode. Diode P3 is connected, preferably connected, to node 14 by its anode and to a node 28 by its cathode. Diode P4 is connected, preferably connected, to node 28 by its anode and to node 16 by its cathode.

[0043] Circuit 1 includes a load 30. The load 30 is connected in series with a triac 32 between node 26 and node 28. More specifically, one terminal of the load 30 is connected, preferably connected, to node 26 and another terminal of the load is connected, preferably connected, to one anode of the triac 32. The other anode of the triac 32 is connected, preferably connected, to node 28. The power supply of the load 30 is for example controlled by the triac 32. The load 30 is for example powered by the mains.

[0044] Circuit 1 further includes a transformer circuit 34. An example of a transformer circuit is described in relation to [Fig. 2]. Circuit 34 is connected between the microcontroller 12 and the control terminal of the triac 32. Thus, one terminal of circuit 34 is connected, preferably connected, to the microcontroller 12 and another terminal of circuit 34 is connected, preferably connected, to the control terminal of the triac 32.

[0045] The control circuit 11 and the assembly comprising the triac 32 and the load 30 are in different voltage domains; in other words, they are referenced to different reference voltages. Node 28 constitutes the reference node of the triac 32, i.e., the triac's ground. In other words, node 28 constitutes the reference node of the voltage domain of the assembly comprising the triac and the load. Node 14 constitutes the reference node, i.e., ground, of the voltage domain of circuit 11. The control signal of the triac, generated by circuit 12, passes from one voltage domain to the other via circuit 34, and more specifically via the inductors, or windings, of the transformer. The galvanic isolation of the transformer, i.e., in practice, the distance between the primary and secondary windings, is thus an important criterion of circuit 34.

[0046] There is therefore a need for a transformer circuit having strong galvanic isolation.

[0047] Figure 2 shows an example of a circuit to which the embodiments can be applied. More specifically, Figure 2 schematically represents a transformer circuit corresponding, for example, to circuit 34 in Figure 1. The transformer is, for example, a static transformer.

[0048] The circuit 34 comprises, for example, five input and / or output terminals 36, 38, 40, 42, 44. The circuit 34 receives, between terminals 36 and 38, a DC supply voltage VDD. For example, terminal 36 receives the supply voltage VDD and terminal 38 receives a reference voltage GND. The reference voltage GND corresponds, for example, to the reference voltage at node 14 of [Fig. 1]. The circuit 34 receives, for example, a signal EN at node 40. The signal EN is, for example, a control voltage. The circuit 34 provides, between terminals 42 and 44, an output voltage Vout.

[0049] The circuit 34 includes a control circuit 46, or pilot circuit, of a transformer 35. The circuit 46 is connected, preferably connected, to terminals 36, 38, and 40. The circuit 46 includes two switches II and 12 connected, preferably connected, in series between terminal 38 and terminal 36. More specifically, one terminal of the switch It is connected, preferably connected, to node 36 and another terminal of the switch is connected, preferably connected, to node 47a. One terminal of switch 12 is connected, preferably connected, to node 38 and another terminal of switch 12 is connected, preferably connected, to node 47a. In addition, circuit 46 includes two switches 13 and 14 connected, preferably connected, in series between terminal 38 and terminal 36. More specifically, one terminal of switch 13 is connected, preferably connected, to node 36 and another terminal of switch 13 is connected, preferably connected, to node 47b. One terminal of switch 14 is connected, preferably connected, to node 38 and another terminal of switch 14 is connected, preferably connected, to node 47b.

[0050] Each switch II, 12, 13, 14 is connected, preferably connected, in parallel with a diode DU, DI2, DI3, DI4. Thus, diode DU, respectively DI3, is connected, preferably connected, by its cathode to node 36 and by its anode to node 47a, respectively 47b. In addition, diode DI2, respectively DI4 is connected, preferably connected, by its cathode to node 47a, respectively 47b, and by its anode to node 38. Diodes DU, DI2, DI3, DI4 are, for example, the intrinsic diodes of switches II, 12, 13, 14 in the case where said switches are transistors, for example, insulated-gate field-effect transistors (MOSFETs - Metal Oxide Semiconductor Field Effect Transistors).

[0051] The circuit 46 further includes a control circuit 52 for switches II, 12, 13, 14. The circuit 52 receives, for example, the supply voltage VDD and the signal EN. The circuit 52 is thus connected, preferably connected, to terminals 36, 38, 40. The circuit 52 is further connected, preferably connected, to the control terminals of switches II, 12, 13, 14.

[0052] The control circuit 46 is connected, preferably connected, to the transformer 35. More specifically, the circuit 46 is connected, preferably connected, to the primary coil, that is, the primary winding, of the transformer 35. The primary coil comprises a winding 50, preferably a single winding. One end of the winding 50 is connected, preferably connected, to node 47a and the other end is connected, preferably connected, to node 47b.

[0053] The secondary winding, or secondary, of the transformer 35 comprises, in the example of [Fig. 2], two windings 52, 54 in series. One end of winding 52 is connected, preferably connected, to a node 56, and the other end of winding 52 is connected to one end of winding 54. The other end of winding 54 is connected, preferably connected, to a node 58. Windings 52 and 54 are thus connected by a midpoint 57. The midpoint 57 is connected, preferably connected, to the output terminal 44.

[0054] The circuit 34 comprises, in the example of [Fig. 2], a rectifier circuit 48. The circuit 48 is connected, preferably connected, to the transformer 35, more precisely to the secondary winding of the transformer 35. The circuit 48 comprises, for example, two diodes 60, 62 connected, preferably connected, back-to-back between nodes 56 and 58. In other words, diode 60 is connected, preferably connected, between node 56 and a node 64, and diode 62 is connected, preferably connected, between node 58 and node 64. In other words, the anode of diode 60 is connected, preferably connected, to node 56, and the cathode of diode 60 is connected, preferably connected, to node 64. Similarly, the anode of diode 62 is connected, preferably connected, to node 58, and the cathode of diode 62 is connected, preferably connected, to node 64. Node 64, that is to say the node between diodes 60 and 62, is connected, preferably connected, to the output terminal 42.

[0055] As an alternative, the secondary winding of the transformer 35 may comprise only one winding. The circuit 48 would, for example, be a diode bridge.

[0056] As an alternative, the transformer 35 may comprise several independent secondary windings, each coupled with a rectifier circuit.

[0057] The different elements of the circuit 34, in other words the circuits 46 and 48 and the transformer 35, are preferably located in the same housing, which can be connected, via terminals 36, 38, 40, 42, 44, to other circuits or to other electronic elements.

[0058] In the architectural example shown in [Fig. 2], the transformer control is determined by the oscillator integrated into circuit 46. Other examples of architectures, these self-oscillating circuits, exist in which the transformer control is achieved through an interaction between a transformer winding and the control circuit. Furthermore, some self-oscillating circuits include one or more capacitors. The embodiments described below are also applicable to such self-oscillating circuits.

[0059] Figure 3A shows a perspective view of an embodiment of a system in a package. The device is a transformer-based device comprising a housing 70, the housing containing a transformer circuit, for example, the circuit 34 of Figures 1 and 2. Figure 3B shows a cross-sectional view of the embodiment of Figure 3A. The cross-sectional view of Figure 3B lies in plane BB of Figure 3A. Figure 3C shows another cross-sectional view of the embodiment of Figure 3A. The cross-sectional view of Figure 3C lies in plane CC of Figure 3A. Figure 3D shows another cross-sectional view of the embodiment of Figure 3A. The cross-sectional view of Figure 3D lies in plane DD of Figure 3A. Figure 3E represents another cross-sectional view of the embodiment of Figure 3A. The cross-sectional view of Figure 3E is in a plane EE of Figure 3A.

[0060] The housing 70 comprises a substrate, or support, 72. The substrate 72 corresponds to a lower portion of the housing 70. The substrate 72 is a multilayer substrate comprising conductive tracks and vias. In other words, the substrate 72 comprises a stack of layers, or levels, 74, for example, made of one or more electrically insulating materials, for example, resin, for example, epoxy resin and fiberglass, with conductive tracks and conductive vias, for example, made of metal, for example, copper, being located in the layers of the stack. Each conductive track or conductive via preferably passes through the layer in which it is located. The different layers 74 of the stack are distinguished by dashed lines in Figures 3B to 3E.

[0061] The transformer 35 of [Fig.2] is located in the substrate 72. More specifically, the windings 50, 52 and 54 are made up of conductive tracks of the substrate 72.

[0062] The substrate 72 includes, for example, a layer 76 of the stack comprising a conductive track 78 forming the primary of the transformer, i.e. the winding 50 of [Fig.2]. The winding 50, i.e. the track 78, is preferably located in a single layer of the stack.

[0063] The substrate 72 comprises, for example, at least one layer of the stack, preferably two layers 80 and 82 of the stack, in which the secondary of the transformer, i.e., the windings 52 and 54 in the case of the circuit 34 of [Fig. 2], is formed. The layers 80 and 82 comprise conductive tracks 84 forming the windings 52 and 54. An embodiment of the arrangement of the tracks 84 is described subsequently in relation to [Fig. 4].

[0064] In the example of Figures 3A to 3E, a portion of each of the windings 52 and 54 is located in each layer 80, 82. Alternatively, each layer 80, 82 could comprise a single winding.

[0065] Preferably, the windings 50, 52 and 54 are located one above the other. In other words, the region of layer 76 comprising winding 50 is located opposite, that is to say vertically aligned with, the portion of each layer 80, 82 comprising windings 52, 54.

[0066] The conductive track 78, for example, has the shape of a spiral in layer 76. Similarly, the tracks 84 preferably have a spiral shape. The spirals formed by the tracks 78 and 84 extend around a portion 83 of the substrate stack 72. Thus, the portion 83 does not include the conductive tracks 78 and 84. In other words, the portion 83 does not include a transformer winding.

[0067] In the example of Figures 3A to 3E, layer 80 is located above layer 82. Furthermore, layer 82 is located above layer 76.

[0068] Preferably, the layers 80 and 82 of the stack are separated by at least one layer 86. The portion of layer 86 located between the tracks 84 forming the Windings 52 and 54 preferably do not include any conductive tracks or conductive vias, except, for example, for one or more vias 88 connecting the tracks 84 together. In other words, the portion of layer 86 located between the tracks 84 of layers 80 and 82 forming windings 52 and 54 comprises only the insulating material of layer 86, excluding the vias 88. In the example in Figures 3A to 3E, layer 86 includes two vias 88. Each of the vias 88 connects the portion of one of the windings 52, or 54 respectively, located in layer 80 to the portion of the winding 52, or 54 respectively, located in layer 82. The vias 88 are preferably in contact with the ends of the conductive tracks. Thus, the conductive tracks, i.e. the windings, can be continuous over several levels.

[0069] Layer 82 is separated from layer 76 by at least one layer 90 of the stack. The portion of the layers 90 located between the tracks 84 of layer 82 and the tracks 78 of layer 76 preferably does not include any conductive tracks. In other words, the portions of the layers 90 located between the tracks 84 of layer 82 and the tracks 78 of layer 76 comprise only the insulating material of the layers 90.

[0070] Choosing the number and thickness of the layers 86 separating layers 80 and 82, as well as the number and thickness of the layers 90 between layer 82 and layer 76, allows the distance between windings to be determined, and in particular between the primary and secondary windings. This makes it possible, in particular, to choose the galvanic isolation between the primary and secondary windings, as well as the magnetic coupling between the primary and secondary windings of the transformer. It is thus easier to achieve a precise thickness between the primary and secondary windings by choosing the number of layers between them. Therefore, it is not necessary to provide a significant thickness, greater than the required thickness, which allows the transformer dimensions to be reduced.

[0071] The thickness of the stack layers, in particular the thickness of layers 76, 80, and 82, i.e., the thickness of tracks 84 and 78, as well as the dimensions of tracks 78 and 84 within the layers, can be chosen according to the desired characteristics of the windings 50, 52, and 54. In particular, the conductive tracks can have sufficiently large dimensions to allow the passage of high currents, for example, exceeding 200 mA. The transformer can thus be configured to allow the high-frequency transmission of control or power signals.

[0072] The substrate 72 comprises contact pads 92. The contact pads 92 are located in a layer 93 of the stack. Layer 93 is the bottom layer of the stack. The pads 92 are flush with the bottom face of layer 93, and therefore the The underside of the housing. The housing can thus be electrically connected to other circuits via the connection pads 92. Preferably, the pads 92 are located on the periphery, that is, around, or in other words, outside, the portion of layer 93 located opposite tracks 78 and 84. The pads 92 are therefore not located opposite, that is, are not vertically aligned with, the conductive tracks 78 and 84. Preferably, the pads 92 are located outside the region opposite the conductive tracks 78 and 84. Preferably, the pads 92 are therefore not located opposite the region 83 enclosed by the conductive tracks 78 and 84.

[0073] The pins 92 are preferably divided into two groups. A first group of pins 92a corresponds to the connected terminals on the control circuit side 46 of [Fig. 2], i.e., terminals 36, 38, and 40 in the example of [Fig. 2]. A second group of pins 92b corresponds to the connected terminals on the rectifier circuit side 48 of [Fig. 2], i.e., terminals 42 and 44 in the example of [Fig. 2]. Preferably, the first and second groups are opposite each other in the housing. Preferably, the pins of the first and second groups are located in the housing so as to maximize the distance between the first and second groups, and thus maximize the galvanic isolation of the housing (creepage distance). In other words, the studs of the first group are located on one side of the conductive tracks 78, 84 and the studs of the second group are located on the opposite side of the conductive tracks 78, 84.The 92a plots of the first group are thus separated from the 92b plots of the second group by the region located opposite the conducting tracks 78, 84 and the region 83. .

[0074] The housing 70 includes a chip 94 comprising the circuit 46, i.e., the transformer control circuit. The chip 94 rests on the substrate 72. The chip 94 preferably rests on the region 83, i.e., on the region of the substrate surrounded by the conductive tracks 78 and 84. The chip 94 is preferably not opposite, i.e., vertically aligned with, the windings 50, 52, 54, so as to avoid the formation of a coupling capacitor between the chip 94 and the windings.

[0075] The chip 94 rests, for example, on one or more stacks 95 of conductive tracks 96 and conductive vias 98 located in the region 83, so as to connect the chip 94 to one or more conductive tracks 100 extending, in a layer 102, to one or more pads 92. Each stack 95 preferably includes a conductive track in the upper layer of the substrate, i.e. the layer on which the chip 94 rests. The track or tracks 100 therefore extend below the conductive tracks. Layer 102, for example, is a layer below layers 76, 80, and 82. Layer 102 is, for example, a layer located between layer 76 and the bottom layer of substrate 72. The stacks 95 on which the chip rests allow heat dissipation and thus the power dissipated by the chip to be evacuated to the outside of the case.

[0076] In the example of Figures 3A to 3E, layer 102 is the layer directly above the lower layer of the substrate. Trace 100 extends at least partially above pad 92 and is thus in contact with pad 92. Alternatively, layer 102 can be separated from the lower layer of the substrate 72 by other layers not shown, with trace 100 then being connected to pad 92 by conductive vias not shown.

[0077] More specifically, in the example of Figures 3A to 3E, the chip 94 rests on several, for example nine, stacks of conductive tracks 96 and conductive vias 98 connected to a single conductive track 100. Each stack comprises conductive tracks 96, for example in layers 76, 80, and 82, and conductive vias 98, connecting, for example, the tracks in layers 76, 80, and 82. Thus, each stack comprises a conductive track in layer 80, which, in the example of Figures 3A to 3E, is the top layer of the substrate 72. Each stack comprises, in the example of Figures 3A to 3E, three conductive tracks, in layers 76, 80, and 82, and three conductive vias, between layers 82 and 80, between layers 82 and 76, and between layer 80 and 82. 76 and track 100. Chip 94 is thus connected by each stack to track 100.

[0078] The track 100 extends, in the example of Figures 3A to 3E, from the region 83, more precisely from the stacks in contact with the chip 94, to a pad 92. Said pad 92 is for example configured to be connected to a ground, for example to node 14 of [Fig.1].

[0079] The housing further comprises stacks 104 of conductive tracks 96, located in layers 80, 82, and 76, and of conductive vias 98, located in layers 86, 90, and in the layer between layers 76 and 102. The stacks 104 are located in region 83. In other words, the stacks 104 are separated from the pads 92 by the region of the substrate comprising the tracks 78 and 84, i.e., the transformer windings. Each stack preferably comprises a conductive track in the upper layer of the substrate, said conductive track being flush with the upper surface of the substrate. Preferably, the housing comprises as many stacks 104 as pads 92a. Each stack 104 is in contact with a conductive track 100 or 106 of level 102. One of the stacks 104 is for example in contact with track 100 and each of the other stacks is for example in contact with another conductive track 106.

[0080] In the example of Figures 3A to 3E, each stack 104 comprises, like the stacks 95, conductive tracks 96, for example in layers 76, 80 and 82, and conductive vias 98 connecting the conductive tracks. In particular, each stack comprises a conductive track in layer 82, i.e. in the top layer of the substrate. The conductive track in track 82 is flush with the surface of the substrate.

[0081] Each stack 104 is connected to the chip 94 by a connecting element, for example an electrical wire or cable 108. The chip 94 includes, for example, connection pads 109, for example at the top face of the chip 94, allowing the chip 94 to receive signals.

[0082] Thus, the chip 94 can be connected to elements outside the housing via the pads 92, the tracks 100 or 106, the stacks 104, the elements 108 and the pads 109.

[0083] The housing 70 further comprises stacks 110 of conductive tracks 96 and conductive vias 98 in the substrate 72, preferably two stacks 110. Each stack 110 is connected to one end of the winding 50 ([Fig.2]), i.e. to one end of the track 76 of layer 76. The stacks 110 are located in the region 83. In other words, the stacks 110 are separated from the pads 92 by the region of the substrate comprising the tracks 78 and 84, i.e. the windings of the transformer.

[0084] In the example of Figures 3A to 3E, each stack 110 comprises, like the stacks 95, conductive tracks 96, for example in layers 76, 80, and 82, and conductive vias 98 connecting the conductive tracks. In particular, each stack comprises a conductive track in layer 82, i.e., in the top layer of the substrate. Furthermore, the track 96 of one of the stacks 110 is, for example, in contact with one end of the track 78. For example, the other stack is connected to the other end of the track 76, for example, via a track not shown located in another layer of the stack, for example, a layer located below layer 76, for example, located in layer 102.

[0085] The conductive track in the track 82 is flush with the surface of the substrate. Each stack 110 is, like the stacks 104, connected to the chip 94, more precisely to the pads 109, by a connecting element, for example an electrical wire or cable 108.

[0086] As an alternative, the chip 94 could be an inverted chip ("flip chip"), electrically connected to the stacks 95, 104, 110 by solder balls ("bumps").

[0087] The housing 70 includes a chip 112 comprising the circuit 48 ([Fig. 2]), i.e., the rectifier circuit. The chip 112 rests on the substrate 72. The chip 112 is, for example, located outside the region opposite tracks 78 and 84, i.e., outside the windings. The chip is, for example, located on the side of the windings comprising pads 92b. The chip 112 is, for example, located opposite, i.e., vertically aligned with, a pad 92b.

[0088] The chip 112 rests, for example, on and is in contact with a conductive track 114 of the upper level of the substrate, for example level 80. The track 114 is thus flush with the upper face of the substrate 72. The chip 114 includes, for example, a connection pad (not shown) located on its lower face, in contact with the track 114. The connection pad (not shown) is, for example, connected, preferably connected, to node 64 ([Fig. 2]). The track 114 is, for example, connected, via conductive tracks and conductive vias located in the substrate 72, to a pad 92b. Said pad 92b corresponds, for example, to terminal 42 ([Fig. 2]).

[0089] The chip 112 includes, for example on its upper face, connection pads 116. Each connection pad 116 is, for example, connected, preferably connected, to the anode of one of the diodes 60, 62 ([Fig. 2]). One of the connection pads 116 is connected to one end of the winding 52 and the other to one end of the winding 54. More specifically, one of the pads 116 is, for example, connected to one end of the conductive track 84 located in level 80, for example via an electrical wire or cable 118. The other pad 116 is, for example, connected to one end of the conductive track 84 located in level 82, for example via a conductive via 120, a conductive track 122 and an electrical wire or cable 124.

[0090] As an alternative, the chip 112 could be a flip chip, electrically connected to tracks 122, 114 and 84 by solder balls ("bumps"). Wires 118, 124 might then not be present.

[0091] The other end of the conductive track 84 located in layer 80 and the other end of the conductive tracks 84 located in layer 82 are, for example, connected to each other by a conductive via 126. This connection corresponds to the midpoint 57 ([Fig. 2]). These ends, forming point 57, are further connected to a pad 92b by conductive tracks 128 and conductive vias 130 located in the substrate. This pad 92b then constitutes terminal 44.

[0092] The substrate 72 further comprises tracks 132. The tracks 132 are dummy tracks, i.e., portions of conductive tracks located within the substrate layers to ensure a relatively homogeneous metal density throughout the substrate. In Figures 3B to 3E, the tracks 132 are represented by crosses. In the example shown in Figures 3A to 3E, the substrate includes tracks 132 in the layers containing conductive tracks. For example, the substrate does not include tracks 132 in the layers containing only conductive vias. Thus, in the example shown in Figures 3A to 3B, the substrate includes tracks 132 in layers 80, 82, 76, and 102. The tracks 132 are preferably insulated from each other and from the conductive tracks and conductive vias, for example, by the material of the substrate layers. Tracks 132 preferably have no electrical function in the operation of the transformer circuit.

[0093] The package 70 includes a protective layer, or overmolding layer, 134. The layer 134 covers the upper face of the substrate, i.e. the layer on which the chips 94 and 112 rest, and covers the chips 94 and 112. The layer 134 specifically covers the tracks of the upper level of the substrate, i.e. tracks 84, 96, 114 and 122 of layer 80. The layer 134 also covers the cables 118 and 124. The layer 134 is, for example, made of one or more electrically insulating materials, for example ceramic, silicon nitride or a resin.

[0094] Figure 4 schematically represents part of the embodiment of the [Fig. 3A]. More specifically, [Fig. 4] illustrates an example of the arrangement of the conductive tracks 84 of levels 80 and 82. [Fig. 4] is, of course, not to scale. The relative dimensions are not correct. In particular, the dimensions of the region 83 located at the center of the spirals formed by the windings, and thus surrounded by the windings, are different in an operating circuit.

[0095] Fig. 4 includes a view A illustrating the conductive tracks 84 of level 80 and a view B illustrating the conductive tracks 84 of level 82. In the example illustrated by Fig. 4, each winding 52, 54 (Fig. 2) comprises a portion on each level 80, 82.

[0096] The winding 52 comprises a portion 138 located in level 80 and a portion 140 in level 82. The winding 54 comprises a portion 142 located in level 80 and a portion 144 in level 82.

[0097] The portion 138, consisting of a track 84 of the layer 80, forms a spiral rotating around, that is to say, surrounding, the region 83 in the layer 80. The portion 138 includes an end 146, for example located outside said spiral, that is to say, not being enclosed by said spiral. The portion 138 includes another end 148, for example located inside said spiral, that is to say, being enclosed by said spiral. The portion 138 extends, for example, alternately, in the layer 80, in a direction X and in a direction Y, substantially perpendicular to the direction X, the portion 138 extending over a shorter distance at each change of direction.

[0098] The end 148 of the portion 138 is connected, by a conducting via through the layer or layers located between the layers 80 and 82, to an end 150 of the portion 140. The end 150 is preferably located opposite, i.e. vertically (in a direction Z orthogonal to the plane formed by the directions X and Y) aligned with, the end 148.

[0099] The portion 140, consisting of a track 84 in layer 82, forms a spiral rotating around, that is, surrounding, the region 83. The portion 140 includes another end 152, for example, located outside said spiral, that is, not being surrounded by said spiral. The end 150 is, for example, located inside said spiral, that is, being surrounded by said spiral. The portion 140 extends by alternatively, in layer 82, in the X direction and in the Y direction, portion 140 extends over a shorter distance at each change of direction.

[0100] Preferably, at least a part of portion 138 is located opposite, i.e. vertically aligned with, at least a part of portion 140.

[0101] Similarly, portion 142, consisting of a track 84 of layer 80, forms a spiral rotating around, that is, surrounding, the region 83 in layer 80. Portion 142 includes an end 154, for example, located outside said spiral, that is, not being enclosed by said spiral. Portion 142 includes another end 156, for example, located inside said spiral, that is, being enclosed by said spiral. Portion 142 extends, for example, alternately, in layer 80, in the X direction and in the Y direction, portion 142 extending over a shorter distance at each change of direction.

[0102] The end 156 of the portion 142 is connected, by a conducting via through the layer or layers located between the layers 80 and 82, to an end 158 of the portion 144. The end 158 is preferably located opposite, i.e. vertically (in a direction Z orthogonal to the plane formed by the directions X and Y) aligned with, the end 156.

[0103] The portion 144, consisting of a track 84 in layer 82, forms a spiral rotating around, that is, surrounding, the region 83. The portion 144 includes another end 160, for example, located outside said spiral, that is, not being enclosed by said spiral. The end 158 is, for example, located inside said spiral, that is, being enclosed by said spiral. The portion 144 extends, for example, alternately, in layer 82, in the X direction and in the Y direction, the portion 144 extending over a shorter distance at each change of direction.

[0104] Preferably, at least a part of portion 142 is located opposite, i.e. vertically aligned with, at least a part of portion 144.

[0105] Portions 138 and 142 of layer 80 are interlaced. In other words, portions 138 and 142 are parallel to each other in layer 80. Thus, each segment of portion 138, respectively 142, with the exception of the outermost segments of portions 138 and 142, is located between two segments of portion 142, respectively 138. Thus, each segment of portion 138, respectively 142, is separated from the nearest segment of portion 138, respectively 142 by a segment of portion 142, respectively 138.

[0106] Similarly, portions 140 and 144 of layer 82 are interlaced. That is, portions 140 and 144 are parallel to each other in layer 82. Thus, each segment of portion 140, respectively 144, with the exception of the outermost segments of portions 140 and 144, lies between two segments of portion 144, respectively 140. Thus, each segment of portion 140, respectively 144, is separated from the segment of portion 140, respectively 144, closest by a segment of portion 144, respectively 140.

[0107] For example, end 146 corresponds to the end connected to pad 116 by cable 118 ([Fig. 3A] and 3E). Ends 148 and 150 are connected to each other by a via 88 (Figures 3A and 3B). Similarly, ends 156 and 158 are connected to each other by a via 88 (Figures 3A and 3B). Ends 152 and 154 are connected to each other by a via 126 ([Fig. 3A]) and are connected to terminal 44 by traces 128 and vias 130. End 160 corresponds to the end connected to pad 116 by cable 124 ([Fig. 3A] and 3E).

[0108] By way of alternative, the primary of the transformer 35 may comprise several windings, for example two windings, for example arranged in one or more layers, for example arranged in the same way as windings 52 and 54. According to another alternative, the primary comprises only winding 50, winding 50 being located in several layers. The different portions of the winding are then connected by a via conductor.

[0109] By way of alternative, the windings 52 and 54 are, for example, each located in distinct layers. Thus, the winding 52 is located in one or more first layers of the substrate and the winding 54 is located in one or more second layers of the substrate, the first and second layers preferably being separated by at least one layer of the stack.

[0110] As an alternative, the secondary winding may comprise only one winding. This single winding may be located in one or more layers.

[0111] An advantage of the embodiment of [Fig.4] is that windings 52 and 54 are similar and are substantially at the same average distance from winding 50. There is therefore less disparity between the windings, which allows the transformer to have more precise operation.

[0112] An advantage of the described embodiments is that the number, and thickness, of the layers between layers 76 and 82 can be chosen so as to ensure a chosen isolation between the primary and the secondary.

[0113] Another advantage of the described embodiments is that the transformer is formed during the substrate manufacturing process. Manufacturing is therefore shorter and less expensive than in a process where the transformer is formed independently.

[0114] Various embodiments and variations have been described. A person skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to a person skilled in the art.

[0115] Finally, the practical implementation of the embodiments and variants described is within the reach of a person skilled in the art, based on the functional indications given above.

Claims

Demands

1. Device comprising at least one chip (94, 112) in a package, the package comprising a support (72), on which rests the at least one chip (94, 112), and a protective layer (134) covering the at least one chip, the support comprising by a stack of layers (76, 80, 82, 86, 90, 102) of an insulating material, a transformer (35) being formed in the support (72) by first (78) and second (84) conductive tracks, in which the transformer (35) comprises a secondary comprising one or more second windings (52, 54) formed by one or more of the second conductive tracks (84) and in which first portions of the second windings are in the same first layer (80) and are interlaced, and second portions are in the same second layer (82), and are interlaced.

2. Device according to claim 1, wherein the transformer (35) comprises a primary including one or more first windings (50) formed by one or more of the first conductive tracks (78).

3. Device according to claim 2, wherein the primary comprises a single first winding (50) formed by a first conductive track (78) in a single layer (76) of the stack.

4. Device according to any one of claims 1 to 3, wherein the secondary comprises two second windings (52, 54).

5. Device according to any one of claims 1 to 4, wherein each second winding (52, 54) comprises a first portion in a first layer (80) of the stack, and a second portion in a second layer (82) of the stack.

6. Device according to any one of claims 1 to 5, wherein a first end of one of the second windings is connected to a first end of the other of the second windings.

7. Device according to claim 6, wherein the first ends of the second windings (52, 54) are connected to a contact pad (92b) located in the lower layer of the support.

8. Device according to any one of claims 1 to 7, wherein the first and second tracks (78, 84) each form a spiral surrounding a first region (83).

9. Device according to claim 8, wherein a control circuit (94, 46) is located on the support (72), opposite the first region (83).

10. Device according to claim 8 or 9, wherein a rectifier circuit (48, 112) is located on a region of the support (72) outside the spirals formed by the first and second windings (50, 52, 54).

11. Device according to claims 9 and 10, wherein the support (72), the control circuit and the rectifier circuit are covered with an overmolding layer.

12. Device according to claim 10 or 11, wherein second ends of second windings (52, 54) are connected to the rectifier circuit (48, 112).

13. Device according to any one of claims 1 to 12, wherein the first (78) and second (84) conductive tracks are separated by layers of the stack not comprising conductive tracks in the region opposite the first (78) and second (84) conductive tracks.

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