WIRING SUBSTRATE

Abstract

Provided is a wiring substrate (100) the orientation of which can be recognized easily and which can prevent the occurrence of a failure that would otherwise occur after mounting a semiconductor device on the wiring substrate, or after mounting an electronic component composed of the wiring substrate and the semiconductor device mounted thereon on a base substrate or the like. The wiring substrate (100) has a base substrate (10), and a metal member (20) provided on a first face of the base substrate (10). The metal member (20) has a planar shape symmetrical with respect to a plane (PL) that extends through a center of the first face and is perpendicular to the first face. A recess (21) is formed, as a partial recess, on one of outer surfaces (20s) of the metal member (20). Figure for abstract: Fig. 1

Description

Title of the invention: WIRING SUBSTRATE Technical field

[0001] The present invention relates to a wiring substrate. Prior art

[0002] A wiring substrate on which a semiconductor device is mounted is known (see, for example, JP2015-231001A). In the wiring substrate described in JP2015-231001A, a vibration element is disposed, as an electronic component, in a cavity-like recess formed in a base substrate, and a cover defines an enclosed space in which the vibration element is disposed.

[0003] In a process of mounting a semiconductor device on a wiring substrate, the orientation of the semiconductor device must be recognized. However, in some cases, due to design and other factors, a wiring substrate has a shape (e.g., a bilaterally symmetrical shape) whose orientation cannot be recognized. In this case, the process of mounting a semiconductor device requires a considerable amount of labor and time. In addition, a possibility exists that the semiconductor device has been mounted on the wiring substrate while being incorrectly oriented relative to the wiring substrate. The technique described in JP2015-231001A does not take into account the recognition of the orientation of the wiring substrate.In some cases, in order to enable recognition of the orientation of a wiring substrate, a mark is applied to a metal member of the wiring substrate using ink. However, from the perspective of exposing an electronic component (a wiring substrate on which a semiconductor device is mounted) to a high-temperature environment, the use of ink that gasifies at high temperature is not preferable, because the gas from the ink may cause failure of the electronic component. Statement of the invention

[0004] The present invention has been achieved so as to solve the problem described above. An object of the present invention is to provide a wiring substrate whose orientation can be recognized easily and which can prevent the occurrence of a failure that would otherwise occur after mounting a semiconductor device on the wiring substrate, or after mounting an electronic component composed of the wiring substrate and the semiconductor device mounted thereon on a base substrate or the like.

[0005] The present invention can be embodied in the following mode.

[0006] (1) According to one embodiment of the present invention, a wiring substrate is provided. The A wiring substrate comprises a base substrate, and a metal member disposed on a first face of the base substrate. The metal member has a planar shape symmetrical about a plane extending through a center of the first face and perpendicular to the first face. A recess is formed, as a partial recess, on one of exterior surfaces of the metal member.

[0007] In this configuration, since the recess (partial recess) is formed on an outer surface of the metal member, despite the symmetrical planar shape of the metal member, the orientation of the wiring substrate can be easily recognized by using the recess as a mark. In the present configuration, the recess serving as a mark is formed by changing the profile of the outer surface of the metal member, rather than by applying ink to the outer surface of the metal member. Therefore, even in the case where an electronic component (the wiring substrate on which a semiconductor device is mounted) is exposed to a high-temperature environment, the recess does not change and can be correctly recognized as a mark, unlike in the case where a mark is formed using ink.Also, since, unlike ink, the recess does not gasify, it is possible to prevent the occurrence of electrical failure or deterioration of sealing performance, which would otherwise occur due to corrosion of the wiring of the base substrate by gas. In particular, in the wiring substrate of the present invention, the occurrence of failure of the electronic component (the wiring substrate on which a semiconductor device is mounted) can be prevented. Furthermore, since the recess is formed before the metal member is disposed on the base substrate, an ink application step after the wiring substrate is completed becomes unnecessary, and it is possible to eliminate the risk of scratching or soiling when applying ink.

[0008] (2) The wiring substrate of the above-described mode can be configured as follows. The first face is rectangular. The plane is parallel to one side of the first face. The base substrate and the metal element have planar shapes that are symmetrical about the plane. The recess is formed on one of two exterior surfaces of the metal element that are located on opposite sides of the plane.

[0009] In this configuration, each of the base substrate and the metal member has a rectangular symmetrical planar shape. In particular, even in the case where both the base substrate and the metal member have symmetrical planar shapes, thus making recognition of their orientations difficult, the indentation serving as a mark enables recognition of the orientation of the wiring substrate.

[0010] The present invention may be embodied in various embodiments. For example, the present invention may be embodied as a wiring substrate, a semiconductor device, an electronic component, or a system comprising the wiring substrate, the semiconductor device, and / or the electronic component. Brief description of the drawings

[0011] [Fig. 1] [Fig. 1] is a schematic perspective view of a wiring substrate of an embodiment of the present invention;

[0012] [Fig.2] [Fig.2] is a schematic top view of the wiring substrate of the embodiment of the present invention;

[0013] [Fig.3] [Fig.3] is an explanatory view illustrating a recess;

[0014] [Fig.4] [Fig.4] is a flowchart illustrating a method of manufacturing the wiring substrate of the present invention;

[0015] [Fig.5] [Fig.5] is an explanatory view illustrating a wiring substrate of a comparative example. Detailed description

[0016] [Fig.l] is a schematic perspective view of a wiring substrate 100 of an embodiment of the present invention. The wiring substrate 100 of the present embodiment serves as an electronic component after mounting a semiconductor device on a base substrate 10. In the present embodiment, a recess 21 is formed on one of outer surfaces of a surrounding metal member (metal member) 20 provided on the base substrate 10, and the recess 21 serves as a mark, thereby enabling recognition of the orientation of the wiring substrate 100.

[0017] As illustrated in [Fig.l], the wiring substrate 100 of the present embodiment comprises the base substrate 10 having the shape of a rectangular plate, and the surrounding metal member 20 disposed on the base substrate 10. The base substrate 10 comprises a ceramic substrate 1 formed, for example, of aluminum nitride (AIN), and a heat sink 2 formed of a metal and disposed below the ceramic substrate 1. In [Fig.l], a Cartesian coordinate system CS defined by an X-axis, a Y-axis, and a Z-axis, orthogonal to each other, is illustrated. The X-axis and the Y-axis are defined to be respectively parallel to the longer and shorter sides of the rectangular base substrate 10. The Cartesian coordinate system CS corresponds to the Cartesian coordinate systems CS illustrated in [Figs.2], 3 and 5.

[0018] The surrounding metal element 20 used in the present embodiment is formed of copper (Cu) and its surface is plated with nickel (Ni) and gold (Au). The surrounding metal element 20 is disposed on the base substrate 10 composed of the ceramic substrate 1 and the heat sink 2 stacked together; more particularly, on the ceramic substrate 1. The surrounding metal member 20 has the shape of a rectangular parallelepiped, has a rectangular cross-sectional shape, and has a central through hole extending in the Z-axis direction. In other words, the surrounding metal member 20 is formed by combining two plates parallel to a ZX plane and two plates parallel to a YZ plane, thus, a cavity-forming space SP is defined in the center. The edge of the surrounding metal member 20 on the side in the negative Z-axis direction is welded to the face located on the side in the positive Z-axis direction of the ceramic substrate 1 of the base substrate 10.

[0019] The surrounding metal member 20 has an outer surface 20s located on the side in the positive X-axis direction and parallel to the YZ plane. A recess 21 is formed on the outer surface 20s. The recess 21 is concave toward the side in the negative X-axis direction. The recess 21 has a circular shape in the YZ plane of the outer surface 20s. The recess 21 is formed on the outer surface 20s by means of cutting (recess shaping process). A plane PL illustrated by a dotted line in [Fig.l] is a plane parallel to the YZ plane and extends through the centroid of the surrounding metal member 20 in a state in which the recess 21 is not formed. The surrounding metal element 20 in which the recess 21 is not formed has a plane shape symmetrical with respect to the plane PL serving as a reference.The recess 21 may be formed by means of press work when shaping the surrounding metal member 20.

[0020] [Fig.2] is a schematic top view of the wiring substrate 100. [Fig.2] schematically illustrates a first face SF1 (face on the side in the positive Z-axis direction) of the base substrate 10 within the space SP defined by the surrounding metal element 20. A semiconductor device is disposed on the first face SF1, the wiring substrate 100 thus serves as an electronic component.

[0021] As illustrated in [Fig.2], the ceramic substrate 1 has five rectangular through holes HL extending in the thickness direction (the Z-axis direction). The heat sink 2 has five rectangular protrusions at positions corresponding to the five through holes HL. The protrusions protrude toward the side in the positive Z-axis direction. In the base substrate 10, the number of protrusions of the protrusions of the heat sink 2 is determined such that the ends of the protrusions of the heat sink 2 on the side in the positive Z-axis direction align with the face of the ceramic substrate 1 on the side in the positive Z-axis direction.

[0022] In the present embodiment, the center of the surrounding metal element 20 and the center of the base substrate 10 are located at a center O. Particularly, the center O is the point of intersection between the first face SF1 and an imaginary linewhich extends in the Z-axis direction via the centroid of the surrounding metal member 20 and the centroid of the base substrate 10. As illustrated in [Fig. 2], the first face SF1 has a rectangular shape. Each of the base substrate 10 and the surrounding metal member 20, in which the recess 21 is not formed, has a planar shape symmetrical with respect to the plane PL (reference) which extends through the center O, is perpendicular to the first face SF1, and contains a center axis OL1 parallel to the Y-axis. Therefore, in other words, the recess 21 is formed on one of two outer surfaces located on opposite sides of the center axis OL1 which serves as a reference for planar symmetry; more particularly, on the outer surface 20s located on the side in the positive X-axis direction. As illustrated in [Fig.2], the recess 21 is formed on the outer surface 20s to be located on the side in the positive Y-axis direction of the central axis OL2. Particularly, the base substrate 10 and the surrounding metal member 20, in which the recess 21 is not formed, have respective shapes, each being planar symmetrical with respect to a plane extending through the center O, being perpendicular to the first face SF1, and containing the central axis OL2 parallel to the X-axis.

[0023] [Fig. 3] is an explanatory view illustrating the recess 21. [Fig. 3] illustrates an enlarged schematic cross-sectional view taken along a line A - A in [Fig. 1]. As illustrated in [Fig. 3], the recess 21 has a concave shape and extends from the outer surface 20s along a central axis OL3 parallel to the X-axis. The lower surface 21b of the recess 21 located on the side in the negative X-axis direction is formed by a recess shaping process. In the present embodiment, the lower surface 21b is machined such that the surface roughness of the lower surface 21b becomes less than the surface roughness of the outer surface 20s.

[0024] [Fig. 4] is a flowchart illustrating a method for manufacturing the wiring substrate 100 of the present invention. In the method for manufacturing the wiring substrate 100 illustrated in [Fig. 4], firstly, the surrounding metal member 20 is formed into a predetermined shape (step S1). The recess 21 is formed at a predetermined location on the surrounding metal member 20 by a recess shaping process. The surrounding metal member 20 is welded to the base substrate 10 formed by assembling the ceramic substrate 1 and the heat sink 2 together beforehand (step S3). The surrounding metal member 20 is plated with Ni so that a Ni plating layer is formed (step S4). The surface of the Ni plating layer of the surrounding metal member 20 is plated with gold (Au) (step S5), and thus the manufacturing of the wiring substrate 100 is completed.In steps S4 and S5, terminals of the base substrate 10 and the heat sink may . be plated with suitable metals at the same time as plating the surrounding metal member 20. A step of mounting a semiconductor device, etc. on the fabricated wiring substrate 100 is performed. An electronic component containing the mounted semiconductor device is used as the final product.

[0025] [Fig. 5] is an explanatory view illustrating a 100z wiring substrate of a comparative example. In the 100z wiring substrate of the comparative example, instead of the recess 21 used in the wiring substrate 100 of the above-described embodiment, a circular ink mark MK is formed by applying ink to the outer surface 20s at the position where the recess 21 is formed. [Fig. 5] illustrates a portion of the 100z wiring substrate of the comparative example, which portion corresponds to the portion of the wiring substrate 100 illustrated in [Fig. 3]. The method for manufacturing the 100z wiring substrate of the comparative example is identical to the method for manufacturing the wiring substrate 100 illustrated in [Fig. 4] except that the method for manufacturing the 100z wiring substrate does not include the step of forming the recess 21 (step S2).Instead of step S2, the method for manufacturing the 100z wiring substrate comprises an ink application step for shaping the MK ink mark after the Au plating step (step S5).

[0026] As described above, in the wiring substrate 100 of the present embodiment, the surrounding metal member 20 is welded to the first face SF1 of the base substrate 10. As illustrated in [Fig. 2], the surrounding metal member 20 has a symmetrical planar shape with respect to the plane PL (reference plane) which extends through the center O, is perpendicular to the first face SF1, and contains the center axis OL1 parallel to the Y axis. The recess 21 (partial recess) is formed on the outer surface 20s of the surrounding metal member 20. Therefore, in the present embodiment, since the recess 21 (partial recess) is formed on the outer surface 20s of the surrounding metal member 20, despite the symmetrical planar shape of the surrounding metal member 20, the orientation of the wiring substrate 100 can be recognized easily by using the recess 21 as a mark.In the present embodiment, unlike the comparative example in which a mark is formed on the outer surface 20s of the surrounding metal member 20 by applying ink thereto, the recess 21 serving as a mark is formed by changing the profile of the outer surface 20s of the surrounding metal member 20. Therefore, unlike the comparative example in which a mark is formed by using ink, even in the case where an electronic component (the wiring substrate 100 on which a semiconductor device is mounted) is exposed to a high-temperature environment, the recess 21 does not change and can be correctly recognized as a mark. Also, since the recess 21 does not gasify unlike ink, it . It is possible to prevent the occurrence of electrical failure or deterioration of sealing performance, which would otherwise occur due to corrosion of the wiring of the base substrate 10 by gas. In particular, the wiring substrate 100 of the present embodiment can prevent the occurrence of failure of the electronic component. Furthermore, since the recess 21 is formed before the surrounding metal member 20 is disposed on the base substrate 10, an ink application step after the wiring substrate 100 is completed becomes unnecessary, and it is possible to eliminate the risk of scratching or soiling during ink application.

[0027] Also, in the wiring substrate 100 of the present embodiment, as illustrated in [Fig. 2], the first face SF1 has a rectangular shape. The recess 21 is formed on one of two outer surfaces located on opposite sides of the plane PL that contains the central axis OL1 and serves as a reference for planar symmetry; more particularly, the outer surface 20s being located on the side in the positive X-axis direction. In the present embodiment, each of the base substrate 10 and the surrounding metal member 20 has a planar symmetrical shape, thus making it difficult to recognize their orientations. However, since the recess 21 serves as a mark, the orientation of the wiring substrate 100 as a whole can be recognized.

[0028] Also, in the present embodiment, since the recess 21 is formed by a recess shaping process, the surface roughness of the lower surface 21b is less than the surface roughness of the outer surface 20s. Therefore, in the wiring substrate 100 of the present embodiment, since the reflectance of the lower surface 21b and the reflectance of the outer surface 20s differ from each other, when light strikes the outer surface 20s, the lower surface 21b of the recess 21 reflects the light differently from the outer surface 20s. Therefore, the position of the recess 21 can be easily detected. For example, in the case where the indentation 21 is recognized by image processing, the indentation 21 on the outer surface 20s is clearly distinguished from the remaining portion of the outer surface 20s by means of binarization.Also, in case the outer surface 20s is viewed while the wiring substrate 100 rotates by a predetermined angle (e.g., 30 degrees) about the Y axis, the recess 21 can be easily distinguished based on the difference in reflectance.

[0029] Modifications of this embodiment:

[0030] The present embodiment is not limited to the embodiment described above. above and can be implemented in various forms without straying from the idea general of the present invention. For example, the following modifications are possible.

[0031] The wiring substrate 100 of the above-described embodiment is an example, and the structure, etc. of the wiring substrate 100 may be varied, as long as the recess 21 is formed on the outer surface 20s of the surrounding metal member 20. For example, the base substrate 10 may be composed of only the ceramic substrate 1 or may have other components in addition to the ceramic substrate 1 and the heat sink 2. The base substrate 10 of the above-described embodiment is a substrate formed by stacking the single ceramic substrate 1 and the single heat sink 2. However, a plurality of ceramic substrates 1 may be stacked. The material of the ceramic substrate 1 may be different from PAIN, and, for example, oxide ceramics such as alumina, silica, titanium dioxide, and zirconia and nitride ceramics such as silicon nitride and titanium nitride may be used.The material of the heat sink 2 and the surrounding metal element 20 may be other than Cu, and their material may be gold (Au), silver (Ag), platinum (Pt), or an alloy of these metals.

[0032] The position of the recess 21 in the embodiment described above is an example, and the recess 21 may be formed at any position, as long as the position is located within the region of the outer surfaces, including the outer surface 20s on the side in the positive X-axis direction. For example, the recess 21 may be formed on the outer surface of the surrounding metal member 20 located on the side in the negative Y-axis direction and parallel to the ZX plane. The recess 21 may be formed at a position where the outer surface intersects the plane PL parallel to the YX plane containing the central axis OL1 shown in [Fig. 2], or a position where the outer surface intersects the ZX plane extending through the central axis OL2.The recess 21 is preferably formed in a central 90% region of the outer surface in the height direction (the Z-axis direction) excluding a 5% region on the upper side and a 5% region on the lower side; that is, on the side toward the base substrate 10. The recess 21 may have a shape other than a circular shape and its shape may be changed as long as the recess 21 serves as a mark for orientation recognition. The depth of the recess 21 from the outer surface 20s may be changed. In addition, the surface roughness of the lower surface 21b may be greater than the surface roughness of the outer surface 20s.

[0033] In the method described above for manufacturing the wiring substrate 100 illustrated in [Fig.4], steps S1 and S2 are performed separately. However, steps S1 and S2 can be performed simultaneously using press work. Also, the manufacturing method can be modified such that, after shaping the recess 21 in step S2, the surrounding metal member 20 is only plated with Ni, step S3 is then carried out, and, in addition, the surrounding metal member 20 is again plated with Ni.

[0034] Even though the present invention has been described on the basis of its embodiment and modifications, the embodiment described above is intended to facilitate understanding of the present invention and does not limit the present invention. The present invention may be modified or improved without departing from the subject matter and scope of the claims, and relates to equivalents thereof. Also, the technical feature(s) may be eliminated unless the present description mentions that the technical feature(s) is / are essential.

Claims

Claims

1. A wiring substrate (100) comprising: a base substrate (10); and a metal member (20) provided on a first face (SF1) of the base substrate (10), the metal member (20) having a planar shape symmetrical with respect to a plane (PL) which extends through a center (O) of the first face (SF1) and is perpendicular to the first face (SF1); and a recess (21) being formed, as a partial recess, on one of outer surfaces (20s) of the metal member (20), a lower surface (21b) of the recess (21) having a surface roughness lower than a surface roughness of the outer surface (20s) on which the recess (21) is formed.

2. The wiring substrate (100) according to claim 1, the first face (SF1) being rectangular; the plane (PL) being parallel to one side of the first face (SF1); the base substrate (10) and the metal member (20) having planar shapes symmetrical with respect to the plane (PL); and the recess (21) being formed on one of two outer surfaces (20s) of the metal member (20) which are located on opposite sides of the plane (PL).

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