Image sensor

Abstract

Image sensor The present description relates to an image sensor comprising a plurality of photosites (100) formed in and on a semiconductor substrate (101), each photosite comprising: – a first photosensitive zone (103) formed in the semiconductor substrate and adapted to capture light in a first range of wavelengths; – a second photosensitive zone (107) formed in the semiconductor substrate directly above the first photosensitive zone (103) and adapted to capture light in a second range of wavelengths, different from the first range of wavelengths; – a first zone (117) for collecting charges photogenerated in the first and second photosensitive zones, arranged on the side of a face (101T) of the substrate opposite the first photosensitive zone (103);– a first transfer grid (VEGA), extending vertically from the first photosensitive zone (103) to said face (101T), adapted to transfer the photogenerated charges in the first photosensitive zone (103) to the second photosensitive zone (107); and – a second transfer grid (119), extending horizontally on said face (101T) directly above the second photosensitive zone (107), adapted to transfer the photogenerated charges from the second photosensitive zone (107) to the first charge collection zone (117). Figure for abstract: Fig. 1;

Description

Title of the invention: Image sensor Technical field

[0001] The present description relates generally to the field of image acquisition devices. The present description relates more particularly to image acquisition devices adapted to acquire a 2D image and a depth image of a scene by means of the same pixel array. Prior art

[0002] Image acquisition devices are known which are capable of acquiring a 2D image and a depth image of a scene. In particular, devices are known which comprise 2D image pixels and depth pixels which are part of the same pixel array of an image sensor. Summary of the invention

[0003] There is a need to improve existing devices for acquiring a 2D image and a depth image of a scene. More specifically, it would be desirable to facilitate the integration of depth pixels into a pixel array of an image sensor suitable for acquiring 2D images and depth images.

[0004] An object of an embodiment is to overcome all or part of the drawbacks of known devices for acquiring a 2D image and a depth image of a scene. One embodiment more specifically aims to facilitate the integration of depth pixels into a pixel array of an image sensor suitable for acquiring 2D images and depth images.

[0005] For this, one embodiment provides an image sensor comprising a plurality of photosites formed in and on a semiconductor substrate, each photosite comprising: - a first photosensitive zone formed in the semiconductor substrate and adapted to capture light in a first range of wavelengths; - a second photosensitive zone formed in the semiconductor substrate directly above the first photosensitive zone and adapted to capture light in a second range of wavelengths, different from the first range of wavelengths; - a first zone for collecting photogenerated charges in the first and second photosensitive zones, arranged on the side of a face of the substrate opposite the first photosensitive zone; - a first transfer grid, extending vertically from the first photosensitive zone to said face, adapted to transfer the photogenerated charges into the first photosensitive area to the second photosensitive area; and - a second transfer grid, extending horizontally on said face directly above the second photosensitive zone, adapted to transfer the photo-generated charges from the second photosensitive zone to the first charge collection zone.

[0006] According to one embodiment, each photosite further comprises: - at least one second zone for collecting photogenerated charges in the second photosensitive zone, arranged on the side of said face; and - at least one third transfer grid extending laterally, on said face, directly above the second photosensitive zone.

[0007] According to one embodiment, each photosite further comprises: - a third photosensitive zone, interposed between the first and second photosensitive zones; and - a fourth transfer grid extending vertically, from the third photosensitive zone, to said face and adapted to transfer the photogenerated charges in the third photosensitive zone to the second photosensitive zone.

[0008] According to one embodiment, the first charge collection zone is common to the charges photogenerated in the first, second and third photosensitive zones.

[0009] According to one embodiment, the first transfer grid surrounds the fourth transfer grid.

[0010] According to one embodiment, each photosite further comprises a peripheral isolation trench extending vertically in the semiconductor substrate, from said face, and laterally delimiting the first photosensitive zone.

[0011] According to one embodiment, each photosite further comprises a control circuit configured to alternately apply, on the first transfer gate: - a first potential adapted to block a transfer of charges from the first photosensitive zone to the second photosensitive zone; and - a second potential, different from the first potential, adapted to allow a transfer of charges from the first photosensitive zone to the second photosensitive zone.

[0012] According to one embodiment, the control circuit is configured to alternately apply, on the second transfer grid: - a third potential adapted to block a transfer of charges from the second photosensitive zone to the first charge storage zone; and - a fourth potential, different from the third potential, adapted to allow a transfer of charges from the second photosensitive zone to the first zone of storage of charges.

[0013] According to one embodiment, the sensor further comprises a fifth transfer grid extending horizontally on said face directly above the second photosensitive zone, the fifth transfer grid being adapted to transfer photogenerated charges from the second photosensitive zone to a second charge collection zone.

[0014] According to one embodiment, the second and fifth transfer gates are successively opened during a sampling phase of photogenerated charges in the second photosensitive zone.

[0015] According to one embodiment, the second and fifth transfer grids are connected to each other by a switch.

[0016] According to one embodiment, the first and second photosensitive zones of the photosites of the sensor are intended to capture respectively a 2D image and a depth image of a scene.

[0017] According to one embodiment, the first and second photosensitive zones are doped with the same conductivity type.

[0018] According to one embodiment, the first photosensitive zone is doped with a first type of conductivity and the second photosensitive zone is doped with a second type of conductivity, opposite to the first type of conductivity.

[0019] One embodiment provides a device comprising: - an image sensor as described; - a source of emission of infrared radiation; and - a control circuit for the infrared radiation emission source and the image sensor. Brief description of the drawings

[0020] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0021] [Fig.l] is a top view, schematic and partial, of an image sensor photosite according to one embodiment;

[0022] [Fig.2A] is a sectional view, along plane AA of [Fig.l], of the photosite of [Fig.l];

[0023] [Fig.2B] is a sectional view, along plane BB of [Fig.l], of the photosite of [Fig.l];

[0024] [Fig. 3] is a schematic and partial sectional view of an image sensor comprising several photosites of the type of the photosite of [Fig. 1] according to one embodiment;

[0025] [Fig.4] is an electrical diagram of a control circuit of the photosite of [Fig.l] according to one embodiment;

[0026] [Fig.5] is an electrical diagram of a control circuit of the photosite of [Fig.l] according to another embodiment;

[0027] [Fig.6] is a timing diagram illustrating a mode of implementation of a method for controlling photosites of the image sensor of [Fig.3];

[0028] [Fig.7] is an electrical diagram of a control circuit for four photosites of the type of the photosite of [Fig.l] according to one embodiment;

[0029] [Fig.8] is a schematic and partial top view of an image sensor photosite according to another embodiment;

[0030] [Fig.9] is an electrical diagram of a control circuit of the photosite of [Fig.8] according to one embodiment;

[0031] [Fig. 10] is a schematic and partial top view of an image sensor photosite according to yet another embodiment; and

[0032] [Fig. 11 A] is a sectional view, along plane AA of [Fig. 10], of the photosite of [Fig.10], Description of the embodiments

[0033] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0034] For the sake of clarity, only the steps and elements useful for understanding the embodiments described have been shown and are detailed. In particular, the reading circuits, or column decoders, the control circuits, or row decoders, and the applications in which image sensors may be provided have not been detailed, the embodiments and variants described being compatible with the reading circuits and the control circuits of conventional image sensors, as well as with conventional applications implementing image sensors.

[0035] Furthermore, the polarization of the MOS box and the passivation layers located along the sides of the vertical transfer gates and the isolation trenches are not detailed.

[0036] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0037] In the following description, “transmittance of a layer” means a ratio between the intensity of the radiation leaving the layer and the intensity of the radiation entering the layer. In the remainder of the description, a layer or film is said to be opaque to radiation when the transmittance of the radiation through the layer or film is less than 10%. In the remainder of the description, a layer or film is said to be transparent to radiation when the transmittance of the radiation through the layer or film is greater than 10%.

[0038] In the remainder of the description, “visible light” designates electromagnetic radiation whose wavelength is between 380 and 780 nm and “infrared radiation” designates electromagnetic radiation whose wavelength is between 780 nm and 15 pm. Furthermore, “near infrared radiation” more precisely designates electromagnetic radiation whose wavelength is between 750 nm and 1.1 pm.

[0039] A pixel of an image corresponds to the unit element of the image captured by an image sensor. When the image sensor is a color image sensor, it generally comprises, for each pixel of the color image to be acquired, a group of at least three photosites. Each of these three photosites acquires light radiation substantially in a single color (for example red, green or blue), for example in a wavelength range of less than 100 nm. When the image sensor is a depth image sensor, it may comprise, for each pixel of the depth image to be acquired, one or more photosites each making it possible to acquire a portion of the depth information.

[0040] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made unless otherwise specified to the orientation of the figures.

[0041] Unless otherwise specified, the expressions “about”, “approximately”, “substantially”, and “of the order of” mean to within 10%, preferably to within 5%.

[0042] [Fig. 1] is a schematic and partial top view of a photosite 100 of an image sensor according to one embodiment. Figures 2A and 2B are sectional views, along planes AA and BB of [Fig. 1], respectively, of the photosite 100 of [Fig. 1].

[0043] In the example shown, the photosite 100 is formed in and on a semiconductor substrate 101, for example made of silicon. For example, the substrate 101 has a thickness of between 3 and 20 μm.

[0044] In this example, the photosite 100 comprises a first photosensitive zone 103 formed in the semiconductor substrate 101. As illustrated in FIGS. 2A and 2B, the first photosensitive zone 103 extends vertically in the thickness of the substrate. semiconductor 101 from a lower face 101B of the substrate 101 to a depth less than the thickness of the substrate 101. In the illustrated example, the first photosensitive zone 103 of the photosite 100 has, seen from above, a periphery of substantially square shape. The first photosensitive zone 103 is for example formed in a first region 105 of the semiconductor substrate 101 doped with a first conductivity type, for example the N type, and having a doping level NI.

[0045] The first photosensitive zone 103 may for example constitute a first photosensitive diode D1, or photodiode, for example a pinched photodiode having a pinch voltage Vpin1.

[0046] In the example shown, the photosite 100 further comprises a second photosensitive zone 107 formed in the semiconductor substrate 101. The second photosensitive zone 107 is located directly above the first photosensitive zone 103 (above the first photosensitive zone 103, in the orientation of FIGS. 2A and 2B). In the example illustrated, the second photosensitive zone 107 extends vertically in the thickness of the semiconductor substrate 101, from an upper face 101T of the substrate 101 opposite the lower face 101B, to a depth less than the thickness of the substrate 101. Seen from above, the second photosensitive zone 107 has, for example, a rectangular-shaped perimeter. The second photosensitive zone 107 has, for example, lateral dimensions smaller than those of the first photosensitive zone 103.More precisely, in top view, the rectangle formed by the second photosensitive zone 107 is inscribed inside the square formed by the first photosensitive zone 103. The second photosensitive zone 107 is for example formed in a second region 109 of the substrate 101 doped with the first conductivity type, the N type in this example, and having a doping level N2. The N2 doping rate of the second region 109 of the substrate 101 is for example greater than the N1 doping level of the first region 105. In the example shown, the second region 109 of the substrate 101 is in contact, by its lower face, with the upper face of the first underlying region 105. Furthermore, in this example, the second photosensitive zone 107 is substantially in contact, by its lower face, with the upper face of the first underlying photosensitive zone 103.

[0047] The second photosensitive zone 107 may for example constitute a second photosensitive diode D2, for example a pinched photodiode having a pinch voltage Vpin2. In this example, the pinch voltage Vpin2 of the second photodiode D2 is greater than the pinch voltage Vpinl of the first photodiode DL.

[0048] Each photosensitive zone 103, 107 is for example intended to collect incident photons, during illumination phases of the image sensor of which the photosite 100, and to convert these photons into electron-hole pairs. In this example, the first photosensitive area 103 is adapted to capture light in a first wavelength range and the second photosensitive area 107 is adapted to capture light in a second wavelength range, different from the first wavelength range. The first and second photosensitive areas 103 and 107 are for example intended to capture 2D images and depth images of a scene respectively. By way of example, the first photosensitive area 103 of the photosite 100 is adapted to capture visible light, for example blue light, and the second photosensitive area 107 of the photosite 100 is adapted to capture infrared radiation, for example near infrared radiation, when the photosite 100 is illuminated from the side of its lower face 101B.

[0049] In a case where the first and second photosensitive zones 103 and 107 are made of the same material, for example silicon, the visible light and the infrared radiation are absorbed mainly at different depths in the semiconductor substrate 101 from its lower face 101B. In this case, the majority absorption depth of the visible light is less than that of the infrared radiation. The second photosensitive zone 107 may for example have a thickness greater than that of the first photosensitive zone 103 in order to optimize the absorption of the infrared radiation in the second photosensitive zone 107.

[0050] In the example shown, the photosite 100 further comprises a peripheral isolation trench 111, for example a capacitive isolation trench, laterally delimiting the first photosensitive zone 103. More precisely, in this example, the peripheral isolation trench 111 borders all the lateral faces of the first photosensitive zone 103 and has, in top view, a periphery of substantially square shape.

[0051] The peripheral isolation trench 111 makes it possible to electrically isolate the first and second photosensitive zones 103 and 107 of the photosite 100 from the photosensitive zones of the neighboring photosites, not shown in FIGS. 1, 2A and 2B. The peripheral isolation trench 111 is formed in the substrate 101. In the orientation of FIGS. 2A and 2B, the peripheral isolation trench 111 extends vertically in the thickness of the substrate 101, from the upper face 101T of the substrate 101, to the lower face 101B of the substrate 101. In other words, the peripheral isolation trench 111 extends vertically, in this example, over the entire thickness of the substrate 101 and opens out on the side of the upper 101T and lower 101B faces of the substrate 101.

[0052] The peripheral isolation trench 111 has, for example, a width of between 30 and 600 nm, and a depth of between 5 and 20 pm. In the example illustrated in FIGS. 2A and 2B, the peripheral isolation trench 111 has a depth equal to the thickness of the substrate 101.

[0053] Although this has not been detailed in figures 1, 2A and 2B, the peripheral isolation trench 111 comprises for example an electrically conductive region whose side walls are coated with an electrically insulating layer. This layer electrically insulates the electrically conductive region of the trench 111 with respect to the substrate 101. For example, the electrically conductive region of the trench 111 is made of polycrystalline silicon or a metal, for example copper, or a metal alloy, and the electrically insulating layer of the trench 111 is made of a dielectric material, for example silicon oxide. For example, the peripheral isolation trench 111 is a CDTI (Capacitive Deep Trench Isolation) type trench, or capacitive deep isolation trench.

[0054] In the example illustrated in figures 1, 2A and 2B, the photosite 100 further comprises a vertical transfer grid VEGA adapted to transfer the photogenerated charges in the first photosensitive zone 103 to the second photosensitive zone 107. More precisely, a control circuit of the photosite 100 can be used to alternately apply, on the vertical transfer grid VEGA: - a first potential adapted to block a transfer of charges from the first photosensitive zone 103 to the second photosensitive zone 107; or - a second potential, different from the first potential, adapted to allow a transfer of charges from the first photosensitive zone 103 to the second photosensitive zone 107.

[0055] In this example, the vertical transfer grid VEGA comprises two separate isolation trenches 115, for example capacitive isolation trenches. As illustrated in Figures 2A and 2B, each isolation trench 115 of the vertical transfer gate VEGA extends vertically in the thickness of the semiconductor substrate 101 from the upper face 101T of the substrate 101 to the first photosensitive zone 103, and partially penetrates into the first photosensitive zone 103 to a depth less than that of the peripheral isolation trench 111. In other words, each isolation trench 115 is interrupted in the thickness of the first region 105 of the substrate 101 and does not open onto the lower face 101B of the substrate 101. In this example, each isolation trench 115 completely passes through the second region 109 of the substrate 101 and partially penetrates into the first region 105.For example, each isolation trench 115 has a depth of between 3 and 18 pm.

[0056] In the example shown, the isolation trenches 115 form two plates substantially parallel to each other and bordering two opposite lateral faces of the second photosensitive zone 107. In this example, the isolation trenches 115 are furthermore, seen from above, substantially parallel to two opposite sides of the isolation trench. ring road 111.

[0057] In this example, the pinch-off voltages Vpinl and Vpin2 of the diodes DI and D2 can be adjusted by modifying the doping levels NI and N2 of the photosensitive zones 103 and 107. The voltages Vpinl and Vpin2 can further be adjusted by modifying respectively a distance between the two opposite walls of the peripheral isolation trench 111 parallel to the isolation trenches 115 and the width of the vertical transfer gate VEGA, in other words the distance between the two isolation trenches 115. The voltages Vpinl and Vpin2 also depend on a bias voltage of an inversion layer passivating the sides of the trench 111, for the photosensitive zone 103, and of the trenches 115, for the photosensitive zone 107. This bias voltage is for example identical for the two photosensitive zones 103 and 107.In this example, the bias voltage of the inversion layer does not allow the pinch-off voltages Vpinl and Vpin2 to be adjusted independently of each other.

[0058] Each isolation trench 115 of the vertical transfer grid VEGA has, for example, a structure similar to that of the peripheral isolation trench 111. More precisely, although this has not been detailed in FIGS. 1, 2A and 2B, each isolation trench 115 comprises, for example, an electrically conductive region, for example made of polycrystalline silicon or a metal, for example copper, or a metal alloy. The electrically conductive region of each isolation trench 115 is, for example, made of the same material as the electrically conductive region of the peripheral isolation trench 111. Furthermore, each trench 115 comprises, for example, an electrically insulating layer coating the side walls and the lower face of the electrically conductive region. This layer electrically insulates the electrically conductive region of the trench 115 relative to the substrate 101.For example, the electrically insulating layer of each trench 115 is made of a dielectric material, for example silicon oxide. The electrically insulating layer of each insulation trench 115 is for example made of the same material as the electrically insulating layer of the peripheral insulation trench 111.

[0059] The electrically conductive region of each insulation trench 115 is for example electrically insulated from the electrically conductive region of the peripheral insulation trench 111. This makes it possible for example to polarize the electrically conductive regions of the insulation trenches 115 independently of the electrically conductive region of the peripheral insulation trench 111.

[0060] In the example shown, the photosite 100 further comprises the same zone 117 for collecting the charges photogenerated in the first and second photosensitive zones 103 and 107, arranged on the side of the upper face 101T of the semi-transparent substrate. conductor 101 opposite the first photosensitive zone 103. In the orientation of [Fig.2B], the charge collection zone 117 extends vertically in the thickness of the substrate 101 from its upper face 101T and to a depth less than that of the insulation trenches 115. The charge collection zone 117 corresponds for example to a third region of the substrate 101 doped with the first conductivity type, the N type in this example, and having a doping level N4 of for example between 1 x 1016 and 5 x 1020 at. / cm3 (N+ doping).

[0061] In this example, the photosite 100 further comprises a horizontal transfer grid 119 adapted to transfer the charges from the second photosensitive zone 107 to the charge collection zone 117. More precisely, a control circuit of the photosite 100 can be used to alternately apply, on the horizontal transfer grid 119: - a third potential adapted to block a transfer of charges from the second photosensitive zone 107 to the charge collection zone 117; or - a fourth potential, different from the third potential, adapted to allow a transfer of charges from the second photosensitive zone 107 to the charge collection zone 117.

[0062] In the example illustrated, the horizontal transfer grid 119 extends horizontally on the upper face 101T of the semiconductor substrate 101 directly above the second photosensitive zone 107. The transfer grid 119 more precisely comprises an electrically insulating layer 121, for example made of silicon oxide, covering a portion of the upper face 101T of the semiconductor substrate 101 and an electrically conductive layer 123, for example made of doped polycrystalline silicon, covering an upper face of the electrically insulating layer 121.

[0063] In the example shown, the semiconductor substrate 101 further comprises a fourth region 125 doped with a second type of conductivity, the P type in this example, opposite to the first type of conductivity and having a doping level PL. In this example, the fourth region 125 extends vertically in the thickness of the substrate 101 from the upper face 101T of the substrate 101 and to a depth less than that of the charge collection zone 117. The fourth region 125 extends for example horizontally between the isolation trenches 115 of the vertical transfer gate VEGA.

[0064] The substrate 101 further comprises, for example, a fifth region 127 doped with the first conductivity type, the N type in this example, and having a doping level N3. The doping level N3 of the fifth region 127 is, for example, higher than the doping level N2 of the second region 109 and lower than the doping level N4 of the zone 117. The fifth region 127 is, for example, located directly above the fourth region 125. In this example, the fourth region 125 of the substrate 101 is in contact, by its lower face, with the upper face of the underlying fifth region 127. In this example, the fifth region 127 extends vertically in the thickness of the substrate 101 from the lower face of the fourth region 125 and to a depth less than that of the charge collection zone 117.

[0065] In the example shown, the semiconductor substrate 101 further comprises a sixth region 129 doped with the second conductivity type, the P type in this example, and having a doping level P2. In this example, the sixth region 129 extends vertically in the thickness of the substrate 101 from the upper face 101T of the substrate 101 and to a depth greater than that of the charge collection zone 117 and the fifth region 127 of the substrate 101. The sixth region 129 is for example interposed between the fourth and fifth regions 125 and 127, on the one hand, and the charge collection zone 117, on the other hand. Furthermore, the sixth region 129 may, as in the example illustrated in [Fig.2B], extend horizontally under the fifth region 127 of the substrate 101 and under the charge collection zone 117. In this example, region 129 further extends to the peripheral isolation trench 111.

[0066] In this example, the electrically conductive layer 123 and the electrically insulating layer 121 of the transfer gate 119 correspond respectively to a gate electrode and to a gate insulator of an MTG transistor for transferring the photogenerated charges in the first and second photosensitive zones 103 and 107, for example a MOS (Metal Oxide Semiconductor) transistor. Furthermore, the third, fifth and sixth regions 117, 127 and 129 of the substrate 101 correspond respectively to drain, source and channel regions of the MTG transistor. The fourth region 125 of the substrate 101 makes it possible, for example, to passivate the surface of the fifth region 127.

[0067] For example, the first, second, third, fourth, fifth and sixth regions 105, 109, 117, 125, 127 and 129 are formed by ion implantation in the semiconductor substrate 101.

[0068] In the example shown, the photosite 100 further comprises another horizontal transfer gate 131 adapted to transfer charges from the second photosensitive zone 107 to a reset node, not shown, of the photosite 100. The transfer gate 131 has for example a structure identical or similar to that of the transfer gate 119 and will not be described in detail below. More precisely, the transfer gate 131 is for example part of another transfer transistor MTGRST, for example a MOS transistor for resetting the photosensitive zones 103 and 107. The reset transistor MTGRST has for example a structure identical or similar to that of the transfer transistor MTG. In particular, the transistor MTGRST comprises for example a zone 132 for collecting charges identical or similar to the charge collection zone 117 of the MTG transistor. In the example shown, the second charge collection zone 132 extends laterally on the upper face 101T of the substrate 101 directly above the second photosensitive zone 107.

[0069] In the illustrated example, the photosite 100 further comprises isolation trenches 133 located on either side of the second photosensitive zone 107. The isolation trenches 133 extend vertically in the thickness of the semiconductor substrate 101, from its upper face 101T, to a depth for example less than the thickness of the charge collection zone 117. In this example, the isolation trenches 133 further extend horizontally in a direction substantially perpendicular to the plates formed by the isolation trenches 115 of the vertical transfer gate VEGA. In the example shown, the bottom of each trench 133 is on and in contact with the region 129. By way of example, the isolation trenches 133 are STI (Shallow Trench Isolation) type trenches, or shallow isolation trenches, and have for example a depth of the order of 300 nm.

[0070] [Fig. 3] is a schematic and partial sectional view of an image sensor 300 comprising several photosites of the type of photosite 100 of [Fig. 1] according to one embodiment. The part of the sensor 300 visible in [Fig. 3] more precisely comprises a photosite 100G adapted to capture only visible light, for example green light, and a photosite 100Z adapted to capture both infrared radiation and visible light, for example blue light. The photosites 100G and 100Z of [Fig. 3] for example each have a structure identical or similar to that of the photosite 100 of [Fig. 1]. Although only two 100G and 100Z photosites of the 100 photosite type have been shown in [Fig. 3], the image sensor 300 may of course have a total number of 100G and 100Z photosites much larger than that shown in [Fig. 3], for example several thousand or several million 100G and 100Z photosites.

[0071] In the example shown, the photosites 100G and 100Z of the sensor 300 are on and in contact, on the side of their face 101T (the lower face, in the orientation of [Fig. 3]), with an interconnection network 301 making it possible to control the photosites 100G and 100Z. The interconnection network 301 comprises for example a stack of metallization levels separated from each other by dielectric layers. Each metallization level of the network 301 typically comprises several disjointed portions, electrically insulated from each other, of the same metal layer. The interconnection network 301 may further comprise conductive vias making it possible to interconnect several portions of metal layers forming part of distinct metallization levels. For the purposes of simplification, the metal levels lization, the dielectric layers and the conductive vias have not been detailed in [Fig.3],

[0072] In the example of the image sensor 300, the first photosensitive zone 103 of the photosite 100Z is adapted to capture visible light, for example blue light, and the second photosensitive zone 107 of the photosite 100Z is adapted to capture infrared radiation, for example near infrared radiation.

[0073] In this example, the photosensitive areas 103 and 107 of the photosite 100G are both adapted to capture visible light, for example green light. For example, the vertical transfer gate VEGA of the photosite 100G can be permanently controlled in the on state. In this case, the first and second photosensitive areas 103 and 107 of the photosite 100G are for example combined, or shared, thus forming a single photosensitive area 303.

[0074] In the example shown, each photosite 100G, 100Z is coated, on the side of its face 101B (the upper face, in the orientation of [Fig.3]), with an anti-reflection and passivation layer 305.

[0075] In this example, layer 305 of photosite 100G is coated with a layer 307 of resin. For example, resin layer 307 acts as a color filter adapted to allow only green light to pass, for example in the wavelength range of 510 to 570 nm. Furthermore, layer 305 of photosite 100Z is coated with a layer 309 of resin different from layer 307. For example, resin layer 309 acts as a color filter adapted to allow only blue light to pass, for example in the wavelength range of 430 to 490 nm.

[0076] In the example shown, the resin layer 307 of the photosite 100G is coated with another resin layer 311. For example, the resin layer 311 acts as a filter adapted to allow visible light to pass, for example in the wavelength range of 400 to 700 nm, the layer 311 being for example opaque to a range or band of wavelengths centered on approximately 940 nm. In addition, the resin layer 309 of the photosite 100Z is coated with a resin layer 313. The layer 313 is for example transparent to visible light and infrared radiation and makes it possible to compensate for a difference in height between the layer 309 of the photosite 100Z and the layer 311 of the photosite 100G.

[0077] In the example shown, the layers 305, 307 and 311 of the photosite 100G are separated from the layers 305, 309 and 313 of the photosite 100Z by a vertical optical isolation barrier 315. The vertical barrier 315 makes it possible, for example, to avoid optical cross-talk phenomena between the different photosites 100G, 100Z of the sensor 300.

[0078] In this example, each photosite 100G, 100Z is further surmounted by a microlens 317.

[0079] The layer 313 is for example made of the same material as the microlenses 317. As a variant, the layer 313 is made of silicon dioxide (SiO2).

[0080] As illustrated in [Fig.3], a dual-band filter 319 may be arranged above the microlenses 317. The filter 319 is for example adapted to allow only visible light and infrared radiation having a wavelength equal to approximately 940 nm to pass.

[0081] For the acquisition of 2D color images, the photosites of the image sensor 300 are for example divided into elementary groups of four photosites, each group comprising more precisely a 100Z photosite adapted to capture blue light and infrared radiation, called blue and depth photosite, two 100G photosites adapted to capture only green light, called green photosites, and a photosite adapted to capture only red light, called red photosite. The red photosite has for example a structure similar to that previously described for the green photosite 100G. More precisely, the red photosite differs for example from the green photosite 100G in that the resin layer 307 of the red photosite is adapted to allow only red light to pass, for example in the wavelength range of 620 to 700 nm. For example, the photosites of the image sensor 300 are arranged according to a Bayer matrix.

[0082] The image sensor 300 is for example adapted to acquire, in addition to 2D color images of a scene, depth images of the scene. The depth images are for example acquired by the image sensor 300 by implementing a distance measurement by indirect time of flight (iToF). For this, an incident infrared radiation, or signal, modulated in amplitude at a modulation frequency Fmod is for example emitted by a source in the direction of the scene. The radiation, or signal, reflected by the scene, having a phase shift Aq> with respect to the incident radiation, is captured by the photosites 100Z of the image sensor 300. For each photosite, the phase shift Aq> of the radiation captured by the photosite is a function of the distance between the device and a point or a region of the scene seen by the photosite.

[0083] By way of example, for each pixel of a depth image to be acquired by the image sensor 300, a group of four neighboring 100Z photosites is used to sample the signal reflected by the scene, in order to estimate the phase shift Aq> (modulo 2ir). More precisely, the four 100Z photosites are for example configured to acquire, during each modulation period (frequency Fmod) of the reflected signal, four successive samples each corresponding to a quantity of photo-generated charges in the second photosensitive zone 107 of the 100Z photosite for a duration equal to approximately a quarter of the period of the reflected signal, then transferred to a storage area. These four samples are accumulated or integrated over several periods of the reflected signal, for example over several thousands or millions of periods, and make it possible to trace the phase shift Aq> between the incident wave and the reflected wave.

[0084] As a variant, it is possible to use, for each pixel of the depth image to be acquired, only three neighboring 100Z photosites. In this case, the three 100Z photosites are for example configured to acquire, during each period of the reflected signal, three successive samples each corresponding to a quantity of charges photogenerated during sampling windows each equal to approximately one third of the period of the reflected signal.

[0085] As a variant, it is possible to use, for example, two 100Z photosites to acquire the four samples, each of the two 100Z photosites adapted to form the same pixel of the depth image being, for example, used to acquire two successive sub-images. More precisely, the two 100Z photosites are, for example, configured to acquire, during a first acquisition phase, the samples corresponding to first and second quarters of the modulation period of the light signal, and, during a second acquisition phase, the samples corresponding to third and fourth quarters of the modulation period of the light signal. The combination of the two sub-images makes it possible to obtain the four samples from which the phase shift Aq> is calculated to form the depth image.

[0086] The acquisition of several samples by the same photosite advantageously makes it possible to increase the resolution of the sensor. For example, compared to a case where each photosite is configured to acquire a single sample, the resolution of the sensor can be increased by providing that each photosite is configured to acquire two or three samples, each pixel of the depth image being obtained by means of two photosites or a single photosite, respectively. In addition, the acquisition of several samples by the same photosite advantageously makes it possible to increase the shooting rate. For example, in a case where two photosites are used to reconstruct each pixel of the depth image, two images are used to calculate the distance if each photosite captures a single sample while a single image is used to calculate the distance if each photosite captures two samples.However, acquiring multiple samples from a single photosite tends to increase the photosite dimensions.

[0087] [Fig.4] is an electrical diagram of a control circuit 400 of the photosite 100 of [Fig.l] according to one embodiment. The circuit 400 is for example more precisely used in the case where the photosite 100 is implemented as a photosite 100Z adapted to capture blue light and infrared radiation.

[0088] In the example illustrated in [Fig.4], the control circuit 400 comprises a first level 400A, dedicated to the collection of the photogenerated charges in the first and second photosensitive zones 103 and 107 of the photosite 100Z, and a second level 400B, dedicated to storing and reading charges from the first level 400A.

[0089] In the first level 400A of the circuit 400, the vertical transfer gate VEGA connects the cathode of the first pinched photodiode DI to the cathode of the second pinched photodiode D2. The vertical transfer gate VEGA makes it possible to transfer charges photogenerated in the photodiode DI to the photodiode D2. Furthermore, in this example, the transfer transistor MTGRST, symbolized in [Fig.4] by a switch, connects the cathode of the second pinched diode D2 to a node 401 for applying a potential VRT for supplying the photosite 100Z. The potential VRT is for example used as a reset potential. The transfer transistor MTG, symbolized in [Fig.4] by a switch, connects the cathode of the diode D2 to a first charge storage node SN1. The MTG transistor allows the transfer of charges from the photodiode D2 to the node SN1.The node SN1 is for example connected to the zone 117 for collecting photogenerated charges in the first and second photosensitive zones 103 and 107. In the example shown, the node SN1 is part of a circuit 450 for copying, or transferring, the potential present at the node SN1 to another node SN2 for storing charges.

[0090] In this example, the circuit 450 comprises an MRST switch, for example a MOS transistor, connecting the node SN1 to the node 401 for applying the supply potential VRT. The MRST switch makes it possible, for example, to reset the node SN1 by applying the potential VRT to it. In the example illustrated in [Fig.4], the node SN1 is connected to a gate electrode of an MSF transistor of the circuit 450, for example a MOS transistor, the drain and source electrodes of which are respectively connected to the node 401 for applying the potential VRT and to the second charge storage node SN2. The MSF transistor, mounted as a voltage follower, makes it possible, for example, to copy, onto the node SN2, the voltage present at the node SN1, to within a gate-source voltage.Furthermore, in this example, the node SN2 is connected to a drain electrode of another transistor MB of the circuit 450, for example a MOS transistor, the source and gate electrodes of which are respectively connected to a node 403 for applying a reference potential, for example ground, and to a node 405 for applying a potential Vb, for example associated with a common bias voltage of the circuit 400. The transistor MB is, in this example, mounted as a current source and makes it possible to supply the transistor MSF with a constant current.

[0091] In the example shown, the second level 400B of the circuit 400 comprises four branches SIGZ, RSTZ, RSTB and SIGB each connecting the node SN2 of the circuit 450 to a column Vxl. The column Vxl is for example connected to a reading circuit, not shown in [Fig.4], located at the bottom of the column.

[0092] In this example, the SIGZ, RSTZ, RSTB, SIGB branches respectively comprise- tively: - a first switch MSMPSIGZ, MSMPRSTZ, MSMPRSTB, MSMPSIGB connecting the node SN2 to a node VZSIG, VZRST, VBRST, VBSIG; - a capacitive element C1, C2, C3, C4 comprising a first terminal connected to the node VZSIG, VZRST, VBRST, VBSIG and a second terminal connected to the node 403 for applying the reference potential; - a transistor MSFSIGZ, MSFRSTZ, MSFRSTB, MSFSIGB comprising a gate terminal connected to the node VZSIG, VZRST, VBRST, VBSIG and a drain terminal connected to the node 401 of application of the potential VRT; and - a second switch MRDSIGZ, MRDRSTZ, MRDRSTB, MRDSIGB connecting a source terminal of the transistor MSFSIGZ, MSFRSTZ, MSFRSTB, MSFSIGB to the column Vxl.

[0093] For example, the switches and transistors of the SIGZ, RSTZ, RSTB and SIGB branches of the circuit 400 are MOS transistors.

[0094] In this example, the switches MSMPSIGZ, MSMPRSTZ, MSMPRSTB, MSMPSIGB are used as multiplexing switches between the node SN2 and the corresponding capacitive element C1, C2, C3, C4, allowing for example write access to these capacitive elements. The MOS transistors MSFSIGZ, MSFRSTZ, MSFRSTB, MSFSIGB are mounted as voltage followers and are for example used to copy to their source, to within a gate-source voltage, the voltage stored by the corresponding capacitive element C1, C2, C3, C4. The switches MRDSIGZ, MRDRSTZ, MRDRSTB, MRDSIGB are used as connection switches to the column Vxl and allow to apply, to the column Vxl, the source voltage of the corresponding transistor MSFSIGZ, MSFRSTZ, MSFRSTB, MSFSIGB.

[0095] The control circuit 400 advantageously makes it possible to simultaneously integrate photogenerated charges in the photosensitive zones 103 and 107 of the photodiodes DI and D2, to sample the photogenerated charges in the photodiode D2 in parallel with the integration in the photodiodes DI and D2 and to successively read, via the same electrical path, signals making it possible to reconstruct a depth image and a 2D image of a scene.

[0096] In the example illustrated in [Fig.4], the control circuit 400 is compatible with operation of the image sensor in so-called global shutter mode. However, the person skilled in the art is able to adapt the circuit 400 to make it compatible with operation of the image sensor in so-called rolling shutter mode.

[0097] [Fig.5] is an electrical diagram of a control circuit 500 of the photosite 100 of [Fig.l] according to another embodiment. The circuit 500 of [Fig.5] comprises elements in common with the circuit 400 of [Fig.4]. These common elements do not will not be described again in detail below. The circuit 500 is for example more precisely used in the case where the photosite 100 is implemented as a photosite 100G adapted to capture green light.

[0098] In the example shown, the circuit 500 comprises a first level 500A identical to the first level 400A of the circuit 400. In this example, the circuit 500 further comprises a second level 500B. The second level 500B of the circuit 500 differs for example from the second level 400B of the circuit 400 in that the second level 500B of the circuit 500 comprises only two branches SIGG and RSTG each connecting the node SN2 of the circuit 450 to a column Vx2, for example different from the column Vxl. The SIGG and RSTG branches of the circuit 500 have for example structures similar to those of the SIGB and RS TB branches, respectively, of the circuit 400 of [Fig.4].

[0099] More precisely, in this example, the SIGG and RSTG branches respectively comprise: - a first switch MSMPSIGG, MSMPRSTG connecting the node SN2 to a node VGSIG, VGRST; - a capacitive element C5, C6 comprising a first terminal connected to the node VGSIG, VGRST and a second terminal connected to the node 403 for applying the reference potential; - a transistor MSFSIGG, MSFRSTG comprising a gate terminal connected to the node VGSIG, VGRST and a drain terminal connected to the node 401 for applying the potential VRT; and - a second switch MRDSIGG, MRDRSTG connecting a source terminal of the transistor MSFSIGG, MSFRSTG to the column Vx2.

[0100] For example, the switches and transistors of the SIGG and RSTG branches of the circuit 500 are MOS transistors.

[0101] The transistors MSMPSIGG, MSMPRSTG, MSFSIGG, MSFRSTG, MRDSIGG and MRDRSTG have, for example, functions similar to those previously explained for the transistors MSMPSIGB, MSMPRSTB, MSFSIGB, MSFRSTB, MRDSIGB and MRDRSTB, respectively.

[0102] Although an embodiment has been set forth above in connection with [Fig. 5] in which the circuit 500 is used to control a 100G photosite adapted to sense green light, the person skilled in the art is capable of adapting the circuit 500 to control a photosite adapted to sense red light. More specifically, a circuit identical to the circuit 500 could be used.

[0103] For the sake of simplification, control circuits 400 and 500 using the same supply voltage VRT on each branch SIGZ, RSTZ, SIGB, RSTB, SIGG and RSTG have been shown above in relation to FIGS. 4 and 5. alternatively, it could be planned to use different supply voltages on all or part of these branches.

[0104] Furthermore, circuits 400 and 500 have been described above in relation to FIGS. 4 and 5, the second levels 400B and 500 of which comprise, for each capacitor C1, C2, C3, C4, C5, C6, a transistor MSFSIGZ, MSFRSTZ, MSFRSTB, MSFSIGB, MSFSIGG, MSFRSTG, the gate of which is connected to one of the terminals of the corresponding capacitor and the source of which is connected to the corresponding column Vxl, Vx2 by a switch MRDSIGZ, MRDRSTZ, MRDRSTB, MRDSIGB, MRDSIGG, MRDRSTG. As a variant, it can be provided that all the capacitors of the same second level 400B, 500B are connected, by switches, to the gate of a single reading transistor whose source is connected, by another transistor, to the corresponding column Vxl, Vx2, and that the potential applied to the gate of the reading transistor is reset by means of yet another transistor.The implementation of this variant is within the reach of the person skilled in the art based on the indications in this description.

[0105] [Fig.6] is a timing diagram illustrating a method of implementing a process control of the photosites 100Z and 100G of the image sensor 300 of [Fig.3] respectively controlled by the circuits 400 and 500 of figures 4 and 5.

[0106] More precisely, [Fig.6] illustrates the evolution, as a function of time t: - a TGRSTZ signal for controlling the transfer transistor MTGRST of the photosite 100Z; - a TGZ signal for controlling the MTG transfer transistor of the 100Z photosite; - a TGRSTG signal for controlling the MTGRST transfer transistor of the 100G photosite; - a TGG signal for controlling the MTG transfer transistor of the 100G photosite; - a MODE signal for controlling the VEGA vertical transfer grids of the 100Z and 100G photosites or, alternatively, the VEGA vertical transfer grid of the 100Z photo site only; - an RST1 signal for controlling the MRST switches of the 100Z and 100G photosites; - a signal SMPRSTZ for controlling the switch MSMPRSTZ of the branch RSTZ of the second level 400B of the circuit 400; - a signal SMPSIGZ for controlling the switch MSMPSIGZ of the SIGZ branch of the second level 400B of the circuit 400; - a signal SMPRSTB for controlling the switch MSMPRSTB of the branch RSTB of the second level 400B of the circuit 400; - a signal SMPSIGB for controlling the switch MSMPSIGB of the SIGB branch of the second level 400B of the circuit 400; - a signal SMPRSTG for controlling the switch MSMPRSTG of the RSTG branch of the second level 500B of the circuit 500; - a signal SMPSIGG for controlling the switch MSMPSIGG of the SIGG branch of the second level 500B of the circuit 500; - an RDRSTZ signal for controlling the MRDRSTZ switch of the RSTZ branch of the second level 400B of the circuit 400; - an RDSIGZ signal controlling the MRDSIGZ switch of the SIGZ branch of the second level 400B of the circuit 400; - an RDRSTB signal controlling the MRDRSTB switch of the RSTB branch of the second level 400B of the circuit 400; - an RDSIGB signal for controlling the MRDSIGB switch of the SIGB branch of the second level 400B of the circuit 400; - an RDRSTG signal for controlling the MRDRSTG switch of the RSTG branch of the second level 500B of the circuit 500; and - an RDSIGG signal controlling the MRDSIGG switch of the SIGG branch of the second level 500B of the circuit 500.

[0107] In the method illustrated in [Fig.6], each control signal has high and low states. In this example, the switch is closed, or the transistor is on, when the corresponding control signal is in the high state and the switch is open, or the transistor is off, when the corresponding control signal is in the low state. This example is not, however, limiting, the person skilled in the art being able to adapt what is described in relation to [Fig.6] to the case where the switch is closed when the corresponding control signal is in the low state and open when the corresponding control signal is in the high state.

[0108] Between an instant t0 and another instant t1, subsequent to the instant t0, the signals TGRSTZ, TGRSTG, MODE, RST1 and SMPRSTZ are in the high state. In each photosite 100G, 100Z, the charges of the photodiode DI are thus removed by transferring them to the photodiode D2 and the charges of the photodiode D2 are removed by transferring them to the node 401 for applying the supply potential VRT via the switch MTGRST. In addition, the node SN1 of each photosite 100G, 100Z is reset by applying the potential VRT via the switch MRST. In the photosite 100G, 100Z, the potential present at the node SN1 after reset is written into the storage capacitor C2 via the transistor MSMPRSTZ. In this example, all other switches are in the open state between times t0 and tl.

[0109] At time t1, the RST1 signal controlling the MRST switches of the 100G and 100Z photosites is switched to the low state, the TGRSTZ, TGRSTG, MODE and SMPRSTZ signals being maintained in the high state. This has the effect of opening the MRST switches and storing the VRT potential at the SN1 nodes of the 100G and 100Z photosites.

[0110] At a time t2, subsequent to time t1, the signals TGRSTZ, TGRSTG, MODE and SMPRSTZ are switched to the low state. Between time t2 and a time t3, subsequent to time t2, a sampling phase SAM of the photogenerated charges in the photodiode D2 of the photosite 100Z is carried out. More precisely, the photogenerated charges in the photodiode D2 of the photosite 100Z are transferred periodically to the node SN1 by controlling the transfer transistor MTG of the photosite 100Z to the on state then to the off state periodically. The diode D2 is reset periodically by controlling the transfer transistor MTGRST of the photosite 100Z to the on state then to the off state during the phases where the transistor MTG is in the off state.

[0111] In the example shown, the TGRSTZ signal has a duty cycle equal to approximately 3 / 4 and the TGZ signal has a duty cycle equal to approximately 1 / 4. Three other photosites of the image sensor 300, for example 100Z photosites neighboring the 100Z photosite considered, having TGRSTZ and TGZ signals phase-shifted by ji / 2, ir and 3ir / 2 relative to the TGRSTZ and TGZ signals illustrated in [Fig. 6] can be used to sample the infrared radiation and return to the value of the phase shift Aq>. As a variant, TGRSTZ and TGZ signals could be provided having duty cycles respectively equal to approximately 2 / 3 and 1 / 3. In this case, two other photosites having TGRSTZ and TGZ signals each phase-shifted by 2ir / 3 and 4ir / 3 relative to the TGRSTZ and TGZ signals of the 100Z photosite, for example 100Z photosites neighboring the 100Z photosite considered, can be used to sample the infrared radiation.

[0112] At time t2, an integration phase INT also begins in the photodiode DI of the photosite 100Z and in the photodiodes DI and D2 of the photosite 100G. The integration phase INT ends at time t4, after time t3. At time t3, the signal TGRSTZ is switched to the high state and the signal TGZ is switched to the low state. Thus, charges continuing to be photogenerated in the photodiode D2 under the effect of the absorption of the infrared radiation and / or residual charges that may remain in the photodiode D2 are evacuated to the node 401 for applying the potential VRT. Between times t3 and t4, the signal SMPSIGZ is first switched to the high state and then to the low state. This has the effect of storing, in the capacity Cl, the voltage present at the node SN1 (to within a gate-source voltage) obtained following the accumulation of charges on this node during the SAM sampling phase.The RST1, SMPRSTB and SMPRSTG signals are then simultaneously switched to the high state, then the RST1 signal is switched to the low state and finally the SMPRSTB and SMPRSTG signals are switched to the low state. This prepares the reading of the charges photogenerated by visible light by resetting the SN1 nodes of the photosites 100Z and 100G so that they can subsequently receive the charges photogenerated in the photodiode DI of the photosite 100Z and in . photodiodes DI and D2 of photosite 100G. The reset potentials applied to nodes SN1 of photosites 100Z and 100G are stored in capacitors C3 and C6, respectively.

[0113] Between time t4 and a time t5, subsequent to time t4, the signals TGZ, TGG and MODE are simultaneously switched to the high state, then simultaneously switched to the low state. The charges stored in the photodiodes DI of the photosites 100Z and 100G are thus transferred to the photodiode D2. In the case of the photosite 100Z, the photodiode D2 has previously been emptied of its photogenerated charges by infrared radiation. In the case of the photosite 100G, the photogenerated charges in the photodiode DI are added to the photogenerated charges in the photodiode D2. The charges in the photodiode D2 of each photosite 100Z, 100G are further transferred to the node SN1. The signals TGRSTZ and TGRSTG are kept in the low state during these operations.

[0114] The signals SMPSIGB and SMPSIGG are then simultaneously switched to the high state, then simultaneously switched to the low state to write and store, in the capacitors C4 and C5, the voltages of the nodes SN1 (to within a gate-source voltage) of the photosites 100Z and 100G, obtained following the transfers of the charges on these nodes. In addition, the signals TGRSTZ and TGRSTG of the photosites 100Z and 100G are simultaneously switched to the high state to reset the photodiodes D2 by discharging additional photogenerated charges, likely to fill the photodiode D2. The signals SMPSIGB and SMPSIGG are then switched to the low state, while the signals TGRSTZ and TGRSTG are maintained in the high state.

[0115] In the example shown, between a time t6, subsequent to time t5, and a time t7, subsequent to time t6, a TRANS reading phase is carried out during which the following operations are successively executed: - the RDRSTZ signal is switched to the high state then to the low state, to copy the voltage present at the terminals of the capacitor C2 on the column Vxl (to within a gate-source voltage); - the RDSIGZ signal is switched to the high state then to the low state, to copy the voltage present at the terminals of the capacitor Cl on the column Vxl (to within a gate-source voltage); - the signals RDRSTB, RDRSTG are simultaneously switched to the high state, then simultaneously switched to the low state, to copy the voltages present respectively at the terminals of the capacitors C3, C5 on the columns Vxl, Vx2 (to within a gate-source voltage); and - the signals RDSIGB, RDSIGG are simultaneously switched to the high state, then simultaneously switched to the low state, to copy the voltages present respectively at the terminals of the capacitors C4, C6 on the columns Vxl, Vx2 (at a voltage source grid near).

[0116] In this example, the capacitors connected to the same column Vxl, Vx2 are read successively while the capacitors connected to different columns Vxl, Vx2 are read simultaneously. After each copy on one of the columns Vxl, Vx2, the voltages are for example stored at the bottom of the column by reading circuits.

[0117] [Fig.7] is an electrical diagram of a circuit 700 for controlling four photosites of the type of photosite 100 of [Fig.l] according to one embodiment.

[0118] In [Fig.7], a 100R photosite has been more precisely represented, adapted to capture my predominantly red light, two 100G photosites, adapted to capture predominantly green light, and a 100Z photosite adapted to capture predominantly blue light and infrared radiation. The 100R, 100G and 100Z photosites are for example identical or similar to the 100 photosite. In this example, the 100R, 100G, 100Z photosites respectively comprise transfer transistors MTGR, MTGG, MTGZ similar to the MTG transfer transistor of the 100 photosite. In [Fig.7], the MTGR, MTGB and MTGZ transistors are each symbolized by a switch, one terminal of which is connected to the cathode of the photodiode D2 and another terminal of which is connected to the SN1 node of the circuit 450 previously described in relation to [Fig.4].

[0119] More precisely, the node SN1 is connected to the source terminal of the transistor MRST and to the gate terminal of the transistor MSF. The drain terminals of the transistors MRST and MSF are each connected to the node 401 for applying the potential VRT. Furthermore, the source terminal of the transistor MSF is connected to the drain terminal of the transistor MB, the source terminal of the transistor MB being connected to the node 403.

[0120] The transistors MRST, MSF and MB are for example distributed in the control circuits of the photosites 100R, 100G and 100Z. More precisely, in the example shown, the transistor MRST is part of the control circuit of the photosite 100R, the transistor MSF is part of the control circuit of one of the photosites 100G and the transistor MB is part of the control circuit of the photosite 100Z. For example, the control circuit of the other photosite 100G may comprise an unused MD transistor (“dummy” in English). This makes it possible for example to provide identical or similar control circuits for all the photosites 100R, 100G and 100Z of the sensor. The production of the image sensor is thus facilitated.

[0121] An advantage of the control circuit 700 illustrated in [Fig.7] is that it allows a four-transistor photosite architecture, called "4T", to be implemented instead of a six-transistor photosite architecture, called "6T". This results in a saving of space and cost.

[0122] Although not illustrated in [Fig.7], node SN2 of circuit 450 may be connected at a level identical or similar to the second level 400B of circuit 400 previously described in relation to [Fig.4]. The person skilled in the art is able to deduce the operation of the control circuit 700 of [Fig.7] from the indications provided above in relation to Figures 4 and 6.

[0123] [Fig. 8] is a schematic and partial top view of a photosite 800 of an image sensor according to another embodiment. The photosite 800 of [Fig. 8] comprises elements in common with the photosite 100 of [Fig. 1]. These common elements will not be described again below. The photosite 800 of [Fig. 8] differs from the photosite 100 of [Fig. 1] in that the photosite 800 comprises, in addition to the transfer transistor MTGRST, two other transfer transistors MTG1 and MTG2 identical or similar to the transfer transistor MTG of the photosite 100.

[0124] More precisely, in the example shown, the transistor MTG2 comprises a zone 817 for collecting photogenerated charges in the second photosensitive zone 107 and a horizontal transfer gate 819 identical or similar, respectively, to the zone 117 and to the gate 119 of the transistor MTG1.

[0125] In order to optimize the available space, the transistors MTG1, MTG2 and MTGRST are for example, as illustrated in [Fig.8], arranged in three corners of the square formed by the peripheral isolation trench 111 of the photosite 800. In this example, the vertical transfer gate VEGA comprises three separate isolation trenches 115 extending laterally between the gates of the transistors MTG1, MTG2 and MTGRST. The geometry of the photosite 800 illustrated in [Fig.8] is not limiting, the person skilled in the art being able to provide any geometry adapted to the integration of three transfer transistors within the same photosite.

[0126] An advantage of photosite 800 is that it allows two samples of the received infrared light signal to be captured using the same depth image. This allows for even greater gains in resolution, or in the number of images useful for capturing all of the samples, compared to photosite 100.

[0127] [Fig.9] is an electrical diagram of a circuit 900 for controlling the photosite 800 of [Fig.8] according to one embodiment.

[0128] In the example shown, the circuit 900 comprises two circuits 901 and 902, for example each identical or similar to the circuit 450 of the circuit 400 of [Fig. 4]. More precisely, in this example, each circuit 901, 902 comprises a node SN11, SN12 analogous to the node SN1 of the circuit 450 of [Fig. 4] and another node SN21, SN22 analogous to the node SN2 of the circuit 450. In the example illustrated in [Fig. 9], the nodes SN11 and SN12 of the circuits 901 and 902 are respectively connected to the transfer transistors MTG1 and MTG2 of the photosite 800, for example to the zones 117 and 817 of the photosite 800.

[0129] In this example, the circuit 900 further comprises branches SIGZ1, RSTZ1, RSTB and SIGB connecting the node SN21 of the circuit 901 to a column Vx and branches SIGZ2 and RSTZ2 connecting node SN22 to column Vx. The SIGZ1 and SIGZ2 branches of circuit 900 are for example identical or similar to the SIGZ branch of circuit 400 of [Fig.4] and the RSTZ1 and RSTZ2 branches of circuit 900 are for example identical or similar to the RSTZ branch of circuit 400. In addition, the RSTB and SIGB branches of circuit 900 are for example identical to the RSTB and SIGB branches of circuit 400.

[0130] The person skilled in the art is able to deduce the operation of the control circuit 900 of [Fig. 9] from the operation of the control circuit 400 of [Fig. 4] previously described in relation to FIGS. 4 and 6. In particular, during the sampling phase, the transfer transistors MTG1 and MTG2 are controlled so that each transistor MTG1, MTG2 is on for a quarter of the signal period. For the remaining half of the signal period, the transistor MTGRST is on while MTG1 and MTG2 are off. This advantageously makes it possible to acquire two samples per photosite 800 using the same depth image.

[0131] Optionally, the circuit 900 may further comprise a switch SW, for example a MOS transistor, connecting the node SN11 of the circuit 901 to the node SN12 of the circuit 902. The switch SW connects for example the transistor MTG1 to the transistor MTG2, the switch comprising for example more precisely a terminal connected to the zone 117 and another terminal connected to the zone 817 of the photosite 800. In this case, when the transistor MTG1 is in the on state to transfer the photo-generated charges into the photosensitive zone 103, in the case of the photosite 100Z, or into the photosensitive zones 103 and 107, in the case of the photosites 100G and 100R, at the end of the integration phase INT, the switch SW can be controlled: - either in the open state (blocked transistor) so as to transfer the photo-generated charges to the node SN11 only, the control circuit 900 in this case having an operation similar to that of the circuit 400; or - either in the closed state (transistor on), so as to distribute the transfer of photogenerated charges to the nodes SN11 and SN12, which in this case are equivalent to a single node having a capacity approximately equal to twice the capacity of a single one of the nodes SN11 and SN12.

[0132] This advantageously makes it possible to benefit from a double dynamic, that is to say to access two ranges of a pair formed by the parameters “light intensity range” and “precision”.

[0133] [Fig. 10] is a schematic and partial top view of a photosite 1000 of an image sensor according to yet another embodiment. [Fig. 1 1A] is a sectional view, along plane AA of [Fig. 10], of the photosite 1000 of [Fig. 10].

[0134] The photosite 1000 of Figures 10 and 1 IA comprises elements in common with the photosite 100 of Figures 1, 2A and 2B. These common elements will not be described again below. The photosite 1000 of Figures 10 and 11A differs from the photosite 100 of Figures 1, 2A and 2B in that the photosite 1000 comprises a third photosensitive area 1003 formed in the semiconductor substrate 101 and interposed between the first and second photosensitive areas 103 and 107. The third photosensitive area 1003 is located directly above the first and second photosensitive areas 103 and 107 (above the first photosensitive area 103 and below the second photosensitive area 107, in the orientation of [Fig. 11A]). Seen from above, the third photosensitive area 1003 has, for example, a substantially rectangular outline. The third photosensitive zone 1003 has, for example, lateral dimensions smaller than those of the first photosensitive zone 103.More precisely, in top view, the rectangle formed by the third photosensitive zone 1003 extends between the trenches 115 of the VEGA grid and between the two opposite walls of the peripheral isolation trench 111 perpendicular to the trenches 115. The third photosensitive zone 1003 is for example formed in a seventh region 1005 of the substrate 101 doped with the first conductivity type, the N type in this example, and having a doping level N5. The doping level N5 of the seventh region 1005 of the substrate 101 is for example higher than the doping level NI of the first region 105 and lower than the doping level N2 of the second region 109. In the example shown, the seventh region 1005 of the substrate 101 is in contact, by its lower face, with the upper face of the first underlying region 105 and in contact, by its upper face, with the lower face of the second overlying region 109.Furthermore, in this example, the third photosensitive zone 1003 is substantially in contact, by its lower face, with the upper face of the first underlying photosensitive zone 103 and substantially in contact, by its upper face, with the lower face of the second overlying photosensitive zone 107.

[0135] The third photosensitive zone 1003 is for example part of a third photosensitive diode D3, for example a pinched photodiode having a pinch voltage Vpin3. In this example, the pinch voltage Vpin3 of the third photodiode D3 is higher than the pinch voltage Vpin1 of the first photodiode DI and lower than the pinch voltage Vpin2 of the second photodiode D2.

[0136] Each photosensitive zone 103, 107, 1003 of the photosite 1000 is for example intended to collect incident photons, during illumination phases of the image sensor of which the photosite 100 is part, and to convert these photons into electron-hole pairs. In this example, the first photosensitive zone 103 is adapted to capture light in a first range of wavelengths, the second photosensitive zone 107 is adapted to capture light in a second range of wavelengths wavelength, different from the first wavelength range, and the third photosensitive area 1003 is adapted to capture light in a third wavelength range. The third wavelength range comprises, for example, the first and second wavelength ranges. Alternatively, the third wavelength range may be between the first and second wavelength ranges.

[0137] More specifically, the first and second photosensitive zones 103 and 107 are for example intended to capture 2D images and depth images of a scene respectively. For example, the first photosensitive zone 103 of the photosite 1000 is adapted to capture visible light, for example blue light, and the second photosensitive zone 107 of the photosite 1000 is adapted to capture infrared radiation, for example near infrared radiation, when the photosite 1000 is illuminated from the side of its lower face 101B. The third photosensitive zone 1003 of the photosite 1000 is then for example adapted to capture both visible light and near infrared radiation.

[0138] In the example illustrated in figures 10 and 1 IA, the photosite 1000 comprises, in addition to the transfer grid VEGA adapted to transfer the photogenerated charges in the first photosensitive zone 103 to the third photosensitive zone 1003, another vertical transfer grid VEGA2 adapted to transfer the photogenerated charges in the third photosensitive zone 1003 to the second photosensitive zone 107. More precisely, a control circuit of the photosite 1000 can be used to alternately apply, on the vertical transfer grid VEGA2: - a fifth potential adapted to block a transfer of charges from the third photosensitive zone 1003 to the second photosensitive zone 107; or - a sixth potential, different from the fifth potential, adapted to allow a transfer of charges from the third photosensitive zone 1003 to the second photosensitive zone 107.

[0139] In this example, the vertical transfer gate VEGA2 comprises two separate isolation trenches 1015, for example capacitive isolation trenches. As illustrated in [Fig. 11 A], each isolation trench 1015 of the vertical transfer gate VEGA2 extends vertically in the thickness of the semiconductor substrate 101 from the upper face 101T of the substrate 101 to the third photosensitive zone 1003, and partially penetrates into the third photosensitive zone 1003 to a depth less than that of the vertical transfer gate VEGA. In other words, each isolation trench 1015 is interrupted in the thickness of the seventh region 1005 of the substrate 101 and does not open into the first region 105 of the substrate 101. In this example, each isolation trench 1015 completely crosses the second region 109 of the substrate 101 and partially penetrates into the seventh region 1005.

[0140] In the example shown, the isolation trenches 1015 form two plates substantially parallel to each other and bordering two opposite lateral faces of the second photosensitive zone 107. In this example, the isolation trenches 1015 are furthermore, seen from above, substantially parallel to two opposite sides of the peripheral isolation trench 111 and to the isolation trenches 115 of the vertical transfer grid VEGA. In the example shown, the vertical transfer grid VEGA surrounds the vertical transfer grid VEGA2, each trench 115 of the grid VEGA being interposed between a trench 1015 of the grid VEGA2 and a wall of the trench 111.

[0141] Each isolation trench 1015 of the vertical transfer grid VEGA2 has, for example, a structure similar to that of the isolation trenches 115 of the vertical transfer grid VEGA. More precisely, although this has not been detailed in FIGS. 10 and 11A, each isolation trench 1015 comprises, for example, an electrically conductive region, for example made of polycrystalline silicon or a metal, for example copper, or a metal alloy. In addition, each trench 1015 comprises, for example, an electrically insulating layer coating the side walls and the lower face of the electrically conductive region. The electrically conductive region of each isolation trench 1015 is, for example, electrically insulated from the electrically conductive region of the trenches 115 and from the peripheral isolation trench 111.This makes it possible, for example, to polarize the electrically conductive regions of the insulation trenches 1015 independently of the electrically conductive region of the trenches 115 and the peripheral insulation trench 111.

[0142] The first charge collection zone 117 of the photosite 1000 is for example common to the charges photogenerated in the first, second and third photosensitive zones 103, 107 and 1003.

[0143] By way of example, the photosite 1000 is for example associated with a control circuit identical or similar to the control circuit 400 of [Fig.4].

[0144] The person skilled in the art is able to deduce the operation of the photosite 1000 of FIGS. 10 and 1 IA from the operation of the photosite 100 of FIGS. 1, 2A and 2B previously described in relation to FIGS. 4 and 6. In particular, the temporal evolution of the control signals is for example analogous to that previously described in relation to the timing diagram of [Fig. 6], but includes an additional step of elimination, in a case where the third wavelength range includes the first and second wavelength ranges, or of transfer, in a case where the third wavelength range is between the first and second wavelength ranges, of the photogenerated charges in the third photosensitive zone 1003. More precisely, the elimination or transfer step occurs for example after reading, on the node SN1, the charges photogenerated by the infrared radiation and before the transfer of the charges photogenerated in the photodiode DI to the node SN1, for example before switching to the high state of the signal MODE at time t4. In the case where the step prior to time t4 is an elimination step, the vertical transfer gate VEGA2 is for example switched to the on state to transfer the charges from the third photosensitive zone 1003 to the photodiode D2 then to the node 401 for applying the potential VRT, for example by opening the transistor MTGRST or by successively opening the transistor MTG then the transistor MRST. Adapting the operation to the case where the step prior to time t4 is a transfer step is within the scope of the person skilled in the art from the above indications.

[0145] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will occur to those skilled in the art. In particular, the photosite 1000 embodiment of Figures 10 and 11A may be combined with the photosite 800 embodiment of [Fig. 8].

[0146] Although examples of photosites 100, 800, 1000 have been described above in which regions 105 and 109 of substrate 101 in which first and second photosensitive areas 103 and 107 are formed are doped with the same conductivity type, N type in this example, it could alternatively be provided that regions 105 and 109 have opposite conduction types. For example, region 105 could be doped with the first conductivity type, N type in this example, and region 109 could be doped with the second conductivity type, P type in this example. In this case, the transfer of charges from the first photosensitive zone 103 to the second photosensitive zone 107 would not take place in the volume, as in the case where the regions 105 and 109 are of the same type of conductivity, but through channels located along the sides of the trenches 115 of the vertical transfer grid VEGA.

[0147] Furthermore, although examples of photosites 100, 800, 1000 have been described above in which the first photosensitive zone 103 is adapted to capture mainly blue light, it could alternatively be provided that the first photosensitive zone 103 is adapted to capture mainly green light. In this case, it would be possible, for example, to increase the thickness of the first photosensitive zone 103 relative to the second photosensitive zone 107, so as to optimize the absorption of green light in the first photosensitive zone 103.

[0148] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art from the functional indications given below. above. In particular, the described embodiments are not limited to the particular examples of materials and dimensions mentioned in the present description.

Claims

Claims

1.

2.

3. An image sensor (300) comprising a plurality of photosites (100; 800; 1000) formed in and on a semiconductor substrate (101), each photosite comprising: - a first photosensitive zone (103) formed in the semiconductor substrate and adapted to capture light in a first range of wavelengths; - a second photosensitive zone (107) formed in the semiconductor substrate directly above the first photosensitive zone (103) and adapted to capture light in a second range of wavelengths, different from the first range of wavelengths; - a first zone (117) for collecting photogenerated charges in the first and second photosensitive zones, arranged on the side of a face (101T) of the substrate opposite the first photosensitive zone (103); - a first transfer grid (VEGA), extending vertically from the first photosensitive zone (103) to said face (101T), adapted to transfer the photogenerated charges in the first photosensitive zone (103) to the second photosensitive zone (107); and - a second transfer grid (119), extending horizontally on said face (101T) directly above the second photosensitive zone (107), adapted to transfer the photogenerated charges from the second photosensitive zone (107) to the first charge collection zone (117). Sensor according to claim 1, wherein each photosite (800; 1000) further comprises: - at least one second zone (132) for collecting photogenerated charges in the second photosensitive zone (107), arranged on the side of said face (101T); and - at least one third transfer grid (131) extending laterally, on said face (101T), directly above the second photosensitive zone (107). Sensor according to claim 1 or 2, wherein each photosite (800; 1000) further comprises: - a third photosensitive zone (1003), interposed between the first and second photosensitive zones (103, 107); and - a fourth transfer grid (VEGA2) extending vertically, from the third photosensitive zone (1003), to said face (101T) and adapted to transfer the photogenerated charges into the third photosensitive area (1003) to the second photosensitive area (107).

4. A sensor according to claim 3, wherein the first charge collection area (117) is common to the photogenerated charges in the first, second and third photosensitive areas (103, 107, 1003).

5. Sensor according to claim 3 or 4, wherein the first transfer grid (VEGA) surrounds the fourth transfer grid (VEGA2).

6. Sensor according to any one of claims 1 to 5, in which each photosite (100; 800; 1000) further comprises a peripheral isolation trench (111) extending vertically in the semiconductor substrate (101), from said face (101T), and laterally delimiting the first photosensitive zone (103).

7. Sensor according to any one of claims 1 to 6, in which each photosite (100; 800; 1000) further comprises a control circuit (400; 500; 900) configured to alternately apply, on the first transfer grid (VEGA): - a first potential adapted to block a transfer of charges from the first photosensitive zone (103) to the second photosensitive zone (107); and - a second potential, different from the first potential, adapted to allow a transfer of charges from the first photosensitive zone (103) to the second photosensitive zone (107).

8. Sensor according to claim 7, in which the control circuit (400; 500; 900) is configured to alternately apply, on the second transfer grid (119): - a third potential adapted to block a transfer of charges from the second photosensitive zone (107) to the first charge storage zone (117); and - a fourth potential, different from the third potential, adapted to allow a transfer of charges from the second photosensitive zone (107) to the first charge storage zone (117).

9. Sensor according to any one of claims 1 to 8, further comprising a fifth transfer grid (819) extending horizontally on said face (101T) directly above the second photosensitive zone (107), the fifth transfer grid being adapted to transfer photogenerated charges from the second photosensitive zone (107) to a second charge collection zone (817).

10. Sensor according to claim 9, in which the second and fifth transfer gates (119, 819) are successively opened during a sampling phase of photogenerated charges in the second photosensitive zone (107).

11. A sensor according to claim 9 or 10, wherein the second and fifth transfer grids (119, 819) are connected to each other by a switch (SW).

12. A sensor according to any one of claims 1 to 11, wherein the first and second photosensitive areas (103, 107) of the photosites (100; 800; 1000) of the sensor are intended to capture respectively a 2D image and a depth image of a scene.

13. A sensor according to any one of claims 1 to 12, wherein the first and second photosensitive areas (103, 107) are doped with the same conductivity type.

14. A sensor according to any one of claims 1 to 12, wherein the first photosensitive area (103) is doped with a first conductivity type and the second photosensitive area (107) is doped with a second conductivity type, opposite to the first conductivity type.

15. Device comprising: - an image sensor (300) according to any one of claims 1 to 14; - a source for emitting infrared radiation; and - a circuit for controlling the source for emitting infrared radiation and the image sensor.

Images