Modulation device and method, demodulation device and method, and associated transmission and reception systems

Abstract

A device for modulating an ordered sequence of symbols (Cm) comprises: - a preprocessing unit (10) configured to apply to each symbol (Cm) a phase shift by an angle depending on the square of the rank (m) of the symbol concerned in the ordered sequence of symbols, and to produce preprocessed symbols as output; - a processing unit (30) configured to apply to the preprocessed symbols at least one discrete Fourier transform or at least one inverse discrete Fourier transform, and to produce transformed symbols (Sk) as output; - an inverse transformation unit (50) configured to produce samples (xn) of modulated signal as a function of the transformed symbols (Sk) by applying an inverse discrete Fourier transform. A demodulation device and reception and transmission systems are also described. Figure for abstract: figure 2

Description

Title of the invention: Modulation device and method, demodulation device and method, and associated transmission and reception systems Technical field of the invention

[0001] The present invention relates to the technical field of telecommunications.

[0002] It relates in particular to a modulation device, a modulation method, a demodulation device and a demodulation method, as well as associated transmission and reception systems. State of the art

[0003] When it is desired to transmit information represented by symbols on a communication channel, techniques for modulating the signal to be transmitted as a function of these symbols are regularly used.

[0004] The so-called "OFDM" modulation (for "Orthogonal Frequency Division Multiplexing"), in which the symbols are respectively transmitted on subcarriers having fixed frequencies, has for example been widely used.

[0005] A modulation called "OCDM" (for "Orthogonal Chirp Division Multiplexing") has more recently been proposed, in which the subcarriers used each have a frequency that evolves during the modulation period of a set of symbols. A description of this modulation is given in “Orthogonal chirp division multiplexing”, by X. Ouyang and J. Zhao in IEEE Transactions on Communications, vol. 64, no. 9, pp. 3946-3957, 2016.

[0006] This OCDM modulation is part of a larger family of modulations, called "AFDM" (for "Affine Frequency Division Multiplexing"), based on a discrete affine Fourier transform and presented for example in the article "AFDM: A Full Diversity Next Generation Waveform for High Mobility Communications", by A. Bemani, N. Ksairi and M. Kontouris, in 2021 IEEE International Conference on Communications Workshops (ICCWorkshops), 2021, pp. 1-6. Presentation of the invention

[0007] In this context, a device is proposed for modulating an ordered sequence of symbols into modulated signal samples, comprising:

[0008] - a preprocessing unit configured to apply to each symbol a phase shift by an angle depending on the square of the rank of the symbol concerned in the ordered sequence of symbols, and to produce preprocessed symbols as output;

[0009] - a processing unit configured to apply to the preprocessed symbols at least a discrete Fourier transform or at least a Fourier transform discrete inverse, and to produce transformed symbols as output;

[0010] - an inverse transformation unit configured to produce the samples in function of the symbols transformed by applying an inverse discrete Fourier transform.

[0011] Such a modulation device is thus formed of several stages, including a final one stage that produces the modulated signal samples by means of an inverse discrete Fourier transform, as in OFDM modulation. This modulation device can thus be developed relatively easily from existing devices performing OFDM modulation.

[0012] The modulation device proposed above is furthermore capable of carrying out AFDM type modulation, which is advantageous in terms of robustness with respect to various disturbances.

[0013] Indeed, by noting exp[(qn2+am2+2mn).jir / K] the function applied to the symbols Cm to be modulated to obtain an AFDM modulation (where n is the index of the time samples to be produced, K the number of symbols to be modulated, m the index of the symbols, q and a the parameters of the AFDM modulation, j the complex number such that j2=-1 and exp the exponential function), we can rewrite this function as explained below using in particular:

[0014] - multiplications of symbols by exp[(al / q).jirm2 / K];

[0015] - one or more discrete Fourier transform(s) or discrete Fourier transform(s) Discrete inverse Fourier(s) (depending on the sign of the parameter q);

[0016] - an inverse discrete Fourier transform,

[0017] since q is a non-zero integer and that: q is even or K is even.

[0018] Thus, for example, in the case of AFDM modulation as defined above (i.e. obtained by applying the function exp[(qn2+am2+2mn).jir / K] to the symbols), the aforementioned phase shift angle is:

[0019] ir.m2.(al / q) / K+ / -ir / 4.

[0020] This reformulation is for example interesting when the absolute value Iql of the parameter q is greater than or equal to 2 (Iql > 2), but also applies when q=l or q=-l (i.e. when lql=l).

[0021] Other non-limiting and advantageous characteristics of the modulation device according to the invention, taken individually or in all technically possible combinations, are the following:

[0022] - the processing unit is configured to produce an ordered sequence of symbols intermediates by discrete Fourier transformation of the preprocessed symbols and / or to apply to each intermediate symbol a phase shift of an angle depending on the square of the rank of the intermediate symbol concerned in the ordered sequence of intermediate symbols;

[0023] - the preprocessing unit is configured to produce the preprocessed symbols by respective phasings of the phase-shifted symbols (i.e. of the symbols obtained by the aforementioned phase shift by an angle depending on the square of the rank of the symbol concerned in the ordered sequence of symbols);

[0024] - the processing unit is configured to produce a plurality of ordered sequences of intermediate symbols by means of a respective plurality of discrete Fourier transforms of preprocessed symbols;

[0025] - the processing unit is configured to apply a respective phase shift to each intermediate symbols to obtain ordered sequences of phase-shifted intermediate symbols, and / or to sum together the phase-shifted intermediate symbols of the same rank in the ordered sequences of phase-shifted intermediate symbols in order to obtain an ordered sequence of sums;

[0026] - the processing unit is configured to apply a phase shift to each sum of an angle depending on the square of the rank of the sum concerned in the ordered sequence of sums;

[0027] - the processing unit is configured to reorder a portion of the inter symbols mediators into a reordered sequence of intermediate symbols and / or to apply, to each intermediate symbol of the reordered sequence of intermediate symbols, a phase shift of an angle depending on the square of the rank of the intermediate symbol concerned in the reordered sequence of intermediate symbols.

[0028] The invention also proposes a transmission system comprising a modulation device as presented above and a transmission unit, in a communication channel, of a signal constructed on the basis of the modulated signal samples.

[0029] The invention further proposes a method for modulating an ordered sequence of symbols into modulated signal samples, comprising the following steps:

[0030] - application, to each symbol, of a phase shift of an angle depending on the square of the rank of the symbol concerned in the ordered sequence of symbols;

[0031] - production of pre-processed symbols as a function of the symbols thus phase-shifted;

[0032] - production of transformed symbols using at least one transformation of Discrete Fourier or at least an inverse discrete Fourier transform applied to the preprocessed symbols;

[0033] - production of samples based on the symbols transformed by application of an inverse discrete Fourier transform.

[0034] The invention also proposes a device for demodulating a signal formed from samples, comprising:

[0035] - a transformation unit configured to produce transformed samples by applying a discrete Fourier transform to the samples;

[0036] - a processing unit configured to produce an ordered sequence of symbols intermediates based on the samples transformed using an inverse discrete Fourier transform or a discrete Fourier transform;

[0037] - a post-processing unit configured to apply to each inter symbol median a phase shift of an angle depending on the square of the rank of the intermediate symbol concerned in the ordered sequence of intermediate symbols.

[0038] The transformation unit is for example configured to produce an ordered sequence of transformed samples by applying the discrete Fourier transformation to the samples; the processing unit can then be configured to apply, to each transformed sample of the sequence of transformed samples, a phase shift by an angle depending on the square of the rank of the transformed sample in the sequence of transformed samples so as to produce phase-shifted transformed samples.

[0039] The processing unit is for example configured to produce, for each phase-shifted transformed sample, a plurality of intermediate values ​​by respective phase shifts, and / or to apply the inverse discrete Fourier transform or the discrete Fourier transform to all of the intermediate values ​​produced.

[0040] It is further proposed here that the ordered sequence of intermediate symbols is formed of a number of intermediate symbols strictly less than the number of intermediate values ​​to which the inverse discrete Fourier transform or the discrete Fourier transform is applied. This number of intermediate values ​​is for example a multiple of the number of intermediate symbols. In the example described below, the number of intermediate values ​​is equal to Iql times the number of intermediate symbols, where q is the parameter of the AFDM modulation already mentioned.

[0041] The invention also proposes a reception system comprising a unit for receiving a signal in a communication channel and a demodulation device as presented above, configured to receive the received signal as input.

[0042] The invention finally proposes a method for demodulating a signal formed from samples, comprising the following steps:

[0043] - production of transformed samples by applying a transformation of Discrete Fourier to samples;

[0044] - production of an ordered sequence of intermediate symbols on the basis of the samples transformed using an inverse discrete Fourier transform or a discrete Fourier transform;

[0045] - application, to each intermediate symbol, of a phase shift of a dependent angle of the square of the rank of the intermediate symbol concerned in the ordered sequence of intermediate symbols.

[0046] Of course, the various characteristics, variants and embodiments of the invention may be combined with each other in various combinations provided that they are not incompatible or mutually exclusive. Detailed description of the invention

[0047] Furthermore, various other characteristics of the invention emerge from the appended description given with reference to the drawings which illustrate non-limiting forms of embodiment of the invention and where:

[0048] [Fig-1] represents the main elements of an example of a transmission system;

[0049] [Fig.2] presents a first possible embodiment for a device of modulation of the emission system of [Fig.l];

[0050] [Fig.3] presents a second embodiment which can be envisaged for this modulation device;

[0051] [Fig.4] represents a first possibility of realizing a part of the modulation device of [Fig.3];

[0052] [Fig.5] represents a second possibility of realizing this part of the modulation device of [Fig.3];

[0053] [Fig.6] represents a third possibility of realizing this part of the modulation device of [Fig.3];

[0054] [Fig.7] represents a fourth possibility of realizing this part of the modulation device of [Fig.3];

[0055] [Fig.8] represents the main elements of an example of a reception system; and

[0056] [Fig.9] represents a possible embodiment for a demodulation device of the reception system of [Fig.8].

[0057] It should be noted that, in these figures, the structural and / or functional elements common to the different variants may have the same references.

[0058] [Fig.l] represents the main elements of a transmission system 2 according to the invention.

[0059] This transmission system 2 comprises a bit-to-symbol conversion unit 4, a modulation device 6 and a transmission unit 8.

[0060] The conversion unit 4 receives as input a binary stream B formed of bits representing the data to be transmitted and produces as output symbols Cm. Reference may be made, for example, to the article “Bit errorprobability ofm-ary quadrature amplitude modulation” by D. Yoon, K. Cho, and J. Lee in Vehicular Technology Conference Fall 2000, IEEE VTS Fall VTC2000. 52nd Vehicular Technology Conference (Cat. No.00CH37152), vol. 5, 2000, pp. 2422-2427 for an example of such a binary to symbol conversion.

[0061] The binary stream B is for example organized in bytes of bits (for example in bytes), but any form of representation of the data to be transmitted by the binary stream is feasible in practice.

[0062] The modulation of the symbols Cm during a time interval (sometimes called "symbol time") during which a predetermined number K of symbols is processed is described below. The same processing applies to successive time intervals in order to process the binary stream B. In the sequence, Co,.. .,CK i denotes the K symbols processed during a given time interval.

[0063] The conversion unit 4 is for example implemented in practice by means of a processor programmed (by means of instructions executable by this processor) to carry out the aforementioned bit-to-symbol conversion. Alternatively, the conversion unit 4 could be implemented by means of an application-specific integrated circuit.

[0064] The modulation device 6 receives as input the symbols Cm produced by the conversion unit 4, and is designed to produce a modulated signal, formed here of samples xn, as a function of the symbols Cm received.

[0065] Several examples of modulation devices in accordance with the invention are described below with reference to Figures 2 to 7.

[0066] The modulation device 6 can also add a cyclic prefix to the set of samples xn produced during each aforementioned time interval. This addition of a cyclic prefix will not be described here for the sake of simplification.

[0067] The modulation device 6 is implemented for example in practice by means of a processor (possibly identical to the aforementioned processor implementing the conversion unit 4) programmed (by means of instructions executable by the processor and stored for example on a memory associated with the processor) to implement the different functionalities of the modulation device 6. Alternatively, the modulation device 6 could be implemented by means of an application-specific integrated circuit. As a further variant, some of the modules of the modulation device (as described below with reference to FIGS. 2 to 7) could be implemented in the form of a dedicated integrated circuit (for example an application-specific integrated circuit or a programmable integrated circuit, for example of the FPGA type for "Field Programmable Gate Array"), while other modules would be implemented by means of one or more processor(s) programmed as described above.

[0068] The transmission unit 8 is designed to transmit, in a communication channel, a signal constructed on the basis of the samples xn of the modulated signal produced at the output of the modulation device 6. This signal is for example an electromagnetic wave conforming to the modulated signal.

[0069] To do this, the transmission unit 8 can comprise a digital-to-analog converter 5 (the modulated signal xn being digital here), an electronic circuit

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[0086] amplification circuit 7 (in English: "driving circuit") and an antenna (transmitting) 9. In this case, the digital-to-analog converter 5 converts the samples xn of the modulated (digital) signal into an analog signal, this analog signal being amplified (in power) by the electronic amplification circuit 7 and transmitted to the antenna 9 for transmission in the transmission channel. The modulation device 6, several examples of which are given below, is designed to carry out AFDM (for "Affine Frequency Division Multiplexing") type modulation, i.e. a modulation according to which the samples xn of the modulated signal are defined as follows on the basis of the symbols Cm: x n = E^JoC^exp [ ( qn 2 + anF + 2mn ) .f ] where q and a are the parameters of the AFDM modulation concerned. The modulation device 6 is therefore designed to carry out an AFDM modulation involving (when calculating a sample, noted here xn) a multiplication of each symbol Cm by exp J ( qn2 4. «ni2 + 2mn ) ] (then a sum of the products obtained by the multiplications respectively carried out for the K symbols). We note in the following: (p mn = exp [ ( qn 2 + «m 2 + 2mn ) .Ç so that we have: [Math.l] 1 „ Here we propose to focus on the discrete Fourier transform of the shaping filters (Pmji: K- 'I V^ = E, ri HAS u ,exp(-2jnf) either : v,.i= (qn2+ ] Using generalized Gaussian quadratic sums (see Theorem 1.1.2 in "Gauss and Jacobi Sums", by Bruce C. Berndt, Ronald J. Evans, and Kenneth S. Williams, John Wiley & Sons, 1998), we can rewrite the functions as follows: with : B^q = E^exp [ - jn(Kn 2 +2 ( m - k ) 11) / q ]

[0087] when qK 0 and [qK + 2(mk)] is even (which amounts to saying that q is non-zero and that: q is even or K is even).

[0088] By replacing the index n with an index r in the sum and noting eq = IKql / Kq (eq is therefore 1 if q is positive and -1 if q is negative since K is a positive integer), we can simplify the expression above:

[0089] ^exp(^ )exp[^(a-|) ]exp[^ (-k 2 + 2mk) ]

[0090] with:

[0091] D! F jn / 2 o / i \ \ 1 ^A^L^exp^-^(Àr 2 +2(m-^^

[0092] Noting for clarification:

[0093] exp j exp J ( a ' | ) ]

[0094] the discrete Fourier transform can be written:

[0095] = HAS w .exp [ g ( - k 2 + 2mk ) ] £ mJ( ^

[0096] By replacing the filters by their development using the discrete Fourier transforms ^mk in the formula [Math. 1] above, we obtain the following expression for the samples xn of the modulated signal:

[0097] -Y^cw

[0098] either by using the expression of ^mk above: [° 0 "] Xn = ( -k 2 + 2mk) ].exp(2j7T~j

[0100] Replacing BmJw with its expression and inverting the sums, we obtain: [01 ° 1] x„ = ^E^exp( exp[ - f ( Ær 2 -2kr) ].G À . r ex^2jjr^j

[0102] with: [ ° 103] = E^C w X^exp( - 2 / n^ ).exp(2 / K^)

[0104] These terms Gk r can therefore be seen as the discrete Fourier transform or the inverse discrete Fourier transform (depending on the sign of q), of size IqlK, of the expression: [01051 C,Aw.exp(-2j7r=)

[0106] The samples xn of the modulated signal can therefore be expressed as:

[0107] wr 1 r . eX PL

[0108] that is to say to be obtained from the symbols Cm:

[0109] - by preprocessing with application to each symbol of a phase shift of an angle depending on the square of the rank m of the symbol concerned (when multiplying by Am^), Then

[0110] - by applying a discrete Fourier transform to the symbols thus preprocessed or an inverse discrete Fourier transform (calculations of the G^r terms), and

[0111] - after processing and summation (at constant k) of the terms r (for r ranging from 0 to lql-1), by applying an inverse discrete Fourier transform.

[0112] [Fig.2] shows a first possible embodiment for the modulation device 6. This embodiment is based on the formula which has just been given for the calculation of the samples xn of the modulated signal.

[0113] The modulation device of [Fig.2] comprises a pre-processing unit 10, a processing unit 30 and an inverse transformation unit 50.

[0114] The pre-processing unit 10 comprises Iql pre-processing blocks 12 respectively associated with the Iql integer values ​​of r between 0 and (lql-1).

[0115] Each pre-processing block 12 (associated with a particular value of r) is designed to apply to each symbol Cm (symbol of rank m among the symbols Co, ..., C Ki), for m ranging from 0 to K-1:

[0116] - a multiplication by which includes a phase shift of an angle dependent on m2 (according to the formula for Am,q given above); and

[0117] - a multiplication by exp( - 2 / 71^ ) •

[0118] For each integer value of r between 0 and (lql-1), the pre-processing block 12 associated with this value therefore generates K output values: C0.A'0jq, ..., Cm.A'm>q .exp(-2jirmr / q), ..., CK-i.A'Ki,q.exp[-2jjr(Kl)r / q].

[0119] The processing unit 30 comprises 1ql processing blocks 32 and a summation block 34.

[0120] The Iql processing blocks 32 are respectively associated with the Iql integer values ​​of r between 0 and (lql-1).

[0121] Each processing block 32 comprises a transformation block 40 designed to perform an inverse discrete Fourier transform of size IqlK when q is positive, or a discrete Fourier transform of size IqlK when q is negative.

[0122] For each value of r between 0 and (lql-1), the processing block 32 associated with this value is designed to receive the K values ​​produced by the preprocessing block 12 associated with the same value of r, to apply these K values ​​as input to the first K inputs of the transformation block 40 so as to produce on the first K outputs of the transformation block 40 the K values ​​G0>r, ..., Gk>r, ..., GK-ijr (see above the definition of these values ​​Gk>r). These K values ​​G0>r, ..., Gk>r, ..., GK-i,r are hereinafter called "intermediate symbols".

[0123] It is noted that, for all the transformation blocks 40, zero values ​​are applied to the input of the last (Iql-l)K inputs and that the values ​​produced on the (Iql-l)K last outputs are unused, as schematically represented in [Fig.2],

[0124] We thus obtain Iql ordered sequences of intermediate symbols Gk>r (each sequence corresponding to a given index r and the index k giving the rank of the intermediate symbol Gk>r in the sequence concerned).

[0125] Each processing block 32 associated with a value r is furthermore designed to apply to each intermediate symbol Gk>r (of rank k) a multiplication by: [0i26] exp|- _ ]. exp(j.exp(2pT^)

[0127] (for k ranging from 0 to Kl) so as to obtain K intermediate phase-shifted symbols I k>r each having the expression:

[0128] Ikf _ = exp [ _ ]. ex p( -yn™ ).exp(2j7rÿ ).G V

[0129] Each processing block 32 (associated with a value r) thus makes it possible to obtain an ordered sequence (according to rank k) of (K) intermediate phase-shifted symbols Ikj.

[0130] The summing block 34 is then designed to sum the phase-shifted intermediate symbols Ik>r of the same rank k in the ordered sequences of phase-shifted intermediate symbols in order to obtain an ordered sequence of sums So, ..., Sk, SK-i.

[0131] In other words, a sum Sk (of rank k in the ordered sequence of sums) is obtained by summing all the intermediate phase-shifted symbols Ik>r of rank k (taken respectively in the sequences associated with the different values ​​of r for r integer ranging from 0 to lql-1):

[0132]

[0133] The inverse transformation unit 50 receives the sums Sk (in the order given by the index k) on K inputs respectively. The inverse transformation unit 50 is designed to apply an inverse discrete Fourier transformation to the values ​​Sk received at the input so as to produce the modulated signal samples xn on its outputs respectively. Indeed, according to the expression of these samples given above: [°134] Xn =

[0135] As shown in [Fig.2], it is possible in practice to use an inverse discrete Fourier transform of size N greater than the number K of symbols per symbol time. In this case, certain inputs (here NK inputs) of the inverse transform unit 50 will be set to zero. This makes it possible to adjust the sampling frequency and to obtain in this case a number N of output samples greater than the number K of input symbols.

[0136] Before presenting other embodiments of the modulation device 6, we note that the sum Bmk / 1 defined above is simplified when the ratio K / q is an even or odd integer.

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[0160] Indeed, when K / q is an even integer: - Bm>kq = 0 if (mk) mod q 0 (i.e. if (mk) is not a multiple of q), - Bm>kq = Iql if (mk) mod q = 0 (i.e. if (mk) is a multiple of q). We can therefore write Bm kq lql*l(mk)modq-o, with l(m_k) mod qo 1 if (mk) mod q = 0, and l(mk)modq=0 = 0 otherwise. When K / q is an odd integer: - Bm>k>q = Iql if 2(mk) / q is odd; - Bm>k>q = 0 otherwise. The discrete Fourier transform introduced above can be expressed as already indicated: / e q jn \ f jmn 2 / 1x1 1 fa / w mJ < = ex P (4r) ex P [ V ( « 4 ) W -Æ2 + 2mÆ)] or even: by introducing = ^exp ( ) exp[ ( a - £) ] By replacing as before the filters 0^ by their development using the discrete Fourier transforms in the formula [Math. 1] above, the expression of the samples xn of the modulated signal is as already seen: EÆ-1 -, 1 i / . „ \ m=0 U, z L fc0 ^ or, using the new expression of ^mk: x n = ( - 4 + 2mk) ] ]exp(2j7T^) or even: Xn “ k ^-aLosxp(“W) -exP[ j In brackets we recognize the discrete Fourier transform or the inverse discrete Fourier transform (depending on the sign of q), of size IqlK, of: C, BmJw The samples xn of the modulated signal can therefore be obtained from the symbols C • x-■-m • - by pre-processing with application to each symbol of a phase shift of an angle depending on the square of the rank m of the symbol concerned (during multiplication by A«^), then - by applying to the symbols thus preprocessed a discrete Fourier transform or an inverse discrete Fourier transform of size IqlK to obtain

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[0173] intermediate symbols, and - after phase shifting of the intermediate symbols, by applying an inverse discrete Fourier transform. In order to be generalized to the case where this last inverse discrete Fourier transform has a size N greater than the number K of symbols per symbol time, the above formula giving the expression of the samples xn of the modulated signal can be written: x n = ] ]exp(2>^) where Q=(NK) / 2 and = 1 when k is between Q and Q+Kl, and = 0 when k <q ou k>Q+K (in order to retain as input to the inverse Fourier transform only the values ​​actually produced by the previous steps, as explained below). [Fig.3] shows a second possible embodiment for the modulation device 6. This embodiment is based on the preceding developments and can therefore be used when K / q is an even integer. The modulation device of [Fig.3] comprises a production module 70 designed to produce an ordered sequence of finalized symbols Fo, ..., rK4 on the basis of the symbols Co, ..., CK-i. These finalized symbols are defined as follows: r i=2j^ ] Various possibilities for producing the production module 70 to obtain these finalized symbols are described below. The modulation device of [Fig.3] also comprises a phase shift module 72 designed to apply to each finalized symbol Fk (produced by the production module 70) a phase shift of an angle (here of value jirk2 / (Kq)) depending on the square of the rank k of the finalized symbol Fk concerned in the ordered sequence of finalized symbols. The phase shift module 72 thus generates as output an ordered sequence of transformed symbols Xo, ..., XK_i. The modulation device of [Fig.3] comprises a serial-parallel converter 74 designed to receive as input the ordered sequence of transformed symbols Xo, ..., X ki and to deliver in parallel as output the transformed symbols Xo, .•., Xk.l The modulation device of [Fig.3] finally comprises an inverse transformation unit 90 designed to receive respectively on K inputs the transformed symbols Xo, ..., XK1 and to produce at output the samples x0, ..., xN_i of modulated signal.

[0174] As indicated previously and visible in [Fig.3], it is proposed here to apply zero values ​​to the first Q inputs and to the last Q inputs of the inverse transformation unit 90.

[0175] The samples xn of modulated signal obtained are therefore worth: 101761 =

[0177] and we thus find the expression of xn given above.

[0178] Several possibilities for producing the assembly 80 comprising the production module 70, the phase shift module 72 and the series-parallel converter 74 are now described. As will become apparent from the following, the assembly 80 comprises in all cases:

[0179] - a preprocessing unit configured to apply to each symbol Cm a phase shift of an angle depending on the square of the rank m of the symbol Cm concerned in the ordered sequence of symbols (during multiplication by and / or to produce preprocessed symbols as output;

[0180] - a processing unit configured to apply to the preprocessed symbols at least a discrete Fourier transform or at least an inverse discrete Fourier transform and / or to output the transformed symbols Xk.

[0181] [Fig.4] represents a first possibility of realization of the set 80. This first possibility of realization can be used when K / q is an even integer (in which case the term Bm>k>q is written lql.l(mk)modq=0).

[0182] According to this first possibility, the assembly 80 comprises a pretreatment unit 110 and a treatment unit 130.

[0183] The preprocessing unit here comprises Iql preprocessing blocks 112, respectively associated with integers r between 0 and lql-1.

[0184] Each preprocessing block 112 receives as input the symbols Cm whose rank m is of the form m = Xlql+r, where r is the integer associated with the preprocessing block 112 concerned and X an integer (between 0 and K / lql-1). In other words, each preprocessing block 112 receives as input the symbols Cm of rank (i.e. here index) congruent to r modulo Iql. Each preprocessing block 112 therefore receives here K / lql symbols as input.

[0185] For each symbol Cm received as input, the preprocessing block 112 applies to this symbol Cm a phase shift of an angle depending on the square of the rank m of the symbol concerned, here by multiplying this symbol by Am>q.

[0186] For each symbol Cm received as input, the preprocessing block 112 therefore produces a corresponding preprocessed symbol equal here to Cm.Am>q (and this for all the values ​​of m congruent (modulo Iql) to the integer r associated with the preprocessing block concerned).

[0187] The processing unit 130 comprises Iql transformation blocks 140, respectively

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[0199] associated with integers r between 0 and lql-1. Each transformation block 140 is designed to perform an inverse discrete Fourier transform of size IqlK when q is positive, or a discrete Fourier transform of size IqlK when q is negative. Each transformation block 140 is designed to receive the (here K / lql) preprocessed symbols Cm.Am>q produced by the preprocessing block associated with the integer r with which the transformation block 140 concerned is associated. These (here K / lql) symbols are respectively applied to the inputs of the transformation block 140 which correspond to the rank m of the preprocessed symbol Cm.Am>q concerned, the other inputs being set to zero. Thus, considering a particular transformation block 140 and the value r associated with this transformation block 140, the transformation block 140 produces intermediate output values ​​of the form: mO d ] which corresponds to the definition of the finalized symbols Fk for k congruent to r modulo Iql. (In the possible embodiment described here, the finalized symbols are therefore equal to the intermediate symbols.) Thanks to the different transformation blocks 140 respectively associated with the integers r ranging from 0 to lql-1, we thus obtain the set of finalized symbols (for k between 0 and Kl). The processing unit 130 then comprises a parallel-serial converter 135 which receives the finalized symbols Tk (or intermediate symbols) produced by the different transformation blocks 140 on its different inputs (in the order given by the index of the finalized symbol Fk concerned) which makes it possible to generate at output a reordered sequence of finalized symbols Tk (or intermediate symbols). The processing unit 130 comprises the phase shift module 72 which applies (as already mentioned) to each finalized symbol Tk a phase shift of an angle depending on the square of the rank k of the finalized symbol Tk concerned in the ordered sequence of finalized symbols, and thus generates as output an ordered sequence of transformed symbols Xo, ..., XK-i. The processing unit 130 finally comprises the serial-parallel converter 74 which receives as input the ordered sequence of transformed symbols Xo, ..., XK-i and delivers in parallel as output the transformed symbols Xo, ..., XK-i. Before presenting other possibilities for producing the set 80, we now propose a writing of the samples xn of the modulated signal using the previous expression of the xn in matrix form: x = Or :

[0200] ...xNp

[0201] co = [Co 0.. .0 C|qi 0... CK-iqi 0 ... 0]T is a vector of size IqlK of which (in particular) the last (Iql-l)K elements are null and comprising the symbols Cm such that m is congruent to 0 modulo Iql (i.e. such that m is a multiple of Iql)

[0202] cr = [0 ... Cr 0.. .0 Cr+iqi 0... Cr+K_iqi 0 ... 0]T (for r integer included in 1 and Iql-1) is a vector of size IqlK of which (in particular) the (Iql-l)K last elements are null and including the symbols Cm such that m is congruent to r modulo Iql

[0203] Ar is a diagonal matrix of size IqlK x IqlK

[0204] Ao contains on its diagonal the elements A0>q; 0 ..0; A|qi>q; 0; ... 0; AK_|qi>q;0 ...; 0 and (Iql-l)K nuisance elements

[0205] Ar contains on its diagonal the elements 0;... Ar>q; 0;...0; Ar+iqi>q; 0; ... 0; Ar+K_|qi>q;0 ...; 0 and (Iql-l)K nuis elements

[0206] Ir is a diagonal matrix of size IqlK x IqlK whose only non-zero elements are worth 1 and are located (on the diagonal):

[0207] - to positions congruent to r+1 modulo Iql (i.e. to positions with indices r+1, r+l+lql, ..., r+l+(Kl)lql) when K / q is an even integer

[0208] - at positions congruent to (lql / 2+r+l) modulo Iql (i.e. at index positions r+l+lql / 2, r+l+lql+lql / 2, ..., r+l+(Kl)lql+lql / 2 mod IqlK) when K / q is an odd integer

[0209] T is a matrix of size K x IqlK formed by an identity matrix of size K on its first K columns and a zero matrix of size K x (Iql-l)K on its last K columns, in other words:

[0210] T = [IdK0Kx(iqi-i)K] where IdK is the identity matrix of size K and 0Kx(iqi-i)K is the zero matrix of size K x (Iql-l)K

[0211] is the inverse discrete Fourier transform matrix of size N

[0212] is the matrix of the discrete Fourier transform of size IqlK when q is negative and the inverse discrete Fourier transform matrix of size IqlK when q is positive.

[0213] Dc is the diagonal matrix of size K x K whose element of position k+1 (on the diagonal) is equal to exp[-jirk2 / (qK)]

[0214] O is the matrix of size N x K comprising the identity matrix of size K (IdK) on its lines Q+l to Q+K and null elements on its lines 1 to Q and Q+K+l to N, in other words:

[0215] O = [OkxqWkOkxq]1 where IdK is as already indicated the identity matrix of size K and 0 kxq is the zero matrix of size K x Q

[0216] We now introduce a matrix defined as follows:

[0217] j

[0218] where

[0219] (M)H is a conjugate transpose matrix, or Hermitian transpose matrix, of the matrix M.

[0220] In the case where K / q is an even integer, for example, Jr is therefore a matrix of size IqlK x IqlK whose elements in row u and column v are defined as follows:

[0221] Jr(u,v~) = 0 if (uv) mod K 0

[0222] Jr(u,v) = (l / lql).exp[2jirr(vu) / (qK)] if (uv) mod K = 0.

[0223] Whether K / q is an even integer or an odd integer, according to its definition given above, this matrix verifies: 102241 =

[0225] The matrix formulation of the samples xn of the modulated signal can then be written:

[0226] x = F»ODcTFJ^^'jrA^r

[0227] Figure 5 represents a second possibility of realization of the set 80, this second possibility of realization being based on the last expression of x.

[0228] According to this second possibility, the assembly 80 comprises a pre-treatment unit 210 and a treatment unit 230.

[0229] Here we describe the case where the ratio K / q is an even integer. This second possibility is however also applicable to the case where K / q is an odd integer as explained below.

[0230] The pre-processing unit here comprises Iql pre-processing blocks 212, respectively associated with integers r between 0 and lql-1.

[0231] Each preprocessing block 212 receives as input the symbols Cm whose rank m is of the form m = Xlql+r, where r is the integer associated with the preprocessing block 212 concerned and X an integer (between 0 and K / lql-1). In other words, each preprocessing block 212 receives as input the symbols Cm of rank (i.e. here index) congruent to r modulo Iql. Each preprocessing block 212 therefore receives here K / lql symbols as input.

[0232] For each symbol Cm received as input, the preprocessing block 212 applies to this symbol Cm a phase shift of an angle depending on the square of the rank m of the symbol concerned, here by multiplying this symbol by Am>q.

[0233] The preprocessing block 212 can then construct the vector AyCr (this vector comprising elements Cm.Am>q at the positions corresponding to the symbols Cm received at the input of the preprocessing block 212 concerned and elements numerated elsewhere).

[0234] The preprocessing block 212 then comprises a multiplication block 214 configured to multiply the vector A^ thus constructed by the matrix Jr defined above.

[0235] For any integer r between 0 and lql-1, we note for simplicity:

[0236] y=JAcr rr

[0237] Due to the structure of the vector AyCr and the structure of the matrix Jr, the vector Vr produced by the multiplication block 214 comprises K elements at index positions congruent to (r+1) modulo Iql (where r is the integer associated with the pre-processing block 212 concerned), the other (Iql-l).K elements being null.

[0238] We thus obtain, at the output of each pre-processing block 212, K pre-processed symbols associated respectively with the ranks r, r+lql,..., r+(Kl)lql.

[0239] Considering the Iql pre-processing blocks 212, the pre-processing unit 210 thus produces IqlK pre-processed symbols, of respective rank k between 0 and IqlK-1, with:

[0240] ô y Jk+A

[0241] where p(k) is the remainder of the Euclidean division of k by Iql and V(i) the element of the vector V in position i.

[0242] Note that the vectors JjACy include non-zero elements at different positions for each value of r, so that the vector sum visible in the expression for x given above does not give rise to sums of vector elements and that no sum of such elements is therefore expected on the solution of [Fig.5],

[0243] The processing unit 230 comprises a transformation block 240 configured to perform an inverse discrete Fourier transform of size IqlK when q is positive, or a discrete Fourier transform of size IqlK when q is negative.

[0244] The transformation block 240 is configured to receive as input the IqlK preprocessed symbols 5k produced by the preprocessing unit 210 and to produce, on its first K outputs, K intermediate symbols Fk (which here also correspond to the aforementioned finalized symbols). The last (Iql-l).K outputs of the transformation block 140 are unused as shown in [Fig.5].

[0245] The processing unit 230 then comprises a parallel-serial converter 235 which receives the intermediate symbols Tk (or finalized symbols) produced by the transformation block 240 on its different inputs (in the order given by the index of the finalized symbol Fk concerned) which makes it possible to generate at output a reordered sequence of intermediate symbols Fk (or finalized symbols).

[0246] The processing unit 230 comprises the phase shift module 72 which applies (as already mentioned) to each intermediate symbol Fk a phase shift of an angle depending on the square of the rank k of the intermediate symbol Fk concerned in the ordered sequence of intermediate symbols, and thus generates as output an ordered sequence of transformed symbols Xo, ..., XK-i.

[0247] The processing unit 230 finally comprises the serial-parallel converter 74 which receives as input the ordered sequence of transformed symbols Xo, ..., XK-i and delivers as

[0248]

[0249]

[0250]

[0251]

[0252]

[0253]

[0254]

[0255]

[0256]

[0257]

[0258]

[0259]

[0260]

[0261]

[0262]

[0263]

[0264] parallel output the transformed symbols Xo, In the case (not shown) where K / q is an odd number, each preprocessing block associated with an integer r receives as input the symbols Cm whose rank m is of the form m = Xlql+[r+lql / 2 mod Iql], where X is here also an integer (between 0 and K / Iql-D. As indicated above, for each symbol Cm received as input, the preprocessing block applies to this symbol Cm a phase shift of an angle depending on the square of the rank m of the symbol concerned, here by multiplying this symbol by Am>q. The preprocessing block can then construct the vector ArCr (this vector comprising elements Cm.Am>q at the positions corresponding to the symbols Cm received at the input of the preprocessing block 212 concerned and elements numerated elsewhere). The multiplication block is in this case also configured to multiply the vector A,cr thus constructed by the matrix Jr defined above. For any integer r between 0 and Iql-1, we note for simplicity: y = JA cr rr Due to the structure of the vector A^ and the structure of the matrix Jr, the vector Fr produced by the multiplication block comprises K elements, here at positions congruent to (r+ l+lql / 2) modulo Iql (where r is the integer associated with the pre-processing block 212 concerned), the other (Iql-l).K elements being null. We thus obtain, at the output of each pre-processing block, K pre-processed symbols associated respectively with the ranks r+lql / 2, r+lql+lql / 2,..., r+(Kl)lql+lql / 2 mod Klql. The operation of the processing unit 230 in the case where K / q is an odd integer is analogous to that described above (case where K / q is an even integer). In order to consider another possibility of constructing the set 80, we are interested in the vector Sr defined as follows: gr = ^MKJArCr = F$Kyr and we therefore have: x = FHNODcTÏ:"jgr The element Sr,k in index position k+1 in the vector gr (in other words: gr,k=g + 0) is written by definition: either by keeping only the non-zero elements in Vr in the cases already mentioned where the ratio K / q is even: gt.k = ( r + + 1 ).exp(2>^^)

[0265]

[0266] where we recognize a discrete Fonder transform or an inverse discrete Fourier transform (depending on the sign of q) of size K applied to the non-zero elements of Vr. We also recall that, as indicated above, eq is equal to 1 if q is positive and -1 if q is negative.

[0267] In the following, we note î'r the vector of dimension K which contains the K non-zero elements of the vector 7r, i.e., for any integer p between 0 and (Kl):

[0268] y^p + 1) - y£ | q | p + r + 1)

[0269] We can then rewrite the matrix expression of the modulated signal samples xn as follows:

[0270]

[0271] x=F^OD^DrF^fr where is the discrete Fourier transform matrix of size K when q is negative and the inverse discrete Fourier transform matrix of size K when q is positive, and Dr is the diagonal matrix of size K x K which contains the element exp^ / Æ-^j on its diagonal at index position (k+1).

[0272] [Fig.6] represents a third possibility of realizing the set 80, based on this last expression of the samples xn of the modulated signal, that is to say described here in a case where the ratio K / q is an even integer.

[0273] According to this third possibility, the assembly 80 comprises a pre-treatment unit 310 and a treatment unit 330.

[0274] The preprocessing unit 310 here comprises Iql preprocessing blocks 312, respectively associated with integers r between 0 and lql-1.

[0275] Each preprocessing block 312 receives as input the symbols Cm whose rank m is of the form m = Xlql+r, where r is the integer associated with the preprocessing block 312 concerned and X an integer (between 0 and K / lql-1). In other words, each preprocessing block 312 receives as input the symbols Cm of rank (i.e. here index) congruent to r modulo Iql. Each preprocessing block 312 therefore receives here K / lql symbols as input.

[0276] For each symbol Cm received as input, the preprocessing block 212 applies to this symbol Cm a phase shift of an angle depending on the square of the rank m of the symbol concerned, here by multiplying this symbol by Am>q.

[0277] The preprocessing block 312 can then construct the vector A^ (this vector comprising elements Cm.Am>q at the positions corresponding to the symbols Cm received at the input of the preprocessing block 312 concerned and elements numerated elsewhere).

[0278] The preprocessing block 312 then comprises a multiplication block 314 configured to multiply the vector A^ thus constructed by the matrix Jr defined above of way to obtain the vector ïr already mentioned.

[0279] As in the case of [Fig.5], the vector produced by the multiplication block 314 comprises K elements at index positions congruent to (r+1) modulo Iql (where r is the integer associated with the pre-processing block 212 concerned), the others (Iql-l).K elements being harmed.

[0280] The pre-processing block 312 extracts these K elements so as to produce as output the elements of the vector defined above (the (Iql-l).K systematically used elements of the vector ïr being unused as schematically represented in [Fig.6]).

[0281] We thus obtain, at the output of each pre-processing block 312, K pre-processed symbols which correspond respectively to the elements of the vector Vr.

[0282] The processing unit 330 comprises Iql processing modules 332, which are here also respectively associated with the integers r between 0 and Iql-1.

[0283] Each processing module 332 associated with an integer r receives as input the vector produced by the pre-processing block 312 associated with this same integer r.

[0284] Each processing module 332 includes a transformation block 340 configured to perform an inverse discrete Fourier transform of size K when q is positive, or a discrete Fourier transform of size K when q is negative.

[0285] Each processing module 332 applies as input to its transformation block 340 the vector ?r received as input from the processing module 332 concerned.

[0286] Each transformation block 340 thus produces at output K intermediate symbols Lr>o, ..., Lr>k, ..., L| K । (according to a sequence ordered by the second index k of the symbols), where r is the integer associated with the processing module 332 containing the transformation block 340 concerned.

[0287] In other words, we have: = [Lr0 ... Lr>K_i]T.

[0288] Each processing module 332 also comprises a multiplication block 350 configured to receive the vector [Lr 0 ... L| K । ] ' of intermediate symbols and to multiply this vector by the matrix Dr defined above.

[0289] Each intermediate symbol Lr>k is therefore multiplied by exp[2jirkr / (qK)]. Each multiplication block 350 thus makes it possible to apply a phase shift to each intermediate symbol Lrk (phase shift which here depends in particular on the rank k of the intermediate symbol Lr>k concerned in the ordered sequence of intermediate symbols) so as to obtain a phase-shifted intermediate symbol L'r>k.

[0290] Each multiplication block 350 therefore produces at output K phase-shifted intermediate symbols L'r>k and applies these K phase-shifted intermediate symbols L'r>k to the input of a parallel-serial converter 360 so as to produce at the output of the processing module 332 concerned (associated with the integer r) an ordered sequence of phase-shifted intermediate symbols L'r>0, ..., L'r>k, ..., L'r>Ki.

[0291] As schematically represented in [Fig.6], the processing unit 330 is configured to sum the phase-shifted intermediate symbols L'r>k of the same rank k in the ordered sequences of phase-shifted intermediate symbols respectively produced by the different processing modules 332 (i.e. for the different values ​​of r), which makes it possible to obtain an ordered sequence of sums.

[0292] These sums correspond respectively to the finalized symbols Fk introduced above in the context of [Fig.3]. Indeed, we have for all k between 0 and K-1:

[0293] _yM-l k 0

[0294] The processing unit 330 comprises the phase shift module 72 which applies (as already mentioned) to each finalized symbol (or sum) Fk a phase shift of an angle depending on the square of the rank k of the finalized symbol (or sum) Fk concerned in the ordered sequence of finalized symbols (i.e. in the ordered sequence of sums), and thus generates as output an ordered sequence of transformed symbols Xo, ..., XK_i.

[0295] The processing unit 330 finally comprises the serial-parallel converter 74 which receives as input the ordered sequence of transformed symbols Xo, ..., XK.i and delivers in parallel as output the transformed symbols Xo, ..., XK4.

[0296] In order to propose another possibility of realization, we note that we can write:

[0297] 4

[0298] where: 102991 = ....

[0300] is the vector of size Iql whose elements are all equal to 1

[0301] ® is the product of Kronecker

[0302] Dj is the diagonal matrix of size IqlK x IqlK which contains on its diagonal the following vector:

[0303] V, = [VJ(> ....

[0304] each vector yj^ is of size K and contains the following K elements for m integer ranging from 0 to K-1 when K / q is an even integer:y _ JLex^ _ mod

[0305] and the following K elements for m integer ranging from 0 to K-1 when K / q is an odd integer:

[0306] y = 1 + kl jm()d ।^ । j

[0307] where m mod is the remainder of the integer division of m by Iql.

[0308] The expression for the samples xn of modulated signal then becomes:

[0309] [Math.2] x = F^ODcTF^DjAc

[0310] [Fig.7] represents a fourth possibility of realizing the set 80, based on this last expression of the samples xn of the modulated signal.

[0311] According to this fourth possibility, the assembly 80 comprises a pre-treatment unit 410 and a treatment unit 430.

[0312] The preprocessing unit 410 receives as input the K symbols Cm and multiplies each symbol Cm by the value Am>q defined above, this multiplication thus involving in particular a phase shift by an angle depending on the square of the rank m of the symbol Cm concerned. The different products Cm.Am>q thus obtained are called phase-shifted symbols. These products form an ordered sequence of phase-shifted symbols Co.Ao>q, ..., C K-I'Aki^.

[0313] The preprocessing unit 410 is configured to copy Iql times the sequence (ordered) of K phase-shifted symbols Co.Ao>q, ..., Cm.Am>q, ..., CK-i.AK-i,q to construct the vector A-, mentioned above.

[0314] The preprocessing unit 410 comprises a multiplication block 420 configured to multiply the vector Ac by the matrix Dj defined above, which makes it possible to obtain at output a vector whose elements are the IqlK preprocessed symbols Ôk defined above.

[0315] Indeed:

[0316] „ . J 4 _r= x K l7

[0317] Each preprocessed symbol Ôk is thus obtained on the basis of a particular phase-shifted symbol (Ck mod k- Ak mod K,q) by multiplication by the value Vj>r>m defined above (where r and m are such that rK+m=k), that is to say in particular by phase shifting by an angle depending on the rank k of the preprocessed symbol (¾ (via the values ​​r and m in the expression of Vj>r>m).

[0318] The processing unit 430 here processes preprocessed symbols ôk identical to those used in the context of the second possibility of realizing the assembly 80 presented above; the processing unit 430 can thus be of the same type as the processing unit 230 described above with reference to [Fig.5].

[0319] The processing unit 430 may therefore comprise a transformation block 440 configured to perform an inverse discrete Fourier transform of size IqlK when q is positive, or a discrete Fourier transform of size IqlK when q is negative.

[0320] The transformation block 440 is configured to receive as input the IqlK preprocessed symbols 5k produced by the preprocessing unit 410 and to produce, on its first K outputs, K intermediate symbols Fk (which here also correspond to the aforementioned finalized symbols). The (Iql-l).K last outputs of the trans- formation 140 are unused as shown in [Fig.7].

[0321] The processing unit 430 then comprises a parallel-serial converter 435 which receives the intermediate symbols Fk (or finalized symbols) produced by the transformation block 440 on its different inputs (in the order given by the index of the finalized symbol Fk concerned) which makes it possible to generate at output an ordered sequence of intermediate symbols Fk (or finalized symbols).

[0322] The processing unit 430 comprises the phase shift module 72 which applies (as already mentioned) to each intermediate symbol Fk a phase shift of an angle depending on the square of the rank k of the intermediate symbol Fk concerned in the ordered sequence of intermediate symbols, and thus generates as output an ordered sequence of transformed symbols Xo, ..., XK_i.

[0323] The processing unit 430 finally comprises the serial-parallel converter 74 which receives as input the ordered sequence of transformed symbols Xo, ..., XK.i and delivers in parallel as output the transformed symbols Xo, ..., XK-i.

[0324] [Fig.8] represents the main elements of an example of a reception system 20.

[0325] This reception system 20 comprises a reception unit 22, a demodulation device 24 and a symbol-to-bit conversion unit 26.

[0326] The reception unit 22 comprises for example a (reception) antenna 21, an amplifier 23 capable of amplifying the electromagnetic signals received by the antenna 21 (at least in one frequency band) and an analog-digital converter 25 capable of converting the received and amplified signals into yn samples.

[0327] Over a given time interval (or "symbol time"), the samples yn form a modulated signal which corresponds to the signal emitted by a transmission system of the type described above with reference to [Fig.l] and transmitted in the communication channel to the reception unit 22 which receives this modulated signal (precisely here to the antenna 21).

[0328] The demodulation device 24 receives the modulated signal yn as input and produces as output, as a function of this modulated signal yn, a plurality of estimated symbols Zm (which must normally correspond to the symbols Cm modulated by the transmission system 2).

[0329] An example of a demodulation device according to the invention is described below with reference to [Fig.9].

[0330] In the case where a cyclic prefix has been added during modulation on transmission, the demodulation device 24 can remove this cyclic prefix before carrying out the demodulation as described below with reference to [Fig.9].

[0331] The demodulation device 24 is implemented for example in practice by means of a programmed processor (by means of instructions executable by the processor and me memory for example on a memory associated with the processor) to implement the different functionalities of the demodulation device 24. Alternatively, the demodulation device 24 could be produced by means of an application-specific integrated circuit. As a further variant, some of the units of the demodulation device (as described below with reference to [Fig.9]) could be produced in the form of a dedicated integrated circuit (for example an application-specific integrated circuit or a programmable integrated circuit, for example of the FPGA type for "Field Programmable Gate Array" while other modules would be produced by means of one or more processor(s) programmed as described above.

[0332] The conversion unit 26 converts the estimated symbols Zm into a binary stream B' formed of bit bytes (for example bytes). The conversion unit 26 performs the inverse conversion of the conversion performed by the conversion unit 4 of the transmission system 2 described above. When operating under good transmission conditions, the binary stream B' is therefore identical to the binary stream B received at the input of the transmission system 2.

[0333] The conversion unit 26 is for example implemented in practice by means of a processor (possibly identical to the aforementioned processor implementing the demodulation device 24) programmed (by means of instructions executable by this processor) to carry out the aforementioned conversion of symbols to bits. Alternatively, the conversion unit 26 could be implemented by means of an application-specific integrated circuit.

[0334] [Fig.9] represents a possible embodiment for the demodulation device 24.

[0335] According to this embodiment, the operation of the demodulation device is based on a processing which is generally the opposite of that carried out within the framework of the fourth possible embodiment represented in [Fig.7] and based on the expression [Math. 2] given above.

[0336] Indeed, if we denote VF the vector produced at the output of the transformation block 440, that is to say defined by: [03371 W = f^DjAc

[0338] and wi the elements of this vector W (for i integer between 0 and IqlK-l), we note that these elements wi respect the following property when the ratio K / q is an even integer:

[0339] Wk+pK = W / (£x^2j7T^ )

[0340] and the following property when the ratio K / q is an odd integer:

[0341] Wk+pK = w ,.exp( ).(-1 /

[0342]

[0343]

[0344]

[0345]

[0346]

[0347]

[0348]

[0349]

[0350]

[0351]

[0352]

[0353]

[0354]

[0355]

[0356]

[0357]

[0358]

[0359]

[0360]

[0361] for any integer k between 0 and (Kl) and for any integer p between 0 and (Iql-D. Thus, the process performed by the elements of [Fig.7] can be reversed by reconstructing the elements of the vector W which have an index i between K and (IqlK-1) based on the elements wi which have an index i between 0 and (Kl). The demodulation of the modulated signal samples yn can therefore be carried out according to the following scheme: Z = Or : y is the vector of samples: [y0 ... yN i]T Z is the vector of estimated symbols: [Zo ... ZK4]T FN is the discrete Fourier transform matrix of size N Ô is the matrix of size K x N comprising the identity matrix of size K (IdK) on its columns Q+l to Q+K and nuisance elements on its columns 1 to Q and Q+K+l to N, in other words: Ô = |0KxQldKOKxQ| where IdK is as already indicated the identity matrix of size K and 0K xQ is the zero matrix of size K x Q the matrix MH is the conjugate transpose matrix of the matrix M Rid is the matrix Uyfê)IdK (i.e. the vertical concatenation of Iql identity matrices) Dr is the diagonal matrix of size IqlK x IqlK whose element in position k+pK+1 (i.e. in row k+pK+1 and in column k+pK+1) is valid for any integer k between 0 and (Kl) and for any integer p between 0 and (Iql-1): ex p(2>v) when the ratio K / q is an even integer exp^2j7i— ) (-1)P when 'c raPort K / q is an odd integer A' is the diagonal matrix of size K x K whose diagonal elements are Am>q for m integer varying from 0 to Kl. The demodulation device of [Fig.9] comprises a transformation unit 510, a processing unit 530 and a post-processing unit 550. The transformation unit 510 comprises a transformation block 512 and a parallel-to-serial converter 514. The transformation unit 510 receives as input the samples y0, ..., yN i and applies these samples y0, ..., yN i as input to the transformation block 512. The transformation block 512 is configured to produce transformed samples Yo, ..., Yk.i by applying a discrete Fourier transform to the samples y0, ..., yN_i.

[0362] When the number N of samples yn is strictly greater than the number K of transformed samples Yk, the values ​​produced on the first Q outputs and last Q outputs of the transformation block 512 are not used, as schematically represented in [Fig.9]. We recall that Q = (N - K) / 2.

[0363] In the expression of the vector Z given above, the transformation block 512 therefore performs the operations which correspond to the multiplication by ÔFN-

[0364] The transformed samples Yo, ..., YK.i produced at the output of the transformation block 512 are applied to the input of the parallel-serial converter 514 which therefore produces at the output an ordered sequence of transformed samples Yo, ..., YK.i (according to the order given by the index k relating to each transformed sample Yk).

[0365] This ordered sequence of transformed samples Yo, ..., YK.i here forms the output of the transformation unit 510.

[0366] The processing unit 530 comprises a phase shift block 532, a serial-to-parallel converter 534, a multiplication block 536 and a transformation block 540.

[0367] The processing unit 530 receives as input the ordered sequence of transformed samples Yo, ..., YK-i and applies this sequence to the phase shift block 532 so as to apply to each transformed sample Yk a phase shift of an angle depending on the square of the rank k of the transformed sample in the sequence of transformed samples.

[0368] In practice, the phase shift block multiplies each transformed sample Yk by the value exp[jk2 / (qK)]. The processing carried out by the phase shift block 532 thus corresponds to the multiplication by in the expression of the vector Z given above.

[0369] The phase shift block 532 therefore produces an ordered sequence of phase-shifted transformed samples, which is applied to the input of the serial-parallel converter 534.

[0370] The serial-parallel converter 534 therefore produces the phase-shifted transformed samples in parallel at the output, which corresponds to the vector:

[0371] [Yo ... Yk. exp[jk2 / (qK)] YK1. exp[j(Kl)2 / (qK)]r, which is:

[0372] D?ÔFNy

[0373] The processing unit 530 is designed to copy this vector Iql times so as to obtain a vector of dimension IqlK which is a vertical concatenation of Iql copies of the vector [Yo ... Yk. exp[jk2 / (qK)] YK4. exp[j(Kl)2 / (qK)]]T. This construction of the vector of dimension IqlK (here by the processing unit 530) corresponds to the multiplication by the matrix in the expression of the vector Z given above.

[0374] The processing unit 530 is configured to apply as input to the multiplication block 536 the vector of dimension IqlK thus constructed on the basis of the phase-shifted transformed samples.

[0375] The multiplication block 536 is configured to multiply this dimension vector IqlK received as input by the DR matrix defined above, which makes it possible to apply a particular phase shift to each element of the vector of dimension IqlK and thus to produce (at the output of the multiplication block) IqlK intermediate values ​​(each obtained by phase shifting a phase-shifted transformed sample).

[0376] The processing unit 530 is thus configured to produce, for each phase-shifted transformed sample, a plurality of intermediate values ​​(here precisely Iql intermediate values) by respective phase shifts (during multiplication by DR at the level of the multiplication block 536).

[0377] The processing unit 530 applies the IqlK intermediate values ​​(produced at the output of the multiplication block 536) to the input of the transformation block 540.

[0378] The transformation block 540 is configured to perform a discrete Fourier transform of size IqlK when q is positive, or an inverse discrete Fourier transform of size IqlK when q is negative.

[0379] The transformation block 540 thus produces K intermediate symbols on its first K outputs, the last K(lql-l) outputs being unused as shown in [Fig.9]. These intermediate symbols form an ordered sequence according to the output of the transformation block on which the intermediate symbol is produced.

[0380] The K intermediate symbols are here generated at the output of the processing unit 530 and applied at the input of the post-processing unit 550.

[0381] The post-processing unit 550 is then configured to apply to each intermediate symbol a phase shift of an angle depending on the square of the rank of the intermediate symbol concerned in the ordered sequence of intermediate symbols, here by multiplying each intermediate symbol by the corresponding diagonal element of the WH matrix, that is to say by: = ^|exp( )exp[ - ( a -1 ) ] •

[0382] The post-processing unit 550 thus produces as output the estimated symbols Zm, each estimated symbol Zm resulting from the phase shift (within the post-processing unit 550) of an intermediate symbol.< / q>

Claims

Claims

1. Device for modulating an ordered sequence of symbols (Cm) into samples (xn) of modulated signal, comprising: - a preprocessing unit (10; 110; 210; 310; 410) configured to apply to each symbol (Cm) a phase shift of an angle depending on the square of the rank (m) of the symbol concerned in the ordered sequence of symbols, and to produce preprocessed symbols as output; - a processing unit (30; 130; 230; 330; 430) configured to apply to the preprocessed symbols at least one discrete Fourier transform or at least one inverse discrete Fourier transform, and to produce transformed symbols (Sk; Xk) as output; - an inverse transformation unit (50; 90) configured to produce the samples (xn) as a function of the transformed symbols (Sk; Xk) by applying an inverse discrete Fourier transform.

2. Modulation device according to claim 1, in which the processing unit (230; 430) is configured to produce an ordered sequence of intermediate symbols (Fo, rK.i) by discrete Fourier transformation of the preprocessed symbols and to apply to each intermediate symbol a phase shift of an angle depending on the square of the rank of the intermediate symbol concerned in the ordered sequence of intermediate symbols.

3. A modulation device according to claim 2, wherein the preprocessing unit (410) is configured to produce the preprocessed symbols by respective phase shifts of the phase-shifted symbols.

4. A modulation device according to claim 1, wherein the processing unit (30; 130; 330) is configured to produce a plurality of ordered sequences of intermediate symbols by means of a respective plurality of discrete Fourier transforms of preprocessed symbols.

5. Modulation device according to claim 4, in which the processing unit (30; 330) is configured to apply a respective phase shift to each of the intermediate symbols to obtain ordered sequences of phase-shifted intermediate symbols (Ikj; L'r>0, L'r>Ki), and to sum together the phase-shifted intermediate symbols of the same rank in the ordered sequences of phase-shifted intermediate symbols in order to obtain an ordered sequence of sums (Sk; Fk).

6. A modulation device according to claim 5, wherein the unit of processing (330) is configured to apply to each sum (Fk) a phase shift of an angle depending on the square of the rank of the sum concerned in the ordered sequence of sums.

7. Modulation device according to claim 4, in which the processing unit (130) is configured to reorder a part of the intermediate symbols into a reordered sequence of intermediate symbols (Fk) and to apply, to each intermediate symbol (Fk) of the reordered sequence of intermediate symbols, a phase shift of an angle depending on the square of the rank of the intermediate symbol concerned in the reordered sequence of intermediate symbols.

8. Transmission system comprising a modulation device (6) according to one of claims 1 to 7 and a transmission unit (8), in a communication channel, of a signal constructed on the basis of the modulated signal samples.

9. Method for modulating an ordered sequence of symbols (Cm) into samples (xn) of modulated signal, comprising the following steps: - applying, to each symbol (Cm), a phase shift of an angle depending on the square of the rank (m) of the symbol concerned in the ordered sequence of symbols; - producing pre-processed symbols as a function of the symbols thus phase-shifted; - producing transformed symbols (Sk; Xk) using at least one discrete Fourier transform or at least one inverse discrete Fourier transform applied to the pre-processed symbols; - producing the samples (xn) as a function of the transformed symbols (Sk; Xk) by applying an inverse discrete Fourier transform.

10. Device for demodulating a signal formed of samples (yn), comprising: - a transformation unit (510) configured to produce transformed samples (Yk) by applying a discrete Fourier transformation to the samples (yn); - a processing unit (530) configured to produce an ordered sequence of intermediate symbols on the basis of the transformed samples using an inverse discrete Fourier transformation or a discrete Fourier transformation; - a post-processing unit (550) configured to apply to each intermediate symbol a phase shift by an angle depending on the square of the rank of the intermediate symbol concerned in the ordered sequence of intermediate symbols.

11. A demodulation device according to claim 10, wherein the transformation unit (510) is configured to produce an ordered sequence of transformed samples (Yk) by applying the discrete Fourier transformation to the samples (yn) and wherein the processing unit (530) is configured to apply, to each transformed sample (Yk) of the sequence of transformed samples, a phase shift by an angle depending on the square of the rank of the transformed sample in the sequence of transformed samples so as to produce phase-shifted transformed samples.

12. Demodulation device according to claim 11, wherein the processing unit (530) is configured to produce, for each phase-shifted transformed sample, a plurality of intermediate values ​​by respective phase shifts, and to apply the inverse discrete Fourier transform or the discrete Fourier transform to the set of intermediate values ​​produced.

13. Demodulation device according to one of claims 10 to 12, in which the ordered sequence of intermediate symbols is formed from a number of intermediate symbols strictly less than the number of intermediate values ​​to which the inverse discrete Fourier transform or the discrete Fourier transform is applied.

14. Reception system comprising a reception unit (22) for receiving a signal in a communication channel and a demodulation device (24) according to one of claims 10 to 13 configured to receive the received signal as input.

15. Method for demodulating a signal formed from samples (yn), comprising the following steps: - producing transformed samples (Yk) by applying a discrete Fourier transform to the samples (yn); - producing an ordered sequence of intermediate symbols on the basis of the transformed samples (Yk) using an inverse discrete Fourier transform or a discrete Fourier transform; - applying, to each intermediate symbol, a phase shift by an angle depending on the square of the rank of the intermediate symbol concerned in the ordered sequence of intermediate symbols.

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