Estimating the initial state of a resistive element
The method of multiple resistance measurements and comparisons in resistive non-volatile memories addresses fluctuations by estimating and reprogramming resistive elements, ensuring accurate initial state determination and stabilization.
Patent Information
- Application Number
- FR2023012291
- Authority / Receiving Office
- FR · FR
- Patent Type
- Patents
- Current Assignee / Owner
- Filing Date
- 2023-11-10
- Publication Date
- 2026-01-02
- Estimated Expiration
- 2043-11-10
AI Technical Summary
Resistive non-volatile memories face fluctuations in resistance states due to relaxation effects, making it difficult to accurately determine the initial programming state of resistive elements.
A method involving multiple resistance measurements and comparisons to estimate the initial state of resistive elements, including applying predefined current or voltage at different times, and using a comparison circuit to determine if resistance increases or decreases, with the option to reprogram the elements based on the estimation.
Accurately identifies the initial resistance state of resistive elements, allowing for precise programming and reducing fluctuations by reprogramming if necessary, thus stabilizing the resistance values.
Smart Images
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Abstract
Description
Title of the invention: Estimation of the initial state of a resistive element (P) technical field
[0001] The present description relates generally to resistive non-volatile memories, and in particular to the estimation of the resistance states in which each resistive element of the memory was initially programmed. Previous technique
[0002] Resistive volatile memories comprise a plurality of resistive elements. Each resistive element is initially programmed to a high resistance state (HRS) or to a low resistance state (LRS).
[0003] However, once programmed, a resistive element undergoes relaxation effects, resulting in fluctuations in the resistance to which it was initially programmed. Thus, an element programmed towards a high resistance state may see its resistance decrease and become a low resistance state, and vice versa for an element programmed towards a low resistance state.
[0004] Although the relaxation effects stabilize after a certain time, fluctuations in resistance still occur.
[0005] There is a need to estimate the state in which a resistive element of a resistive non-volatile memory was initially programmed. Summary of the invention
[0006] One embodiment provides a method for estimating the resistive state in which a cell of a non-volatile resistive memory is programmed, the method comprising: a) a first measurement, by a measurement circuit connected to the memory cell, of a first value representative of the resistance of the cell; b) at least one second measurement, by the measurement circuit, of at least one second representative value of the resistance of the same memory cell; (c) the comparison, by a comparison circuit, of the first and at least one second representative values of the resistance; and d) on the basis of the comparison, the estimation of the resistive state of the cell, the estimation being either an estimate of a high resistance state if at least one second representative value shows an increase compared to the first representative value of the resistance, or an estimate of a low resistance state if at least one second representative value shows a decrease compared to the first representative value.
[0007] According to one embodiment, the above process further comprises: - before the execution of step a), a first application, at a first instant, of a predefined intensity current or a predefined voltage to the resistive memory cell, the first measurement being carried out on the basis of the first application; and - following the execution of step a) and before the execution of step b), at least a second application, at at least a second instant, subsequent to the first instant, of the predefined current or voltage to the resistive element, the at least a second measurement being carried out on the basis of the at least a second application.
[0008] According to one embodiment, the above process further comprises, following the estimation of the state: - reprogramming the cell towards the estimated state.
[0009] According to one embodiment, the above process further comprises, following the estimation of the state: - the storage in a memory, in association with the cell, of a value indicating the estimated state.
[0010] According to one embodiment, the above process further comprises, following the measurement of the first representative value: - the comparison of the first representative value with a reference interval; and - if the first representative value is outside the reference interval, the process is restarted in a new implementation of step a).
[0011] According to one embodiment, the above process further comprises, before the comparison: - the conversion, by a converter, of the first and at least one second representative values into a first and at least one second numerical values; - the storage, in association with the cell, of the first and at least one second numerical values in a memory.
[0012] According to one embodiment, the memory is a shift register.
[0013] According to one embodiment, the comparison is carried out on the basis of the values of voltage stored by a first and at least a second capacitor configured to store respectively the first and at least a second representative values.
[0014] According to one embodiment, the estimated state is a high-resistance state if, during the comparison, it is determined that the first representative value is less than one of at least one second representative value, and in which the estimated state is a low-resistance state if, during the comparison, it is determined that the the first representative value is greater than one of at least one second representative value.
[0015] According to one embodiment, the estimated state is a high resistance state if, during the comparison, it is determined that the first representative value is less than the average of at least one second representative value.
[0016] According to one embodiment, the at least one second representative value comprises a first second value and a second second value, the second second value being measured at a time later than the second time, and in which the estimated state is a high resistance state if, during the comparison, it is determined that the average of the differences between the first second and the second second representative values and between the first second and the first representative values is positive and in which the estimated state is a low resistance state if, during the comparison, it is determined that the average of the differences between the first second and the second second representative values and between the first second and the first representative values is negative.
[0017] According to one embodiment, the second instant is separated from the first instant by a duration of at least 3 seconds, and for example by at least one minute.
[0018] According to one embodiment, the first and at least one second representative resistance values are voltage or current values representative of the cell resistance.
[0019] One embodiment provides for a circuit comprising a non-volatile resistive memory comprising a cell, programmed to one state among a plurality of states, the circuit further comprising: ; - a measurement circuit configured to measure a first representative value of the cell resistance and at least a second representative value; - a comparison circuit configured to compare the first representative value with at least one second representative value to estimate the state of the cell, the estimation being an estimate of a high resistance state if at least one second representative value shows an increase in resistance compared to the first representative value or a low resistance state if at least one second representative value shows a decrease compared to the first representative value.
[0020] According to one embodiment, the above circuit further comprises a current source configured to apply a predefined current intensity, or a voltage source configured to apply a predefined voltage, to the cell at a first instant and then at at least a second instant, subsequent to the first instant, the measurement of the first representative value being carried out on the basis of the application at the first instant and the measurement of at least a second representative value being carried out on the basis of the application to at least the second instant.
[0021] According to one embodiment, the non-volatile memory is a filamentary type memory, for example a resistive random access memory (in English, "Resistive Random Access Memory" - RRAM).
[0022] According to one embodiment, the non-volatile memory is a phase-change memory, or an oxide-based resistive memory, or a programmable metallization cell. Brief description of the drawings
[0023] These features and advantages, as well as others, will be described in detail in the following description of particular embodiments, given by way of non-limiting example, in relation to the accompanying figures, among which:
[0024] [Fig.1] is a graph illustrating the fluctuations in the resistance of resistive elements programmed in high resistance states or in low resistance states;
[0025] [Fig.2A] is a graph illustrating the fluctuations in the resistance of resistive elements around a threshold interval;
[0026] Fig. 2B illustrates the variations in resistance around the threshold interval;
[0027] [Fig.3] is a graph illustrating the evolution over time of the resistance of resistive elements;
[0028] [Fig.4A] is a graph illustrating the deviation in the fluctuations of resistive elements programmed in a high resistance state;
[0029] [Fig.4B] is a graph illustrating the deviation in the fluctuations of resistive elements programmed in a low resistance state;
[0030] [Fig.5] is a graph illustrating the average fluctuations of resistive elements programmed in states of high or low resistance;
[0031] [Fig.6A] is a graph illustrating two measurements;
[0032] [Fig. 6B] is a graph illustrating several measurements; and
[0033] [Fig.7] is a block diagram illustrating a circuit according to an embodiment of the present description. Description of the implementation methods
[0034] The same elements have been designated by the same reference numerals in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same reference numerals and may have identical structural, dimensional and material properties.
[0035] For the sake of clarity, only the steps and elements useful for understanding the described embodiments have been shown and are detailed. In particular, the Resistive memory technologies, as well as the reprogramming of resistive elements, are known to those skilled in the art. In particular, the reprogramming of filamentary memory cells to a high and / or low resistance state is known to those skilled in the art.
[0036] Unless otherwise specified, when referring to two elements connected together, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") together, this means that these two elements can be connected or linked through one or more other elements.
[0037] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "superior", "inferior", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made, unless otherwise specified, to the orientation of the figures.
[0038] Unless otherwise specified, the expressions "approximately", "roughly", and "in the order of" mean within 10%, preferably within 5%.
[0039] Figure 1 is a graph 100 illustrating the fluctuations in the resistance of resistive elements programmed in high-resistance and low-resistance states. More specifically, curves 102 and 104 were obtained following experiments. For example, the experiments performed measure the resistance value of resistive elements, for instance, following a measurement of the output voltage of the elements. The resistive elements are, for example, contained within cells of a non-volatile resistive memory (ReRAM). For example, non-volatile memory is filamentary memory. In other examples, non-volatile memory is phase-change memory (PCM), oxide random access memory (OxRAM), a programmable metallization cell, etc.
[0040] Curve 102 illustrates the distribution of resistance measurements (J?[Q]) of resistive elements initially programmed to a high resistance state (HRS). More specifically, the measurements are taken a short time after the programming of the resistive elements. As an example, the measurements were taken 6 seconds after the initial programming.
[0041] Curve 104 illustrates the distribution of resistance measurements of resistive elements initially programmed to a low resistance state (HRS – “High Resistance State”). More specifically, the measurements are taken a short time after the programming of the resistive elements. For example, the measurements were taken 6 seconds after the initial programming.
[0042] The y-axis of graph 100 represents the quantiles (Q) for the measurements taken. In particular, the quantiles shown are relative to a normal distribution, theoretical for the measurements taken. For example, the resistance value corresponding to the quantile of 0 is the median resistance value. Similarly, the set of resistance values located between the quantile values -1 and 1 represents 68.27% of the total number of values. In other words, the Q unit is the standard deviation of the normal distribution of resistance values.
[0043] In general, the resistance values of cells programmed in high and low resistance states follow log-normal distributions. Furthermore, the resistances of elements programmed in a high resistance state are more dispersed than the resistances of elements programmed in low resistance states. Indeed, the resistance values of the LRS elements illustrated in Figure 1 range from 1000 ohms to approximately 20,000 ohms, while the resistances of the HRS elements range from 10,000 ohms to 1000 ohms.
[0044] An interval 106 represents a range of resistance values that can be assumed by resistive elements initially programmed in the high-resistance state and in the low-resistance state. The interval 106 extends from a resistance value of R^ ohms to a value of Rf^ ohms. For example, R^l = 11000 and R^ = 25000. More generally, R^l is a value in the range of 8000 ohms to 20000 ohms, and R^f is a value in the range of 20000 ohms to 50000 ohms. The preceding values R^ and R^f^ are given by way of example and may differ, for example, from one type of memory to another.
[0045] Furthermore, following their initial programming, the resistance values of the LRS and HRS elements undergo a relaxation effect and fluctuate. Even once the resistance distributions of the HRS and LRS elements have stabilized, the resistance of each cell continues to fluctuate individually.
[0046] In the case of filamentary memories, the relaxation effect comes from the dynamic stabilization of the filament, which modifies cellular resistance. Indeed, atoms, for example oxygen atoms, can move and recombine for a certain period of time until stabilization is achieved.
[0047] Fluctuations before and after stabilization do not alter the distributions of resistance values for each HRS and LRS state. However, when values fluctuate around and within the interval 106, it becomes difficult to distinguish an HRS element from an LRS element.
[0048] Fig. 2A is a graph illustrating the fluctuations in the resistance of resistive elements around the interval 106.
[0049] Fig. 2B illustrates the variations in resistance around the interval 106.
[0050] The y-axis of the graph illustrated in [Fig. 2A] represents the quantiles, as described in relation to [Fig. 1], relative to a theoretical normal distribution for measurements performed. The two sloping segments represent, respectively, the theoretical normal distributions for the LRS and HRS states. By way of example, the x-axis of the graph illustrated in [Fig. 2A] is on a logarithmic scale.
[0051] By way of example, a resistance value of 200 represents the resistance value of an element initially programmed in an LRS state and having fluctuated until it fell within the threshold interval 106. The resistance of this element will then generally decrease, or diminish, in order to move out of the interval 106. Similarly, a resistance value of 202 represents the resistance value of an element initially programmed in an HRS state and having fluctuated until it fell within the threshold interval 106. The resistance of this element will then generally increase, or grow, in order to move out of the interval 106. In general, the resistance of an HRS or LRS element, when it enters the interval 106, will tend to return to a value characteristic of its initial state.
[0052] Outside the 106 range, LRS elements, for example those with a resistance of 204, generally see their resistance increase. HRS elements, for example those with a resistance of 206, generally see their resistance decrease. These increases and decreases outside the 106 range are trends. Indeed, the resistance of HRS elements will sometimes fluctuate and increase, as is the case, for example, with resistance of 208.
[0053] Thus, when a resistive HRS or LRS element having its resistance in the interval 106 will see its resistance go out of the interval 106, another resistive element programmed in the same state will see its resistance fluctuate and go into the interval 106.
[0054] Fig. 3 is a graph 300 illustrating the time evolution of the resistance of HRS resistive elements.
[0055] In particular, graph 300 illustrates the evolution of the logarithm of the resistance value (loff(R)) as a function of time (T[s]). Graph 300 includes curves 302, 304, and 306 dividing the evolution of the resistances into terciles. In other words, each curve 302, 304, and 306 illustrates the evolution of the resistance of the same number of resistive elements. Curve 302 illustrates the evolution of the resistances of the upper tercile, that is, the third of the resistive elements with the highest resistance values. Curve 304 illustrates the evolution of the resistances of the middle tercile. Curve 306 illustrates the evolution of the resistances of the lower tercile, that is, the third of the resistive elements with the lowest resistance values.
[0056] The resistances of the upper tertile tend to decrease over time, while the resistances of the middle and lower tertiles tend to increase. The mean tertiles for the HRS and LRS states tend to converge. This convergence occurs with an increasing deviation. Indeed, each element whose resistance increases in a distribution is replaced by another element whose resistance decreases.
[0057] Fig. 4A is a graph 400 illustrating the deviation in the fluctuations of resistive elements programmed in a high resistance state.
[0058] Fig. 4B is a 402 graph illustrating the deviation in the fluctuations of resistive elements programmed in a low resistance state.
[0059] In particular, graphs 400 and 402 comprise scatter plots 400' and 402'. Each point in the scatter plots 400' and 402' has as its x-coordinate the logarithm of the resistance of a resistive element at a time t-Jog(R) ( .A As an example, the instant occurs a few seconds, for example 6 seconds, after the programming of the resistive element. Each point in the clouds 400 and 402 has as its ordinate the difference of the logarithms of the resistance of the resistive element between an instant t2 and the instant fl (log(R)(t2) - log(R)(t)). For example, time £2 is subsequent to time £2 and occurs, for instance, several tens of minutes after the element was programmed, for example, one hour after programming. In particular, the 400' scatter plot illustrates the temporal variation of the resistance of resistive elements programmed in an HRS state. The 402' scatter plot illustrates the temporal variation of the resistance of resistive elements programmed in an LRS state.
[0060] A 404 frame shows a negative drift in the time variation of the resistance of resistive elements programmed in an HRS state, illustrating the tendency of HRS element resistances to increase. Similarly, a 406 frame shows a positive drift in the time variation of the resistance of resistive elements programmed in an LRS state, illustrating the tendency of LRS element resistances to decrease. These trends are only significant for elements whose resistances are at values in frames 404 and / or 406.
[0061] Figure 5 is a graph 500 illustrating the average fluctuations of resistive elements programmed in states of high or low resistance. More specifically, graph 500 comprises a curve 502 and a curve 504. Curves 502 and 504 are obtained respectively by successive measurements of the resistance of a plurality of HRS and LRS resistive elements when within the threshold interval 106. Curves 502 and 504 illustrate respectively the ratio (RATIO) of resistive elements whose resistance value has increased, and whose resistance value has decreased. By way of example, for each instant t, the increase or decrease is obtained by comparing the resistance value measured at time t with the average of resistance values measured at several times within 2 minutes following time t.
[0062] Constant curves 506 and 508 illustrate respectively the average ratio of HRS elements whose resistance increases and the average ratio of LRS elements whose resistance decreases.
[0063] Figure 6A is a graph illustrating two measurements. As an example, Figure 6A illustrates an example of measurements to verify whether a resistance belonging to the threshold interval 106 tends to increase or decrease.
[0064] The example illustrated in Figure 6A shows a measurement Re^Tp taken at time tp. For example, at time tp, the resistance of the tested resistive element is equal to ohms. For example, the value R^ belongs to the threshold interval 106. Another measurement of the resistance of the tested resistive element is, for example, carried out At a time t2, subsequent to time t1, for example, time t2 is one or more seconds (e.g., at least 3 seconds), one or more minutes (e.g., at least 1 minute), or at least one hour after time t1. For example, the resistance value at time t2 is R2 ohms. If R2 is greater than R1, as illustrated in Figure 6A, the resistance value is considered to have increased. Conversely, if R1 > R2, the resistance value is considered to have decreased. In this example, the value of R2 is not within the threshold interval 106.
[0065] Figure 6B is a graph illustrating several measurements Re^Tp Rs^T2, Re^T3, Rc^Tn. As an example, [Fig. 6B] illustrates another example of measures to verify whether a resistance belonging to the threshold interval 106 tends to increase or decrease.
[0066] In the example illustrated in Figure 6B, n-1, where n is an integer, for example less than 1000, further measurements are taken at times subsequent to time ti. For example, the consecutive measurements are taken within a relatively short period of time, for example, between 1 ms and 1 s. The total number of measurements that can be taken then depends on the measurement time and the processing time of the measurements taken. For example, the integer n is between 10 and 1000. For example, the other measurements are taken periodically, for example, every 6 seconds, every minute, every hour, etc.For example, at times t2, t4, and tn, the measured resistances are respectively equal to R2, R4, and Rn ohms, all greater than the value R4. However, at time t3, the measured resistance is equal to R4 ohms, less than R4. Similarly, the value Rn is, for example, less than the value R4. The sequence of measured resistances is therefore not an increasing sequence. Nevertheless, the... If the average of the values R2, R1, R2, and Rn is greater than Kp, then we agree that the resistance of the tested element increases. Conversely, if the average of the values R2, R1, R2, and Rn is less than R1, then we agree that the resistance of the tested element decreases.
[0067] According to one embodiment, as soon as the resistance value falls within the threshold interval 106 at a time ti, and when it is measured as increasing following one or more other measurements, the tested resistive element is considered to be an HRS element. Conversely, if the resistance decreases following one or more other measurements, the element is considered to be LRS.
[0068] Other ways of estimating whether resistance increases or decreases are of course conceivable. For example, an average of the differences in resistance values between two consecutive measurements is calculated, and if the average is negative, the element is considered to be an LRS element, and if the average is positive, the element is considered to be HRS. In another example, the average of a first set of resistance values, measured for a first set of consecutive times, is compared to the average of a second set of resistance values, measured for a second set of consecutive times, subsequent to the first set of times.
[0069] The [Fig.7] is a block diagram illustrating a 700 circuit according to an embodiment of the present description.
[0070] The circuit 700 includes a resistive element 701 of a resistive non-volatile memory. The resistive element 701 is supplied with a predefined current In via a transistor 702. In some cases, the transistor 702 is used as a current source to control the programming current level through the resistive element 701. In other cases, the transistor 702 is an access transistor used to turn the programming current on or off, and when it is on, the programming current level is, for example, determined by a current source (not shown in Figure 7) positioned elsewhere in series with the resistive element 701, for example, at the end of the row of the resistive non-volatile memory array. By way of example, the element 701 was initially programmed to an LRS state or to an HRS state. As described in relation to Figures 1 to 5, the resistance of element 701 fluctuates over time.The current Ia is a current of predefined intensity. As an example, the current In is applied to the resistive element 701 at a time ti.
[0071] As an alternative, instead of applying a predefined intensity current to the resistive element, a predefined voltage is applied to the resistive element.
[0072] The circuit 700 further includes a circuit 704 (VOLT. READER) configured to measure a voltage representative of the resistance of element 701. By way of example, the circuit 704 is further configured, for example via a voltage divider, to calculate the resistance value of element 701 from the measured voltage. By way of example, the circuit 704 includes an analog-to-digital converter (ADC) configured to convert the measured voltage value into a digital value, and a memory in which the digital value, which is representative of the resistance value of resistive element 701, is stored. By way of example, the circuit 704 includes a comparator (not shown in the figure) and is further configured to compare the digital value with the values R1 and R2 defining the interval 106.For example, when the calculated resistance value does not belong to the threshold interval 106, the circuit 700 is configured to reapply the current In or the voltage to the resistive element 701.
[0073] In one example, the circuit 700 further includes, for example, a memory 706 (MEM), for example a shift register, configured to receive digital voltage measurements obtained by the circuit 704. By way of example, the memory 706 is configured to store a first measurement in a location 708 (MEM1). By way of example, the first measurement is a voltage value corresponding to a resistance within the threshold range 106. The memory is further configured to store one or more additional measurements taken by the circuit 704 in a location 710 (MEM2). By way of example, not all measurements stored in location 702 are within the threshold range 106.
[0074] In another example, the circuit 704 further includes an amplifier, for example an operational transconductance amplifier (OTA) configured to supply a current based on the voltage measured at the output of element 701. The memory 706 of the previous example is then replaced by at least two capacitors, each connected to a switch and powered by the current generated by the OTA. The charge on the capacitors is then a representation of the measured resistances of element 701.
[0075] The circuit 700 further includes a comparison circuit 712 (COMPARISON CIRCUIT). By way of example, the circuit 712 is configured to determine whether the resistance of the element 701 increases or decreases, for example by applying the comparisons described in relation to Figures 6A and / or 6B.
[0076] In another example, the estimation of the state in which element 701 has been programmed is performed by a fully connected neural network. As an example, the neural network comprises 4 layers. The input layer comprises, for example, n neurons, where n corresponds to the number of measurements taken. For example, n is a value between 2 and 10. The next two layers comprise, for example, 8n and 2n neurons, respectively. The output layer comprises 1 neuron, and the output indicates whether the estimated state is HRS or LRS. For example, the output value is 1 if the estimated state is HRS, meaning that resistance tends to increase, and 0 if the estimated state is LRS, meaning that resistance tends to decrease.
[0077] In one embodiment, circuit 712 is connected to a programming circuit 714 (REPROG.). Circuit 712 is configured, for example, to provide a signal to circuit 714, the signal encoding whether the resistance tends to increase or decrease. In another example, the comparison circuit 712 is configured to program the state of a bit of circuit 714. For example, the bit is programmed to state 1 if the resistance tends to increase, and to 0 if the resistance tends to decrease, or vice versa.
[0078] The circuit 714 is then configured to reprogram the state of the element 701 on the basis of the information provided by the circuit 712. The element 701 is then programmed, by the circuit 714, to the HRS state if it has been estimated that the resistance tended to increase, and to the LRS state if it has been estimated that the resistance tended to decrease.
[0079] According to another embodiment, the circuit 712 provides the information, for example in the form of a signal or by programming a bit, to a memory 716. By way of example, the memory 716 is configured to store, in association with an indication of the address of the element 701 in the non-volatile memory, whether the element is estimated to be HRS or LRS.
[0080] In one example, and although not illustrated in [Fig.7], the circuit 700 includes a selection circuit for selectively connecting each memory cell of the non-volatile memory to the circuit elements 704 to 712 and 714.
[0081] The following table summarizes the results obtained when estimations were performed by a fully connected neural network comprising 4 layers of, respectively, 10, 80, 20, and 1 neurons. Following a measurement within the interval [10,800; 25,000] ohms, 9 other measurements were taken at consecutive 1-minute intervals. A total of 10 measurements were thus taken, the first within the interval [10,800; 25,000] ohms, and were provided to the neural network. The neural network is configured to predict, based on the 10 measurements, whether the state of the tested element is HRS or LRS. As an example, for the experiment, 14,784 memory elements were programmed to the HRS state and 15,061 elements were programmed to the LRS state.Based on these elements, the learning and validation of the neural network are carried out on a majority part of the elements, for example on 75% of the elements, for example. chosen randomly. The remaining elements, corresponding for example to 25% of the elements, are used to perform a test of the method, in other words, to validate the model on data that was not seen during training. The following table presents the results obtained during the model validation, on a total of 7,461 elements not used during the network training. A "support" column includes the number of elements that were tested, that is, those that fell within the interval [10,800; 25,000] ohms. A "Fl-score" column includes the Fl-scores from the experiment. A "Recall" column includes the recall value from the experiment. A "precision" column includes the ratio of correctly predicted elements for each class.
[0082] [Tables 1] Accuracy recall Fl-score support HRS 0.96 % 0.86 0.91 3°698 LRS 0.88 % 0.96 0.92 3°763
[0083] Various embodiments and variations have been described. Those skilled in the art will understand that certain features of these various embodiments and variations could be combined, and other variations will become apparent to those skilled in the art. In particular, this is the case with regard to estimating the increase or decrease of the resistance value. Similarly, the number of measurements and the time interval between two measurements can vary. The choice of the limits defining the threshold interval depends on the volatile memory and the measuring circuit 704 and is left to those skilled in the art.
[0084] Finally, the practical implementation of the described embodiments and variants is within the reach of a person skilled in the art, based on the functional specifications given above. In particular, this is the case with regard to the implementation of elements 704, 706, and 716, which can be analog or digital.
Claims
Demands
1. A method for estimating the resistive state in which a cell of a non-volatile resistive memory is programmed, the method comprising: a) a first measurement, by a measuring circuit (704) connected to the memory cell, of a first value representing the resistance (Re^T jj of the cell when the cell is in the resistive state; b) at least a second measurement, by the measuring circuit, of at least a second value representing the resistance (jRe1T2, Re^T^, Re^T^ Re^Tn) of the same memory cell when the cell is in the resistive state; c) the comparison, by a comparison circuit (712), of the first and at least a second representative value of the resistance;and d) based on the comparison, the estimation of the resistive state of the cell, the estimation being either an estimate of a high resistance state if at least one second representative value shows an increase compared to the first representative value of the resistance, or an estimate of a low resistance state if at least one second representative value shows a decrease compared to the first representative value.
2. A method according to claim 1, further comprising: - before step a), a first application, at a first instant (tj), of a current (tn) of predefined intensity or a predefined voltage to the resistive memory cell, the first measurement being performed on the basis of the first application; and - after step a) and before step b), at least a second application, at at least a second instant (t2 / tn) subsequent to the first instant, of the current (In) or a predefined voltage to the resistive element, the at least one second measurement being performed on the basis of the at least one second application.
3. Method according to claim 1 or 2, further comprising, following the estimation of the state: - the reprogramming of the cell towards the estimated state.
4. Method according to claim 1 or 2, further comprising, following the estimation of the state: - the storage in a memory (716), in association with the cell, of a value indicating the estimated state.
5. A method according to any one of claims 1 to 4, further comprising, following the measurement of the first representative value: - comparing the first representative value with a reference interval (106); and - if the first representative value is outside the reference interval, repeating the method in a new embodiment of step a).
6. A method according to any one of claims 1 to 5, further comprising, prior to comparison: - the conversion, by a converter, of the first and at least one second representative values into a first and at least one second numerical values; - the storage, in association with the cell, of the first and at least one second numerical values in a memory (706, 708, 710).
7. A method according to any one of claims 1 to 5, wherein the comparison is carried out on the basis of the voltage values stored by a first and at least one second capacitor configured to store respectively the first and at least one second representative values.
8. A method according to any one of claims 1 to 7, wherein the estimated state is a high strength state (HRS) if, during the comparison, it is determined that the first representative value is less than one of at least one second representative value, and wherein the estimated state is a low strength state (LRS) if, during the comparison, it is determined that the first representative value is greater than one of at least one second representative value.
9. A method according to claim 1 to 7, wherein the estimated state is a high strength state (HRS) if, during the comparison, it is determined that the first representative value is less than the average of at least one second representative value.
10. A method according to claim 7 in its dependence on claim 2, wherein the at least a second value representative includes a first second value and a second second value, the second second value being measured at a time later than the second time, and in which the estimated state is a high resistance state (HRS) if, during the comparison, it is determined that the mean of the differences between the first second and second second representative values and between the first second and first representative values is positive and in which the estimated state is a low resistance state (LRS) if, during the comparison, it is determined that the mean of the differences between the first second and second second representative values and between the first second and first representative values is negative.
11. A method according to claim 2 or according to any one of claims 3 to 10 in their dependence on claim 2, wherein the second instant is distant from the first instant (ti) by a duration of at least 3 seconds, and for example by at least one minute.
12. A method according to any one of claims 1 to 11, wherein the first and at least one second representative resistance values are voltage or current values representative of the cell resistance.
13. A circuit comprising a non-volatile resistive memory including a cell (701), programmed to one state among a plurality of states, the circuit further comprising: - a measuring circuit (704) configured to measure a first representative value of the resistance (Rg^Tp) of the cell when the cell is in the resistive state and at least a second representative value of the resistance (Rg1T2 / RG^3, RGyT^RG^n) of the same memory cell when the cell is in the resistive state; - a comparison circuit (712) configured to compare the first representative value with at least a second representative value to estimate the state of the cell, the estimate being an estimate of a high-resistance state if at least a second representative value shows an increase compared to the first representative value of the resistance, or of a low-resistance state resistance if at least a second representative value shows a decrease compared to the first representative value.
14. Circuit according to claim 13, further comprising a current source configured to apply a current ( / n) of predefined intensity, or a voltage source configured to apply a predefined voltage, to the cell at a first instant (ti) and then at at least a second instant (¢2), subsequent to the first instant, the measurement of the first representative value being carried out on the basis of the application at the first instant and the measurement of at least a second representative value being carried out on the basis of the application at at least the second instant.
15. Circuit according to claim 13 or 14, wherein the non-volatile memory is a phase-change memory, or an oxide-based resistive memory, or a programmable metallization cell.