Parallel branch device

Abstract

Parallel branch device The present description relates to a device (DEV2) comprising two terminals (100; 102) and at least two identical branches (B1, B2, B3) connected in parallel between said two terminals, each branch comprising: - a semiconductor component (T1, T2, T3) having a control terminal receiving a control signal (cmd1, cmd2, cmd3) of a resistance in the on state of the component, the resistance in the on state of the component having a negative coefficient of variation with temperature; and - a measuring circuit (MES1, MES2, MES3) of a value of a parameter of the branch, the device further comprising a control circuit (CTRL2) receiving the measured values ​​(val1, val2, val3), providing the control signal of each branch and modulating the control signal of each branch so as to maintain the value of the parameter of the branch in an identical range of values ​​for all the branches. Figure for the abstract: Fig. 2

Description

Title of the invention: Device with parallel branches Technical field

[0001] The present description relates generally to electronic circuits, and more particularly to electronic circuits comprising several identical parallel branches each having a semiconductor component with an on-state resistance decreasing with temperature. Prior art

[0002] In many known electronic systems, several identical semiconductor components are connected in parallel, each semiconductor component being implemented from a semiconductor material, for example in and on a portion of a layer of this semiconductor material.

[0003] The provision of several identical semiconductor components in parallel makes it possible, for example, to increase the maximum amount of current that can flow in these components in parallel without increasing the dimensions of the identical semiconductor components. For example, power converters comprise transistors each implemented by several transistors connected in parallel.

[0004] In some of these known systems, identical components that are connected in parallel each have an on-resistance having a value that decreases as the temperature increases, which poses various problems. Summary of the invention

[0005] There is a need to overcome all or part of the disadvantages of devices comprising several identical semiconductor components connected in parallel and having a resistance in the on state with a negative coefficient of variation with temperature, i.e. a resistance value in the on state which decreases when the temperature increases and vice versa.

[0006] One embodiment overcomes all or part of the drawbacks of the known devices described above.

[0007] One embodiment provides a device comprising two terminals and at least two identical branches connected in parallel between said two terminals, each branch comprising: - a semiconductor component having a control terminal configured to receive a control signal from an on-resistance of the component between first and second conduction terminals of the component, the on-resistance of the component having a negative coefficient of variation with temperature; and - a circuit for measuring a value of a parameter of said branch, the device further comprising a control circuit configured to receive the measured values, supply the control signal to the component of each branch and modulate the control signal of each branch so as to maintain the value of the parameter of said branch in a range of values ​​identical for all the branches.

[0008] According to one embodiment, in each branch, the value of the parameter is at least partly determined by the on-state resistance of the component of said branch.

[0009] According to one embodiment, the semiconductor is diamond.

[0010] According to one embodiment, the component is a MOS transistor.

[0011] According to one embodiment, in each branch, the semiconductor component is in series with at least one other element, for example a resistor.

[0012] According to one embodiment, each branch comprises only said component and the measuring circuit.

[0013] According to one embodiment, the control circuit is configured to modulate the control signal of each branch independently of the control signals of the other branches.

[0014] According to one embodiment, the control circuit is configured to modulate the control signal of each branch so as to increase the on-state resistance of the transistor of the branch when the value of the parameter varies and reflects a reduction in the on-state resistance of the transistor.

[0015] According to one embodiment, the value range is determined by the control circuit from a reference value equal to an average of the measured values.

[0016] According to one embodiment, the value range comprises only the reference value.

[0017] According to one embodiment, the value range is further determined by a maximum value and / or a minimum value of the control signals.

[0018] According to one embodiment, said parameter is a current flowing in the branch, between the conduction terminals of the component of the branch.

[0019] According to one embodiment, said parameter is a temperature of said branch, preferably of the component of said branch.

[0020] Another embodiment provides an electronic system comprising a device as described above, in which said at least two branches implement, between said two terminals, a switch of the system.

[0021] According to one embodiment, the control circuit is configured to receive a binary signal having a first binary state controlling the on state of the components, and a second binary state controlling the blocked state of the components. Brief description of the drawings

[0022] These characteristics and advantages, as well as others, will be explained in detail in the following description of particular embodiments given without limitation in relation to the attached figures among which:

[0023] [Fig.l] represents an example of a parallel branch device each comprising a semiconductor component with controllable on-state resistance;

[0024] [Fig.2] represents an exemplary embodiment of a device with parallel branches each comprising a semiconductor component with controllable on-state resistance;

[0025] [Fig.3] represents an example of a more detailed embodiment of a circuit of the device of [Fig.2]; and

[0026] [Fig.4] shows an example of a more detailed embodiment of a circuit of the circuit of [Fig.3]. Description of the embodiments

[0027] The same elements have been designated by the same references in the different figures. In particular, the structural and / or functional elements common to the different embodiments may have the same references and may have identical structural, dimensional and material properties.

[0028] For the sake of clarity, only the steps and elements useful for understanding the embodiments described have been represented and are detailed.

[0029] Unless otherwise specified, when referring to two elements connected to each other, this means directly connected without intermediate elements other than conductors, and when referring to two elements connected (in English "coupled") to each other, this means that these two elements can be connected or be connected by means of one or more other elements.

[0030] In the following description, when reference is made to absolute position qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or relative position qualifiers, such as the terms "above", "below", "upper", "lower", etc., or to orientation qualifiers, such as the terms "horizontal", "vertical", etc., reference is made unless otherwise specified to the orientation of the figures.

[0031] Unless otherwise specified, the expressions "about", "approximately", "substantially", and "of the order of" mean to within 10%, preferably to within 5%.

[0032] [Fig.l] represents an example of a device DEV1 with parallel branches each comprising a semiconductor component with a controllable on-state resistance.

[0033] More particularly, the electronic device DEV 1 comprises a component C0MP1 and a CTRL1 circuit configured to control the C0MP1 component.

[0034] The component COMP1 comprises two terminals 100 and 102 and N identical branches Bi connected in parallel between the terminals 100 and 102, with N an integer strictly greater than 1 and i an integer index ranging from 1 to N. The component COMP1 is configured so that a current I flows between its terminals 100 and 102.

[0035] In the example of [Fig.l], N is equal to 3 and the device DEV1 comprises three identical branches B1, B2 and B3 connected in parallel between terminals 100 and 102. For example, each branch B1 has one end connected to terminal 100 and another end connected to terminal 102.

[0036] Each Bi branch comprises a Ti semiconductor component (T1, T2 and T3 in [Fig.l]), that is to say a component formed in and / or on a portion of semiconductor layer, for example, made of diamond. As the Bi branches are identical to each other, the Ti components are identical to each other apart from manufacturing dispersions.

[0037] Each component Ti comprises two conduction terminals and a control terminal configured to receive a control signal, for example a control voltage or current, determining a resistance value in the on state of the component Ti. For example, one of the two conduction terminals of each component Ti is coupled, for example connected, to terminal 100, the other of the two conduction terminals of each component Ti being coupled, for example connected, to terminal 102. Each component Ti is configured so that a current li (II, 12 and 13 in [Fig.l]) flowing in the branch Bi flows between the two conduction terminals of the component Ti.

[0038] In the example of [Fig.l], the branches Bi all receive the same control signal cmd, common to all the branches Bi. In other words, all the components Ti receive the signal cmd on their respective control terminals. For example, in [Fig.l], the signal cmd is supplied to the control terminal of each of the components T1, T2 and T3.

[0039] For example, the control signal cmd is provided by the control circuit CTRL1 of the device DEV1.

[0040] For example, when the cmd signal controls an on state of the Ti components, the value of the cmd signal determines the value of the on-state resistance of each of the Ti components. In other words, the cmd signal determines the on-state resistance value of the Ti components.

[0041] The topology of the DEV1 circuit of [Fig.l] with a common command (the cmd signal) applied to all the Ti components is that which is generally used in known devices comprising several Ti components which must be controlled to be selectively on simultaneously and off simultaneously.

[0042] This common control topology is well suited to identical Ti components having an on-state resistance with a positive coefficient of variation with temperature, i.e. the on-state resistance value of the Ti component increases when the temperature increases, and, conversely, decreases when the temperature decreases. Indeed, the conduction losses in each Ti component are of the Roni*Ii2 type, with Roni the on-state resistance of the Ti component and li the current flowing therein. Thus, for a given value of the cmd signal for which the Ti components are in the on-state, if the temperature of a Ti component increases, its resistance Roni increases, which leads to a corresponding decrease in the current li flowing therein, therefore a decrease in the conduction losses (due to the predominance of the square of the current li over the resistance value Roni).The reduction in conduction losses leads to a decrease in temperature in the Ti component, therefore a decrease in the Roni resistance and so on. The Roni resistance therefore maintains a resistance value that is substantially constant and determined by the value of the cmd signal.

[0043] On the other hand, this common control topology is not suitable for Ti components having an on-state resistance with a negative coefficient of variation with temperature, i.e. the value of the on-state resistance of the Ti component decreases when the temperature increases, and, conversely, increases when the temperature decreases.

[0044] Indeed, although the Ti components are supposed to be identical to each other, for a given value of the cmd signal for which the Ti components are in the on state, the Ti components may have different on-state resistance values, for example due to manufacturing dispersions and / or temperature variations between the Ti components. This results in one of the Ti components then having a lower on-state resistance Roni than those of the other Ti components, although the components all receive the same cmd signal. The current li in the Bi branch comprising the least resistive Ti component is then higher than the current li in the Ti components of the other branches, resulting in higher heating by thermal dissipation in this Ti component than in the Ti components of the other branches (due to the predominance of the square of the current li over the resistance value Roni).This higher heating in this less resistive Ti component leads to a greater decrease in the on-resistance of the Ti component than those of the on-resistances of the Ti components of the other branches. In turn, this greater decrease in the resistivity of the Ti component compared to those of the other components leads to a greater increase in the current li in this Ti component than in the other Ti components, and so on. This leads to premature aging of this Ti component compared to the Ti components of the others. branches, see a destruction of this Ti component.

[0045] To overcome the drawback described above of the device DEV1, it is proposed here to control the Ti components independently, that is to say to provide different control signals to the respective Ti components, so as to optimize the paralleling of the Ti components.

[0046] More particularly, it is proposed here to control each component Ti independently of the other components Ti, so that a parameter of the component Ti (or of the branch Bi comprising this component Ti) which has a value dependent on the resistance in the on state of the component Ti, has a value in a range of values ​​identical for all the components Ti. In other words, it is proposed here to control each component Ti independently of the other components Ti so that the value of a parameter of the component Ti does not move away from, or diverge from, the values ​​of this parameter for the other components Ti.

[0047] In the present description, unless otherwise indicated, the expression "range of values" designates a range of values ​​extending from a minimum value to a maximum value, whether the minimum and maximum values ​​are equal to each other (the range then comprising a single value equal to the minimum and maximum values), or whether the minimum and maximum values ​​are different from each other (the range then comprising, in addition to these two minimum and maximum values, a plurality of values ​​between the minimum and maximum values).

[0048] In the remainder of the description, unless otherwise indicated, the expression "parameter of a branch Bi" means "parameter of the component Ti of this branch Bi". For example, when the parameter is the temperature, the temperature of the branch Bi means the temperature of the component Ti of this branch Bi.

[0049] For this, one embodiment provides, in each branch Bi, a circuit for measuring the value of the parameter for the branch Bi, i.e. the parameter for the component Ti of this branch Bi, and a control circuit configured to control each component Ti from the measured values, so as to obtain the operation described above.

[0050] For example, one embodiment provides that each component Ti receives a modulated control signal cmdi, independently for each component Ti, based on the measured value of a parameter of that component Ti.

[0051] [Fig.2] represents an exemplary embodiment of a DEV2 device with identical Bi branches connected in parallel with each other and each comprising a Ti semiconductor component with controllable on-state resistance and negative coefficient of variation with temperature.

[0052] The electronic device DEV2 comprises a component COMP2 and a circuit CTRL2 configured to control the component COMP2.

[0053] Component COMP2 is similar to component COMP1 in [Fig.l], and only the differences between these two components COMP1 and COMP2 are highlighted here. Thus, unless otherwise indicated, everything indicated for component COMP1 applies to component COMP2.

[0054] More particularly, the component COMP2 differs from the component COMP1 in that each branch Bi of the component COMP2 comprises a measuring circuit MESi (MES1, MES2 and MES3 in the example of [Fig.2] where N is equal to 3).

[0055] In each branch Bi, the MESi circuit is configured to measure a value of a parameter of the branch Bi. For example, this parameter has a value which depends, at least in part, on the on-state resistance of the Ti component of the branch Bi, for example which increases when the on-state resistance decreases. Each MESi circuit provides a signal vali (vall, val2 and val3 in [Fig.2]) indicating the measured value of this parameter for the branch Bi or the corresponding Ti component.

[0056] For example, the parameter measured in each branch is the current li flowing in the branch Bi, and therefore in the component Ti of the branch Bi, that is to say between the conduction terminals of this component Ti.

[0057] As an alternative example, the parameter measured in each branch Bi is the temperature of the branch Bi, or, in other words, the parameter measured in each branch Bi is the temperature in the component Ti of the branch Bi. Indeed, the temperature of the component Ti of the branch Bi depends on the current li in the branch Bi and on the value of the on-state resistance of the component Ti of the branch.

[0058] In the example of [Fig.2], each branch Bi comprises only the component Ti and the circuit MESi of the branch Bi.

[0059] For example, when the parameter measured in each branch Bi is the current li in the branch Bi, the circuit MESi is connected in series with the component Ti.

[0060] Compared to the device DEV1, the control circuit CTRL1 is replaced by the control circuit CTRL2 in the device DEV2.

[0061] The circuit CTRL2 is configured to provide, to the component Ti of each branch Bi, a control signal cmdi (cmdl, cmd2 and cmd3 in [Fig.2]) of the on-state resistance of the component Ti. For example, the signal cmdi is provided to the control terminal of the corresponding component Ti.

[0062] For example, when the signal cmdi controls a passing state of the corresponding component Ti, the value of the signal cmdi determines the value of the resistance in the passing state of this component Ti.

[0063] Compared to the circuit CTRL1 which provides the same cmd signal to all the Ti components, the circuit CTRL2 provides a separate cmdi signal to each Ti component, so that the value of the on-state resistance of each Ti component is controlled independently of the on-state resistance values ​​of the other Ti components.

[0064] The CTRL2 circuit receives the vali signals, that is to say it receives the values ​​measured in the Bi branches of the chosen parameter.

[0065] The circuit CTRL2 is configured to prevent the parameter of each branch Bi or component Ti from taking values ​​which diverge between the branches Bi. For this, the circuit CTRL2 is configured to modulate (or adapt or determine) each signal cmdi so that, in each branch Bi, the value of the parameter is maintained in a range of values ​​identical for all the branches Bi.

[0066] For example, when the signal vali of a branch Bi indicates that the parameter, for example the current li or the temperature of the branch, increases and reaches an upper limit of the range of values ​​shared by the branches Bi, the circuit CTRL2 modifies the value of the signal cmdi of the component Ti of this branch Bi so as to increase the value of the resistance in the on state of the component Ti, which results in a decrease in the parameter for this branch Bi, this parameter being, for example, the current li in the branch Bi or the temperature in the branch Bi, that is to say in the component Ti of this branch Bi.

[0067] For example, the component Ti of each branch Bi is a MOS transistor (from the English "Metal Oxide Semiconductor") formed in and / or on a portion of semiconductor layer, for example in diamond.

[0068] For example, when these transistors Ti are N-channel and the temperature or the current li in one of these transistors Ti increases while the transistors Ti are simultaneously controlled in the on state, the control signal cmdi of this transistor Ti, in practice the positive voltage cmdi applied to the gate of this transistor Ti, is decreased (downward modulated) to increase the on-state resistance Roni of this transistor Ti. Symmetrically, when these transistors Ti are N-channel and the temperature or the current li in one of these transistors Ti decreases while the transistors Ti are simultaneously controlled in the on state, the positive voltage cmdi applied to the gate of this transistor Ti is increased (upward modulated) to decrease the on-state resistance Roni of this transistor Ti.

[0069] As another example, when these transistors Ti are P-channel and the temperature or the current li in one of these transistors Ti increases while the transistors Ti are simultaneously controlled in the on state, the negative voltage cmdi applied to the gate of this transistor Ti is decreased in absolute value (modulated downward in absolute value) to increase the on-state resistance Roni of this transistor Ti. Symmetrically, when these transistors Ti are P-channel and the temperature or the current li in one of these transistors Ti decreases while the transistors Ti are simultaneously controlled in the on state, the negative voltage cmdi applied to the gate of this transistor Ti is increased in absolute value (modulated upward in absolute value) to decrease the on-state resistance Roni of this transistor Ti.

[0070] Although it is generally sought to reduce the on-state resistance of the components of a circuit so as to limit losses and consumption, in the device DEV2, the circuit CTRL2 increases the on-state resistance of one or more components Ti to prevent the parameter of the branches Bi comprising these components Ti from continuing to increase in the manner described in relation to [Fig.l], due to the negative coefficient of variation of the on-state resistance of the components Ti with temperature.

[0071] According to one embodiment, the value range which is common to all the branches, and in which the circuit CTRL2 maintains the value of the parameter for each branch by modulating the control signals cmdi, is determined from a reference value valref.

[0072] For example, the range of values ​​shared between the branches Bi is defined by a lower bound equal to valref minus a given percentage of the value valref, and an upper bound equal to valref plus a given percentage of this value valref.

[0073] As an alternative example, the range of values ​​shared between the Bi branches includes only one value, namely the value valref. In this case, the CTRL2 circuit controls the on state of the Ti components so that the parameter is at the value valref in each of the Bi branches.

[0074] As another alternative example, the shared value range between the Bi branches extends from a zero value to the valref value, or to the valref value plus a given percentage of that valref value.

[0075] Optionally, the upper limit and / or the lower limit of the value range is partly determined by the value valref and, in addition, partly determined by a minimum value and / or a maximum value that each of the cmdi signals can take.

[0076] Indeed, a maximum value may be provided for the cmdi signals, beyond which overvoltage protection devices (not illustrated and not detailed) are triggered, for example to prevent the cmdi control signal of a Ti component from damaging or destroying the Ti component. Similarly, a minimum value may be provided for the cmdi signals, below which undervoltage protection devices (not illustrated and not detailed) are triggered, for example to prevent the cmdi control signal of a Ti component from being at a value where the Ti component is in the blocked state.

[0077] The value valref may be a value predetermined by the desired operation of the circuit DEV2. For example, in the case where the parameter observed is the current li in each branch, the value valref is determined by the current I that the component COMP2 must allow to flow between its terminals 100 and 102 when the components Ti are in the on state, and the value valref is, for example, equal to I / N. As an example al alternatively, in the case where the observed parameter is the temperature in each branch Bi, therefore in each component Ti, the value valref is determined by an operating temperature T of the component COMP2, and the value valref for example equal to T.

[0078] Rather than being a predefined value, the value valref may be a value calculated, for example by the circuit CTRL2, from the values ​​of the parameter measured in the branches Bi. For example, the value valref is equal to the average of the values ​​measured in the branches Bi.

[0079] Preferably, when the parameter observed in each branch Bi increases when the on-state resistance of the Ti component of the branch decreases, for example following an increase in the temperature of the Bi branch, the CTRL2 circuit is configured to increase the on-state resistance of the Ti component of the Bi branch when the value of the parameter measured for this Bi branch increases.

[0080] The implementation of the control of the resistance in the on state of each component Ti by the circuit CTRL2 so that an observed parameter has, in each branch Bi, a value included in a range of values ​​common to all the branches Bi, is within the reach of the person skilled in the art from the functional indications given above.

[0081] [Fig.3] represents, schematically and in the form of blocks, an example of a detailed embodiment of the CTRL2 circuit.

[0082] The circuit CTRL2 comprises, in this exemplary embodiment, a circuit CALC configured to calculate the reference value valref, from the values ​​of the parameter measured in the branches Bi. For this, the circuit CALC receives the measured values, for example the circuit CALC receives the signals vali, and provides the value valref, for example in the form of a signal ref whose value is determined by the value valref, equal to the average of the measured values. For example, the signal ref is equal to the average of the signals vali. In another example not shown, the reference value valref is predetermined, and the circuit CALC is configured to provide this predetermined value valref, for example to provide the signal ref at a value determined by the value valref, and the circuit CALC then does not receive the values ​​of the parameter measured in the branches Bi.

[0083] For each branch Bi, the circuit CTRL2 comprises, in this exemplary embodiment, a diffi circuit (diffl, diff2, diff3 in [Fig.3]) configured to determine the deviation (or difference) between the value valref provided by the circuit CALC, and the value measured for this branch Bi. Each diffi circuit provides a signal erri (errl, err2 and err3 in [Fig.3]) indicating the value of this deviation. For example, each diffi circuit receives the signal ref and the corresponding signal vali, and provides the signal erri, the latter being, for example, equal to the deviation between the signal ref and the signal vali.

[0084] For each branch Bi, the circuit CTRL2 comprises, in this example of mode of realization, a GENi circuit (GEN1, GEN2 and GEN3 in [Fig.3]) configured to provide the cmdi signal controlling the value of the resistance in the on state of the component Ti, from the difference between the value valref and the value of the parameter measured for this component Ti. For example, each GENi circuit receives the signal erri and provides the cmdi signal from the received signal erri.

[0085] Although this is not illustrated in [Fig.3], each GENi circuit can further be configured, when each component Ti comprises an on state and a off state, to receive a binary ON / OFF signal indicating, by a first binary state, that the components Ti must be controlled to the off state, and, by a second binary state, that the components Ti must be controlled to the on state. In this case, the modulation of the control signals cmdi as a function of the measured values ​​of the parameter in each branch Bi is only implemented when the ON / OFF signal is in its second binary state, and, when the ON / OFF signal is in its first binary state, the GENi circuits are preferably configured to force the signals cmdi to the same value suitable for controlling the components Ti to the off state.

[0086] According to one embodiment, as illustrated in [Fig. 3], each GENi circuit comprises a PI corrector circuit configured to provide a correction (or modulation) value to be applied to the signal cmdi, from the difference between the reference value valref and the value measured for the component Ti of the corresponding branch Bi. For example, each PI circuit receives the corresponding signal erri and provides a corresponding signal corri (corrl, corr2 and corr3 in [Fig. 3]). Furthermore, each GENi circuit comprises, in this example, a SAT circuit. Each SAT circuit is configured to receive the correction value to be applied to the corresponding signal cmdi, each SAT circuit receiving, for example, the corresponding signal corri, and to provide a corresponding signal scorri (scorrl, scorr2 and scorr3 in [Fig. 3]).Each scorri signal indicates a correction value to be applied to the cmdi signal such that this correction value is equal to that indicated by the corri signal if the correction value is between a minimum correction value and a maximum correction value, or equal to the maximum correction value if the correction value indicated by the corri signal is greater than the maximum correction value, and equal to the minimum correction value if the correction value indicated by the corri signal is less than the minimum correction value. In other words, each SAT circuit is configured to apply a saturation function to the correction value provided by the corresponding PI circuit.In other words, in this example, each SAT circuit is configured so that the cmdi signal supplied by the corresponding GENi circuit remains between a minimum value, for example a minimum value below which the component Ti is no longer controlled in the on state, and a maximum value, for example a maximum value above . which an overvoltage protection device is activated. Each GENi circuit further comprises a DRIVER circuit configured to provide the corresponding cmdi signal from a correction value that it receives, for example from the scorri signal that it receives.

[0087] By way of example, each DRIVER circuit is configured, when the corresponding component Ti is in the on state, to provide the signal cmdi at a value determined by a nominal value of the signals cmdi to which the correction value received by the DRIVER circuit is applied.

[0088] For example, in an embodiment where each GENi circuit receives the same ON / OFF signal, the DRIVER circuit of each GENi circuit receives this ON / OFF signal.

[0089] As an example, each PI circuit implements a proportional-integral type correction. As an alternative example, other types of correction may be implemented by the PI circuits, for example a proportional-integral-derivative type correction.

[0090] In the above exemplary embodiment, each GENi circuit applies, via its SAT circuit, a saturation function to the correction value to be applied to the cmdi signal, such that the value of the cmdi signal remains between a minimum value and a maximum value. In another example, the saturation function to be applied to the correction is configured only so that the value of the cmdi signal remains below a maximum value. In yet another example, the saturation function to be applied to the correction is configured only so that the value of the cmdi signal remains above a minimum value.

[0091] In a variant embodiment not illustrated, each GENi circuit does not apply a saturation function to the correction to be applied to the corresponding cmdi signal. In such a variant, the GENi circuits do not include a SAT circuit, and, in each GENi circuit, the DRIVER circuit receives a correction value directly from the corresponding diffi circuit, the DRIVER circuit receiving, for example, the corri signal instead of the scorri signal.

[0092] [Fig.4] represents, schematically and in the form of blocks, an example of a detailed embodiment of the DRIVER circuit of each of the GENi circuits of [Fig.3].

[0093] The DRIVER circuit receives a control signal Valim, for example a voltage, at a nominal value corresponding to, or determining, a nominal value of the signal cmdi. The same signal Valim is supplied to all the DRIVER circuits.

[0094] The DRIVER circuit further receives a signal indicating a correction to be applied to the cmdi signal. For example, this signal is the scorri signal in [Fig.4], although in other examples this signal may be the corri signal directly.

[0095] The DRIVER circuit comprises a MOD circuit configured to receive the signal indicating the nominal value of the cmdi signal and the signal indicating the correction value to be applied to this nominal value. The MOD circuit is further configured to provide a Valim-mod signal, for example a voltage, at a value equal to the nominal value of the cmdi signal to which the correction value received by the DRIVER circuit has been applied. For example, the Valim-mod signal is equal to the Valim signal modulated by the correction value received by the DRIVER circuit.

[0096] In the example of [Fig.4], each component Ti comprises a blocked state and a passing state, and the DRIVER circuit therefore receives the binary ON / OFF binary signal indicating, by a first binary state that the components Ti must be controlled to the blocked state, and, by a second binary state that the components Ti must be controlled to the passing state.

[0097] In the example of [Fig.4], the components Ti are N-channel MOS transistors, the voltages Valim and Valim-mod are positive and the first binary state, respectively the second binary state, of the ON / OFF signal is the high state, respectively the low state. In such an example, the DRIVER circuit then comprises an inverter INV powered by the voltage Valim-mod and receiving the ON / OFF signal at its input. The output of the circuit INV is coupled, for example by a resistor R, to the output of the DRIVER circuit on which the signal cmdi is available.Thus, when the ON / OFF signal is in the high state indicating that the Ti components must be controlled to the blocked state, the output voltage of the inverter is at a zero value suitable for controlling the corresponding Ti component to the blocked state, and, when the ON / OFF signal is in the low state indicating that the Ti components must be controlled to the on state, the output voltage of the inverter is at a value determined by the Valim-mod signal, for example at a value equal to that of the Valim-mod voltage, suitable for controlling the corresponding Ti component to the on state. For example, the Valim-mod voltage is then modulated downwards when the temperature or the current li in the Ti transistor increases.

[0098] The above example can be adapted to P-channel Ti transistors, by providing that the Valim and Valim-mod voltages are negative, the Valim-mod voltage then being, for example, modulated downwards in absolute value when the temperature or the current li in the Ti transistor increases.

[0099] In another example not shown, the components Ti are N-channel MOS transistors, the voltages Valim and Valim-mod are positive and the first binary state, respectively the second binary state, of the ON / OFF signal is the low state, respectively high. In such an example, the inverter INV of the DRIVER circuit is replaced by a buffer circuit ("Buffer" in English) powered by the voltage Valim-mod and receiving the ON / OFF signal on its input. Thus, when the ON / OFF signal is in the low state indicating that the Ti components must be controlled in the off state, the output voltage of the buffer circuit is at a zero value suitable for controlling the corresponding Ti component in the off state, and, when the ON / OFF signal is in the high state indicating that the Ti components must be controlled in the on state, the output voltage of the buffer circuit is at a value determined by the Valim-mod signal, for example at a value equal to that of the Valim-mod voltage, suitable for controlling the corresponding Ti component in the on state. For example, the Valim-mod voltage is then modulated downwards when the temperature or the current li in the Ti transistor increases.

[0100] The above example can be adapted to P-channel Ti transistors, by providing that the Valim and Valim-mod voltages are negative, the Valim-mod voltage then being, for example, modulated downwards in absolute value when the temperature or the current li in the Ti transistor increases.

[0101] In another example not shown, each component Ti does not include a blocked state, but only a passing state in which its resistance in the passing state is controlled by the corresponding cmdi signal. In this other example, the DRIVER circuit does not receive the ON / OFF signal and the INV circuit can be omitted, the output of the MOD circuit providing the Valim-mod signal then being coupled, for example by the resistor R, to the output of the DRIVER circuit providing the cmdi signal, or then being directly connected to this output of the DRIVER circuit. As another example, when the DRIVER circuit does not receive the ON / OFF signal, the DRIVER circuit is identical to that of [Fig.4] with the only difference that the input of the INV circuit receives a binary signal maintained in the same binary state, for example a low binary state.

[0102] In the embodiments and variants described above, the component Ti is an N-channel MOS transistor or a P-channel MOS transistor, and its control voltage cmdi is decreased in absolute value to increase its on-state resistance, and, conversely, increased in absolute value to decrease its on-state resistance. In other embodiments, this component Ti is an insulated gate bipolar transistor (IGBT), a thyristor, an integrated gate-commutated thyristor (IGTC), or more generally any controllable semiconductor component with a negative coefficient of variation of the on-state resistance of the component with temperature, the control applied to the component determining the value of the on-state resistance of the latter.

[0103] According to one embodiment, the circuit CTRL2 described previously in relation to [Fig.2] is configured to alternately control the blocked state simultaneously of all the components Ti, and the passing state simultaneously of all the components, by adapting the control signals cmdi when the components Ti are controlled to the passing state so as to maintain, for each branch, the value of the parameter in a range of values ​​common to all branches. In such an embodiment, the component C0MP2, that is to say the branches Bi connected in parallel, implement a switch of an electronic system, for example of a voltage or current converter.

[0104] According to an embodiment where the component COMP2 implements a switch of an electronic system, the circuit CTRL2 receives the ON / OFF signal, a first binary state of which controls the blocked state of the Ti components, i.e. the blocked state of the switch implemented by the Bi branches, and a second binary state of which controls the on state of Ti components, i.e. the on state of the switch implemented by the Bi branches. As an example, in this case, when the ON / OFF signal is in its second binary state (Ti components on), the circuit CTRL2 controls the resistances in the on state of the Ti components in the manner described previously, and, when the ON / OFF signal is in its first binary state (Ti components off), the circuit CTRL2 controls the Ti components in the off state, for example with identical cmdi signals.

[0105] In the embodiments and variants described above, each of the identical branches Bi connected in parallel comprises only the semiconductor component Ti and the corresponding measuring circuit MESi. In variant embodiments not illustrated, each of the identical branches Bi may further comprise one or more other elements, for example connected in series with the component Ti, for example one or more resistors.

[0106] In the embodiments and variants described above, the semiconductor component Ti having a resistance in the on state with a negative coefficient of variation with temperature is a MOS transistor having an on state and an off state. The resistance in the on state of the component is then the resistance of the component Ti, taken between its two conduction terminals, when the component is controlled in the on state, or, in other words, when these semiconductor components of the branches connected in parallel are controlled so that a non-zero current flows between the terminals 100 and 102, in each of the branches Bi. In non-detailed embodiment variants, the semiconductor component, for example a controllable resistor, does not comprise two distinct on and off states, but has between these two conduction terminals, a resistance having a value controlled by the control signal cmdi received by the control terminal of the component.In these variants, the resistance between the two conduction terminals of the component is called the on-state resistance although the component does not have an off-state and a non-zero current can flow through it permanently.

[0107] Various embodiments and variations have been described. The person skilled in the art will understand that certain features of these various embodiments and variants could be combined, and other variants will occur to those skilled in the art. In particular, those skilled in the art are able to provide other implementations of the CTRL2 circuit than that described in relation to [Fig. 3], from the functional indications given above. Furthermore, the present description is not limited to the examples of embodiments and variants described where N is equal to 3, but applies to any value of the number N greater than or equal to 2, preferably greater than or equal to 3.Furthermore, the parameter whose value depends on the resistance in the on state of the Ti components which is evaluated in each branch Bi so as to maintain, thanks to cmdi signals, its value in a range of values ​​common to all the branches is not limited to the examples given where this parameter is the current li the temperature in each branch Bi, that is to say in each Ti component.

[0108] Finally, the practical implementation of the embodiments and variants described is within the reach of those skilled in the art from the functional indications given above.

Claims

Claims

1. Device (DEV2) comprising two terminals (100; 102) and at least two identical branches (Bl, B2, B3) connected in parallel between said two terminals, each branch comprising: - a semiconductor component (Tl, T2, T3) having a control terminal configured to receive a control signal (cmdl, cmd2, cmd3) of an on-state resistance of the component between first and second conduction terminals of the component, the on-state resistance of the component having a negative coefficient of variation with temperature;and - a measuring circuit (MES1, MES2, MES3) of a value of a parameter of said branch, the device further comprising a control circuit (CTRL2) configured to receive the measured values ​​(vall, val2, val3), supply the control signal to the component of each branch and modulate the control signal of each branch so as to maintain the value of the parameter of said branch in a range of values ​​identical for all the branches.;

2. Device according to claim 1, in which, in each branch (B1, B2, B3), the value of the parameter is at least partly determined by the on-state resistance of the component (T1, T2, T3) of said branch.

3. A device according to claim 1 or 2, wherein the semiconductor is diamond.

4. Device according to any one of claims 1 to 3, in which the component (T1, T2, T3) is a MOS transistor.

5. Device according to any one of claims 1 to 4, in which, in each branch (B1, B2, B3), the semiconductor component (T1, T2, T3) is in series with at least one other element, for example a resistor.

6. Device according to any one of claims 1 to 4, wherein each branch (B1, B2, B3) comprises only said component (T1, T2, T3) and the measuring circuit (MES1, MES2, MES3).

7. Device according to any one of claims 1 to 6, in which the control circuit (CTRL2) is configured to modulate the control signal (cmdl, cmd2, cmd3) of each branch (Bl, B2, B3) independently of the control signals of the other branches.

8. Device according to claim 7 taken in its dependence on claim 4, in which the control circuit (CTRL2) is configured to modulate the control signal (cmdl, cmd2, cmd3) of each branch (Bl, B2, B3) so as to increase the resistance in the on state of the transistor (Tl, T2, T3) of the branch when the value of the parameter varies and reflects a reduction in the resistance in the on state of the transistor.

9. Device according to any one of claims 1 to 8, in which the value range is determined by the control circuit (CTRL2, CALC) from a reference value (ref) equal to an average of the measured values ​​(vall, val2, val3).

10. A device according to claim 9, wherein the value range comprises only the reference value.

11. Device according to claim 9, wherein the value range is further determined by a maximum value and / or a minimum value of the control signals.

12. Device according to any one of claims 1 to 11, wherein said parameter is a current (II, 12, 13) flowing in the branch (Bl, B2, B3), between the conduction terminals of the component (Tl, T2, T3) of the branch.

13. Device according to any one of claims 1 to 11, wherein said parameter is a temperature of said branch (Bl, B2, B3), preferably of the component (Tl, T2, T3) of said branch.

14. Electronic system comprising a device (DEV2) according to any one of claims 1 to 13, wherein said at least two branches (B1, B2, B3) implement, between said two terminals (100; 102), a switch of the system.

15. System according to claim 14, wherein the control circuit (CTRL2) is configured to receive a binary signal having a first binary state controlling the on state of the components (T1, T2, T3), and a second binary state controlling the off state of the components.

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