SYNCHRONOUS RECTIFICATION METHOD AND BATTERY CHARGER EMPLOYING SUCH A METHOD

The method optimizes synchronous rectification in battery chargers by incrementally adjusting slave transistor closing times, addressing efficiency losses from parasitic diodes, thereby enhancing charger performance.

FR3160525A1Pending Publication Date: 2025-09-26VITESCO TECHNOLOGIES GMBH
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
FR2024002965
Authority / Receiving Office
FR · FR
Patent Type
Applications
Current Assignee / Owner
Filing Date
2024-03-25
Publication Date
2025-09-26

AI Technical Summary

Technical Problem

Existing synchronous rectification methods in battery chargers require complex and expensive closed-loop control systems or large safety margins, leading to reduced efficiency due to parasitic diode conduction losses.

Method used

A method for synchronous rectification in battery chargers that adjusts the closing time of slave transistors using incremental adjustments based on a control parameter, optimizing efficiency by minimizing parasitic diode conduction and avoiding efficiency drops.

Benefits of technology

Enhances the efficiency of battery chargers by precisely controlling transistor conduction times, reducing losses and maintaining optimal performance across varying operating conditions.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

A method of synchronous rectification in a charger adapted to connect to the network on the one hand and to a battery on the other hand comprises a bidirectional DC-DC converter having an inverter, a transformer and a rectifier. A primary side is defined as a side of the converter receiving the current and a secondary side is defined as a side of the converter through which the current leaves. The inverter and the rectifier each comprise at least transistors which can be primary or secondary depending on the charging direction. At least one secondary transistor, called a slave transistor, is controlled according to the master transistor. The method comprises the steps of incrementing a closing time of the slave transistor by a first predefined increment, then determining a corresponding variation of a control parameter.If the variation in absolute value is greater than a threshold value, decrease the closing time of the slave transistor by a second predefined increment greater than or equal to the first increment. Abstract figure: Figure 2.
Need to check novelty before this filing date? Find Prior Art

Description

Title of the invention: SYNCHRONOUS RECTIFICATION METHOD AND CHARGER BATTERY EMPLOYING SUCH A METHOD Technical field

[0001] The present disclosure relates to the field of battery chargers, and more particularly to a method for optimizing battery chargers, in particular for on-board batteries in the automotive sector. Prior art

[0002] An automobile battery charger generally includes a converter, which has the following components: an inverter that transforms rectified direct current (DC) from the grid into alternating current (AC), a transformer, and a rectifier that transforms the alternating current (AC) into direct current (DC) to be distributed to the battery.

[0003] When the charger is bidirectional, the inverter or rectifier function can be on the battery side or the network side, depending on the charging direction. To avoid confusion, we can instead speak of a primary side and a secondary side of the converter. The primary side can be defined as the side of the converter through which the current enters, and the secondary side as the side of the converter through which the current leaves. Thus the primary side can be on the network side or the battery side depending on the charging direction.

[0004] Synchronous rectification is a technique used in power supply to convert alternating current (AC) energy to direct current (DC) energy in the rectifier more efficiently.

[0005] Unlike passive rectification, which uses diodes, synchronous rectification involves the use of transistors, such as MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) to perform the rectification. These transistors are controlled by a circuit that synchronizes their operation with the AC input. When the AC input is positive, the transistor is closed to allow current to flow, and when the AC input is negative, a different transistor is closed.

[0006] Within transistors, parasitic diodes exist. Indeed, transistors have a diode body (also called a parasitic diode), which provides passive rectification on the battery side in charge mode, and on the network side in discharge mode. This behavior is intrinsic to the transistor and generates significant losses, which degrade the performance of the converter.

[0007] Synchronous rectification allows the appropriate transistors to be closed when their parasitic diodes conduct current, in order to limit conduction through the diodes, and therefore to optimize the efficiency and thermal heating of the product.

[0008] Among the existing synchronous rectification strategies, there are those which require a current measurement at the high voltage transformer on the rectifier side, which makes it possible to automatically close the transistors when the current begins to flow in the diodes.

[0009] Since synchronous rectification is intended to increase the efficiency of the converter, closed-loop control of the pulse duration is possible based on an efficiency that can be evaluated with current and voltage sensors at the input and output of the converter. These methods are complex to implement and expensive.

[0010] Determining the times when the parasitic diodes start to conduct can alternatively use a predictive model, called "Simplified Synchronous Rectification". The conduction times of the rectifier MOSFETs are calculated by determining the time when the parasitic diodes start to conduct and then closing the corresponding transistors.

[0011] A disadvantage of this solution is that it requires large safety margins which reduce the efficiency of the converter. Summary

[0012] A method of synchronous rectification is proposed in a charger adapted to connect to the network on the one hand and to a battery on the other hand, the charger comprising a high voltage bidirectional DC-DC converter with resonant circuit, the converter comprising an inverter, a transformer and a rectifier arranged in this order, for a given charging direction a primary side is defined as a side of the converter receiving the current and a secondary side is defined as a side of the converter through which the current leaves, the inverter and the rectifier each comprising at least one pair of transistors, operating in phase opposition, the transistors being able to be primary or secondary depending on the charging direction, at least one of the primary transistors, called master transistor, having its opening and closing controlled by a control unit using a control parameter, the control parameter having an initial control value,the control unit controlling at least one secondary transistor, called slave transistor, a command of which is based on a command of the master transistor, the slave transistor having a closing duration with an initial closing value less than a closing duration of the master transistor, the method comprising the following steps, implemented for a predetermined control instruction, the master transistor being, controlled by the control unit using said control parameter according to the control instruction: - Step 1. As long as the closing time of the slave transistor is less than the closing time of the master transistor, increment the closing time of the slave transistor by a first predefined increment, then determine a corresponding variation of the value of the control parameter, - Step 2. If said variation in absolute value is greater than a threshold value, decrease the closing time of the slave transistor by a second predefined increment, the second increment being greater than or equal to the first increment, otherwise return to step 1, and - Step 3. Define the closing time of the slave transistor as the time obtained in step 2.

[0013] The invention cleverly exploits the fact that the efficiency of the converter and the value of the control parameter are linked. In particular, a sudden drop in the efficiency of the converter implies a sudden variation in the value of the control parameter. The method according to the invention thus proposes to increase in successive increments the closing time of the slave transistor, until a critical point in terms of converter efficiency is exceeded. This critical point of efficiency is observed via the value of the control parameter. The closing time of the slave transistor is then slightly reduced, so as to be placed just below this critical point, i.e. at an optimum efficiency of the converter.

[0014] According to another aspect, there is provided a computer program comprising instructions for implementing all or part of a method as defined herein when this program is executed by a processor. According to another aspect, there is provided a non-transitory, computer-readable recording medium on which such a program is recorded.

[0015] The features set out in the following paragraphs may, optionally, be implemented, independently of one another or in combination with one another: - the control instruction includes a current instruction at the converter output, on the rectifier side (battery side), and / or a voltage instruction at the converter input, on the inverter side (grid side). Throughout the text, the expressions "on the rectifier side" and "on the inverter side" refer to the devices listed above, and not to the rectification and ripple functions which may be located on one side or the other of the bidirectional converter depending on the load direction, as explained in the introduction. In any case, the control instruction relates to a quantity measured on the rectifier function side, i.e. on the secondary side, which corresponds to the side of the device called rectifier in the battery charging direction and on the side of the device called inverter in the battery discharging direction. When the converter is used to charge the battery, the control setpoint advantageously includes a current setpoint at the converter output (the output voltage being fixed to the battery voltage value). When the converter is used in the discharging direction, the control setpoint advantageously includes a converter input voltage setpoint. - the master transistor is controlled by the control unit according to the control setpoint, so that an output current of the converter, on the rectifier side, respectively an input voltage of the converter, on the inverter side, is substantially equal to the control setpoint. - the method further comprises: - a first step of determining operating conditions, implemented before step 1, to determine initial operating conditions; - at least a second step of determining operating conditions, implemented subsequently, to determine current operating conditions; the method further comprising a storage of the initial operating conditions and a comparison, for each second step of determining operating conditions, between the current operating conditions and the initial operating conditions. - the operating conditions include at least one of: a temperature value in the converter; a voltage value at the input of the converter on the inverter side and a voltage value at the output of the converter on the rectifier side; and a value of the control setpoint. - the method further comprises a step of determining a variation between the current operating conditions and the initial operating conditions, and of resetting the closing time of the slave transistor and returning to step 1 when said variation exceeds at least a predetermined threshold. - the current operating conditions are determined in step 1 and / or step 3. - the first increment is predefined as being at most 1 / 10 of the initial closing value of the slave transistor. - the second increment is at least twice as large as the first increment. - the initial closing value of the slave transistor is determined using a predictive model and / or by experimentation. - the control parameter is made up of one of the following quantities: a switching frequency of the master transistor, the closing time of the master transistor, and a phase shift between the primary transistors.

[0016] According to another aspect, there is provided a battery charger adapted to connect to the network on the one hand and to a battery on the other hand, the charger having a high voltage bidirectional DC-DC converter with resonant circuit, the converter having an inverter, a transformer and a rectifier in this order, for a given charging direction, a primary side is defined as a side of the converter receiving the current and a secondary side is defined as a side of the converter through which the current leaves, the inverter and the rectifier each comprising at least one pair of transistors, operating in phase opposition, the transistors being able to be primary or secondary depending on the charging direction, at least one of the primary transistors, called master transistor, having its opening and closing controlled by a control unit using a control parameter, the control parameter having an initial control value,the control unit controlling at least one secondary transistor, called slave transistor, a command of which is based on a command of the master transistor, the slave transistor having a closing duration with an initial closing value less than a closing duration of the master transistor, the charger being configured to implement the above method.

[0017] According to another aspect, there is provided a computer program comprising instructions for implementing the above method when this program is executed by a processor.

[0018] According to another aspect, there is provided a non-transitory recording medium readable by a computer on which is recorded a program for implementing the above method when this program is executed by a processor. Brief description of the drawings

[0019] Other characteristics, details and advantages will appear on reading the detailed description below, and on analyzing the attached drawings, in which:

[0020] [Fig. 1] shows a partial diagram of a battery charger according to one embodiment.

[0021] [Fig.2] shows a diode current graph over time (top graph), a primary transistor conduction graph over time (middle graph), and a secondary transistor conduction graph over time (bottom graph), according to an example.

[0022] [Fig.3] shows a flowchart of a synchronous rectification method according to an embodiment that can be implemented in the charger of [Fig.l].

[0023] [Fig.4] shows a graph of the switching frequency of the master transistor as a function of the closing time (also called "conduction time" or "pulse duration") of the slave transistor of the charger of [Fig.l], according to one embodiment.

[0024] [Fig.5] shows a graph of the efficiency of the charger of [Fig.l] as a function of the conduction time of the slave transistor, according to one embodiment. Description of the embodiments

[0025] Reference is now made to [Fig.l] which schematically shows an example of a high voltage DC-DC converter (for example for the automotive field at present, greater than 30V, preferably greater than 100V, for example between 100 and 3000V, more preferably between 300V and 1000V, for example 800V) bidirectional for use in a battery charger. The battery may, but is not limited to, be an automotive battery. The battery could be a battery for an application other than automotive. [Fig.l] illustrates only certain components of the converter, useful for the present description.

[0026] A charger 10 for battery 12 is connectable to the network 14 via a power factor corrector 15. The charger 10 comprises a converter 16 and a filter 18 for attenuating the current ripples at the output of the converter 16. According to one embodiment, the charger 10 is an on-board charger. However, the charger 10 could be external for rapid charging of the battery 12, for example.

[0027] The converter 16 has three components: an inverter 20, a transformer 22, and a rectifier 24, arranged in this order. The converter 16 is bidirectional. The charging direction can therefore be from the network 14 to the battery 12 (called "charging"), or vice versa from the battery 12 to the network 14 (called "discharging"). Thus the inverter 20 identified in the figure on the network 14 side indicates that the charging direction in [Fig.l] is from the network 14 to the battery 12. If the charging direction were from the battery 12 to the network 14 (discharging), then what is called here "inverter 20" would act as a rectifier and vice versa (without changing the arrangement of the structural components). In other words, element 20 in the figure would formally play the role of a rectifier, and element 24 in the figure would formally play the role of an inverter.

[0028] In order to adopt a designation for bidirectionality in this description, the following convention will be adopted: a primary side is defined as the side of the charger 10 through which the current enters, and a secondary side as the side of the charger 10 through which the current leaves. Thus the primary side can be on the network side 14 or on the battery side 12 depending on the charging direction.

[0029] In [Fig.l], the inverter 20 comprises two transistors Ql, Q2, for example of the MOSFET type, which are in phase opposition (so-called “half bridge” configuration). The transistors Ql and Q2 are connected to a control unit 30 which, depending on the case, controls their opening and closing. The control of the transistor Q2 can be based on the control of the transistor Ql by the control unit 30 and vice versa. Although [Fig.l] shows a “half bridge” configuration of the inverter 20 (two transistors Ql, Q2), it could be that depending on the applications, the inverter 20 has four transistors (so-called “full bridge” configuration).

[0030] In [Fig.l], the rectifier 24 comprises four transistors Q3, Q4, Q5, Q6, for example of the MOSFET type, (so-called “full bridge” configuration) connected to the control unit 30 which, depending on the case, controls their opening and closing. The transistors Q3 and Q6 operate in phase opposition with respect to the transistors Q4 and Q5. According to one example, the transistors Q3 and Q6 operate in phase, and the transistors Q4 and Q5 also operate in phase. The control of the transistors Q3 and Q6 can be based on the control of the transistors Q4 and Q5 by the control unit 30, and vice versa. Although [Fig.l] shows a “full bridge” configuration of the rectifier 24, it could be that depending on the applications, the rectifier has only two transistors (so-called “half bridge” configuration).

[0031] The primary side includes one or more transistors called "Master transistors" (a single master transistor in a so-called "half bridge" configuration, or half-bridge circuit, two master transistors in a so-called "full bridge" configuration, or full bridge circuit). Each master transistor is controlled by the control unit 30, using a control signal, called the master control signal. The control unit 30 controls all the transistors on the secondary side, called slave transistors, by a synchronous rectification command which depends on the command of the master transistor(s). When the charging direction is reversed, the primary side corresponds to the battery side and the secondary side corresponds to the network side.

[0032] Even if the present disclosure will use the word master or slave transistor in the singular, it is understood that there could be several master and / or slave transistors, for example two master transistors for the “full bridge” case between two transistors in phase.

[0033] When the charge direction is reversed, the slave transistor becomes the master transistor on the primary.

[0034] The control of the opening and closing of the transistors is done by the control unit 30 according to the charge direction. The control unit 30 controls a master transistor of the primary (Q1 in the charge direction and Q3 in the discharge direction for the example of [Fig.1]). This master transistor will involve the control of the slave transistor of the secondary (Q3 in the charge direction and Q1 in the discharge direction). Furthermore, since Q1 is out of phase with Q2, the behavior of Q2 will be determined by the behavior of Q1. Similarly, since Q6 is in phase with Q3, the behavior of Q6 will be determined by the behavior of Q3. And since Q4 and Q5 are out of phase with Q3, the behavior of Q4 and Q5 will be determined by the behavior of Q3.

[0035] Indeed, when the direction of the current is in charge (from the network 14 to the battery 12), the inverter 20 is on the primary side, the transistors Q1 and Q2 are then primary transistors, and the control of the transistors will be done via the transistor Q1 (which is then the master transistor) by the control unit 30. When the direction of the current is in discharge (the battery 12 to the network), the inverter 20 is on the secondary side and the transistors Q1 and Q2 are then secondary transistors which will follow the behavior of the master transistor Q3 among the primary transistors Q3, Q4, Q5, Q6, the master transistor of the primary transistors controlling the slave transistor of the secondary transistors.

[0036] The control unit 30 controls the master transistor (in the example of [Fig.l] Ql in the case of charging from the network 14 to the battery 12, and Q3 in the opposite direction) using a control parameter and in such a way as to minimize the difference between the control setpoint and a measurement of the output current of the converter 16 on the rectifier 24 side, respectively a measurement of the input voltage of the converter 16 on the inverter 20 side (depending on what has been chosen as the control setpoint).

[0037] The control parameter can be a switching frequency of the master transistor Fm (or period), a pulse duration Tm (or duty cycle) of the master transistor, or a phase shift between the primary transistors in so-called “full bridge” configurations (in the example of [Fig.l], a shift between Q3 and Q5 or Q6 if the charging direction is from the battery 12 to the network 14).

[0038] The control parameter is controlled by the control unit 30 according to a control setpoint, the value of which is predetermined (for example at the start of the process). According to one embodiment, the control setpoint is an output current setpoint of the converter 16 on the rectifier 24 side and / or an input voltage setpoint of the converter 16 on the inverter 20 side. The master transistor is controlled by the control unit 30 according to the control setpoint, so that an output current of the converter 16, on the rectifier 24 side, respectively an input voltage of the converter 16, on the inverter 20 side, is substantially equal to the control setpoint. By “substantially equal” is meant that the difference between the measurement and the control setpoint is less than or equal to 5%, more preferably 1% of the control setpoint.

[0039] The choice of the control parameter may depend on the configuration of the converter, i.e. whether the primary and secondary are respectively in “full bridge” or “half bridge”. For example, the control parameter “frequency switching parameter » Fm of the master transistor can be used in « full bridge » and in « half bridge » of the primary, the « pulse duration » control parameter Tm of the master transistor can be used in « half bridge » of the primary only, and the « phase shift » control parameter of the master transistor can be used in « full bridge » of the primary only.

[0040] The master transistor has its opening and closing controlled by the control unit 30 using the control parameter so as to obtain a predetermined current value at the output of the converter 16, called the setpoint current, and / or a predetermined input voltage value of the converter 16, called the setpoint voltage (depending on what has been chosen as the control setpoint). Indeed, the value of the control parameter makes it possible to set the output current of the converter 16 and / or the input voltage of the converter 16 whether in charge to the battery 12 or in discharge to the network. The value of the control parameter is calculated as a function of the difference between the control setpoint and the measured value(s).

[0041] The secondary transistors (Q1 / Q2, or Q3 / Q4 / Q5 / Q6 depending on the load direction) have parasitic diodes. A synchronous rectification method 50 will be described below to minimize the losses associated with these parasitic diodes. Indeed, to limit the losses, the method consists of determining the moment when the parasitic diodes of the secondary transistors begin to conduct current in order to immediately close the corresponding transistors.

[0042] The transformer 22 of the converter 16 is a resonant circuit. The resonant circuit comprises, according to one embodiment, a resonant capacitor on the primary side CrP, a resonant capacitor on the secondary side CrS, a magnetizing inductance Lm and a leakage inductance LiPS. These components may be taken into account in the method described below in determining the initial closing time Te-in.

[0043] Referring now to [Fig.2], diagrams of conduction times of the master transistor (middle diagram) and the slave transistor are illustrated. In the case of charging from the network to the battery 12, the primary transistor is Q1 and the slave transistor is transistor Q3. In the case of charging from the battery 12 to the network 14, the primary transistor is Q3 and the slave transistor is transistor Q1.

[0044] The master transistor has a closing time Tm greater than the closing time Te of the slave transistor (bottom diagram; the closing time corresponds to a conduction time of the transistor). As the master transistor controls the closing of the slave transistor, the closing pulse of the slave transistor is almost simultaneous with the closing pulse of the master transistor (the delay between the two pulses can be fixed. This delay is not visible in [Fig.2]). The closing time Te of the slave transistor is determined according to the method 50 which will be described below, from a initial closing value Te-ini of closing duration Te which will be corrected by method 50.

[0045] The initial value of the turn-on time Te-ini of the slave transistor may be based on a predictive model and / or by experimentation. Whether a predictive model and / or experimentation is used, the initial turn-on time Te-ini may be determined by an open-loop strategy by taking into account operating conditions of the converter 16 such as the voltage of the network 14, the voltage of the battery 12, the current of the battery 12 or the switching frequency of the master transistor, and by taking into account the least favorable operating conditions and the tolerances of the components. The interest of correcting the initial turn-on value Te-ini via the method 50 is to optimize the turn-on time Te. The open-loop strategy for finding Te-ini implies that the turn-on time Te-ini will be shorter than the effective conduction time of the parasitic diode, which will result in a suboptimal efficiency of the converter 16 because of the losses in the diode.At the same time, the initial closing time Te-ini is smaller than the closing time Tm otherwise the efficiency of the converter 16 will be compromised due to a reversal of the current direction.

[0046] The initial closing time Te-ini can be calculated as the closing time Tm minus the delay between the pulse of the master and slave transistors minus a dead time. The dead time can take into account the characteristics of the resonant circuit.

[0047] [Fig.2] also illustrates the evolution of the parasitic diode current (top diagram). Tm represents the closing time of the master transistor. PT represents the conduction time of the parasitic diode, a function of Tm. In this example, but in a non-limiting manner, the closing time Tm of the master transistor is greater than the conduction time of the parasitic diode PT. The closing time Te of the slave transistor is chosen to be less than PT, in order to preserve the efficiency of the converter 16. In order to guarantee this condition, it is known in the prior art to provide a margin between the closing time Te of the slave transistor and the conduction time of the parasitic diode PT. The margin is identified by hatching on the top graph, in [Fig.2], and by the arrow Ma on the bottom graph. In a known manner, the value of this margin comes from a model which takes into account the different dispersions of the converter.The method according to the invention aims to minimize the duration of this margin, so as to maximize the efficiency of the converter. As described below, the method according to the invention is configured to increment the value of Te with nevertheless the constraint of keeping Te less than or equal to Tm.

[0048] Referring now to [Fig. 3], a flowchart illustrates the synchronous rectification method 50. The method 50 is adapted to be implemented in a charger such as the charger 10. A computer program comprising instructions for the implementation of the method is obtained when this program is executed by a processor. The processor may be the control unit 30. The loader 10 further includes a non-transitory recording medium readable by a computer on which is recorded a program for implementing the method 50 when this program is executed by the processor. The loader 10 further includes a memory comprising the instructions of the computer program.

[0049] The method 50 can be activated when the setpoint current is above a value for which it is considered that the losses in the parasitic diodes are significant. According to one example, the method 50 is activated if the current is above 2 amperes (i.e. 20% of the maximum current). Whether or not the method 50 is triggered can depend on the power, the currents used, and the voltage of the battery 12. According to one embodiment, if the setpoint is the input voltage of the converter 16, the method 50 can be activated if a measured current threshold is above a value for which it is considered that the losses in the parasitic diodes are significant.

[0050] In initialization step 52, the closing time Te of the slave transistor takes the initial closing value Te-ini. The control parameter also takes an initial control value. For example, if the control parameter is the switching frequency Fm of the master transistor, its initial control value is Fm-ini.

[0051] In step 54, the initial operating conditions of the method 50 are first determined. The determination of the initial operating conditions can be carried out at the same time as step 52, or at another time. According to one embodiment, the initial operating conditions comprise in particular a control setpoint value, which is assumed to be constant, or substantially constant (i.e. within a range of predetermined values) during the implementation of the method. Advantageously, the initial operating conditions also comprise an initial voltage value at the input on the side of the inverter 20 and at the output on the side of the rectifier 24 of the converter 16 and / or at least one temperature of a component of the converter 16 or in the immediate vicinity of said converter 16. The operating conditions can include any other operating condition determining the conduction time of the parasitic diode.The initial operating conditions can be stored during the implementation of the process.

[0052] Subsequently, and advantageously, it is checked whether the current operating conditions do not deviate too much from said initial conditions. The determination of a variation between the current operating conditions and the initial operating conditions can be done by providing a predetermined threshold per quantity used for the operating conditions (temperature, voltage, and / or setpoint). The thresholds can be independent for each quantity. Alternatively, the variations of the different quantities used for the operating conditions can be combined with each other to define a variation index associated with a predetermined threshold.

[0053] For example, if the operating conditions include the control setpoint and the control setpoint is a setpoint current, it will be verified in the remainder of the method 50 that the current at the output of the converter 16 has at most 0.5 Amperes difference with an initial value of the setpoint current.

[0054] If the operating conditions involve checking the input or output voltage of the converter 16, it will then be checked in the remainder of the method 50 that the input or output voltage of the converter 16 has at most 5 Volts, and preferably 10 Volts of difference, with the value of the initial operating conditions.

[0055] Advantageously, if it is determined during the implementation of the method that variations in the operating conditions are too significant (i.e. exceed a predetermined threshold) compared to the initial operating conditions, then the closing time of the slave transistor is reset and the procedure returns to step 52.

[0056] In step 56, the closing time Te of the slave transistor (which, due to step 52, is initially at the value Te-ini) is incremented by a first predefined increment D1. The first predefined increment D1 is chosen to allow the method 50 to converge towards a final value of Te quickly (i.e., D1 chosen to be large enough), while maintaining precision on the final value of Te found with respect to a critical value of Te for which the efficiency of the converter 10 is compromised (i.e., D1 not too large). The first increment D1 is, according to one embodiment, predefined as being at most 1 / 10 of the initial conduction time Te-ini of the slave transistor.

[0057] Once in step 56, the conduction duration Te of the slave transistor is incremented by the first predefined increment D1, we move on to step 58 to check whether this increment is valid for the charger 10. Indeed, the conduction duration Te of the slave transistor will be incremented in the method, from its initial closing value Te-ini, by the first predefined increment D1 until a drop in the value of the control parameter is observed, which in fact corresponds to a degradation of the efficiency E of the converter 10.

[0058] At the same time, the conduction time Te of the slave transistor must always be less than the conduction time Tm of the master transistor. Therefore, there is only a transition to step 58 if the new value of Te (incremented by Dl) is less than the conduction time Tm of the master transistor.

[0059] Thus, in step 58, a corresponding variation in the value of the control parameter of the converter 16 is determined, in order to evaluate a variation in the efficiency of the converter 16 following the enlargement of the conduction time Te of the slave transistor by the first increment D1, by the closed loop of the output current and the control of the transistors at the primary of the converter 16. As discussed above, the control parameter of the master transistor can be, depending on the construction of the converter 16: the switching frequency Fm of the master transistor, the closing time of the master transistor Tm, a temperature of the components, or even the phase shift between the primary transistors.

[0060] If we take for example, the switching frequency Fm of the master transistor, and referring to [Fig.4], each point of the graph represents the value of the switching frequency Fm of the master transistor as a function of the conduction time Te (in microseconds) of the slave MOSFET incremented each time that step 56 takes place. We note that for each increment of the conduction time Te of the slave transistor by the first increment D1, an increment of the switching frequency Fm of the master transistor takes place, and that the plotted curve is globally monotonous. In this particular example, there appears a small decrease in the switching frequency Fm between two adjacent values ​​around 1.8 microseconds without consequence. On the other hand, there is a strong decrease in the value of the switching frequency Fm of the master transistor around 2.5 microseconds.The value that is well below the other values ​​is highlighted by a circle in [Fig.4].

[0061] This strong decrease corresponds to a variation in absolute value of the switching frequency Fm of the master transistor which is greater than a threshold value. This strong decrease signals the exceeding of a critical point corresponding to a maximum efficiency of the converter. Indeed, when the critical point is exceeded, a reverse current flow appears over the time during which the closing time Te of the slave transistor exceeds the conduction time of the parasitic diode PT, which has the effect of reducing the quantity regulated by the control setpoint (input voltage or output current of the converter, as detailed above). The control unit 30 then reacts to this current variation by adapting the switching frequency Fm of the master transistor, as illustrated in [Fig. 4]. The loss of efficiency of the charger 10 following this last increment can also be seen on the graph of [Fig.5], is visible by a sudden drop in efficiency around the same pulse duration Te of 2.5 microseconds. The value which is well below the other values ​​is highlighted by a circle in [Fig.5].

[0062] Thus in step 58, after each increment of the conduction duration Te of the slave transistor (such that the conduction duration Te remains less than the duration conduction frequency Tm), an absolute value of the variation of the control parameter is calculated. If, for example, the switching frequency Fm of the master transistor is taken as a control parameter, an absolute value of the variation of the switching frequency Fm of the master transistor is calculated (between the currently determined value Fm (n) and the previously determined value Fm (n-1) or the initial value Fm-ini if ​​step 58 is implemented for the first time after initialization in step 52) and it is compared to a threshold value Fs. If the absolute value of the variation of the switching frequency Fm of the master transistor is greater than the threshold value Fs, the next step 60 is moved to, otherwise, the next step 54 is returned to.

[0063] The threshold value Fs may, according to one embodiment, be determined as follows. At each increment, the difference between the higher and lower values ​​of the frequency Fm determined so far in steps 58 is taken. For example, this difference is found to be 0.3 kHz. This difference may be stored in a database and updated each time step 58 is implemented. The threshold value may then, according to one example, be determined as 1 / 3 of this difference, i.e. 0.1 kHz.

[0064] In step 60, since it has been determined in step 58 that the variation in absolute value of the switching frequency Fm is greater than the threshold value Fs, the conduction time of the slave transistor Te is then reduced by a second predefined increment D2. Indeed, reducing the conduction time of the slave transistor Te in step 60 makes it possible to exit the critical zone where the efficiency of the converter 16 drops (highlighted by the drop in switching frequency Fm of the master transistor). Thus, the second increment D2 is greater than or equal to the first increment D1. The second increment D2 is for example at least twice as large as the first increment DL

[0065] When the conduction time of the slave transistor Te is reduced by the second predefined increment D2 in step 60, we move on to step 62, where the operating conditions are checked again.

[0066] If the operating conditions are substantially unchanged compared to step 54 (and if they are still substantially constant, or stable), are still verified (same verification as that made in step 54), then in step 64, the conduction duration Te of the slave transistor is defined as the duration obtained in step 60, otherwise we return to step 52.

[0067] In variants, the stability of the operating conditions (relative to the initial conditions, in particular) is verified at more or less frequent intervals.

[0068] Method 50 makes it possible to adjust the conduction time of the transistors without determining the diode current.

Claims

1. Claims Method (50) for synchronous rectification in a charger (10) adapted to connect to the network on the one hand and to a battery (12) on the other hand, the charger comprising a high voltage bidirectional DC-DC converter (16) with resonant circuit, the converter (16) comprising an inverter (20), a transformer (22) and a rectifier (24) arranged in this order, for a given charging direction a primary side is defined as a side of the converter (16) receiving the current and a secondary side is defined as a side of the converter (16) through which the current leaves, the inverter (20) and the rectifier (24) each comprising at least one pair of transistors, operating in phase opposition, the transistors being able to be primary or secondary depending on the charging direction, at least one of the primary transistors, called master transistor, having its opening and closing controlled by a control unit (30) using a control parameter (Fm, Tm),the control parameter having an initial control value (Fm-ini, Tm-ini), the control unit (30) controlling at least one secondary transistor, called slave transistor, a control of which is based on a control of the master transistor, the slave transistor having a closing duration (Te) with an initial closing value (Te-ini) less than a closing duration (Tm) of the master transistor, the method comprising the following steps, implemented for a predetermined control setpoint, the master transistor being controlled by the control unit (30) using said control parameter (Fm, Tm) as a function of the control setpoint: - Step 1. As long as the closing duration (Te) of the slave transistor is less than the closing duration (Tm) of the master transistor, increment the closing duration (Te) of the slave transistor by a first predefined increment (Dl), then determine a corresponding variation of the value of the control parameter (Fm, Tm),- Step 2. If said variation in absolute value is greater than a threshold value (Fs), decrease the closing time of the slave transistor by a second predefined increment (D2), the second increment (D2) being greater than or equal to the first increment (Dl), otherwise return to step 1, and, - Step 3. Define the closing time of the slave transistor as the time obtained in step 2.

2. Method according to claim 1, in which the control instruction comprises an output current instruction of the converter (16), on the side of the rectifier (24), and / or an input voltage instruction of the converter (16), on the side of the inverter (20).

3. Method according to claim 2, in which the master transistor is controlled by the control unit (30) as a function of the control setpoint, so that an output current of the converter (16), on the side of the rectifier (24), respectively an input voltage of the converter (16), on the side of the inverter (20), is substantially equal to the control setpoint.

4. Method according to any one of the preceding claims, comprising: - a first step of determining operating conditions, implemented before step 1, to determine initial operating conditions; - at least one second step of determining operating conditions, implemented subsequently, to determine current operating conditions; the method further comprising a storage of the initial operating conditions and a comparison, for each second step of determining operating conditions, between the current operating conditions and the initial operating conditions.

5. Method according to the preceding claim, in which the operating conditions comprise at least one of: - a temperature value in the converter (16); - a voltage value at the input of the converter, on the inverter (20) side and a voltage value at the output of the converter (16), on the rectifier (24) side; and - a value of the control setpoint.

6. Method according to one of the preceding claims, further comprising a step of determining a variation between the current operating conditions and the initial operating conditions, and of resetting the closing time of the slave transistor and returning to step 1 when said variation exceeds at least a predetermined threshold.

7. A method according to claim 4, wherein the current operating conditions are determined in step 1 and / or step 3.

8. Method according to one of the preceding claims, in which the first increment (Dl) is predefined as being at most 1 / 10 of the initial closing value (Te-ini) of the slave transistor.

9. Method according to one of the preceding claims, in which the second increment (D2) is at least twice as large as the first increment (D1).

10. Method according to one of the preceding claims, in which the initial closing value (Te-ini) of the slave transistor is determined using a predictive model and / or by experimentation.

11. Method according to one of the preceding claims, in which the control parameter consists of one of: a switching frequency of the master transistor (Fm), the closing time (Tm) of the master transistor, and a phase shift between the primary transistors.

12. A battery charger (10) adapted to connect to the network (14) on the one hand and to a battery (12) on the other hand, the charger having a high voltage bidirectional DC-DC converter (16) with resonant circuit, the converter having an inverter (20), a transformer (22) and a rectifier (24) in this order, for a given charging direction, a primary side is defined as a side of the converter receiving the current and a secondary side is defined as a side of the converter through which the current leaves, the inverter and the rectifier each comprising at least one pair of transistors, operating in phase opposition, the transistors being able to be primary or secondary depending on the charging direction, at least one of the primary transistors, called master transistor, having its opening and closing controlled by a control unit (30) using a control parameter (Fm, Tm), the control parameter having an initial control value (Fm-ini, Tm-ini),the control unit (30) controlling at least one secondary transistor, called slave transistor, a command of which is based on a command of the master transistor, the slave transistor having a closing duration (Te) with an initial closing value (Te-ini) less than a closing duration (Tm) of the master transistor, the charger being configured to implement the method according to any one of claims 1 to 11.,

13. Computer program comprising instructions for implementing the method according to one of claims 1 to 11 when this program is executed by a processor.

14. Non-transitory recording medium readable by a computer on which is recorded a program for implementing the method according to one of claims 1 to 11 when this program is executed by a processor.