3D PROTECTION STRUCTURE AGAINST ELECTROMAGNETIC INTERFERENCE FOR SEMICONDUCTIVE DEVICES

Abstract

Semiconductor device comprising an integrated circuit package (1) having a connection matrix (6) for connection to a printed circuit board (15), characterized in that the integrated circuit package (1) comprises a protective structure (2) against electromagnetic interference of the elementary connectors (3, 4), such as balls, formed by a 3D-printed deposition of a protective metallic wall (11) between the elementary connectors (3, 4). Figure for the abstract: Fig 3C

Description

Title of the invention: 3D PROTECTION STRUCTURE AGAINST ELECTROMAGNETIC INTERFERENCE FOR SEMICONDUCTIVE DEVICES technical field

[0001] The present invention relates to the protection of a printed circuit board (PCB) against electromagnetic interference (EMI) generated by various elementary components of the printed circuit board, more particularly electromagnetic interference within a connection matrix, such as solder balls (BGA), connection pads (LGA) or connection pins (PGA). Previous techniques

[0002] An electric current flowing through the components of a printed circuit board generates an electromagnetic field. An electromagnetic signal then propagates with an electric field component and a magnetic field component, which can lead to electromagnetic interference between the components themselves. Electromagnetic interference is the generation of unwanted electrical signals in the circuits of electronic systems due to the unintentional coupling of energy from an incident electromagnetic field.

[0003] In highly compact electronic systems, the size of the average circuit element or component decreases, which promotes the radiation of higher-frequency signals. The increasing operating frequency of these electrical systems results in a high level of high-frequency electromagnetic interference (EMI). The predominance of high-frequency systems and portable electronic circuits creates a highly complex environment for the operation of sensitive electrical / electronic systems. Consequently, it is often advantageous to protect an electrical / electronic component against EMI emitted by other components.

[0004] Sensitive or radiating electrical components may be covered by a metal cover and / or enclosure, connected to a ground plane during the process of securing the cover in place. Existing protective devices offer limited reusability and are designed for individual components. These devices are often metal plates, perforated plates, cages, or meshes that cover an entire circuit or specific components.

[0005] Metallic shielding is often expensive, heavy, and difficult to miniaturize, particularly for protecting components against internal EMI. Description of the invention

[0006] There is therefore a need to provide internal EMI protection for certain components.

[0007] It has been observed that electric currents flowing in matrices of elementary connectors are sources of EMI between the elementary connectors.

[0008] A connection matrix is ​​a set of very small connectors (less than a millimeter) that allow an integrated circuit package to be electrically connected to a printed circuit board.

[0009] The connection matrix can be of the ball matrix or BGA (for "Bail Grid Array") type where the elementary connectors are solder balls, of the pad matrix or LGA (for "Land Grid Array") type where the elementary connectors are connection pads, or of the pin matrix or PGA (for "Pin Grid Array") type where the elementary connectors are connection pins, or of the column matrix or CGA (for "Column Grid Array") type where the elementary connectors are solder columns.

[0010] It is therefore desirable to reduce EMI between elementary connectors.

[0011] It is important to limit EMI between these elementary connectors with a protection device that can adapt to complex shapes of elementary connectors arranged on the connection matrix.

[0012] One object of the invention relates to a semiconductor device comprising an integrated circuit package having a connection matrix for connection to a printed circuit board. The integrated circuit package includes a protective structure against electromagnetic interference of the elementary connectors of the connection elements, formed by a metallic coating creating a protective barrier between the elementary connectors.

[0013] Thus, the EMI emitted by the elementary connectors is reduced by the metallic wall between them.

[0014] When EMI comes into contact with the protective wall, the metal wall reflects most of the electromagnetic waves, while a portion of the EMI is absorbed and converted into heat. The remaining energy is confined within the metal wall due to the skin effect, thus preventing the EMI from reaching sensitive electronic components on the other side of the metal wall.

[0015] The metallic walls make it possible to reflect and absorb EMI and to generate the skin effect for EMI, which makes the metallic walls particularly effective at blocking EMI, thus protecting the electronic components from EMI.

[0016] In one embodiment, the metal wall is electrically connected with a ground track of the integrated circuit.

[0017] The metallic wall allows the electrical signals induced by electromagnetic interference emitted by the elementary connectors to be absorbed and these electrical signals to be conducted to the ground plane of the circuit box.

[0018] In particular, at least part of the metal wall is deposited directly onto the ground track. Also, the ground track may have been exposed between elementary connectors before the metal wall is deposited. This arrangement allows for the EMI shielding and its electrical connection to the ground plane to be achieved in a single operation (metal deposition).

[0019] Advantageously, the protective structure includes an insulation layer covering the metal wall.

[0020] The insulating layer thus prevents a short circuit between the individual connectors when the connection matrix is ​​connected to the printed circuit board. Indeed, when the matrix is ​​connected to the printed circuit board, these individual connectors can be soldered to the printed circuit board or compressed, creating a risk of contact with the protective wall. The insulating layer therefore prevents electrical contact, and thus uncontrolled electrical paths.

[0021] Preferably, the connection matrix is ​​at least one of a pin matrix (PGA), a ball matrix (BGA), a pad matrix (LGA) or a column matrix (CGA).

[0022] Advantageously, the protective structure has a height substantially equal to the height of the individual connectors after the matrix is ​​connected to the printed circuit board. The height is defined along the normal to the plane of the connection matrix.

[0023] During soldering or compression of the individual connectors, their height is often reduced by the effects of heat or applied forces. The height of the protective structure is chosen to be substantially equal to the height of the individual connectors after the matrix is ​​connected to the printed circuit board in order to form an EMI barrier along the entire height between the semiconductor device and the printed circuit board.

[0024] In one embodiment, the connection matrix is ​​arranged on a lower face of a printed circuit board supporting the integrated circuit package, the protection structure comprising at least a first portion of protection formed by metallic deposition on a lateral edge of the printed circuit board supporting.

[0025] A printed circuit board is generally made up of a plurality of internal layers, alternating between a dielectric layer and a conductive layer. The electric current flowing in these layers generates significant EMI. By forming at least a protective portion on a lateral edge of the printed circuit board, preferably at At the height of high-emitting areas, the EMI emission from the printed circuit board support is greatly reduced.

[0026] Advantageously, at least a first portion of protection has the form of a comb extending over a portion of the lateral edge of the printed circuit board. A comb is, for example, formed of a multitude of substantially parallel fingers or strands extending over the lateral edge.

[0027] The first comb-shaped portion advantageously allows for rapid formation, for example, by 3D printing, while reducing the material required to form an EMI protection structure.

[0028] The first portion of protection may extend over the entire thickness of the printed circuit board support or over only a part of the printed circuit board support in the case where the conductive layers with high EMI emission are lower layers in the printed circuit board support, for example.

[0029] In one embodiment, at least a first portion of the protection extends beyond the thickness of the printed circuit board, up to the height of electrical components arranged on the supporting printed circuit board. This embodiment also reduces the EMI of these electrical components.

[0030] In one embodiment, the protection structure includes a second protection portion, produced by metallic deposition, forming a peripheral frame of the lower face of the printed circuit support.

[0031] The current flowing along the edge of the printed circuit board is thus limited. The comb-shaped protective portion can, in particular, extend along the lateral edge of the printed circuit board from the portion forming the peripheral frame of the carrier PCB.

[0032] In one aspect of the invention, the metal wall, the insulation layer, the first and second portions as appropriate, are deposited on the carrier substrate by 3D printing.

[0033] 3D printing of the protective structure is particularly advantageous because it allows for the more efficient and ergonomic placement of the metal wall, the insulation layer, and the protective portion. 3D printing also makes it possible to miniaturize the protective structure formed between the elementary connectors and to adapt the shape of the protective structure to the complex geometries of the connection matrix.

[0034] Preferably, the protective structure forms a grid of straight metal walls, perpendicular to each other, and arranged between the elementary connectors organized in a grid within the matrix.

[0035] The grid with perpendicular lines often corresponds to the position of the elementary connectors. This arrangement allows for better isolation of EMI emissions at the level of the elementary connector.

[0036] Another object of the present invention relates to a method for manufacturing a semiconductor device comprising the following steps:

[0037] - obtain an integrated circuit package having a connection matrix for a connection to a printed circuit board; and

[0038] - to form a protective structure against electromagnetic interference between the elementary connectors by metallic deposit forming a protective wall between the elementary connectors.

[0039] In one embodiment, the formation of the protective structure further comprises one or more of the following operations:

[0040] a step of depositing an insulating layer (9) onto the protective wall (11),

[0041] a metallic deposition step on a lateral edge of a printed circuit board support metallic, on the inner face of which the connection matrix is ​​arranged, so as to form a lateral protection portion, optionally in the shape of a comb,

[0042] a metallic deposition step forming a peripheral frame of the lower face of the printed circuit board support.

[0043] According to one aspect of the invention, the metallic deposit(s) and the deposition of the insulation layer, if applicable, are carried out by 3D printing. Brief description of the drawings

[0044] Fig. 1 illustrates a semiconductor device comprising a circuit package connected to a connection PCB.

[0045] Fig. 2A, Fig. 2B and Fig. 2C illustrate a semiconductor device comprising a circuit package with a protective structure.

[0046] Fig. 3A, Fig. 3B and Fig. 3C illustrate an example of depositing a protective structure between elementary connectors.

[0047] Fig. 4 illustrates an example of a portion of protection deposited on a lateral side of a printed circuit board.

[0048] Fig. 5 presents a flowchart of a method for manufacturing a semiconductor device comprising a structure for protection against electromagnetic interference between the elementary connectors.

[0049] For the sake of clarity, the same elements are designated by the same reference numerals in the different figures. Furthermore, the various figures are not drawn to scale, as is customary in the representation of integrated circuits. Detailed description

[0050] In the description, when referring to absolute positional qualifiers, such as the terms "front", "back", "top", "bottom", "left", "right", etc., or Relative terms, such as "above," "below," "superior," "inferior," etc., or orientational qualifiers, such as "horizontal," "vertical," etc., refer, unless otherwise specified, to the orientation of the figures or an electronic circuit in its normal operating position. Unless otherwise specified, the expressions "about," "approximately," "roughly," and "in the order of" mean within 10%, preferably within 5%. In the following description, the term "conductor" means electrically conductive and the term "insulator" means electrically insulating.

[0051] Fig. 1 illustrates a semiconductor device comprising an integrated circuit package 1. The assembly is designed to be connected to a printed circuit board or PCB connection 15 through a connection matrix 6 formed of elementary connectors 3, 4 as described below.

[0052] In a known manner, the integrated circuit package 1 comprises an integrated circuit 16 covered by a cover 17 typically made of resin.

[0053] The integrated circuit 16 is formed of a printed circuit board PCB “carrier” or “support” 5 on the (upper) mounting surface 7 of which are mounted one or more electronic components 19 forming an integrated circuit assembly 16. By way of example, an electronic component may include a semiconductor chip, which is a semiconductor integrated circuit device such as a microprocessor, a memory, a logic device, an analog device or other electronic function implemented in a single-chip integrated circuit, as known in the prior art.

[0054] The carrier PCB 5 is generally composed of a substrate 18 and a plurality of successive layers (conductive trace then dielectric). The conductive layers are connected to each other by internal connections (not shown), for example vias or plated holes.

[0055] The electrical components are electrically connected to the traces of the carrier PCB 5. The substrate of the carrier PCB 5 can be a ceramic, epoxy resin, glass fabric, or paper substrate. The carrier PCB 5 includes, opposite the mounting face 7, a connection face 8 comprising a connection matrix 6. The connection matrix 6 is configured to electrically connect the integrated circuit package 1 to the connection PCB 15 (which includes a complementary connection matrix 21).

[0056] In the design process, the cover 17 is placed on the mounting face 7 of the carrier PCB 5 so as to cover the surface-mounted electronic components 19. In this configuration, the edges 13 (or side faces) of the carrier PCB 5 are not covered by the resin of the cover 17.

[0057] The connection matrix 6 comprises a plurality of elementary connectors 3, 4. In a non-limiting example, the connection matrix 6 is a pin matrix (PGA), a ball matrix (BGA), a pellet matrix (LGA) or a column matrix (CGA). The elementary connectors 3, 4 can be arranged in a regular grid (according to regular rows and columns - see for example [Fig.3A]-3B) or in a less regular way ([Fig.2A]-2B).

[0058] As is known, the connection PCB 15 comprises alternating conductive and insulating or dielectric layers, the conductive layers being connected to each other by internal connections, for example vias or plated through-holes. A face 22, referred to as the connection face, has complementary elementary connectors 23 (see [Fig. 1]) to those of the integrated circuit package 1: for example, pads, through-holes, or sockets.

[0059] Thus, the integrated circuit package 1 can be electrically connected to the connection PCB 15 via balls, pads, columns, pins or other known elementary connectors, by aligning these elementary connectors with their respective connection faces.

[0060] The connection between the integrated circuit package 1 and the connection PCB 15 can be achieved by soldering, gluing, insertion, compression, or any other known means of connection. In a preferred example, the elementary connectors 3, 4, such as pads or balls, are soldered to ensure the electrical connection.

[0061] The carrier PCB 5 comprises an insulating layer 18 forming the outer surface of the connection face 8, and below the insulating layer 18 (shown above in the figure), a ground trace 14 connected, in a known manner, to a ground plane to dissipate any unwanted current (e.g., leakage current). In a preferred example, the ground trace 14 forms the layer immediately following the insulating layer 18 forming the outer surface of the carrier PCB 5.

[0062] In one embodiment, the ground track 14 is located between the elementary connectors 3, 4, for example between each row of the elementary connectors 3, 4, as illustrated in [Fig. 3A]-3B. In another embodiment, a terminal of the ground track 14 can be disposed outside the connection matrix 6 to be connected by an electrical wire (so-called "wire bonding" technology) to the EMI protection structure according to this disclosure.

[0063] Fig. 2A illustrates a semiconductor device comprising a circuit package with an EMI protection structure 2. Fig. 2B illustrates the connection between the carrier PCB 5 and the connection PCB 15. In order to limit electromagnetic interference emitted by the elementary connectors 3, 4, the protection structure 2 is formed by a metallic deposit forming a protective wall or barrier 11, arranged vertically (with respect to the connection matrix 6 and therefore to the plane of the insulating layer 18 or a connection face 8), between the elementary connectors 3, 4.

[0064] The protective wall 11 can be deposited, for example, but not limited to, by chemical vapor deposition (CVD), plasma-enhanced chemical vapor deposition (PECVD), sputtering, evaporation, screen printing, spraying, plating, or 3D printing. In one example, 3D printing is preferred. The 3D printing can be at least one of the following: selective laser sintering (SLS), stereolithography (SLA), fused deposition modeling (FDM), multi-jet fusion or Multi Jet Fusion (MJF), selective laser melting (DMLS), Polyjet, or Carbon DLS (for Digital Light Synthesis).

[0065] [Fig.3A]-3C illustrates an embodiment of manufacturing the structure of EMI protection 2. This involves creating the EMI protection structure for a matrix of balls distributed regularly in the form of a grid.

[0066] In a first step illustrated in [Fig. 3A], the insulating layer 18 of the carrier PCB is etched. The insulating layer 18 can be etched substantially in the middle between two elementary connectors 3, 4 as illustrated so as to expose the ground track 14. The etching can be a point to form a localized connection terminal, or be extended in the form of a groove, in particular with one or more longitudinal sections between the elementary connectors 3, 4, in the form of one or more protective walls 11 to be created.

[0067] The insulating layer 18 can also be etched at one end of the carrier PCB 5 out of the connection matrix 6.

[0068] In a second step illustrated in [Fig. 3B], a metallic deposit of the protective wall 11 between the elementary connectors 3, 4 is produced, typically by 3D printing. The metallic deposit typically has a longitudinal deposit forming walls. In the example of [Fig. 3B], the protective structure 2 forms a grid of straight metallic walls 11, perpendicular to each other, and arranged between the elementary connectors 3, 4, which are organized in a grid pattern within the connection matrix 6.

[0069] As shown in [Fig. 3B], the protective structure 2 has a height hl (along the axis perpendicular to the plane of the connection matrix 6) substantially equal to a height h3 (not shown) of the elementary connectors 3, 4 after connection of the connection matrix 6 to the connection PCB 15. The height h2 of the elementary connectors 3, 4 shown in [Fig. 3B] corresponds to the height of the connectors before the connection of the matrix 6 to the connection PCB 15. Indeed, the height of the connection balls h2 3, 4 is intended to be reduced under the effect, for example, of soldering operations.

[0070] Thus, the protective structure 2 does not exceed (within design uncertainties) the height h3 of the elementary connectors 3, 4 after attachment to the PCB of connection 15 and therefore does not interfere with the connection of the connection matrix 6 to the connection PCB 15.

[0071] In a non-limiting example, in which the connecting balls are used as the elementary connectors 3, 4, the height h2 is between 200 and 500 micrometers before connection of the matrix 6 to the connecting PCB 15. The height h3 of the elementary connectors 3, 4 after connection of the connecting matrix 6 is between 50 and 150 µm. Therefore, the metal deposition is preferably carried out over a height between 50 and 150 µm.

[0072] In a non-limiting example, the distance between the elementary connectors 3, 4 and the protective wall 11 is between 100 and 500 pm, more particularly between 150 and 250 pm, for example 200 pm. In a non-limiting example, the width of the protective wall 11 is between 10 and 50 pm, typically providing several tens of pm of spacing with the elementary connectors 3, 4. Generally, 3D printing techniques allow for the deposition of metal droplets with a width of 10 pm.

[0073] The above dimensions, for example a height of 150 pm for a width of 10 to 50 pm, show that the protective wall 11 extends vertically with respect to the plane of the connecting face 8.

[0074] At least part of the metal deposit is made on the exposed ground track 14, on the localized connection terminal, or on the longitudinal sections, as appropriate, ensuring the electrical connection of the wall 11 to the ground plane. The illustration at the bottom of [Fig. 3B] shows that the anchoring of the wall 11, and therefore its mechanical strength, is improved by etching the insulating layer 18. Furthermore, in one embodiment, the etching has been carried out on all areas where the metal deposit is to be made.

[0075] Thus, the protective wall 11 can be directly deposited by a metallic deposit in the groove between the elementary connectors 3, 4 which makes it possible both to make the electrical connection with the ground track 14 and to improve the retention of the protective wall 11 in a position perpendicular to the mounting face 7 of the carrier PCB 5. The protective wall 11 is thus better fixed to the connection matrix 6.

[0076] The protective wall 11 allows the absorption of an electromagnetic signal from the EMI emitted by the elementary connectors 3, 4. The signal thus absorbed by the protective wall 11 is then conducted to the ground track 14.

[0077] In an optional third step illustrated in [Fig. 3C], an electrical insulation layer 9 is deposited on the protective wall 11 by the same deposition methods as the protective wall 11 described previously. The insulation layer 9 can be one among a layer of insulating silicon oxide, an epoxy resin, an FR4 composite, a polymer resin of silicone or insulating polymers.

[0078] One or more layers 10 pm thick can be deposited by 3D printing.

[0079] The insulation layer 9 thus prevents a short circuit between the elementary connectors 3, 4 when connecting the connection matrix 6 to the connection PCB 15.

[0080] As illustrated in [Fig. 2A], the protective wall 11 can be placed between each elementary connector 3, 4, such as the pads in this non-limiting example. The protective wall 11 can be placed around a central elementary connector 4A of the connection matrix 6, to isolate it from elementary connectors placed around it.

[0081] In certain places of the connection matrix 6, the metallic deposit can be made over a width extended relative to the height, typically to form a bond plate between elementary connectors 4A and 4B, for example at the level of a highly emissive area of ​​the carrier PCB 5.

[0082] In an embodiment as illustrated, the protective structure 2 may also include a portion deposited on the peripheral frame 20 of the carrier PCB 5, preferably connected to the protective wall(s) 11 between the elementary connectors 3, 4. Electromagnetic (EM) emissions on the edge of the carrier PCB 5 are reduced.

[0083] Thanks to the localized metallic deposit, the protective structure 2 has a modular structure that can take the necessary shape to limit the EMI emissions of some or all of the elementary connectors 3, 3A, 3B, 4, 4A, 4B.

[0084] In one particular example, the metallic coating of the protective structure 2 is applied between all the elementary connectors 3, 4 of the connection matrix 6. In [Fig. 2A] this is not the case, for example between the elementary connectors 3A and 3B. The metallic coating forming the protective wall 11 can be applied only to the strongest EMI emission regions, determined by numerical simulation of the integrated circuit package 1, analyzed using suitable software or a detector specifically designed to identify the EMI present.

[0085] Additive manufacturing of the protective structure 2 by 3D printing, as a preferred example, allows great freedom in the shape and / or specific dimensions of the protective structure 2. Thus, only the most emissive elementary connectors 3, 4 can be covered by the protective structure 2, which makes it possible to accelerate the deposition of the protective structure and limit the expenditure of the metallic material used for the deposition of the protective structure 2.

[0086] In an embodiment in which soldering is used as a means of connecting the matrix 6 to the connection PCB 15, a soldering flux is applied to the elementary connectors 3, 4 and / or to the connection matrix 6. The soldering flux ensures a better soldering and desoldering process by eliminating oxide films that form on the surface of the elementary connectors 3, 4 which are to be soldered with the connection PCB 15.

[0087] Thus, when the protective structure 2 is deposited, openings in the protective wall 11 can be provided which allow the flow of the welding flux.

[0088] For example, the height hl of the protective structure 2 can be reduced at predetermined locations between the elementary connectors 3, 4 to allow the solder flux to pass through.

[0089] Alternatively, the protective structure 2 can be an open geometric shape (as in [Fig. 3C]). [Fig. 2C] also illustrates such a variant in which protective walls 11 are formed between only certain elementary connectors.

[0090] During soldering, high temperature can be applied to solder the elementary connectors 3, 4 to the connecting PCB 15. After soldering, the solder flux residues in the soldering process can be removed by air pressure, for example, passed through the openings in the protective structure 2.

[0091] With reference to [Fig. 2A]-2C and [Fig. 4], the protective structure comprises at least a first protective portion 10a formed by metallic deposition on a lateral edge 13 of the carrier PCB 5. For clarity, the lateral edges 13 are visible only in [Fig. 2C] but are also present in embodiments of [Fig. 2A]-2B. This protective portion 10a, referred to as the lateral protective portion, can be formed during the same metallic deposition operation as that of the metallic wall 11 described previously.

[0092] In particular, as illustrated, the lateral protective portion 10a can extend along the lateral edge 13 from the portion 20 forming the peripheral frame of the carrier PCB. Similarly, several portions 10a are formed on several sides of the carrier PCB 5.

[0093] A protective side portion 10a may comprise several strands or fingers connected together and having a comb-like shape extending over all or part of the side edge 13 of the carrier PCB 5. The use of a comb-shaped portion reduces the deposition of metallic material during the deposition of the protective portion 10a and keeps the integrated circuit package 1 sufficiently lightweight. The deposition time is also reduced. Alternatively, the protective side portion 10a has a continuous plate shape.

[0094] The areas where these comb-shaped protective portions are placed correspond preferentially to the areas of high EM emission, which can be determined by numerical simulation of the integrated circuit package 1.

[0095] The lateral protection portion 10a can extend over the entire height of the carrier PCB 5, or over only a part (for example half height or 75% of the height), depending for example on whether the highly emissive areas / layers of the carrier PCB 5 are placed higher or lower in the carrier PCB 5.

[0096] In one embodiment, the lateral protection portion 10a extends beyond the thickness of the carrier PCB 5, on the side of the resin cover 17, up to a height of the electrical components 19 which also reduces the EMI generated by these electrical components.

[0097] The lateral protective portion 10a can take various forms such as a comb, a plate, a plate with openings or a wall inclined towards the connecting matrix 6 forming an angle not perpendicular to the plane of the matrix.

[0098] The table above presents the comparative tests carried out on the integrated circuit package 1 with the protective structure 2 deposited with an integrated circuit package without a protective structure.

[0099] The "Zpos", "Ypos", "Yneg", "Xpos" and "Xneg" present the electromagnetic field measurements in the integrated circuit package 1 along the different axes X, Y and Z. Three implementations are studied, for the same integrated circuit package 1.

[0100] In the first embodiment, wire interconnections (known as "wire bonding") between the electrical components in the housing 1 were replaced by the metallic deposition (3D printing) of a metallic connecting strip, to reduce EMI emissions from the interconnections.

[0101] In the second embodiment, only the protective walls 11 between the pads 3, 4 of the connection matrix 6 and the peripheral frame format portion 20 were formed by metallic deposition on the housing 1. The internal interconnections remain wire interconnections.

[0102] In the third embodiment, the wire interconnections 20 were replaced by metallic connecting strips, the protective walls 11 between the pads 3, 4 of the connection matrix 6 and the peripheral frame format portion 20 were formed by metallic deposition, in addition comb-shaped portions were formed on certain slices identified as highly emitting.

[0103] The table below shows that the third EMI protection embodiment provides a significant reduction of the electric fields “E” and magnetic fields “H” around the housing 1 along all axes examined. Realization Zpos Ypos Yneg Xpos Xneg EHEHEHEHEH । ere -4% -20% -1% -3% -2% -36% -2% -34% -1% -3% ^th -5% -6% -42% -20% -28% +16% -26% +1% -46% -20% ^th -13% -30% -46% -26% -51% -23% -27% -36% -52% -26%

[0104] A flowchart of a process for manufacturing the semiconductor device is illustrated in [Fig.5].

[0105] In the first step 100, the carrier PCB 5 is obtained. It may or may not already include the connection matrix 6, the electrical components 19 and the resin cover 17.

[0106] In the second step 105, the insulating layer 18 of the carrier PCB 5 is etched to expose the ground track 14 between elementary connectors 3, 4, in the form of a localized connection terminal or longitudinal sections.

[0107] In the optional step 110, the electronic components 19 and / or the connection matrix 6 (e.g., the balls) are mounted on the mounting face 7 of the carrier PCB 5, if necessary. The resin cover 17 can also be placed on the carrier PCB 5 using conventional techniques.

[0108] In the next step 115, a metallic deposit is made between the elementary connectors 3, 4. The metallic deposit forms the protective wall 11 against electromagnetic interference between the elementary connectors 3, 4. If the ground track 14 has been exposed in an area where the metallic deposit is being made, the electrical connection of the wall 11 to the ground track 14 is made at this step. The metallic deposit is made by 3D printing in a preferred example.

[0109] In the optional step 120, the portion forming the peripheral frame 20 of the carrier PCB 5 is deposited on the mounting face 7. The metal deposit is carried out by 3D printing in a preferred example, during the same 3D printing operation as step 115.

[0110] In the optional step 125, the comb-shaped lateral protective portion 10a is deposited on the lateral parts of the housing 1. The metal deposit is carried out by 3D printing in a preferred example, during the same 3D printing operation as step 115 and / or 120.

[0111] In the optional step 130, the electrical connection to the ground track 14 is made by means of an electrical wire between the wall 11 and the exposed localized connection terminal. This step is carried out in the case where the electrical connection was not made during the metallic deposition 115 of the protective wall 11.

[0112] In the optional step 135, the insulation layer 9 is deposited onto the protective walls 11. The metallic deposit is produced by 3D printing in a preferred example.

[0113] In the next step 140, the connection of the integrated circuit package 1 to the connection PCB 15 is made via their respective connection matrices 6. This connection can be made by soldering. Reference numbers

[0114] 1 - integrated circuit package

[0115] 2 - protective structure

[0116] 3, 4, 3A, 4A, 4B - elementary connectors

[0117] 5 - Carrier PCB

[0118] 6 - connection matrix

[0119] 7 - mounting face of carrier PCB

[0120] 8 - contact face of carrier PCB

[0121] 9 - insulation layer

[0122] 10a - lateral protective portion

[0123] 11 - protective wall

[0124] lia-plaque

[0125] 13 - side slice

[0126] 14 - ground track

[0127] 15 - Connection PCB

[0128] 16 - integrated circuit

[0129] 17 - integrated circuit package cover

[0130] 18 - insulating layer of carrier PCB

[0131] 19 - electronic components

[0132] 20 - peripheral frame of the carrier PCB

[0133] 21 - complementary connection matrix

[0134] 22 - PCB connection face

[0135] 23 - complementary elementary connectors

Claims

Demands

1. Semiconductor device comprising an integrated circuit package (1) having a connection matrix (6) for connection to a printed circuit support (5), characterized in that the integrated circuit package (1) comprises a protective structure (2) against electromagnetic interference of the elementary connectors (3, 4) formed by a metallic deposit forming a protective wall (11) between the elementary connectors (3, 4).

2. Semiconductor device according to claim 1, wherein the protective wall (11) is electrically connected with a ground track (14) of the integrated circuit (16).

3. Semiconductor device according to claim 2, wherein at least a portion of the protective wall (11) is deposited directly on the ground track (14).

4. Semiconductor device according to any one of claims 1 to 3, wherein the protective structure (2) comprises an insulating layer (9) covering the protective wall (11).

5. Semiconductor device according to any one of claims 1 to 4, wherein the connection matrix (6) is at least one of a pin array (PGA), ball array (BGA), pad array (LGA) or column array (CGA).

6. Semiconductor device according to any one of claims 1 to 5, wherein the protective structure (2) has a height (hl) along the axis perpendicular to the plane of the connection matrix (6), substantially equal to a height (h3) of the elementary connectors (3, 4) after connection of the connection matrix (6) to the supporting printed circuit board (5).

7. Semiconductor device according to any one of claims 1 to 6, wherein the connection matrix (6) is formed on a lower face (8) of the printed circuit board support (5) of the integrated circuit package (1), the protection structure (2) comprises at least a protection portion (10a) formed by metallic deposition on a lateral edge (13) of the printed circuit board support (5).

8. Semiconductor device according to the preceding claim, wherein at least a first protective portion (10a) has the shape of a comb extending over a portion of the lateral edge (13) of the printed circuit board (5).

9. Semiconductor device according to any one of claims 1 to 8, wherein the protection structure (2) comprises a second protection portion (20), made by metallic deposition, forming a peripheral frame of the lower face (8) of the supporting printed circuit board (5).

10. Semiconductor device according to any one of the preceding claims, wherein the protective wall (11), the first and second protective portions (10a, 20), and the insulation layer (9), if any, are deposited on the carrier PCB (5) by 3D printing.

11. Semiconductor device according to any one of the preceding claims, wherein the protection structure (2) forms a grid of straight metallic walls, perpendicular to each other, and arranged between the elementary connectors (3, 4) arranged in a grid within the connection matrix (6).

12. Method of manufacturing a semiconductor device comprising the steps of: - obtaining an integrated circuit package (1) having a connection matrix (6) for connection to a printed circuit board support (5); - forming a protective structure (2) against electromagnetic interference between the elementary connectors (3, 4) by metallic deposition forming a protective wall (11) between the elementary connectors (3, 4).

13. A method for manufacturing a protective structure (2) according to the preceding claim, further comprising one or more of the following operations: a step of depositing an insulating layer (9) on the metal wall (11), a step of depositing metal on a lateral edge (13) of a printed circuit board support (5) on the inner face (8) of which the connection matrix (6) is disposed, so as to form a first lateral protective portion (10a), optionally having the shape of a comb,

14. a metallic deposition step of a second protective portion (20) forming a peripheral frame of the lower face (8) of the printed circuit support (5). Method of manufacturing a protective structure (2) according to any one of claims 12 and 13, wherein at least one metallic deposit and the insulation layer (9) where applicable, is produced by 3D printing.

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