Method for manufacturing an electronic device

Abstract

The manufacturing process makes it possible to fabricate an electronic device (100) comprising: a substrate (101); an electronic component (102) formed from the substrate (101); a planarization layer (103) made of resin and arranged on the electronic component (102); an electrically conductive element (108a, 108b, 108c) passing through the planarization layer (103), said electrically conductive element (108a, 108b, 108c) being in contact with a portion (106a, 106b, 106c) of the electronic component (102) and having a contact surface (109a, 109b, 109c) arranged on the side of a face (110) of the planarization layer (103) opposite the substrate (101). Figure to be published with the abbreviation: Fig. 6

Description

Title of the invention: Method for manufacturing an electronic device. Technical field of the invention.

[0001] The technical field of the invention relates to electronics and more particularly to microelectronics. The invention relates to a method for manufacturing an electronic device comprising an electronic component and a planarization layer, in particular formed in contact with the electronic component. The electronic component is preferably a laser. Prior art

[0002] In the field of microelectronics, it is known to form an electronic component on a substrate in order to create an electronic device such as a chip, also called an electronic chip. Once the electronic component is complete, certain electronic device structures require a planarization layer within the electronic device that at least partially covers the electronic component. The purpose of this planarization layer is to ensure that the topography of the electronic component does not hinder local contact, or to allow two chips to be connected together, for example, by flipping one onto the other, also known by the English term "flip-chip".

[0003] Thus, classically the planarization layer can be opened locally up to the electronic component in order to form, from a through hole resulting from this opening, a via (also called a metallized hole) electrically connecting the electronic component so that the via presents a contact surface on the side of the planarization layer opposite to the substrate.

[0004] To this end, after depositing the planarization layer, it is common practice to form a layer of photosensitive resin on top of this planarization layer, then expose this resin before developing it, making one or more portions of the planarization layer's face accessible on the side opposite the substrate. Next, the planarization layer is dry-etched locally at the portions with selective stopping of the dry etching on the electronic component. After the dry etching, the remaining photosensitive resin layer is removed to allow for the application of a metal deposit to the areas where the planarization layer has been etched. This allows for re-establishment of contact (via formation) with the electronic component so that the deposited metal is accessible on the side of the planarization layer's face opposite the substrate.

[0005] All these steps have a cost during the manufacture of the electronic device, this cost being increased when the etchings have to stop on materials different from the electronic component and / or at different levels above the substrate.

[0006] By way of example, a conventional manufacturing process for an electronic device is given, the electronic component of which is a laser on a silicon substrate.

[0007] The manufacturing process includes a laser formation step comprising an N-doped InP base arranged on the substrate and locally surmounted by a quantum layer intended to form a Fabry-Pérot cavity of the laser. This quantum layer is surmounted by a P-doped InP layer intended to form part of the laser. The laser formation step includes the formation of first metallic connection terminals on the base, arranged at the same level above the substrate, and the formation of a second metallic connection terminal on the P-doped InP layer. The composition of the first metallic connection terminals is notably different, in terms of materials, from the composition of the second metallic terminal.As a result, in addition to using different compositions to form the first and second connection terminals, the first connection terminals are arranged at a first level above the substrate below at a second level above the substrate where the second connection terminal is arranged.

[0008] Following the laser formation step, a planarization layer is formed on the substrate and the laser, this planarization layer comprising Benzo-Cyclo-Butene (also known by the abbreviation BCB).

[0009] On this planarization layer, the resumption of the first connection terminals and the second connection terminal is done in two stages.

[0010] Initially, a positive photosensitive resin is deposited, exposed to light, and then developed to form a first etching mask. This mask creates access to the first connection terminals through the planarization layer. Once the first etching mask is formed, the planarization layer is dry etched using an inductively coupled plasma, stopping on the metal of the first connection terminals. Afterward, the photosensitive resin is removed.

[0011] In a second step, a positive photosensitive resin is deposited again, notably filling the access points to the first connection terminals previously formed. This resin is then exposed to light and developed to form a second etching mask, creating an access point to the second connection terminal through the planarization layer. Once the second etching mask is formed, the planarization layer is dry etched using inductively coupled plasma, stopping on the metal of the second connection terminal. After this, the photosensitive resin is removed.

[0012] Dry etching made it possible to form holes through the planarization layer, each hole having a bottom delimited respectively by the first and second connection terminals. At this stage, for each hole, a metallization layer must be formed covering its bottom, the sides of said hole, and the periphery of a hole opening arranged at the interface with the face of the planarization layer opposite the substrate.

[0013] Such a process presents various disadvantages such as: • BCB includes an aromatic core recognized as being carcinogenic; • the BCB used necessarily requires inductively coupled plasma dry etching to access the first connection terminals and the second connection terminal; • The engraving of the BCB can be destructive if it is not perfectly adapted to the thickness of BCB to be engraved, which is why the opening of the BCB to access the first connection terminals and the second connection terminal must be done in two stages, and, consequently, two photolithographies must be carried out to be adapted to the thickness of BCB to be engraved. This implies taking into account many parameters and special precautions when manufacturing the electronic device. Object of the invention

[0014] The present invention aims to remedy at least partially the aforementioned drawbacks.

[0015] To this end, the invention relates to a method for manufacturing an electronic device comprising the following steps: a) providing a substrate; b) form an electronic component from the substrate; c) form a planarization layer of resin on the electronic component, said resin being photosensitive and electrically insulating; d) to carry out an exposure of the planarization layer through a photolithography mask resulting in the delimitation of a sacrificial region within the planarization layer, said sacrificial region being in contact with a part of the electronic component and being able to be removed by a developer; e) carry out a development using the developer in order to remove said sacrificial region resulting in a hole having a bottom delimited at least in part by said part of the electronic component; (f) deposit an electrically conductive material to obtain an electrically conductive element at the hole, said electrically conductive element being in contact with the bottom of the hole and with a portion of the planarization layer intended to be permanent within the electronic device, said electrically conductive element having a contact surface arranged on the side of a face of the planarization layer opposite the substrate.

[0016] The use of an initially photosensitive resin that remains permanently within the electronic device as a planarization layer after its opening (hole formation) advantageously reduces the number of process steps. Furthermore, it allows the use of products other than Benzo-Cyclo-Butene, which is currently recognized as a carcinogen.

[0017] The manufacturing process may further include one or more of the following features.

[0018] According to a feature of the manufacturing process, the developer is an inert product with respect to the electronic component and preferably with respect to the substrate.

[0019] This avoids the risk of damage to the electronic device during its manufacture and greatly facilitates the implementation of the manufacturing process in the sense that there are fewer precautions to take than in the case of inductively coupled plasma dry etching.

[0020] According to a feature of the manufacturing process, the resin comprises a compound from the siloxane family, such as cyclopentanone, and the developer is an isopropyl alcohol.

[0021] The use of isopropyl alcohol is advantageous because it is an inert solvent with respect to the electronic component and the substrate. The use of such a resin is advantageous because, in addition to its photosensitive properties, it exhibits interesting optical characteristics for forming an optoelectronic device such as a laser.

[0022] According to a feature of the manufacturing process, step c) is implemented by a spinning deposition.

[0023] Such a deposit makes it possible to control the thickness of the planarization layer while ensuring the formation of a flat surface opposite the substrate.

[0024] According to a feature of the manufacturing process, step e) is such that the bottom of the hole is connected to an opening of the hole by at least one flank extending out of the hole.

[0025] This allows for good quality of the metallization forming the electrically conductive element, thus ensuring suitable electrical conductivity from the electronic component to the face of the planarization layer opposite the substrate.

[0026] According to a feature of the manufacturing process, the part of the electronic component delimiting at least in part the bottom of the hole is at least in part delimited by a connection terminal of the electronic component.

[0027] It follows that the electrically conductive element allows a resumption of contact of the connection terminal up to the level of the face of the planarization layer opposite the substrate.

[0028] According to a feature of the manufacturing process, the manufacturing process is such that: • step d) is such that the photolithography mask allows the formation of several sacrificial regions within the planarization layer, each of the sacrificial regions being in contact with a corresponding part of the electronic component and being able to be removed by the developer; • step e) is such that the sacrificial regions are all removed at least in part simultaneously, the sacrificial regions being removed so as to form a plurality of holes each having a bottom delimited at least in part by the corresponding part of the electronic component (102); • Step f) is such that the deposition of electrically conductive material (Ml) is carried out to form electrically conductive elements at each of the holes.

[0029] The manufacturing process is thus streamlined because it is possible to use the same development step to form all the holes intended to form connections to the electronic component through the planarization layer.

[0030] According to a feature of the manufacturing process, the electronic component formed in step b) includes connection terminals, and each of the corresponding parts of the electronic component is formed at least in part by a surface of one of the connection terminals, at least two of the connection terminals being of different compositions and arranged at different heights relative to the substrate.

[0031] The manufacturing process thus makes it possible to combine the steps regardless of the composition of the connection terminals and their height relative to the substrate. This is made possible in particular by the use of the photosensitive resin, which can be made soluble by the developer only in the areas where it has been exposed (in the case of the so-called positive resin) or in the areas where it has not been exposed (in the case of the so-called negative resin), and preferentially due to the developer's inertness with respect to the electronic component.

[0032] According to a feature of the manufacturing process, the electronic component is an optoelectronic component, preferably a laser.

[0033] This is particularly possible by choosing a photosensitive resin whose optical characteristics are compatible for coating the electronic component.

[0034] The invention also relates to an electronic device comprising: • a substrate; • an electronic component formed from the substrate; • a permanent planarization layer made from a photosensitive resin and arranged in contact with the electronic component; • an electrically conductive element passing through the planarization layer, said electrically conductive element being in contact with a part of the electronic component and having a contact surface arranged on the side of a face of the planarization layer opposite the substrate.

[0035] Such an electronic device is advantageous because its planarization layer can be formed from a material that does not contain a benzene aromatic ring. Furthermore, such an electronic device can be obtained at a lower cost because the photosensitive or polymerized resin remains within the electronic device. Moreover, since the final electronic device does not incorporate specific stop layers required in etching techniques to verify that the entire thickness has been etched, it exhibits improved heat dissipation.

[0036] The electronic device may include several electrically conductive elements, each in contact with a corresponding part of the electronic component and each having a contact surface arranged on the side of the face of the planarization layer opposite the substrate.

[0037] This allows several distinct contact resumptions for the same electronic component on the side of the face of the planarization layer opposite the substrate.

[0038] The electronic device may be such that the electronic component includes connection terminals and that each of the corresponding parts of the electronic component is formed at least in part by a surface of one of the connection terminals, at least two of the connection terminals being of different compositions and arranged at different heights relative to the substrate.

[0039] Such an electronic device has an advantage in terms of manufacturing cost in the sense that it results from the presence of the resin planarization layer that separate lithography and etching steps are not necessary as well as the presence of specific stop layers to allow access to these connection terminals located under the planarization layer before step e) of the manufacturing process.

[0040] Other advantages and features may become apparent from the detailed description that follows. Brief description of the drawings

[0041] The invention will be better understood upon reading the detailed description that follows, given solely by way of non-limiting example and made with reference to the drawings attached and listed below.

[0042] Fig. 1 schematically represents a cross-sectional view of a substrate provided for during a manufacturing process of an electronic device according to an embodiment of the invention.

[0043] Fig. 2 schematically represents a cross-sectional view showing an electronic component formed on the substrate.

[0044] Fig. 3 schematically represents a cross-sectional view showing the deposition of a planarization layer on the electronic component.

[0045] Fig. 4 schematically represents a cross-sectional view showing part of a photolithography step carried out on the assembly shown in Fig. 3.

[0046] Fig. 5 schematically shows a cross-sectional view of the result of a development at the end of the photolithography step.

[0047] Fig. 6 shows, according to a schematic cross-sectional view, the electronic device at the end of the manufacturing process.

[0048] In these figures, the same reference numerals are used to designate the same elements. The elements shown in the different figures are not necessarily drawn to scale in order to facilitate understanding of the figures. Detailed description

[0049] In the present description, by "above" or "below", the reference frame to be taken into account is that of the figures.

[0050] The invention relates to a method for manufacturing an electronic device 100, the various stages of which are illustrated by way of example in figures 1 to 6. The electronic device 100 is notably visible in [Fig.6].

[0051] The manufacturing process for the electronic device 100 comprises the following steps, in particular successive steps: a) provide a substrate 101 ([Fig.l]); b) form an electronic component 102 from the substrate 101 ([Fig.2]); c) form a planarization layer 103 of resin on the electronic component 102, said resin being photosensitive and electrically insulating ([Fig.3]); d) to carry out an exposure (arrows Fl) of the planarization layer 103 through a photolithography mask 104 resulting in a delimitation of a sacrificial region 105a, 105b, 105c within the planarization layer 103, said sacrificial region 105a, 105b, 105c being in contact with a part 106a, 106b, 106c of the electronic component 100 and being able to be removed by a developer ([Fig.4]); e) carry out a development using the developer in order to remove said sacrificial region 105a, 105b, 105c resulting in a hole 107a, 107b, 107c having / comprising a bottom delimited at least in part by said part 106a, 106b, 106c of the electronic component 102 ([Fig.5]); (f) deposit an electrically conductive material Ml to obtain an electrically conductive element 108a, 108b, 108c at the hole 107a, 107b, 107c, said electrically conductive element 108a, 108b, 108c being in contact with the bottom of the hole 107a, 107b, 107c and in particular with a portion of the planarization layer 103 intended to be permanent within the electronic device 100, said electrically conductive element 108a, 108b, 108c having / comprising a contact surface 109a, 109b, 109c arranged on the side of a face 110 of the planarization layer 103 opposite the substrate 101 ([Fig.6]).

[0052] Steps c), d) and e) together form a photolithography step.

[0053] Step d) can be implemented using radiation, in particular "electromagnetic radiation", of a predetermined wavelength, for example using a mercury lamp, adapted to participate in delimiting the sacrificial region 105a, 105b, 105c due to the insolation of the planarization layer 103 through the photolithography mask 104 by said radiation.

[0054] Step f) makes it possible in particular to form, at the level of the hole 107a, 107b, 107c, an interconnection hole also called a via or metallized hole in the field.

[0055] In particular, the contact surface 109a, 109b, 109c, arranged on the side of the face 110 of the planarization layer 103 opposite the substrate 101, is resulting from a portion of the layer deposited in material Ml, this portion being deposited on said face 110.

[0056] It follows from the transition from [Fig.4] to [Fig.5] that the resin used to form the planarization layer 103 is a so-called negative resin in the sense that each area exposed to radiation resists development, that is to say that the sacrificial region 105a, 105b, 105c is unpolymerized and soluble in the developer (it is for example in this sense that areas Z1, Z2, Z3, Z4 of the planarization layer 103, which are not soluble in the developer, and whose pattern has locally changed between [Fig.3] and [Fig.4] are identifiable in [Fig.4]). Of course, this is not limiting in the sense that the resin can just as well be a positive resin: in this case the photolithography mask 104 will be adapted and will not cover each area to be opened, i.e. corresponding to the sacrificial region 105a, 105b, 105c which is then a polymerized portion of the resin used to form the planarization layer 103.

[0057] In particular, the photolithography mask 104 is used only for exposure and is not permanent on the surface of the planarization layer 103.

[0058] One advantage of using the photosensitive resin planarization layer 103 is that it avoids the need for an etching step on a planarizing layer, which would require preparing an etching mask formed, for example, by photolithography on the planarizing layer to be etched, with a specific etching stop. Furthermore, it allows the use of materials other than Benzo-Cyclo-Butene, which is known to be carcinogenic.

[0059] Depending on the type of electronic device 100, the substrate 100 can be a silicon substrate or a substrate made of III-V material, i.e. a material composed of one or more elements from column III and column V of the Mendeleev periodic table.

[0060] By "electronic component 102" formed from substrate 101, it is understood that the "electronic component 102" can be formed on substrate 101 which then forms a simple support or be partly integrated into substrate 101, a part of which also forms a portion of the electronic component 102.

[0061] Step c) is in particular carried out so that the planarization layer 103 covers the electronic component 102 which is then located under the face 110 of the planarization layer 103 opposite the substrate.

[0062] Thus, the invention also relates to the electronic device 100, particularly as obtained by the manufacturing process, and for example visible in [Fig. 6]. The electronic device 100 comprises: • substrate 101; • the electronic component 102 formed from the substrate 101, and in particular arranged on the substrate 101; • the planarization layer 103 which is then permanent (i.e. which remains present within the electronic device 100, in particular throughout its use) and is made from the photosensitive resin and arranged in contact with (i.e. arranged on the) electronic component 102; • an electrically conductive element 108a, 108b, 108c passing through the planarization layer 103, said electrically conductive element 108a, 108b, 108c being in contact with a part 106a, 106b, 106c of the electronic component 102 and having / comprising a contact surface 109a, 109b, 109c (in particular facing in a direction opposite to the substrate 101) arranged on the side of the face 110 of the planarization layer 103 opposite to the substrate 101.

[0063] By "the permanent planarization layer 103 made of a photosensitive resin," it is understood that the planarization layer 103 within the electronic device 100 can be made of photosensitive resin (in the case where the resin is positive) or of exposed resin that is no longer photosensitive (in the case where the resin within the electronic device 100 is exposed negative resin—also called polymerized resin—during the manufacturing process and is therefore no longer photosensitive). It follows that the electronic device 100 is, in particular, the one obtained during the manufacturing process.

[0064] The substrate 101 can be a wafer for the formation of electronic components, also called a "wafer" in the technical field of the invention (this may notably be the case within the framework of the manufacturing process), or a portion cut from the plate as part of the 100 electronic device for example integrated into an electronic chip.

[0065] It follows from what has been described above that the planarization layer 103, following step e) (and therefore what remains of it after development), is permanent in the sense that it is always present in the electronic device 100, although modified compared to its state at the end of step c), particularly during steps d) and e). Thus, the portion of the planarization layer 103 intended to be permanent within the electronic device 100 is part of the planarization layer 103 in its "permanent" state after step e).

[0066] Preferably, in order to avoid damaging the electronic component 102 during step e), the developer is inert with respect to the electronic component 102. Using such an inert product eliminates the need for rigorous control, as is the case with an etching step that could damage the electronic component 102. In the case where the planarization layer 103 protects the substrate 101 during step e) (where the corresponding sacrificial region 105a, 105b, 105c is not in contact with the substrate 101 but only with the electronic component 102), it may be sufficient for the developer to be inert with respect to the electronic component 102.Preferably, the developer is a product that is also inert with respect to the substrate 101, this helps to avoid damage to the substrate 101 if the developer comes into contact with it, in particular when the corresponding sacrificial region 105a, 105b, 105c is in contact with the electronic component 102 and the substrate 101.

[0067] The resin may comprise a compound from the siloxane family, such as cyclopentanone, and the developer may be an isopropyl alcohol.

[0068] For example, the resin may be a SINR from the manufacturer ShinEtsu. Such a resin is a negative resin.

[0069] In the case of SINR, step d) can be implemented using ultraviolet radiation, and before step e) an annealing of the planarization layer 103 can be carried out.

[0070] Alternatively, the resin may comprise HSQ (abbreviation for hydrogen silsesquioxane) and be a negative resin sensitive to extreme ultraviolet radiation. In this case, the developer may be based on TMAH (abbreviation for "tetramethylammonium hydroxide").

[0071] The resin can also be a SIPR, also produced by the manufacturer ShinEtsu, which is a positive resin that develops, however, with TMAH, which is a base and not a solvent; this then amounts to making an etching of a resin that does not contain any BCB, which is better for health reasons but is not inert for the electronic component 102 and the substrate 101.

[0072] A major advantage of SINR is that its developer is isopropyl alcohol, which is inert to surfaces encountered in microelectronics unlike TMAH which can etch certain materials.

[0073] Generally, and in order to obtain a flat surface opposite the substrate 101, step c) can be carried out by deposition using a trowel. This avoids the need for a mechano-chemical polishing process, which generally increases production costs because it involves an additional step.

[0074] Preferably, step e) is such that the bottom of the hole 107a, 107b, 107c is connected to an opening 112 of the hole 107a, 107b, 107c (particularly arranged at the face 110 of the planarization layer 103) by at least one flank 113 extending from the hole ([Fig. 5]), and preferably by outward flanks. This facilitates the deposition of the electrically conductive material Ml onto the flank(s) / wall(s) of the hole 107a, 107b, 107c in order to form a good quality interconnecting hole.

[0075] By outward flank(s), it is understood that the flank concerned diverges from the bottom of the hole 107a, 107b, 107c with respect to an axis of the hole 107a, 107b, 107c orthogonal to the plane of the substrate 101. An outward flank is also called a flank with a positive slope.

[0076] For the same hole 107a, 107b, 107c, the latter may include a side with a circular cross-section increasing as one moves away from the substrate 101 or several sides intersecting two by two extending each from the bottom of the hole 107a, 107b, 107c.

[0077] In particular, the presence of the outward flank(s) is a consequence of an adapted photolithography (in particular steps d) and e)) which makes it possible to obtain naturally (in particular for the case of SINR), or by appropriately controlling the insolation, a shape suitable for the continuous deposition of a layer made in the electrically conductive material Ml between the bottom 107a, 107b, 107c of the hole and the periphery of its opening 112 on the side of the face 110 of the planarization layer 103 opposite the substrate 101. This makes it possible to limit the scrap rate linked to a problem of electrical conduction at the level of the re-establishment of contact ensured by the electrically conductive element 108a, 108b, 108c.

[0078] The electrically conductive element 108a, 108b, 108c is in particular such that it comprises a collar 114 arranged on the face 110 of the planarization layer 103 opposite to, and in particular distal to, the substrate 101. Although not preferred, the electrically conductive element 108a, 108b, 108c can fill the corresponding hole 107a, 107b, 107c.

[0079] Preferably, the part 106a 106b, 106c of the electronic component 102 delimiting at least in part the bottom of the hole 107a, 107b, 107c is at least in part delimited by a terminal 111a, 111b, 11 the connection of the electronic component 102.

[0080] As shown for example in [Fig.5], the part 106a 106b, 106c of the electronic component 102 delimits the bottom of the hole 107a, 107b, 107c and is delimited by the terminal 111a, 111b, 11 of the connection of the electronic component 102.

[0081] This connection terminal 111a, 111b, 11 may be made of metal. For example, in the case where the electronic component 102 is a laser, the connection terminal may comprise or be constituted by a stack of three layers comprising successively, from a corresponding part of the electronic component 102, a layer of nickel, a layer of germanium and a layer of gold, or comprising successively, from a corresponding part of the electronic component 102, a layer of titanium, a layer of platinum and a layer of gold.

[0082] The terminal 111a, 111b, 11 the connection is not mandatory if the electrically conductive element 108a, 108b, 108c can be placed directly in contact with a layer within the electronic component 102 while still allowing it to perform its function, in particular contact resumption.

[0083] Everything that applies to the electrically conductive element 108a, 108b, 108c and to the hole 107a, 107b, 107c can apply to each of several electrically conductive elements 108a, 108b, 108c and several holes 107a, 107b, 107c as described below.

[0084] Thus, the electronic component 102 can comprise several electrically conductive elements 108a, 108b, 108c as described (for example, three as illustrated in [Fig. 6]) to allow for re-establishment of contacts on the electronic component 102. To this end, and to allow for the shared formation of these electrically conductive elements 108a, 108b, 108c, step d) can be such that the photolithography mask 104 allows the formation of several sacrificial regions 105a, 105b, 105c (each as described above) within the planarization layer 103. In particular, as many sacrificial regions 105a, 105b, 105c are formed as there are electrically conductive elements 108a, 108b, 108c. Therefore, each of the sacrificial regions 105a, 105b, 105c is in contact with a corresponding part 106a, 106b, 106c of the electronic component 102 and is ready to be removed by the developer.Thus, step e) is such that the sacrificial regions 105a, 105b, 105c are all removed at least partially simultaneously (this of course depending on the morphology of the sacrificial regions relative to each other, the removal of one may be completed before the removal of the other). In fact, the sacrificial regions 105a, 105b, 105c are removed so as to form a plurality of holes 107a, 107b, 107c (three in the example illustrated in [Fig.5]) each having / comprising a bottom delimited at least in part by the corresponding part 106a, 106b, 106c of the electronic component 102, and preferably delimited by the corresponding part 106a, 106b, 106c of the electronic component 102 which may be a connection terminal 111a, 111b, 11. of the latter as described above. Step f) is such that the deposition of the electrically conductive material Ml allows the formation of the electrically conductive elements 108a, 108b, 108c at the level of each of the holes 107a, 107b, 107c.

[0085] The use of the photosensitive resin to form the planarization layer 103 which will be opened locally by the developer, (for example by immersing the assembly visible in [Fig.4], after removal of the photolithography mask 104, in a liquid forming the developer) in order to then deposit the electrically conductive material Ml on the planarization layer 103 after step e), allows simultaneous opening in different locations on the face 110 of the planarization layer 103 and, where appropriate, at different depths in a way that is simple to industrialize.

[0086] The electrically conductive elements 108a, 108b, 108c are in particular electrically isolated from each other either at the end of step f) in the case of localized deposition, or by etching the deposited electrically conductive material Ml.

[0087] Generally, the electrically conductive material Ml can be a metal, for example chosen from gold and aluminum.

[0088] Thus, the electronic device 100 can comprise several electrically conductive elements 108a, 108b, 108c, 108d, each as described and in contact with a corresponding part 106a, 106b, 106c of the electronic component 102 and each having / comprising a contact surface 109a, 109b, 109c arranged on the side of the face 110 of the planarization layer 103 opposite to the substrate 101. Thanks to this, it is possible to form electrical links connecting the electronic component 102 through the planarization layer 103, for example to connect an additional electronic component to the electronic component 102 comprising the planarization layer 103, for example by the flip-chip technique.

[0089] It is understood from the foregoing that the electrically conductive elements 108a, 108b, 108c can be electrically connected, in particular by direct contact to the connection terminals 111a, 111b, 111e of the electronic component 102, in particular in an individual manner. For this purpose, the electronic component 102 formed in step b) comprises the connection terminals 111a, 111b, 111e, for example three in number, and each of the corresponding parts 106a, 106b, 106c of the electronic component 102 is formed at least in part (and preferably entirely) by a surface of one of the connection terminals 111a, 111b, 111e.

[0090] Preferably, at least two of the connection terminals 111a, 111b, 11 are of different compositions and / or arranged at different heights relative to the substrate 101. Here it is understood that there is an advantage in using the resin within the planarization layer 103: it can be opened simply and simultaneously without worrying about etching time or etching stop selectivity.

[0091] By "different compositions," it is understood, for example, that said at least two connecting terminals of different compositions each comprise at least one material different from one material of the other of said at least two connecting terminals of different compositions. For example, two stacks of three layers have been described above; these two stacks of three layers are of different compositions and can each be chosen to form one of said at least two of the connecting terminals 111a, 111b, 111e of different compositions.

[0092] Thus, within the framework of the electronic device 100, the electronic component 102 may include the connection terminals 111a, 111b, 11 and each of the corresponding parts 106a, 106b, 106c of the electronic component 102 is formed at least in part by a surface of one of the connection terminals 111a, 111b, 11, at least two of the connection terminals 111a, 111b, 11 being of different compositions and / or arranged at different heights with respect to the substrate 101.

[0093] According to a preferred embodiment, the electronic component 102 is an optoelectronic component, preferably a laser. A resin is particularly suitable for forming a planarization and encapsulation layer 103 of an optoelectronic component. Indeed, due to its photosensitivity, it is suitable from the point of view of optical characteristics so as not to hinder the operation of the optoelectronic component.

[0094] A particular embodiment of a laser as an electronic component 102 is now described. According to this particular example, the substrate 101 can be made of silicon or of a III-V material; it then serves as a support for the electronic component 102, which comprises ([Fig. 2]): • a 115 base in N-doped InP arranged on substrate 101; • a quantum 116 layer, also called the active region, designed to form a Fabry-Pérot cavity of the laser and arranged on the base 115 in particular on a vertex of a body of the base 115 extending from a base of the base; • a P-doped InP 117 layer formed on the quantum 116 layer forming a so-called "III-V ribbon". The electronic component 102 comprises two connection terminals 111a, 111c, each comprising a successive stack of a nickel layer, a germanium layer, and a gold layer formed on the base 115 such that the nickel layer is in contact with the base 115 (specifically on both sides of its body), forming metallic contacts at the substrate 101. The electronic component 102 further comprises a connection terminal 111b comprising a successive stack of a titanium layer, a platinum layer, and a gold layer on top of the P-doped InP layer opposite the substrate 101, forming a ribbon contact (the titanium layer then being in contact with said top). It follows that, in addition to the use It is possible to have different compositions to form the connection terminals 111a, 111c and the connection terminal 111b, the connection terminals 111a, 111c and the connection terminal 111b are not at the same level above the substrate 101.

[0095] The manufacturing process described is particularly well-suited to such a laser in that the photosensitive planarization layer 103 can be opened simultaneously at different topographic levels. SINR is preferentially used here as the photosensitive resin because it has compatible optical characteristics for coating the laser. The planarization layer 103 allows for contact resumption at the same level and, if necessary, enables the electronic device to be electrically connected to an electronic chip by means of a transfer technique.

[0096] Of course, the invention is not limited to a laser as an electronic component 102, any other type of electronic component, for example light-emitting diodes, having in particular a strong topography requiring planarization with re-contact can be used within the framework of the present invention.

[0097] The present invention finds an industrial application in the field of manufacturing electronic components, particularly in the field of microelectronics.

Claims

Demands

1. A method for manufacturing an electronic device (100) comprising the following steps: a. provide a substrate (101); b. form an electronic component (102) from the substrate (101); c. form a resin planarization layer (103) on the electronic component (102), said resin being photosensitive and electrically insulating; d. to carry out an exposure of the planarization layer (103) through a photolithography mask (104) resulting in the delimitation of a sacrificial region (105a, 105b, 105c) within the planarization layer (103), said sacrificial region (105a, 105b, 105c) being in contact with a part (106a, 106b, 106c) of the electronic component (102) and being able to be removed by a developer; e. carry out a development using the developer in order to remove said sacrificial region (105a, 105b, 105c) resulting in a hole (107a, 107b, 107c) having a bottom delimited at least in part by said part (106a, 106b, 106c) of the electronic component (102); f. deposit an electrically conductive material (Ml) to obtain an electrically conductive element (108a, 108b, 108c) at the hole (107a, 107b, 107c), said electrically conductive element (108a, 108b, 108c, 108d) being in contact with the bottom of the hole (107a, 107b, 107c) and with a portion of the planarization layer (103) intended to be permanent within the electronic device (100), said electrically conductive element (108a, 108b, 108c, 108d) having a contact surface (109a, 109b, 109c) arranged on the side of a face (110) of the planarization layer (103) opposite the substrate (101).

2. A manufacturing method according to claim 1, wherein the developer is an inert product with respect to the electronic component (102) and preferably with respect to the substrate (101).

3. A manufacturing process according to any one of claims 1 to 2, wherein the resin comprises a compound from the siloxane family, such as cyclopentanone, and wherein the developer is an isopropyl alcohol.

4. A manufacturing method according to any one of claims 1 to 3, wherein step c) is carried out by a toumette deposition.

5. A manufacturing method according to any one of claims 1 to 4, wherein step e) is such that the bottom of the hole (107a, 107b, 107c) is connected to an opening (112) of the hole (107a, 107b, 107c) by at least one flank (113) exiting the hole (107a, 107b, 107c).

6. A manufacturing method according to any one of claims 1 to 5, wherein the part (106a, 106b, 106c) of the electronic component (102) delimiting at least in part the bottom of the hole (107a, 107b, 107c) is at least in part delimited by a terminal (111a, 111b, 111e) for connecting the electronic component (102).

7. A manufacturing method according to any one of claims 1 to 6 wherein: • step d) is such that the photolithography mask (104) enables the formation of several sacrificial regions (105a, 105b, 105c) within the planarization layer (103), each of the sacrificial regions (105a, 105b, 105c) being in contact with a corresponding part (106a, 106b, 106c) of the electronic component (102) and being able to be removed by the developer; • step e) is such that the sacrificial regions (105a, 105b, 105c) are all removed at least in part simultaneously, the sacrificial regions (105a, 105b, 105c) being removed so as to form a plurality of holes (107a, 107b, 107c) each having a bottom delimited at least in part by the corresponding part (106a, 106b, 106c) of the electronic component (102);• step f) is such that the deposition of electrically conductive material (Ml) is carried out to form electrically conductive elements (108a, 108b, 108c) at each of the holes (107a, 107b, 107c).;

8. A manufacturing method according to claim 7, wherein the electronic component (102) formed in step b) comprises connection terminals (111a, 11b, 11le), and wherein each of the corresponding parts (106a, 106b, 106c) of the electronic component (102) is formed at least in part by a surface of one of the connection terminals (111a, 11b, 11le), at least two of the connection terminals (11la, 11b, 11le) being of different compositions and arranged at different heights relative to the substrate (101).

9. A manufacturing method according to any one of claims 1 to 8, wherein the electronic component (102) is an optoelectronic component, preferably a laser.

10. Electronic device (100) comprising: • a substrate (101); • an electronic component (102) formed from the substrate (101); • a permanent planarization layer (103) made from a photosensitive resin and arranged in contact with the electronic component (102); • an electrically conductive element (108a, 108b, 108c) passing through the planarization layer (103), said electrically conductive element (108a, 108b, 108c) being in contact with a portion (106a, 106b, 106c) of the electronic component (102) and having a contact surface (109a, 109b, 109c) arranged on the side of a face (110) of the planarization layer (103) opposite to the substrate (101).

11. Electronic device (100) according to claim 10, comprising several electrically conductive elements (108a, 108b, 108c) each in contact with a corresponding part (106a, 106b, 106c) of the electronic component (102) and each having a contact surface (109a, 109b, 109c) arranged on the side of the face (110) of the planarization layer (103) opposite the substrate (101).

12. Electronic device (100) according to claim 11, wherein the electronic component (102) comprises connection terminals (111a, 111b, 11le) and wherein each of the corresponding parts of the electronic component (102) is formed at least in part by a surface of one of the connection terminals (111a, 111b, 11le), at least two of the terminals (111a, 111b, 11le) of connection being of different compositions and arranged at different heights relative to the substrate (101).

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