Image pickup element and image pickup device

Abstract

To provide an imaging apparatus that can improve the accuracy of focus detection when performing focus detection by using an image pickup device having a pupil division function.SOLUTION: An imaging apparatus comprises: a pixel array that has a plurality of pixel columns in which pixels are arranged in matrix, and for each column of pixels, a plurality of column output lines including a first column output line and a second column output line are arranged; and a read out circuit that reads out signals from the pixels through the column output lines. The read out circuit performs first read-out scanning of reading out signals from a first pixel group of the pixel array through the first column output line, and second read-out scanning of reading out signals from a second pixel group different from the first pixel group of the pixel array through the second column output line, reads out a phase difference signal in the horizontal direction through the first read-out scanning, and reads out a phase difference signal in the vertical direction through the second read-out scanning. The number of pixels in the phase difference signal in the horizontal direction read out through the first read-out scanning is different from the number of pixels in the phase difference signal in the vertical direction read out through the second read-out scanning.SELECTED DRAWING: Figure 9

Description

[Technical Field]

[0001] The present invention relates to an imaging apparatus and a control method thereof. [Background technology]

[0002] 2. Description of the Related Art Imaging devices such as digital cameras and video cameras use imaging elements such as CMOS image sensors.

[0003] Some image sensors have a pupil-splitting function, and in an imaging device equipped with such an image sensor, automatic focus adjustment (autofocus) is possible by detecting the phase difference from multiple signals obtained by photoelectrically converting a pupil-split subject image.

[0004] Patent Document 1 discloses an imaging device having an imaging element in which multiple photoelectric conversion units are provided for one microlens. The imaging device disclosed in Patent Document 1 generates an A image signal and a B image signal from a pupil-divided subject image, and performs a correlation calculation to calculate the amount of focus shift (defocus amount).

[0005] Furthermore, Patent Document 2 discloses an imaging device that detects a phase difference by dividing the pupil not only horizontally but also vertically. According to the imaging device disclosed in Patent Document 2, by switching the direction of pupil division at a predetermined cycle, it is possible to suppress a decrease in focus detection accuracy due to a mismatch between the image separation direction of the image sensor and the image direction of the subject (vertical or horizontal lines). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] Japanese Patent Application Laid-Open No. 2013-106194 [Patent Document 2] Japanese Patent Application Laid-Open No. 2014-157338 Summary of the Invention [Problem to be solved by the invention]

[0007] As disclosed in Patent Document 2, when the separation direction of the image of the image sensor does not match the image direction of the subject, the focus detection accuracy decreases.

[0008] Furthermore, in the conventional technology disclosed in Patent Document 2, when pixel signals are read out from a plurality of pixels arranged on an image sensor, the pixel signals are read out sequentially in a predetermined direction. When phase difference signals that have been pupil-divided in the horizontal direction (row direction) are obtained by reading out pixel signals sequentially in the row direction, focus detection for the same row is possible in approximately the readout time for one row.

[0009] On the other hand, when phase difference signals with pupil division in the vertical direction (column direction) are acquired using a method in which pixel signals are read out sequentially in the row direction, focus detection for the same column cannot be performed until all phase difference signals for the same column have been read out. In other words, to perform focus detection in the column direction, it is necessary to read out approximately one frame's worth of signals, which takes time equivalent to the readout time for one frame. As a result, the time required for focus adjustment varies depending on the scanning direction of signal readout from the image sensor and the direction of pupil division.

[0010] Furthermore, the difference in time required for focus detection to be possible due to the pupil division direction and the signal readout direction has a greater effect on focus detection performance when the subject is a moving object.

[0011] In other words, when the pupil division is horizontal (row direction), readout is completed in approximately one row's worth of time (several microseconds to several tens of microseconds), so deviation in subject position is small even if the subject is moving. However, when the pupil division is vertical (column direction), readout takes approximately one frame's worth of time (several milliseconds to several tens of milliseconds), so deviation in subject position becomes relatively large and focus detection performance deteriorates.

[0012] The present invention has been made in consideration of the above-mentioned problems, and its purpose is to provide an imaging device that can improve focus detection accuracy when performing focus detection using an image sensor with a pupil division function. [Means for solving the problem]

[0013] An imaging device according to the present invention includes a pixel array having a plurality of pixel columns in which pixels are arranged in a matrix, and each pixel column is provided with a plurality of column output lines including a first column output line and a second column output line; and a readout circuit that reads out signals from the pixels via the column output lines, wherein the readout circuit performs a first readout scan to read out signals from a first pixel group of the pixel array via the first column output lines, and a second readout scan to read out signals from a second pixel group of the pixel array that is different from the first pixel group via the second column output lines, wherein the first readout scan reads out horizontal phase difference signals and the second readout scan reads out vertical phase difference signals, and the number of pixels of the horizontal phase difference signals read out by the first readout scan is different from the number of pixels of the vertical phase difference signals read out by the second readout scan. [Effects of the Invention]

[0014] According to the present invention, when focus detection is performed using an image sensor having a pupil division function, it is possible to improve the accuracy of focus detection. [Brief explanation of the drawings]

[0015] [Figure 1] A diagram showing the configuration of the pixels of an image sensor and their peripheral circuits. [Figure 2] FIG. 2 is a diagram illustrating the configuration of a pixel in an imaging element. [Figure 3] FIG. 1 is a circuit diagram of a pixel in an image sensor. [Figure 4] FIG. 2 is a schematic diagram showing the layered structure of an imaging element. [Figure 5] FIG. 1 is a block diagram showing an example of the configuration of an imaging apparatus. [Figure 6] 10 is a timing chart showing a first read operation. [Figure 7] 10 is a timing chart showing a second read operation. [Figure 8]10 is a timing chart showing a third read operation. [Figure 9] FIG. 3 is a conceptual diagram showing vertical scanning and pupil division directions in the first embodiment. [Figure 10] FIG. 10 is a conceptual diagram showing vertical scanning and pupil division directions in the second embodiment. [Figure 11] FIG. 10 is a block diagram showing an example of the configuration of pixels and peripheral circuits of an image sensor according to a third embodiment. [Figure 12] FIG. 10 is a conceptual diagram showing vertical scanning and pupil division directions in the third embodiment. DETAILED DESCRIPTION OF THE INVENTION

[0016] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings. Note that the following embodiments do not limit the scope of the invention claimed. Although multiple features are described in the embodiments, not all of these multiple features are necessarily essential to the invention, and multiple features may be combined arbitrarily. Furthermore, in the accompanying drawings, the same reference numerals are used to designate the same or similar components, and redundant explanations will be omitted.

[0017] (First embodiment) FIG. 1 is a block diagram showing an example of the configuration of pixels and peripheral circuits of an image sensor 100 according to the first embodiment of the present invention.

[0018] 1, a plurality of unit pixels 102, each having a color filter formed in a so-called Bayer array, are arranged in a matrix in a pixel section (pixel array) 101. Note that, in this embodiment, description will be given assuming that two column output lines are arranged for each pixel column in the pixel array, but the number of column output lines is not limited to this, and any number of lines can be arranged depending on the required performance, such as 4, 12, 20, etc.

[0019] The unit pixel 102A is connected to a column output line 105A by a selection switch (not shown), and outputs a pixel signal to the column circuit 106A for each row. In this embodiment, the unit pixels 102B, 102C, 102D, 102G, 102H, 102I, and 102J are also connected to the column output line 105A.

[0020] The unit pixel 102E is connected to a column output line 105B by a selection switch (not shown), and outputs a pixel signal to the column circuit 106B for each row. In this embodiment, the unit pixels 102F, 102K, and 102L are also connected to the column output line 105B.

[0021] The unit pixels 102F and 102K may be configured to be connected to the column output line 105A. Alternatively, each unit pixel may be provided with a plurality of selection switches so that each unit pixel is connected to both the column output lines 105A and 105B.

[0022] The selection switch (not shown) is a switch for controlling the selection of unit pixels in a specific row by a control signal supplied from a vertical scanning circuit 104 via a signal line 103, and is scanned in the row direction by the vertical scanning circuit 104. The switches 110 and 111 are switches for performing horizontal addition of pixel signals, and are on / off controlled by a control signal supplied from a timing generator (hereinafter referred to as TG) 112 via a signal line (not shown).

[0023] The TG 112 generates a comparison reference signal and a pulse-shaped control signal for controlling the vertical scanning circuit 104, the transistors in the unit pixels 102, the switches 110 and 111, etc. Furthermore, the D / A converter (hereinafter referred to as DAC) 113 generates a reference signal (slope signal or ramp signal) whose level changes over time. The reference signal is input as one of the signals of the comparator 107 under the control of the TG 112.

[0024] The column circuit 106 of each column is composed of column circuits 106A and 106B corresponding to the column output lines 105A and 105B.

[0025] The column circuit 106 includes a comparator 107 , a counter 108 and a column memory 109 .

[0026] A reference signal generated by the DAC 113 is input to one input of the comparator 107, and a pixel signal output to the column output line 105 is input to the other input of the comparator 107. The comparator 107 compares the potential V of the pixel signal output to the column output line 105 with the reference signal that changes over time.

[0027] The counter 108 measures the time until the magnitude relationship between the pixel signal and the reference signal in the comparator 107 is inverted based on the clock, and converts the measured time into a digital signal. The column memory 109 holds the digital signal measured by the counter 108.

[0028] The horizontal scanning circuit 114 scans the column circuits 106 in the column direction and outputs the digital signals stored in the column memory 109 via horizontal signal lines 115A and 115B commonly connected for each column. The horizontal scanning circuit 114 is also controlled by the TG 112.

[0029] 2A and 2B are diagrams showing the configuration of a unit pixel 102. In Fig. 2A, the unit pixel 102 has sub-pixels 201, 202, 203, and 204, each of which includes a photoelectric conversion unit, and these four sub-pixels share one microlens.

[0030] As shown in Figure 2(b), of these four sub-pixels, a signal that has been pupil-divided in the left-right direction (row direction) is obtained by separately reading out the composite signal of sub-pixels 201 and 202 and the composite signal of sub-pixels 203 and 204. As shown in Figure 2(c), a signal that has been pupil-divided in the up-down direction (column direction) is obtained by separately reading out the composite signal of sub-pixels 201 and 203 and the composite signal of sub-pixels 202 and 204. Then, as shown in Figure 2(d), an imaging signal is obtained by combining all the signals from the four sub-pixels.

[0031] Signals with pupil division in the left-right direction (row direction) are primarily suited to detecting subjects that include vertical lines, and this division direction is sometimes called horizontal. Signals with pupil division in the up-down direction (column direction) are primarily suited to detecting subjects that include horizontal lines, and this division direction is sometimes called vertical.

[0032] Hereinafter, signals based on photoelectric conversion of the sub-pixels 201, 202, 203, and 204 will be referred to as signal A, signal B, signal C, and signal D. Furthermore, a composite signal of the sub-pixels 201 and 202 will be referred to as signal A+B.

[0033] 3 is a circuit diagram showing an example of the configuration of the unit pixel 102. A photodiode (hereinafter, PD) 301A, which is a photoelectric conversion unit included in the sub-pixel 201, is connected to a common floating diffusion (hereinafter, FD) 303 via a transfer switch 302A. Here, the transfer switch 302A is controlled by a transfer pulse PTXA output from the vertical scanning circuit 104.

[0034] The same is true for the subpixels 202, 203, and 204, and the PDs 301B, 301C, and 301D are connected to the common FD 303 via transfer switches 302B, 302C, and 302D, respectively. The transfer switches 302B, 302C, and 302D of the subpixels 202, 203, and 204 are controlled by transfer pulses PTXB, PTXC, and PTXD, respectively.

[0035] The FD 303 temporarily stores the charges transferred from the PDs 301A to 301D and converts the charges into a voltage. The reset switch 304 is controlled by a reset pulse PRES, and supplies the FD 303 with a reference potential VDD.

[0036] The pixel amplifier 305 is a source follower circuit made up of a MOS transistor and a constant current source. The selection switch 306 is controlled by a selection pulse PSEL, and outputs the potential fluctuation of the pixel amplifier 305 from the column output line 105 to the column circuit 106.

[0037] 4 is a schematic diagram showing the structure of the image sensor 100 of this embodiment. The image sensor 100 is configured by stacking a first semiconductor substrate 401 on which the pixel section 101 and other components are formed and a second semiconductor substrate 402 on which readout circuits such as column circuits 106 are formed.

[0038] The second semiconductor substrate 402 is configured to include column circuits 106, a data processing circuit 403, and a substrate memory 404. The column circuits 106 are electrically connected to the first semiconductor substrate 401 via bumps or the like. The data processing circuit 403 performs various arithmetic processing and correction. The substrate memory 404 is a volatile memory such as a DRAM, and is used for purposes such as temporarily storing data when signals from the column circuits 106 are processed by the data processing circuit 403.

[0039] FIG. 5 is a block diagram showing the configuration of an imaging device 500 according to this embodiment.

[0040] The photographing lens 501 is subjected to focus control and the like by a lens driving circuit 502 , and forms an optical image of the subject on the image sensor 100 .

[0041] A shutter 503 that controls the amount of exposure is controlled by a mechanical drive circuit 504. The image sensor 100 converts incident light into an electrical signal and outputs it as an image signal. A signal processing circuit 505 performs various types of arithmetic processing on the image signal output from the image sensor 100, such as gain processing, offset correction processing, and white balance correction processing.

[0042] The image sensor 100 and the signal processing circuit 505 are connected by a plurality of signal lines. The image sensor 500 of this embodiment is configured so that signals output from the horizontal signal lines 115A and 115B of the image sensor 100 are input to the signal processing circuit 505 independently of each other.

[0043] The control circuit 506 controls the entire imaging device 500 while performing various processes such as drive control of the image sensor 100, autofocus calculation, shutter control, etc. The signal processing circuit 505 may be incorporated into the control circuit 506.

[0044] The memory circuit 507 is a storage memory that stores image data and offset correction values. The memory circuit 507 is also connected to the signal processing circuit 505. The memory circuit 507 may also be connected to the data processing circuit 403 of the image sensor 100, allowing selective communication of data and correction values.

[0045] A removable recording circuit 508 such as a semiconductor memory records image data. An operation / display circuit 509 accepts user operations and displays various information.

[0046] 6 is a timing chart showing the first readout mode in this embodiment, in which only the image pickup signal is read out.

[0047] It is assumed that the pixel unit 101 is reset and charge accumulation begins by time t600. Here, the reset pulse PRES is set to Hi and the transfer pulse PTX is set to Hi, and during accumulation, the reset pulse PRES is set to Hi and the transfer pulse PTX is set to Lo.

[0048] At time t601, the unit pixels 102 in a certain row are connected to the column output line 105 by a selection pulse PSEL.

[0049] At time t602, the reset pulse PRES changes from Hi to Lo, and the potential V (N signal) of the FD 303 after the reset is released is input to the comparator 107 via the column output line 105.

[0050] At time t603, the DAC 113 starts outputting the reference signal VL that changes in a ramp shape. At the same time that the DAC 113 starts outputting the reference signal VL, the counter 108 starts counting.

[0051] At time t604, the magnitude relationship between the input signal and the reference signal VL is reversed, causing the output of the comparator 107 to be inverted, and the count value of the counter 108 at that time is stored in the column memory 109. Thereafter, the reference signal VL transitions until it reaches a predetermined upper limit value at time t605, and then a signal is output from the horizontal scanning circuit 114, thereby completing the readout of the signal (N signal) after the reset of the pixel 102 is released.

[0052] At time t606, the charges of the four sub-pixels 201 to 204 are transferred to the FD 303 and combined by the transfer pulses PTXA, PTXB, PTXC, and PTXD, and the potential V of the column output line 105 becomes a potential corresponding to the pixel signal (signal A+B+C+D). Also, the comparator 107 is reset.

[0053] At time t607, the DAC 113 starts outputting the reference signal VL that changes in a ramp shape. At the same time that the DAC 113 starts outputting the reference signal VL, the counter 108 starts counting.

[0054] At time t608, the magnitude relationship between the input signal and the reference signal VL is reversed, causing the output of the comparator 107 to be inverted, and the count value of the counter 108 at that time is stored in the column memory 109. Thereafter, the reference signal VL transitions until it reaches a predetermined upper limit value at time t609, and then a signal is output from the horizontal scanning circuit 114, thereby completing the readout of the pixel signal (signal A+B+C+D) of the pixel 102.

[0055] Thereafter, predetermined signal processing such as subtracting the N signal from the A+B+C+D signal is performed.

[0056] The above series of operations are performed independently in the column output lines 105A and 105B, the column circuits 106A and 106B, and the horizontal signal lines 115A and 115B.

[0057] Fig. 7 is a timing chart showing the second readout mode in this embodiment, in which both the image pickup signal and the phase difference signal in the left-right direction (horizontal direction) are read out.

[0058] The process up to the end of reading the signal (N signal) after reset release at time t705 is the same as in FIG. 6, and therefore the description will be omitted.

[0059] At time t706, the charges of the sub-pixels 201 and 202 are transferred to the FD 303 by the transfer pulses PTXA and PTXB and combined, and the potential V of the column output line 105 becomes a potential corresponding to the pixel signal (signal A+B). Also, the comparator 107 is reset.

[0060] At time t707, the DAC 113 starts outputting the reference signal VL that changes in a ramp shape. At the same time that the DAC 113 starts outputting the reference signal VL, the counter 108 starts counting.

[0061] At time t708, the magnitude relationship between the input signal and the reference signal VL is reversed, causing the output of the comparator 107 to be inverted, and the count value of the counter 108 at that time is stored in the column memory 109. Thereafter, the reference signal VL transitions until it reaches a predetermined upper limit value at time t709, and then a signal is output from the horizontal scanning circuit 114, thereby completing the readout of the pixel signal (A+B signal) of the pixel 102.

[0062] At time t710, the charges of the four sub-pixels 201 to 204 are transferred to the FD 303 and combined by the transfer pulses PTXA, PTXB, PTXC, and PTXD, and the potential V of the column output line 105 becomes a potential corresponding to the pixel signal (signal A+B+C+D). Also, the comparator 107 is reset.

[0063] At time t711, the DAC 113 starts outputting the reference signal VL that changes in a ramp shape. At the same time that the DAC 113 starts outputting the reference signal VL, the counter 108 starts counting.

[0064] At time t712, the magnitude relationship between the input signal and the reference signal VL is reversed, causing the output of the comparator 107 to be inverted, and the count value of the counter 108 at that time is stored in the column memory 109. Thereafter, the reference signal VL transitions until it reaches a predetermined upper limit value at time t713, and then a signal is output from the horizontal scanning circuit 114, thereby completing the readout of the pixel signal (signal A+B+C+D) of the pixel 102.

[0065] After that, predetermined signal processing is performed, such as subtracting the N signal from the A+B signal and the A+B+C+D signal. Furthermore, the C+D signal is obtained by subtracting the A+B signal from the A+B+C+D signal. The A+B+C+D signal constitutes the imaging signal, and the A+B signal and the C+D signal constitute the phase difference signal.

[0066] Fig. 8 is a timing chart showing the third readout mode in this embodiment, in which both the image pickup signal and the phase difference signal in the up and down direction (vertical direction) are read out.

[0067] The same parts as in Figure 7 will not be explained here to avoid redundancy. The difference from Figure 7 is that the charge transfer at time t806 is performed by transfer pulses PTXA and PTXC. As a result, the charges of the sub-pixels 201 and 203 are transferred to the FD 303, and the pixel signal (A+C signal) of the pixel 102 is read out.

[0068] The B+D signal is obtained by subtracting the A+C signal from the A+B+C+D signal. The A+B+C+D signals constitute the imaging signal, and the A+C and B+D signals constitute the phase difference signal.

[0069] Of the signals thus acquired, the imaging signal is used for live view display, etc., and the phase difference signal is used for focus detection, etc. When both signals are read out, whether both or only one is used is determined appropriately depending on the operation mode of the imaging device.

[0070] The horizontal synchronization signal periods in the first to third readout modes may be set to be the same or different. That is, the period from time t600 to time t610 in Fig. 6, the period from time t700 to time t714 in Fig. 7, and the period from time t800 to time t814 in Fig. 8 can each be set arbitrarily.

[0071] 9 is a conceptual diagram illustrating the relationship between readout scanning and pupil division in the pixel signal readout operation of this embodiment. In FIG. 9, 12 rows of pixels are shown as an example, and a case where readout scanning is performed sequentially row by row is shown.

[0072] In Figure 9, row numbers 12N to 12N+3 and 12N+6 to 12N+9 indicate rows for obtaining phase difference signals for left and right pupil division, and these are referred to as the first pixel group. Row numbers 12N+4 and 12N+11 indicate rows for obtaining phase difference signals for upper and lower pupil division, and these are referred to as the second pixel group. Note that in this embodiment, readout scanning is not performed on row numbers 12N+5 and 12N+10. Furthermore, N represents a natural number.

[0073] In this embodiment, the signals of the first group of pixels are read out via column output line 105A in a second readout mode, which is designated as scan 1. Similarly, the signals of the second group of pixels are read out via column output line 105B in a third readout mode, which is designated as scan 2.

[0074] 9, pixel signals in rows with the same vertical addition number are vertically added. That is, the signals of the pixels in rows 12N and 12N+2, which have a vertical addition number of 4N, are vertically added. For example, one vertical addition method is to add signals in column output line 105A.

[0075] Specifically, by simultaneously turning on the selection switches 306 of the pixels in the 12Nth row and the 12N+2th row, the voltage values ​​of the pixels are simultaneously output to the column output line 105A. As a result, the average value of the signals of the pixels is output to the column circuit 106A. However, the vertical addition method and the number of pixels to be added (the number of additions) are not limited to this.

[0076] In this embodiment, the signals of two pixels each in rows 12N+1 and 12N+3 (vertical addition number 4N+1), rows 12N+6 and 12N+8 (vertical addition number 4N+2), and rows 12N+7 and 12N+9 (vertical addition number 4N+3) are also added vertically.

[0077] The left diagram in Figure 9 shows so-called slit rolling operation, where the imaging timing is regulated by the vertical synchronization signal (VD). The vertical axis of the diagram indicates the row number, and the horizontal axis indicates time. The solid line indicates the readout timing of the corresponding row, and the dashed line indicates the reset timing (start of accumulation of the electronic shutter) of the corresponding row. The time from the reset operation timing to the readout operation timing is the exposure time.

[0078] Signal readout for scan 1 begins from the vertical synchronization signal VD. Reset (start of accumulation) for scan 1 begins in the previous frame. After signal readout for scan 1 begins, signal readout for scan 2 begins independently a predetermined time later. Reset (start of accumulation) for scan 2 can be set to a different timing and accumulation time from scan 1. For example, in the 12N rows (12N+2 rows) and 12N+1 rows (12N+3 rows) of scan 1 and the 12N+4 rows of scan 2, accumulation is performed for different lengths during the same time period, and signals are read out in parallel using different systems during the same time period. Also, while scan 1 performs a single signal readout during one VD, scan 2 allows for multiple signal readouts.

[0079] In scan 1, 8 of the 12 rows are read out and signals from 2 pixels are added vertically for live view imaging and horizontal focus detection of the image capture device 100. Therefore, the number of rows after vertical addition is 4. On the other hand, in scan 2, emphasis is placed on the frame rate and 2 of the 12 rows are read out for vertical focus detection.

[0080] As described above, in this embodiment, scan 1 is performed by dividing the pupil into left and right, and scan 2 is performed by dividing the pupil into upper and lower, so focus detection is possible with both scans.

[0081] In scan 1, imaging signals and phase difference signals can be acquired at high speed by vertically adding pixel signals for pixels that are pupil-divided in the left and right directions. Furthermore, because the pixel signal addition direction differs from the pupil-division direction, phase difference signals can be acquired while suppressing a decrease in focus detection accuracy due to pixel addition. Furthermore, in scan 2, some of the rows that were thinned out in scan 1 are read out, and because the number of read rows is smaller than in scan 1, phase difference signals can be acquired at high speed.

[0082] In other words, in scan 1, signals from the first pixel group are read out at a first frame rate. Then, in scan 2, signals from the second pixel group are read out at a second frame rate that is faster than the first frame rate. Therefore, in scan 2, the readout time can be shortened compared to reading out the vertical phase difference signals in scan 1 (in this example, it is shortened to about one-fifth), making it possible to suppress a decrease in focus detection accuracy due to the fast moving speed of the subject.

[0083] The image pickup signal and phase difference signal read out by scan 1 and scan 2 are subjected to predetermined processing such as correction processing and correlation calculation in a signal processing circuit 505 and a control circuit 506. The signals are then used for live view display in an operation / display circuit 509 and for focus adjustment of the photographing lens 501 via a lens drive circuit 502.

[0084] In this way, by dividing the scanning for each selected row according to the direction of pupil division for autofocus, it is possible to suppress deviation of the subject position and improve the accuracy of focus detection even in the case of vertical pupil division and when the subject is moving.

[0085] (Second embodiment) In this embodiment, the pixel 102A is connected to a column output line 105A by a selection switch (not shown), and outputs a pixel signal to the column circuit 106A for each row. In this embodiment, it is assumed that the pixels 102C, 102D, 102F, 102G, 102I, 102J, and 102L are further connected to the column output line 105A.

[0086] The pixel 102B is connected to a column output line 105B by a selection switch (not shown), and outputs a pixel signal to the column circuit 106B for each row. In this embodiment, the pixels 102E, 102H, and 102K are further connected to the column output line 105B.

[0087] Here, each pixel may be provided with a plurality of selection switches so that it can be connected to either the column output line 105A or 105B.

[0088] Fig. 10 is a conceptual diagram illustrating the relationship between readout scanning and the pupil division direction in the readout operation of pixel signals in the second embodiment. Fig. 10 shows six rows of pixels as an example, and illustrates a case where readout scanning is performed sequentially row by row.

[0089] 10, row numbers 6N, 6N+2, 6N+3, and 6N+5 indicate rows for obtaining phase difference signals for left and right pupil division, and these are referred to as the first pixel group. Row numbers 6N+1 and 6N+4 indicate rows for obtaining phase difference signals for upper and lower pupil division, and these are referred to as the second pixel group. Note that N represents a natural number.

[0090] In this embodiment, signals from the first group of pixels are read out via column output line 105A in a second readout mode, which is designated as scan 1. Similarly, signals from the second group of pixels are read out via column output line 105B in a third readout mode, which is designated as scan 2.

[0091] Furthermore, in this embodiment, horizontal addition of pixel signals is performed on the second pixel group. The left diagram in FIG. 10 shows the number of pixels before and after horizontal addition. The G2 pixel in the second pixel group (row 6N+1, column 4M) and the G2 pixel in the second pixel group (row 6N+1, column 4M+2) are pixels of the same color, and are horizontally added to form the G2' pixel. Note that M represents a natural number. When performing horizontal addition, the switch 110 (see FIG. 1) is turned ON and the switch 111 (see FIG. 1) is turned OFF, so that the average value of each pixel signal is output to the column circuit 106B. However, the horizontal addition method and the number of pixels to be added (number of additions) are not limited to these.

[0092] Similarly, the B pixel in row 6N+1, the R pixel in row 6N+4, and the G1 pixel in row 6N+4 are horizontally added with pixels of the same color to become the B' pixel, the R' pixel, and the G1' pixel, respectively.

[0093] The central diagram in Figure 10 shows so-called slit rolling operation, where the imaging timing is regulated by the vertical synchronization signal (VD). The vertical axis of the diagram represents the row number, and the horizontal axis represents time. The solid line represents the readout timing of the corresponding row, the dashed line represents the reset (electronic shutter) timing of the corresponding row, and the hatched portion corresponds to the exposure time of the corresponding row.

[0094] Signal readout for scan 1 begins from the vertical synchronization signal VD. Reset (start of accumulation) for scan 1 begins in the previous frame. After signal readout for scan 1 begins, signal readout for scan 2 begins independently a predetermined time later. Reset (start of accumulation) for scan 2 can be set to a different timing and accumulation time from scan 1.

[0095] For example, in the 6N+3 rows of scan 1 and the 6N+4 rows of scan 2, accumulation is performed for different lengths during the same time period, and signals are read out in parallel using different systems during the same time period. Also, while scan 1 performs a single signal readout during one VD, scan 2 allows for multiple signal readouts.

[0096] In scan 1, four of six rows are read out for live view imaging and horizontal focus detection of the imaging device 100. On the other hand, in scan 2, two of six rows are read out with emphasis on the frame rate for vertical focus detection.

[0097] As described above, in this embodiment, scan 1 is performed using left and right pupil division, and scan 2 is performed using top and bottom pupil division, so focus detection is possible with both scans. Scan 2 reads out pixel signals from rows that were thinned out in scan 1, so the number of readout rows is fewer than in scan 1. In addition, pixel signals from rows read out by scan 2 are horizontally added, so the number of pixels is fewer than in the case where they are not added. This makes it possible to acquire phase difference signals at high speed, and to suppress a decrease in focus detection accuracy due to the fast moving speed of the subject.

[0098] Furthermore, in scan 2, horizontal addition of pixel signals is performed on pixels that are divided into vertical pupils, so the pixel addition direction differs from the pupil division direction. Therefore, the effect of pixel signal addition on focus detection accuracy is small.

[0099] The phase difference signals from scan 1 and scan 2 are used differently depending on the characteristics of the subject. For example, the signal read out by scan 1 has higher resolution than the signal read out by scan 2, making it possible to perform highly accurate focus detection on still objects. On the other hand, scan 2 takes advantage of its high-speed readout and is suitable for increasing the frequency of focus detection (number of calculations) and for detecting moving objects. For the phase difference signals from scan 1 and scan 2, correlation calculations can be performed on the same subject in the same region within the angle of view, or correlation calculations can be performed on different subjects in different regions.

[0100] The image pickup signal and phase difference signal read out by scan 1 and scan 2 are subjected to predetermined processing such as correction processing and correlation calculation in a signal processing circuit 505 and a control circuit 506. The signals are then used for live view display in an operation / display circuit 509 and for focus adjustment of the photographing lens 501 via a lens drive circuit 502.

[0101] In this way, scanning is divided for each selected row according to the direction of pupil division for autofocus, and horizontal addition of pixel signals is performed for pixels with vertical pupil division. This makes it possible to suppress shifts in subject position and improve focus detection accuracy even in the case of vertical pupil division and when the subject is moving.

[0102] (Third embodiment) 11 is a block diagram showing an example of the configuration of pixels and peripheral circuits of an image sensor 1100 according to the third embodiment. Description of the same parts of the image sensor 1100 as those in FIG. 1 will be omitted to avoid redundancy.

[0103] In this embodiment, each pixel column is provided with six column output lines 1105. The column output lines 1105C to 1105F are connected to the column circuits 1106C to 1106F, respectively, in the same manner as the column output lines 1105A and 1105B, but the wiring is omitted in order to avoid complicating the drawing.

[0104] The pixels 1102A, 1102C, 1102G, 1102I, 1102M, 1102O, 1102S, and 1102U are connected to a column output line 1105A by a selection switch (not shown), and output pixel signals to a column circuit 1106A for each row.

[0105] The pixels 1102B, 1102D, 1102H, 1102J, 1102N, 1102P, 1102T, and 1102V are connected to column output lines 1105B by selection switches (not shown), and output pixel signals to a column circuit 1106B for each row.

[0106] The pixels 1102E and 1102F are connected to a column output line 1105C by a selection switch (not shown), and output pixel signals to a column circuit 1106C for each row.

[0107] The pixels 1102K and 1102L are connected to a column output line 1105D by a selection switch (not shown), and output pixel signals to a column circuit 1106D for each row.

[0108] The pixels 1102Q and 1102R are connected to a column output line 1105E by a selection switch (not shown), and output pixel signals to a column circuit 1106E for each row.

[0109] The pixels 1102W and 1102X are connected to a column output line 1105F by a selection switch (not shown), and output pixel signals to a column circuit 1106F for each row.

[0110] Each pixel may be provided with a plurality of selection switches so that each pixel is connected to all or some of the column output lines 1105A to 1105F.

[0111] Fig. 12 is a conceptual diagram illustrating the relationship between readout scanning and pupil division directions in the pixel signal readout operation of this embodiment. Fig. 12 shows an example of 24 rows of pixels, with readout scanning performed sequentially row by row. Also, Fig. 12 describes column output lines 1105A to 1105F as column output lines 1 to 6.

[0112] In FIG. 12, row numbers 24N to 24N+3, 24N+6 to 24N+9, 24N+12 to 24N+15, and 24N+18 to 24N+21 indicate rows for obtaining phase difference signals for left and right pupil division, and these are defined as a first pixel group.

[0113] Row numbers 24N+4, 24N+11, 24N+16, and 24N+23 indicate rows for obtaining phase difference signals for the upper and lower pupil divisions, and these are defined as a second pixel group. In this embodiment, readout scanning is not performed on row numbers 24N+5, 24N+10, 24N+17, and 24N+22, where N is a natural number.

[0114] In this embodiment, signals from the first group of pixels are read out via two column output lines (column output lines 1105A and 1105B) in a second readout mode, which is designated as scan 1. Signals from the second group of pixels are read out via four column output lines (column output lines 1105C, 1105D, 1105E, and 1105F) in a third readout mode, which is designated as scan 2.

[0115] Also, in Figure 12, pixel signals in rows with the same vertical addition number are vertically added. That is, pixel signals in rows 24N and 24N+2, which have a vertical addition number of 8N, are vertically added in column output line 1 (column output line 1105A). Pixel signals in rows with vertical addition numbers 8N+1 to 8N+7 are similarly vertically added. However, the vertical addition method and the number of pixels to be added are not limited to this. Note that the left diagram in Figure 12 is the same as Figure 9, so a description thereof will be omitted.

[0116] In scan 1, 16 of the 24 rows are read out and vertically added for live view imaging by the imaging device. Therefore, the number of rows after vertical addition is 8. On the other hand, in scan 2, emphasis is placed on the frame rate for focus detection in the vertical direction, and 4 of the 24 rows are read out.

[0117] As described above, in this embodiment, scan 1 is performed by dividing the pupil into left and right, and scan 2 is performed by dividing the pupil into upper and lower, so focus detection is possible with both scans.

[0118] In scan 1, imaging signals and phase difference signals can be acquired at high speed by vertically adding pixel signals for pixels that are pupil-divided in the left and right directions. Furthermore, because the pixel signal addition direction differs from the pupil-division direction, phase difference signals can be acquired while suppressing a decrease in focus detection accuracy due to pixel addition. Furthermore, in scan 2, pixel signals from some of the rows that were thinned out in scan 1 are read out, and since fewer rows are read out than in scan 1 and multiple column output lines are used for readout, phase difference signals can be acquired at high speed.

[0119] The image pickup signal and phase difference signal read out by scan 1 and scan 2 are subjected to predetermined processing such as correction processing and correlation calculation in a signal processing circuit 505 and a control circuit 506. The signals are then used for live view display in an operation / display circuit 509 and for focus adjustment of the photographing lens 501 via a lens drive circuit 502.

[0120] In this way, by dividing the scanning for each selected row according to the direction of pupil division for autofocus and reading out pixels with vertical pupil division via multiple column output lines, it is possible to suppress shifts in subject position and improve the accuracy of focus detection even in the case of vertical pupil division and when the subject is moving.

[0121] In the first to third embodiments, in scan 1 and scan 2, power consumption can be reduced by implementing power saving in circuits such as the column circuits 106 and 1106 related to the respective scans during blanking.

[0122] The operations shown in the above embodiments can be used differently depending on the characteristics of the subject and various modes of the imaging device.

[0123] (Other embodiments) The present invention can also be realized by supplying a program that realizes one or more of the functions of the above-described embodiments to a system or device via a network or a storage medium, and having one or more processors in the computer of the system or device read and execute the program.The present invention can also be realized by a circuit (e.g., ASIC) that realizes one or more of the functions.

[0124] The invention is not limited to the above-described embodiments, and various changes and modifications can be made without departing from the spirit and scope of the invention. Accordingly, the following claims are appended to apprise the public of the scope of the invention. [Explanation of symbols]

[0125] 101: pixel unit, 102: pixel, 103: signal line, 104: vertical scanning circuit, 105: column output line, 106: column circuit, 107: comparator, 108: counter, 109: column memory, 110, 111: switches, 112: timing generator, 113: D / A converter, 114: horizontal scanning circuit, 115: horizontal signal line, 301: photodiode, 302: transfer switch, 303: floating diffusion, 304: reset switch, 305: pixel amplifier, 306: selection switch

Claims

1. A pixel array in which pixels are arranged in a matrix, a horizontal phase difference signal is output from a first pixel group of the pixel array via a first signal output line, and a vertical phase difference signal is output from a second pixel group of the pixel array different from the first pixel group via a second signal output line; an imaging element, characterized in that the number of pixels of a horizontal phase difference signal outputted via the first signal output line is different from the number of pixels of a vertical phase difference signal outputted via the second signal output line.

2. 2. The image sensor according to claim 1, wherein the number of pixels in the column direction of the horizontal phase difference signal is different from the number of pixels in the column direction of the vertical phase difference signal.

3. 3. The image sensor according to claim 1, wherein the number of pixels in the row direction of the horizontal phase difference signal is different from the number of pixels in the row direction of the vertical phase difference signal.

4. 4. The image sensor according to claim 1, wherein the number of pixels to be added for the horizontal phase difference signal is different from the number of pixels to be added for the vertical phase difference signal.

5. 5. The image sensor according to claim 1, wherein a pixel addition direction of the phase difference signal in the horizontal direction is different from a pixel addition direction of the phase difference signal in the vertical direction.

6. An imaging element as described in any one of claims 1 to 5, characterized in that the pixel array has a plurality of column output lines, each including a first column output line and a second column output line, arranged for each column of the pixels, and the number of the second column output lines is greater than the number of the first column output lines.

7. An imaging element as described in any one of claims 1 to 6, further characterized in that it outputs an imaging signal.

8. An imaging element according to any one of claims 1 to 7; a control circuit that performs focus control of a lens based on the horizontal or vertical phase difference signal output from the image sensor; An imaging device comprising:

9. A pixel array in which pixels are arranged in rows and columns, a horizontal phase difference signal is output from a first pixel group of the pixel array via a first signal output line, and a vertical phase difference signal is output from a second pixel group of the pixel array different from the first pixel group via a second signal output line; an addition number of pixels of a horizontal phase difference signal output via the first signal output line differs from an addition number of pixels of a vertical phase difference signal output via the second signal output line.

10. The imaging element described in Claim 9, characterized in that the number of pixels added in the column direction of the horizontal phase difference signal is different from the number of pixels added in the column direction of the vertical phase difference signal.

11. The imaging element described in Claim 9, characterized in that the number of pixels added in the row direction of the horizontal phase difference signal is different from the number of pixels added in the row direction of the vertical phase difference signal.

12. The imaging element according to claim 9, characterized in that the pixel addition direction of the horizontal phase difference signal is different from the pixel addition direction of the vertical phase difference signal.

13. An imaging element as described in any one of claims 9 to 12, characterized in that the pixel array has a plurality of column output lines, each including a first column output line and a second column output line, arranged for each column of the pixels, and the number of the second column output lines is greater than the number of the first column output lines.

14. An imaging element according to any one of claims 9 to 13, further outputting an imaging signal.

15. An imaging element according to any one of claims 9 to 14, a control circuit that performs focus control of a lens based on the horizontal or vertical phase difference signal output from the image sensor; An imaging device comprising:

Images