Photoelectric conversion element and photoelectric conversion device

Abstract

To achieve a photoelectric conversion element and a photoelectric conversion device that can achieve a reduction in drive voltage.SOLUTION: A photoelectric conversion element has a first semiconductor region of a first conductivity type provided in contact with a first surface of a semiconductor layer, a second semiconductor region of a second conductivity type provided closer to a second surface of the semiconductor layer than the first semiconductor region, and a third semiconductor region provided closer to the second surface than the second semiconductor region. The first semiconductor region and the second semiconductor region constitute an avalanche photodiode, and the avalanche photodiode multiplies a signal charge generated in the third semiconductor region. In the second semiconductor region, a region with an effective impurity concentration of 1×1016 cm-3 or more has a width in a depth direction of 0.5 μm or less.SELECTED DRAWING: Figure 7

Description

[Technical Field]

[0001] The present invention relates to a photoelectric conversion element and a photoelectric conversion device. [Background technology]

[0002] A single-photon avalanche diode (SPAD) is known as a detector capable of detecting weak light at the single-photon level. SPADs utilize the avalanche multiplication phenomenon, which is generated by a strong electric field induced at the PN junction of a semiconductor, to amplify the signal charge excited by a photon by several to several million times. By converting the current generated by the avalanche multiplication phenomenon into a pulse signal and counting the number of these pulse signals, it becomes possible to directly measure the number of incident photons. Patent Document 1 describes a photodetection device and a photodetection system using an SPAD. [Prior art documents] [Patent Documents]

[0003] [Patent Document 1] Japanese Patent Publication No. 2020-057650 [Overview of the project] [Problems that the invention aims to solve]

[0004] SPADs are devices that operate at very high voltages and have very high current gains, requiring a very large amount of energy per signal charge. Therefore, sensors constructed using SPAD pixels require significantly more power than CMOS sensors, and also suffer from greater degradation of device characteristics due to heat generation. Furthermore, in the SPAD pixels described in Patent Document 1, when the pixels are reduced in size, the lateral electric field between the high-impurity-density N-type semiconductor region constituting the cathode and the high-impurity-density P-type semiconductor region to which the anode electrode is connected becomes stronger, sometimes leading to an increase in dark current caused by surface energy levels. An object of the present invention is to realize a photoelectric conversion element and a photoelectric conversion device capable of reducing the drive voltage to a low voltage. **Means for Solving the Problems**

[0005] According to one disclosure of the present specification, a photoelectric conversion element provided in a semiconductor layer having a first surface and a second surface facing the first surface, the first semiconductor region of the first conductivity type provided in contact with the first surface, a second semiconductor region of the second conductivity type provided on the side of the second surface rather than the first semiconductor region, a third semiconductor region provided on the side of the second surface rather than the second semiconductor region, a first electrode electrically connected to the first semiconductor region, and a second electrode electrically connected to the second semiconductor region, the first semiconductor region and the second semiconductor region constitute an avalanche photodiode, the avalanche photodiode is configured to multiply signal charges generated in the third semiconductor region, and the second semiconductor region has an effective impurity density of 1×10 16 cm -3 A photoelectric conversion element is provided in which the width in the depth direction of a region that is above is 0.5 μm or less. **Effects of the Invention**

[0006] According to the present invention, it is possible to reduce the drive voltage of the photoelectric conversion element and the photoelectric conversion device. As a result, it is possible to achieve energy savings due to low power consumption, mitigate element characteristic degradation due to reduced heat generation, reduce dark current, and the like. **Brief Description of the Drawings**

[0007] [Figure 1] It is a block diagram (part 1) showing a schematic configuration of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 2] It is a block diagram (part 2) showing a schematic configuration of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 3] It is a block diagram showing a configuration example of a pixel of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 4]It is a perspective view showing a configuration example of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 5] It is a diagram for explaining the basic operation of a photoelectric conversion unit of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 6] It is a plan view showing the structure of a photoelectric conversion element of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 7] It is a schematic cross-sectional view showing the structure of a photoelectric conversion element of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 8] It is a diagram showing the depth-direction distribution of impurity density in a photoelectric conversion element of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 9] It is a diagram showing the potential distribution in a photoelectric conversion element of a photoelectric conversion device according to a first embodiment of the present invention. [Figure 10] It is a plan view showing the structure of a photoelectric conversion element of a photoelectric conversion device according to a second embodiment of the present invention. [Figure 11] It is a schematic cross-sectional view showing the structure of a photoelectric conversion element of a photoelectric conversion device according to a second embodiment of the present invention. [Figure 12] It is a plan view showing the structure of a photoelectric conversion element of a photoelectric conversion device according to a third embodiment of the present invention. [Figure 13] It is a block diagram showing a schematic configuration of a light detection system according to a fourth embodiment of the present invention. [Figure 14] It is a block diagram showing a schematic configuration of a distance image sensor according to a fifth embodiment of the present invention. [Figure 15] It is a schematic diagram showing a configuration example of an endoscopic surgery system according to a sixth embodiment of the present invention. [Figure 16] It is a schematic diagram showing a configuration example of a moving body according to a seventh embodiment of the present invention. [Figure 17] It is a block diagram showing a schematic configuration of a light detection system according to a seventh embodiment of the present invention. [Figure 18] It is a flowchart showing the operation of a light detection system according to a seventh embodiment of the present invention. [Figure 19]This is a schematic diagram showing the general configuration of a photodetection system according to the eighth embodiment of the present invention. [Modes for carrying out the invention]

[0008] The embodiments shown below are intended to embody the technical concept of the present invention and do not limit it. The size and positional relationships of the components shown in each drawing may be exaggerated for clarity of explanation. In the following description, identical components may be given the same number and their explanation may be omitted.

[0009] [First Embodiment] The schematic configuration of a photoelectric conversion device according to the first embodiment of the present invention will be described with reference to Figures 1 to 4. Figures 1 and 2 are block diagrams showing the schematic configuration of the photoelectric conversion device according to this embodiment. Figure 3 is a block diagram showing an example of the pixel configuration of the photoelectric conversion device according to this embodiment. Figure 4 is a perspective view showing an example of the configuration of the photoelectric conversion device according to this embodiment.

[0010] As shown in Figure 1, the photoelectric conversion device 100 according to this embodiment includes a pixel area 10, a vertical scanning circuit section 40, a readout circuit section 50, a horizontal scanning circuit section 60, an output circuit section 70, and a control pulse generation section 80.

[0011] The pixel region 10 is provided with multiple pixels 12 arranged in an array such that they form multiple rows and multiple columns. Each pixel 12 may consist of a photoelectric conversion unit including a photoelectric conversion element and a pixel signal processing unit that processes the signal output from the photoelectric conversion unit, as will be described later. The number of pixels 12 constituting the pixel region 10 is not particularly limited. For example, the pixel region 10 can be composed of multiple pixels 12 arranged in an array of several thousand rows x several thousand columns, as in a typical digital camera. Alternatively, the pixel region 10 may be composed of multiple pixels 12 arranged in one row or one column. Alternatively, the pixel region 10 may be composed of a single pixel 12.

[0012] Each row of the pixel array in the pixel region 10 has a control line 14 extending in a first direction (horizontal direction in Figure 1). The control line 14 is connected to each pixel 12 arranged in the first direction and forms a common signal line for these pixels 12. The first direction in which the control line 14 extends may be referred to as the row direction or horizontal direction. Each of the control lines 14 may include multiple signal lines for supplying multiple types of control signals to the pixels 12. The control lines 14 of each row are connected to the vertical scanning circuit section 40.

[0013] Furthermore, each column of the pixel array in the pixel region 10 has data lines 16 extending in a second direction (vertical direction in Figure 1) that intersects the first direction. The data lines 16 are connected to each of the pixels 12 arranged in the second direction, forming a common signal line for these pixels 12. The second direction in which the data lines 16 extend may be referred to as the column direction or the vertical direction. Each of the data lines 16 may include multiple signal lines for transferring multi-bit digital signals output from the pixels 12 bit by bit.

[0014] Each row's control line 14 is connected to the vertical scanning circuit unit 40. The vertical scanning circuit unit 40 is a control unit that receives control signals output from the control pulse generation unit 80, generates control signals to drive the pixels 12, and supplies them to the pixels 12 via the control lines 14. Logic circuits such as shift registers and address decoders may be used in the vertical scanning circuit unit 40. The vertical scanning circuit unit 40 sequentially scans the pixels 12 within the pixel area 10 row by row and outputs the pixel signals of each pixel 12 to the sequential readout circuit unit 50 via the data lines 16.

[0015] Each data line 16 in each column is connected to the readout circuit 50. The readout circuit 50 includes a plurality of holding units (not shown) corresponding to each column of the pixel array in the pixel area 10, and has the function of holding the pixel signals of the pixels 12 of each column, which are output row by row from the pixel area 10 via the data lines 16, in the holding unit of the corresponding column.

[0016] The horizontal scanning circuit unit 60 is a control unit that receives a control signal output from the control pulse generation unit 80, generates a control signal for reading pixel signals from the holding units of each column of the reading circuit unit 50, and supplies it to the reading circuit unit 50. Logic circuits such as shift registers and address decoders may be used in the horizontal scanning circuit unit 60. The horizontal scanning circuit unit 60 sequentially scans the holding units of each column of the reading circuit unit 50 and sequentially outputs the pixel signals held in each to the output circuit unit 70.

[0017] The output circuit section 70 has an external interface circuit and is a circuit section for outputting the pixel signal output from the readout circuit section 50 to the outside of the photoelectric converter 100. The external interface circuit provided by the output circuit section 70 is not particularly limited. For example, a SerDes (SERializer / DESerializer) transmission circuit such as an LVDS (Low Voltage Differential Signaling) circuit or an SLVS (Scalable Low Voltage Signaling) circuit can be applied to the external interface circuit.

[0018] The control pulse generation unit 80 is a control circuit that generates control signals to control the operation and timing of the vertical scanning circuit unit 40, the readout circuit unit 50, and the horizontal scanning circuit unit 60, and supplies them to each functional block. At least a portion of the control signals that control the operation and timing of the vertical scanning circuit unit 40, the readout circuit unit 50, and the horizontal scanning circuit unit 60 may be supplied from outside the photoelectric converter 100.

[0019] Note that the connection configuration of each functional block of the photoelectric converter 100 is not limited to the configuration example shown in Figure 1, and can also be configured as shown in Figure 2, for example.

[0020] In the configuration example shown in Figure 2, data lines 16 extending in a first direction are provided in each row of the pixel array in the pixel region 10. Each data line 16 is connected to a pixel 12 aligned in the first direction, forming a common signal line for these pixels 12. In addition, control lines 18 extending in a second direction are provided in each column of the pixel array in the pixel region 10. Each control line 18 is connected to a pixel 12 aligned in the second direction, forming a common signal line for these pixels 12.

[0021] Each row's control line 18 is connected to the horizontal scanning circuit unit 60. The horizontal scanning circuit unit 60 receives a control signal output from the control pulse generation unit 80, generates a control signal for reading pixel signals from the pixels 12, and supplies it to the pixels 12 via the control lines 18. Specifically, the horizontal scanning circuit unit 60 sequentially scans multiple pixels 12 in the pixel area 10 in column units and outputs the pixel signals of the pixels 12 in each row belonging to the selected column to the data lines 16.

[0022] Each row's data line 16 is connected to the readout circuit 50. The readout circuit 50 includes a plurality of holding units (not shown) corresponding to each row of the pixel array in the pixel region 10, and has the function of holding the pixel signals of the pixels 12 of each row, which are output column by column from the pixel region 10 via the data line 16, in the holding unit of the corresponding row.

[0023] The readout circuit 50 receives a control signal output from the control pulse generation unit 80 and sequentially outputs the pixel signals held in the holding unit for each row to the output circuit 70. Other components in the example configuration shown in Figure 2 may be the same as those in the example configuration shown in Figure 1.

[0024] Each pixel 12 may be composed of a photoelectric conversion unit 20 and a pixel signal processing unit 30, for example, as shown in Figure 3. The photoelectric conversion unit 20 may be composed of, for example, a photoelectric conversion element 22 and a quench element 24. The pixel signal processing unit 30 may be composed of, for example, a waveform shaping unit 32, a counter circuit 34 and a selection circuit 36.

[0025] The photoelectric conversion element 22 may be an avalanche photodiode (hereinafter referred to as "APD"). The anode of the APD constituting the photoelectric conversion element 22 is connected to a node to which voltage VL is supplied. The cathode of the APD constituting the photoelectric conversion element 22 is connected to one terminal of the quench element 24. The connection node between the photoelectric conversion element 22 and the quench element 24 is the output node of the photoelectric conversion unit 20. The other terminal of the quench element 24 is connected to a node to which a voltage VH higher than voltage VL is supplied. Voltages VL and VH are set so that a reverse bias voltage sufficient for the APD to perform avalanche multiplication operation is applied. In one example, a negative high voltage is applied as voltage VL, and a positive voltage of about the power supply voltage is applied as voltage VH. In one example, voltage VL may be -30V and voltage VH may be 3V, but from the viewpoint of improving element characteristics and suppressing degradation, it is desirable to lower the driving voltage of the APD.

[0026] The photoelectric conversion element 22 can be composed of an APD as described above. By supplying the APD with a reverse bias voltage sufficient for avalanche multiplication, the charge generated by the incidence of light on the APD undergoes avalanche multiplication, and an avalanche current is generated. There are two operating modes when a reverse bias voltage is supplied to the APD: Geiger mode and linear mode. Geiger mode is an operating mode in which the voltage applied between the anode and cathode is a reverse bias voltage greater than the breakdown voltage of the APD. Linear mode is an operating mode in which the voltage applied between the anode and cathode is a reverse bias voltage near or below the breakdown voltage of the APD. An APD operating in Geiger mode is called a SPAD (Single Photon Avalanche Diode). The APD constituting the photoelectric conversion element 22 may be configured to operate in linear mode or in Geiger mode.

[0027] In this embodiment, the anode of the APD is set to a fixed potential, and the signal is extracted from the cathode side. That is, the semiconductor region of the first conductivity type, in which the majority carriers are charges of the same polarity as the signal charge, is the N-type semiconductor region, and the semiconductor region of the second conductivity type, in which the majority carriers are charges of a different polarity than the signal charge, is the P-type semiconductor region. Furthermore, the carriers of the first conductivity type are electrons, and the carriers of the second conductivity type are holes. In addition, the impurities of the first conductivity type are donor impurities, and the impurities of the second conductivity type are acceptor impurities. The following describes the case in which one node of the APD is set to a fixed potential, but the potentials of both nodes may fluctuate.

[0028] Conversely to the above example, it is also possible to configure the APD so that the cathode is at a fixed potential and the signal is extracted from the anode side. In this case, the semiconductor region of the first conductivity type, which has majority carriers of the same polarity as the signal charge, is a P-type semiconductor region, and the semiconductor region of the second conductivity type, which has majority carriers of charges of a different polarity than the signal charge, is an N-type semiconductor region. Furthermore, the carriers of the first conductivity type are holes, and the carriers of the second conductivity type are electrons. In addition, the impurities of the first conductivity type are acceptor impurities, and the impurities of the second conductivity type are donor impurities. In the case of a configuration that detects holes as the signal charge, the conductivity type of each semiconductor region, as described later, will be the reverse conductivity type.

[0029] The quench element 24 has the function of converting the change in avalanche current generated in the photoelectric conversion element 22 into a voltage signal. Furthermore, the quench element 24 functions as a load circuit (quench circuit) during signal multiplication by avalanche multiplication, reducing the voltage applied to the photoelectric conversion element 22 and suppressing avalanche multiplication. The operation by which the quench element 24 suppresses avalanche multiplication is called the quench operation. The quench element 24 also has the function of returning the voltage supplied to the photoelectric conversion element 22 to voltage VH by allowing current to flow to compensate for the voltage drop caused by the quench operation. The operation by which the quench element 24 returns the voltage supplied to the photoelectric conversion element 22 to voltage VH is called the recharge operation. The quench element 24 can be composed of a resistor, a MOS transistor, or the like.

[0030] The waveform shaping unit 32 has an input node to which the output signal of the photoelectric conversion unit 20 is input, and an output node. The waveform shaping unit 32 has the function of converting the analog signal output from the photoelectric conversion unit 20 into a pulse signal. The waveform shaping unit 32 can be configured using a NOT circuit (inverter circuit), for example, as shown in Figure 3. Figure 3 shows an example in which the waveform shaping unit 32 is configured with one inverter circuit, but the waveform shaping unit 32 may also be configured with a circuit in which multiple inverter circuits are connected in series. Furthermore, the waveform shaping unit 32 can be configured not only with NOT circuits, but also with other circuits that have a waveform shaping effect, such as logic circuits including NOR circuits and NAND circuits. The output node of the waveform shaping unit 32 is connected to the counter circuit 34.

[0031] The counter circuit 34 has an input node to which the output signal of the waveform shaping unit 32 is input, an input node connected to the control line 14, and an output node. The counter circuit 34 has the function of counting pulses superimposed on the signal output from the waveform shaping unit 32 and holding the count value which is the counting result. Signals supplied from the vertical scanning circuit unit 40 to the counter circuit 34 via the control line 14 may include an enable signal for controlling the pulse counting period (exposure period) and a reset signal for resetting the count value held by the counter circuit 34. The output node of the counter circuit 34 is connected to the data line 16 via the selection circuit 36.

[0032] The selection circuit 36 ​​has the function of switching the electrical connection state (connected or disconnected) between the counter circuit 34 and the data line 16. The selection circuit 36 ​​switches the connection state between the counter circuit 34 and the data line 16 in accordance with the control signal supplied from the vertical scanning circuit unit 40 via the control line 14 (in the configuration example of Figure 2, the control signal supplied from the horizontal scanning circuit unit 60 via the control line 18). The selection circuit 36 ​​may include a buffer circuit for outputting a signal.

[0033] Furthermore, the pixel signal processing unit 30 does not necessarily need to be provided for each pixel 12; a single pixel signal processing unit 30 may be provided for multiple pixels 12. In this case, a single pixel signal processing unit 30 can be used to sequentially perform signal processing for multiple pixels 12. Also, if the pixel signal processing unit 30 consists of a waveform shaping unit 32, a counter circuit 34, and a selection circuit 36, each pixel signal processing unit 30 does not necessarily need to include all of the waveform shaping unit 32, counter circuit 34, and selection circuit 36.

[0034] The photoelectric conversion device 100 according to this embodiment may be formed on a single substrate, or it may be configured as a stacked type photoelectric conversion device by stacking multiple substrates. In the latter case, for example, as shown in Figure 4, it can be configured as a stacked type photoelectric conversion device in which a sensor substrate 110 and a circuit board 180 are stacked and electrically connected. At least one of the components of the pixel 12, the photoelectric conversion element 22, can be arranged on the sensor substrate 110. The circuit board 180 can also contain the quench element 24 and the pixel signal processing unit 30, which are components of the pixel 12. The photoelectric conversion element 22, the quench element 24, and the pixel signal processing unit 30 are electrically connected via connecting wiring provided for each pixel 12. Furthermore, the circuit board 180 can also contain a vertical scanning circuit section 40, a readout circuit section 50, a horizontal scanning circuit section 60, an output circuit section 70, a control pulse generation section 80, and the like.

[0035] The photoelectric conversion elements 22, quench elements 24, and pixel signal processing unit 30 of each pixel 12 may be arranged on the sensor substrate 110 and the circuit board 180 so as to overlap in a plan view. The vertical scanning circuit unit 40, readout circuit unit 50, horizontal scanning circuit unit 60, output circuit unit 70, and control pulse generation unit 80 can be arranged around the pixel region 10 composed of multiple pixels 12. Here, "plan view" refers to viewing from a direction perpendicular to the surface of the sensor substrate 110.

[0036] By configuring a stacked photoelectric converter 100, the integration density of elements can be increased, leading to improved functionality. In particular, by arranging the photoelectric converter 22, the quench element 24, and the pixel signal processing unit 30 on separate substrates, the photoelectric converter 22 can be arranged at high density without sacrificing the light-receiving area of ​​the photoelectric converter 22, thereby improving photon detection efficiency.

[0037] Furthermore, the number of substrates constituting the photoelectric converter 100 is not limited to two; the photoelectric converter 100 may be constructed by stacking three or more substrates.

[0038] Furthermore, while Figure 4 assumes chips that have been diced as sensor substrate 110 and circuit board 180, the sensor substrate 110 and circuit board 180 are not limited to chips. For example, each of the sensor substrate 110 and circuit board 180 may be a wafer. Also, the sensor substrate 110 and circuit board 180 may be stacked in wafer form and then diced, or they may be made into chips and then stacked and bonded.

[0039] Next, the basic operation of the photoelectric conversion unit 20 in the photoelectric conversion device according to this embodiment will be explained using Figure 5. Figure 5 is a diagram illustrating the basic operation of the photoelectric conversion unit in the photoelectric conversion device according to this embodiment. Figure 5(a) is a circuit diagram of the photoelectric conversion unit 20 and the waveform shaping unit 32, Figure 5(b) shows the waveform of the signal at the input node (node ​​A) of the waveform shaping unit 32, and Figure 5(c) shows the waveform of the signal at the output node (node ​​B) of the waveform shaping unit 32.

[0040] At time t0, a reverse bias voltage with a potential difference equivalent to (VH-VL) is applied to the photoelectric element 22. A reverse bias voltage sufficient to cause avalanche multiplication is applied between the anode and cathode of the APD constituting the photoelectric element 22, but when no photons are incident on the photoelectric element 22, there are no carriers that serve as seeds for avalanche multiplication. Therefore, avalanche multiplication does not occur in the photoelectric element 22, and no current flows through the photoelectric element 22.

[0041] At the following time t1, assume that a photon is incident on the photoelectric conversion element 22. When a photon is incident on the photoelectric conversion element 22, electron-hole pairs are generated by photoelectric conversion, and avalanche multiplication occurs using these carriers as a seed, causing an avalanche multiplication current to flow through the photoelectric conversion element 22. This avalanche multiplication current flows through the quench element 24, causing a voltage drop across the quench element 24, and the voltage at node A begins to drop. When the voltage drop at node A becomes large and the avalanche multiplication operation stops at time t3, the voltage level at node A will no longer drop.

[0042] When the avalanche multiplication operation in the photoelectric conversion element 22 stops, a current flows from the node to which voltage VL is supplied through the photoelectric conversion element 22 to node A to compensate for the voltage drop, and the voltage at node A gradually increases. Subsequently, at time t5, node A settles back to its original voltage level.

[0043] The waveform shaping unit 32 binarizes the signal input from node A according to a predetermined threshold and outputs it from node B. Specifically, the waveform shaping unit 32 outputs a low-level signal from node B when the voltage level of node A exceeds the threshold, and outputs a high-level signal from node B when the voltage level of node A is below the threshold. For example, as shown in Figure 5(b), suppose the voltage of node A is below the threshold during the period from time t2 to time t4. In this case, as shown in Figure 5(c), the signal level at node B is low during the period from time t0 to time t2 and from time t4 to time t5, and high during the period from time t2 to time t4.

[0044] Thus, the analog signal input from node A is waveform-shaped into a digital signal by the waveform shaping unit 32. The pulse signal output from the waveform shaping unit 32 in response to the incidence of photons on the photoelectric conversion element 22 is the photon detection pulse signal.

[0045] Next, the specific structure of the photoelectric conversion element 22 in the photoelectric conversion device 100 according to this embodiment will be described with reference to Figures 6 to 8. Figure 6 is a plan view showing the structure of the photoelectric conversion element according to this embodiment. Figure 7 is a schematic cross-sectional view showing the structure of the photoelectric conversion element according to this embodiment. Figure 8 is a diagram showing the depth-direction distribution of impurity density in the photoelectric conversion element according to this embodiment.

[0046] The photoelectric conversion element 22 of the photoelectric conversion device 100 according to this embodiment can be provided on the semiconductor layer 120 of the sensor substrate 110, for example, in the configuration shown in Figure 4. Figure 6 corresponds to a plan view from the side of the first surface 122 of the semiconductor layer 120. On the semiconductor layer 120, for example as shown in Figure 6, multiple photoelectric conversion elements 22 of pixels 12 constituting the pixel region 10 are arranged in a matrix. The dashed lines shown in Figure 6 indicate the boundaries between adjacent photoelectric conversion elements 22. In this specification, "plan view" refers to a view from the direction normal to the surface of the semiconductor layer 120 (the first surface 122, which will be described later). Also, "cross-section" refers to a cross-section parallel to the direction normal to the first surface 122 or the second surface 124 of the semiconductor layer 120.

[0047] Figure 7 is a cross-sectional view of the line VI-VI' in Figure 6, and Figure 8 shows the depth-direction distribution of impurity density (N) in the semiconductor layer 120 along the AB line in Figure 7. In this specification, the depth direction refers to the direction from the first surface 122 to the second surface 124, and depth refers to the distance from the first surface 122.

[0048] The semiconductor layer 120 may be a semiconductor layer obtained by thinning a semiconductor substrate with a low impurity density, such as a low impurity density N-type silicon substrate. The semiconductor layer 120 is provided with N-type semiconductor regions 126 and 128, P-type semiconductor regions 130, 132 and 134, an N-type impurity doped region 136, and a semiconductor region 138. Figure 7 shows the density distribution of donor impurities constituting the N-type semiconductor region 126 and the N-type impurity doped region 136, and the density distribution of acceptor impurities constituting the P-type semiconductor regions 130 and 132. The N-type semiconductor region 128 and the semiconductor region 138 have sufficiently low impurity densities compared to the N-type semiconductor region 126, the P-type semiconductor regions 130 and 132, and the N-type impurity doped region 136, and therefore have little effect on them, so they are not shown in the figure. On the first surface 122 of the semiconductor layer 120, there is a cathode electrode 144 electrically connected to an N-type semiconductor region 126 and an anode electrode 146 electrically connected to a P-type semiconductor region 134.

[0049] The N-type semiconductor region 126 is provided from the first surface 122 to a depth D1 such that at least a portion of it reaches the first surface 122. The N-type semiconductor region 128 is provided from the first surface 122 to a depth D2 which is deeper than depth D1, surrounding the N-type semiconductor region 126. The P-type semiconductor region 130 is provided from a depth D2 to a depth D4 which is deeper than depth D2. The N-type impurity doped region 136 is provided from a depth D3 which is deeper than depth D2 and shallower than depth D4, to a depth D6 which is deeper than depth D4. The semiconductor region 138 is provided from a depth D6 to a depth D8 which is deeper than depth D6. The P-type semiconductor region 132 is provided from a depth D8 to the second surface 124. In a plan view, the P-type semiconductor region 134 is arranged to surround the region containing the N-type semiconductor regions 126, 128, the P-type semiconductor region 130, the N-type impurity-doped region 136, and the semiconductor region 138 (see Figure 6). The P-type semiconductor region 134 extends from the first surface 122 to a depth D8 and is electrically connected to the P-type semiconductor region 132. The region within the semiconductor layer 120 surrounded by the P-type semiconductor regions 132 and 134 is the region where one photoelectric conversion element 22 is located. This region is referred to as the well region.

[0050] The N-type semiconductor region 126 is a high-impurity-density N-type semiconductor region that serves as the cathode of the APD constituting the photoelectric conversion element 22, and as shown in Figure 6, it is located in the center of the well region in a plan view. A cathode electrode 144 is provided on the N-type semiconductor region 126. The cathode electrode 144 is ohmic-connected to the N-type semiconductor region 126. The N-type semiconductor region 128 is an N-type semiconductor region with a lower impurity density than the N-type semiconductor region 126, and is provided across the entire well region in a plan view. The P-type semiconductor region 130 is a P-type semiconductor region that serves as the anode of the APD constituting the photoelectric conversion element 22. The P-type semiconductor region 130 is provided across the entire well region in a plan view, and is electrically connected to the P-type semiconductor region 134 at its peripheral edge in a plan view. The N-type impurity-doped region 136 is provided across the entire well region in a plan view, overlapping with the bottom edge on the second surface 124 side of the impurity density distribution of the P-type semiconductor region 130, as shown in Figure 7. In other words, the peak position of the impurity density of the donor impurities constituting the N-type impurity doped region 136 is located deeper than the peak position of the impurity density of the acceptor impurities constituting the P-type semiconductor region 130. The density of the donor impurities constituting the N-type impurity doped region 136 is lower than the density of the acceptor impurities constituting the P-type semiconductor region 130. The semiconductor region 138 is a low-impurity-density semiconductor region that becomes a photoelectric conversion region, and may be an N-type semiconductor region or a P-type semiconductor region. The P-type semiconductor region 132 plays a role in defining the depth of the photoelectric conversion region. Furthermore, the P-type semiconductor region 132, in conjunction with the P-type semiconductor region 134, also plays a role as a separation region that separates adjacent photoelectric conversion elements 22. The P-type semiconductor region 134 has a high-impurity-density P-type semiconductor region (not shown) at least in the portion in contact with the first surface 122, and is ohmic connected to the anode electrode 146.

[0051] The photoelectric conversion element 22 of the photoelectric conversion device 100 according to this embodiment can be manufactured using a general semiconductor device manufacturing method. For example, each semiconductor layer and an N-type impurity doped region 136 are formed from one side (the side of the first surface 122) of a low impurity density N-type silicon substrate using photolithography and ion implantation. Next, a wiring layer including a cathode electrode 144 and an anode electrode 146 is formed on the aforementioned one side of the N-type silicon substrate. Then, the N-type silicon substrate is thinned from the other side to form a semiconductor layer 120. The new surface exposed by thinning the N-type silicon substrate becomes the second surface 124.

[0052] For example, the N-type semiconductor region 126 is formed by ion implanting donor impurities so that they are in contact with the first surface 122 of the semiconductor layer 120. The P-type semiconductor region 130 is formed by ion implanting acceptor impurities to a depth greater than the depth to which the N-type semiconductor region 126 is provided. The semiconductor region 138 may be formed by ion implanting impurities to a depth greater than the depth to which the P-type semiconductor region 130 is provided, or the N-type silicon substrate may be used as is. The N-type impurity-doped region 136 is formed so that it overlaps with the P-type semiconductor region 130 in the depth direction of the semiconductor layer 120. Furthermore, the N-type impurity-doped region 136 is formed by ion implanting donor impurities such that the depth at which the density of donor impurities peaks is located deeper than the depth at which the density of acceptor impurities constituting the P-type semiconductor region 130 peaks.

[0053] Furthermore, when the second surface 124 of the semiconductor layer 120 is used as the light-receiving surface to which the light to be detected is incident, it is desirable to form the P-type semiconductor region 132 so as to be in contact with the second surface 124, as shown in Figure 7. By configuring the P-type semiconductor region 132 in this way, the generation of dark current on the second surface 124 can be prevented. In addition, a dielectric isolation structure using deep trenches may be used for the isolation region that separates adjacent photoelectric conversion elements 22. In this case, the P-type semiconductor region 134 can be arranged around the dielectric of the isolation region.

[0054] In the photoelectric conversion element 22 of this embodiment, avalanche multiplication of the signal charge occurs between the N-type semiconductor region 126 and the P-type semiconductor region 130 facing it. On the other hand, the distance between the N-type semiconductor region 126 and the P-type semiconductor region 134 is much longer than the distance between the N-type semiconductor region 126 and the P-type semiconductor region 130. Also, the N-type semiconductor region 138 has a low impurity density. For this reason, electric field concentration does not occur in the lateral direction (parallel to the first surface 122) from the N-type semiconductor region 126 toward the P-type semiconductor region 134. In other words, the electric field strength in the lateral direction does not become strong enough to cause avalanche multiplication, and avalanche multiplication does not occur due to the electric field in the lateral direction. Therefore, even if dark electrons are generated near the first surface 122, these dark electrons will not cause avalanche multiplication due to the electric field in the lateral direction, and these dark electrons will not be detected as noise.

[0055] Figure 9 shows the potential distribution within the semiconductor layer 120 along the AB line in Figure 7. The vertical axis represents the potential for electrons, which are signal carriers; the potential decreases as you move upwards on the vertical axis and increases as you move downwards on the vertical axis. The AB line in Figure 7 is perpendicular to the first surface 122 and the second surface 124, and passes through the center of the N-type semiconductor region 126. It coincides with the main path through which signal charges (electrons) generated in the semiconductor region 138 flow toward the N-type semiconductor region 126.

[0056] The photoelectric conversion element 22 of this embodiment is basically divided into a high-electric-field region that generates avalanche multiplication and a photoelectric conversion region that generates signal charges. Specifically, along the AB line in Figure 7, the high-electric-field region is from the N-type semiconductor region 126 to the P-type semiconductor region 130, and the photoelectric conversion region is from the P-type semiconductor region 130 to the P-type semiconductor region 132.

[0057] The signal charge generated in the photoelectric conversion region moves along the potential gradient to the high-electric field region by drift, etc., where it undergoes avalanche multiplication and is detected as a signal by being collected via the cathode electrode 144. The P-type semiconductor region 130 is an intermediate region transitioning from the photoelectric conversion region to the high-electric field region, but in order to obtain the potential distribution shown in Figure 9, at least the portion of the P-type semiconductor region 130 along the AB line must be completely depleted. Furthermore, at least a large portion of the semiconductor region 138 with low impurity density is also depleted. The structure described above will be referred to here as a charge-collecting APD.

[0058] Here, the drive voltage applied to the charge-collecting APD described above (the voltage applied between the cathode electrode 144 and the anode electrode 146) is denoted as the drive voltage VDD. At this time, if the voltages applied to the high-electric-field region, intermediate region, and photoelectric conversion region along the AB line are voltages V1, V2, and V3, respectively, then the drive voltage VDD can be expressed as follows. VDD = V1 + V2 + V3

[0059] More specifically, along the AB line, the N-type semiconductor region 126 and the P-type semiconductor region 132 are neutral regions that are not depleted, while all regions in between are depleted. Therefore, the driving voltage VDD applied along the AB line is the potential difference between the N-type semiconductor region 126 and the P-type semiconductor region 132, and the potential distribution in the region between them is determined by the impurity distribution in that region. In other words, voltages V1, V2, and V3 are each determined by the impurity distribution of the region along the AB line. Here, the high electric field region is from the N-type semiconductor region 126 to the P-type semiconductor region 130. The intermediate region is the P-type semiconductor region 130. Furthermore, the photoelectric conversion region is from the P-type semiconductor region 130 to the P-type semiconductor region 132. Referring to Figure 8, due to the impurity density distribution, voltages V1 and V2 are higher than voltage V3. Also, as described above, the driving voltage VDD is the sum of these voltages. Furthermore, due to the impurity density distribution shown in Figure 8, the potential of the P-type semiconductor region 132 is higher than the potential of the P-type semiconductor region 130.

[0060] Voltage V1 is the voltage required to generate avalanche multiplication. SPAD operation will occur if voltage V1 is greater than or equal to the voltage required for avalanche multiplication in the high-electric-field region. However, if the values ​​of voltages V2 and V3 are insufficient, it will lead to a decrease in quantum efficiency and an increase in signal response time, ultimately degrading signal performance. Therefore, in charge-collecting APDs, voltages V2 and V3 must also be given sufficient consideration.

[0061] Of the voltages V1, V2, and V3, voltage V3 is directly related to the time it takes for signal electrons generated in the photoelectric conversion region to reach the high-electric field region, i.e., the signal response time, and is largely determined according to the application. Therefore, in order to achieve low-voltage operation of the photoelectric conversion element 22, it is important to reduce voltages V1 and V2.

[0062] First, let's discuss how to reduce the voltage V2. The voltage V2 is calculated to include the voltage required for the P-type semiconductor region 130 to be completely depleted along the AB line, as well as the voltage required to eliminate the potential barrier at the boundary between the intermediate region and the photoelectric conversion region along the AB line.

[0063] A sufficiently high electric field must be formed between the N-type semiconductor region 126 and the P-type semiconductor region 130 to cause avalanche multiplication; therefore, the P-type semiconductor region 130 must have an effective impurity density above a certain value. Here, effective impurity density is the net impurity density expressed as the difference between the density of acceptor impurities and the density of donor impurities when acceptor impurities and donor impurities are present together. In this specification, in order to clarify the dominant impurities, the effective impurity density of the P-type semiconductor region when donor impurities are present in the P-type semiconductor region may be called the effective acceptor density. Also, the effective impurity density of the N-type semiconductor region when acceptor impurities are present in the N-type semiconductor region may be called the effective donor density.

[0064] According to semiconductor theory, if the effective impurity density of a semiconductor layer is A and its width is W, and the impurity density per unit area (A × W) is constant, then the voltage required to deplete this semiconductor layer is proportional to W. In other words, the more the impurities are distributed over a narrower width, the smaller the depletion voltage becomes. Therefore, to minimize the voltage V2, it is desirable to make the width of the P-type semiconductor region 130 in the depth direction as narrow as possible.

[0065] Generally, boron is used as an acceptor impurity to form P-type semiconductor regions. Ion implantation is often used to add impurities to semiconductors because it allows for easy control of density and depth. When impurities are added to a semiconductor by ion implantation, a phenomenon called channeling occurs, in which ions propagate along the crystal axis or crystal plane, which can result in a broad impurity distribution in the depth direction. Channeling is particularly likely to occur when using ions with small atomic masses, such as boron. Therefore, when forming P-type semiconductor regions 130, which require a narrow width in the depth direction, it is preferable to perform ion implantation from a direction with a certain degree of inclination with respect to the crystal axis, in other words, from a random direction.

[0066] Furthermore, by providing an N-type impurity doping region 136 that overlaps with the tail portion on the second surface 124 side of the impurity density distribution of the P-type semiconductor region 130, the effective width of the P-type semiconductor region 130 can be narrowed. When an N-type impurity doping region 136 is provided, some of the acceptor impurities in the P-type semiconductor region 130 are compensated by the donor impurities in the N-type impurity doping region 136, and the effective impurity density of the P-type semiconductor region 130 decreases. Therefore, the amount of acceptor impurities introduced per unit area when forming the P-type semiconductor region 130 should be increased compared to when the N-type impurity doping region 136 is not formed, so that a P-type semiconductor region 130 with an effective impurity density of a certain value or higher can be obtained.

[0067] By configuring the photoelectric conversion element 22 in this way, the effective width of the P-type semiconductor region 130 can be narrowed, making it possible to reduce the value of the voltage V2.

[0068] Next, we will explain how to reduce the voltage V1. Whether avalanche multiplication occurs in a high-electric-field region depends on how much impact ionization occurs in signal carriers traveling through that region. Assuming a constant electric field strength within the high-electric-field region, an impact ionization rate (number of impact ionizations per unit length) of α, and a depth of W1 within the high-electric-field region, the larger the value of α × W1, the higher the probability of avalanche multiplication. Therefore, to achieve a sufficient probability of avalanche multiplication, the value of α × W1 must be above a certain value. In practice, the value of α × W1 is approximately 2.

[0069] Among the parameters that determine the probability of avalanche multiplication, the impact ionization rate α largely depends on the electric field strength in the high-electric field region, i.e., V1 / W1. In a typical SPAD, the electric field strength in the high-electric field region is around 400kV / cm to 600kV / cm. On the other hand, if the width W1 of the high-electric field region is changed from W1 to W1-ΔW, the impact ionization rate α increases exponentially with increasing ΔW. In other words, the value of α×W1 increases as the value of W1 decreases. To put it another way, by decreasing the width W1, the voltage V1 can be reduced while maintaining the value of α×W1.

[0070] To conduct a more quantitative discussion, the width W1 of the N-type semiconductor region 126 will be defined as follows: The width W1 is defined as the effective donor density of the N-type semiconductor region 126 being 1 × 10⁻⁶. 16 cm -3 From this depth, the effective acceptor density of the P-type semiconductor region 130 is 1 × 10⁻¹⁶. 16 cm -3 This is defined as the width up to the depth (the bottom edge on the side of the first surface 122) of the first surface 122.

[0071] Generally, when a reverse bias voltage is applied to a PN junction, the electric field strength decreases in the depletion regions on both sides of the PN junction surface with the PN junction surface as the peak. This is due to the electrostatic shielding by the charges of impurity ions when the semiconductor region is depleted. However, if the density of impurity ions is about 1×10 16 cm -3 or less, the influence of electrostatic shielding is relatively small. Moreover, in the region where the N-type semiconductor region 126 and the P-type semiconductor region 130 face each other, acceptors and donors cancel each other out significantly at densities of about 1×10 16 cm -3 or less. Therefore, the effective donor density distribution and the effective acceptor density distribution become very steep at about 1×10 16 cm -3 or less, and the influence on the electric field strength becomes even smaller. Therefore, the width W1 defined as above can be regarded as a high electric field region that maintains a substantially constant electric field strength.

[0072] Similarly, let the width W2 in the depth direction of the P-type semiconductor region 130 be defined as follows. That is, the width W2 is defined as the width from the depth on the side of the first surface 122 where the effective acceptor density of the P-type semiconductor region 130 becomes 1×10 16 cm -3 to the depth on the side of the second surface 124 where the effective acceptor density of the P-type semiconductor region 130 becomes 1×10 16 cm -3

[0073] In the photoelectric conversion element 22 of the present embodiment, as an example, the target of the driving voltage VDD is set to 25 V or less. Configuration examples of the width W1, the width W2, and the effective acceptor density NA of the P-type semiconductor region 130 for achieving this target are calculated below.

[0074] First, consider the voltage V2, the width W2, and. Consider the effective acceptor density NA of the P-type semiconductor region 130. The voltage V2 is expressed as the following formula (1) when the built-in voltage is Vb, the elementary charge amount is q, and the dielectric constant of the semiconductor is ε. V2 = qNA / (2ε)×(W2​2 )-Vb …(1)

[0075] The width W2 is 0.6 μm, and the effective acceptor density NA is 4 × 10⁻¹⁴. 16 cm -3 Assuming the built-in voltage Vb is 0.7V, the voltage V2 can be calculated as 10.3V from equation (1).

[0076] Without changing the W2×NA value, the width W2 is set to 0.4 μm and the effective acceptor density NA is set to 6 × 10⁻¹⁰. 16 cm -3 When set to this value, the voltage V2 is calculated to be 6.6V from equation (1). In this way, by changing the relationship between the width W2 and the effective acceptor density NA from the former condition to the latter condition, the value of the voltage V2 becomes 3.7V smaller.

[0077] Note that the effective acceptor density NA actually has a distribution within the width W2, but here, for simplicity, the average effective acceptor density within the width W2 is used. Also, if the value of W2 × NA is low, the value of the voltage V2 will also be small, but if the value of W2 × NA is too low, punch-through will occur in the P-type semiconductor region 130 when a high electric field reverse bias voltage is applied to the APD, and it will not be possible to maintain a high electric field strength in the high electric field region. Therefore, the value of W2 × NA needs to be above a certain value. In the calculation example above, the value of W2 × NA is 2.4 × 10 12 cm -2 However, this is the effective acceptor density, which is offset to some extent by donor impurities, and also 1 × 10⁻⁶ 16 cm -3 The above are the values ​​for the density region. Therefore, in order to form the P-type semiconductor region 130, 3 × 10 12 cm -2 The introduction of the above acceptor impurities is necessary.

[0078] Next, we consider the voltage V1 and width W1 required for avalanche multiplication. As mentioned above, the value of α × W1 should be approximately 2 or greater. Therefore, if the width W1 is, for example, 0.4 μm, the impact ionization rate α is 5 × 10 4It is required to be greater than / cm. If the signal carrier is electrons, the impact ionization rate α is 5 × 10 4 The electric field strength required to achieve a value of / cm is 400kV / cm. Therefore, if the width W1 is 0.4μm, a voltage V1 of 16V is required.

[0079] Based on the above, the width W1 is 0.4 μm, the width W2 is 0.4 μm, and the effective acceptor density NA is 6 × 10⁻⁶. 16 cm -3 In this case, voltage V1 will be 16V and voltage V2 will be 6.6V. Voltage V3 depends on the required signal response speed, but is usually around 1-5V. If we set voltage V3 to 2.4V, the drive voltage VDD will be V1+V2+V3=25V.

[0080] From the above example, it can be understood that reducing the widths W1 and W2 is important for addressing the challenge of reducing the drive voltage VDD. Further investigation by the inventors into various other conditions revealed that it is important to keep the value of (W1 + W2) below 0.8 μm. If the width W2 is set to 0.5 μm, the voltage V2 will increase, so in order to reduce the voltage V1, it is necessary to set the width W1 to below 0.3 μm.

[0081] Furthermore, in order to reduce the width W2, it is important that the N-type impurity doping region 136 is provided in such a way that it exactly cancels out the tail portion of the acceptor impurity density distribution of the P-type semiconductor region 130. According to the inventor's trials, the donor amount per unit area required for the formation of the N-type impurity doping region 136 can be about half or less of the acceptor amount per unit area required for the formation of the P-type semiconductor region 130, but at least 5 × 10⁻⁶ 11 cm -2 A certain degree of N-type impurity doping region 136 is necessary. Without this degree of N-type impurity doping region 136, it is practically difficult to reduce the width W2 to 0.5 μm or less, that is, to keep (W1 + W2) to 0.8 μm or less.

[0082] Thus, according to this embodiment, the driving voltage of the avalanche photodiode can be reduced. This makes it possible to achieve energy savings through lower power consumption, mitigate degradation of device characteristics due to reduced heat generation, and reduce dark current.

[0083] [Second Embodiment] A photoelectric conversion device according to a second embodiment of the present invention will be described with reference to Figures 10 and 11. Components similar to those in the photoelectric conversion device according to the first embodiment are denoted by the same reference numerals, and their descriptions are omitted or simplified. Figure 10 is a plan view showing the structure of the photoelectric conversion element in the photoelectric conversion device according to this embodiment. Figure 11 is a schematic cross-sectional view showing the structure of the photoelectric conversion element in the photoelectric conversion device according to this embodiment.

[0084] The photoelectric conversion device according to this embodiment is the same as the photoelectric conversion device according to the first embodiment, except that the configuration of the photoelectric conversion element 22 is different. In this embodiment, the explanation will focus on the parts in which the photoelectric conversion element 22 of this embodiment differs from the photoelectric conversion element 22 of the first embodiment, and the explanation of parts common to the photoelectric conversion element 22 of the first embodiment will be omitted as appropriate.

[0085] The photoelectric conversion element 22 of this embodiment further includes a P-type semiconductor region 140 in addition to N-type semiconductor regions 126, 128, P-type semiconductor regions 130, 132, 134, N-type impurity doped region 136, and semiconductor region 138.

[0086] In the photoelectric conversion element 22 of the first embodiment, the P-type semiconductor region 130 and the N-type impurity doped region 136 are provided across the entire well region in a plan view. In contrast, in the photoelectric conversion element 22 of this embodiment, the P-type semiconductor region 130 and the N-type impurity doped region 136 are arranged in the central part of the well region in a plan view, overlapping with the N-type semiconductor region 126 in a plan view, as shown in Figure 11. A P-type semiconductor region 140 is provided between the P-type semiconductor region 130 and the N-type impurity doped region 136 and the P-type semiconductor region 134 in a plan view. The P-type semiconductor region 130 is electrically connected to the anode electrode 146 via the P-type semiconductor region 140 and the P-type semiconductor region 134. The effective acceptor density per unit area of ​​the P-type semiconductor region 140 is higher than the effective acceptor density per unit area of ​​the P-type semiconductor region 130.

[0087] In the photoelectric conversion element 22 of the first embodiment, electrons generated in the semiconductor region 138, which is the photoelectric conversion region, may reach the N-type semiconductor region 128 beyond the P-type semiconductor region 130 in the peripheral part of the well region in a plan view. In this case, electrons that reach the N-type semiconductor region 128 in the peripheral part of the well region do not undergo avalanche multiplication as described above and are not detected as a signal, resulting in a loss of sensitivity.

[0088] By further providing a P-type semiconductor region 140 at the periphery of the well region in a plan view, the potential barrier between the semiconductor region 138 and the N-type semiconductor region 128 at the periphery of the well region in a plan view becomes larger. As a result, electrons generated in the semiconductor region 138, which is the photoelectric conversion region, are more likely to reach the N-type semiconductor region 128 by passing through the central P-type semiconductor region 130 than by passing through the peripheral P-type semiconductor region 140. If signal electrons take such a path, avalanche multiplication occurs when they pass through the high-electric-field region, and this can be detected as a signal.

[0089] Therefore, the photoelectric conversion element 22 of this embodiment can increase the proportion of signal electrons that reach the cathode by passing through the vicinity of the AB line passing through the central part of the photoelectric conversion element 22, i.e., the center of the cathode, compared to the photoelectric conversion element of the first embodiment. This makes it possible to improve the light receiving sensitivity.

[0090] In Figure 11, the P-type semiconductor region 140 is provided from a depth deeper than D1 and shallower than D2, to a depth deeper than D6 and shallower than D8, but the depth to which the P-type semiconductor region 140 is provided is not limited to this. The P-type semiconductor region 140 only needs to have an effective acceptor density per unit area that is higher than the effective acceptor density per unit area of ​​the P-type semiconductor region 130, and be electrically connected to the P-type semiconductor region 130 and the P-type semiconductor region 134.

[0091] The P-type semiconductor region 140 can be formed by various methods. For example, the P-type semiconductor region 140 can be formed by additionally introducing acceptor impurities to the periphery of the well region compared to the structure of the first embodiment. Alternatively, in the structure of the first embodiment, the N-type impurity doped region 136 may be formed only in the central part of the well region, and the P-type semiconductor region 130 in the periphery of the well region that does not overlap with the N-type impurity doped region 136 may be substantially the P-type semiconductor region 140. Alternatively, in the structure of the first embodiment, the acceptor impurities in the P-type semiconductor region 130 in the central part of the well region may be partially compensated by donor impurities in the N-type semiconductor region 126 or additionally formed N-type semiconductor region. In this case, the P-type semiconductor region 130 in the periphery of the well region that is not partially compensated for by donor impurities becomes substantially the P-type semiconductor region 140.

[0092] If we consider the P-type semiconductor region 130 and the P-type semiconductor region 140 as a single P-type semiconductor region, then this P-type semiconductor region can be said to have a first region that overlaps with the N-type semiconductor region 126 in a plan view, and a second region that does not overlap with the N-type semiconductor region 126 in a plan view. In this case, the effective impurity density per unit area of ​​acceptor impurities constituting the second region is higher than the effective impurity density per unit area of ​​acceptor impurities constituting the first region. The second region is typically the region surrounding the first region.

[0093] Thus, according to this embodiment, in addition to the effects described in the first embodiment, a further effect of improved sensitivity can be achieved.

[0094] [Third Embodiment] A photoelectric conversion device according to a third embodiment of the present invention will be described with reference to Figure 12. Components similar to those in the photoelectric conversion device according to the first or second embodiment will be denoted by the same reference numerals, and their descriptions will be omitted or simplified. Figure 12 is a schematic cross-sectional view showing the structure of the photoelectric conversion element in the photoelectric conversion device according to this embodiment.

[0095] The photoelectric conversion device according to this embodiment is the same as the photoelectric conversion device according to the first embodiment, except that the configuration of the photoelectric conversion element 22 is different. In this embodiment, the explanation will focus on the parts in which the photoelectric conversion element 22 of this embodiment differs from the photoelectric conversion element 22 of the first embodiment, and the explanation of parts common to the photoelectric conversion element 22 of the first embodiment will be omitted as appropriate.

[0096] The photoelectric conversion element 22 of this embodiment further includes a P-type impurity doped region 142 in addition to N-type semiconductor regions 126, 128, P-type semiconductor regions 130, 132, 134, N-type impurity doped region 136, and semiconductor region 138. The P-type impurity doped region 142 is provided from a depth D5 between depths D4 and D6 to a depth D7 between depths D6 and D8. More specifically, the P-type impurity doped region 142 is provided over the entire well region in a plan view so as to overlap with the tail portion on the second surface 124 side of the impurity density distribution of the N-type impurity doped region 136. In other words, the peak position of the impurity density of acceptor impurities constituting the P-type impurity doped region 142 is located deeper than the peak position of the impurity density of donor impurities constituting the N-type impurity doped region 136. The P-type impurity-doped region 142 is formed with an impurity density sufficient to compensate for the donor impurities in the tail portion on the second surface 124 side of the impurity density distribution of the N-type impurity-doped region 136. Typically, the impurity density of the P-type impurity-doped region 142 is lower than that of the N-type impurity-doped region 136.

[0097] The P-type impurity doping region 142 is formed so as to overlap with the N-type impurity doping region 136 in the depth direction of the semiconductor layer 120. Furthermore, the P-type impurity doping region 142 is formed by ion implanting acceptor impurities such that the depth at which the density of acceptor impurities peaks is located closer to the second surface 124 than the depth at which the density of donor impurities constituting the N-type impurity doping region 136 peaks.

[0098] By providing the N-type impurity doping region 136, the potential for electrons is reduced, making it easier for so-called potential pockets to form. When potential pockets are present, signal electrons tend to accumulate there, increasing the time it takes to reach the high-electric-field region, and consequently degrading the signal response performance. By further providing the P-type impurity doping region 142, the formation of the aforementioned potential pockets can be prevented, and the decrease in the movement speed of signal electrons caused by the N-type impurity doping region 136 can be reduced.

[0099] In addition to the above configuration of this embodiment, a P-type semiconductor region 140, as described in the second embodiment, may be further added.

[0100] Thus, according to this embodiment, in addition to the effects described in the first and second embodiments, a further effect of improved signal responsiveness can be achieved.

[0101] [Fourth Embodiment] A photodetection system according to a fourth embodiment of the present invention will be described with reference to Figure 13. Figure 13 is a block diagram showing the schematic configuration of the photodetection system according to this embodiment. In this embodiment, a photodetection sensor to which the photoelectric converter 100 of the first embodiment is applied will be described.

[0102] The photoelectric converter 100 described in the first to third embodiments above is applicable to various light detection systems. Examples of applicable light detection systems include imaging systems such as digital still cameras, digital camcorders, surveillance cameras, photocopiers, fax machines, mobile phones, in-vehicle cameras, and observation satellites. Camera modules, which include optical systems such as lenses and imaging devices, are also included in light detection systems. Figure 13 shows a block diagram of a digital still camera as an example of these.

[0103] The photodetection system 200 illustrated in Figure 13 includes a photoelectric converter 201, a lens 202 for forming an optical image of a subject onto the photoelectric converter 201, an aperture 204 for varying the amount of light passing through the lens 202, and a barrier 206 for protecting the lens 202. The lens 202 and the aperture 204 form an optical system that focuses light onto the photoelectric converter 201. The photoelectric converter 201 is the photoelectric converter 100 described in any of the first to third embodiments, which converts the optical image formed by the lens 202 into image data.

[0104] The photodetection system 200 also includes a signal processing unit 208 that processes the output signal from the photoelectric converter 201. The signal processing unit 208 generates image data from the digital signal output by the photoelectric converter 201. The signal processing unit 208 also performs various corrections and compressions as needed before outputting the image data. The photoelectric converter 201 may include an AD conversion unit that generates the digital signal processed by the signal processing unit 208. The AD conversion unit may be formed on the semiconductor layer (semiconductor substrate) on which the photon detection element of the photoelectric converter 201 is formed, or on a semiconductor substrate separate from the semiconductor layer on which the photon detection element of the photoelectric converter 201 is formed. The signal processing unit 208 may also be formed on the same semiconductor substrate as the photoelectric converter 201.

[0105] The light detection system 200 further includes a buffer memory unit 210 for temporarily storing image data, and an external interface unit (external I / F unit) 212 for communicating with an external computer or the like. Furthermore, the light detection system 200 includes a recording medium 214 such as a semiconductor memory for recording or reading imaging data, and a recording medium control interface unit (recording medium control I / F unit) 216 for recording or reading data from the recording medium 214. The recording medium 214 may be built into the light detection system 200 or it may be detachable. In addition, communication between the recording medium control I / F unit 216 and the recording medium 214, and communication from the external I / F unit 212, may be performed wirelessly.

[0106] Furthermore, the photodetection system 200 includes an overall control / calculation unit 218 that controls various calculations and the entire digital still camera, and a timing generation unit 220 that outputs various timing signals to the photoelectric converter 201 and the signal processing unit 208. Here, the timing signals and the like may be input from an external source, and the photodetection system 200 only needs to have at least the photoelectric converter 201 and the signal processing unit 208 that processes the output signals output from the photoelectric converter 201. The timing generation unit 220 may be mounted on the photoelectric converter 201. In addition, the overall control / calculation unit 218 and the timing generation unit 220 may be configured to perform some or all of the control functions of the photoelectric converter 201.

[0107] The photoelectric converter 201 outputs the imaging signal to the signal processing unit 208. The signal processing unit 208 performs predetermined signal processing on the imaging signal output from the photoelectric converter 201 and outputs image data. The signal processing unit 208 generates an image using the imaging signal. The signal processing unit 208 may also be configured to perform distance measurement calculations on the signal output from the photoelectric converter 201.

[0108] Thus, according to this embodiment, by configuring a photodetection system using the photoelectric conversion device of the first to third embodiments, a photodetection system capable of acquiring higher quality images can be realized.

[0109] [Fifth Embodiment] A distance image sensor according to a fifth embodiment of the present invention will be described with reference to Figure 14. Figure 14 is a block diagram showing the schematic configuration of the distance image sensor according to this embodiment. In this embodiment, the distance image sensor will be described as an example of a photodetection system to which the photoelectric converter 100 described in the first to third embodiments is applied.

[0110] As shown in Figure 14, the distance image sensor 300 according to this embodiment may be configured to include an optical system 302, a photoelectric converter 304, an image processing circuit 306, a monitor 308, and a memory 310. This distance image sensor 300 receives light (modulated light or pulsed light) that is irradiated from a light source device 320 toward the subject 330 and reflected from the surface of the subject 330, and acquires a distance image corresponding to the distance to the subject 330.

[0111] The optical system 302 consists of one or more lenses and has the role of forming an image of the image light (incident light) from the subject 330 onto the light-receiving surface (sensor part) of the photoelectric converter 304.

[0112] The photoelectric converter 304 is the photoelectric converter 100 described in any of the first to third embodiments, and has the function of generating a distance signal indicating the distance to the subject 330 based on the image light from the subject 330, and supplying the generated distance signal to the image processing circuit 306.

[0113] The image processing circuit 306 has the function of performing image processing to construct a distance image based on the distance signal supplied from the photoelectric converter 304.

[0114] The monitor 308 has the function of displaying the distance image (image data) obtained by the image processing in the image processing circuit 306. The memory 310 also has the function of storing (recording) the distance image (image data) obtained by the image processing in the image processing circuit 306.

[0115] Thus, according to this embodiment, by configuring a distance image sensor using the photoelectric conversion device of the first to third embodiments, it is possible to realize a distance image sensor capable of acquiring distance images containing more accurate distance information, in conjunction with improving the characteristics of the pixel 12.

[0116] [Sixth Embodiment] An endoscopic surgical system according to the sixth embodiment of the present invention will be described with reference to Figure 15. Figure 15 is a schematic diagram showing an example of the configuration of the endoscopic surgical system according to this embodiment. In this embodiment, the endoscopic surgical system will be described as an example of a photodetection system to which the photoelectric converter 100 described in the first to third embodiments is applied.

[0117] Figure 15 illustrates a surgeon (physician) 460 performing surgery on a patient 472 on a patient bed 470 using an endoscopic surgical system 400.

[0118] As shown in Figure 15, the endoscopic surgical system 400 of this embodiment may consist of an endoscope 410, surgical instruments 420, and a cart 430 equipped with various devices for endoscopic surgery. The cart 430 may be equipped with a Camera Control Unit (CCU) 432, a light source device 434, an input device 436, a treatment instrument control device 438, a display device 440, and the like.

[0119] The endoscope 410 comprises a barrel 412, the portion of which a predetermined length from the tip is inserted into the body cavity of the patient 472, and a camera head 414 connected to the base end of the barrel 412. Figure 15 illustrates the endoscope 410 configured as a so-called rigid endoscope having a rigid barrel 412, but the endoscope 410 may also be configured as a so-called flexible endoscope having a flexible barrel. The endoscope 410 is held in a movable state by an arm 416.

[0120] An opening into which an objective lens is fitted is provided at the tip of the endoscope tube 412. A light source device 434 is connected to the endoscope 410, and the light generated by the light source device 434 is guided to the tip of the endoscope tube by a light guide extending inside the endoscope tube 412, and is irradiated through the objective lens towards the object to be observed inside the body cavity of the patient 472. The endoscope 410 may be a straight-viewing endoscope, an oblique-viewing endoscope, or a side-viewing endoscope.

[0121] The camera head 414 contains an optical system and a photoelectric converter (not shown), and reflected light from the object being observed (observation light) is focused by the optical system into the photoelectric converter. The photoelectric converter converts the observation light into electrical signals, generating an electrical signal corresponding to the observation light, i.e., an image signal corresponding to the observed image. The photoelectric converter 100 described in any of the first to third embodiments can be used as the photoelectric converter. The image signal is transmitted to the CCU 432 as RAW data.

[0122] The CCU432 consists of a CPU (Central Processing Unit), a GPU (Graphics Processing Unit), and other components, and comprehensively controls the operation of the endoscope 410 and the display device 440. Furthermore, the CCU432 receives an image signal from the camera head 414 and performs various image processing operations on that image signal, such as development processing (demosaic processing), to display the image based on that image signal.

[0123] The display device 440 displays an image based on an image signal that has been processed by the CCU 432, under control from the CCU 432.

[0124] The light source device 434 consists of a light source such as an LED (Light Emitting Diode) and supplies illumination light to the endoscope 410 when photographing the surgical area, etc.

[0125] The input device 436 is an input interface for the endoscopic surgical system 400. The user can input various types of information and instructions to the endoscopic surgical system 400 via the input device 436.

[0126] The treatment instrument control device 438 controls the driving of the energy treatment instrument 450 for purposes such as tissue cauterization, incision, or blood vessel sealing.

[0127] The light source device 434 that supplies illumination light to the endoscope 410 when photographing the surgical area can be composed of, for example, an LED, a laser light source, or a combination thereof. When the white light source is composed of a combination of RGB laser light sources, the output intensity and output timing of each color (each wavelength) can be controlled with high precision, so the white balance of the captured image can be adjusted in the light source device 434. In this case, it is also possible to capture images corresponding to each of the RGB colors in time-division by irradiating the observation target with laser light from each of the RGB laser light sources in time-division and controlling the drive of the image sensor of the camera head 414 in synchronization with the irradiation timing. According to this method, a color image can be obtained without providing a color filter on the image sensor.

[0128] Furthermore, the light source device 434 may be controlled to change the intensity of the light it outputs at predetermined time intervals. By controlling the drive of the image sensor of the camera head 414 in synchronization with the timing of the change in light intensity, images can be acquired in time-division order, and these images can be combined to generate high dynamic range images without so-called black crushing and white clipping.

[0129] Furthermore, the light source device 434 may be configured to supply light in a predetermined wavelength band corresponding to special light observation. In special light observation, for example, the wavelength dependence of light absorption in body tissue is utilized. Specifically, by irradiating with narrowband light compared to the irradiation light used during normal observation (i.e., white light), predetermined tissues such as blood vessels on the surface of mucosa can be imaged with high contrast. Alternatively, in special light observation, fluorescence observation may be performed to obtain an image from fluorescence generated by irradiation with excitation light. In fluorescence observation, excitation light can be irradiated onto body tissue and fluorescence from the body tissue can be observed, or a reagent such as indocyanine green (ICG) can be injected into body tissue and excitation light corresponding to the fluorescence wavelength of the reagent can be irradiated onto the body tissue to obtain a fluorescence image. The light source device 434 may be configured to supply narrowband light and / or excitation light corresponding to such special light observation.

[0130] Thus, according to this embodiment, by configuring an endoscopic surgical system using the photoelectric conversion device of the first to third embodiments, an endoscopic surgical system capable of acquiring higher quality images can be realized.

[0131] [Seventh Embodiment] A photodetection system and mobile body according to the seventh embodiment of the present invention will be described with reference to Figures 16 to 18. Figure 16 is a schematic diagram showing an example of the configuration of a mobile body according to this embodiment. Figure 17 is a block diagram showing a schematic configuration of the photodetection system according to this embodiment. Figure 18 is a flowchart showing the operation of the photodetection system according to this embodiment. In this embodiment, an example of application to an in-vehicle camera is shown as a photodetection system to which the photoelectric converter 100 described in the first to third embodiments is applied.

[0132] Figure 16 is a schematic diagram showing an example of the configuration of a mobile body (vehicle system) according to this embodiment. Figure 16 shows the configuration of a vehicle 500 (automobile) as an example of a vehicle system incorporating a photodetection system to which the photoelectric converter described in the first to third embodiments is applied. Figure 16(a) is a schematic front view of the vehicle 500, Figure 16(b) is a schematic top view of the vehicle 500, and Figure 16(c) is a schematic rear view of the vehicle 500. The vehicle 500 is equipped with a pair of photoelectric converters 502 on its front. Here, the photoelectric converters 502 are the photoelectric converters 100 described in any of the first to third embodiments. The vehicle 500 also includes an integrated circuit 503, an alarm device 512, and a main control unit 513.

[0133] Figure 17 is a block diagram showing an example configuration of a photodetection system 501 mounted on a vehicle 500. The photodetection system 501 includes a photoelectric converter 502, an image preprocessing unit 515, an integrated circuit 503, and an optical system 514. The photoelectric converter 502 is the photoelectric converter 100 described in the first embodiment. The optical system 514 forms an optical image of the subject on the photoelectric converter 502. The photoelectric converter 502 converts the optical image of the subject formed by the optical system 514 into an electrical signal. The image preprocessing unit 515 performs predetermined signal processing on the signal output from the photoelectric converter 502. The functions of the image preprocessing unit 515 may be incorporated into the photoelectric converter 502. The photodetection system 501 is provided with at least two sets of the optical system 514, photoelectric converter 502, and image preprocessing unit 515, and the output from the image preprocessing unit 515 of each set is input to the integrated circuit 503.

[0134] The integrated circuit 503 is an integrated circuit for imaging system applications and includes an image processing unit 504, an optical distance measuring unit 506, a disparity calculation unit 507, an object recognition unit 508, and an anomaly detection unit 509. The image processing unit 504 processes the image signal output from the image preprocessing unit 515. For example, the image processing unit 504 performs image processing such as development and defect correction on the output signal from the image preprocessing unit 515. The image processing unit 504 includes a memory 505 for temporarily holding the image signal. The memory 505 may store, for example, the location of known defective pixels in the photoelectric converter 502.

[0135] The optical distance measuring unit 506 focuses on and measures the distance of the subject. The parallax calculation unit 507 calculates distance information from multiple image data (parallax images) acquired by multiple photoelectric converters 502. Each of the photoelectric converters 502 may be configured to acquire various information such as distance information. The object recognition unit 508 recognizes subjects such as cars, roads, signs, and people. When the anomaly detection unit 509 detects an anomaly in the photoelectric converter 502, it notifies the main control unit 513 of the anomaly.

[0136] The integrated circuit 503 may be implemented by specially designed hardware, by a software module, or by a combination of these. It may also be implemented by an FPGA (Field Programmable Gate Array), an ASIC (Application Specific Integrated Circuit), or a combination of these.

[0137] The main control unit 513 coordinates and controls the operation of the light detection system 501, vehicle sensor 510, control unit 520, etc. Note that the vehicle 500 does not necessarily have to have the main control unit 513. In this case, the photoelectric converter 502, vehicle sensor 510, and control unit 520 send and receive control signals via a communication network. For example, the CAN standard may be applied to the transmission and reception of these control signals.

[0138] The integrated circuit 503 has the function of receiving control signals from the main control unit 513 or transmitting control signals and set values ​​to the photoelectric converter 502 via its own control unit.

[0139] The light detection system 501 is connected to the vehicle sensor 510 and can detect the vehicle's driving conditions, such as vehicle speed, yaw rate, and steering angle, as well as the external environment and the state of other vehicles and obstacles. The vehicle sensor 510 also serves as a distance information acquisition means for acquiring distance information to objects. Furthermore, the light detection system 501 is connected to the driver assistance control unit 511, which performs various driving assistance functions such as automatic steering, automatic cruising, and collision avoidance. In particular, regarding the collision judgment function, it determines whether a collision with another vehicle or obstacle has occurred and estimates a collision based on the detection results of the light detection system 501 and the vehicle sensor 510. This enables avoidance control when a collision is estimated and activation of safety devices in the event of a collision.

[0140] Furthermore, the light detection system 501 is also connected to a warning device 512 that issues a warning to the driver based on the judgment result of the collision judgment unit. For example, if the collision judgment unit determines that there is a high probability of collision, the main control unit 513 performs vehicle control to avoid a collision or mitigate damage by applying the brakes, releasing the accelerator, or suppressing engine output. The warning device 512 warns the user by sounding an alarm, displaying warning information on a display screen such as the car navigation system or instrument panel, or vibrating the seat belt or steering wheel.

[0141] In this embodiment, the light detection system 501 captures images of the area around the vehicle, for example, the front or rear. Figure 16(b) shows an example of the arrangement of the light detection system 501 when it captures images of the front of the vehicle.

[0142] As described above, the photoelectric converter 502 is positioned in front of the vehicle 500. Specifically, it is preferable for acquiring distance information between the vehicle 500 and the object being photographed and for determining the possibility of collision if the two photoelectric converters 502 are positioned symmetrically with respect to the axis of symmetry, considering the center line with respect to the vehicle 500's direction of movement or external shape (e.g., vehicle width). Furthermore, it is preferable that the photoelectric converter 502 is positioned so as not to obstruct the driver's field of view when the driver is visually observing the situation outside the vehicle 500 from the driver's seat. It is preferable that the warning device 512 is positioned so as to be easily visible to the driver.

[0143] Next, the fault detection operation of the photoelectric converter 502 in the photodetection system 501 will be explained using Figure 18. The fault detection operation of the photoelectric converter 502 can be performed according to steps S110 to S180 shown in Figure 18.

[0144] Step S110 is a step in which the photoelectric converter 502 is configured for startup. Specifically, settings for the operation of the photoelectric converter 502 are transmitted from outside the photodetection system 501 (e.g., the main control unit 513) or from inside the photodetection system 501, and the imaging operation and fault detection operation of the photoelectric converter 502 are started.

[0145] Next, in step S120, a pixel signal is acquired from the active pixels. Also, in step S130, an output value is acquired from a fault detection pixel provided for fault detection. This fault detection pixel, like the active pixels, is equipped with a photoelectric conversion element. A predetermined voltage is written to this photoelectric conversion element. The fault detection pixel outputs a signal corresponding to the voltage written to this photoelectric conversion element. Note that steps S120 and S130 may be reversed.

[0146] Next, in step S140, a determination is made between the expected output value of the fault-detection pixel and the actual output value from the fault-detection pixel. If the determination in step S140 shows that the expected output value and the actual output value match, the process proceeds to step S150, where it is determined that the imaging operation is functioning normally, and the process moves to step S160. In step S160, the pixel signals of the scanned row are transmitted to the memory 505 for temporary storage. After that, the process returns to step S120 and continues the fault detection operation. On the other hand, if the determination in step S140 shows that the expected output value and the actual output value do not match, the process proceeds to step S170. In step S170, it is determined that there is an abnormality in the imaging operation, and an alarm is sent to the main control unit 513 or the alarm device 512. The alarm device 512 displays that an abnormality has been detected on its display unit. Subsequently, in step S180, the photoelectric converter 502 is stopped, and the operation of the photodetection system 501 is terminated.

[0147] In this embodiment, an example is shown where the flowchart is looped every row, but the flowchart may be looped every multiple rows, or the fault detection operation may be performed every frame. The alarm in step S170 may be notified to an external party via a wireless network.

[0148] Furthermore, although this embodiment describes control to avoid collisions with other vehicles, it can also be applied to control that automatically follows other vehicles or control that automatically drives without deviating from the lane. Moreover, the light detection system 501 can be applied not only to vehicles such as the vehicle itself, but also to moving objects (mobile devices) such as ships, aircraft, or industrial robots. In addition, it can be applied not only to moving objects, but also to a wide range of devices that utilize object recognition, such as intelligent transportation systems (ITS).

[0149] [Eighth Embodiment] An eighth embodiment of the present invention, a photodetection system, will be described with reference to Figure 19. Figure 19 is a schematic diagram showing an example of the configuration of the photodetection system according to this embodiment. In this embodiment, an example of application to eyeglasses (smart glasses) will be described as a photodetection system to which the photoelectric converter 100 described in the first to third embodiments is applied.

[0150] Figure 19(a) shows eyeglasses 600 (smart glasses) relating to one application example. The eyeglasses 600 have lenses 601, a photoelectric converter 602, and a control device 603.

[0151] The photoelectric converter 602 is the photoelectric converter 100 described in any of the first to third embodiments and is provided on the lens 601. There may be one or more photoelectric converters 602. Furthermore, when using multiple photoelectric converters 602, multiple types of photoelectric converters 602 may be used in combination. The arrangement position of the photoelectric converter 602 is not limited to that shown in Figure 19(a). A display device (not shown) including a light-emitting device such as an OLED or LED may be provided on the back side of the lens 601.

[0152] The control device 603 functions as a power supply that provides power to the photoelectric converter 602 and the display device. The control device 603 also has a function to control the operation of the photoelectric converter 602 and the display device. The lens 601 is provided with an optical system for focusing light onto the photoelectric converter 602.

[0153] Figure 19(b) shows eyeglasses 610 (smart glasses) relating to another application example. The eyeglasses 610 have lenses 611 and a control device 612. The control device 612 may be equipped with a photoelectric converter (not shown) corresponding to a photoelectric converter 602 and a display device.

[0154] The lens 611 is equipped with a photoelectric converter within the control device 612 and an optical system for projecting light from the display device, thereby projecting an image. The control device 612 functions as a power supply to provide power to the photoelectric converter and the display device, and also has a function to control the operation of the photoelectric converter and the display device.

[0155] The control device 612 may further include a gaze detection unit that detects the wearer's gaze. In this case, the control device 612 can be provided with an infrared light emitter, and the infrared light emitted from the infrared light emitter can be used for gaze detection. Specifically, the infrared light emitter emits infrared light towards the eyeball of the user who is gazing at the displayed image. An image capture unit having a light-receiving element detects the reflected light from the eyeball of the emitted infrared light, thereby obtaining an image of the eyeball. By having a reduction means that reduces the light from the infrared light emitter to the display unit in a planar view, the deterioration of image quality can be reduced.

[0156] The user's gaze towards a displayed image can be detected from an image of the eyeball obtained by imaging with infrared light. Any known method can be applied to gaze detection using the image of the eyeball. As an example, a gaze detection method based on the Purkinje image obtained by the reflection of the irradiated light from the cornea can be used. More specifically, gaze detection processing based on the pupil-corneal reflection method is performed. Using the pupil-corneal reflection method, the user's gaze is detected by calculating a gaze vector representing the orientation (rotation angle) of the eyeball based on the pupil image and the Purkinje image contained in the image of the eyeball.

[0157] The display device of this embodiment may include a photoelectric converter having a light-receiving element and be configured to control the displayed image based on the user's gaze information from the photoelectric converter. Specifically, the display device determines a first field of view area that the user is fixated on and a second field of view area other than the first field of view area, based on the gaze information. The first and second field of view areas may be determined by the control device of the display device or by an external control device. If an external control device determines them, this information is transmitted to the display device via communication. In the display area of ​​the display device, the display resolution of the first field of view area may be controlled to be higher than the display resolution of the second field of view area. In other words, the resolution of the second field of view area may be lower than the resolution of the first field of view area.

[0158] Furthermore, the display area may have a first display area and a second display area different from the first display area, and may be configured to determine the area with higher priority from the first display area and the second display area based on gaze information. The first display area and the second display area may be determined by the control device of the display device or by an external control device. If the external control device makes the determination, it is communicated to the display device via communication. The resolution of the high-priority area may be controlled to be higher than the resolution of the areas other than the high-priority area. In other words, the resolution of areas with relatively lower priority may be lower.

[0159] AI may be used to determine the first field of view area and the areas with higher priority. The AI ​​may be a model configured to estimate the angle of gaze and the distance to the target object at the end of the line of sight from the image of the eye, using the image of the eye and the direction the eye was actually looking in that image as training data. The AI ​​program may be installed in the display device, the photoelectric converter, or an external device. If installed in an external device, it will be transmitted to the display device via communication.

[0160] When display control is based on visual detection, this method is preferably applicable to smart glasses that further include a photoelectric converter for capturing images of the surrounding environment. The smart glasses can display the captured external information in real time.

[0161] [Modified Embodiment] The present invention is not limited to the embodiments described above and can be modified in various ways.

[0162] For example, an example in which a part of the configuration of one embodiment is added to another embodiment, or in which a part of the configuration of another embodiment is replaced, is also an embodiment of the present invention.

[0163] Furthermore, the circuit configuration of the pixel 12 is not limited to the above embodiment. For example, a switch such as a transistor may be provided between the photoelectric conversion element 22 and the quench element 24, or between the photoelectric conversion unit 20 and the pixel signal processing unit 30 (waveform shaping unit 32), to control the electrical connection state between them. Alternatively, a switch such as a transistor may be provided between the node to which voltage VH is supplied and the quench element 24, and / or between the node to which voltage VL is supplied and the photoelectric conversion element 22, to control the electrical connection state between them.

[0164] Furthermore, although the above embodiment shows a configuration in which a counter circuit 34 is used as the pixel signal processing unit 30, a TDC (Time to Digital Converter) and memory may be used instead of the counter circuit 34. In this case, the generation timing of the pulse signal output from the waveform shaping unit 32 is converted into a digital signal by the TDC. When measuring the timing of the pulse signal, the TDC is supplied with a control pulse pREF (reference signal) from the vertical scanning circuit unit 40 via the control line 14. The TDC uses the control pulse pREF as a reference and acquires the signal as a digital signal when the input timing of the signal output from each pixel 12 is set to a relative time.

[0165] Furthermore, although the above embodiment shows a configuration in which one pixel 12 has one photoelectric conversion element 22, one pixel 12 may have multiple photoelectric conversion elements 22. Also, although the above embodiment shows one photoelectric conversion element 22 placed in one well region surrounded by P-type semiconductor regions 132, 134, multiple photoelectric conversion elements 22 may be placed in one well region.

[0166] It should be noted that the above embodiments are merely examples of how the present invention can be implemented, and the technical scope of the present invention should not be interpreted as being limited by them. In other words, the present invention can be implemented in various forms without departing from its technical concept or its main features.

[0167] The above-disclosed embodiments include the following configurations and methods. (Composition 1) A photoelectric conversion element provided in a semiconductor layer having a first surface and a second surface facing the first surface, A first semiconductor region of a first conductivity type provided in contact with the first surface, A second semiconductor region of a second conductivity type provided on the side of the second surface relative to the first semiconductor region, A third semiconductor region provided on the second surface side of the second semiconductor region, A first electrode electrically connected to the first semiconductor region, The second semiconductor region has a second electrode electrically connected to it, The first semiconductor region and the second semiconductor region constitute an avalanche photodiode, and the avalanche photodiode is configured to multiply the signal charge generated in the third semiconductor region. The second semiconductor region has an effective impurity density of 1 × 10⁻⁶ 16 cm -3 The width in the depth direction of the region is 0.5 μm or less. A photoelectric conversion element characterized by the following features. (Configuration 2) The effective impurity density of the first semiconductor region is 1 × 10⁻⁶ 16 cm -3 From a depth such that the effective impurity density of the second semiconductor region is 1 × 10⁻¹⁰ on the second surface side of the depth at which the density of the second conductivity type impurity constituting the second semiconductor region peaks 16 cm -3 The distance to the depth at which this occurs is 0.8 μm or less. A photoelectric conversion element according to configuration 1, characterized by the above. (Composition 3) The material further comprises a first impurity-doped region to which the first conductivity type of impurity is added, The first impurity-doped region overlaps with the second semiconductor region in both a plan view and in the depth direction. The depth at which the density of the first conductivity type impurity constituting the first impurity doping region peaks is deeper than the depth at which the density of the second conductivity type impurity constituting the second semiconductor region peaks. The impurity density per unit area of ​​the second conductivity type impurity constituting the second semiconductor region is 3 × 10⁻⁶ 12 cm -2 That's all. The impurity density per unit area of ​​the first conductive impurity constituting the first impurity-doped region is 5 × 10 11 cm -2 As described above, the impurity density per unit area of ​​the second conductive impurity constituting the second semiconductor region is 1 / 2 or less. A photoelectric conversion element according to configuration 1 or 2, characterized by the above. (Composition 4) The first impurity-doped region is provided on the side of the second surface that is greater than the depth at which the density of the second conductivity-type impurity constituting the second semiconductor region peaks, in order to compensate for the second conductivity-type impurity. A photoelectric conversion element according to configuration 3, characterized by the above. (Composition 5) The material further comprises a second impurity-doped region in which the second conductivity type of impurity is added, The second impurity-doped region overlaps with the first impurity-doped region in both a plan view and in the depth direction. The depth at which the density of the second conductivity type impurity constituting the second impurity doping region peaks is deeper than the depth at which the density of the first conductivity type impurity constituting the first impurity doping region peaks. The impurity density of the second conductivity type impurity constituting the second impurity doping region is lower than the impurity density of the first conductivity type impurity constituting the first impurity doping region. A photoelectric conversion element according to configuration 3 or 4, characterized by the above. (Composition 6) The second impurity-doped region is provided on the side of the second surface that is greater than the depth at which the density of the first conductivity-type impurity constituting the first impurity-doped region peaks, in order to compensate for the first conductivity-type impurity. A photoelectric conversion element according to configuration 5, characterized by the features described herein. (Composition 7) The second semiconductor region has a first region that overlaps with the first semiconductor region in a plan view, and a second region that does not overlap with the first region in a plan view. The effective impurity density per unit area of ​​the second conductivity type impurity constituting the second semiconductor region is higher in the second region than in the first region. A photoelectric conversion element according to any one of configurations 1 to 6, characterized by the above. (Composition 8) The second region is arranged to surround the first region. A photoelectric conversion element according to configuration 8, characterized by the above. (Composition 9) The first semiconductor region is further provided on the first surface side of the second semiconductor region so as to surround the first semiconductor region, and the fourth semiconductor region of the first conductivity type is further provided. The impurity density of the fourth semiconductor region is lower than that of the first semiconductor region. A photoelectric conversion element according to any one of configurations 1 to 8, characterized by the above. (Composition 10) A fifth semiconductor region of the second conductivity type is provided on the second surface side of the third semiconductor region, In a plan view, the semiconductor further comprises a sixth semiconductor region of second conductivity type, which is arranged to surround the region in which the first semiconductor region, the second semiconductor region, and the third semiconductor region are located, and is electrically connected to the second semiconductor region and the fifth semiconductor region. A photoelectric conversion element according to any one of configurations 1 to 9, characterized by the above. (Composition 11) The sixth semiconductor region is in contact with the second surface. A photoelectric conversion element according to configuration 10, characterized by the above. (Composition 12) The signal charge is a carrier of the first conductivity type. A photoelectric conversion element according to any one of configurations 1 to 11, characterized by the above. (Composition 13) A photoelectric conversion device having multiple pixels arranged in multiple rows and multiple columns, Each of the plurality of pixels includes a photoelectric conversion element according to any one of claims 1 to 12, and a signal processing unit for processing signals output from the photoelectric conversion element. A photoelectric conversion device characterized by the following features. (Composition 14) A first substrate including the semiconductor layer on which each of the plurality of pixels is provided with the photoelectric conversion element, A second substrate on which each of the plurality of pixels is provided with the signal processing unit A photoelectric conversion device according to configuration 13, characterized by having the following features. (Composition 15) A photoelectric conversion device according to configuration 13 or 14, A signal processing device that processes the signal output from the aforementioned photoelectric converter and A light detection system characterized by having the following features. (Composition 16) The signal processing device generates a distance image representing distance information to the object based on the signal. The photodetection system according to configuration 15, characterized by the features described above. (Composition 17) It is a mobile object, A photoelectric conversion device according to configuration 13 or 14, Distance information acquisition means for acquiring distance information to an object from a parallax image based on a signal output from the aforementioned photoelectric converter, Control means for controlling the moving body based on the distance information A mobile body characterized by having the following features. (Method 1) A method for manufacturing a photoelectric conversion element having a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region, wherein the first semiconductor region and the second semiconductor region form an avalanche photodiode that multiplies the signal charge generated in the third semiconductor region, A step of forming the first semiconductor region so as to be in contact with the first surface of the semiconductor layer, A step of forming the second semiconductor region in the semiconductor layer at a depth greater than the depth to which the first semiconductor region is provided, A step of adding the first conductivity type impurity to the semiconductor layer to form a first impurity doping region, which overlaps with the second semiconductor region in the depth direction of the semiconductor layer, and the depth at which the density of the first conductivity type impurity peaks is located deeper than the depth at which the density of the second conductivity type impurity constituting the second semiconductor region peaks. A method for manufacturing a photoelectric conversion element, characterized by having the following features. (Method 2) The present invention further comprises the step of adding the second impurity type to the semiconductor layer to form a second impurity-doped region which overlaps with the first impurity-doped region in the depth direction of the semiconductor layer, and the depth at which the density of the second impurity type peaks is located deeper than the depth at which the density of the first impurity type peaks in the first impurity-doped region. A method for manufacturing a photoelectric conversion element according to Method 2, characterized by the following: (Method 3) The width in the depth direction of the second semiconductor region is controlled by the first impurity doping region. A method for manufacturing a photoelectric converter according to method 1 or 2, characterized by the following: [Explanation of Symbols]

[0168] 12... pixels 20... Photoelectric conversion unit 30...Pixel signal processing unit 120... Semiconductor layer 126,128…N-type semiconductor region 130, 132, 134, 140…P-type semiconductor region 136…N-type impurity doping region 138… Semiconductor field 142...P-type impurity doping region

Claims

1. A photoelectric conversion element provided in a semiconductor layer having a first surface and a second surface opposite to the first surface, a first semiconductor region of a first conductivity type provided in contact with the first surface; a second semiconductor region of a second conductivity type provided closer to the second surface than the first semiconductor region; a third semiconductor region provided closer to the second surface than the second semiconductor region; a first impurity doped region doped with the first conductivity type impurity; a first electrode electrically connected to the first semiconductor region; a second electrode electrically connected to the second semiconductor region; the first semiconductor region and the second semiconductor region constitute an avalanche photodiode, and the avalanche photodiode is configured to multiply a signal charge generated in the third semiconductor region; The second semiconductor region has an effective impurity density of 1×10 １６ cm －３ the width in the depth direction of the region is 0.5 μm or less, the first impurity doped region overlaps with the second semiconductor region in a plan view and in a depth direction, a depth at which the density of the first conductive type impurity constituting the first impurity doped region reaches a peak is deeper than a depth at which the density of the second conductive type impurity constituting the second semiconductor region reaches a peak; the impurity density per unit area of ​​the second conductivity type impurity constituting the second semiconductor region is 3×10 12 cm −2 or more; The impurity density per unit area of ​​the first conductivity type impurity constituting the first impurity doped region is 5×10 11 cm −2 or more and is ½ or less of the impurity density per unit area of ​​the second conductivity type impurity constituting the second semiconductor region. A photoelectric conversion element comprising:

2. The effective impurity density of the first semiconductor region is 1×10 １６ cm －３ the effective impurity density of the second semiconductor region is 1×10 on the second surface side from the depth at which the density of the second conductive type impurity constituting the second semiconductor region peaks １６ cm －３ The distance to the depth at which the 2. The photoelectric conversion element according to claim 1.

3. The first impurity doped region is provided on the second surface side of a depth at which a density of the second conductive type impurity constituting the second semiconductor region reaches a peak, so as to compensate for the second conductive type impurity.

2. The photoelectric conversion element according to claim 1.

4. Further comprising a second impurity doped region doped with the second conductivity type impurity, the second impurity doped region overlaps with the first impurity doped region in a plan view and in a depth direction, a depth at which the density of the second conductivity type impurity constituting the second impurity doped region reaches a peak is deeper than a depth at which the density of the first conductivity type impurity constituting the first impurity doped region reaches a peak; The impurity density of the second conductivity type impurity constituting the second impurity doped region is lower than the impurity density of the first conductivity type impurity constituting the first impurity doped region.

2. The photoelectric conversion element according to claim 1.

5. The second impurity doped region is provided on the second surface side of a depth at which a density of the first conductive type impurity constituting the first impurity doped region reaches a peak, so as to compensate for the first conductive type impurity.

5. The photoelectric conversion element according to claim 4.

6. the second semiconductor region has a first region overlapping with the first semiconductor region in a planar view and a second region not overlapping with the first region in a planar view; The effective impurity density per unit area of ​​the second conductive type impurity constituting the second semiconductor region is higher in the second region than in the first region.

6. The photoelectric conversion element according to claim 1,

7. The second region is disposed so as to surround the first region.

7. The photoelectric conversion element according to claim 6.

8. a fourth semiconductor region of the first conductivity type provided on the first surface side of the second semiconductor region so as to surround the first semiconductor region, The impurity density of the fourth semiconductor region is lower than the impurity density of the first semiconductor region.

6. The photoelectric conversion element according to claim 1,

9. a fifth semiconductor region of the second conductivity type provided on the second surface side of the third semiconductor region; a sixth semiconductor region of the second conductivity type that is arranged so as to surround a region in which the first semiconductor region, the second semiconductor region, and the third semiconductor region are arranged in a plan view and is electrically connected to the second semiconductor region and the fifth semiconductor region.

6. The photoelectric conversion element according to claim 1,

10. The sixth semiconductor region is in contact with the second surface.

10. The photoelectric conversion element according to claim 9.

11. The signal charge is a carrier of the first conductivity type.

6. The photoelectric conversion element according to claim 1,

12. A photoelectric conversion device having a plurality of pixels arranged in a plurality of rows and a plurality of columns, Each of the plurality of pixels includes a photoelectric conversion element according to claim 1 and a signal processing unit that processes a signal output from the photoelectric conversion element. A photoelectric conversion device comprising:

13. a first substrate including the semiconductor layer on which the photoelectric conversion elements of the plurality of pixels are provided; a second substrate on which the signal processing units of the plurality of pixels are provided; 13. The photoelectric conversion device according to claim 12, further comprising:

14. The photoelectric conversion device according to claim 12; a signal processing device that processes a signal output from the photoelectric conversion device; 1. An optical detection system comprising:

15. The signal processing device generates a distance image representing distance information to an object based on the signal.

15. The optical detection system of claim 14.

16. A mobile object, The photoelectric conversion device according to claim 12; a distance information acquisition unit that acquires distance information to an object from a parallax image based on a signal output from the photoelectric conversion device; a control means for controlling the moving object based on the distance information; A moving object comprising:

17. A method for manufacturing a photoelectric conversion element having a first semiconductor region of a first conductivity type, a second semiconductor region of a second conductivity type, and a third semiconductor region, the first semiconductor region and the second semiconductor region forming an avalanche photodiode that multiplies signal charges generated in the third semiconductor region, comprising: forming the first semiconductor region in contact with a first surface of a semiconductor layer; forming the second semiconductor region in the semiconductor layer at a depth greater than a depth at which the first semiconductor region is provided; a step of doping the semiconductor layer with an impurity of the first conductivity type to form a first impurity doped region that overlaps with the second semiconductor region in a depth direction of the semiconductor layer and has a depth at which the density of the first conductivity type impurity is at a peak that is deeper than a depth at which the density of the second conductivity type impurity constituting the second semiconductor region is at a peak; doping the semiconductor layer with an impurity of the second conductivity type to form a second impurity doped region that overlaps with the first impurity doped region in a depth direction of the semiconductor layer and has a depth at which the density of the second conductivity type impurity is at a peak that is deeper than a depth at which the density of the first conductivity type impurity constituting the first impurity doped region is at a peak; A method for producing a photoelectric conversion element, comprising:

18. The width of the second semiconductor region in the depth direction is controlled by the first impurity doped region.

18. The method for producing a photoelectric conversion device according to claim 17.

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