Power reception device
Patent Information
- Application Number
- JP2022125686
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2022-08-05
- Publication Date
- 2025-06-10
- Estimated Expiration
- 2042-08-05
AI Technical Summary
Diode rectification in power receiving devices results in significant power losses, leading to increased device size and decreased system efficiency.
A power receiving device utilizing a synchronous rectifier circuit with a control unit that switches high-side and low-side switches to convert AC power into DC power efficiently, employing a power receiving resonant circuit and bridge circuits to minimize power loss through precise timing control.
The solution enables highly efficient power adjustment control, reducing power loss and device size by optimizing the switching of rectifying elements in the synchronous rectifier circuit.
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to a power receiving device. [Background technology]
[0002] A power receiving device is known that includes a power receiving coil that transmits and receives power by magnetic coupling with a power transmitting coil connected to a power transmitting DC / AC conversion circuit, a power receiving AC / DC conversion circuit connected to the power receiving coil, an output capacitor connected to the DC output side of the power receiving AC / DC conversion circuit, and a current sensor that measures a current flowing through a load connected to the output capacitor (for example, Patent Document 1). In this power receiving device, when the voltage of the load is controlled to a predetermined range by the power transmitting DC / AC conversion circuit, the period of a commutation mode in which the current to the capacitor is made zero is changed by power adjustment control of the power receiving AC / DC conversion circuit according to the load current value detected by the current sensor. This power adjustment control is power adjustment control based on so-called diode rectification, and only some rectification elements are switched during the commutation mode. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] Patent No. 701877 Summary of the Invention [Problem to be solved by the invention]
[0004] However, diode rectification can result in large power loss. In this case, the size of the power receiving device may increase and the system efficiency may decrease. For this reason, there has been a demand for high efficiency power receiving devices using synchronous rectification in order to reduce power loss. [Means for solving the problem]
[0005] The present disclosure can be realized in the following forms.
[0006] According to one embodiment of the present disclosure, there is provided a power receiving device (200, 200b, 200c, 200d, 200e) that wirelessly receives AC power transmitted from a power transmitting device (100) and supplies the power to a load device. The power receiving device includes a power receiving resonant circuit (210) having a power receiving coil (212) and a resonant capacitor (214) for resonating the power receiving coil, a synchronous rectifier circuit (240) that converts the AC power received by the power receiving coil into DC power, and a control unit (290) that controls the multiple bridge circuits. The control unit executes power supply control by repeatedly performing a first rectification mode (M1) in which the first high-side switch and the second low-side switch are turned on and the first low-side switch and the second high-side switch are turned off by detecting the conduction of the first bridge circuit, and a second rectification mode (M3) in which the first low-side switch and the second high-side switch are turned on and the first high-side switch and the second low-side switch are turned off by detecting the conduction of the second bridge circuit. The control unit executes power adjustment control including a first commutation mode (M2) in which the first high-side switch is turned off and the first low-side switch is turned on in the first rectification mode, and a second commutation mode (M4) in which the second high-side switch is turned off and the second low-side switch is turned on in the second rectification mode.
[0007] According to the power receiving device of this embodiment, highly efficient power adjustment control can be performed by switching control for switching on and off each rectifying element of the synchronous rectifying circuit. [Brief description of the drawings]
[0008] [Figure 1] FIG. 1 is an explanatory diagram showing a schematic configuration of a contactless power supply system including a power receiving device according to a first embodiment. [Diagram 2] 5 is a timing chart showing an outline of switching control of a synchronous rectifier circuit executed by a power receiving device. [Diagram 3] 5A and 5B are explanatory diagrams illustrating an operating state of a rectifying element and a current flow in a first rectification mode. [Figure 4] FIG. 4 is an explanatory diagram illustrating an operating state of a rectifier element and a current flow in a first commutation mode. [Diagram 5] 5A and 5B are explanatory diagrams illustrating the operating state of rectifying elements and current flow in a second rectification mode. [Figure 6] FIG. 4 is an explanatory diagram illustrating an operating state of a rectifier element and a current flow in a second commutation mode. [Figure 7] FIG. 11 is an explanatory diagram showing the configuration of a power receiving device according to a second embodiment. [Figure 8] 4 is a timing chart showing details of peak current mode control. [Figure 9] FIG. 11 is an explanatory diagram showing the configuration of a power receiving device according to a third embodiment. [Figure 10] FIG. 13 is an explanatory diagram showing the configuration of a power receiving device according to a fourth embodiment. [Figure 11] FIG. 13 is an explanatory diagram showing the configuration of a power receiving device according to a fifth embodiment. [Figure 12] FIG. 11 is a first explanatory diagram showing a configuration of a contactless power supply system according to another embodiment. [Figure 13] FIG. 2 is a second explanatory diagram showing the configuration of a contactless power supply system according to another embodiment. [Figure 14] FIG. 13 is a third explanatory diagram showing the configuration of a contactless power supply system according to another embodiment. [Figure 15] FIG. 4 is a fourth explanatory diagram showing the configuration of a contactless power supply system according to another embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0009] A. First embodiment: 1, the contactless power supply system includes a power transmitting device 100 and a power receiving device 200, and supplies power contactlessly from the power transmitting device 100 to the power receiving device 200. The power transmitting device 100 includes a power transmitting resonant circuit 110 and an AC power supply device .
[0010] The power transmission resonant circuit 110 has a power transmission coil 112 and a power transmission resonant capacitor 114 connected in series to the power transmission coil 112. The power transmission resonant capacitor 114 is a resonant capacitor for resonating the power supplied to the power transmission coil 112. The capacitance of the power transmission resonant capacitor 114 during power supply is set based on the self-inductance of the power transmission coil 112 so that the operating frequency and the resonant frequency are approximately equal. The power transmission resonant circuit 110 utilizes the electromagnetic induction phenomenon to transmit AC power induced in the power transmission coil 112 to the power receiving coil 212 in a resonant coupling state in which the power transmission coil 112 and the power receiving coil 212 are magnetically coupled. The operating frequency of the power transmission device 100 can be set arbitrarily. In this embodiment, the operating frequency of the power transmission device 100 is, for example, 85 kHz, and is set using a predetermined power transmission frequency stipulated by the Radio Law or the like.
[0011] The AC power supply device 130 supplies AC power of a predetermined operating frequency to the power transmission resonant circuit 110. The AC power supply device 130 includes a power supply circuit and a power transmission circuit. The power supply circuit is, for example, an AC / DC converter circuit, and converts AC power supplied from an external power supply such as a system power supply into DC power. The power transmission circuit is, for example, an inverter that converts DC power supplied from the power supply circuit into AC power of the operating frequency. The power transmission circuit may further include a rectifier circuit, a filter circuit, and the like.
[0012] The power receiving device 200 receives AC power transmitted from the power transmitting device 100 in a non-contact manner and supplies it to a load device. The power receiving device 200 is mounted on various devices that operate using electric power, such as electronic devices and electric vehicles. The power receiving device 200 includes a power receiving resonant circuit 210, an immittance converter 230, a synchronous rectifier circuit 240, a smoothing capacitor 250, and a battery 260.
[0013] The power receiving resonant circuit 210 includes a power receiving coil 212 and a power receiving resonant capacitor 214 connected in series to the power receiving coil 212. The capacitance of the power receiving resonant capacitor 214 during power supply is set based on, for example, the self-inductance of the power receiving coil 212 so that the operating frequency and the resonant frequency are approximately equal. When the power receiving coil 212 faces the power transmitting coil 112, the power transmitting coil 112 and the power receiving coil 212 are electromagnetically coupled. In a resonant coupled state in which the power receiving coil 212 and the power transmitting coil 112 are magnetically coupled, the power receiving resonant circuit 210 receives AC power induced from the power transmitting coil 112 to the power receiving coil 212 in a non-contact manner. In this embodiment, the power receiving resonant capacitor 214 includes a first capacitor 214P on the positive electrode side and a second capacitor 214N on the negative electrode side. By disposing resonant capacitors on both the positive and negative electrodes, common mode noise can be suppressed. The negative second capacitor 214N can be omitted.
[0014] The immittance converter 230 removes harmonic noise that may be included in the AC power received by the power receiving resonant circuit 210. In this embodiment, the immittance converter 230 is a so-called T-LCL type immittance converter including an input side first reactor 232 and an output side first reactor 234 arranged on the positive pole side, and a capacitor 235. The inductance of the reactors 232 and 234 and the capacitance of the capacitor 235 are set so that an immittance characteristic is obtained at the operating frequency. In this embodiment, the immittance converter 230 further includes an input side second reactor 236 and an output side second reactor 238 arranged on the negative pole side. By arranging reactors on both the positive pole and the negative pole, common mode noise can be suppressed. It is possible to omit the input side second reactor 236 and the output side second reactor 238. Moreover, instead of the T-LCL type, the immittance converter 230 may be a so-called CL type immittance converter in which the input side first reactor 232 and the input side second reactor 236 are omitted. In this case, it is also possible to omit the output side second reactor 238.
[0015] The synchronous rectifier circuit 240 converts the AC power received by the power receiving coil 212 into DC power that can be supplied to the battery 260. The synchronous rectifier circuit 240 includes a plurality of bridge circuits. In this embodiment, the synchronous rectifier circuit 240 is a single-phase bridge rectifier that uses four MOSFETs (metal-oxide-semiconductor field-effect transistors) as rectifier elements. More specifically, the synchronous rectifier circuit 240 includes two bridge circuits: a first bridge circuit 241 having a first high-side switch 241H and a first low-side switch 241L, and a second bridge circuit 242 having a second high-side switch 242H and a second low-side switch 242L. The single-phase bridge rectifier may also be called a full bridge circuit. The synchronous rectifier circuit 240 is not limited to a single-phase bridge rectifier, and various full-wave rectifiers may be used, such as a three-phase bridge rectifier circuit having three bridge circuits each having six rectifier elements, or a 12-phase rectifier having multiple three-phase bridge rectifier circuits.
[0016] Each rectifier element is controlled by a control circuit 290 and is switched by a gate signal generated by, for example, a bootstrap circuit. The current rectified by the synchronous rectifier circuit 240 is smoothed by charging and discharging a smoothing capacitor 250 connected in parallel to the battery 260. The rectifier element is not limited to a MOSFET, and may be, for example, a junction field effect transistor (JFET) or an insulated gate bipolar transistor (IGBT), and various switching elements having a body diode or a diode connected in parallel can be used. The body diode may also be called a parasitic diode or an internal diode. In the following description, the body diode of the first high-side switch 241H is also called a "first high-side body diode," the body diode of the first low-side switch 241L is also called a "first low-side body diode," the body diode of the second high-side switch 242H is also called a "second high-side body diode," and the body diode of the second low-side switch 242L is also called a "second low-side body diode."
[0017] A first voltage detection circuit 271 and a second voltage detection circuit 272 are connected to the synchronous rectification circuit 240. In this embodiment, the first voltage detection circuit 271 is connected to both ends of the first low-side switch 241L, and functions as a first voltage detection unit that detects the terminal voltage V11 of the first low-side switch 241L, that is, the drain-source voltage (hereinafter also referred to as "DS voltage"). The second voltage detection circuit 272 is connected to both ends of the second low-side switch 242L, and functions as a second voltage detection unit that detects the terminal voltage V12 of the second low-side switch 242L. The detection results of each DS voltage are output to the control circuit 290. This allows the control circuit 290 to detect the rise of the terminal voltage in the first low-side switch 241L and the rise of the terminal voltage in the second low-side switch 242L. In order to detect the falling edge of the voltage across the terminals of the first high-side switch 241H instead of the first low-side switch 241L, a first voltage detection circuit 271 may be connected across the first high-side switch 241H to detect the DS voltage of the first high-side switch 241H. In addition, in order to detect the falling edge of the voltage across the terminals of the second high-side switch 242H instead of the second low-side switch 242L, a second voltage detection circuit 272 may be connected across the second high-side switch 242H to detect the DS voltage of the second high-side switch 242H.
[0018] 1, in the power receiving device 200 of the present embodiment, an output current detection circuit 274 is provided between the smoothing capacitor 250 and the battery 260. The output current detection circuit 274 is connected in series to the battery 260, and functions as a first current detection unit that detects the output current of the synchronous rectification circuit 240. In the example of FIG. 1, the output current of the synchronous rectification circuit 240 is an output current I1 smoothed by the smoothing capacitor 250. The output current I1 detected by the output current detection circuit 274 is output to the control circuit 290.
[0019] The battery 260 is an example of a load device that utilizes the AC power induced in the power receiving resonant circuit 210. The battery 260 can be charged by the supply of AC power obtained in the power receiving resonant circuit 210. The power charged in the battery 260 is utilized, for example, in a device mounted on the power receiving device 200. In the example of FIG. 1, the load device includes a synchronous rectifier circuit 240 and a smoothing capacitor 250. The load device is not limited to the synchronous rectifier circuit 240, the smoothing capacitor 250, and the battery 260, and various devices that utilize the AC power output from the power receiving resonant circuit 210 can be applied.
[0020] The control circuit 290 is a microcomputer having a CPU (not shown) and memories such as a ROM and a RAM, or a logic circuit. The memory stores programs for implementing the functions provided in this embodiment, such as the function of a control unit that controls the switching of each rectifier element of the synchronous rectifier circuit 240, and the CPU deploys the programs in the RAM or the like and executes them to implement some or all of the functions. The control circuit 290 can control the first bridge circuit 241 and the second bridge circuit 242 separately and independently.
[0021] The control circuit 290 includes a counter (not shown) for measuring time. In the following description, the counter used for measuring time in the switching control of the first bridge circuit 241 is also referred to as a "first counter," and the counter used for measuring time in the switching control of the second bridge circuit 242 is also referred to as a "second counter." The control circuit 290 may include a clock instead of a counter.
[0022] The switching control of the rectifier elements in the power supply control and power adjustment control executed by the control circuit 290 will be described using FIG. 2 as well as FIG. 3 to FIG. 6 as appropriate. The horizontal axis in FIG. 2 is the time axis (unit: μsec.). The vertical axis shows the on / off of each rectifier element, the presence or absence of current flow in the body diode of each rectifier element, and the pulse count results in the first counter and the second counter. The top row of FIG. 2 shows the timing of the "start" of the cycle to the "half cycle" and "one cycle" in the switching control of the first bridge circuit 241. "One cycle" is the same as the operating frequency, and the output current from the immittance converter 230 is inverted every half cycle. In this embodiment, "one cycle" coincides with 85 kHz as the power transmission frequency. For convenience, the first voltage detection circuit 271, the second voltage detection circuit 272, the output current detection circuit 274, and the control circuit 290 are omitted from FIG. 3 to FIG. 6.
[0023] 2, the synchronous rectifier circuit 240 is in a non-opposing state in which the power receiving coil 212 and the power transmitting coil 112 are not opposed to each other. In the non-opposing state, the synchronous rectifier circuit 240 waits with all rectifying elements turned off (open). When the power receiving coil 212 and the power transmitting coil 112 are opposed to each other, the power receiving resonant circuit 210 receives AC power from the power transmitting coil 112 via the power receiving coil 212. At this time, the output current from the immittance converter 230 conducts the body diode of the first high-side switch 241H as shown as a signal S1 in FIG. 2. As a result, at time T0, the voltage between the terminals of the first low-side switch 241L rises. The rise of the terminal voltage is detected by the first voltage detection circuit 271.
[0024] The control circuit 290 detects the conduction of the first bridge circuit 241 by detecting the rising edge of the voltage between the terminals of the first low-side switch 241L from the detection result of the first voltage detection circuit 271. The control circuit 290 outputs a predetermined gate-source voltage (hereinafter also referred to as a "GS voltage") to the first high-side switch 241H and the second low-side switch 242L via the bootstrap circuit, and switches the first high-side switch 241H and the second low-side switch 242L on (short circuit). The cycle of the switching control of the first bridge circuit 241 starts from this point, and the control circuit 290 starts counting time by the first counter. In the first cycle, the first low-side switch 241L and the second high-side switch 242H are in an off (open) state. In the second cycle and after, the first low-side switch 241L and the second high-side switch 242H are in an on state, and in this case, the control circuit 290 switches them off.
[0025] As a result, as shown in Fig. 3, a current flows in the direction ID1 indicated by the arrow, and the current flows through smoothing capacitor 250 and battery 260. As shown in Fig. 2 and Fig. 3, the on / off state of each rectifying element during this period is also referred to as a "first rectifying mode M1." Note that in Fig. 3 to Fig. 6, rectifying elements in an on (shorted) state are indicated by solid lines, and rectifying elements in an off (open) state are indicated by dashed lines.
[0026] When the power adjustment control is not performed, the first rectification mode M1 is switched to the second rectification mode M3 after a half cycle by the first counter or one cycle by the second counter, and the first rectification mode M1 and the second rectification mode M3 are repeated in the same manner. In contrast, as shown in FIG. 2, when the power adjustment control is performed, the control circuit 290 adjusts the length of the first commutation mode in one cycle by adjusting the timing of switching from the first rectification mode M1 to the first commutation mode. The power adjustment control is performed, for example, when the SOC of the battery 260 is high and the amount of charge to the battery 260 is reduced, and the load device reduces the input current value or sets a reference current as a target value for increasing the input current value that has already been reduced. The control circuit 290 calculates the period of the first commutation mode using, for example, the current value detected by the output current detection circuit 274 and the reference current, and calculates the threshold value TH1 of the first counter corresponding to the period of the first commutation mode. The period of the first commutation mode may be determined using a table indicating the correspondence between the current value detected by the output current detection circuit 274, the reference current, and the period of the first commutation mode.
[0027] In this embodiment, as shown by an arrow P1 in Fig. 2, in the power adjustment control, the timing of switching from the first rectification mode M1 to the first commutation mode is set shorter than a half cycle, i.e., a half cycle of a predetermined power transmission frequency, to generate a period in which no current flows through the smoothing capacitor 250 and the battery 260. As a result, the on-time of the first low-side switch 241L in the power adjustment control is made longer than the half cycle. By configuring in this way, the capacitance of the capacitor of the bootstrap circuit used to drive the gate of the first bridge circuit 241 can be made smaller than in the power adjustment control in which the first rectification mode is switched to the first commutation mode at a timing exceeding the half cycle, and the power receiving device 200 can be prevented from becoming larger.
[0028] At time T1 shown in FIG. 2, the count value of the first counter becomes equal to or greater than the threshold value TH1, and the control circuit 290 switches the first high-side switch 241H off (open) and switches the first low-side switch 241L on (short). In this embodiment, in order to provide a so-called dead time, the first low-side switch 241L is switched on at a time T10, a predetermined interval after the first high-side switch 241H has been switched off. As a result, as shown in FIG. 4, a current flows in the direction ID2 indicated by the arrow, the input voltage becomes zero, and no current flows through the smoothing capacitor 250 and the battery 260. As shown in FIG. 2 and FIG. 4, the state of each rectifier element during this period is also referred to as a "first commutation mode M2."
[0029] 2 is a half cycle in the switching control of the first bridge circuit 241, and corresponds to one cycle in the switching control of the second bridge circuit 242. In the first cycle, when the control circuit 290 detects that the first counter has reached a half cycle in the switching control of the first bridge circuit 241, or detects that the second counter has reached one cycle in the switching control of the second bridge circuit 242, the control circuit 290 switches off the second low-side switch 242L. From the second cycle onwards, the control circuit 290 switches off the second low-side switch 242L for each cycle counted by the second counter. In this embodiment, the control circuit 290 switches off the second low-side switch 242L at a time T20 that is shorter than the time T2, which is a half cycle, by a predetermined interval in order to provide a period in which the body diode of the second high-side switch 242H is conductive.
[0030] At time T20, when the second high-side switch 242H and the second low-side switch 242L are turned off, the output current from the immittance converter 230 conducts the body diode of the second high-side switch 242H, as shown as a signal S2 in FIG. 2. As a result, at time T2, the voltage across the second low-side switch 242L rises. This voltage across the terminals is detected by the second voltage detection circuit 272.
[0031] The control circuit 290 detects the rise of the voltage between the terminals of the second low-side switch 242L from the detection result of the second voltage detection circuit 272, thereby detecting the conduction of the second bridge circuit 242. The control circuit 290 outputs a predetermined GS voltage to the first low-side switch 241L and the second high-side switch 242H to switch the first low-side switch 241L and the second high-side switch 242H on and switch the first high-side switch 241H and the second low-side switch 242L off. As shown in FIG. 2, after the first commutation mode M2, the first high-side switch 241H is already in an off state and the first low-side switch 241L is already in an on state. As a result, as shown in FIG. 5, a current flows in the direction ID3 indicated by the arrow, and the current flows to the smoothing capacitor 250 and the battery 260. The cycle of the switching control of the second bridge circuit 242 starts from the time when the first low-side switch 241L and the second high-side switch 242H are switched on, and the control circuit 290 starts timing by the second counter. As shown in Fig. 2 and Fig. 5, the state of each rectifier element during this period is also called the "second rectification mode M3".
[0032] When the power adjustment control is not performed, the second rectification mode M3 is switched to the first rectification mode M1 when one cycle by the first counter or half cycle by the second counter has elapsed. In this disclosure, "one cycle" and "half cycle" include a point in time when one cycle or half cycle has elapsed and a point in time when the cycle or half cycle is shifted forward or backward by a predetermined interval in order to make the dead time or the body diode conductive. As shown in FIG. 2, when the power adjustment control is performed, the control circuit 290 adjusts the length of the second commutation mode M4 in one cycle by adjusting the timing of switching from the second rectification mode M3 to the second commutation mode. In this embodiment, the control circuit 290 determines the period of the second commutation mode M4 using the current value and reference current detected by the output current detection circuit 274, similar to the period of the first commutation mode M2, and determines the threshold value TH1 of the second counter corresponding to the period of the second commutation mode M4.
[0033] In this embodiment, as shown by an arrow P2 in Fig. 2, the timing of switching from the second rectification mode M3 to the second commutation mode in the power adjustment control is set shorter than half the cycle of the power transmission frequency, thereby generating a period in which no current flows through the smoothing capacitor 250 and the battery 260. With this configuration, the on-time of the second low-side switch 242L in the power adjustment control is made longer than the half cycle. With this configuration, it is possible to reduce an increase in the capacitance of the bootstrap capacitor of the second bridge circuit 242, and to prevent the power receiving device 200 from becoming larger.
[0034] At time T3 shown in FIG. 2, the count value of the second counter becomes equal to or greater than the threshold value TH1, and the control circuit 290 switches the second high-side switch 242H off and switches the second low-side switch 242L on. In this embodiment, in order to provide a dead time, the second low-side switch 242L is switched on at time T30, a predetermined interval after the second high-side switch 242H is switched off. As a result, as shown in FIG. 6, a current flows in the direction ID4 indicated by the arrow, the input voltage becomes zero, and no current flows through the smoothing capacitor 250 and the battery 260. As shown in FIG. 2 and FIG. 6, the state of each rectifier element during this period is also referred to as a "second commutation mode M4."
[0035] The first rectification mode M1 and the second rectification mode M3 are included in a "power supply control" that supplies power to a load device including the battery 260 by controlling the synchronous rectification circuit 240. The first commutation mode M2 and the second commutation mode M4 correspond to a "power adjustment control" that reduces the power supply by providing a period during which the current flowing through the load device is zero, among other power supply controls. The first commutation mode M2 is a mode to which the first rectification mode M1 is switched, and the second commutation mode M4 is a mode to which the second rectification mode M3 is switched.
[0036] 2 corresponds to one cycle in the switching control of the first bridge circuit 241. For example, when the control circuit 290 detects that one cycle has been reached by the first counter, the control circuit 290 switches off the first low-side switch 241L. Whether or not one cycle has been reached by the first counter can be determined, for example, by whether or not the count value by the first counter has become equal to or greater than a predetermined threshold value TH2 corresponding to one cycle.
[0037] Here, if the first low-side switch 241L remains on, the body diode of the first high-side switch 241H does not conduct. Therefore, for example, if the first low-side switch 241L remains on even after one period, it is not possible to detect the conduction of the first bridge circuit 241, and there is a possibility that periodic synchronous rectification operation cannot be performed. In this embodiment, the control circuit 290 switches off the first low-side switch 241L every one period corresponding to the power transmission frequency, thereby making it possible to repeat periodic synchronous rectification operation more reliably than, for example, a case in which a sensor or the like is used to detect the falling edge of the DS voltage of the first high-side switch 241H and the first low-side switch 241L is switched off. In addition, in this embodiment, the control circuit 290 further switches off the first low-side switch 241L at a time T40 that is shorter than the time T4 by a predetermined interval in order to provide a period in which the body diode of the first high-side switch 241H is made conductive.
[0038] When the output current from the immittance converter 230 conducts the body diode of the first high-side switch 241H, the control circuit 290 detects the conduction of the first bridge circuit 241 and starts the first rectification mode M1 of the second cycle, and repeats the same process thereafter. Note that, from the second cycle onward, the control circuit 290 switches off the second low-side switch 242L by detecting one cycle by the second counter, for example, when the count value of the second counter becomes equal to or greater than the threshold value TH2, as in the time T5 of FIG. 2. This makes it possible to repeat periodic synchronous rectification operation more reliably than when, for example, a sensor is used to detect the falling edge of the DS voltage of the second high-side switch 242H and switches off the second low-side switch 242L. In this embodiment, the control circuit 290 switches off the second low-side switch 242L at a time T50 that is shorter than the time T5 that is a half cycle by a predetermined interval, in order to provide a period in which the body diode of the second high-side switch 242H is conducted.
[0039] As described above, the power receiving device 200 of this embodiment includes a power receiving resonant circuit 210 having a power receiving coil 212 and a resonant capacitor, a synchronous rectifier circuit 240 having a first bridge circuit 241 having a first high-side switch 241H and a first low-side switch 241L and a second bridge circuit 242 having a second high-side switch 242H and a second low-side switch 242L, and a control circuit 290 that controls the first bridge circuit 241 and the second bridge circuit 242. The control circuit 290 executes power supply control by repeatedly performing a first rectification mode M1 in which the first high-side switch 241H and the second low-side switch 242L are turned on and the first low-side switch 241L and the second high-side switch 242H are turned off by detecting the conduction of the first bridge circuit 241, and a second rectification mode M3 in which the first low-side switch 241L and the second high-side switch 242H are turned on and the first high-side switch 241H and the second low-side switch 242L are turned off by detecting the conduction of the second bridge circuit 242. The control circuit 290 executes power adjustment control including a first commutation mode M2 in which the first high-side switch 241H is turned off and the first low-side switch 241L is turned on in the first rectification mode M1, and a second commutation mode M4 in which the second high-side switch 242H is turned off and the second low-side switch 242L is turned on in the second rectification mode M3. According to the power receiving device 200 of the present embodiment, highly efficient power adjustment control can be performed by switching control that switches on and off each rectifying element of the synchronous rectifier circuit 240. Therefore, power loss in the power receiving device 200 can be suppressed.
[0040] The power receiving device 200 of this embodiment further includes an output current detection circuit 274 for detecting the output current I1 of the synchronous rectification circuit 240. In the power adjustment control, the control circuit 290 adjusts the timing of switching from the first rectification mode M1 to the first commutation mode M2 and the timing of switching from the second rectification mode M3 to the second commutation mode M4 using the detection value of the output current detection circuit 274 and a reference current as a target value required by the load device. Therefore, it is possible to perform appropriate power supply based on the request from the load device.
[0041] The power receiving device 200 of the present embodiment further includes a first voltage detection circuit 271 that detects the inter-terminal voltage V11 of the first low-side switch 241L. The control circuit 290 acquires the detection result of the first voltage detection circuit 271 and detects the rising edge of the inter-terminal voltage V11 of the first low-side switch 241L to detect the conduction of the first bridge circuit 241. Power supply control and power adjustment control can be executed by a simple configuration of voltage detection, and the configuration can be easily made cheaper than a current sensor.
[0042] The power receiving device 200 of the present embodiment further includes a second voltage detection circuit 272 that detects the inter-terminal voltage V12 of the second low-side switch 242L. The control circuit 290 acquires the detection result of the second voltage detection circuit 272 and detects the rising edge of the inter-terminal voltage V12 of the second low-side switch 242L to detect the conduction of the second bridge circuit 242. Power supply control and power adjustment control can be executed by a simple configuration of voltage detection, and the configuration can be easily made cheaper than a current sensor.
[0043] According to the power receiving device 200 of the present embodiment, when the first low-side switch 241L is on at time T4 when one period corresponding to a predetermined power transmission frequency has elapsed since the first high-side switch 241H was turned on in the first rectification mode M1, the control circuit 290 switches the first low-side switch 241L off. Since the first low-side switch 241L can be switched off for each period of the power transmission frequency, the periodic synchronous rectification operation can be repeated reliably compared to a case where the first low-side switch 241L is switched off by detecting the falling edge of the DS voltage of the first high-side switch 241H by a sensor or the like. Furthermore, in the power receiving device 200 of the present embodiment, the body diode of the first high-side switch 241H can be made conductive at a point in time before one period has elapsed by switching off the first low-side switch 241L at time T40 shorter than time T4, and the synchronous rectification operation can be repeated for each period of the power transmission frequency more reliably.
[0044] According to the power receiving device 200 of the present embodiment, when the second low-side switch 242L is on at time T5 when one period corresponding to a predetermined power transmission frequency has elapsed since the second high-side switch 242H was turned on in the second rectification mode M3, the control circuit 290 switches the second low-side switch 242L off. Since the second low-side switch 242L can be switched off for each period of the power transmission frequency, the periodic synchronous rectification operation can be repeated reliably compared to the case where, for example, a falling edge of the DS voltage of the second high-side switch 242H is detected by a sensor or the like. Furthermore, in the power receiving device 200 of the present embodiment, the second low-side switch 242L can be switched off at time T50 shorter than time T5, so that the body diode of the second high-side switch 242H can be made conductive at a point in time before one period has elapsed, and the synchronous rectification operation can be repeated more reliably for each period of the power transmission frequency.
[0045] According to the power receiving device 200 of the present embodiment, the control circuit 290 sets the switching timing from the first rectification mode M1 to the first commutation mode M2 and the switching timing from the second rectification mode M3 to the second commutation mode M4 to be shorter than a half cycle of a predetermined power transmission frequency. Therefore, the on-time of the first low-side switch 241L and the second low-side switch 242L in the power adjustment control can be made longer than the half cycle, so that the capacitance of the bootstrap capacitors of the first bridge circuit 241 and the second bridge circuit 242 can be reduced and the power receiving device 200 can be prevented from becoming larger in size, compared to the case where the on-time of the first high-side switch 241H and the second high-side switch 242H is made longer.
[0046] B. Second embodiment: 7, the power receiving device 200b according to the second embodiment is different from the power receiving device 200 according to the first embodiment in that it further includes an input current detection circuit 276 and includes a control circuit 290b instead of the control circuit 290, but the other configurations are similar. In this embodiment, the control circuit 290b adjusts the switching timing from the first rectification mode M1 to the first commutation mode M2 and the switching timing from the second rectification mode M3 to the second commutation mode M4 by peak current mode control. In the figure, an example is shown in which, since the difference between the reference current and the output current I1 is large, feedback control is executed to bring the output current I1 closer to the reference current by using peak current mode control.
[0047] The input current detection circuit 276 is disposed between the immittance converter 230 and the synchronous rectification circuit 240, and functions as a second current detection unit that detects the input current of the synchronous rectification circuit 240. The control circuit 290b further includes a full-wave rectification circuit 291, a first integration circuit 292, a constant current control unit 293, a comparator 294, a switch signal generation circuit 296, and a reset circuit 299 in addition to the functional configuration of the control circuit 290 in the first embodiment. As shown in the top row of FIG. 8, the AC current waveform V1 detected by the synchronous rectification circuit 240 is input to the full-wave rectification circuit 291. The full-wave rectification circuit 291 full-wave rectifies the input current waveform V1, generates the current waveform V2 shown in FIG. 8, and outputs it to the first integration circuit 292. The full-wave rectification circuit 291 can be a known full-wave rectification circuit, such as a full-bridge circuit having four diodes.
[0048] The first integration circuit 292 integrates the full-wave rectified current waveform V2 in terms of phase or time to generate the current waveform V3 shown in FIG. 8. Since the current waveform V1 is a sine wave, the current waveform V3 is converted into a cosine wave by integration by the first integration circuit 292. That is, the current waveform V2 expressed as sin(x)sin(x) is converted into a current waveform V3 which becomes -cos(x) by integration. If the current waveform V2 shown in FIG. 8 is left as a sine wave, the current value increases and decreases on the time axis, and is therefore not suitable for peak current mode control. In contrast, in this embodiment, a current waveform that shows an increasing tendency on the horizontal axis, such as the current waveform V3, can be used for peak current mode control.
[0049] The reset circuit 299 resets the calculation result by the first integrator circuit 292 at every predetermined period. In this embodiment, the reset circuit 299 is set to reset the calculation result by the first integrator circuit 292 when detecting a rising edge H1 of the DS voltage of the first low-side switch 241L and a rising edge H2 of the DS voltage of the second low-side switch 242L, for example, as shown by waveforms R1 and R2 in Fig. 8. With this configuration, the calculation result by the first integrator circuit 292 can be reset at every half cycle of the power transmission frequency, and peak current mode control can be performed at every half cycle in the switching control of the first bridge circuit 241 and the second bridge circuit 242.
[0050] The constant current control unit 293 outputs an output current V4 based on a comparison between a reference current required by the load device and the output current I1 of the synchronous rectifier circuit 240 detected by the output current detection circuit 274. For example, when the current flowing through the battery 260 is to be increased, the constant current control unit 293 outputs a large output current V4 to reduce the difference between the two, and when the current flowing through the battery 260 is to be decreased, the constant current control unit 293 outputs a small output current V4 to increase the difference between the two.
[0051] The comparator 294 compares the output current V4 with the current waveform V3, and outputs an H-level signal V5 shown in Fig. 8 when the current waveform V3 becomes equal to or greater than the output current V4. The switch signal generation circuit 296 controls each switching element of the synchronous rectification circuit 240. The switch signal generation circuit 296 also functions as a control unit that controls the switching of each rectification element of the synchronous rectification circuit 240 described above, and further executes switching control based on the H-level signal V5 to adjust the switching timing from the first rectification mode M1 to the first commutation mode M2 and the switching timing from the second rectification mode M3 to the second commutation mode M4. Specifically, when the switch signal generating circuit 296 detects an H-level signal V5 in the first rectification mode M1, it switches off the first high-side switch 241H and turns on the first low-side switch 241L to switch to the first commutation mode M2, and when it detects an H-level signal V5 in the first commutation mode M2, it switches off the second high-side switch 242H and turns on the second low-side switch 242L to switch to the second commutation mode M4. As shown in Fig. 8, in the peak current mode control, the reference current is increased to increase the output current V4 of the constant current control unit 293, so that the periods TM1 to TM4 of the first commutation mode M2 and the second commutation mode M4 are gradually shortened, and the input current of the battery 260 gradually increases.
[0052] The power receiving device 200 of this embodiment further includes an input current detection circuit 276 that detects a current waveform V1 that is an input current to the synchronous rectification circuit 240, a full-wave rectification circuit 291 that outputs a current waveform V2 obtained by full-wave rectifying the current waveform V1 detected by the input current detection circuit 276, and a first integration circuit 292 that outputs a current waveform V3 obtained by integrating the current waveform V2 that is full-wave rectified by the full-wave rectification circuit 291. The control circuit 290b adjusts the timing of switching from the first rectification mode M1 to the first commutation mode M2 and the timing of switching from the second rectification mode M3 to the second commutation mode M4 by peak current mode control using the output current I1 and the reference current that are the detection values of the output current detection circuit 274, as well as the current waveform V3 integrated by the first integration circuit 292. The power receiving device 200 of this embodiment can convert the current waveform into a cosine wave that shows an increasing tendency on the time axis by the first integration circuit 292, and can execute peak current mode control. Therefore, it is possible to improve the response performance and line regulation characteristics in the switching control of the control circuit 290b. Therefore, even if the AC power received from the power transmitting device 100 changes significantly, for example, when the facing state between the power transmitting device 100 and the power receiving device 200 changes significantly, it is possible to execute stable power supply control and power adjustment control. In addition, by using the first integration circuit 292, it is possible to reduce the influence of noise on the current waveform.
[0053] C. Third embodiment: As shown in Fig. 9, the power receiving device 200c according to the third embodiment is different from the power receiving device 200b according to the second embodiment shown in Fig. 7 in that it includes a C current detection circuit 278 and a control circuit 290c instead of the input current detection circuit 276 and the control circuit 290b, but the other configurations are similar. In the power receiving device 200b according to the second embodiment, an example has been shown in which the control circuit 290b executes peak current mode control using the input current of the synchronous rectifier circuit 240 detected by the input current detection circuit 276. In contrast, the power receiving device 200c according to the third embodiment executes peak current mode control using the output current of the synchronous rectifier circuit 240 detected by the C current detection circuit 278.
[0054] The C current detection circuit 278 is disposed on the output side of the synchronous rectifier circuit 240, and functions as a third current detection circuit that detects the output current of the synchronous rectifier circuit 240. As shown in Fig. 9, when the power receiving device 200c includes the smoothing capacitor 250, the C current detection circuit 278 is disposed between the smoothing capacitor 250 and the synchronous rectifier circuit 240. The output current of the synchronous rectifier circuit 240 detected by the C current detection circuit 278 is a current waveform V2C in a full-wave rectified state similar to the current waveform V2, unlike the current waveform V1 of the input current to the synchronous rectifier circuit 240 shown in Fig. 8.
[0055] The control circuit 290c differs from the control circuit 290b shown in the second embodiment in that it does not include a full-wave rectifier circuit 291 and includes a second integration circuit 292c instead of the first integration circuit 292, but otherwise has the same configuration as the control circuit 290b. The second integration circuit 292c has a function similar to that of the first integration circuit 292, and integrates the full-wave rectified current waveform V2C in phase or time to output the current waveform V3 shown in Fig. 8. Therefore, the power receiving device 200c of this embodiment can also perform peak current mode control similar to the second embodiment.
[0056] According to the power receiving device 200c of the present embodiment, the control circuit 290c executes peak current mode control using the output current I1, which is the detection value of the output current detection circuit 274, and the reference current, as well as the current waveform V3 integrated by the second integration circuit 292c, and adjusts the switching timing from the first rectification mode M1 to the first commutation mode M2 and the switching timing from the second rectification mode M3 to the second commutation mode M4, similarly to the above-described second embodiment. According to the power receiving device 200c of the present embodiment, it is possible to execute peak current mode control while making the control circuit 290c have a simple configuration in which the full-wave rectification circuit 291 is omitted.
[0057] D. Fourth embodiment: As shown in Fig. 10, the power receiving device 200d according to the fourth embodiment differs from the power receiving device 200b according to the second embodiment shown in Fig. 7 in that it includes a reactor voltage acquisition unit 297 and a control circuit 290d instead of the input current detection circuit 276 and the control circuit 290b, and other configurations are similar to those of the power receiving device 200b according to the second embodiment. The power receiving device 200d according to the fourth embodiment executes peak current mode control using the voltage of the output side reactor of the immittance converter 230 detected by the reactor voltage acquisition unit 297.
[0058] In this embodiment, the reactor voltage acquisition unit 297 acquires the voltage of the output side first reactor 234 as the output side reactor of the immittance converter 230. More specifically, the reactor voltage acquisition unit 297 is a coil that acquires a voltage waveform obtained by magnetic coupling with the output side first reactor 234. In FIG. 9, the reactor voltage acquisition unit 297 on the power receiving side is shown by two parallel lines to be in a state where it is magnetically coupled to the output side first reactor 234. The reactor voltage acquisition unit 297 can be formed, for example, by winding an electric conductor around the core (iron core) of the output side first reactor 234. Note that the reactor voltage acquisition unit 297 may acquire the voltage waveform of the output side second reactor 238 instead of the output side first reactor 234 as the output side reactor of the immittance converter 230.
[0059] The control circuit 290d is different from the control circuit 290b shown in the second embodiment in that it further includes a third integration circuit 298 and a fourth integration circuit 292d instead of the first integration circuit 292, and other configurations are the same as the control circuit 290b. The third integration circuit 298 integrates the voltage waveform of the output side first reactor 234 acquired by the reactor voltage acquisition unit 297 in phase or time, and outputs the result to the full-wave rectification circuit 291. By integrating the voltage waveform of the output side first reactor 234, it is possible to obtain a current waveform V1D that is substantially the same as the current flowing through the output side first reactor 234. The full-wave rectification circuit 291 full-wave rectifies the input current waveform V1D to generate a current waveform V2 shown in FIG. 8. The fourth integration circuit 292d, like the first integration circuit 292, integrates the current waveform V2 in phase or time to output a current waveform V3, and the peak current mode control similar to that of the second embodiment is executed thereafter.
[0060] As described above, in the power receiving device 200d of the present embodiment, the control circuit 290d executes peak current mode control using the current waveform V3 obtained by integrating the current waveform V2 acquired by the reactor voltage acquisition unit 297 and full-wave rectified by the full-wave rectifier circuit 291 in the fourth integration circuit 292d together with the output current I1 and reference current detected by the output current detection circuit 274, and adjusts the switching timing from the first rectification mode M1 to the first commutation mode M2 and the switching timing from the second rectification mode M3 to the second commutation mode M4, as in the second embodiment. According to the power receiving device 200d of the present embodiment, for example, the current of the power receiving device 200d can be detected by a simple configuration such as winding an electric conductor around the core (iron core) of the output side first reactor 234, and the peak current mode control can be executed without providing a current sensor.
[0061] E. Fifth embodiment: As shown in Fig. 11, the power receiving device 200e according to the fifth embodiment is different from the power receiving device 200b according to the second embodiment shown in Fig. 7 in that it includes an input voltage detection circuit 277 and a control circuit 290e instead of the input current detection circuit 276 and the control circuit 290b, but otherwise has the same configuration. The power receiving device 200e according to the fifth embodiment executes peak current mode control using the input voltage V1E of the synchronous rectifier circuit 240 detected by the input voltage detection circuit 277.
[0062] The input voltage detection circuit 277 is disposed between the power receiving resonant circuit 210 and the immittance converter 230, and detects the input voltage of the immittance converter 230. Here, the immittance converter 230 appears as a constant current source when viewed from the output side, and outputs a constant current proportional to the input voltage. Therefore, by acquiring the input voltage V1E of the immittance converter 230 instead of the output current from the immittance converter 230 (the input current to the synchronous rectifier circuit 240), it is possible to execute peak current mode control as in the second embodiment.
[0063] The control circuit 290e includes a fifth integration circuit 292e having the same function as the first integration circuit 292. The full-wave rectification circuit 291 outputs a current waveform V2 obtained by full-wave rectifying the input voltage V1E, and the fifth integration circuit 292e integrates the current waveform V2 over the phase or time T0 to output a current waveform V3 in the same manner as in the second embodiment.
[0064] In this way, the control circuit 290e adjusts the switching timing from the first rectification mode M1 to the first commutation mode M2 and the switching timing from the second rectification mode M3 to the second commutation mode M4 by peak current mode control using the input voltage V1E of the immittance converter 230. Even with this form of the power receiving device 200e, it is possible to obtain the same effects as those of the second embodiment.
[0065] F. Other Embodiments: (F1) In each of the above embodiments, as shown in FIG. 1, an example was shown in which a resonance method using a primary series secondary series capacitor (also called "SS method") is applied to the power transmitting resonant circuit 110 and the power receiving resonant circuit 210. In contrast to this, as shown in FIG. 12, the power transmitting resonant circuit 110f may be a parallel resonant circuit in which the power transmitting resonant capacitor 114f is connected in parallel to the power transmitting coil 112, and a primary parallel secondary series method (also called "PS method") may be applied to the power transmitting resonant circuit 110f and the power receiving resonant circuit 210. Also, as shown in FIG. 13, the power transmitting resonant circuit 110g may include a power transmitting resonant capacitor 114g1 connected in parallel to the power transmitting coil 112 and a power transmitting resonant capacitor 114g2 connected in series to the power transmitting coil 112, and a primary parallel series secondary series method (also called "PSS method") may be applied to the power transmitting resonant circuit 110g and the power receiving resonant circuit 210. As shown in FIG. 14, the power transmitting device 100 may further include a tertiary resonant circuit 310h, which is a circuit independent of the power transmitting resonant circuit 110 and in which a tertiary coil 312 and a tertiary resonant capacitor 314 are connected in series. The tertiary resonant circuit 310h is arranged so that the tertiary coil 312 is magnetically coupled to each of the power transmitting coil 112 and the power receiving coil 212. The tertiary resonant circuit 310h may also include a tertiary resonant circuit 310h in which the tertiary coil 312i and the tertiary resonant capacitor 314i are connected in parallel. As shown in FIG. 15, the power transmitting device 100 may include a tertiary resonant circuit 310i in which a tertiary coil 312i and a tertiary resonant capacitor 314i are connected in parallel and connected in series to the power transmitting coil 112. The tertiary resonant circuit 310i is arranged so that the tertiary coil 312i is magnetically coupled to each of the power transmitting coil 112 and the power receiving coil 212.
[0066] (F2) In the above embodiments, an example was shown in which the first voltage detection circuit 271 that detects the conduction of the first bridge circuit 241 by detecting the terminal voltage V11 of the first low-side switch 241L and the second voltage detection circuit 272 that detects the conduction of the second bridge circuit 242 by detecting the terminal voltage V12 of the second low-side switch 242L are provided. In contrast to this, the power receiving device 200 may be provided with a current sensor that detects the conduction of the body diode of the first high-side switch 241H in order to detect the conduction of the first bridge circuit 241, instead of or together with the first voltage detection circuit 271. Also, instead of or together with the second voltage detection circuit 272, a current sensor that detects the conduction of the body diode of the second high-side switch 242H in order to detect the conduction of the second bridge circuit 242 may be provided. For example, a current sensor may be provided downstream of the first high-side switch 241H and downstream of the second high-side switch 242H. Even in this configuration, the conduction of the first bridge circuit 241 and the conduction of the second bridge circuit 242 can be detected.
[0067] (F3) In each of the above embodiments, the control circuit 290 detects the rising edge of the DS voltage of the first low-side switch 241L and the second low-side switch 242L to switch the first high-side switch 241H on and the second high-side switch 242H on. In contrast, the control circuit 290 may detect the falling edge of the DS voltage of the first high-side switch 241H and the second high-side switch 242H to switch the first high-side switch 241H on and the second high-side switch 242H on. In this case, the first voltage detection circuit 271 is connected to both ends of the first high-side switch 241H, and the second voltage detection circuit 272 is connected to both ends of the second high-side switch 242H. Even in this configuration, the same effects as those of the above embodiments can be obtained.
[0068] (F4) In each of the above embodiments, the control circuit 290 has been described as making both the switching timing from the first rectification mode M1 to the first commutation mode M2 and the switching timing from the second rectification mode M3 to the second commutation mode M4 shorter than a half cycle of a predetermined power transmission frequency. However, only one of the timings may be shorter than a half cycle of the power transmission frequency.
[0069] (F5) In each of the above embodiments, the control circuit 290 repeats the periodic synchronous rectification operation in the first bridge circuit 241 by switching off the first low-side switch 241L for each period corresponding to the power transmission frequency after the first high-side switch 241H is turned on in the first rectification mode M1. In contrast, the power receiving device 200 may further be provided with a first period detector that detects the period of the current waveform or voltage waveform in the first bridge circuit 241. In this case, the control circuit 290 may switch off the first low-side switch 241L by detecting the passage of one period of the current waveform or voltage waveform in the power supply control from the detection result of the first period detector. Even in this form of the power receiving device 200, the periodic synchronous rectification operation can be repeated more reliably than in the case where a sensor or the like is used to detect the falling edge of the DS voltage of the first high-side switch 241H.
[0070] (F6) In each of the above embodiments, the control circuit 290 repeats the periodic synchronous rectification operation in the second bridge circuit 242 by switching off the second low-side switch 242L for each period corresponding to the power transmission frequency after the second high-side switch 242H is turned on in the second rectification mode M3. In contrast, the power receiving device 200 may further be provided with a second period detector that detects the period of the current waveform or voltage waveform in the second bridge circuit 242. In this case, the control circuit 290 may switch off the second low-side switch 242L by detecting the passage of one period of the current waveform or voltage waveform in the power supply control from the detection result of the second period detector. Even in this form of the power receiving device 200, the periodic synchronous rectification operation can be repeated more reliably than in the case where a sensor or the like is used to detect the falling edge of the DS voltage of the second high-side switch 242H.
[0071] The control unit and the method described in the present disclosure may be realized by a special-purpose computer provided by configuring a processor and a memory programmed to execute one or more functions embodied in a computer program. Alternatively, the control unit and the method described in the present disclosure may be realized by a special-purpose computer provided by configuring a processor with one or more dedicated hardware logic circuits. Alternatively, the control unit and the method described in the present disclosure may be realized by one or more special-purpose computers configured by a combination of a processor and a memory programmed to execute one or more functions and a processor configured with one or more hardware logic circuits. In addition, the computer program may be stored in a computer-readable non-transitory tangible recording medium as instructions executed by a computer.
[0072] The present disclosure is not limited to the above-mentioned embodiment, and can be realized in various configurations without departing from the spirit of the present disclosure. For example, the technical features in the embodiments corresponding to the technical features in each aspect described in the Summary of the Invention column can be appropriately replaced or combined to solve some or all of the above-mentioned problems or to achieve some or all of the above-mentioned effects. Furthermore, if the technical feature is not described as essential in this specification, it can be appropriately deleted. [Explanation of symbols]
[0073] 100...power transmitting device, 200, 200b, 200c, 200d, 200e...power receiving device, 210...power receiving resonant circuit, 212...power receiving coil, 214...power receiving resonant capacitor, 240...synchronous rectification circuit, 241...first bridge circuit, 241H...first high-side switch, 241L...first low-side switch, 242...second bridge circuit, 242H...second high-side switch, 242L...second low-side switch, 290, 290b, 290c, 290d, 290e...control circuit, M1...first rectification mode, M2...first commutation mode, M3...second rectification mode, M4...second commutation mode
Claims
1. A power receiving device (200, 200b, 200c, 200d, 200e) that wirelessly receives AC power transmitted from a power transmitting device (100) and supplies the power to a load device, A power receiving resonant circuit (210) having a power receiving coil (212) and a resonant capacitor (214) for resonating the power receiving coil; a synchronous rectifier circuit (240) having a plurality of bridge circuits including a first bridge circuit (241) having a first high-side switch (241H) and a first low-side switch (241L) and a second bridge circuit (242) having a second high-side switch (242H) and a second low-side switch (242L), and converting the AC power received by the power receiving coil into DC power; A control unit (290, 290b, 290c, 290d, 290e) for controlling the plurality of bridge circuits, The control unit is a first rectification mode (M1) in which the first high-side switch and the second low-side switch are turned on and the first low-side switch and the second high-side switch are turned off by detecting conduction of the first bridge circuit; a second rectification mode (M3) in which the first low-side switch and the second high-side switch are turned on and the first high-side switch and the second low-side switch are turned off by detecting conduction through the second bridge circuit; and a first commutation mode (M2) in which the first high-side switch is turned off and the first low-side switch is turned on in the first rectification mode; a second commutation mode (M4) in which the second high-side switch is turned off and the second low-side switch is turned on in the second rectification mode; Powered device.
2. The power receiving device according to claim 1 , Further, a first current detection unit (274) is provided for detecting an output current of the synchronous rectification circuit, The control unit is In the power adjustment control, a timing for switching from the first rectification mode to the first commutation mode and a timing for switching from the second rectification mode to the second commutation mode are adjusted using a detection value (I1) of the first current detection unit and a reference current. Powered device.
3. The power receiving device according to claim 1 , Further, a first voltage detection unit (271) is provided which detects a terminal voltage of the first high-side switch or a terminal voltage (V11) of the first low-side switch, The control unit is a detection result of the first voltage detection unit is acquired, and a current flow in the first bridge circuit is detected by detecting a falling edge of a voltage between the terminals of the first high-side switch or a rising edge of a voltage between the terminals of the first low-side switch; Powered device.
4. The power receiving device according to claim 1 , Further, a second voltage detection unit (272) is provided which detects a terminal voltage of the second high-side switch or a terminal voltage (V12) of the second low-side switch, The control unit is a detection result of the second voltage detection unit is acquired, and a current flow in the second bridge circuit is detected by detecting a falling edge of a voltage between the terminals of the second high-side switch or a rising edge of a voltage between the terminals of the second low-side switch; Powered device.
5. The power receiving device according to claim 1 , a first period detector for detecting a period of a current waveform or a voltage waveform in the first bridge circuit, the control unit switches off the first low-side switch by detecting the passage of one cycle in the power supply control by the first cycle detector. Powered device.
6. The power receiving device according to claim 5 , a second period detector for detecting a period of a current waveform or a voltage waveform in the second bridge circuit, the control unit switches off the second low-side switch by detecting the lapse of one cycle in the power supply control by the second cycle detector. Powered device.
7. The power receiving device according to claim 1 , the control unit switches off the first low-side switch at a time shorter than a time when one period corresponding to a predetermined power transmission frequency has elapsed since the first high-side switch was turned on in the first rectification mode, Powered device.
8. The power receiving device according to claim 7, the control unit switches off the second low-side switch at a time shorter than a time when one period corresponding to the power transmission frequency has elapsed since the second high-side switch was turned on in the second rectification mode. Powered device.
9. The power receiving device according to claim 1 , the control unit makes at least one of a switching timing from the first rectification mode to the first commutation mode and a switching timing from the second rectification mode to the second commutation mode shorter than a half period of a predetermined power transmission frequency. Powered device.
10. The power receiving device according to claim 2, Further, a second current detection unit (276) for detecting an input current of the synchronous rectification circuit; a full-wave rectifier circuit (291) that full-wave rectifies the input current detected by the second current detection unit; a first integration circuit (292) that integrates the current waveform full-wave rectified by the full-wave rectification circuit; The control unit is A peak current mode control is performed using a current waveform integrated by the first integration circuit together with the detection value of the first current detection unit and the reference current, adjusting a switching timing from the first rectification mode to the first commutation mode and a switching timing from the second rectification mode to the second commutation mode; Powered device.
11. The power receiving device according to claim 2, Furthermore, a third current detection circuit (278) for detecting an output current of the synchronous rectification circuit; a second integration circuit (292c) that integrates the current waveform of the output current detected by the third current detection circuit; The control unit is A peak current mode control is performed using a current waveform integrated by the second integration circuit together with the detection value of the first current detection unit and the reference current, adjusting a switching timing from the first rectification mode to the first commutation mode and a switching timing from the second rectification mode to the second commutation mode; Powered device.
12. The power receiving device according to claim 2, Further, an immittance converter (230) disposed between the power receiving resonant circuit and the synchronous rectification circuit; a third integration circuit (298) that integrates a voltage waveform obtained by magnetic coupling with an output side reactor (234, 238) of the immittance converter and outputs the voltage waveform as a current waveform; a full-wave rectifier circuit (291) that full-wave rectifies the current waveform output from the third integration circuit; a fourth integration circuit (292d) that integrates the current waveform full-wave rectified by the full-wave rectification circuit; The control unit is A peak current mode control is performed using a current waveform integrated by the fourth integration circuit together with the detection value of the first current detection unit and the reference current, adjusting a switching timing from the first rectification mode to the first commutation mode and a switching timing from the second rectification mode to the second commutation mode; Powered device.
13. The power receiving device according to claim 2, Further, an immittance converter (230) disposed between the power receiving resonant circuit and the synchronous rectification circuit; A voltage detection circuit (270) for detecting an input voltage of the immittance converter; a full-wave rectifier circuit (291) that full-wave rectifies the voltage waveform of the input voltage detected by the voltage detection circuit; a fifth integration circuit (292e) that integrates the current waveform full-wave rectified by the full-wave rectification circuit; The control unit is A peak current mode control is performed using a current waveform integrated by the fifth integration circuit together with the detection value of the first current detection unit and the reference current, adjusting a switching timing from the first rectification mode to the first commutation mode and a switching timing from the second rectification mode to the second commutation mode; Powered device.