Specific information generation method of semiconductor device, specific information management method of the semiconductor device, and manufacturing apparatus of the semiconductor device
Patent Information
- Application Number
- JP2023029185
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-02-28
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2043-02-28
AI Technical Summary
Existing methods for generating unique information on semiconductor devices require additional processing steps and are not versatile, as they necessitate the formation of a reading area on the chip.
A method involving specifying a first reading area on a semiconductor device's metal film, extracting grains within this area, identifying a smaller second reading area based on grain positions, and generating unique information through grain classification and matrix generation.
Enables extraction of unique information without modifying the semiconductor device's structure, offering high versatility and accuracy in identifying each chip, even with multiple reading areas.
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Abstract
Description
[Technical field]
[0001] The present disclosure relates to generation and management of unique information for each semiconductor device. [Background technology]
[0002] In the manufacture of semiconductor devices, in order to realize traceability for each chip of a semiconductor device even after the wafer dicing process, manufacturing process information unique to each chip (hereinafter referred to as "unique information") is left by, for example, a method of stamping a serial number on each chip, a method of forming a unique mark for each chip in a one-mask process (a process in which multiple chips in a wafer are collectively processed using one mask), a method of mounting a memory element (e.g., fuse, memory element, etc.) to store a serial number, etc. To adopt these methods, it is necessary to add processes for leaving unique information on the chip, such as a chip stamping process, a process of creating a special mask with a unique mark (pattern) for each chip, and a process of forming a memory element.
[0003] For example, the following Patent Document 1 discloses a technology in which a reading area is formed in advance by exposing a metal film on a chip, and the shape of the grain boundary of the reading area is used as the chip's unique information. This technology does not leave unique information on the chip, but extracts unique information from the chip, so there is no need to add the above-mentioned process. [Prior art documents] [Patent documents]
[0004] [Patent Document 1] JP 2006-190840 A Summary of the Invention [Problem to be solved by the invention]
[0005] However, the technology of Patent Document 1 has low versatility because it requires the read area to be formed on the chip in advance.
[0006] The present disclosure has been made to solve the above problems, and has an object to realize a highly versatile method for extracting unique information from a semiconductor device. [Means for solving the problem]
[0007] The method for generating unique information of a semiconductor device disclosed herein includes a first reading area identification step of identifying a first reading area on a metal film of the semiconductor device based on a base point determined on the semiconductor device, a grain extraction step of extracting a predetermined number of grains, starting with the largest one, within the first reading area, a second reading area identification step of identifying a second reading area smaller than the first reading area based on a reference point defined from the positions of the predetermined number of grains extracted in the grain extraction step, and a step of generating unique information of the semiconductor device based on information extracted from the appearance of the grains in the second reading area. Effect of the Invention
[0008] According to the present disclosure, since there is no need to modify the structure of the semiconductor device in order to extract the unique information, it is possible to realize extraction of the unique information from the semiconductor device using a highly versatile method. [Brief description of the drawings]
[0009] [Figure 1] 1 is a plan view showing an example of a semiconductor substrate in a first embodiment. [Diagram 2] 1 is a plan view showing an example of a semiconductor substrate in a first embodiment. [Diagram 3] 1 is a plan view showing an example of a semiconductor substrate in a first embodiment. [Figure 4] 4 is a diagram for explaining a method for generating chip-specific information in the first embodiment. FIG. [Diagram 5] 4 is a diagram for explaining a method for generating chip-specific information in the first embodiment. FIG. [Figure 6]4 is a diagram for explaining a method for generating chip-specific information in the first embodiment. FIG. [Figure 7] 4 is a diagram for explaining a method for generating chip-specific information in the first embodiment. FIG. [Figure 8] 1 is a diagram showing a configuration of a manufacturing apparatus for a semiconductor device according to a first embodiment. [Figure 9] 13 is a plan view showing an example of the position of a first reading area in the second embodiment. FIG. [Figure 10] 13 is a plan view showing an example of the position of a first reading area in the second embodiment. FIG. [Figure 11] 13 is a plan view showing an example of the position of a first reading area in the second embodiment. FIG. [Figure 12] FIG. 13 is a diagram for explaining a method for generating chip-specific information in the third embodiment. [Figure 13] FIG. 13 is a diagram for explaining a method for setting a mesh of the second reading area in the fourth embodiment. [Figure 14] FIG. 13 is a diagram for explaining a method for generating chip-specific information in the fourth embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] <Embodiment 1> A method for manufacturing the semiconductor device according to the first embodiment will be described.
[0011] First, a semiconductor substrate as a wafer is prepared. The concentration of impurities contained in the prepared semiconductor substrate is appropriately selected according to the breakdown voltage of the semiconductor device to be fabricated. In this embodiment, a semiconductor substrate made of n-type silicon (Si) is prepared. However, a p-type semiconductor substrate may also be used, in which case the conductivity type of each region formed by ion implantation, epitaxial growth, etc. may be reversed from that of the n-type semiconductor substrate.
[0012] Next, a chip region that will become a semiconductor device product and a dicing line surrounding the chip region are formed by ion implantation, epitaxial growth, etc. The chip region includes an active region through which a main current flows, and a termination region that is provided around the active region and maintains the breakdown voltage of the semiconductor device. A known breakdown voltage maintaining structure can be appropriately selected and provided in the termination region.
[0013] A surface electrode made of a metal film such as aluminum patterned by etching using a mask is provided on a first main surface, which is one of the main surfaces of the semiconductor substrate. The surface electrode is formed by depositing an aluminum silicon alloy (Al-Si alloy) by PVD (Physical Vapor Deposition) such as sputtering or evaporation.
[0014] The surface electrode may be a metal film having a laminated structure in which nickel alloy (Ni alloy) or gold (Au) is further formed by electroless plating or electrolytic plating on the aluminum silicon alloy formed by PVD. When the surface electrode is formed by plating, the surface electrode can be made into a thick metal film, so that the heat capacity of the surface electrode can be increased and the heat resistance can be improved. The plating process for forming the nickel alloy on the aluminum silicon alloy may be performed after processing the second main surface side, which is the other main surface of the semiconductor substrate.
[0015] A barrier metal may be provided on the underside of the front electrode by forming a barrier metal on the first main surface of the semiconductor substrate before forming the front electrode. The barrier metal can be formed by depositing titanium, titanium nitride, or the like by PVD or CVD (Chemical Vapor Deposition).
[0016] If necessary, a passivation film, which is a surface protective film, may be selectively formed on the active region and the termination region on the first main surface of the semiconductor substrate. The passivation film is made of an organic material such as silicon nitride, polyimide, or polybenzoxazole, whose conductivity or refractive index is controlled.
[0017] A metal film may be formed as a back electrode on the second main surface of the semiconductor substrate. The back electrode may be formed by depositing an aluminum silicon alloy, titanium, or the like by PVD such as sputtering or vapor deposition. Alternatively, a metal film having a laminated structure made of two or more of an aluminum silicon alloy, titanium, nickel, gold, or the like may be used as the back electrode. Alternatively, a laminated structure formed by forming a metal film by electroless plating or electrolytic plating on a metal film formed by PVD may be used as the back electrode.
[0018] The semiconductor elements formed in the semiconductor device are power semiconductor elements (e.g., diode elements, switching elements, etc.) or elements of integrated circuits. For example, if the semiconductor device is a switching element, a gate electrode is provided as a control electrode in the active region, and a gate signal that controls the on / off of the switching element is input to the gate electrode. The gate electrode may have a planar structure or a trench structure. The gate electrode is electrically connected to a gate pad that is a control pad, and an external gate signal is input to the control pad.
[0019] The semiconductor device may be provided with a current sense pad, a Kelvin source pad, a temperature sense diode pad, etc., as a control pad other than the gate pad. The current sense pad is a control pad for detecting a current flowing in a cell region in which a switching element is formed, and is electrically connected to a part of the cell region so that a current that is a fraction of a fraction to a fraction of a ten-thousandth of the current flowing through the entire cell region flows. The Kelvin source pad is a control pad to which a gate drive voltage for controlling the on / off of the switching element is applied. The temperature sense diode pad is a control pad electrically connected to the anode and cathode of a temperature sense diode provided in the semiconductor device, and is used to measure the temperature of the semiconductor element. The control pad may be arranged in any manner, for example, the control pad region may be arranged adjacent to the active region, or the control pad region may be arranged within the active region. The technology of the present disclosure, which will be described later, is also applicable to the metal film constituting the control pad.
[0020] 1 to 3 are diagrams showing an example of the configuration of a semiconductor substrate as a wafer on which semiconductor elements are formed (i.e., a semiconductor substrate before dicing). FIGS. 1 and 2 are top views of a semiconductor substrate, with FIG. 1 showing an example of a semiconductor device as a power semiconductor element and FIG. 2 showing an example of a semiconductor device as an integrated circuit. FIG. 3 is a cross-sectional view of a portion of the semiconductor device of FIG. 1 or 2. After the semiconductor elements are formed on the semiconductor substrate as shown in FIGS. 1 to 3, the semiconductor substrate is diced along dicing lines and separated into individual chips to obtain a semiconductor device.
[0021] Here, a method for acquiring unique information for each chip of a semiconductor device from the chip will be described. In this embodiment, unique information for identifying each chip is generated by extracting characteristics unique to the chip from the grain appearance and converting them into data. The unique information is different for each chip, and the unique information and the chip are associated on a one-to-one basis.
[0022] The generation of unique information includes a first reading area specifying step, a grain extraction step, a second reading area specifying step, a classification step, a matrix generating step, a unique information generating step, and a database saving step, which are described below.
[0023] In the first reading area specifying step, a base point is determined on the chip by a predetermined method, and a first reading area on the chip is specified based on the base point. For example, the outer peripheral edge of the chip can be set as the base point. The first reading area can be set at an arbitrary position in the area where the metal film is formed. For semiconductor devices of the same type, the first reading area is set at the same position in the chip. The base point is not limited to the outer peripheral edge of the chip, and may be any location, such as a corner or center of the chip. In particular, the corner or center of the chip is less likely to be misaligned, so if these are set as the base point, it becomes easier to observe the base point.
[0024] In the grain extraction process, the grains of the metal film in the first reading area are observed using a micro-area observation device such as an optical microscope or SEM. Then, the three largest grains in size (diameter) are extracted and their position information is obtained. Note that when the metal film is subjected to heat treatment, the grain size tends to increase, and the larger the grain size, the easier it is to observe the grains.
[0025] In the second reading area specifying step, a second reading area for extracting unique information is specified based on a reference point defined by the positions of the three largest grains extracted in the grain extraction step. For example, as shown in FIG. 4, the center of gravity of a triangle having the positions of the three largest grains as its vertices may be set as the reference point for specifying the second reading area.
[0026] The second reading area is smaller than the first reading area in order to obtain a higher resolution image at a higher magnification than the first reading area when the second reading area is observed with an optical microscope, SEM, or the like in the classification process described below.
[0027] For example, when the second reading area is set in the center of the chip, there is a concern that the positional accuracy of the second reading area may decrease because the distance from the outer circumferential edge of the chip, which is the base point, to the second reading area is long. However, as in this embodiment, by setting the second reading area in two stages (first identifying the first reading area and then identifying the second reading area within that), the decrease in the positional accuracy of the second reading area is suppressed. The second reading area is identified based on the position of grains that exist randomly, which is physically random, so that the position can be identified with little positional deviation and high accuracy.
[0028] In the classification process, the size (diameter) of the grains in the second reading region is measured using an optical microscope, SEM, or the like, the distribution of grain sizes is obtained as shown in FIG. 5, and the grain sizes are classified based on the distribution. In this embodiment, the classification of grain sizes is performed in four stages, namely, class 0, class 1, class 2, and class 3, as shown in FIG. 5. More specifically, counting from the smallest size, grain sizes that fall within a range of less than 80% of the total number of grains are classified as class 0, grain sizes that fall within a range of 80% or more and less than 90% are classified as class 1, grain sizes that fall within a range of 90% or more and less than 95% are classified as class 2, and grain sizes that fall within a range of 95% or more are classified as class 3. The classification may be performed in three or less stages or five or more stages, but four stages are preferable from the viewpoint of processing speed and accuracy when classifying grains.
[0029] In the matrix generation process, as shown in Fig. 6, the second reading area is divided into a plurality of meshes, the class of the largest grain in each mesh (hereinafter referred to as the "maximum class") is extracted, and a matrix indicating the maximum class in each mesh is generated. In this embodiment, the second reading area is divided into 5 x 5 meshes. For example, when grains as shown in Fig. 6 are observed in the second reading area, a 5 x 5 matrix as shown in Fig. 7 is generated.
[0030] As can be seen from Figure 5, the grain size distribution has a long tail on the larger size side. In other words, there is a large variation in grain size in areas where the grain size is relatively large. Therefore, it is easy to classify grains in areas where the grain size is relatively large, and the above matrix is uniquely characterized for each chip. The matrix is created from the extraction results of the largest grain class (maximum class) in each mesh in order to take advantage of this characteristic.
[0031] The appropriate size of the mesh that divides the second reading area is considered to be any grain size of class 1 to 3. The size of the second reading area and the number of meshes are set appropriately according to the appropriate size of the mesh. In order to make it possible to uniquely identify each chip, it is desirable for the number of meshes that divide the second reading area to be 5 x 5 or more.
[0032] In the unique information generation process, the numbers in each row of the matrix created in the matrix generation process are arranged in a row to generate unique information for the chip, as shown in Figure 7. At this time, if an error correction code is added to the end of each row of the matrix to generate the unique information, the occurrence of data errors can be reduced.
[0033] In the database storage step, the chip-specific information generated in the specific information generation step and the chip information of the chip are linked to each other and recorded in the database. The chip information is, for example, a lot number, a wafer number, and coordinates within a wafer.
[0034] Next, a method for acquiring the unique information and chip information for each chip recorded in the database from the database will be described. The unique information and chip information for each chip recorded in the database can be acquired from the database at any timing, for example, during a test process for a semiconductor device before product shipment, or when a semiconductor device returns from a customer after being shipped as a product. At that time, in order to acquire chip information for a target chip (hereinafter, referred to as a "target chip"), it is necessary to compare the unique information of the target chip with the database. The matching of unique information includes a matching process and a chip information response process, which will be described below.
[0035] In the verification step, the unique information of the target chip is extracted in the same manner as in the generation of the unique information described above, and the unique information of the target chip is verified against the unique information stored in the database. In other words, it is confirmed whether the unique information recorded in the database matches the unique information of the target chip.
[0036] The chip information response process is performed when unique information matching the unique information of the target chip is recorded in the database. In the chip information response process, chip information (lot number, wafer number, coordinates within wafer, etc.) linked to the unique information matching the unique information of the target chip is read from the database and presented to the user.
[0037] 8 is a diagram showing the configuration of a semiconductor manufacturing apparatus 1 which is a manufacturing apparatus for a semiconductor device according to embodiment 1. The semiconductor manufacturing apparatus 1 includes a chip information recording unit 10, a database unit 20, and a chip information presenting unit 30.
[0038] The chip information recording unit 10 generates unique information of the chip of the semiconductor device to be manufactured, and links the generated unique information with the chip information of the chip, and records the information in the database unit 20. The database unit 20 is a recording medium for recording the unique information and chip information of the chip. The chip information presenting unit 30 reads the chip information of the target chip from the database unit 20 and presents it to the user. Note that a semiconductor manufacturing apparatus 1 having a similar configuration can also be applied to the second to fourth embodiments described below.
[0039] As shown in FIG. 8, the chip information recording unit 10 includes a first reading area specifying unit 11, a grain extracting unit 12, a second reading area specifying unit 13, and a unique information generating unit 14.
[0040] The first reading area specifying unit 11 performs the above-mentioned first reading area specifying step on a chip of a semiconductor device in the manufacturing process (hereinafter, referred to as a "manufactured chip"). That is, the first reading area specifying unit 11 specifies a first reading area on the manufactured chip.
[0041] The grain extraction unit 12 performs the above-mentioned grain extraction process on the manufactured chip. That is, the grain extraction unit 12 extracts the three grains with the largest size (diameter) from the first reading region of the manufactured chip, and obtains their position information.
[0042] The second reading region specifying unit 13 performs the above-mentioned second reading region specifying step on the manufactured chip. That is, the second reading region specifying unit 13 specifies the second reading region using the positions of the three large grains extracted by the grain extraction unit 12 as reference points.
[0043] The unique information generating unit 14 performs the above-mentioned classification process, matrix generating process, unique information generating process, and database saving process for the second reading area of the manufactured chip. That is, the unique information generating unit 14 performs classification of grain sizes in the second reading area, creates a matrix from the maximum grain size in each mesh of the second reading area, and generates unique information of the manufactured chip from the matrix. The unique information generating unit 14 also records the unique information of the manufactured chip and the chip information of the manufactured chip in the database unit 20 by linking them to each other.
[0044] As shown in FIG. 8, the chip information presenting unit 30 includes a collation unit 31 and a chip information response unit 32.
[0045] The collation unit 31 performs the above-mentioned collation process on the target chip. That is, the collation unit 31 extracts unique information of the target chip and compares the unique information of the target chip with the unique information stored in the database unit 20.
[0046] The chip information response unit 32 performs the above-mentioned chip information response step when unique information matching the unique information of the target chip is recorded in the database unit 20. That is, the chip information response unit 32 reads out the chip information linked to the unique information matching the unique information of the target chip from the database unit 20, and presents it to the user.
[0047] According to the technology of the first embodiment, it is possible to extract the unique information of a semiconductor device chip from an arbitrary position of a metal film of the chip. In addition, since it is not necessary to change the structure of the chip in order to extract the unique information, the manufacturing method is highly versatile and can be applied to existing semiconductor devices.
[0048] Moreover, in the technology according to the first embodiment, it is also possible to set multiple second reading areas on one chip, in which case the following effects can be expected. First, since the amount of unique information extracted from one chip can be increased, even if the number of manufactured chips increases, each chip can be uniquely identified. Also, even if a situation occurs in which grains cannot be measured in some second reading areas due to foreign matter or defects that occurred during the manufacturing process, unique information can be extracted from another second reading area. Note that when setting multiple second reading areas, multiple first reading areas may also be set.
[0049] In the present disclosure, the area from which the unique information is extracted is specified in two stages. That is, first, the first reading area is specified, then the second reading area is specified from within the first reading area, and the unique information is extracted from the second reading area. However, the area from which the unique information is extracted may be set in three or more stages. For example, first, the first reading area may be specified, then the second reading area may be specified from within the first reading area, then the third reading area may be specified from within the second reading area, and the unique information may be extracted from the third reading area. However, from the viewpoint of suppressing an increase in the number of processes, two stages are preferable.
[0050] <Embodiment 2> The positions of the first reading area and the second reading area are not limited to the opening of the passivation film. In the second embodiment, as shown in Figs. 9, 10 and 11, the first reading area is set in a part of the metal film covered with the passivation film. Although not shown, the second reading area is specified within the first reading area, so the second reading area is also set in a part of the metal film covered with the passivation film. Other than that, it is the same as the first embodiment.
[0051] Typically, the passivation film is a transparent or semi-transparent material, so that even if the first reading region and the second reading region are covered with the passivation film, the grains in the first reading region and the second reading region are observable.
[0052] The passivation film protects the chip and also protects the surface of the metal film. By protecting the chip with the passivation film, for example, in the sealing process in which the chip is sealed with a sealant such as resin or gel, the stress generated between the sealant and the metal film can be alleviated. At this time, if the semiconductor manufacturing equipment 1 and the second reading area are covered with the passivation film, the grains are prevented from being deformed by the stress, and the unique information can be prevented from being changed.
[0053] <Embodiment 3> In the third embodiment, the second reading area is set to include an end of the passivation film located on the metal film, as shown in Fig. 12. In this case, when the second reading area is viewed in plan, the boundary line between the passivation film and the metal film crosses the second reading area.
[0054] Moreover, in the third embodiment, the method of extracting the unique information from the second reading region is different from that in the first and second embodiments. In the present embodiment, as shown in Fig. 12, multiple intersections between the boundary line between the passivation film and the metal film that crosses the second reading region and the grain contour are extracted, and the values of the distances between the intersections are arranged and converted into numerical values to generate the unique information.
[0055] According to the third embodiment, by extracting the unique information using the boundary line on the chip, it is expected that the accuracy of extracting the unique information can be improved.
[0056] <Fourth embodiment> In the fourth embodiment, the method of extracting unique information from the second reading area is different from the first to third embodiments. In this embodiment, the second reading area is divided into a plurality of meshes, and as shown in Fig. 13, triple points (points that are boundaries between three grains) of grain boundaries present in the second reading area are extracted, and a matrix is generated as shown in Fig. 14 indicating the number of triple points in each mesh. Then, as shown in Fig. 14, the numbers in each row of the matrix created in the matrix generation process are arranged in a row to generate a numerical value as unique information of the chip.
[0057] Generally, when there are four or more junctions (points that are boundaries between four or more grains), the grain boundaries become complicated and difficult to detect from an image, but when there are three junctions, which is the minimum number of points that constitute a boundary, they are easy to detect from an image. In the fourth embodiment, unique information is extracted by detecting triple junctions of grain boundaries, so that improvement in the extraction accuracy of unique information can be expected.
[0058] In the above embodiment, an example was shown in which silicon was used as the material of the semiconductor substrate, but the semiconductor substrate is not limited to silicon, and may be a wide bandgap semiconductor having a larger bandgap than silicon, such as silicon carbide, gallium nitride-based materials, gallium oxide-based materials, diamond, etc. Switching elements and diode elements formed from wide bandgap semiconductors have high voltage resistance and allowable current density, so that the switching elements and diode elements can be miniaturized. When the size of a chip is small, putting a unique mark (pattern) on the chip reduces the effective area of the chip, so it is effective to apply the technology disclosed herein.
[0059] It should be noted that the embodiments can be freely combined, and each embodiment can be modified or omitted as appropriate.
[0060] <Additional Notes> Various aspects of the present disclosure are summarized below as appendices.
[0061] (Appendix 1) a first reading area specifying step of specifying a first reading area on a metal film of the semiconductor device based on a base point determined on the semiconductor device; a grain extraction step of extracting a predetermined number of grains starting from the largest grain in the first reading area; a second reading area specifying step of specifying a second reading area smaller than the first reading area based on a reference point defined from the positions of the predetermined number of grains extracted in the grain extraction step; generating unique information of the semiconductor device based on information extracted from the appearance of grains in the second reading area; A method for generating unique information of a semiconductor device comprising:
[0062] (Appendix 2) The step of generating unique information of the semiconductor device includes: a classification step of classifying the grains in the second reading area according to their sizes; a matrix generating step of dividing the second reading area into a plurality of meshes and generating a matrix indicating the class of the largest grain in each mesh; a unique information generating step of generating unique information of the semiconductor device from the matrix; Including, A method for generating unique information of the semiconductor device according to claim 1.
[0063] (Appendix 3) the step of generating the unique information of the semiconductor device includes a step of extracting a plurality of intersections between the boundary line and the grain contour line along the boundary line between the passivation film and the metal film crossing the second reading region, and generating the unique information of the semiconductor device based on the distance between each intersection point; A method for generating unique information of the semiconductor device according to claim 1.
[0064] (Appendix 4) The step of generating unique information of the semiconductor device includes: a matrix generating step of dividing the second reading area into a plurality of meshes, extracting triple points of grain boundaries present in the second reading area, and generating a matrix indicating the number of the triple points within each mesh; a unique information generating step of generating unique information of the semiconductor device from the matrix; Including, A method for generating unique information of the semiconductor device according to claim 1.
[0065] (Appendix 5) The first reading area is set within an area of the metal film covered with a passivation film. A method for generating unique information of a semiconductor device according to any one of claims 1 to 4.
[0066] (Appendix 6) A step of generating unique information of a semiconductor device by a method for generating unique information of a semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 5; a database storage step of storing the unique information of the semiconductor device in a database in association with chip information of the semiconductor device; A method for managing unique information of a semiconductor device comprising the steps of:
[0067] (Appendix 7) A step of generating unique information of a semiconductor device by the method for generating unique information of a semiconductor device according to any one of Supplementary Note 1 to Supplementary Note 5, and comparing the unique information with unique information stored in a database; a chip information response step of, when the unique information of the semiconductor device matches the unique information stored in the database, acquiring chip information associated with the unique information from the database and presenting the chip information to a user; A method for managing unique information of a semiconductor device comprising the steps of:
[0068] (Appendix 8) a first reading area specifying unit that specifies a first reading area on a metal film of a semiconductor device in the manufacturing process based on a base point determined on the semiconductor device in the manufacturing process; a grain extraction unit that extracts a predetermined number of grains starting from the largest grain in the first reading area; a second reading area specifying unit that specifies a second reading area smaller than the first reading area based on a reference point defined from positions of the predetermined number of grains extracted by the grain extraction unit; a unique information generating unit that generates unique information of the semiconductor device in the manufacturing process based on information extracted from the appearance of the grains in the second reading area; a database unit that stores the unique information of the semiconductor device in the manufacturing process in association with chip information of the semiconductor device in the manufacturing process; a comparison unit that generates unique information of the semiconductor device and compares the unique information with the unique information stored in the database unit; a chip information response unit that, when the unique information of the semiconductor device matches the unique information stored in the database unit, acquires chip information associated with the unique information from the database unit and presents the chip information to a user; A manufacturing apparatus for a semiconductor device comprising: [Explanation of symbols]
[0069] 1 semiconductor manufacturing equipment, 10 chip information recording unit, 11 first read area specifying unit, 12 grain extraction unit, 13 second read area specifying unit, 14 unique information generation unit, 20 database unit, 30 chip information presentation unit, 31 matching unit, 32 chip information response unit.
Claims
1. a first reading area specifying step of specifying a first reading area on a metal film of the semiconductor device based on a base point determined on the semiconductor device; a grain extraction step of extracting a predetermined number of grains starting from the largest grain in the first reading area; a second reading area specifying step of specifying a second reading area smaller than the first reading area based on a reference point defined from the positions of the predetermined number of grains extracted in the grain extraction step; generating unique information of the semiconductor device based on information extracted from the appearance of grains in the second reading area; A method for generating unique information of a semiconductor device comprising:
2. The step of generating unique information of the semiconductor device includes: a classification step of classifying grains in the second reading area according to size; a matrix generating step of dividing the second reading area into a plurality of meshes and generating a matrix indicating the class of the largest grain in each mesh; a unique information generating step of generating unique information of the semiconductor device from the matrix; Including, 2. The method for generating unique information of a semiconductor device according to claim 1.
3. the step of generating the unique information of the semiconductor device includes a step of extracting a plurality of intersections between the boundary line and the grain contour line along the boundary line between the passivation film and the metal film crossing the second reading region, and generating the unique information of the semiconductor device based on the distance between each intersection point; 2. The method for generating unique information of a semiconductor device according to claim 1.
4. The step of generating unique information of the semiconductor device includes: a matrix generating step of dividing the second reading area into a plurality of meshes, extracting triple points of grain boundaries present in the second reading area, and generating a matrix indicating the number of the triple points within each mesh; a unique information generating step of generating unique information of the semiconductor device from the matrix; Including, 2. The method for generating unique information of a semiconductor device according to claim 1.
5. the first reading area is set within an area of the metal film covered with a passivation film; The method for generating unique information of a semiconductor device according to claim 1 .
6. A step of generating unique information of a semiconductor device by the method for generating unique information of a semiconductor device according to any one of claims 1 to 4; a database storage step of storing the unique information of the semiconductor device in a database in association with chip information of the semiconductor device; A method for managing unique information of a semiconductor device comprising the steps of:
7. a comparison step of generating unique information of a semiconductor device by the method for generating unique information of a semiconductor device according to any one of claims 1 to 4 and comparing the generated unique information with unique information stored in a database; a chip information response step of, when the unique information of the semiconductor device matches the unique information stored in the database, acquiring chip information associated with the unique information from the database and presenting the chip information to a user; A method for managing unique information of a semiconductor device comprising the steps of:
8. a first reading area specifying unit that specifies a first reading area on a metal film of a semiconductor device in the manufacturing process based on a base point determined on the semiconductor device in the manufacturing process; a grain extraction unit that extracts a predetermined number of grains starting from the largest grain in the first reading area; a second reading area specifying unit that specifies a second reading area smaller than the first reading area based on a reference point defined from positions of the predetermined number of grains extracted by the grain extraction unit; a unique information generating unit that generates unique information of the semiconductor device in the manufacturing process based on information extracted from the appearance of the grains in the second reading area; a database unit that stores the unique information of the semiconductor device in the manufacturing process in association with chip information of the semiconductor device in the manufacturing process; a comparison unit that generates unique information of the semiconductor device and compares the unique information with the unique information stored in the database unit; a chip information response unit that, when the unique information of the semiconductor device matches the unique information stored in the database unit, acquires chip information associated with the unique information from the database unit and presents the chip information to a user; A manufacturing apparatus for a semiconductor device comprising: