Template matching prediction for video encoding and decoding

JP2024513657A5Active Publication Date: 2025-05-21INTERDIGITALCE PATENT HLDG SAS
View PDF 0 Cites 0 Cited by

Patent Information

Application Number
JP2023553015
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2021-06-29
Filing Date
2022-03-22
Publication Date
2025-05-21
Estimated Expiration
2042-03-22

AI Technical Summary

Technical Problem

Existing video compression technologies face challenges with template matching prediction due to varying numbers of comparisons per pixel based on block size, leading to increased complexity and limitations in parallel processing.

Method used

Implementing a fixed number of comparisons per pixel regardless of block size and modifying the search range to allow parallel processing, such as wavefront parallel processing, while limiting the search range to reconstructed frame parts.

Benefits of technology

This approach reduces complexity and enables efficient parallel processing, enhancing coding efficiency and reducing bottlenecks in video encoding and decoding processes.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure 00000000_0000_ABST
    Figure 00000000_0000_ABST
Patent Text Reader

Abstract

A method, apparatus, or system for processing video information may involve determining a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the decoded picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block, and decoding / encoding the current block based on the predictive block.
Need to check novelty before this filing date? Find Prior Art

Description

[Technical field]

[0001] TECHNICAL FIELD This disclosure relates to video compression. [Background technology]

[0002] To achieve high compression efficiency, image and video coding schemes typically employ prediction and transformation to exploit spatial and temporal redundancy in video content. Typically, intra- or inter-prediction is used to exploit intra- or inter-frame correlation. The difference between the original and predicted picture blocks, often denoted as prediction error or prediction residual, is transformed, quantized, and entropy coded. To reconstruct the video, the compressed data is decoded by an inverse process corresponding to entropy coding, quantization, transformation, and prediction. Summary of the Invention

[0003] In general, at least one example embodiment involves a method or apparatus for video encoding or decoding, the method or apparatus including providing an intra-prediction processing mode employing template matching prediction based on a search range determined as described herein.

[0004] At least one example of an embodiment may involve a method or apparatus for video encoding or decoding, the method or apparatus including providing an intra-prediction processing mode that employs template matching prediction based on a template search having a fixed number of comparisons per pixel, regardless of block dimension.

[0005] At least one example of an embodiment may involve a method or apparatus for video encoding or decoding, the method or apparatus including providing an intra-prediction processing mode that employs template matching prediction based on a template search having a fixed number of comparisons per pixel, regardless of block dimension, and modifying the search range to enable parallel processing.

[0006] At least one example of an embodiment may involve an apparatus that includes one or more processors configured to determine a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the decoded picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block, and decoding the current block based on the predictive block.

[0007] At least one example of an embodiment may involve a method that includes determining a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the decoded picture information, where the comparison is based on a fixed number of comparisons per pixel regardless of the size of the current block, and decoding the current block based on the predictive block.

[0008] At least one example of an embodiment may involve an apparatus that includes one or more processors configured to determine a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the reconstructed picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block, and encoding the current block based on the predictive block.

[0009] At least one example of an embodiment may involve a method including: one or more processors configured to determine a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the reconstructed picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block; and encoding the current block based on the predictive block.

[0010] According to another general aspect of at least one embodiment, a device is provided that includes an apparatus according to any of the decoding embodiments and at least one of: (i) an antenna configured to receive a signal, the signal including a video block; (ii) a band limiter configured to limit the received signal to a frequency band including the video block; or (iii) a display configured to display an output representing the video block.

[0011] According to another general aspect of at least one embodiment, a non-transitory computer-readable medium is provided that includes data content generated according to any of the described decoding embodiments or variations.

[0012] According to another general aspect of at least one embodiment, there is provided a computer program product storing program instructions suitable for implementing one or more embodiments of the methods described herein when executed by a processor.

[0013] According to another general aspect of at least one embodiment, there is provided a signal including video data generated according to any of the described encoding embodiments or variations.

[0014] According to another general aspect of at least one embodiment, a bitstream is formatted to include data content generated according to any of the described decoding embodiments or variations.

[0015] The following presents a simplified summary of the present embodiments in order to provide a basic understanding of some aspects of the present disclosure. This summary is not an extensive overview of the subject matter. It is not intended to identify key / critical elements of the embodiments or to delineate the scope of the subject matter. The following summary merely presents some aspects of the present principles in a simplified form as a prelude to the more detailed description provided below. [Brief description of the drawings]

[0016] The present disclosure may be better understood from the consideration of the following detailed description in conjunction with the accompanying drawings.

[0017] [Figure 1] FIG. 1 illustrates, in block diagram form, an example embodiment of an encoder, e.g., a video encoder, suitable for implementing various aspects, features, and embodiments described herein. [Diagram 2] FIG. 1 illustrates, in block diagram form, an example embodiment of a decoder, e.g., a video decoder, suitable for implementing various aspects, features and embodiments described herein. [Diagram 3]FIG. 1 is a diagram illustrating intra-prediction modes in Versatile Video Coding (VVC) and the like. [Figure 4] FIG. 1 is a diagram showing an example of template matching prediction (TMP). [Diagram 5] FIG. 1 illustrates an example of parallel processing, such as wave-front parallel processing (WPP), in video coding. [Figure 6] FIG. 1 illustrates an example of at least one embodiment that may generally involve a TMP having a single search region. [Figure 7] FIG. 1 illustrates generally an example of at least one embodiment that may involve a TMP having multiple search regions. [Figure 8] FIG. 1 illustrates an example of at least one embodiment that may involve a TMP having a relatively small search range (wherein not all pixels in the current coding tree unit (CTU) may be used). [Figure 9] FIG. 1 illustrates generally an example of at least one embodiment that may involve a TMP with wavefront parallel processing (WPP). [Figure 10] A diagram showing an example of at least one embodiment that may generally involve a TMP having a search range limited to a current CTU line to enable independent CTU line decoding. [Figure 11] FIG. 1 illustrates an example of at least one embodiment that may generally involve a TMP having an upper template that is ignored if it crosses the CTU line. [Figure 12] FIG. 1 illustrates in block diagram form an example of an embodiment of an apparatus or device or system suitable for implementing one or more embodiments, aspects, or features of the present disclosure. [Figure 13] FIG. 1 illustrates an example of at least one embodiment in accordance with the present disclosure. [Figure 14]FIG. 1 illustrates an example of at least one embodiment in accordance with the present disclosure. [Figure 15] FIG. 1 illustrates an example of at least one embodiment in accordance with the present disclosure.

[0018] It should be understood that the drawings are intended to illustrate examples of various aspects, features, and embodiments according to the disclosure, and are not necessarily the only possible configurations. Like reference characters refer to the same or similar features throughout the various views. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] As described in more detail below, the video codec may involve an intra-prediction processing mode. An example of intra-prediction may employ a template matching prediction process. Template matching prediction may be based on a template search in a particular region. At least one example of the embodiments described herein may involve template matching prediction having a fixed number of comparisons per pixel. The fixed number of comparisons per pixel may be performed regardless of block dimensions. In at least one other embodiment, template matching prediction may involve a fixed number of comparisons regardless of block dimensions and modifying the search range to allow for parallel processing.

[0020] One example of a video coding approach is that provided by High Efficiency Video Coding (HEVC). More recent additions to video compression techniques include various versions of reference software and / or documentation known as the Joint Exploration Model (JEM) being developed by the Joint Video Exploration Team (JVET) as part of the development of a new video coding standard known as Versatile Video Coding (VVC). The goal of the JEM is to provide further improvements to the existing High Efficiency Video Coding (HEVC) standard, e.g., increased coding efficiency, reduced complexity, etc.

[0021] For ease of explanation, one or more aspects and / or examples of embodiments and / or implementations of features described herein may be described in the context of a particular standard, such as VVC. However, reference to VVC or any other particular standard is not intended to, and does not, limit the scope of potential application of various embodiments and features described herein.

[0022] Turning now to the figures, FIG. 1 illustrates an example of a video encoder 100, such as a High Efficiency Video Coding (HEVC) encoder. Variations of this encoder 100 are possible. However, for clarity, the encoder 100 is described below without describing all possible variations. For example, FIG. 1 may also illustrate an encoder that has improvements made to the HEVC standard, or that employs techniques similar to HEVC, such as the Joint Search Model (JEM) encoder, which is being developed by the Joint Video Search Team (JVET) as part of the development of a new video coding standard known as Versatile Video Coding (VVC).

[0023] Before being encoded, a video sequence may undergo pre-encoding processing (101), such as applying a color transformation to the input color picture (e.g., from RGB 4:4:4 to YCbCr 4:2:0) or performing a remapping of the input picture components to obtain a signal distribution that is more resilient to compression (e.g., using histogram equalization of one of the color components). Metadata may be associated with the pre-processing and added to the bitstream.

[0024] In HEVC, to encode a video sequence having one or more pictures, a picture is partitioned (102) into one or more slices, and each slice may include one or more slice segments. The slice segments are organized into coding units, prediction units, and transform units. The HEVC specification distinguishes between "blocks" and "units," where a "block" refers to a specific area of ​​a sample array (e.g., luma, Y), and a "unit" includes a collocated block of all encoded color components (Y, Cb, Cr, or monochrome), syntax elements, and prediction data (e.g., motion vectors) associated with the block.

[0025] For coding in HEVC, a picture is partitioned into square coding tree blocks (CTBs) with configurable size, and a set of consecutive coding tree blocks is grouped into a slice. A coding tree unit (CTU) contains the CTBs of an encoded color component. The CTB is the root of the quadtree partitioning into coding blocks (CBs), which may be partitioned into one or more prediction blocks (PBs), forming the root of the quadtree partitioning into transform blocks (TBs). Corresponding to the coding blocks, prediction blocks, and transform blocks, a coding unit (CU) contains a prediction unit (PU) and a tree-structured set of transform units (TUs), where a PU contains prediction information for all color components, and a TU contains residual coding syntax structures for each color component. The sizes of CB, PB, and TB for the luma component are applied to the corresponding CU, PU, ​​and TU. An illustration of the division of coding tree units (CTUs) in HEVC into coding units (CUs), prediction units (PUs) and transform units (TUs) is shown in FIG.

[0026] In JEM, a Quadtree plus Binary Tree (QTBT) structure removes the concept of multiple partition types in HEVC, i.e., the distinction between CU, PU and TU concepts. Coding Tree Units (CTUs) are first partitioned by a Quadtree structure. The leaf nodes of the Quadtree are further partitioned by a Binary Tree structure. The leaf nodes of the Binary Tree are called Coding Units (CUs) and are used for prediction and transformation without further partitioning. Therefore, CUs, PUs and TUs have the same block size in the new coding QTBT block structure. In JEM, a CU consists of blocks of different color components, i.e., coding blocks (CBs).

[0027] In this application, the term "block" may be used to refer to any of, for example, CTU, CU, PU, ​​TU, CB, PB, and TB. In addition, "block" may also be used to refer to macroblocks and partitions as specified in H.264 / AVC or other video coding standards, and more broadly to arrays of data of various sizes.

[0028] In the encoder 100, a picture is coded by the encoder elements as described below. The picture to be coded is divided (102) into units, e.g., CUs, and processed. Each unit is coded, e.g., using either intra mode or inter mode. When a unit is coded in intra mode, it performs intra prediction (160). In inter mode, motion estimation (175) and motion compensation (170) are performed. The encoder decides (105) whether to use intra mode or inter mode to code the unit, and indicates the intra / inter decision, e.g., by a prediction mode flag. A prediction residual is calculated (110), e.g., by subtracting the predicted block from the original image block.

[0029] The prediction residual is then transformed (125) and quantized (130). The quantized transform coefficients, as well as the motion vectors and other syntax elements, are entropy coded (145) to output a bitstream. The encoder can skip the transform and apply quantization directly to the untransformed residual signal. The encoder can bypass both the transform and quantization, i.e., the residual is directly coded without applying a transform or quantization process.

[0030] The encoder decodes the coded block to provide a reference for further prediction. The quantized transform coefficients are dequantized (140) and inverse transformed (150) to decode the prediction residual. The decoded prediction residual is combined (155) with the prediction block to reconstruct an image block. An in-loop filter (165) is applied to the reconstructed picture to perform, for example, deblocking / Sample Adaptive Offset (SAO) filtering to reduce coding artifacts. The filtered image is stored in a reference picture buffer (180).

[0031] Figure 2 shows a block diagram of a video decoder 200. In the decoder 200, the bitstream is decoded by decoder elements as described below. The video decoder 200 generally performs a decoding path as opposed to the encoding path as described in Figure 1. The encoder 100 also generally performs video decoding as part of encoding the video data.

[0032] In particular, the decoder's input includes a video bitstream, which may be generated by the video encoder 100. The bitstream is first entropy decoded (230) to obtain transform coefficients, motion vectors, and other coding information. Picture partition information indicates how the picture is partitioned. The decoder may then partition the picture according to the decoded picture partition information (235). The transform coefficients are inverse quantized (240) and inverse transformed (250) to decode the prediction residual. The decoded prediction residual and the predicted block are combined (255) to reconstruct an image block. A prediction block can be obtained (270) from intra prediction (260) or motion compensated prediction (i.e., inter prediction) (275). An in-loop filter (265) is applied to the reconstructed image. The filtered image is stored in a reference picture buffer (280).

[0033] The decoded picture may further undergo post-decoding processing (285), such as an inverse color conversion (e.g., from YCbCr 4:2:0 to RGB 4:4:4) or inverse remapping that performs the inverse of the remapping process performed in the pre-encoding processing (101). The post-decoding processing may use metadata derived in the pre-encoding processing and signaled in the bitstream.

[0034] As mentioned above, in the HEVC video compression standard, a picture is divided into so-called coding tree units (CTUs), each CTU being represented by a coding unit (CU) in the compressed domain. Each CU is then given some intra- or inter-prediction parameters (prediction information). To do so, it is spatially partitioned into one or more prediction units (PUs), each of which is assigned some prediction information. An intra- or inter-coding mode is assigned to the CU level. Intra- or inter-prediction is used to exploit intra- or inter-frame correlation. The difference between the original and predicted block, often denoted as prediction error or prediction residual, is transformed, quantized and entropy coded in a transform block (TB). To reconstruct the video, the compressed data is decoded by the inverse process corresponding to entropy coding, quantization, transformation and prediction.

[0035] Intra-picture prediction is a fundamental part of image and video compression. Traditionally, a prediction signal is generated by or from L-shaped reconstructed pixels (reference samples) on the left and / or above the current block or coding unit. During intra-prediction, reference samples are obtained based on assuming them along different angles. This mechanism is known as angle prediction. Video codecs such as VVC provide 65 intra-prediction modes, including 63 angles as well as DC prediction and planar prediction, as shown in Figure 3.

[0036] Traditional intra prediction in VVC is augmented with several tools. - Cross-component linear model (CCLM): A chroma prediction block is generated by a linear model of the luma reconstructed samples. -Multi-reference line prediction (MRL): Generates a prediction block using more reference samples. - Intra sub-partitioning (ISP): A prediction block is separated into four sub-blocks that share the same prediction mode. - Matrix weighted intra prediction (MIP): A prediction block is generated by multiplying a reference sample by some offline optimized prediction matrix. - Intra block copy (IBC): A prediction block is generated by copying another block from an already reconstructed image part, and a displacement vector is signaled in the bitstream.

[0037] The residual block is transformed with another mode of the core transform DCT-II or a combination of DCT-VII and DCT-VIII known as multiple transform selection (MTS). The transformed block can be further transformed using a secondary non-separable transform to further compress the residual block. This process is called low-frequency non-separable transform (LFNST).

[0038] Template Matching Prediction (TMP) is yet another powerful intra-prediction mode that is not included in VVC. It is performed by searching one or more similar L-shaped neighborhoods (called "templates") to find one or more target or candidate blocks for prediction. This is shown in Figure 4. When TMP is used, the current template is formed by the reconstructed L-shaped neighborhood. Similar templates that have small differences with the current template are found. Blocks that belong to these templates (target blocks) are used to generate a prediction signal, either by averaging them or by considering only those with the smallest template differences.

[0039] Integrating TMP into video codecs such as VVC requires good interoperability with existing intra tools, i.e. -Interaction with ISP, MIP and MRL -Interaction with conversion tools (MTS, LFNST, implicit MTS) - Interaction with combined inter and-intra prediction (CIIP)

[0040] In general, at least one example embodiment described in this specification addresses these interactions and enables this mode while providing an acceptable complexity / rate distortion (RD) performance tradeoff, for example, for subsequent profiles of VVC or for new codecs.

[0041] One problem that can be associated with implementing TPM arises from the number of comparisons per pixel: for a given search range, the number of comparisons for small blocks is much higher than the number of comparisons for large blocks. This increases the complexity for small blocks and can become a bottleneck in the coding process.

[0042] Another issue may be that the TMP may perform a template search that does not allow parallel processing. That is, wavefront parallel processing (WPP) requires that the decoding process of a CTU be independent of the right-most CTU and subsequent CTUs. This is illustrated in Figure 5. That is, each CTU in a given CTU line decode ("thread" in Figure 5) can be decoded if the right-most CTU of the previous thread / line decode has been decoded. This limits the search range to within the reconstructed part.

[0043] In general, at least one example of the embodiments described herein may involve the following. defining some number of comparisons per pixel, independent of or independent of the block size, e.g. a fixed or maximum number of comparisons per pixel, and / or - Defining the search scope so that parallel processing can be performed, for example limiting the search scope to the reconstructed frame portion.

[0044] An example embodiment with some number of comparisons per pixel, such as a fixed number of comparisons or a maximum number of comparisons, may provide a single search area. As an example, the search range may be within a single area or may be limited to a single area. An example embodiment may involve a single search area located at the top left corner of the current block (CU / PU). This provides for avoidance of accessing pixels that have not been decoded in the current CTU. This search area is shown in FIG. 6.

[0045] In an example embodiment, a certain number of comparisons may be determined based on or corresponding to a search area. For example, for a search area of ​​width "search_w" and height "search_h", a search_w x search_ comparison is performed to select the best matching block. That is, in the example described, the number of comparisons per pixel (CompPerPixel) is calculated as follows:

[0046]

number

[0047] In order to fix CompPerPixel, search_w / blk_w and search_h / blk_h must be fixed.

[0048]

number

[0049] At least one other example of the embodiment may involve multiple search regions or search areas. Multiple search regions may possibly provide higher coding gain. An example of the embodiment of multiple search regions may involve a search based on a region or area including one or more of the reconstructed pixels of the upper right and upper left CTUs in addition to the reconstructed pixels with the current CTU. Figure 7 shows an example of multiple search regions. In the example of Figure 7, four regions are defined as follows: R1: In the current CTU, start from the current position to the top left R2: top left pixel R3: top right pixel R4 Left pixel

[0050] Each search area is defined by a search range width (search_w) and a search range height (search_h). The total comparisons per pixel are calculated as follows:

[0051]

number

[0052] As in the single search area case, to have a fixed CompPerPixel, search_w / blk_w and search_h / blk_h must be fixed.

[0053]

number

[0054] For a small search range, an example embodiment can be based on less than all pixels in the current CTU being used, i.e., less than all, or a portion, or a subset of the pixels in the current CTU are used. This is illustrated by the example embodiment shown in FIG.

[0055] Generally, at least one other example of the embodiment may involve template matching prediction based on providing or enabling parallel processing such as wavefront parallel processing (WPP). In at least one example of the embodiment, to enable wavefront parallel processing (WPP), the search range shall be limited so as not to access pixels beyond the upper right CTU of each CTU line. That is, if pixels are not immediately available, they should not be used. Figure 9 shows an example of the embodiment, where CTUs that can be used for the TMP search are shown as shaded, and the current block is located inside the CTU that is white and unshaded.

[0056] Generally, at least one other example of the embodiment may involve independent CTU lines. For example, for many real-time coding processes, it may be desirable for each CTU line to be independently decodable. That is, there is no dependency between the current CTU line and the upper line. To enable the TMP and have independent CTU lines, the search range may be reduced, controlled, or determined to limit, not allow, or disable access to the upper CTU line, as illustrated by the example shown in FIG. 10.

[0057] Furthermore, in at least one other example of an embodiment, only the left template is considered if the template is beyond the current CTU line, which occurs when the vertical position of the current block is the same as the CTU, as shown in Figure 11. In this case, the top template is not used to find the best candidate, and only the left template is used.

[0058] At least one other example of the embodiment involves a template that is a partial template. For example, when coding a CU in the first line or the first column, the top or left template is not available, respectively. This is illustrated in FIG. 14 and FIG. 15. In this case, a partial template is used for template matching prediction. In other words, if the reference template crosses or extends beyond the frame boundary, the partial template that is within the frame is considered. FIG. 14 illustrates an example of an embodiment where the top template is not available. In the example of FIG. 14, only the left template is used for template matching prediction. That is, the template of the current block includes only the first area on the left side of the current block, i.e., the first left template on the left side of the current block, and the template associated with the second block used for comparison with the template of the current block includes only the second area on the left side of the second block, i.e., the second left template on the left side of the second block. Thus, the comparison is based only on the first and second areas on the left side of the corresponding blocks, i.e., the first and second left templates. FIG. 15 illustrates an example where the left template is not available. In the example of FIG. 15, only the top template is used for template matching prediction. That is, the template of the current block includes only the first area above the current block, i.e. the first top template above the current block, and the template associated with the second block used for comparison with the template of the current block includes only the second area above the second block, i.e. the second top template above the second block. Thus, the comparison is based only on the first and second areas above the corresponding blocks, i.e. the first and second top templates.

[0059] Another example of an embodiment involves a special case where both the top and left templates are beyond the frame boundary, and therefore neither the top nor the left template is available. For example, this special case may occur when coding the first CU in the current frame. In this case, the prediction is considered as DC prediction, where the predicted value is set as follows:

[0060]

number

[0061] Generally, the example embodiments described and contemplated herein may be implemented in many different forms. Although Figures 1 and 2 above and Figure 12 described below provide some example embodiments, other embodiments are contemplated, and the description of Figures 1, 2, and 12 does not limit the scope of implementations. For example, at least one aspect of one or more example embodiments described herein generally relates to video encoding and decoding, and at least one other aspect generally relates to transmitting a generated or encoded bitstream. These and other aspects may be implemented in various embodiments, including, for example, a method, an apparatus, a computer-readable storage medium having stored thereon instructions for encoding or decoding video data according to any of the described methods, and / or a computer-readable storage medium having stored thereon a bitstream generated according to any of the described methods. In addition, it should be understood that the drawings provided herein, and the selection of sentences or syntax provided herein that may relate to industry standards or standard-related documents, are intended to illustrate examples of various aspects and embodiments, and are not necessarily the only possible configurations. Also, the application may use the terms "reconstructed" and "decoded" interchangeably, the terms "pixel" and "sample" interchangeably, and the terms "image," "picture," and "frame" interchangeably. Various methods are described herein, each of which includes one or more steps or actions for achieving the described method. Unless a specific order of steps or actions is required for proper operation of the method, the order and / or use of specific steps and / or actions may be modified or combined.Various methods and other aspects described in the present application may be used to modify modules such as, for example, module 160 in the example embodiment 100 of the video encoder shown in FIG. 1 and module 260 in the example embodiment 200 of the video decoder shown in FIG. 2. Furthermore, various embodiments, features, etc. described herein are not limited to VVC or HEVC, but may be applied to, for example, other standards and recommendations, whether existing or developed in the future, and any extensions of such standards and recommendations (including VVC and HEVC). Unless otherwise specified or technically precluded, aspects described in the present application may be used individually or in combination. Various numerical values ​​are used in the present application, such as, for example, the size of the maximum quantization matrix, the number of block sizes considered, etc. The specific values ​​are for illustrative purposes, and the described aspects are not limited to these specific values.

[0062] FIG. 12 illustrates a block diagram of an example system in which various features and embodiments are implemented. The system 1000 of FIG. 12 may be embodied as a device including various components described below and configured to execute or implement one or more of the example embodiments, features, etc. described herein. Examples of such devices include, but are not limited to, various electronic devices such as personal computers, laptop computers, smartphones, tablet computers, digital multimedia set-top boxes, digital television receivers, personal video recording systems, connected appliances, and servers. The elements of the system 1000, alone or in combination, may be embodied in a single integrated circuit (IC), multiple ICs, and / or separate components. For example, in at least one embodiment, the processing elements and encoder / decoder elements of the system 1000 are distributed across multiple ICs and / or separate components. In various embodiments, the system 1000 is communicatively coupled to one or more other systems or other electronic devices, for example, via a communication bus or through dedicated input and / or output ports. Generally, the system 1000 is configured to implement one or more of the example embodiments, features, etc. described herein.

[0063] The system 1000 includes at least one processor 1010 configured to execute instructions loaded thereon, for example to implement various aspects described herein. The processor 1010 may include embedded memory, input / output interfaces, and various other circuitry known in the art. The system 1000 includes at least one memory 1020 (e.g., a volatile memory device and / or a non-volatile memory device). System 1000 includes storage device(s) 1040, which may include non-volatile and / or volatile memory, including, but not limited to, Electrically Erasable Programmable Read-Only Memory (EEPROM), Read-Only Memory (ROM), Programmable Read-Only Memory (PROM), Random Access Memory (RAM), Dynamic Random Access Memory (DRAM), Static Random Access Memory (SRAM), Flash, magnetic disk drives, and / or optical disk drives. Storage device(s) 1040 may include, by way of non-limiting example, internal storage devices, attached storage devices (including removable and non-removable storage devices), and / or network-accessible storage devices.

[0064] The system 1000 includes an encoder / decoder module 1030 configured to process data to provide, for example, encoded or decoded video, and the encoder / decoder module 1030 may include its own processor and memory. The encoder / decoder module 1030 represents a module that may be included in a device for performing encoding and / or decoding functions. As is known, a device may include one or both of an encoding module and a decoding module. Furthermore, the encoder / decoder module 1030 may be implemented as a separate element of the system 1000, or may be incorporated within the processor 1010 as a combination of hardware and software, as is known to those skilled in the art.

[0065] For example, program code to be loaded into the processor 1010 or the encoder / decoder 1030 to perform or implement one or more example embodiments, features, etc. described herein may be stored in the storage device 1040 and then loaded into the memory 1020 for execution by the processor 1010. According to various embodiments, one or more of the processor 1010, the memory 1020, the storage device 1040, and the encoder / decoder module 1030 may store one or more of various items during execution of the processes described herein. Such stored items may include, but are not limited to, input video, decoded video or portions of decoded video, bitstreams, matrices, variables, and intermediate or final results from processing of equations, expressions, operations, and operational logic.

[0066] In some embodiments, memory internal to the processor 1010 and / or the encoder / decoder module 1030 is used to store instructions and provide working memory for processing required during encoding or decoding. However, in other embodiments, memory external to the processing device (e.g., the processing device can be either the processor 1010 or the encoder / decoder module 1030) is used for one or more of these functions. The external memory can be the memory 1020 and / or the storage device 1040, e.g., dynamic volatile memory and / or non-volatile flash memory. In some embodiments, the external non-volatile flash memory is used to store, for example, the operating system of the television. In at least one embodiment, a high-speed external dynamic volatile memory such as a RAM is used as working memory for video coding and decoding operations such as MPEG-2 (MPEG refers to the Moving Picture Experts Group, MPEG-2 is also referred to as ISO / IEC 13818, 13818-1 is also known as H.222, and 13818-2 is also known as H.262), HEVC (HEVC refers to High Efficiency Video Coding, also known as H.265 and MPEG-H Part 2), or VVC (Versatile Video Coding, a new standard being developed by JVET (the Joint Video Experts Team)).

[0067] Inputs to the elements of system 1000 may be provided through a variety of input devices as shown in block 1130. Such input devices may include, but are not limited to, (i) a Radio Frequency (RF) section that receives, for example, an RF signal transmitted throughout a broadcast by a broadcaster, (ii) a component (COMP) input terminal (or set of COMP input terminals), (iii) a Universal Serial Bus (USB) input terminal, and / or (iv) a High Definition Multimedia Interface (HDMI) input terminal. Although not shown in FIG. 3, other examples include composite video.

[0068] In various embodiments, the input devices of block 1130 have associated respective input processing elements as known in the art. For example, the RF section may be associated with elements suitable for: (i) selecting a desired frequency (also referred to as selecting a signal or band-limiting a signal to a band of frequencies); (ii) down-converting the selected signal; (iii) band-limiting again to a narrower band of frequencies to select a signal frequency band, which may be referred to as a channel in a particular embodiment (for example); (iv) demodulating the down-converted band-limited signal; (v) performing error correction; and (vi) demultiplexing to select a desired stream of data packets. The RF section of various embodiments includes one or more elements that perform these functions, such as a frequency selector, a signal selector, a band limiter, a channel selector, a filter, a down-converter, a demodulator, an error corrector, and a demultiplexer. The RF section may include a tuner that performs various of these functions, including, for example, down-converting a received signal to a lower frequency (e.g., an intermediate frequency or a near-baseband frequency) or to baseband. In one embodiment of a set-top box, the RF section and its associated input processing elements receive RF signals transmitted over a wired (e.g., cable) medium and perform frequency selection by filtering, downconverting, and refiltering to a desired frequency band. Various embodiments rearrange the order of the above-described (and other) elements, remove some of these elements, and / or add other elements that perform similar or different functions. Adding elements may include inserting elements between existing elements, such as, for example, inserting amplifiers and analog-to-digital converters. In various embodiments, the RF section includes an antenna.

[0069] Additionally, the USB and / or HDMI terminals may include respective interface processors for connecting the system 1000 to other electronic devices via USB and / or HDMI connections. It should be understood that various aspects of the input processing, e.g., Reed-Solomon error correction, may be implemented, for example, in a separate input processing IC or within the processor 1010, as desired. Similarly, aspects of the USB or HDMI interface processing may be implemented, as desired, in a separate interface IC or within the processor 1010. For example, the processor 1010 and various processing elements, including an encoder / decoder 1030 operating in combination with memory and storage elements, provide a demodulated, error corrected, and demultiplexed stream to process the data stream as required for presentation on an output device.

[0070] The various elements of the system 1000 may be provided within an integrated housing in which the various elements may be interconnected and data transmitted between them using suitable connection devices 1140, such as internal buses known in the art, including inter-IC (I2C) buses, wiring, and printed circuit boards.

[0071] The system 1000 includes a communication interface 1050 that enables communication with other devices over a communication channel 1060. The communication interface 1050 may include, but is not limited to, a transceiver configured to transmit and receive data over the communication channel 1060. The communication interface 1050 may include, but is not limited to, a modem or a network card, and the communication channel 1060 may be implemented, for example, in a wired medium and / or a wireless medium.

[0072] Data is streamed or otherwise provided to the system 1000 in various embodiments using a wireless network such as a Wi-Fi network, e.g., IEEE 802.11 (IEEE refers to the Institute of Electrical and Electronics Engineers). The Wi-Fi signal in these embodiments is received by a communication channel 1060 and a communication interface 1050 adapted for Wi-Fi communication. The communication channel 1060 in these embodiments is typically connected to an access point or router that provides access to external networks, including the Internet, to enable streaming applications and other over-the-top communications. In other embodiments, the streamed data is provided to the system 1000 using a set-top box that delivers data through an HDMI connection of the input block 1130. In yet other embodiments, the streamed data is provided to the system 1000 using an RF connection of the input block 1130. As indicated above, various embodiments provide data in a non-streaming manner. Additionally, various embodiments use wireless networks other than Wi-Fi, e.g., a cellular network or a Bluetooth network.

[0073] The system 1000 can provide output signals to various output devices, including a display 1100, speakers 1110, and other peripheral devices 1120. The display 1100 of various embodiments includes, for example, one or more of a touch screen display, an organic light-emitting diode (OLED) display, a curved display, and / or a foldable display. The display 1100 can be for a television, a tablet, a laptop, a mobile phone, or other device. The display 1100 can also be integrated with other components (e.g., as in a smartphone) or can be separate (e.g., an external monitor for a laptop). In various example embodiments, the other peripheral devices 1120 include one or more of a standalone digital video disc (or digital versatile disc) (for both terms, a DVR), a disc player, a stereo system, and / or a lighting system. Various embodiments use one or more peripheral devices 1120 that provide functionality based on the output of the system 1000. For example, a disc player performs the function of playing the output of the system 1000 .

[0074] In various embodiments, control signals are communicated between the system 1000 and the display 1100, speaker 1110, or other peripheral devices 1120 using signal transmission such as AV.Link, Consumer Electronics Control (CEC), or other communication protocols that allow control between devices with or without user intervention. The output devices can be communicatively coupled to the system 1000 via dedicated connections through respective interfaces 1070, 1080, and 1090. Alternatively, the output devices can be connected to the system 1000 via the communication interface 1050 using the communication channel 1060. The display 1100 and speaker 1110 can be integrated into a single unit with other components of the system 1000 in an electronic device such as a television. In various embodiments, the display interface 1070 includes a display driver, such as a timing controller (T Con) chip.

[0075] For example, if the RF portion of input 1130 is part of a separate set-top box, display 1100 and speakers 1110 may alternatively be separate from one or more of the other components. In various embodiments where display 1100 and speakers 1110 are external components, the output signal may be provided via a dedicated output connection including, for example, an HDMI port, a USB port, or a COMP output.

[0076] The embodiments may be performed by computer software implemented by the processor 1010, or by hardware, or by a combination of hardware and software. As a non-limiting example, the embodiments may be implemented by one or more integrated circuits. The memory 1020 may be of any type suitable for the technology environment and may be implemented using a suitable data storage technology, non-limiting examples of which include optical memory devices, magnetic memory devices, semiconductor-based memory devices, fixed memories, and rib-bubble memories. The processor 1010 may be of any type suitable for the technology environment and may include, as non-limiting examples, one or more of a microprocessor, a general-purpose computer, a special-purpose computer, and a processor based on a multi-core architecture.

[0077] FIG. 13 provides another example of an embodiment. In FIG. 13, a predictive block for a current block of picture information is determined at 1310. The determination at 1310 is based on a comparison of a template associated with the current block (e.g., an L-shaped template such as that shown in FIG. 4 having a first portion on the left side of the current block and a second portion on the top side of the current block) with at least one other template associated with at least one other block in the area of ​​the decoded or reconstructed picture information. The comparison may include searching for one or more templates in the area of ​​the decoded or reconstructed picture information that match or are a closest match to the template of the current block. The comparison may be based on a fixed number of comparisons per pixel, regardless of block size, for example, as described herein with respect to FIG. 6 or FIG. 7. The predictive block is generated using one or more blocks associated with the one or more templates determined from the comparison. At 1320, the current block is decoded (or encoded) based on the predictive block.

[0078] In addition to the example embodiments described herein, various specialized as well as generalized embodiments are also supported and contemplated throughout the disclosure. Example embodiments according to the present disclosure include, but are not limited to, the following:

[0079] In general, at least one example embodiment involves a method or apparatus for video encoding or decoding, the method or apparatus including providing an intra-prediction processing mode employing template matching prediction based on a search range determined as described herein.

[0080] At least one example of an embodiment may involve a method or apparatus for video encoding or decoding, the method or apparatus including providing an intra-prediction processing mode that employs template matching prediction based on a template search having a fixed number of comparisons per pixel, regardless of block dimension.

[0081] At least one example of an embodiment may involve a method or apparatus for video encoding or decoding, the method or apparatus including providing an intra-prediction processing mode that employs template matching prediction based on a template search having a fixed number of comparisons per pixel, regardless of block dimension, and modifying the search range to enable parallel processing.

[0082] At least one example of an embodiment may involve an apparatus that includes one or more processors configured to determine a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the decoded picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block, and decoding the current block based on the predictive block.

[0083] At least one example of an embodiment may involve a method that includes determining a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the decoded picture information, where the comparison is based on a fixed number of comparisons per pixel regardless of the size of the current block, and decoding the current block based on the predictive block.

[0084] At least one example of an embodiment may involve an apparatus that includes one or more processors configured to determine a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the reconstructed picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block, and encoding the current block based on the predictive block.

[0085] At least one example of an embodiment may involve a method including: one or more processors configured to determine a predictive block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​the reconstructed picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block; and encoding the current block based on the predictive block.

[0086] At least one example of an embodiment may involve a method or apparatus as described herein, where the constant number of comparisons per pixel is one of a fixed value or a value signaled through high level syntax information.

[0087] At least one example of an embodiment may involve a method or apparatus as described herein, where the area from which the at least one other template occurs includes an area above and to the left of the current block.

[0088] At least one example of an embodiment may involve a method or apparatus as described herein, where the area from which the at least one other template occurs includes a plurality of regions, including a first region including pixels above and to the left of the current block, the pixels being in a current CTU that includes the current block, a second region including pixels above and to the left of the current CTU, a third region including pixels above and to the right of the current CTU, and a fourth region including pixels to the left of the current CTU.

[0089] At least one example of an embodiment may involve a method or apparatus as described herein, wherein the area in which the at least one other template occurs includes a region selected to enable wavefront parallel processing.

[0090] At least one example of an embodiment may involve a method or apparatus as described herein, wherein the area in which the at least one other template occurs includes a region selected to enable independent decoding of each CTU line.

[0091] At least one example of an embodiment may involve a method or apparatus as described herein, where the region is selected such that decoding does not require access to CTU lines above the CTU line containing the current block.

[0092] At least one example of an embodiment may involve a method or apparatus as described herein, where a template associated with a current block includes a first portion to the left of the current block and a second portion above the current block, and if the second portion extends above the CTU line that includes the current block, the comparison is based only on the first portion.

[0093] At least one example of an embodiment may involve a device including an apparatus as described herein and at least one of: (i) an antenna configured to receive a signal including data representing image information; (ii) a band limiter configured to limit the received signal to a frequency band including the data representing the image information; and (iii) a display configured to display an image from the image information.

[0094] At least one example of an embodiment may involve a device as described herein, including one of a television, a television signal receiver, a set-top box, a gateway device, a mobile device, a mobile phone, a tablet, a computer, a laptop, or other electronic device.

[0095] In general, another example embodiment may involve a bitstream or signal formatted to include syntax elements and picture information, where the syntax elements are generated and the picture information is encoded by processing according to any one or more of the example embodiment methods of the present disclosure.

[0096] Generally, one or more other examples of the embodiments may also provide a computer-readable storage medium, e.g., a non-volatile computer-readable storage medium, having stored thereon instructions for encoding or decoding picture information, such as video data, in accordance with the methods or apparatus described herein. One or more embodiments may also provide a computer-readable storage medium having stored thereon a bitstream generated in accordance with the methods or apparatus described herein. One or more embodiments may also provide methods and apparatus for transmitting or receiving a bitstream or signal generated in accordance with the methods or apparatus described herein.

[0097] Many of the example embodiments described herein are described with specificity, and often in a manner that may sound limiting, at least to indicate individual characteristics. However, this is for purposes of clarity of description, and not to limit the application or scope of those aspects. In fact, all of the different aspects can be combined and substituted to provide further aspects. Furthermore, embodiments, features, etc. can be combined and substituted with others that have also been described in prior applications.

[0098] Various implementations include decoding. As used herein, "decoding" can encompass all or part of the processes performed on a received encoded sequence to produce a final output suitable for, for example, a display. In various embodiments, such processes include one or more of the processes typically performed by a decoder, such as, for example, entropy decoding, inverse quantization, inverse transform, and differential decoding. In various embodiments, such processes also or alternatively include processes performed by the decoders of the various implementations described herein.

[0099] As a further example, in one embodiment, "decoding" refers to entropy decoding only, in another embodiment, "decoding" refers to differential decoding only, and in another embodiment, "decoding" refers to a combination of entropy and differential decoding. Whether the phrase "encoding process" is intended to refer to a task subset specifically or to the broader encoding process as a whole will be clear based on the context of the specific description and will be well understood by one of ordinary skill in the art.

[0100] Various implementations involve encoding. Similar to the above discussion of "decoding," "encoding" as used in this application can encompass all or part of the processes performed on an input video sequence to produce an encoded bitstream, for example. In various embodiments, such processes include one or more of the processes typically performed by an encoder, such as, for example, partitioning, differential encoding, transforming, quantization, and entropy encoding.

[0101] As a further example, in one embodiment, "encoding" refers to entropy encoding only, in another embodiment, "encoding" refers to differential encoding only, and in another embodiment, "encoding" refers to a combination of differential and entropy encoding. Whether the phrase "encoding process" is intended to refer to a task subset specifically or to the broader encoding process as a whole will be clear based on the context of the specific description and will be well understood by one of ordinary skill in the art.

[0102] It should be noted that the syntax elements used herein are descriptive terms, and therefore do not exclude the use of other syntax element names.

[0103] Where a figure is presented as a flow chart, it should be understood that the figure also provides a block diagram of the corresponding apparatus. Similarly, where a figure is presented as a block diagram, it should be understood that the figure also provides a flow chart of the corresponding method / process.

[0104] Generally, examples of embodiments, implementations, features, etc. described herein can be implemented, for example, in a method or process, an apparatus, a software program, a data stream, or a signal. Even if discussed only in the context of a single implementation form (e.g., discussed only as a method), the implementation of the discussed feature can also be implemented in other forms (e.g., an apparatus or program). For example, an apparatus can be implemented in suitable hardware, software, and firmware. One or more examples of the method can be implemented, for example, in a processor, which generally refers to a processing device, including, for example, a computer, a microprocessor, an integrated circuit, or a programmable logic device. Processors also include, for example, communication devices, such as computers, mobile phones, portable / personal digital assistants ("PDAs"), and other devices that facilitate communication of information between end users. Also, the use of the term "processor" herein is intended to broadly encompass various configurations of one processor or more than one processor.

[0105] Reference to "one embodiment" or "an embodiment" or "one implementation" or "an implementation," or other variations thereof, means that a particular feature, structure, characteristic, etc. described in connection with that embodiment is included in at least one embodiment. Thus, the appearances of the phrases "in one embodiment" or "an embodiment" or "in one implementation," or other variations thereof appearing in various places throughout this application are not necessarily all referring to the same embodiment.

[0106] Additionally, the application may refer to "determining" various information. Determining information may include, for example, one or more of estimating information, calculating information, predicting information, or retrieving information from a memory.

[0107] Additionally, the application may refer to "accessing" various information. Accessing information may include, for example, one or more of receiving information, retrieving information (e.g., from a memory), storing information, moving information, copying information, calculating information, determining information, predicting information, or estimating information.

[0108] Additionally, the application may refer to "receiving" various information. Receiving, like "accessing," is intended to be a broad term. Receiving information may include, for example, one or more of accessing information or retrieving information (e.g., from a memory). Furthermore, "receiving" generally involves in some way, for example, storing information, processing information, transmitting information, moving information, copying information, erasing information, calculating information, determining information, predicting information, or estimating information.

[0109] For example, in the case of "A / B," "A and / or B," and "at least one of A and B," it should be understood that use of any of the following " / ," "and / or," and "at least one of" is intended to encompass selection of only the first listed alternative (A), or selection of only the second listed alternative (B), or selection of both alternatives (A and B). As a further example, in the case of "A, B, and / or C" and "at least one of A, B, and C," such language is intended to encompass the selection of only the first listed alternative (A), or the selection of only the second listed alternative (B), or the selection of only the third listed alternative (C), or the selection of only the first and second listed alternatives (A and B), or the selection of only the first and third listed alternatives (A and C), or the selection of only the second and third listed alternatives (B and C), or the selection of all three alternatives (A and B and C). This may be expanded as many times as the number of items listed, as would be apparent to one of ordinary skill in the art and related arts.

[0110] As will be apparent to one skilled in the art, implementations can result in a variety of signals formatted to carry information that can be, for example, stored or transmitted. Information can include, for example, instructions for performing a method or data generated by one of the described implementations. For example, a signal can be formatted to carry a bit stream of the described embodiments. For example, such a signal can be formatted as an electromagnetic wave (e.g., using a radio frequency portion of the spectrum) or as a baseband signal. Formatting can include, for example, encoding a data stream and modulating a carrier wave with the encoded data stream. The information that the signal carries can be, for example, analog information or digital information. As is known, the signal can be transmitted over a variety of different wired or wireless links. The signal can be stored in a processor-readable medium.

[0111] Various embodiments are described herein. The features of these embodiments may be provided alone or in any combination across various claim categories and types. Further, the embodiments may include one or more of the following features, devices, or aspects, alone or in any combination across various claim categories and types: ● Providing video encoding and / or decoding, the providing including determining a predictive block for a current block of picture information based on a comparison of a template associated with the current block with at least one other template associated with at least one other block within an area of ​​the decoded picture information, the comparison being based on a fixed number of comparisons per pixel regardless of the size of the current block, and encoding / decoding the current block based on the predictive block. Providing video encoding and / or decoding as described herein, wherein the certain number of comparisons per pixel is one of a fixed value or a value signaled through high level syntax information. Providing a video encoding and / or decoding as described herein, wherein the area in which the at least one other template occurs includes regions above and to the left of the current block. ● Providing video encoding and / or decoding as described in the present specification, wherein the area in which at least one other template occurs includes a plurality of regions, the plurality of regions including: a first region including pixels above and to the left of a current block, the pixels being in a current CTU that includes the current block; a second region including pixels above and to the left of the current CTU; a third region including pixels above and to the right of the current CTU; and a fourth region including pixels to the left of the current CTU. Providing video encoding and / or decoding as described herein, wherein the area in which at least one other template occurs includes a region selected to enable wavefront parallel processing. Providing video encoding and / or decoding as described herein, wherein the area in which at least one other template occurs includes a region selected to enable independent decoding of each CTU line. ● Providing video encoding and / or decoding as described in this specification, where the region is selected such that decoding does not require access to CTU lines above the CTU line containing the current block. ● Providing video encoding and / or decoding as described in this specification, where a template associated with a current block includes a first portion to the left of the current block and a second portion above the current block, and where the second portion extends above the CTU line that contains the current block, the comparison is based only on the first portion. - Providing a bitstream or signal that includes one or more of the described syntax elements, or variations thereof. - Providing a bitstream or signal including syntax carrying information generated according to any of the described embodiments. - Providing for the insertion of syntax elements into the signal transmission that enable the decoder to operate in a manner that corresponds to the manner used by the encoder. ● Inserting into signal transmission syntax elements that enable the encoder and / or decoder to provide encoding and / or decoding according to any of the embodiments, features, or entities, singly or in any combination, as described herein. Based on these syntax elements, selecting features or entities, singly or in any combination, to apply to the decoder as described herein. ● Providing for creating, and / or transmitting, and / or receiving, and / or decoding a bitstream or signal that includes one or more of the described syntax elements or variations thereof. - Providing for producing and / or transmitting and / or receiving and / or decoding a bitstream according to any of the described embodiments. - A method, process, apparatus, instruction storage medium, data storage medium, or signal according to any of the described embodiments. A TV, set-top box, mobile phone, tablet, or other electronic device providing for applying encoding and / or decoding according to any of the embodiments, features, or entities, singly or in any combination, as described herein. A TV, set-top box, mobile phone, tablet, or other electronic device that performs encoding and / or decoding according to any of the embodiments, features, or entities, alone or in any combination, as described herein, and displays the resulting images (e.g., using a monitor, screen, or other type of display). ● A TV, set-top box, mobile phone, tablet, or other electronic device that tunes a channel (e.g., using a tuner) to receive a signal containing an encoded image, and performs encoding and / or decoding in accordance with any of the embodiments, features, or entities, singly or in any combination, as described herein. ● A TV, set-top box, mobile phone, tablet, or other electronic device that receives a signal containing an encoded image wirelessly (e.g., using an antenna) and performs encoding and / or decoding in accordance with any of the embodiments, features, or entities described herein, singly or in any combination. ●A computer program product storing program code that, when executed by a computer, encodes and / or decodes according to any of the embodiments, features or entities, alone or in any combination, as described herein. A non-transitory computer-readable medium comprising executable program instructions that cause a computer executing the instructions to implement encoding and / or decoding according to any of the embodiments, features, or entities, alone or in any combination, as described herein.

Claims

1. 1. An apparatus comprising: one or more processors, the one or more processors determining a prediction block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​decoded picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block; and decoding the current block based on the predicted block.

2. 1. A method comprising: determining a prediction block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​decoded picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block; and decoding the current block based on the predicted block.

3. 1. An apparatus comprising: one or more processors, the one or more processors determining a prediction block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​reconstructed picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block; encoding the current block based on the predicted block.

4. 1. A method comprising: determining a prediction block for a current block of picture information based on a comparison of a template associated with the current block to at least one other template associated with at least one other block within an area of ​​reconstructed picture information, the comparison being based on a fixed number of comparisons per pixel regardless of a size of the current block; and encoding the current block based on the predicted block.

5. 4. The apparatus of claim 1 or 3, wherein the constant number of comparisons per pixel is one of a fixed value or a value signaled through high level syntax information.

6. 6. The apparatus of claim 1, 3 or 5, wherein the area in which the at least one other template occurs includes areas above and to the left of the current block.

7. The apparatus of claim 1, 3 or 5, wherein the area in which the at least one other template occurs includes a plurality of regions, the plurality of regions including a first region including pixels above and to the left of the current block and in a current CTU that includes the current block, a second region including pixels above and to the left of the current CTU, a third region including pixels above and to the right of the current CTU, and a fourth region including pixels to the left of the current CTU.

8. 6. The apparatus of claim 1, 3 or 5, wherein the area from which the at least one other template occurs comprises a region selected to enable wavefront parallel processing.

9. The apparatus of claim 1 , 3 or 5 , wherein the area in which the at least one other template occurs comprises a region selected to enable independent decoding of each CTU line.

10. 10. The apparatus of claim 9, wherein the region is selected such that decoding does not require access to CTU lines above the CTU line containing the current block.

11. A computer program comprising instructions which, when executed by a computer, cause said computer to perform the method according to claim 2 or 4.

12. A non-transitory computer readable medium storing executable program instructions that, when executed by a computer, cause the computer to perform the method of claim 2 or 4.

13. A device, comprising: An apparatus according to any one of claims 1, 3 or 5 to 10; 1. A device comprising at least one of: (i) an antenna configured to receive a signal including data representing image information; (ii) a band limiter configured to limit the received signal to a frequency band including the data representing the image information; and (iii) a display configured to display an image from the image information.

14. 14. The device of claim 13, wherein the device comprises one of a television, a television signal receiver, a set-top box, a gateway device, a mobile device, a mobile phone, a tablet, a computer, a laptop, or other electronic device.

15. The method of claim 2 or 4, wherein the area in which the at least one other template occurs includes areas above and to the left of the current block.

16. 16. A method according to claim 2, 4 or 15, wherein the area in which the at least one other template occurs includes a plurality of regions, the plurality of regions including a first region including pixels above and to the left of the current block and in a current CTU that includes the current block, a second region including pixels above and to the left of the current CTU, a third region including pixels above and to the right of the current CTU, and a fourth region including pixels to the left of the current CTU.

17. 16. The method of claim 2, 4 or 15, wherein the template associated with the current block includes a first portion to the left of the current block and a second portion above the current block, and if the second portion extends above a CTU line that includes the current block, the comparison is based only on the first portion.

18. 5. The method of claim 2 or 4, wherein the templates of the current block include only a first left template to the left of the current block and the at least one other template of the at least one other block includes only a second left template to the left of the at least one other block, and the comparison is based only on the first left template and the second left template.

19. 5. The method of claim 2 or 4, wherein the template of the current block includes only a first top template above the current block, and the at least one other template of the at least one other block includes only a second top template above the at least one other block, and the comparison is based only on the first and second top templates.

20. The method of claim 2 or 4, wherein the current block corresponds to a first coding unit of a current frame, and the template for the first block extends beyond both a top and a left boundary of the current frame.