Encoding configuration method and apparatus

Abstract

The present application provides an encoding configuration method and apparatus. The method includes: an optical network unit receives first information, the first information indicating a change amount of forward error correction codeword information compared with a first forward error correction mother code; the optical network unit determines forward error correction codeword information based on the first information; according to the technical solution provided in the present application, the change amount of forward error correction codeword information compared with the first forward error correction mother code is indicated to help implement a flexible configuration of forward error correction codeword information.

Description

[Technical field]

[0001] This application claims priority to Chinese Patent Application No. 202210015997.2, entitled "Encoding Configuration Method and Apparatus," filed with the State Intellectual Property Office of the People's Republic of China on January 7, 2022, the entire contents of which are incorporated herein by reference.

[0002] The present application relates to the field of optical communications, and more particularly to an encoding configuration method and apparatus. [Background technology]

[0003] In a passive optical network (PON) system, different optical network units (ONUs) have different transmission distances to an optical line termination (OLT), or different optical network units pass through different optical splitters to the optical line termination, resulting in different link losses between different ONUs and OLTs. Forward error correction (FEC) is used to solve the problems of link losses and transmission penalties caused by optical splitters and optical fiber transmission. In this technology, redundant error correction codes may be added to the transmission code string to greatly narrow the tolerance of the optical signal-to-noise ratio (OSNR) at the receiving end and reduce the bit error rate and transmission power.

[0004] Currently, in order to guarantee transmission performance, the FEC coding method is defined between the OLT and the ONU based on the maximum possible link loss, and a unified FEC coding is used. Generally, in a PON system, the link loss from one ONU to the OLT is large, and the link loss from another ONU to the OLT is small. An ONU with a small link loss does not need FEC coding with a strong error correction ability, but needs to use the same FEC coding method as that of an ONU with a large link loss. However, such FEC coding generally has a large overhead or is complicated, resulting in waste.

[0005] Therefore, an encoding configuration method for implementing flexible configuration of forward error correction FEC codeword information is urgently needed. Summary of the Invention [Means for solving the problem]

[0006] The present application provides an encoding configuration method and apparatus to help implement flexible configuration of forward error correction codeword information.

[0007] According to a first aspect, an encoding configuration method is provided, the method including: an optical network unit receives first information, the first information indicating a change amount of a forward error correction code word information compared to a first forward error correction mother code; and the optical network unit determines the forward error correction code word information based on the first information.

[0008] According to the technical solution provided in the present application, a change amount of the forward error correcting codeword information compared with the first forward error correcting mother code is indicated, in order to help implement a flexible configuration of the forward error correcting codeword information.

[0009] In relation to the first aspect, in some implementations of the first aspect, before receiving the first information, the method further includes: the optical network unit transmits capability report information, the capability report information indicating forward error correction mother codes supported by the optical network unit, and the forward error correction mother codes supported by the optical network unit include a first forward error correction mother code.

[0010] According to the technical solution provided in this application, an optical line terminal can determine a first forward error correction mother code from the forward error correction mother codes supported by an optical network unit, and process the first forward error correction mother code to determine forward error correction codeword information suitable for the optical network unit. Moreover, the codeword information defined in the standard is not required. This helps to implement a flexible configuration of forward error correction codeword information.

[0011] In relation to the first aspect, in some implementations of the first aspect, before sending the capability report information, the method further includes: the optical network unit receives capability query information, and the capability query information is used to query a forward error correction mother code supported by the optical network unit.

[0012] In relation to the first aspect, in some other implementations of the first aspect, the first information includes second information, which indicates a change amount of payload information of the forward error correcting code word information compared to the payload information of the first forward error correcting mother code by using a bit sequence.

[0013] In relation to the first aspect, in some other implementations of the first aspect, the bit sequence of the second information includes a first sequence, and the value of the first sequence is 0, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the first sequence are shortened. In this case, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 1, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the second sequence are not shortened. Alternatively, the bit sequence of the second information includes a first sequence, and the value of the first sequence is 1, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the first sequence are shortened. In this case, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 0, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the second sequence are not shortened.

[0014] A bit in the bit sequence corresponds to one column (or half column) of the mother code matrix and corresponds to 256 (or 128) bits of mother code information.

[0015] In relation to the first aspect, in some other implementations of the first aspect, the first information further includes third information, which indicates a change amount of parity bit information of the forward error correcting code word information compared to the parity bit information of the first forward error correcting mother code by using a bit sequence.

[0016] In relation to the first aspect, in some other implementations of the first aspect, the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 0, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the third sequence are punctured. In this case, the bit sequence of the third information may further include a fourth sequence, and a value corresponding to the fourth sequence is 1, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured. Alternatively, the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 1, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the third sequence are punctured. In this case, the bit sequence of the third information may further include a fourth sequence, and a value corresponding to the fourth sequence is 0, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured.

[0017] In the technical solution of the present application, the specific forward error correction codeword information is represented by a bit sequence.In order to facilitate implementing a flexible configuration of forward error correction codeword information, the first forward error correction mother code can be processed in units of one column or half column of the encoded matrix to obtain forward error correction codeword information.

[0018] In relation to the first aspect, in some further implementations of the first aspect, the first information includes a first value indicating that M bits of the payload information of the first forward error correcting mother code are shortened based on a first order to obtain payload information of the forward error correcting code word information, where M is obtained by multiplying the first value by 256 or 128.

[0019] In relation to the first aspect, in some further implementations of the first aspect, the first information includes a second value indicating that N bits of the parity bit information of the first forward error correcting mother code are punctured based on a second order to obtain parity bit information of the forward error correcting code word information, where N is obtained by multiplying the second value by 256 or 128.

[0020] In the technical solution of the present application, in order to help implement a flexible configuration of forward error correcting codeword information, the value represents that the mother code matrix corresponding to the first forward error correcting mother code is processed to obtain specific forward error correcting codeword information.

[0021] The first order and / or the second order may be back-to-front or front-to-back.

[0022] In relation to the first aspect, in some implementations of the first aspect, the first information further includes fourth information, the fourth information indicating that the first information is valid.

[0023] The first information is carried in a first message, the first message including at least one of the following: a physical layer operations, administration and maintenance (PLOAM) message, an optical network terminal management and control interface (OMCI) message, and an operations, administration and maintenance (OAM) message.

[0024] According to a second aspect, an encoding configuration method is provided, the method including: an optical line terminal determines first information, the first information indicating a change amount of forward error correction codeword information compared to a first forward error correction mother code; the optical line terminal transmits the first information to an optical network unit, the first information being used by the optical network unit to determine the forward error correction codeword information.

[0025] According to the technical solution provided in the present application, a change amount of the forward error correcting codeword information compared with the first forward error correcting mother code is indicated, in order to help implement a flexible configuration of the forward error correcting codeword information.

[0026] In relation to the second aspect, in some implementations of the second aspect, before transmitting the first information, the method further includes: an optical line termination device receives capability report information, the capability report information indicating forward error correction mother codes supported by the optical network unit, and the forward error correction mother codes supported by the optical network unit include a first forward error correction mother code.

[0027] According to the technical solution provided in this application, an optical line terminal can determine a first forward error correction mother code from the forward error correction mother codes supported by an optical network unit, and process the first forward error correction mother code to determine forward error correction codeword information suitable for the optical network unit. Moreover, the codeword information defined in the standard is not required. This helps to implement a flexible configuration of forward error correction codeword information.

[0028] In relation to the second aspect, in some implementations of the second aspect, before receiving the capability report information, the method further includes: an optical line terminal sends capability inquiry information, and the capability inquiry information is used to inquire about a forward error correction mother code supported by the optical network unit.

[0029] In relation to the second aspect, in some other implementations of the second aspect, the first information includes second information, which indicates a change amount of payload information of the forward error correcting code word information compared to the payload information of the first forward error correcting mother code by using a bit sequence.

[0030] In relation to the second aspect, in some other implementations of the second aspect, the bit sequence of the second information includes a first sequence, and the value of the first sequence is 0, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the first sequence are shortened. In this case, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 1, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the second sequence are not shortened. Alternatively, the bit sequence of the second information includes a first sequence, and the value of the first sequence is 1, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the first sequence are shortened. In this case, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 0, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the second sequence are not shortened.

[0031] A bit in the bit sequence corresponds to one column (or half column) of the mother code matrix and corresponds to 256 (or 128) bits of mother code information.

[0032] In relation to the second aspect, in some other implementations of the second aspect, the first information further includes third information, which indicates a change amount of parity bit information of the forward error correcting code word information compared to the parity bit information of the first forward error correcting mother code by using a bit sequence.

[0033] In relation to the second aspect, in some other implementations of the second aspect, the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 0, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the third sequence are punctured. In this case, the bit sequence of the third information may further include a fourth sequence, and a value corresponding to the fourth sequence is 1, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured. Alternatively, the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 1, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the third sequence are punctured. In this case, the bit sequence of the third information may further include a third sequence, and a value corresponding to the third sequence is 0, which represents that 256 bits or 128 bits of the first forward error correction mother code corresponding to the third sequence are not punctured.

[0034] In the technical solution of the present application, the specific forward error correction codeword information is represented by a bit sequence.In order to facilitate implementing a flexible configuration of forward error correction codeword information, the first forward error correction mother code can be processed in units of one column or half column of the encoded matrix to obtain forward error correction codeword information.

[0035] In relation to the second aspect, in some further implementations of the second aspect, the first information includes a first value indicating that M bits of the payload information of the first forward error correcting mother code are shortened based on a first order to obtain payload information of the forward error correcting code word information, where M is obtained by multiplying the first value by 256 or 128.

[0036] In relation to the second aspect, in some further implementations of the second aspect, the first information includes a second value indicating that N bits of the parity bit information of the first forward error correcting mother code are punctured based on a second order to obtain parity bit information of the forward error correcting code word information, where N is obtained by multiplying the second value by 256 or 128.

[0037] In the technical solution of the present application, in order to help implement a flexible configuration of forward error correcting codeword information, the value represents that the mother code matrix corresponding to the first forward error correcting mother code is processed to obtain specific forward error correcting codeword information.

[0038] The first order and / or the second order may be back-to-front or front-to-back.

[0039] In relation to the second aspect, in some implementations of the second aspect, the first information further includes fourth information, the fourth information indicating that the first information is valid.

[0040] The first information is carried in a first message, the first message including at least one of the following: a physical layer operations, administration and maintenance (PLOAM) message, an optical network terminal management and control interface (OMCI) message, and an operations, administration and maintenance (OAM) message.

[0041] According to a third aspect, an encoding configuration apparatus is provided, the apparatus including: a transceiver unit configured to receive first information, the first information indicating an amount of change of a forward error correcting codeword information compared to a first forward error correcting mother code; and a processing unit configured to determine the forward error correcting codeword information based on the first information.

[0042] In relation to the third aspect, in some implementations of the third aspect, the transceiver unit is further configured to transmit capability report information, where the capability report information indicates forward error correction mother codes supported by the optical network unit, and where the forward error correction mother codes supported by the optical network unit include a first forward error correction mother code.

[0043] In relation to the third aspect, in some implementations of the third aspect, the transceiver unit is further configured to receive capability inquiry information, which is used to inquire about a forward error correction mother code supported by the optical network unit.

[0044] According to a fourth aspect, an encoding configuration apparatus is provided, the apparatus including: a processing unit configured to determine first information, the first information indicative of an amount of change in forward error correcting codeword information compared to a first forward error correcting mother code; and a transceiver unit configured to transmit the first information to an optical network unit.

[0045] In relation to the fourth aspect, in some implementations of the fourth aspect, the transceiver unit is further configured to receive capability report information, where the capability report information indicates forward error correction mother codes supported by the optical network unit, and where the forward error correction mother codes supported by the optical network unit include a first forward error correction mother code.

[0046] In relation to the fourth aspect, in some implementations of the fourth aspect, the transceiver unit is further configured to transmit capability inquiry information, which is used to inquire about a forward error correction mother code supported by the optical network unit.

[0047] According to a fifth aspect, there is provided a communication device including a processor. The processor is coupled to a memory and configured to read instructions in the memory and then execute the method according to any one of the previous aspects based on the instructions. The communication device may be an optical network unit entity in the first aspect or a device including an optical network unit entity, or the communication device may be an optical line termination entity in the second aspect or a device including an optical line termination entity.

[0048] In relation to the fifth aspect, in a possible implementation, the communication device further includes a memory configured to store necessary program instructions and data.

[0049] In relation to the fifth aspect, in a possible implementation, the communication device is a chip or a chip system. Optionally, when the communication device is a chip system, the communication device may include a chip, or may include a chip and another discrete device.

[0050] According to a sixth aspect, there is provided a communications device including a processor and an interface circuit configured to receive computer programs or instructions and to transmit the computer programs or instructions to the processor, the processor configured to execute the computer programs or instructions such that the communications device performs a method according to the first or second aspect.

[0051] In relation to the sixth embodiment, in a possible implementation, the communication device is a chip or a chip system. Optionally, when the device used for charging is a chip system, the device may include a chip, or may include a chip and another discrete device.

[0052] According to a seventh aspect, there is provided a communication system including an optical network unit and an optical line terminal according to the first and second aspects.

[0053] The optical network unit is configured to perform the method according to the first aspect.The optical line terminal is configured to perform the method according to the second aspect.

[0054] According to an eighth aspect, there is provided a computer program product comprising computer program code which, when executed in a computer, enables the computer to carry out a method according to the previous aspect.

[0055] It should be noted that all or part of the computer program code may be stored in the first storage medium. The first storage medium may be encapsulated together with the processor or may be encapsulated separately from the processor. This is not particularly limited in this embodiment of the present application.

[0056] According to a ninth aspect, there is provided a computer readable medium. The computer readable medium stores program code. When the computer program code is executed in a computer, the computer is enabled to perform the method according to the previous aspect.

[0057] According to a tenth aspect, there is provided a chip system including a memory and a processor. The memory is configured to store a computer program. The processor is configured to call the computer program from the memory and execute the computer program to enable a communication device in which the chip system is installed to execute the method according to any one of the first and second aspects and their possible implementations.

[0058] The chip system may include an input chip or interface configured to transmit information or data, and an output chip or interface configured to receive information or data. [Brief description of the drawings]

[0059] [Figure 1] FIG. 1 is a schematic diagram of upstream and downstream transmissions in a PON system. [Diagram 2] FIG. 2 is a schematic diagram of an encoding configuration method according to an embodiment of the present application; [Diagram 3] 2 is a schematic diagram of a specific example of an encoding configuration method according to an embodiment of the present application; [Figure 4] FIG. 2 is a schematic diagram illustrating forward error correction codeword information by using bit sequences according to an embodiment of the present application; [Diagram 5] FIG. 2 is a schematic diagram illustrating forward error correction codeword information by using values ​​according to an embodiment of the present application; [Figure 6] FIG. 2 is a schematic diagram of an encoding configuration device according to an embodiment of the present application. [Figure 7] FIG. 2 is a schematic diagram of an encoding configuration device according to an embodiment of the present application; DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0060] The following describes the technical solutions of the present application with reference to the accompanying drawings.

[0061] As telecommunication services become more and more abundant, users' bandwidth demands are also increasing. Telecommunication operators in China and around the world have considered fiber to the home (FTTH) as an inevitable choice for access networks. FTTH using PON system has become the mainstream choice. In PON network, this access technology allows only optical fiber and passive optical devices such as optical splitters to be used between the local end (OLT) of the access network and the user (ONU) without the need to rent an equipment room or provide power. Therefore, PON network is called passive optical network. During data transmission and reception, the downstream direction of PON network uses a broadcast format, and the upstream direction of PON network uses a unicast format.

[0062] FIG. 1 is a schematic diagram of upstream and downstream transmissions in a PON system.

[0063] As shown in Fig. 1, during downstream transmission, the signal delivered from the OLT is split into N signals by using an optical splitter, and each of the N signals is simultaneously transmitted to each of the ONUs. The ONU selectively receives downstream data with the same ID as the ONU and discards other data.

[0064] During the upstream direction, N optical signals from the ONUs are combined into one optical signal group by using time division multiplexing (TDM) technology. The principle is that the upstream transmission time is divided into several time slots Ti (i=1, 2, 3, ..., 32, ...). In each time slot, only one ONU is arranged to send grouping information to the OLT in a grouping manner, and each ONU sends the grouping information in turn based on the order specified by the OLT. TDM requires that the OLT measures the distance between the OLT and each ONU, and then performs strict transmission timing for each ONU. Each ONU obtains timing information from the downstream signal sent by the OLT, and sends the upstream grouped signal in the time slot specified by the OLT to avoid contention between ONUs. A PON based on the principle is called a time division multiplexing passive optical network (TDM-PON).

[0065] In a PON system, different ONUs have different transmission distances to the OLT, or different ONUs pass through different optical splitters to the OLT, resulting in different link losses between different ONUs and the OLT. FEC technology is used to solve the problems of link loss and transmission penalty caused by optical splitters and optical fiber transmission. In this technology, redundant error correction codes may be added to the transmission code string to greatly narrow the tolerance range of OSNR at the receiving end and lower the bit error rate and transmission power. In addition, this technology can effectively improve the channel used for optical fiber signal transmission. There are always various kinds of distortions and uneven latency during signal transmission in the medium. The final result of the bit error rate and jitter of the signal can be reflected by the bit error rate of the system. FEC technology can solve the problems of fiber dispersion, signal attenuation, channel noise, and interference between multiple optical fibers in long-haul, ultra-long-haul, and large-capacity dense wavelength division multiplexing (DWDM) optical fiber communication systems. This greatly reduces the performance between the systems.

[0066] In 10G PON, Reed-Solomon (RS) coded FEC is used. However, in 50G PON, low density parity check (LDPC) coding method is selected. Different FEC coding methods have different performance and implementation costs. A complex FEC coding method can usually bring more coding benefits. For the same coding method, it is also possible that more overhead is introduced to bring more coding benefits.

[0067] Currently, in order to guarantee transmission performance, the FEC coding method is defined between the OLT and the ONU based on the maximum possible link loss, and a unified FEC coding is used. Generally, in a PON system, the link loss from one ONU to the OLT is large, and the link loss from another ONU to the OLT is small. An ONU with a small link loss does not need FEC coding with a strong error correction ability, but needs to use the same FEC coding method as that of an ONU with a large link loss. However, such FEC coding generally has a large overhead or is complicated, resulting in waste.

[0068] Based on this, the present application provides an encoding configuration method and device, hoping to implement a flexible configuration of forward error correction FEC codeword information.The following describes in detail the technical solution of the present application by using an example of interaction between the optical line terminal 110 and the optical network unit 120.

[0069] FIG. 2 is a schematic diagram of an encoding configuration method according to an embodiment of the present application.

[0070] S210: The optical network unit 120 receives first information, the first information indicating a change amount of a forward error correcting codeword information compared to a first forward error correcting mother code.

[0071] The first information is determined by the optical line terminal 110. The optical line terminal 110 may determine the forward error correction code word information suitable for the optical network unit 120 according to the signal quality, transmission power, etc. of the optical network unit 120. In addition, the change amount of the forward error correction code word information compared with the first forward error correction mother code is indicated in the form of the first information, so that the optical network unit 120 knows the forward error correction code word information exactly.

[0072] Before receiving the first information, the optical network unit 120 may send capability report information to the optical line terminal 110, where the capability report information indicates forward error correction mother codes supported by the optical network unit 120, and the forward error correction mother codes supported by the optical network unit 120 include a first forward error correction mother code.

[0073] In this way, the optical line terminal 110 can determine a first forward error correction mother code from the forward error correction mother codes supported by the optical network unit 120, and process the first forward error correction mother code to determine forward error correction codeword information suitable for the optical network unit 120. Moreover, the codeword information defined in the standard is not required, which helps to implement a flexible configuration of the forward error correction codeword information.

[0074] Optionally, before sending the capability report information, the optical network unit 120 may receive capability query information sent by the optical line terminal 110, which is used to query the forward error correction mother code supported by the optical network unit 120.

[0075] The first information is carried in a first message, the first message including at least one of the following: a physical layer operations, administration and maintenance (PLOAM) message, an optical network terminal management and control interface (OMCI) message, and an operations, administration and maintenance (OAM) message.

[0076] S220: The optical network unit 120 determines forward error correction codeword information based on the first information.

[0077] In a possible implementation, the first information may include second information, which indicates an amount of change in payload information of the forward error correcting codeword information compared to the payload information of the first forward error correcting mother code by using a bit sequence.

[0078] The bit sequence of the second information includes a first sequence, and the value of the first sequence is 0, which indicates that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the first sequence are shortened. In this case, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 1, which indicates that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the second sequence are not shortened.

[0079] Alternatively, the bit sequence of the second information includes the first sequence, and the value corresponding to the first sequence is 1, which indicates that 256 bits or 128 bits of the first forward error correction mother code corresponding to the first sequence are shortened. In this case, the bit sequence of the second information may further include a second sequence, and the value of the second sequence is 0, which indicates that 256 bits or 128 bits of the first forward error correction mother code corresponding to the second sequence are not shortened.

[0080] A bit in the bit sequence corresponds to one column (or half column) of the mother code matrix and corresponds to 256 (or 128) bits of mother code information.

[0081] Optionally, the first information may further include third information, the third information indicating a change amount of the parity bit information of the forward error correcting code word information compared to the parity bit information of the first forward error correcting mother code by using a bit sequence.

[0082] The bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 0, which indicates that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the third sequence are punctured. In this case, the bit sequence of the third information may further include a fourth sequence, and a value corresponding to the fourth sequence is 1, which indicates that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the fourth sequence are not punctured.

[0083] Alternatively, the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 1, which indicates that 256 bits or 128 bits of the first forward error correction mother code corresponding to the third sequence are punctured. In this case, the bit sequence of the third information may further include a fourth sequence, and a value corresponding to the fourth sequence is 0, which indicates that 256 bits or 128 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured.

[0084] In the technical solution of the present application, the specific forward error correction codeword information is represented by a bit sequence.In order to facilitate implementing a flexible configuration of forward error correction codeword information, the first forward error correction mother code can be processed in units of one column or half column of the encoded matrix to obtain forward error correction codeword information.

[0085] In another possible implementation, the first information may include a first value indicating that M bits of the payload information of the first forward error correcting mother code are shortened based on a first order to obtain payload information of the forward error correcting codeword information, where M is obtained by multiplying the first value by 256 or 128.

[0086] Optionally, the first information may further include a second value indicating that N bits of the parity bit information of the first forward error correcting mother code are punctured based on a second order to obtain parity bit information of the forward error correcting codeword information, where N is obtained by multiplying the second value by 256 or 128.

[0087] The first order and / or the second order may be back-to-front or front-to-back.

[0088] In the technical solution of the present application, in order to help implement a flexible configuration of forward error correcting codeword information, the value represents that the mother code matrix corresponding to the first forward error correcting mother code is processed to obtain specific forward error correcting codeword information.

[0089] Optionally, the first information may further include fourth information, the fourth information indicating when the first information is valid.

[0090] According to the technical solution provided in the present application, a change amount of the forward error correcting codeword information compared with the first forward error correcting mother code is indicated, in order to help implement a flexible configuration of the forward error correcting codeword information.

[0091] FIG. 3 is a schematic diagram of a specific example of an encoding configuration method according to an embodiment of the present application.

[0092] S310: The optical network unit 120 receives the capability inquiry information sent by the optical line terminal 110.

[0093] The capability enquiry information is used to enquire about forward error correction mother codes supported by the optical network unit 120. The capability enquiry information may be carried in a first message, which includes at least one of the following: a physical layer operation, administration and maintenance (PLOAM) message, an optical network terminal management and control interface (OMCI) message, and an operation, administration and maintenance (OAM) message.

[0094] By way of example and not of limitation, when the capability query information is carried in a PLOAM message, the specific format and content of the capability query information may be shown in the following Table 1. The bold "FEC capability query" represents the type of forward error correction mother code supported by the optical network unit 120 and queried or inquired by the optical line termination device 110.

[0095] [Table 1]

[0096] S320: The optical network unit 120 transmits capability report information.

[0097] By way of example and not limitation, when the capability report information is carried in a PLOAM message, a specific format of the capability report information may be shown in the following Tables 2 and 3. The bold "FEC code Capability" represents the type of forward error correction mother code supported by the optical network unit 120. In Table 2, the forward error correction mother code supported by the optical network unit 120 includes LDPC. In Table 3, the optical network unit 120 supports shortening and puncturing of forward error correction FEC mother code.

[0098] [Table 2]

[0099] [Table 3]

[0100] S330: The optical line terminal 110 determines first information, where the first information indicates a change amount of the forward error correcting codeword information compared to a first forward error correcting mother code.

[0101] The forward error correction codeword information includes payload information and parity bit information. In this embodiment of the present application, the first information may indicate the change amount of the forward error correction codeword information compared with the first forward error correction mother code by using a bit sequence and / or value. In the 50G PON, a 12*69 encoding matrix is ​​used. When a new codeword structure is generated based on the encoding matrix, the columns of the matrix are generally pruned by one column or half column. As shown in FIG. 4, the default codeword LDPC(17280, 14592) uses the first 57 columns and 12 columns of the matrix during encoding. There may be four cases based on different contents of the first information:

[0102] Case 1: The payload and parity bit portions of the forward error correcting codeword information are indicated through the use of bit sequences.

[0103] Specifically, the above-mentioned first information may include both the second information and the third information. The second information indicates the change amount of the payload information of the forward error correction code word information compared to the payload information of the first forward error correction mother code by using a bit sequence. The third information indicates the change amount of the parity bit information of the forward error correction code word information compared to the parity bit information of the first forward error correction mother code by using a bit sequence. In this way, the forward error correction code word information configured for the optical network unit 120 is represented by the bit sequence.

[0104] By way of example and not limitation, when the first information is carried in a PLOAM message, a specific format of the first information may be shown in Table 4 below. The bold "FEC capability set" indicates that the message is forward error correction code word information configured for the optical network unit 120. The bold "FEC code selection" indicates that the message includes a bit sequence.

[0105]

Table 4

[0106] As shown in FIG. 4, the 12*69 mother code matrix has a total of 69 columns, 57 columns are payload information, and 12 columns are parity bit information. For example, forward error correction codeword information is represented by a bit sequence A. One column of the mother code matrix corresponds to 256 bits of codeword information, and corresponds to one bit of the bit sequence A. The bit sequence A includes a bit sequence A1 and a bit sequence A2. The bit sequence A includes 69 bits, the bit sequence A1 includes 57 bits, and the bit sequence A2 includes 12 bits. The bit sequence A1 represents the change amount of the payload information of the forward error correction codeword information compared to the payload information of the first forward error correction mother code. The bit sequence A2 represents the change amount of the parity bit information of the forward error correction codeword information compared to the parity bit information of the first forward error correction mother code. In other words, the first information is the bit sequence A, the second information is the bit sequence A1, and the third information is the bit sequence A2. The bit sequence A1 includes a first sequence (e.g., the first column and the second column), and the value of the first sequence is 0, which represents that the 256 bits of the first forward error correction mother code corresponding to the first sequence are shortened. In this case, the bit sequence A1 further includes a second sequence (e.g., the third column to the 57th column), and the value of the second sequence is 0, which represents that the 256 bits of the first forward error correction mother code corresponding to the second sequence are not shortened. In this way, the amount of change of the payload information of the forward error correction codeword information compared to the payload information of the first forward error correction mother code is indicated by using the bit sequence A1. After receiving the second information (i.e., the bit sequence A1), the optical network unit 120 may shorten the payload information of the first forward error correction mother code based on the indication of the bit sequence to obtain the payload information of the forward error correction codeword information configured for the optical network unit 120.In this case, the bit sequence A2 includes a third sequence (e.g., from the last column to the third last column), and a value corresponding to the third sequence is 0, which represents that the 256 bits of the first forward error correction mother code corresponding to the third sequence are punctured. In this case, the bit sequence A2 further includes a fourth sequence (e.g., from the fourth last column to the twelfth last column), and a value corresponding to the fourth sequence is 1, which represents that the 256 bits of the first forward error correction mother code corresponding to the fourth sequence are not punctured. In this way, the change amount of the parity bit information of the forward error correction codeword information compared to the parity bit information of the first forward error correction mother code is indicated by using the bit sequence A2. After receiving the third information (i.e., the bit sequence A2), the optical network unit 120 may puncture the parity bit information of the first forward error correction mother code based on the indication of the bit sequence to obtain the parity bit information of the forward error correction codeword information configured for the optical network unit 120.

[0107] Correspondingly, for example, forward error correction codeword information is represented by bit sequence B. A half column of the mother code matrix corresponds to 128 bits of codeword information and corresponds to 1 bit of bit sequence B. Bit sequence B includes bit sequence B1 and bit sequence B2. Different from the above bit sequence A, bit sequence B includes 69*2=138 bits, bit sequence B1 includes 57*2=114 bits, and bit sequence B2 includes 12*2=24 bits. For other explanations, please refer to the above description of bit sequence A. Details will not be described again in this specification.

[0108] It should be understood that in this embodiment of the present application, setting a value corresponding to a sequence to 0 may represent that 256 bits or 128 bits of the first forward error correction mother code corresponding to the sequence are shortened or punctured, or setting a value corresponding to a sequence to 1 may represent that 256 bits or 128 bits of the first forward error correction mother code corresponding to the sequence are shortened or punctured. This is not limited in the present application.

[0109] In this case, when half columns are used as units, the bit sequence contains at most 69*2=138 bits, i.e. 18 bytes (144 bits) may be used to complete the display. When columns are used as units, the bit sequence contains at most 69 bits, i.e. 9 bytes (72 bits) may be used to complete the display. This helps to reduce signaling overhead and save transmission resources.

[0110] Optionally, to ensure the validity of the codeword, only a part of the column can be punctured and shortened, rather than all columns being punctured and shortened in general. For example, up to 32 columns can be shortened and 8 columns can be punctured. When half columns are used as the unit, the bit sequence may contain up to (32+8)*2=80 bits, in other words, 10 bytes (80 bits) may be used to complete the representation. When columns are used as the unit, the bit sequence may contain up to 32+8=40 bits, in other words, 5 bytes (40 bits) may be used to complete the representation, so that the signaling overhead can be further reduced and transmission resources can be saved.

[0111] Optionally, the priority of shortening may be that shortening starts from the last column. For example, if three columns are shortened, shortening starts from the 57th column. Specifically, the 57th column, the 56th column, and the 55th column are shortened consecutively. During puncturing, puncturing may be performed based on the priority of the 59th column, the 60th column, the 61st column, the 62nd column, the 67th column, and so on.

[0112] According to the technical solution described in case 1, a specific forward error correction codeword information is represented by a bit sequence. In order to help implement a flexible configuration of forward error correction codeword information, the first forward error correction mother code can be processed in units of one column or half column of the encoded matrix to obtain forward error correction codeword information.

[0113] Case 2: The payload and parity bit portions of the forward error correcting codeword information are indicated by using values.

[0114] Specifically, the above-mentioned first information may include both a first value and a second value, where the first value indicates that M bits of the payload information of the first forward error correcting mother code are shortened based on a first order to obtain the payload information of the forward error correcting codeword information. The second value indicates that N bits of the parity bit information of the first forward error correcting mother code are punctured based on a second order to obtain the parity bit information of the forward error correcting codeword information. M is obtained by multiplying the first value by 256 or 128, and N is obtained by multiplying the second value by 256 or 128.

[0115] By way of example and not limitation, when the first information is carried in a PLOAM message, a specific format of the first information may be shown in Table 5 below. The bold "FEC capability set" represents that the message is forward error correction codeword information configured for the optical network unit 120. The bold "Shortened columns number" represents a first value. The bold "Punctured columns number" represents a second value.

[0116] [Table 5]

[0117] As shown in FIG. 5, the 12*69 mother code matrix has a total of 69 columns, of which 57 columns are payload information and 12 columns are parity bit information.

[0118] In a possible implementation, one column of the mother code matrix corresponds to 256 bits of codeword information and corresponds to one bit of the first value. When the first value is 3 and the first order is back-to-front, it represents that M bits of payload information of the first forward error correction mother code are shortened back-to-front to obtain payload information of forward error correction codeword information. M is obtained by multiplying the first value by 256, that is, M=3*256=768. In this way, after receiving the first value, the optical network unit 120 may process the payload information of the first forward error correction mother code to obtain payload information of forward error correction codeword information.

[0119] When the second value is 2 and the second order is from back to front, it represents that N bits of the parity bit information of the first forward error correcting mother code are punctured from back to front to obtain the parity bit information of the forward error correcting code word information. N is obtained by multiplying the second value by 256, that is, N=2*256=512. In this way, after receiving the second value, the optical network unit 120 may process the parity bit information of the first forward error correcting mother code to obtain the parity bit information of the forward error correcting code word information.

[0120] In another possible implementation, a half column of the mother code matrix corresponds to 128 bits of codeword information and corresponds to 1 bit of the first value. When the first value is 3 and the first order is back-to-front, it represents that M bits of payload information of the first forward error correction mother code are shortened from back-to-front to obtain payload information of forward error correction codeword information. M is obtained by multiplying the first value by 128, that is, M=3*128=384. In this way, after receiving the first value, the optical network unit 120 may process the payload information of the first forward error correction mother code to obtain payload information of forward error correction codeword information. When the second value is 2 and the second order is back-to-front, it represents that N bits of parity bit information of the first forward error correction mother code are punctured from back-to-front to obtain parity bit information of forward error correction codeword information. N is obtained by multiplying the second value by 128, that is, N=2*128=256. In this way, after receiving the second value, the optical network unit 120 may process the parity bit information of the first forward error correcting mother code to obtain the parity bit information of the forward error correcting code word information.

[0121] It should be understood that in this embodiment of the application, the first order and / or the second order may be back-to-front or front-to-back. The first order may be the same or different from the second order. Optionally, the first order and / or the second order may alternatively be a multiple order / one order specified by negotiation or according to a protocol, for example starting from the middle column. This is not limited in this application. The first order and / or the second order may be consecutive. For example, when the first value is 3, three consecutive columns (or half columns) are processed. Optionally, the first order and / or the second order may alternatively be discontinuous. For example, when the first value is 3, the columns may be processed based on an order specified through negotiation or according to a protocol, for example, an order of odd columns or even columns. This is not limited in this application.

[0122] Optionally, the priority of shortening may be that shortening starts from the last column. For example, if three columns are shortened, shortening starts from the 57th column. Specifically, the 57th column, the 56th column, and the 55th column are shortened consecutively. During puncturing, puncturing may be performed based on the priority of the 59th column, the 60th column, the 61st column, the 62nd column, the 67th column, and so on.

[0123] In this case, when half columns are used as units, the payload portion has a total of 57*2 possibilities, and the parity bits have a total of 12*2 possibilities. The payload portion is represented by using at least 7 bits, and the parity bits are represented by using 5 bits. This helps to reduce signaling overhead and save transmission resources.

[0124] Optionally, to ensure the validity of the codeword, only a part of the column can be punctured and shortened, rather than all columns being punctured and shortened in general. For example, up to 32 columns can be shortened and 8 columns can be punctured. When half columns are used as a unit, only 6 bits are needed to represent the payload part and 4 bits are needed to represent the parity part, so that the signaling overhead can be further reduced and transmission resources can be saved.

[0125] According to the technical solution described in Case 2, in order to help implement a flexible configuration of forward error correcting codeword information, the value represents that a mother code matrix corresponding to a first forward error correcting mother code is processed to obtain specific forward error correcting codeword information.

[0126] Case 3: The payload portion of the forward error correcting codeword information is indicated by using a bit sequence, and the parity bit portion of the forward error correcting codeword information is indicated by using a value.

[0127] Specifically, the above-mentioned first information may include both the second information and the second value. The second information indicates the change amount of the payload information of the forward error correction codeword information compared with the payload information of the first forward error correction mother code by using a bit sequence. The second value indicates that N bits of the parity bit information of the first forward error correction mother code are punctured based on a second order to obtain the parity bit information of the forward error correction codeword information. N is obtained by multiplying the second value by 256 or 128. For example, the second information includes a bit sequence A1. When a half-column is used as a unit, the bit sequence A1 includes 57*2=114 bits. In this case, the parity bit part may be indicated by using 5 bits in the value representation method.

[0128] It should be understood that the specific expression methods and beneficial effects of the second information and the second value are referred to the above description of Case 1 and Case 2. The details will not be described again in this specification.

[0129] According to the technical solution described in Case 3, the payload information of the forward error correction code word information is represented by a bit sequence, and the parity bit information of the forward error correction code word information is represented by a value. In order to help implement a flexible configuration of the forward error correction code word information, the first forward error correction mother code may be processed in units of one column or half column of the encoded matrix to obtain the forward error correction code word information.

[0130] Case 4: The payload portion of the forward error correcting codeword information is indicated by using a value. The parity bit portion of the forward error correcting codeword information is indicated by using a bit sequence.

[0131] Specifically, the first information may include both the third information and the first value. The first value indicates that M bits of the payload information of the first forward error correcting mother code are shortened based on a first order to obtain the payload information of the forward error correcting code word information. M is obtained by multiplying the first value by 256 or 128. The third information indicates a change amount of the parity bit information of the forward error correcting code word information compared with the parity bit information of the first forward error correcting mother code by using a bit sequence. For example, when a string is used as a unit, the payload portion is represented by using 7 bits, and the third information includes a bit sequence A2, and the bit sequence A2 includes 12 bits.

[0132] It should be understood that the specific expression method and beneficial effect of the third information and the first value are referred to the above description of Case 1 and Case 2. The details will not be described again in this specification.

[0133] According to the technical solution described in Case 4, the payload information of the forward error correction code word information is represented by a value, and the parity bit information of the forward error correction code word information is represented by a bit sequence. In order to help implement a flexible configuration of the forward error correction code word information, the first forward error correction mother code may be processed in units of one column or half column of the encoded matrix to obtain the forward error correction code word information.

[0134] S340: The optical line terminal 110 sends a first information to the optical network unit 120.

[0135] The first information is carried in a first message, the first message including at least one of the following: a physical layer operations, administration and maintenance (PLOAM) message, an optical network terminal management and control interface (OMCI) message, and an operations, administration and maintenance (OAM) message.

[0136] S350: The optical network unit 120 determines forward error correction codeword information based on the first information.

[0137] Specifically, corresponding to the description of S330, the optical network unit 120 processes the first forward error correction mother code in units of one or half columns of the encoded matrix based on the content and bit sequence and / or value of the first information to obtain forward error correction code word information.

[0138] According to the technical solution provided in the present application, a change amount of the forward error correcting codeword information compared with the first forward error correcting mother code is indicated, in order to help implement a flexible configuration of the forward error correcting codeword information.

[0139] It should be understood that the sequence numbers of the above processes do not imply an execution order. The execution order of the processes should be determined based on the functions and internal logic of the processes, and should not be considered as any limitation on the implementation process of the embodiments of the present application.

[0140] It should be further understood that in the embodiments of the present application, unless otherwise specified or logical contradiction occurs, the terms and / or descriptions in different embodiments are consistent and may be cross-referenced, and the technical features of different embodiments may be combined based on their internal logical relationships to form new embodiments.

[0141] It will be understood that in the foregoing embodiments of the present application, the methods performed by the communication device may alternatively be performed by components (e.g., chips or circuits) that may be configured within the communication device.

[0142] The encoding configuration method provided in the embodiment of the present application has been described in detail above with reference to Figures 2, 3, 4, and 5. The aforementioned encoding configuration method has been described mainly in terms of the interactions between network elements. It will be understood that, in order to implement the aforementioned functions, each device includes a corresponding hardware structure and / or software module for performing each function. Those skilled in the art should realize that the present application can be implemented by hardware or a combination of hardware and computer software, in combination with the example units and algorithm steps described in the embodiments disclosed herein. Whether the functions are performed by hardware or by hardware driven by computer software depends on the specific application and design constraints of the technical solution. Those skilled in the art may use different methods to implement the functions described for each specific application, but the implementation should not be considered to depart from the scope of the present application.

[0143] In the following, the encoding configuration device provided in the embodiment of the present application will be described in detail with reference to Fig. 6 and Fig. 7. It should be understood that the description of the embodiment of the device corresponds to the description of the embodiment of the method. Therefore, for the contents that are not described in detail, please refer to the above embodiment of the method. For the sake of brevity, some of the contents will not be described again in this specification.

[0144] In the embodiment of the present application, the transmitting end device or the receiving end device may be divided into functional modules based on the above-mentioned method example. For example, each functional module may be obtained by division based on its corresponding function, or two or more functions may be integrated into one processing module. The integrated module may be implemented in the form of hardware, or may be implemented in the form of a software functional module. It should be noted that in the embodiment of the present application, the division of modules is an example, and is merely a logical division of functions. In actual implementation, other division methods may be used. The example in which each functional module is obtained by division based on its corresponding function is used below for description.

[0145] 6 is a schematic diagram of an example of the structure of an encoding configuration device according to the present application. Any device involved in any one of the above methods 200 to 400, such as an optical line terminal and an optical network unit, may be implemented by the encoding configuration device shown in FIG.

[0146] It should be understood that the encoding configuration apparatus 600 may be an entity device, or may be a component (eg, an integrated circuit or chip) of an entity device, or may be a functional module within an entity device.

[0147] As shown in FIG. 6, the encoding configuration device 600 includes one or more processors 610. The processor 610 may store execution instructions for executing the method of the embodiment of the present application. Optionally, the processor 610 may call an interface to realize the receiving function and the transmitting function. The interface may be a logical interface or a physical interface, but is not limited thereto. For example, the interface may be a transceiver circuit or an interface circuit. The transceiver circuit or the interface circuit configured to realize the receiving function and the transmitting function may be separated or may be integrated together. The transceiver circuit or the interface circuit may be configured to read and write the code / data, or the transceiver circuit or the interface circuit may be configured to transmit or forward a signal.

[0148] Optionally, the interface may be implemented by a transceiver. Optionally, the encoding configuration device 600 may further include a transceiver 630. The transceiver 630 may be referred to as a transceiver unit, a transceiver machine, a transceiver circuit, or a transceiver, and is configured to realize receiving and transmitting functions.

[0149] Optionally, the encoding configuration device 600 may further include a memory 620. The specific location of the memory 620 is not particularly limited in this embodiment of the present application. The memory may be integrated into the processor or may be independent of the processor. If the encoding configuration device 600 does not include a memory, the encoding configuration device 600 only needs to have a processing function, and the memory may be deployed in another location (e.g., a cloud system).

[0150] The processor 610, memory 620, and transceiver 630 communicate with each other through interconnect paths to transfer control and / or data signals.

[0151] Although not shown, it will be appreciated that the encoding configuration device 600 may further include other devices, such as an input device, an output device, or a battery.

[0152] Optionally, in some embodiments, the memory 620 may store execution instructions for executing the method of the embodiment of the present application. The processor 610 may execute the instructions stored in the memory 620, and in combination with other hardware (e.g., the transceiver 630), complete the steps performed in the following method. For specific operation processes and beneficial effects, please refer to the description in the above method embodiment.

[0153] The method disclosed in the embodiments of the present application may be applied to or implemented by the processor 610. The processor 610 may be an integrated circuit chip and has signal processing capabilities. In the implementation process, the steps of the method may be completed by using instructions in the form of hardware integrated logic circuits or software of the processor. The processor may be a general-purpose processor, a digital signal processor (DSP), an application-specific integrated circuit (ASIC), a field programmable gate array (FPGA), or another programmable logic device, a discrete gate or transistor logic device, or a discrete hardware component. The method, steps, and logic block diagrams disclosed in the embodiments of the present application may be implemented or performed. The general-purpose processor may be a microprocessor, or the processor may be any ordinary processor, etc. The steps of the method disclosed in connection with the embodiments of the present application may be directly executed and completed by a hardware decoding processor, or may be executed and completed by using a combination of hardware and software modules in the decoding processor. The software module may be located in a storage medium mature in the art, such as a random access memory (RAM), a flash memory, a read-only memory (ROM), a programmable read-only memory, an electrically erasable programmable memory, or a register. The storage medium is located in the memory, and the processor reads the instructions in the memory and completes the steps of the aforementioned method in combination with the hardware of the processor.

[0154] It will be appreciated that memory 620 may be volatile or non-volatile memory, or may include both volatile and non-volatile memory. The non-volatile memory may be read-only memory ROM, programmable read-only memory (PROM), erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), or flash memory. The volatile memory may be random access memory RAM, and may act as an external cache. By way of illustrative and non-limiting example, many forms of RAM are available, such as static random access memory (static RAM, SRAM), dynamic random access memory (dynamic RAM, DRAM), synchronous dynamic random access memory (synchronous DRAM, SDRAM), double data rate synchronous dynamic random access memory (DDR SDRAM), enhanced synchronous dynamic random access memory (enhanced SDRAM, ESDRAM), synchronous link dynamic random access memory (synchlink DRAM, SLDRAM), and Direct Rambus random access memory (direct rambus RAM, DR RAM). It should be noted that the memory of the systems and methods described herein includes, but is not limited to, these and any other suitable types of memory.

[0155] FIG. 7 is a schematic diagram of the structure of an example of an encoding configuration device according to the present application.

[0156] Optionally, the specific form of the encoding configuration device 700 may be a general-purpose computer device or a chip in a general-purpose computer device, which is not limited in this embodiment of the present application. As shown in FIG. 7, the encoding configuration device includes a processing unit 710 and a transceiver unit 720.

[0157] In particular, the encoding configuration device 700 may be any device in the present application and may realize a function that may be performed by a device. It should be understood that the encoding configuration device 700 may be an entity device, or may be a component (e.g., an integrated circuit or chip) of an entity device, or may be a functional module within an entity device.

[0158] In a possible design, the encoding configuration device 700 may be an optical line terminal in the above-mentioned method embodiment, or may be a chip configured to realize the functions of the optical line terminal in the above-mentioned method embodiment.

[0159] For example, the processing unit 710 is configured to determine first information, the first information indicating an amount of change in forward error correcting code word information compared to a first forward error correcting mother code, and the transceiver unit 720 is configured to transmit the first information to the optical network unit.

[0160] Optionally, the transceiver unit 720 is further configured to receive capability report information, where the capability report information indicates forward error correction mother codes supported by the optical network unit, and where the forward error correction mother codes supported by the optical network unit include a first forward error correction mother code.

[0161] Optionally, the transceiver unit 720 is further configured to send capability inquiry information, which is used to inquire about a forward error correction mother code supported by the optical network unit.

[0162] It should be understood that when the encoding configuration device 700 is an optical line termination device, the transceiver unit 720 of the encoding configuration device 700 may be implemented by using a communication interface (e.g., a transceiver or an input / output interface), and the processing unit 710 of the encoding configuration device 700 may be implemented by using at least one processor, and may correspond, for example, to the processor 610 shown in FIG. 6 .

[0163] Optionally, the encoding configuration device 700 may further include a storage unit. The storage unit may be configured to store instructions or data. The processing unit may retrieve the instructions or data stored in the storage unit to perform corresponding operations.

[0164] It should be understood that the specific processes by which the units perform the above corresponding steps are detailed in the above method embodiments, and for the sake of brevity, the details are not described herein.

[0165] In another possible design, the encoding configuration device 700 may be an optical network unit device in the aforementioned method embodiments, or may be a chip configured to realize the functions of the optical network unit in the aforementioned method embodiments.

[0166] For example, the transceiver unit 720 is configured to receive first information, the first information indicating an amount of change in the forward error correcting code word information compared to a first forward error correcting mother code, and the processing unit 710 is configured to determine the forward error correcting code word information based on the first information.

[0167] Optionally, the transceiver unit 720 is further configured to transmit capability report information, where the capability report information indicates forward error correction mother codes supported by the optical network unit, and the forward error correction mother codes supported by the optical network unit include a first forward error correction mother code.

[0168] Optionally, the transceiver unit 720 is further configured to receive capability enquiry information, which is used to enquire about forward error correction mother codes supported by the optical network unit.

[0169] It should be understood that when the encoding configuration device 700 is an optical network unit device, the transceiver unit 720 of the encoding configuration device 700 may be implemented by using a communication interface (e.g., a transceiver or an input / output interface) and may, for example, correspond to the transceiver 630 shown in FIG. 6, and the processing unit 710 of the encoding configuration device 700 may be implemented by using at least one processor and may, for example, correspond to the processor 610 shown in FIG. 6.

[0170] Optionally, the encoding configuration device 700 may further include a storage unit. The storage unit may be configured to store instructions or data. The processing unit may retrieve the instructions or data stored in the storage unit to perform corresponding operations.

[0171] It should be understood that the specific processes by which the units perform the above corresponding steps have been described in detail in the above method embodiments, and for the sake of brevity, the details will not be described herein.

[0172] It should be further understood that the device 700 may be further configured to realize the functions of the optical line termination and the optical network unit in the above-mentioned method embodiments. The transceiver unit 720 may be configured to perform operations related to receiving and transmitting, and the processing unit 710 may be configured to perform other operations other than receiving and transmitting. For details, refer to the description of the above-mentioned method embodiments, and the details will not be re-enumerated in this specification.

[0173] Also, in this application, the encoding configuration device 700 is presented in the form of a functional module. A "module" in this specification may be an application specific integrated circuit ASIC, a circuit, a processor and memory executing one or more software or firmware programs, an integrated logic circuit, and / or another device capable of providing the aforementioned functions. In a simple embodiment, a person skilled in the art will understand that the device 700 may be in the form shown in FIG. 7. The processing unit 710 may be implemented by using the processor 610 shown in FIG. 6. Optionally, if the encoding configuration device shown in FIG. 6 includes a memory 620, the processing unit 710 may be implemented by using the processor 610 and the memory 620. The transceiver unit 720 may be implemented by using the transceiver 630 shown in FIG. 6. The transceiver 630 includes a receiving function and a transmitting function. In particular, the processor is implemented by executing a computer program stored in the memory. Optionally, if the apparatus 700 is a chip, the functions and / or implementation processes of the transceiver unit 720 may alternatively be implemented by using pins, circuits, etc. Optionally, the memory may be a storage unit within the chip, such as a register or cache. The storage unit may be a storage unit within the computing device, located external to the chip, such as memory 620 shown in FIG. 6, or may be a storage unit located within another system or device, but not within the computing device.

[0174] Aspects or features of the present application may be implemented as a method, apparatus, or article of manufacture using standard programming and / or engineering techniques. The term "article of manufacture" as used in this application encompasses a computer program that may be accessed from any computer-readable device, carrier, or medium. For example, computer-readable media may include, but are not limited to, magnetic storage components (e.g., hard disks, floppy disks, or magnetic tapes), optical disks (e.g., compact discs (CDs) and digital versatile discs (DVDs)), smart cards, and flash memory components (e.g., erasable programmable read-only memory (EPROM), cards, sticks, or key drives). Additionally, various storage media described herein may represent one or more devices and / or another machine-readable medium configured to store information. The term "machine-readable medium" may include, but is not limited to, wireless channels and various other media capable of storing, containing, and / or carrying instructions and / or data.

[0175] According to the method provided in the embodiment of the present application, the present application further provides a computer program product. The computer program product includes a computer program code. When the computer program code is executed in a computer, the computer is enabled to execute the method according to any of the embodiments shown in FIG. 2 or FIG. 3.

[0176] According to the method provided in the embodiment of the present application, the present application further provides a computer-readable medium. The computer-readable medium stores a program code. When the program code is executed in a computer, the computer is enabled to execute the method according to any of the embodiments shown in FIG. 2 or FIG. 3.

[0177] According to the method provided in the embodiments of the present application, the present application further provides a system including the aforementioned apparatus or device.

[0178] All or part of the above-mentioned embodiments may be implemented by using software, hardware, firmware, or any combination thereof. When software is used to implement the embodiments, all or part of the embodiments may be implemented in the form of a computer program product. The computer program product includes one or more computer instructions. When the computer instructions are loaded into a computer and executed, the procedures or functions according to the embodiments of the present application are generated in whole or in part. The computer may be a general-purpose computer, a special-purpose computer, a computer network, or another programmable device. The computer instructions may be stored in a computer-readable storage medium or transmitted from a computer-readable storage medium to another computer-readable storage medium. For example, the computer instructions may be transmitted from a website, computer, server, or data center to another website, computer, server, or data center in a wired (e.g., coaxial cable, fiber optic, or digital subscriber line (DSL)) or wireless (e.g., infrared, radio, or microwave) manner. A computer-readable storage medium may be any available medium that can be accessed by a computer, or a data storage device incorporating one or more available media, such as a server or a data center. The available medium may be a magnetic medium (e.g., a floppy disk, a hard disk, or a magnetic tape), an optical medium (e.g., a high-density digital video disc (DVD)), a semiconductor medium (e.g., a solid-state disc (SSD)), etc.

[0179] As used herein, terms such as "component," "module," and "system" are used to represent computer-related entities, hardware, firmware, a combination of hardware and software, software, or software being executed. For example, a component may be, but is not limited to, a process running on a processor, a processor, an object, an executable, a thread of execution, a program, and / or a computer. As illustrated by the use of diagrams, both an application running on a computing device and a computing device may be a component. One or more components may be within a process and / or thread of execution, and a component may be located on one computer and / or distributed among two or more computers. Additionally, these components may execute from various computer-readable media that store various data structures. A component may communicate by using local and / or remote processes based on signals having, for example, one or more data packets (e.g., data from two components interacting with another component in a local system, in a distributed system, and / or across a network such as the Internet that interacts with another system by using signals).

[0180] It should be further understood that the term "and / or" herein indicates only an associative relationship between related objects, and represents three possible relationships. For example, A and / or B may represent three cases: when only A is present, when both A and B are present, and when only B is present. In addition, the character " / " herein generally represents an "or" relationship between related objects.

[0181] In addition, it should be further understood that the numbers "first", "second", etc. introduced in the embodiments of the present application are merely intended to distinguish different objects, for example, to distinguish different "information", "devices", or "units". Understanding of specific objects and the correspondence between different objects should be determined based on the functions and internal logic of the objects, and should not be considered as any limitation on the implementation process of the embodiments of the present application.

[0182] For the purpose of convenient and concise description, it will be clearly understood by those skilled in the art that the detailed operation processes of the above-mentioned systems, devices and units shall be referred to the corresponding processes of the above-mentioned method embodiments, and the details will not be described again in this specification.

[0183] In some embodiments provided in the present application, it should be understood that the disclosed system, device, and method may be implemented differently. For example, the described device embodiment is merely an example. For example, the division of units is merely a division of logical functions, and may be other divisions in actual implementation. For example, multiple units or components may be combined or integrated into another system, or some features may be ignored or not implemented. In addition, the shown or discussed mutual couplings or direct couplings or communication connections may be implemented by using some interfaces. Indirect couplings or communication connections between devices or units may be implemented in electronic, mechanical, or other forms.

[0184] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, may be located in one location, or may be distributed across multiple network units. Some or all of the units may be selected based on actual requirements to achieve the objectives of the solutions of the embodiments.

[0185] In addition, the functional units of the embodiments of the present application may be integrated into one processing unit, each of the units may exist physically independent, or two or more units may be integrated into one unit.

[0186] When a function is implemented in the form of a software functional unit and sold or used as an independent product, the function may be stored in a computer-readable storage medium. Based on such understanding, the technical solution of the present application may be implemented in the form of a software product basically, or a part of the contribution to ordinary technology or a part of the technical solution may be implemented in the form of a software product. The computer software product is stored in a storage medium and includes some instructions for instructing a computer device (which may be a personal computer, a server, a network device, etc.) to execute all or part of the steps of the method described in the embodiments of the present application. The aforementioned storage medium includes any medium that can store program code, such as a USB flash drive, a removable hard disk, a read-only memory (ROM), a random access memory (RAM), a magnetic disk, or an optical disk.

[0187] The above description is merely a specific implementation of the present application, and is not intended to limit the scope of protection of the present application. Any modifications or replacements that are easily conceived by those skilled in the art within the technical scope disclosed in this application will fall within the scope of protection of the present application. Therefore, the scope of protection of the present application is subject to the scope of protection of the claims. [Explanation of symbols]

[0188] 110 Optical Line Terminal 120 Optical Network Unit 200~400 methods 600 Encoding Component 610 Processor 620 Memory 630 Transceiver 700 Encoding Component 710 Processing Unit 720 Transceiver Unit

Claims

1. receiving, by an optical network unit, first information, the first information indicative of a change in forward error correcting codeword information compared to a first forward error correcting mother code; determining, by the optical network unit, the forward error correction code word information based on the first information; An encoding configuration method including:

2. 2. The method of claim 1, wherein the first information includes second information, the second information indicating an amount of change in payload information of the forward error correcting code word information compared to payload information of the first forward error correcting mother code by using a bit sequence.

3. 3. The method of claim 2, wherein the bit sequence of the second information includes a first sequence, and a value of the first sequence is 0 representing that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the first sequence are shortened.

4. 3. The method of claim 2, wherein the bit sequence of the second information includes a first sequence, and a value corresponding to the first sequence is 1, representing that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the first sequence are shortened.

5. 5. The method according to claim 1, wherein the first information further includes third information, the third information indicating an amount of change in parity bit information of the forward error correcting code word information compared to parity bit information of the first forward error correcting mother code by using the bit sequence.

6. 6. The method of claim 5, wherein the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 0, representing that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the third sequence are punctured.

7. 6. The method of claim 5, wherein the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 1, representing that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the third sequence are punctured.

8. 8. The method of claim 1, wherein the first information includes a first value indicating that M bits of payload information of the first forward error correcting mother code are shortened based on a first order to obtain payload information of the forward error correcting code word information, and M is obtained by multiplying the first value by 256 or 128.

9. 9. The method according to claim 1, wherein the first information includes a second value indicating that N bits of the parity bit information of the first forward error correcting mother code are punctured based on a second order to obtain parity bit information of the forward error correcting code word information, and N is obtained by multiplying the second value by 256 or 128.

10. 10. The method of claim 8 or 9, wherein the first order and / or the second order is back-to-front or front-to-back.

11. 11. The method of claim 1, wherein the first information further comprises fourth information, the fourth information indicating when the first information becomes valid.

12. The first information is carried in a first message, the first message comprising: The method according to any one of claims 1 to 11, comprising at least one of a Physical Layer Operation, Administration and Maintenance (PLOAM) message, an Optical Network Terminal Management and Control Interface (OMCI) message, and an Operation, Administration and Maintenance (OAM) message.

13. 13. The method according to claim 1, further comprising the step of transmitting, by the optical network unit, capability report information, the capability report information indicating forward error correction mother codes supported by the optical network unit, the forward error correction mother codes supported by the optical network unit including the first forward error correction mother code.

14. 14. The method according to claim 1, further comprising the step of receiving, by the optical network unit, capability enquiry information, the capability enquiry information being used to enquire about the forward error correction mother codes supported by the optical network unit.

15. determining, by an optical line terminal, first information, the first information indicative of a change in forward error correcting codeword information compared to a first forward error correcting mother code; transmitting the first information to an optical network unit by the optical line terminal; An encoding configuration method including:

16. 16. The method of claim 15, wherein the first information includes second information, the second information indicating an amount of change in payload information of the forward error correcting code word information compared to payload information of the first forward error correcting mother code by using a bit sequence.

17. 17. The method of claim 16, wherein the bit sequence of the second information includes a first sequence, and a value of the first sequence is 0 representing that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the first sequence are shortened.

18. 17. The method of claim 16, wherein the bit sequence of the second information includes a first sequence, and a value corresponding to the first sequence is 1, representing that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the first sequence are shortened.

19. 19. The method according to claim 15, wherein the first information further includes third information, the third information indicating an amount of change in parity bit information of the forward error correcting code word information compared to parity bit information of the first forward error correcting mother code by using the bit sequence.

20. 20. The method of claim 19, wherein the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 0, representing that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the third sequence are punctured.

21. 20. The method of claim 19, wherein the bit sequence of the third information includes a third sequence, and a value corresponding to the third sequence is 1, representing that 256 bits or 128 bits of the first forward error correcting mother code corresponding to the third sequence are punctured.

22. 22. The method of claim 15, wherein the first information includes a first value indicating that M bits of payload information of the first forward error correcting mother code are shortened based on a first order to obtain payload information of the forward error correcting code word information, where M is obtained by multiplying the first value by 256 or 128.

23. 23. The method of claim 15, wherein the first information includes a second value indicating that N bits of parity bit information of the first forward error correcting mother code are punctured based on a second order to obtain parity bit information of the forward error correcting code word information, and N is obtained by multiplying the second value by 256 or 128.

24. 24. The method of claim 22 or 23, wherein the first order and / or the second order is back-to-front or front-to-back.

25. 25. The method of claim 15, wherein the first information further comprises fourth information, the fourth information indicating when the first information becomes valid.

26. The first information is carried in a first message, the first message comprising:

26. The method of any one of claims 15 to 25, comprising at least one of a Physical Layer Operation, Administration and Maintenance (PLOAM) message, an Optical Network Terminal Management and Control Interface (OMCI) message, and an Operation, Administration and Maintenance (OAM) message.

27. 27. The method of claim 15, further comprising the step of receiving, by the optical line terminal, capability report information, the capability report information indicating forward error correction mother codes supported by the optical network unit, the forward error correction mother codes supported by the optical network unit including the first forward error correction mother code.

28. 28. The method according to claim 15, further comprising the step of transmitting capability inquiry information by the optical line terminal, the capability inquiry information being used to inquire about the forward error correction mother code supported by the optical network unit.

29. a transceiver unit configured to receive first information, the first information indicating a change in forward error correcting codeword information compared to a first forward error correcting mother code; a processing unit configured to determine the forward error correction codeword information based on the first information; An encoding configuration device including:

30. a processing unit configured to determine first information, the first information indicative of a change in forward error correcting codeword information compared to a first forward error correcting mother code; a transceiver unit configured to transmit the first information to an optical network unit; An encoding configuration device including:

31. 1. A communications device including a processor, coupled to a memory, the processor reading instructions in the memory and then: Carrying out a method according to any one of claims 1 to 14, or A communications device configured to perform a method according to any one of claims 15 to 28.

32. 1. A chip system comprising: To enable a communication device in which the chip system is installed to carry out the method according to any one of claims 1 to 14, or A chip system comprising a processor configured to call a computer program from a memory and execute the computer program to enable a communication device in which the chip system is installed to perform the method of any one of claims 15 to 28.

33. A communication system including an optical line terminal and an optical network unit, The optical network unit is adapted to perform the method according to any one of claims 1 to 14, A communication system, wherein the optical line terminal is configured to perform the method according to any one of claims 15 to 28.

34. A computer-readable medium storing program code which, when executed in a computer, enables the computer to carry out the method according to any one of claims 1 to 14; or A computer readable medium enabling the computer to carry out the method of any one of claims 15 to 28.

35. A computer program product comprising computer program code which, when executed on a computer, enables the computer to carry out the method according to any one of claims 1 to 14; or A computer program product, the computer being enabled to carry out the method according to any one of claims 15 to 28.

Images