Semiconductor switch

Abstract

To protect between a control terminal and a main terminal from both positive and negative over-voltages in each of a plurality of semiconductor elements connected in series.SOLUTION: A semiconductor switch includes: a series circuit in which a normally-off switching element and n normally-on transistors are connected in series, a control terminal of a first transistor among the n transistors being electrically connected to a second main terminal of the switching element; a first clamp circuit which clamps a voltage generated between the control terminals of adjacent transistors among the n transistors and a voltage generated between the control terminal and a first main terminal of an nth transistor among the n transistors; and a second clamp circuit which clamps, with both positive and negative polarities, a voltage generated between the control terminal and the second main terminal in the switching element and in each of the n transistors.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present disclosure relates to semiconductor switches. [Background technology]

[0002] 2. Description of the Related Art Conventionally, there has been known a high-voltage switch in which a normally-off type semiconductor element and a plurality of normally-on type semiconductor elements are connected in series (see, for example, Patent Documents 1 and 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Patent No. 6845138 [Patent Document 2] Patent No. 5399520 Summary of the Invention [Problem to be solved by the invention]

[0004] The high-voltage switch described above is turned on or off by applying a high-level or low-level voltage signal to the gate terminal of the normally-off semiconductor element located at the bottom row. However, it does not have a function to protect the control terminal and main terminal of each of the multiple semiconductor elements connected in series from both positive and negative overvoltages.

[0005] The present disclosure provides a semiconductor switch capable of protecting each of a plurality of semiconductor elements connected in series from both positive and negative overvoltages between a control terminal and a main terminal. [Means for solving the problem]

[0006] The semiconductor switch according to the first aspect comprises: a normally-off switching element having a control terminal, a first main terminal, and a second main terminal; a series circuit in which n normally-on type transistors, each having a control terminal, a first main terminal, and a second main terminal, are connected in series, where n is an integer equal to or greater than 2, and the control terminal of a first transistor among the n transistors is electrically connected to the second main terminal of the switching element; a first clamp circuit that clamps a voltage generated between the control terminals of adjacent transistors among the n transistors and a voltage generated between the control terminal of an n-th transistor among the n transistors and the first main terminal; and a second clamp circuit that clamps the voltage generated between the control terminal and the second main terminal for the switching element and each of the n transistors, in both positive and negative polarities. Effect of the Invention

[0007] According to the present disclosure, it is possible to protect the switching element and each of the n transistors from both positive and negative overvoltages between the control terminal and the second main terminal. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram showing an example of the configuration of a pulse power supply to which a semiconductor switch according to an embodiment is applied; [Diagram 2] FIG. 2 is a circuit diagram illustrating a configuration example of a semiconductor switch according to an embodiment. [Diagram 3] FIG. 11 is a circuit diagram showing a configuration example of a semiconductor switch according to a comparative example; [Figure 4] FIG. 1 illustrates an example of both positive and negative overvoltages. [Diagram 5] FIG. 13 is a diagram illustrating a case where both positive and negative overvoltages are clamped. [Figure 6] 1 is a diagram showing the relationship between a difference Y between the time constants of adjacent RC circuits and the maximum shared voltage among the voltages shared by each of a plurality of semiconductor elements. [Figure 7] This is a voltage drive signal input between the gate and source of each semiconductor element. [Figure 8]This is the pulse voltage applied to the load when there is no short circuit in the load. [Figure 9] 11A and 11B are diagrams illustrating voltage waveforms between the gate and source of each semiconductor element when a load is short-circuited. [Figure 10] FIG. 10 is a diagram showing the voltage waveforms in FIG. 9 with the time axis enlarged. [Figure 11] FIG. 13 is a diagram showing waveforms of clamped gate-source voltages of each semiconductor element when a load is short-circuited. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] The following describes the embodiments.

[0010] Fig. 1 is a diagram showing an example of the configuration of a pulse power supply to which a semiconductor switch according to an embodiment is applied. The pulse power supply 201 shown in Fig. 1 is a high-voltage pulse power supply circuit that applies a high-voltage pulse generated by a half-bridge inverter circuit 10 to a load 11. The pulse power supply 201 includes the inverter circuit 10 and a complementary control circuit 19.

[0011] The inverter circuit 10 includes a capacitor 18 that is charged by a DC power supply 12 via a resistor 13, a resistor 14 that limits a discharge current from the capacitor 18, a high-side semiconductor switch SW1, a low-side semiconductor switch SW2, and a resistor 15 connected in parallel to the semiconductor switch SW2. The inverter circuit 10 further includes a drive circuit 16 that drives the semiconductor switch SW1, and a drive circuit 17 that drives the semiconductor switch SW2. The resistance value of the resistor 15 is sufficiently larger than the resistance value of the resistor 14.

[0012] The complementary control circuit 19 generates a high voltage pulse to be applied to the load 11 by causing the drive circuits 16 and 17 to complementarily switch the upper and lower high voltage semiconductor switches, that is, the semiconductor switch SW1 and the semiconductor switch SW2.

[0013] During a period when the semiconductor switch SW1 is on and the semiconductor switch SW2 is off, a high voltage is applied from the capacitor 18 to the load 11. During a period when the semiconductor switch SW1 is off and the semiconductor switch SW2 is on, the charge stored in the load 11 is discharged via the semiconductor switch SW2. This generates a high voltage pulse that is applied to the load 11.

[0014] 2 is a circuit diagram showing an example of a configuration of a semiconductor switch according to an embodiment. A semiconductor switch 101 shown in FIG. 2 is applicable to the semiconductor switch SW1 or the semiconductor switch SW2. The semiconductor switch 101 includes a first terminal 31, a second terminal 32, and a third terminal 33.

[0015] 1 and 2, when the semiconductor switch 101 is the above-mentioned semiconductor switch SW1, the first terminal 31 is electrically connected to the node 20, the second terminal 32 is electrically connected to the node 21, and the third terminal 33 is electrically connected to the drive circuit 16. When the semiconductor switch 101 is the above-mentioned semiconductor switch SW2, referring to Figs. 1 and 2, the first terminal 31 is electrically connected to the node 21, the second terminal 32 is electrically connected to the node 22, and the third terminal 33 is electrically connected to the drive circuit 17. A high-level or low-level voltage signal is input to the third terminal 33 from the drive circuit 16 or the drive circuit 17.

[0016] 2, the semiconductor switch 101 is a circuit having a configuration in which a plurality of semiconductor elements are connected in series. The semiconductor switch 101 includes a normally-off switching element M0 and a series circuit 30 in which n normally-on transistors J1 to Jn are connected in series. n is an integer of 2 or more.

[0017] The switching element M0 is a normally-off type semiconductor element. Examples of the switching element M0 include semiconductor switching elements such as a Metal Oxide Semiconductor Field Effect Transistor (MOSFET), a Junction Field Effect Transistor (JFET), a Static Induction Transistor (SIT), a Bipolar Junction Transistor (BJT), or an Insulated Gate Bipolar Transistor (IGBT).

[0018] A MOSFET, JFET, or BJT has a gate corresponding to the control terminal, a drain corresponding to the first main terminal, and a source corresponding to the second main terminal. A BJT has a base corresponding to the control terminal, a collector corresponding to the first main terminal, and an emitter corresponding to the second main terminal. An IGBT has a gate corresponding to the control terminal, a collector corresponding to the first main terminal, and an emitter corresponding to the second main terminal.

[0019] The switching element M0 may be a low-voltage element using Si (silicon) or a high-voltage element using a wide bandgap semiconductor such as SiC (silicon carbide) or GaN (gallium nitride). The switching element M0 is, for example, a switching element using a wide bandgap semiconductor such as a SiC-MOSFET. By employing an element using a wide bandgap semiconductor, the voltage that can be shared by the switching element M0 out of the voltage applied between the first terminal 31 and the second terminal 32 can be increased, and the semiconductor switch 101 can be made to withstand high voltage. This makes it possible to increase the voltage that can be applied to the load 11 via the semiconductor switch 101, for example.

[0020] 2 illustrates an example in which the switching element M0 is a MOSFET having a gate G0, a drain D0, and a source S0. Unless otherwise specified, the following description will be given of the case in which the switching element M0 is a MOSFET.

[0021] The transistors J1 to Jn are normally-on type semiconductor elements, and examples of the transistors J1 to Jn include semiconductor switching elements such as normally-on type JFETs or MOSFETs.

[0022] The gates G1 to Gn correspond to the control terminals of the transistors J1 to Jn, the drains D1 to Dn correspond to the first main terminals of the transistors J1 to Jn, and the sources S1 to Sn correspond to the second main terminals of the transistors J1 to Jn.

[0023] The transistors J1 to Jn may be low-voltage elements using Si (silicon) or the like, but are preferably high-voltage elements using wide bandgap semiconductors such as SiC (silicon carbide) or GaN (gallium nitride). The transistors J1 to Jn are, for example, transistors using wide bandgap semiconductors such as SiC-JFETs. By employing elements using wide bandgap semiconductors, the voltage that can be shared by the transistors J1 to Jn out of the voltage applied between the first terminal 31 and the second terminal 32 can be increased, and the semiconductor switch 101 can be made to withstand high voltage. This makes it possible to increase the voltage that can be applied to the load 11 via the semiconductor switch 101, for example.

[0024] 2 illustrates an example in which each of the transistors J1 to Jn is a JFET having a gate, a drain, and a source. Unless otherwise specified, the following description will be given of the case in which the transistors J1 to Jn are JFETs.

[0025] The n transistors J1 to Jn in the series circuit 30 are connected in series from the first transistor J1 to the nth transistor Jn in the direction from the source to the drain (in other words, from the second terminal 32 to the first terminal 31). The source S1 of the first transistor J1 is electrically connected to the drain D0 of the switching element M0. The gate G1 of the first transistor J1 is electrically connected to the source S0 of the switching element M0 via the resistor elements RG1 and RB0. In this manner, the transistor J1 is cascode-connected to the switching element M0. The drain Dk of the kth transistor Jk is electrically connected to the source Sk+1 of the (k+1)th transistor Jk+1, where k is an integer from 1 to (n-1).

[0026] A drain Dn of the n-th transistor Jn is electrically connected to the first terminal 31. A source S0 of the switching element M0 is electrically connected to the second terminal 32. Thus, the series circuit 30 forms a current path between the first terminal 31 and the second terminal 32. A gate G0 of the switching element M0 is electrically connected to the third terminal 33.

[0027] The semiconductor switch 101 includes a first clamp circuit 40. The first clamp circuit 40 clamps the voltage occurring between the gates of adjacent transistors among the n transistors J1 to Jn, and the voltage occurring between the gate Gn and drain Dn of the n-th transistor jn. By clamping these voltages, the first clamp circuit 40 can protect the drain-source region of each of the transistors J1 to Jn from overvoltage. Between the gates of adjacent transistors among the transistors J1 to Jn means between the gate G1 of the transistor J1 and the gate G2 of the transistor J2, between the gate G2 of the transistor J2 and the gate G3 of the transistor J3, ..., between the gate Gn-1 of the transistor Jn-1 and the gate Gn of the transistor Jn.

[0028] In this example, the first clamp circuit 40 is provided for each of the n transistors J1 to Jn, and includes a plurality of diodes CD1 to CDn, the anodes of which are electrically connected to the gates of the corresponding transistors.

[0029] The diodes CD1 to CDn-1 are an example of a first diode whose cathode is electrically connected to the gate of a transistor adjacent to the corresponding transistor. The diodes CD1 to CDn-1 are clamp diodes that clamp the voltage generated between the gates of adjacent transistors among the n transistors J1 to Jn. The diodes CD1 to CDn-1 are each electrically connected between adjacent gate nodes among the gate nodes GN1 to GNn.

[0030] 2, the diode CD1 is one of the first diodes having an anode electrically connected to the gate G1 of the corresponding transistor J1 and a cathode electrically connected to the gate G2 of the transistor J2 adjacent to the corresponding transistor J1. The other first diodes are similar. For example, the diode CDn-1 is one of the first diodes having an anode electrically connected to the gate Gn-1 of the corresponding transistor Jn-1 and a cathode electrically connected to the gate Gn of the transistor Jn adjacent to the corresponding transistor Jn-1.

[0031] The rated voltage of the diodes CD1 to CDn-1 is set to, for example, 80% to 95% of the rated voltage of the corresponding transistor. By setting the rated voltage in this manner, in the event of an overvoltage, the anode-cathode of any of the diodes CD1 to CDn-1 is more likely to short-circuit before the drain-source of the transistor corresponding to that diode. This reduces the possibility of the drain-source of each of the transistors J1 to Jn failing due to an overvoltage.

[0032] The diode CDn is an example of a second diode whose cathode is electrically connected to the first main terminal of the nth transistor. The diode CDn is a clamp diode that clamps the voltage generated between the gate Gn and drain Dn of the nth transistor jn. The diode CDn is electrically connected between the gate node GNn and the drain Dn of the transistor Jn.

[0033] In the example shown in FIG. 2, the diode CDn is a second diode whose anode is electrically connected to the gate Gn of the corresponding n-th transistor Jn and whose cathode is electrically connected to the drain Dn of the n-th transistor Jn.

[0034] The semiconductor switch 101 includes a second clamp circuit 50. The second clamp circuit 50 clamps the voltages occurring between the gate and source of the switching element M0 and each of the n transistors J1 to Jn in both positive and negative polarities. By clamping these voltages in both positive and negative polarities, the second clamp circuit 50 can protect the gate and source of the switching element M0 and each of the n transistors J1 to Jn from both positive and negative overvoltages. The second clamp circuit 50 protects between the gate G0 and source S0 of the switching element M0, between the gate G1 and source S1 of the transistor J1, ..., and between the gate Gn and source Sn of the transistor Jn from both positive and negative overvoltages.

[0035] In this example, the second clamp circuit 50 includes a first clamp unit TD0 that clamps the voltage generated between the gate G0 and source S0 of the switching element M0 in both positive and negative polarities. The first clamp unit TD0 has the same characteristics as multiple Zener diodes connected with their forward directions in the opposite directions to each other between the gate G0 and source S0 of the switching element M0.

[0036] In this example, the second clamp circuit 50 includes a plurality of second clamp units TD1 to TDn that are provided for each of the n transistors J1 to Jn and clamp the voltage occurring between the gate and source of the corresponding transistor in both positive and negative polarities. The second clamp unit TD1 has the same characteristics as a plurality of Zener diodes connected with their forward directions in opposite directions between the gate G1 and source S1 of the transistor J1. The same is true for the other second clamp units. For example, the second clamp unit TDn has the same characteristics as a plurality of Zener diodes connected with their forward directions in opposite directions between the gate Gn and source Sn of the transistor Jn.

[0037] Examples of the first clamp portion TD0 or the second clamp portions TD1 to TDn include a TVS (Transient Voltage Suppressor) diode, a varistor, a surge arrester, and a micro gap that generates a micro gap discharge.

[0038] Here, a phenomenon in which an overvoltage occurs between the gate and source of each of the switching element M0 and the n transistors J1 to Jn, and the necessity for protection against the overvoltage will be described.

[0039] 1, semiconductor switches SW1 and SW2 open and close a voltage of, for example, several kV. The source of the low-side semiconductor switch SW2 is grounded at node 22, which has a constant potential, so the source potential of the semiconductor switch SW2 is constant. In contrast, the source terminal of the high-side semiconductor switch SW1 is connected to node 21, which is in a floating state, so the source potential of the semiconductor switch SW1 changes depending on the circuit operation.

[0040] During a period in which a voltage of several kV is being applied to the load 11 (semiconductor switch SW1 is on and semiconductor switch SW2 is off), if a short circuit occurs in the load 11, the potential of the node 21 drops from several kV to zero potential in several tens of ns to several us. At this time, since the semiconductor switch SW1 is in the on state, the sources S0 to Sn of each semiconductor element in the semiconductor switch SW1 and the drains D0 to Dn of each semiconductor element have approximately the same potential as the node 21. For this reason, if a short circuit occurs in the load 11, the sources S0 to Sn of each semiconductor element and the drains D0 to Dn of each semiconductor element drop to zero potential.

[0041] However, even if a short circuit occurs in the load 11, the potential of the gates G0 to Gn of the semiconductor elements in the semiconductor switch SW1 does not drop immediately. Therefore, when the semiconductor switch 100 shown in FIG. 3, which does not include the second clamp circuit 50 shown in FIG. 2, is applied to the semiconductor switch SW1, high-speed overvoltages of both positive and negative polarities may occur between the gate and source of each of the switching element M0 and the transistors J1 to Jn (see FIG. 4). The rated voltage between the gate and source of each of the switching element M0 and the transistors J1 to Jn may be only a few volts to 20 volts. Therefore, if a positive or negative overvoltage occurs between the gate and source when the load 11 is shorted, a short circuit may occur between the gate and source, and one of the semiconductor elements among the switching element M0 and the transistors J1 to Jn may be damaged.

[0042] In contrast, the semiconductor switch 101 of one embodiment shown in Fig. 2 includes a second clamp circuit 50 that clamps the voltages occurring between the gate and source of the switching element M0 and each of the n transistors J1 to Jn at both positive and negative polarities. These voltages are clamped at both positive and negative polarities by the second clamp circuit 50, as shown in Fig. 5. Therefore, it is possible to protect the switching element M0 and each of the n transistors J1 to Jn from both positive and negative overvoltages between the gate and source.

[0043] 2, a drive signal for turning on or off the switching element M0 is input between the gate G0 and source S0 of the switching element M0. Therefore, if the capacitance of the first clamp section TD0 is 5% or less of the input capacitance of the switching element M0, an error caused in the drive signal during normal operation except when the load 11 is short-circuited can be suppressed.

[0044] 2, a drive signal for turning on or off the transistors J1 to Jn is input between the gate and source of each of the transistors J1 to Jn. Therefore, if the capacitance of each of the second clamp sections TD1 to TDn is 5% or less of the input capacitance of the corresponding transistor among the n transistors J1 to Jn, an error caused in the drive signal during normal operation except when the load 11 is short-circuited can be suppressed.

[0045] The input capacitance corresponds to the sum of the gate-drain capacitance and the gate-source capacitance in the case of a MOSFET, for example, and corresponds to the sum of the gate-collector capacitance and the gate-emitter capacitance in the case of an IGBT, for example.

[0046] In FIG. 2, the semiconductor switch 101 includes an RC circuit in which a resistive element RA0 and a capacitive element C0 are connected in series between the source S0 of the switching element M0 and the gate G1 of the first transistor J1. The semiconductor switch 101 includes an RC circuit between the gates of two adjacent transistors among the n transistors J1 to Jn. For example, an RC circuit in which a resistive element RA1 and a capacitive element C1 are connected in series is connected between the gate G1 and the gate G2 of two adjacent transistors J1 and J2. Similarly, an RC circuit in which a resistive element RAn-1 and a capacitive element Cn-1 are connected in series is connected between the gate Gn-1 and the gate Gn of two adjacent transistors Jn-1 and Jn. The semiconductor switch 101 includes an RC circuit in which a resistive element RAn and a capacitive element Cn are connected in series between the gate G0 and the drain Dn of the nth transistor Jn. The resistive elements RA0 to RAn are an example of a first resistive element.

[0047] These RC circuits stabilize the voltage between the gate and source of the switching element M0 and each of the n transistors J1 to Jn during a transition such as when the semiconductor switch 101 is turned on or off.

[0048] In the semiconductor switch 101, a gate drive signal is input between the gate G0 and source S0 of the normally-off switching element M0 located in the lowest stage of the circuit. This allows the operation of the entire switch, which is made up of the switching element M0, which is the drive element, and the transistors J1 to Jn, which are passive elements, and simplifies drive control. However, because these semiconductor elements operate in order from the lowest stage, the synchronization between these semiconductor elements is poor, and voltage sharing tends to be concentrated in the semiconductor elements in the lower stages. This synchronization characteristic can be improved by adjusting the time constant of the RC circuit connected in parallel to each semiconductor element.

[0049] In order to improve the synchronization characteristics of the semiconductor switch 101, it is preferable to make the upper semiconductor elements share the transient voltage faster than the lower semiconductor elements. For example, the time constant of the RC circuit connected in parallel to each semiconductor element is set to a value that makes the upper semiconductor elements share the transient voltage faster than the lower semiconductor elements.

[0050] Let Y be the difference in the time constants of adjacent RC circuits, and k be an integer between 1 and (n-1). In this case, the difference Y is: Y=C k ×RA k -C k+1 ×RA k+1 =C n ×RA n ...Formula 1 The time constants of the multiple RC circuits may be adjusted to satisfy the following equation. This improves the synchronization between the semiconductor elements. In equation 1, the difference Y between the time constants of adjacent RC circuits is equal to the time constant of the RC circuit provided between the gate Gn and drain Dn of the n-th transistor Jn.

[0051] Fig. 6 is a diagram showing the relationship between the difference Y in the time constants of adjacent RC circuits and the maximum shared voltage among the voltages shared by each of the multiple semiconductor elements. Fig. 6 shows the case where n=11. According to Fig. 6, by setting the difference Y in the time constants to be between 10 ns or more and 20 ns or less, the shared voltage of the switching element M0, which has the highest shared voltage among the multiple semiconductor elements, becomes 2 / 3 or less of the rated voltage (1200V) of the multiple semiconductor elements. As a result, synchronism can be ensured, and the durability of each semiconductor element is improved by reducing the maximum shared voltage of the multiple semiconductor elements.

[0052] In particular, when the resistance values ​​of the resistor elements RA1 to RAn are greater than 0Ω and equal to or less than 50Ω, synchronism can be ensured, and the durability of each semiconductor element is improved by reducing the maximum shared voltage of the multiple semiconductor elements.

[0053] 2, the semiconductor switch 101 includes resistor elements RB0 to RBn connected in parallel to each of a plurality of RC circuits. The resistor elements RB0 to RBn are an example of second resistor elements. When the semiconductor switch 101 is in a steady on state, the resistor elements RB0 to RBn stabilize the voltages shared by the switching element M0 and the n transistors J1 to Jn.

[0054] If the resistance value of each of the resistive elements RB0 to RBn is equal to or greater than 1 MΩ and equal to or less than 10 MΩ, the steady state in the on state of the semiconductor switch 101 becomes particularly stable.

[0055] 2, the semiconductor switch 101 includes a switching element M0 and resistive elements RG0 to RGn connected in series to the gates of n transistors J1 to Jn. The resistive elements RG0 to RGn are an example of a third resistive element. The resistive elements RG0 to RGn are damping resistors that improve the stability of the operations of the switching element M0 and the n transistors J1 to Jn.

[0056] If the resistance value of each of the resistor elements RG0 to RGn is 10 Ω or less, the effects of the parasitic inductance and parasitic capacitance of the switching element M0 and the n transistors J1 to Jn are suppressed, thereby particularly improving the operational stability of the switching element M0 and the n transistors J1 to Jn.

[0057] Next, an embodiment will be described.

[0058] The high-voltage pulse generator used in high-voltage pulse testing outputs a pulse waveform by switching DC voltage at high speed using a high-voltage switch. To achieve high-speed operation, semiconductor elements are used for the high-voltage switch.

[0059] The high-voltage switch is a 12-stage switch in which one SiC-MOSFET (switching element M0) with a maximum rating of 1.2 kV and eleven SiC-JFETs (transistors J1 to J11) with a maximum rating of 1.2 kV are connected in series. The theoretical maximum withstand voltage is 1.2 kV x 12 = 14.4 kV. The rated voltage between the gate and source of each semiconductor element is ±20 V. The output voltage of the DC power supply 12 is set to 7 kV. The drive circuits 16 and 17 input voltage drive signals of -3 V / +15 V complementarily between the gate and source of each SiC-MOSFET of the semiconductor switches SW1 and SW2, thereby causing the semiconductor switches SW1 and SW2 to operate complementarily. FIG. 7 shows the voltage drive signals input between the gate and source of each semiconductor element. FIG. 8 shows the pulse voltage applied to the load 11 when the load 11 is not short-circuited.

[0060] Fig. 9 is a diagram showing the voltage waveforms between the gate and source of each semiconductor element when the load 11 is short-circuited. The short-circuit of the load 11 occurs at approximately 31 μs. Fig. 10 is a diagram showing the voltage waveforms of Fig. 9 with the time axis enlarged. It can be seen that a high-speed overvoltage exceeding the rated voltage of the element occurred when the load 11 was short-circuited.

[0061] In order to prevent this high-speed overvoltage, the semiconductor switch 101 of this embodiment is adopted for the high-voltage switch (semiconductor switches SW1, SW2) in FIG. 1. The first clamp unit TD0 and the second clamp units TD1 to TDn use TVS (Transient Voltage Suppressor) diodes. The capacitance of the TVS diode is 25 pF, which is 2.3% of the input capacitance (about 1.1 nF) of each semiconductor element. In order not to affect the gate-source waveform during normal operation, a low-capacity (5% or less of the input capacitance of the semiconductor element) type TVS diode is used. The operating voltage of the TVS diode is ±16 V. In order to suppress positive and negative overvoltages, two TVS diodes with an operating voltage of 16 V are connected in the opposite directions. FIG. 11 is a diagram showing the waveform of the clamped gate-source voltage of each semiconductor element when the load 11 is short-circuited. As shown in FIG. 11, it is shown that the overvoltage is within the rated gate-source voltage.

[0062] As described above, the embodiment has been described, but the above embodiment is presented as an example, and the present invention is not limited to the above embodiment. The above embodiment can be implemented in various other forms, and various combinations, omissions, substitutions, modifications, etc. can be made without departing from the gist of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are included in the scope of the invention and its equivalents described in the claims.

[0063] Applications of the semiconductor switch of the present embodiment are not limited to high-voltage pulse power supplies, but may also include, for example, power conversion devices. [Explanation of symbols]

[0064] 10 Inverter circuit 11 Load 12 DC power supply 13,14,15 Resistance 16,17 Drive circuit 18 Capacitor 19 Complementary Control Circuit 20, 21, 22 nodes 30 Series Circuit 40 First clamp circuit 50 Second clamp circuit 101 Semiconductor Switch 201 Pulse power supply CD1~CDn Diodes RA0 to RAn Resistance elements TD0 First clamp part TD1~TDn Second clamp section

Claims

1. a normally-off switching element having a control terminal, a first main terminal, and a second main terminal; a series circuit in which n normally-on type transistors, each having a control terminal, a first main terminal, and a second main terminal, are connected in series, where n is an integer of 2 or more, and the control terminal of a first transistor among the n transistors is electrically connected to the second main terminal of the switching element; a first clamp circuit that clamps a voltage generated between the control terminals of adjacent transistors among the n number of transistors and a voltage generated between the control terminal of an n-th transistor among the n number of transistors and the first main terminal; a second clamp circuit that clamps a voltage generated between the control terminal and the second main terminal for each of the switching element and the n transistors, in both positive and negative polarities.

2. The second clamp circuit is a first clamp unit that clamps a voltage generated between the control terminal and the second main terminal of the switching element in both positive and negative polarities; 2. The semiconductor switch according to claim 1, further comprising: a plurality of second clamping sections provided for each of the n transistors, the second clamping sections clamping a voltage generated between the control terminal and the second main terminal of the corresponding transistor in both positive and negative polarities.

3. 3. The semiconductor switch according to claim 2, wherein the capacitance of each of the second clamp sections is 5% or less of an input capacitance of a corresponding one of the n transistors.

4. The first clamp circuit includes: a plurality of diodes provided for the n transistors, the anodes of the diodes being electrically connected to the control terminals of the corresponding transistors; 4. The semiconductor switch according to claim 1, wherein the plurality of diodes include a first diode having a cathode electrically connected to the control terminal of the transistor adjacent to the corresponding transistor, and a second diode having a cathode electrically connected to the first main terminal of an n-th transistor.

5. 5. The semiconductor switch according to claim 4, wherein the rated voltage of the first diode is 80% to 95% of the rated voltage of the corresponding transistor.

6. 4. The semiconductor switch according to claim 1, further comprising an RC circuit in which a first resistive element and a capacitive element are connected in series, between the second main terminal of the switching element and the control terminal of a first transistor, between the control terminals of two adjacent transistors among the n transistors, and between the control terminal of the nth transistor and the first main terminal.

7. 7. The semiconductor switch according to claim 6, wherein a difference in time constant between adjacent RC circuits is 10 ns or more and 20 ns or less.

8. 8. The semiconductor switch according to claim 7, wherein a difference between the time constants of adjacent RC circuits is equal to a time constant of the RC circuit provided between the control terminal and the first main terminal of an n-th transistor.

9. The semiconductor switch according to claim 7 , wherein the first resistor element has a resistance value of 50Ω or less.

10. The semiconductor switch according to claim 6 , further comprising a second resistive element connected in parallel with the RC circuit.

11. The semiconductor switch according to claim 10 , wherein the second resistor element has a resistance value of 1 MΩ or more and 10 MΩ or less.

12. The semiconductor switch according to claim 1 , further comprising a third resistive element connected in series with the switching element and the control terminal of each of the n transistors.

13. The semiconductor switch according to claim 12 , wherein the third resistor element has a resistance value of 10Ω or less.

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