Wired circuit board assembly sheet and method for manufacturing the same

Abstract

To provide a wired circuit board assembly sheet and a method for manufacturing the same, which includes a metal support layer having a base insulating layer and / or a conductor layer with excellent reliability while providing a metal support layer with improved functionality.SOLUTION: A manufacturing method of a wired circuit board assembly sheet 1 includes steps (1), (2), and (3). In the step (1), a metal support layer 2 having a mark portion 6 on one surface in a thickness direction is prepared. In the step (2), a base insulating layer 3 is formed on one surface of the metal support layer 2 in the thickness direction. In the step (3), a conductor layer 4 is formed on one surface of the base insulating layer 3 in the thickness direction. The step (1) includes steps (11) and (12). In the step (12), after the step (11), a second metal layer 22 is formed on one surface of the first metal layer 21 in the thickness direction. The step (2) is performed after the step (12).SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to a wired circuit board assembly sheet and a method for producing the same. [Background technology]

[0002] A method for producing a wired circuit board assembly sheet comprising a marking step and an insulating layer forming step is known (see, for example, Patent Document 1 below).

[0003] In the marking step described in Patent Document 1, a recess is formed in the metal supporting layer. The recess is the mark. The insulating layer forming step is performed after the marking step. In the insulating layer forming step, an insulating layer is formed on one surface in the thickness direction of the metal supporting board on which the mark is formed.

[0004] In the method described in Patent Document 1, the mark is used as an alignment mark to form an insulating layer with high precision. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2022-176628 A Summary of the Invention [Problem to be solved by the invention]

[0006] The wired circuit board assembly sheet described in Patent Document 1 has a problem in that the metal supporting layer is a single layer, and therefore the function of the metal supporting layer cannot be sufficiently improved.

[0007] Therefore, a tentative plan is proposed in which a first metal layer and a second metal layer are provided in order in the thickness direction on the metal support layer. In this tentative plan, when forming a mark, from the viewpoint of the visibility of the mark, it is formed on the second metal layer that contacts the insulating layer. However, in this case, the alignment between the first metal layer and the insulating layer cannot be sufficiently achieved. In other words, the management of the insulating layer relative to the first metal layer is insufficient.

[0008] The present invention provides a wired circuit board assembly sheet having a metal support layer with enhanced functionality, and a base insulating layer and / or a conductor layer that are well-controlled relative to a first metal layer, and a method for producing the same. [Means for solving the problem]

[0009] The present invention [1] includes a method for producing a wired circuit board assembly sheet, comprising the steps of: (1) preparing a metal support layer having a mark portion on one side in the thickness direction; (2) forming a base insulating layer on one side of the metal support layer in the thickness direction; and (3) forming a conductor layer on one side of the base insulating layer in the thickness direction, wherein the step (1) comprises: (11) forming a mark having a recess on one side of a first metal layer in the thickness direction; and (12) forming a second metal layer on one side of the first metal layer in the thickness direction after the step (11); and performing the step (2) after the step (12).

[0010] In this manufacturing method, step (1) includes step (11) of forming a mark on a first metal layer and step (12) of forming a second metal layer on the first metal layer, and after step (12), step (2) of forming a base insulating layer is carried out.

[0011] Therefore, by providing the metal supporting layer with the first metal layer and the second metal layer, the function of the metal supporting layer can be improved.

[0012] Furthermore, in step (11), since the mark is formed on the first metal layer rather than the second metal layer, a base insulating layer and / or a conductor layer that is well controlled and has excellent reliability can be formed with respect to the mark on the first metal layer.

[0013] The present invention [2] includes the method for producing a wired circuit board assembly sheet described in [1], wherein the one side of the first metal layer has a flat surface located outside the recess, and the ratio of the thickness T of the second metal layer to the length L from the deepest part of the recess to the flat surface is 5.0 or less.

[0014] In this manufacturing method, the ratio (T / L) is 5.0 or less, so that the visibility of the mark portion is improved.

[0015] The present invention [3] includes the method for producing a wired circuit board assembly sheet according to [1], wherein the mark portion has a bottom and a raised portion arranged around the bottom, and a depth D of the mark portion, which is the length in the thickness direction from the bottom of the bottom to the top of the raised portion, is 1 μm or more.

[0016] In this manufacturing method, the depth D of the mark is as deep as 1 μm or more, and therefore the visibility of the mark is improved.

[0017] The present invention [4] includes a method for producing a wired circuit board assembly sheet according to any one of [1] to [3], wherein the wired circuit board assembly sheet includes a mark area and adjacent circuit areas in a direction perpendicular to the thickness direction, in which the plurality of wired circuit boards are arranged, and the steps (11) and (12) are performed in the mark area, and the steps (2) and (3) are performed in the circuit areas.

[0018] In this manufacturing method, in step (2), when the mark portion formed in the mark region is used to form a base insulating layer and a conductor layer in a circuit region, which is a region different from the mark region, the mark portion in the mark region is unlikely to interfere with the formation of the base insulating layer and the conductor layer.

[0019] The present invention [5] includes a wired circuit board assembly sheet comprising, in order toward one side in the thickness direction, a metal support layer having a mark portion, a base insulating layer, and a conductor layer, the metal support layer comprising, in order toward one side in the thickness direction, a first metal layer having a mark with a recess formed thereon, and a second metal layer.

[0020] The present invention [6] includes the wired circuit board assembly sheet according to [5], wherein the mark portion has a bottom and a raised portion arranged around the bottom, and a depth D of the mark portion, which is the length in the thickness direction from the bottom of the bottom to the top of the raised portion, is 1 μm or more. Effect of the Invention

[0021] The wired circuit board assembly sheet produced by the wired circuit board assembly sheet production method of the present invention comprises a metal supporting layer with improved functionality, and also comprises a base insulating layer and / or a conductor layer with excellent reliability. [Brief description of the drawings]

[0022] [Figure 1] FIG. 1 shows a plan view of one embodiment of a wired circuit board assembly sheet. [Diagram 2] FIG. 2 shows a cross-sectional view of the wired circuit board assembly sheet shown in FIG. 1 taken along line AA. [Diagram 3] Figures 3A to 3E are process diagrams of a method for manufacturing the wired circuit board assembly sheet shown in Figure 2. Figure 3A shows a step of preparing a first metal layer. Figure 3B shows step (11). Figure 3C shows step (12). Figure 3D shows step (2). Figure 3E shows step (3). [Figure 4] 4A to 4C are process diagrams for explaining step (2) in detail. Fig. 4A shows a process of forming a photosensitive layer. Fig. 4B shows a process of arranging a mask using a mark portion and exposing the photosensitive layer. Fig. 4C shows a process of exposing the photosensitive layer. [Diagram 5] FIG. 11 is a cross-sectional view of a first modified example. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0023] 1. Wiring circuit board assembly sheet 1 An embodiment of the wired circuit board assembly sheet of the present invention will be described with reference to Figs. 1 and 2. The wired circuit board assembly sheet may be simply referred to as an "assembly sheet." As shown in Fig. 2, the assembly sheet 1 has a thickness. The assembly sheet 1 extends in the planar direction. As shown in Fig. 1, in this embodiment, the assembly sheet 1 has a rectangular shape. The assembly sheet 1 includes a support region 11 and a circuit region 12.

[0024] 1.1 Support area11 In this embodiment, the support region 11 has a substantially lattice shape in a plan view.

[0025] 1.2 Circuit area 12 The circuit region 12 is disposed inside the support region 11. A plurality of circuit regions 12 are disposed at intervals from each other in the planar direction. Each of the plurality of circuit regions 12 includes a wired circuit board 121. Specifically, the wired circuit board 121 is disposed in the circuit region 12. The wired circuit board 121 is supported by the support region 11 described above.

[0026] 1.3 Layer configuration As shown in FIG. 2, the assembly sheet 1 includes, in order toward one side in the thickness direction, a metal supporting layer 2, an insulating base layer 3, a conductor layer 4, and an insulating cover layer 5.

[0027] 1.3.1 Metal support layer 2 The metal support layer 2 is disposed at the other end of the assembly sheet 1 in the thickness direction. The other side of the metal support layer 2 in the thickness direction forms the other side of the assembly sheet 1 in the thickness direction. The metal support layer 2 extends in the planar direction. The metal support layer 2 includes a first flat surface 23. The first flat surface 23 is located on one side of the metal support layer 2 in the thickness direction. The metal support layer 2 is included in the support region 11 and the circuit region 12 (wired circuit board 121).

[0028] 1.3.2 Mark section 6 The metal support layer 2 has a mark portion 6 in addition to the first flat surface 23. As shown in FIG. 1, the mark portion 6 is provided in a mark region 111. The mark region 111 is included in the support region 11. The mark portion 6 is formed on one surface of the metal support layer 2 in the thickness direction in the mark region 111. The mark portion 6 has a configuration that is visible from one side in the thickness direction. As shown in FIG. 2, the mark portion 6 has a bottom portion 61 and a raised portion 62.

[0029] 1.3.2.1 Bottom 61 The bottom 61 is recessed toward the other side relative to one surface of the periphery of the mark portion 6. The recess 61 has a substantially circular shape in a plan view. In this embodiment, the bottom 61 has a substantially semicircular arc shape in a cross-sectional view. The center of the arc is located on one side in the thickness direction relative to the bottom surface of the bottom 61 in a cross-sectional view. The bottom 611 of the bottom 61 is located at the center of gravity (or central portion) of the mark portion 6 in a plan view. The bottom 611 is located at the othermost portion of the mark portion 6 in the thickness direction.

[0030] The length L1 of the recess 61 in the thickness direction is, for example, 0.5 μm or more, preferably 1 μm or more, more preferably 1.5 μm or more, even more preferably 3 μm or more, particularly preferably 5 μm or more, and is, for example, 20 μm or less. The length L1 of the recess 61 is the length in the thickness direction from the bottom 611 to the first flat surface 23. The length L1 of the recess 61 is measured by observing a cross-sectional image.

[0031] If the length L1 of the recess 61 in the thickness direction is equal to or greater than the above-mentioned lower limit, the visibility of the mark portion 6 is improved.

[0032] 1.3.2.2 Ridge 62 The raised portion 62 constitutes the mark portion 6 together with the recessed portion 61, and improves the visibility of the mark portion 6 including the recessed portion 61. The raised portion 62 is disposed around the bottom portion 61. In this embodiment, the raised portion 62 has a generally annular shape in a planar view. The raised portion 62 rises from the peripheral edge of the bottom portion 61 toward one side in the thickness direction. The raised portion 62 includes a peak 621. The peak 621 is located at the very one end in the thickness direction in a cross-sectional view. The peak 621 has a generally annular shape in a planar view.

[0033] The length L2 of the raised portion 62 in the thickness direction is, for example, 1 μm or more, preferably 2 μm or more, more preferably 2.5 μm or more, even more preferably 4.5 μm or more, particularly preferably 5 μm or more, and for example, 20 μm or less. The length L2 of the raised portion 62 is the length in the thickness direction from the first flat surface 23 to the apex 621. The length L2 of the raised portion 62 is measured by observing a cross-sectional image.

[0034] If the length L2 of the raised portion 62 is equal to or greater than the above-mentioned lower limit, the visibility of the mark portion 6 can be further improved.

[0035] The ratio (L1 / L2) of the length L1 of the recess 61 in the thickness direction to the length L2 of the raised portion 62 in the thickness direction is, for example, 0.3 or more, preferably 0.5 or more, more preferably 1 or more, and for example, 3 or less, preferably 2 or less, more preferably 1.5 or less. When the ratio (L1 / L2) is within the above range, the visibility of the mark portion 6 can be significantly improved.

[0036] 1.3.2.3 Depth D of Mark 6 The depth D of the mark portion 6 is, for example, 0.3 μm or more, preferably 0.5 μm or more, more preferably 1 μm or more, even more preferably 4 μm or more, particularly preferably 5 μm or more, and most preferably 9 μm or more, and is suitably 10 μm or more.

[0037] If the depth D of the mark portion 6 is equal to or greater than the above-mentioned lower limit, the mark portion 6 can be reliably viewed. The depth D of the mark portion 6 is measured by observing a cross-sectional image.

[0038] 1.3.3 Layer structure of metal support layer 2 The metal support layer 2 includes a first metal layer 21 and a second metal layer 22 in this order toward one side in the thickness direction.

[0039] 1.3.3.1 First metal layer 21 The first metal layer 21 is the other portion of the metal support layer 2 in the thickness direction. The first metal layer 21 is a main layer of the metal support layer 2. The first metal layer 21 has toughness. The first metal layer 21 extends in the planar direction. The first metal layer 21 in the support region 11 has a mark 211 (see also FIG. 3B). The mark 211 has a recess 212, a first protrusion 213, and a flat surface 214.

[0040] The recess 212 in the first metal layer 21 corresponds to the bottom 61 of the mark portion 6 described above. The recess 212 is recessed toward the other side of one surface (flat surface 214) around the mark 211. In this embodiment, the recess 212 has a substantially semi-arc shape in cross-sectional view. The center of the arc is located on one side in the thickness direction with respect to the concave surface of the recess 212 in cross-sectional view.

[0041] The first protrusion 213 in the first metal layer 21 corresponds to the protrusion 62 of the mark portion 6 described above. The first protrusion 213 is disposed around the recess 212. The first protrusion 213 protrudes from the peripheral edge of the recess 212 toward one side in the thickness direction.

[0042] The flat surface 214 of the first metal layer 21 is located outside the recess 212. In this embodiment, the flat surface 214 extends outward from the peripheral edge of the first protrusion 21. The flat surface 214 is located in the support region 11 and the circuit region 12.

[0043] The length L from the deepest portion of the recess 212 to the flat surface 214 is adjusted so as to satisfy the ratio (T / L) described later. Specifically, the length L from the deepest portion of the recess 212 to the flat surface 214 is, for example, 1 μm or more, preferably 2 μm or more, more preferably 3 μm or more, and is, for example, 20 μm or less.

[0044] Examples of the material for the first metal layer 21 include metals. Examples of the metal include copper, copper alloys, and stainless steel alloys, and preferably copper and copper alloys.

[0045] The first metal layer 21 has a thickness of, for example, 10 μm or more, preferably 20 μm or more, and for example, 500 μm or less, preferably 250 μm or less.

[0046] 1.3.3.2 Second metal layer 22 As shown in FIG. 2, the second metal layer 22 is one portion of the metal support layer 2 in the thickness direction. The second metal layer 22 is disposed on one surface of the first metal layer 21 in the thickness direction. The second metal layer 22 contacts one surface of the first metal layer 21 in the thickness direction. Specifically, the second metal layer 22 follows one surface of the first metal layer 21 in the thickness direction. The second metal layer 22 is formed on at least one surface of the mark 211. Specifically, the second metal layer 22 is recessed together with the recess 212 and protrudes together with the first protrusion 213. The second metal layer 22 is flat along the flat surface 214. Therefore, in this embodiment, the second metal layer 22 has the same thickness throughout the thickness direction.

[0047] The electrical conductivity of the second metal layer 22 is, for example, higher than the electrical conductivity of the first metal layer 21. In this embodiment, the second metal layer 22 is a ground layer (ground plane).

[0048] Examples of materials for the second metal layer 22 include gold, silver, copper, and alloys containing these.

[0049] The thickness T of the second metal layer 22 is adjusted so that the ratio (T / L) described below is within a desired range. Specifically, the thickness T of the second metal layer 22 is, for example, 0.5 μm or more, preferably 1 μm or more, and, for example, 25 μm or less, preferably 20 μm or less, more preferably 15 μm or less, even more preferably 10 μm or less, and particularly preferably 5 μm or less. The thickness T of the second metal layer 22 is measured by observing a cross-sectional image.

[0050] The ratio (T / L) of the thickness T of the second metal layer 22 to the length L from the deepest part of the recess 212 to the flat surface 214 (the length L related to the mark 211) is, for example, 10 or less, preferably 5.0 or less, more preferably 4 or less, even more preferably 3 or less, particularly preferably 2.5 or less, or even 2 or less, 1.3 or less, 1 or less, or 0.5 or less.

[0051] When the ratio (T / L) is equal to or less than the above upper limit, it is possible to improve the visibility of the mark portion 6. Specifically, by increasing the length L of the mark 211 in the first metal layer 21 and / or decreasing the thickness T of the second metal layer 22, the visibility of the mark portion 6 is significantly improved.

[0052] 1.3.3 Base insulation layer 3 The base insulating layer 3 is disposed on one side of the metal support layer 2 in the thickness direction. In this embodiment, the base insulating layer 3 is included in the circuit region 12 (wired circuit board 121). Specifically, the base insulating layer 3 is disposed on one side of the metal support layer 2 in the circuit region 12. Moreover, the base insulating layer 3 is not disposed on the metal support layer 2 in the support region 11. The base insulating layer 3 contacts one side of the metal support layer 2 in the thickness direction.

[0053] An example of the material of the base insulating layer 3 is an insulating resin. An example of the insulating resin is polyimide. The thickness of the base insulating layer 3 is, for example, 1 μm or more, preferably 3 μm or more, and for example, 35 μm or less, preferably 25 μm.

[0054] 1.3.4 Conductive layer 4 The conductor layer 4 is disposed on one surface of the base insulating layer 3 in the thickness direction. In this embodiment, the conductor layer 4 is included in the circuit region 12 (wired circuit board 121). Specifically, the conductor layer 4 is disposed on one surface of the base insulating layer 3 in the circuit region 12. Moreover, the conductor layer 4 is not disposed on the base insulating layer 3 in the support region 11. The conductor layer 4 contacts one surface of the base insulating layer 3 in the thickness direction. As shown in FIG. 1, the conductor layer 4 includes a wiring 41 and a terminal 42. The wiring 41 extends in the surface direction. The terminal 42 is continuous with an end of the wiring 41.

[0055] Examples of materials for the conductor layer 4 include metals. Examples of metals include copper and copper alloys. The thickness of the conductor layer 4 is, for example, 1 μm or more, preferably 3 μm or more, and for example, 50 μm or less, preferably 30 μm or less.

[0056] 1.3.5 Cover insulation layer 5 As shown in FIG. 2, the cover insulating layer 5 is disposed on one side of the base insulating layer 3 in the thickness direction. In this embodiment, the cover insulating layer 5 is included in the circuit region 12 (wired circuit board 121). Specifically, the cover insulating layer 5 is disposed on one side of the base insulating layer 3 in the circuit region 12. Moreover, the cover insulating layer 5 is not disposed on the base insulating layer 3 in the support region 11. The cover insulating layer 5 covers the wiring 41. The cover insulating layer 5 exposes the terminals 42. The material of the cover insulating layer 5 is the same as the material of the base insulating layer 3. The thickness of the cover insulating layer 5 is 2 μm or more, preferably 3 μm or more, and is, for example, 60 μm or less, preferably 40 μm or less.

[0057] 2. Manufacturing method of assembly sheet 1 The method for producing the assembly sheet 1 includes steps (1), (2), (3), and (4). Steps (1), (2), (3), and (4) are performed in this order.

[0058] 2.1 Process (1) 3A, in step (1), a metal support layer 2 having a mark portion 6 on one surface in the thickness direction is prepared. Step (1) includes step (11) and step (12). Step (11) and step (12) are performed in this order.

[0059] 2.1.1 Process (11) In step (11), a mark 211 having a recess 212 and a first protrusion 213 is formed on one surface of the first metal layer 21 in the thickness direction.

[0060] To carry out step (11), first, a first metal layer 21 is prepared as shown in Fig. 3A. One surface of the first metal layer 21 in the thickness direction is entirely flat surface 214.

[0061] 3B, a mark 211 is formed on one surface in the thickness direction of the first metal layer 21. The above-mentioned step (11) is performed in the mark region 111.

[0062] The mark 211 is formed by, for example, laser irradiation or etching, and preferably, laser irradiation is used from the viewpoint of improving manufacturing efficiency. In the laser irradiation, a laser is irradiated onto one surface of the first metal layer 21 from one side of the first metal layer 21 in the thickness direction. By the laser irradiation, a recess 212 is formed on one surface of the first metal layer 21 in the thickness direction, and a first protrusion 213 is formed around the recess 212. The recess 212 and the first protrusion 213 form the mark 211 on one surface of the first metal layer 21.

[0063] Alternatively, the first metal layer 21 on which the marks 211 are formed in advance may be prepared.

[0064] 2.1.2 Process (12) Step (12) is performed after step (11). As shown in Fig. 3C, in step (12), a second metal layer 22 is formed on one side of the first metal layer 21 in the thickness direction. Step (12) is performed in the mark region 111 and the circuit region 12.

[0065] The second metal layer 22 is formed by, for example, vacuum deposition or plating, and preferably by plating from the viewpoint of improving manufacturing efficiency. In the above-mentioned method, the second metal layer 22 is formed on the entire one surface of the first metal layer 21 in the thickness direction.

[0066] In step (12), the mark 211 formed in step (11) is included in the mark portion 6, and a second metal layer 22 is formed on one side of the first metal layer 21 including the mark 211 so that the mark 6 can be identified. For example, the second metal layer 22 is formed on one side of the first metal layer 21 with a predetermined thickness T (for example, a thin thickness T).

[0067] As a result, the mark portion 6 is formed in the support region 11 of the metal support layer 2 .

[0068] 2.2 Process (2) Step (2) is performed after step (12). In step (2), a base insulating layer 3 is formed on one surface of the metal supporting layer 2 in the thickness direction, as shown in Fig. 3D. Step (2) is performed in the circuit region 12.

[0069] In step (2), for example, a photosensitive resin is photolithographically processed to form the insulating base layer 3 on one side of the insulating base layer 3 in the circuit region 12. In step (2), the photosensitive resin is photolithographically processed using the mark portion 6.

[0070] Specifically, as shown in Fig. 4A, a photosensitive layer 31 made of a photosensitive resin is formed on one surface of the metal support layer 2 in the thickness direction. Then, as shown in Fig. 4B, a mask 32 is placed on one side of the photosensitive layer 31 in the thickness direction. At this time, the mask 32 is placed with respect to the base insulating layer 3 in the circuit region 12 using the mark portion 6 in the support region 11 as, for example, an alignment mark (positioning mark).

[0071] Subsequently, as indicated by an arrow in FIG. 4B, the photosensitive layer 31 is exposed through the mask 32 by using a light source (not shown) arranged on one side of the mask 32 in the thickness direction.

[0072] Thereafter, as shown in Fig. 4C, the photosensitive layer 31 is developed to dissolve the unexposed parts and leave the exposed parts. Then, if necessary, post-exposure heating is performed. As a result, the base insulating layer 3 having a predetermined pattern is formed on one side of the metal support layer 2 in the circuit region 12.

[0073] 2.3 Process (3) 3E, next, in step (3), a conductor layer 4 is formed on one surface of the base insulating layer 3 in the thickness direction. Step (3) is performed in the circuit region 12. The conductor layer 4 is formed, for example, by an additive method or a subtractive method.

[0074] In the additive method, a seed film (not shown) is first formed on one side of the base insulating layer 3, then a plating resist is formed on one side of the seed film, and then a conductor layer 4 is formed on the seed film exposed from the plating resist. In forming the plating resist, photolithography using a mask is used. In arranging the mask, a mark portion 6 is used as an alignment mark.

[0075] In the subtractive method, first, a conductor film (not shown) is formed on one side of the base insulating layer 3, then an etching resist is formed on one side of the conductor film, and then the conductor film exposed from the etching resist is etched. In forming the etching resist, photolithography processing using a mask is used.

[0076] 2.4 Process (4) 2, in step (4), the cover insulating layer 5 is then formed on one surface of the base insulating layer 3 in the thickness direction. The cover insulating layer 5 is formed in a pattern that covers the wiring 41 and exposes the terminals 42. The cover insulating layer 5 is formed by the same method as that for the base insulating layer 3.

[0077] In this way, an assembly sheet 1 including a plurality of wired circuit boards 121 is manufactured.

[0078] 3. Effects of one embodiment In this manufacturing method, step (1) includes step (11) of forming a mark 211 on a first metal layer 21 and step (12) of forming a second metal layer 22 on the first metal layer 21, and after step (12), step (2) of forming a base insulating layer 3 is carried out.

[0079] Therefore, by providing the metal supporting layer 2 with the first metal layer 21 and the second metal layer 22, it is possible to improve the function of the metal supporting layer 2. For example, by making the conductivity of the first metal layer 21 higher than the conductivity of the second metal layer 22, it is possible to reduce the resistance of one side of the metal supporting layer 2.

[0080] 3B, in step (11), the mark 211 is formed on the first metal layer 22, not on the second metal layer 22. Therefore, the base insulating layer 3, the conductor layer 4 and the cover insulating layer 5 can be formed with respect to the mark 211 on the first metal layer 21, which are well controlled and have excellent reliability.

[0081] Specifically, the base insulating layer 3, the conductor layer 4 and the cover insulating layer 5 can each be formed using the mark portion 6 including the mark 211 as an alignment mark, thereby improving the reliability of the arrangement and shape of each of the base insulating layer 3, the conductor layer 4 and the cover insulating layer 5.

[0082] Moreover, by using the mark 6 as an identification mark, it is possible to manufacture a highly reliable wired circuit board 121 in which the base insulating layer 3, the conductor layer 4 and the cover insulating layer 5 are controlled.

[0083] In addition, in the manufacturing method, in step (2), when the mark portion 6 formed in the mark region 111 is used to form the base insulating layer 3 and the conductor layer 4 in a circuit region 12 different from the mark region 111, the mark portion 6 in the mark region 111 is unlikely to interfere with the formation of the base insulating layer 3 and the conductor layer 4.

[0084] In addition, in this manufacturing method, if the ratio (T / L) is 5.0 or less, the mark portion 6 can be reliably viewed. Specifically, by increasing the length L of the mark 211 in the first metal layer 21 and / or decreasing the thickness T of the second metal layer 22, the visibility of the mark portion 6 is significantly improved.

[0085] In this manufacturing method, if the depth D of the mark portion 6 is 1.0 μm or more, the visibility of the mark portion 6 can be improved.

[0086] 4. Variations In the following modifications, the same components and steps as those in the above-described embodiment are denoted by the same reference numerals, and detailed description thereof will be omitted. In addition, each modification can achieve the same effects as those in the above-described embodiment, unless otherwise specified. Furthermore, the embodiment and its modifications can be appropriately combined.

[0087] 4.1 First modified example 5, in this first modified example, the mark portion 6 does not have a protuberance 621. On the other hand, the mark 21 has a first protuberance 213. In the first modified example, the thickness T of the second metal layer 22 exceeds 25 μm, and is furthermore 30 μm or more.

[0088] 4.2 Second variant Although not shown, in the second modified example, the mark portion 6 does not have the raised portion 621, and the mark 21 does not have the first raised portion 213.

[0089] Among the embodiment, the first modified example, and the second modified example, from the viewpoint of improving the visibility of the recess 6, the embodiment and the first modified example are preferable, and the embodiment is more preferable.

[0090] 4.3 Other Variations The mark portion 6 may be a trace mark. The position of the assembly sheet 1 is determined by the trace mark, and the assembly sheet 1 can be managed. EXAMPLES

[0091] The present invention will be described in more detail below with reference to examples and comparative examples. The present invention is not limited to the examples and comparative examples. The specific numerical values ​​of the blending ratio (content ratio), physical property values, parameters, etc. used in the following description can be replaced with the upper limit (a numerical value defined as "equal to or less than") or lower limit (a numerical value defined as "equal to or more than" or "exceeding") of the corresponding blending ratio (content ratio), physical property values, parameters, etc. described in the above "Form for carrying out the invention".

[0092] Example 1 Following the manufacturing method of one embodiment, an assembly sheet 1 was manufactured.

[0093] In step (11), first, a first metal layer 21 was prepared as shown in Fig. 3A. The first metal layer 21 had a thickness of 100 µm and was made of a copper alloy.

[0094] Next, as shown in FIG. 3B, a mark 211 was formed on one surface of the first metal layer 21 in the thickness direction by laser irradiation.

[0095] The length L of the mark 211 (the length L from the deepest part of the recess 212 to the flat surface 214) was 5.6 μm.

[0096] 3C, a second metal layer 22 was formed by plating on one surface in the thickness direction of the first metal layer 21. The material of the second metal layer 22 was gold.

[0097] The thickness T of the second metal layer 22 was 2 μm. The ratio (T / L) of the thickness T of the second metal layer 22 to the length L (the length related to the mark 211) from the deepest part of the recess 212 to the flat surface 214 was 0.36.

[0098] The length L1 of the recess 61 in the thickness direction was 4.4 μm. The length L2 of the protrusion 62 in the thickness direction was 5.2 μm. The ratio (L1 / L2) was 1.2.

[0099] In this way, the mark portion 6 was formed in the supporting region 11. The depth D of the mark portion 6 was 9.53 μm.

[0100] Next, as shown in FIG. 3D, in step (2), a photosensitive polyimide resin was photolithographically processed to form the insulating base layer 3 on one side of the insulating base layer 3 in the circuit region 12.

[0101] Next, as shown in FIG. 3E, in step (3), a conductor layer 4 was formed on one surface of the insulating base layer 3 in the thickness direction.

[0102] Next, as shown in FIG. 2, in step (4), the insulating cover layer 5 was formed on one surface of the insulating base layer 3 in the thickness direction.

[0103] In this way, an assembly sheet 1 was produced.

[0104] In the assembly sheet 1 of Example 1, the thickness T of the second metal layer 22, the depth D of the mark portion 6, and the ratio (T / L) are shown in Table 1.

[0105] Examples 2 to 6 An assembly sheet 1 was manufactured by the same process as in Example 1. However, as shown in Table 1, the thickness T of the second metal layer 22 was changed. In conjunction with the change in thickness T of the second metal layer 22, the depth D of the mark portion 6, the ratio (T / L), the length L1 of the recessed portion 61, the length L2 of the raised portion 62, and the ratio (L1 / L2) were changed. The depth D of the mark portion 6, the ratio (T / L), the length L1 of the recessed portion 61, the length L2 of the raised portion 62, and the ratio (L1 / L2) are transcribed below.

[0106] The sixth embodiment has the configuration of the second modified example shown in FIG 5. That is, the mark portion 6 does not have the raised portion 621.

[0107] [Table 1] [Explanation of symbols]

[0108] 1 Assembly sheet (wiring circuit board assembly sheet) 111 Mark Area 12 Circuit area 121 Wiring circuit board 2 Metal support layer 21 1st metal layer 211 marks 212 Recess 213 First uplift 214 Flat surface L: The length from the deepest part of the recess to the flat surface 22 Second metal layer T is the thickness of the second metal layer 22 3 Base insulation layer 4 Conductor Layer 5 Cover insulation layer 6 Mark Section 61 Bottom 611 Bottom 62 Ridge 621 Thank you D Depth of the mark (length in the thickness direction from the bottom of the base to the top of the raised part)

Claims

1. The process comprises: (1) preparing a metal support layer having a marked portion on one side in the thickness direction; (2) forming a base insulating layer on one side of the metal support layer in the thickness direction; and (3) forming a conductor layer on one side of the base insulating layer in the thickness direction. The above step (1) is, A step (11) of forming a mark having a recess on one side of the first metal layer in the thickness direction, The process includes, after step (11), step (12) of forming a second metal layer on one side of the first metal layer in the thickness direction, A method for manufacturing a wiring circuit board assembly sheet, wherein step (2) is performed after step (12).

2. The one surface of the first metal layer has a flat surface located outside the recess, The method for manufacturing a wiring circuit board assembly sheet according to claim 1, wherein the ratio of the thickness T of the second metal layer to the length L from the deepest part of the recess to the flat surface is 5.0 or less.

3. The marked portion has a bottom portion and a raised portion arranged around the bottom portion. The method for manufacturing a wiring circuit board assembly sheet according to claim 1, wherein the depth D of the mark portion, which is the length in the thickness direction from the bottom of the bottom portion to the top of the raised portion, is 1 μm or more.

4. The aforementioned wiring circuit board assembly sheet comprises a mark region and adjacent circuit regions in a direction perpendicular to the thickness direction, where multiple wiring circuit boards are arranged. Step (11) and step (12) are performed in the marked area. A method for manufacturing a wiring circuit board assembly sheet according to any one of claims 1 to 3, wherein step (2) and step (3) are performed in the circuit region.

5. A metal support layer having a marked portion, a base insulating layer, and a conductor layer are arranged in order toward one side in the thickness direction. The aforementioned metal support layer comprises a first metal layer with a mark having a recess and a second metal layer, arranged sequentially toward one side in the thickness direction, forming a wiring circuit board assembly sheet.

6. The marked portion has a bottom portion and a raised portion arranged around the bottom portion. The wiring circuit board assembly sheet according to claim 5, wherein the depth D of the mark portion, which is the length in the thickness direction from the bottom of the bottom portion to the top of the raised portion, is 1 μm or more.

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