Filter and multiplexer

Abstract

To provide a filter capable of improving an attenuation characteristic in a frequency band separated from a passing band.SOLUTION: A filter 100 comprises: an input terminal Tin; an output terminal Tout; a ground terminal Tg; an inductor L11 of which one end is connected to the input terminal Tin, and the other end is connected to a path 12 for connecting the input terminal Tin with the output terminal Tout; a capacitor C11 and an inductor L12 that are serially connected onto the path 12; and an inductor L13 that is parallely connected to the capacitor C11 and the inductor L12, comprises: a parallel circuit 10 that is positioned to between the inductor L11 and the output terminal Tout; and a capacitor C12 and an inductor L14 that are serially connected to between a ground terminal Tg and the path 12, and comprises a serial circuit 20 positioned to between the inductor L11 and the parallel circuit 10.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to filters and multiplexers. [Background technology]

[0002] A low-pass filter is known in which an inductor and an LC parallel circuit are connected in series between an input terminal and an output terminal, and an LC series circuit is connected between a node between the inductor and the LC parallel circuit and a ground terminal (for example, Patent Document 1).Also known is a low-pass filter in which an LC parallel circuit is connected between an input terminal and an output terminal, and capacitors are connected between nodes located on both sides of the LC parallel circuit and a ground terminal (for example, Patent Document 2). [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 3-154419 [Patent Document 2] JP 2010-141859 A Summary of the Invention [Problem to be solved by the invention]

[0004] There is a demand for improved attenuation characteristics in frequency bands away from the passband.

[0005] The present invention has been made in consideration of the above-mentioned problems, and has an object to improve the attenuation characteristics in a frequency band away from the passband. [Means for solving the problem]

[0006] The present invention is a filter comprising: a first terminal, a second terminal, a ground terminal, a first inductor having one end connected to the first terminal and the other end connected to a path connecting the first terminal and the second terminal, a first capacitor and a second inductor connected in series on the path, and a third inductor connected in parallel to the first capacitor and the second inductor, a first circuit located between the first inductor and the second terminal, and a second circuit located between the first inductor and the first circuit, and comprising a second capacitor and a fourth inductor connected in series between the ground terminal and the path.

[0007] In the above configuration, the filter may be a low-pass filter having a pass band, and the first circuit and the second circuit may form an attenuation pole at a frequency higher than the pass band.

[0008] In the above configuration, the first circuit can be configured to form a first minimum of a first attenuation pole at a frequency higher than the pass band, and the second circuit can be configured to form a second minimum of a second attenuation pole at a frequency between the first minimum and the pass band.

[0009] In the above configuration, the second inductor may have a smaller inductance than the first inductor, the third inductor, and the fourth inductor.

[0010] In the above configuration, it is possible that no element is connected between the second capacitor and the fourth inductor.

[0011] In the above configuration, it is possible that no element is connected between the first capacitor and the second inductor.

[0012] In the above configuration, the device may include a laminate in which a plurality of dielectric layers are stacked, and the first inductor, the second inductor, the third inductor, the fourth inductor, the first capacitor, and the second capacitor may be formed within the laminate.

[0013] In the above configuration, a direction of a current flowing through a line forming the second inductor and a direction of a current flowing through a line forming the fourth inductor may be opposite to each other.

[0014] In the above configuration, one electrode forming the first capacitor and a line forming the second inductor can be configured to be provided on the same surface of one of the multiple dielectric layers.

[0015] In the above configuration, the present invention can be configured to include a third capacitor and a fifth inductor connected in series between the ground terminal and the path, and a third circuit located between the first circuit and the second terminal, wherein the third circuit forms a third minimum of a third attenuation pole at a frequency higher than the first minimum.

[0016] The present invention is a multiplexer comprising the filter described above. Effect of the Invention

[0017] According to the present invention, it is possible to improve the attenuation characteristics in frequency bands away from the passband. [Brief description of the drawings]

[0018] [Figure 1] FIG. 1 is a circuit diagram of a filter in accordance with a first embodiment. [Diagram 2] FIG. 2(a) is a circuit diagram of a filter according to a first modified example of the first embodiment, and FIG. 2(b) is a circuit diagram of a filter according to a second modified example of the first embodiment. [Diagram 3] FIG. 3(a) is a circuit diagram of a filter according to a first comparative example, and FIG. 3(b) is a circuit diagram of a filter according to a second comparative example. [Figure 4] FIG. 4(a) is a diagram showing the simulation results of the pass characteristics of the filters according to Example 1, Comparative Example 1, and Comparative Example 2, and FIG. 4(b) is an enlarged view of a part of FIG. 4(a). [Diagram 5]5A is a diagram showing a simulation result of the bandpass characteristic of the filter in accordance with the first embodiment under condition A, and FIG. 5B is a diagram showing a simulation result of the bandpass characteristic under condition B. As shown in FIG. [Figure 6] FIG. 6 is a circuit diagram of a diplexer in accordance with the second embodiment. [Figure 7] FIG. 7 is a cross-sectional view of the laminate in Example 2 mounted on a substrate. [Figure 8] 8(a) to 8(f) are plan views (part 1) of the dielectric layer in Example 2. FIG. [Figure 9] 9(a) to 9(f) are plan views (part 2) of the dielectric layer in Example 2. FIG. [Figure 10] FIG. 10 is a circuit diagram of the diplexer for which the simulation was performed. [Figure 11] 11(a) and 11(b) are diagrams showing the results of a simulation conducted to examine the relationship between the direction of a current flowing through an inductor and the passing characteristics. [Figure 12] FIG. 12 shows the results of simulating the transmission characteristics of a diplexer using the filter of Example 1, Comparative Example 1, or Comparative Example 2. In FIG. [Figure 13] FIG. 13 is a plan view of the dielectric layer in the third embodiment. [Figure 14] 14(a) and 14(b) show the simulation results of the transmission characteristics of a diplexer in which the line forming the inductor and the electrode forming the capacitor are provided on separate dielectric layers or on a single dielectric layer. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, embodiments of the present invention will be described with reference to the drawings. EXAMPLES

[0020] Fig. 1 is a circuit diagram of a filter according to a first embodiment. The filter 100 according to the first embodiment is a low-pass filter. As shown in Fig. 1, in the filter 100 according to the first embodiment, an inductor L11 and a parallel circuit 10 are connected in series to a path 12 between an input terminal Tin and an output terminal Tout. A series circuit 20 is shunt-connected to the path 12 at a node N11 between the inductor L11 and the parallel circuit 10 on the path 12. A series circuit 22 is shunt-connected to the path 12 at a node N14 between the parallel circuit 10 on the path 12 and the output terminal Tout.

[0021] The inductor L11 has one end connected to the input terminal Tin and the other end connected to a node N11.

[0022] The parallel circuit 10 includes a capacitor C11 and an inductor L12 connected in series between a node N12 and a node N13 on the path 12, and an inductor L13 connected in parallel to the capacitor C11 and the inductor L12 between the node N12 and the node N13. The node N12 is located between the node N11 and the capacitor C11. The node N13 is located between the inductor L12 and a node N14. The node N12 is a node where the capacitor C11 and the inductor L13 are connected, and the node N13 is a node where the inductor L12 and the inductor L13 are connected. No element is connected between the capacitor C11 and the inductor L12.

[0023] The series circuit 20 includes a capacitor C12 and an inductor L14 connected in series between a node N11 and a ground terminal Tg. The capacitor C12 and the inductor L14 are shunt-connected to a path 12. No element is connected between the capacitor C12 and the inductor L14.

[0024] The series circuit 22 includes a capacitor C13 and an inductor L15 connected in series between the node N14 and a ground terminal Tg. The capacitor C13 and the inductor L15 are shunt-connected to the path 12. No element is connected between the capacitor C13 and the inductor L15.

[0025] The filter 100 passes, among high-frequency signals input to an input terminal Tin, signals in a passband to an output terminal Tout and suppresses signals in other bands.

[0026] [Variations] Fig. 2(a) is a circuit diagram of a filter according to Modification 1 of Example 1. As shown in Fig. 2(a), in a filter 100a according to Modification 1 of Example 1, the series circuit 22 is not connected. The other configurations are the same as those in Example 1, and therefore the description thereof will be omitted.

[0027] Fig. 2(b) is a circuit diagram of a filter according to Modification 2 of Example 1. As shown in Fig. 2(b), in a filter 100b according to Modification 2 of Example 1, a capacitor C14 is connected between a node N15 between a node N14 on the path 12 and the output terminal Tout, and a ground terminal Tg. The capacitor C14 is shunt-connected to the path 12. The other configurations are the same as those of Example 1, and therefore description thereof will be omitted.

[0028] [Comparative Example] Fig. 3(a) is a circuit diagram of a filter according to Comparative Example 1. As shown in Fig. 3(a), in a filter 500 according to Comparative Example 1, a parallel circuit 110 is connected instead of the parallel circuit 10. The parallel circuit 110 differs from the parallel circuit 10 in that the inductor L12 is not connected in series to the capacitor C11. That is, the parallel circuit 110 includes the capacitor C11 and an inductor L13 connected in parallel to the capacitor C11. The other configurations are the same as those in Example 1, and therefore will not be described.

[0029] Fig. 3(b) is a circuit diagram of a filter according to Comparative Example 2. As shown in Fig. 3(b), in a filter 500a according to Comparative Example 2, a parallel circuit 110 is connected instead of the parallel circuit 10. Also, an inductor L16 is connected between a node N14 on a path 12 and an output terminal Tout. One end of the inductor L16 is connected to the node N14, and the other end is connected to the output terminal Tout. The other configurations are the same as those in Example 1, and therefore description thereof will be omitted.

[0030] [simulation] Circuit simulation was performed on the pass characteristics of the filters according to Example 1, Comparative Example 1, and Comparative Example 2. The simulation conditions for the filter 100 according to Example 1 are as follows. Note that the Q value is the Q value at the frequency of the attenuation pole (the same applies below). Capacitor C11: 0.8pF Capacitor C12: 0.3 pF Capacitor C13: 0.5pF Inductor L11: 3.0nH Inductor L12: 0.5nH Inductor L13: 2.0nH Inductor L14: 15.0nH Inductor L15: 5.0nH Q value of inductors L11 to L15: 50

[0031] The simulation conditions for the filter 500 according to the first comparative example are as follows. Capacitor C11: 0.8pF Capacitor C12: 0.3 pF Capacitor C13: 0.5pF Inductor L11: 3.0nH Inductor L13: 2.0nH Inductor L14: 15.0nH Inductor L15: 5.0nH Q value of inductors L11, L13 to L15: 50

[0032] The simulation conditions for the filter 500a according to the second comparative example are as follows. Capacitor C11: 0.85pF Capacitor C12: 0.30pF Capacitor C13: 0.51pF Inductor L11: 3.0nH Inductor L13: 1.9nH Inductor L14: 15.0nH Inductor L15: 5.0nH Inductor L16: 0.5nH Q value of inductors L11, L13 to L16: 50

[0033] FIG. 4(a) is a diagram showing the simulation results of the pass characteristics of the filters according to Example 1, Comparative Example 1, and Comparative Example 2, and FIG. 4(b) is a diagram showing an enlarged portion of FIG. 4(a). As shown in FIG. 4(a) and FIG. 4(b), the filters according to Example 1, Comparative Example 1, and Comparative Example 2 are low-pass filters, so that the pass band is about 2.2 GHz or less. In Example 1, Comparative Example 1, and Comparative Example 2, a series circuit 20 consisting of a capacitor C12 and an inductor L14 is shunt-connected to the path 12, so that an attenuation pole A2 having a local minimum at a frequency higher than the pass band Pass is formed. The attenuation pole A2 improves the steepness of the attenuation between the pass band Pass and the attenuation region.

[0034] In the first embodiment, a parallel circuit 10 including a capacitor C11 and inductors L12 and L13 is connected between the input terminal Tin and the output terminal Tout. In the first and second comparative examples, a parallel circuit 110 including a capacitor C11 and an inductor L13 is connected between the input terminal Tin and the output terminal Tout. This forms an attenuation pole A1 having a local minimum at a frequency higher than the local minimum at the attenuation pole A2. In the first embodiment, the first and second comparative examples, a series circuit 22 including a capacitor C13 and an inductor L15 is shunt-connected to the path 12. This forms an attenuation pole A3 having a local minimum at a frequency higher than the local minimum at the attenuation pole A1. The formation of the attenuation pole A1 and the attenuation pole A3 widens the bandwidth of the attenuation region.

[0035] In the high frequency band of approximately 5 GHz or more, the attenuation characteristics of Comparative Example 2 are improved compared to Comparative Example 1, and the attenuation characteristics of Example 1 are improved compared to Comparative Example 2. From this simulation result, it is found that by using a parallel circuit 10 in which inductor L12 is connected in series to capacitor C11 and inductor L13 is connected in parallel to capacitor C11 and inductor L12, as in Example 1, the attenuation characteristics in the high frequency band can be improved.

[0036] As described above, according to the first embodiment and its modified example, the inductor L11 (first inductor) and the parallel circuit 10 (first circuit) are connected in series to the path 12 between the input terminal Tin (first terminal) and the output terminal Tout (second terminal), and the series circuit 20 (second circuit) is shunt-connected to the path 12. One end of the inductor L11 is connected to the input terminal Tin, and the other end is connected to the path 12. The parallel circuit 10 includes a capacitor C11 (first capacitor) and an inductor L12 (second inductor) connected in series on the path 12, and an inductor L13 (third inductor) connected in parallel to the capacitor C11 and the inductor L12, and is located between the inductor L11 and the output terminal Tout. The series circuit 20 includes a capacitor C12 (second capacitor) and an inductor L14 (fourth inductor) connected in series between the ground terminal Tg and the path 12, and is located between the inductor L11 and the parallel circuit 10. This makes it possible to improve the attenuation characteristics in the high frequency band, as shown in FIG. 4(a) and FIG. 4(b).

[0037] In the first embodiment and its modified example, the inductor L11 is a first-stage inductor connected to the input terminal Tin. In this case, the inductor L11 also plays a role in impedance matching, and therefore the inductance is determined to a certain extent. For this reason, it is difficult to improve the attenuation characteristics by changing the inductance of the inductor L11. Therefore, it is preferable to use the parallel circuit 10 as the parallel circuit connected to the path 12 between the input terminal Tin and the output terminal Tout.

[0038] In the first embodiment and its modified example, as shown in FIG. 4(a), the parallel circuit 10 and the series circuit 20 form an attenuation pole at a frequency higher than the pass band Pass. For example, the parallel circuit 10 forms a minimum (first minimum) of the attenuation pole A1 (first attenuation pole) at a frequency higher than the pass band Pass. The series circuit 20 forms a minimum (second minimum) of the attenuation pole A2 (second attenuation pole) at a frequency between the minimum of the attenuation pole A1 and the pass band Pass. This can improve the steepness of the attenuation amount between the pass band Pass and the attenuation region, and can widen the bandwidth of the attenuation region.

[0039] Here, the reason why the series circuit 20 forms the attenuation pole A2 having a local minimum at a frequency close to the pass band Pass will be explained. When the series circuit 20 forms the attenuation pole A2, the inductance of the inductor L14 becomes large. Therefore, even if the inductance of the inductor L14 varies, the effect on the steepness of the attenuation between the pass band Pass and the attenuation region is small. On the other hand, when the attenuation pole A2 is formed by the parallel circuit 10, the inductance of the inductor L13 becomes small. Therefore, if the inductance of the inductor L13 varies, the effect on the steepness of the attenuation between the pass band Pass and the attenuation region becomes large. A simulation of this is shown below.

[0040] [simulation] The pass characteristic of the filter according to the first embodiment was simulated under the following conditions A and B. Condition A is a case where the attenuation pole A2 is formed by the series circuit 20. Condition B is a case where the attenuation pole A2 is formed by the parallel circuit .

[0041] Condition A Capacitor C11: 0.8pF Capacitor C12: 0.3 pF Capacitor C13: None Inductor L11: 3.0nH Inductor L12: 0.5nH Inductor L13: 2.0nH Inductor L14: 3 levels: 15.0nH, 14.95nH, 15.05nH Inductor L15: None Q value of inductors L11 to L15: 50

[0042] Condition B Capacitor C11: 4.5pF Capacitor C12: 1.2pF Capacitor C13: None Inductor L11: 6.0nH Inductor L12: None Inductor L13: 3 levels: 1.0nH, 0.95nH, 1.05nH Inductor L14: 1.0nH Inductor L15: None Q value of inductors L11 to L15: 50

[0043] 5(a) shows the pass characteristic of the filter according to the first embodiment under condition A, and FIG. 5(b) shows the pass characteristic under condition B. In FIG. 5(a), the inductance of the inductor L14 is indicated by a solid line when it is 15.0 nH, by a dotted line when it is 14.95 nH, and by a dashed line when it is 15.05 nH. The solid line, dotted line, and dashed line almost overlap. In FIG. 5(b), the inductance of the inductor L13 is indicated by a solid line when it is 1.0 nH, by a dotted line when it is 0.95 nH, and by a dashed line when it is 1.05 nH.

[0044] As shown in FIG. 5(a), when the attenuation pole A2 is formed by the series circuit 20, even if the inductance of the inductor L14 varies, the effect on the steepness of the attenuation between the passband Pass and the attenuation band is small.

[0045] As shown in FIG. 5(b), in the case where the attenuation pole A2 is formed by the parallel circuit 10, when the inductance of the inductor L13 varies, the steepness of the attenuation between the passband Pass and the attenuation band changes.

[0046] When the inductor is formed, for example, by a conductor pattern formed on a dielectric layer, the inductance varies due to manufacturing errors, etc. Therefore, from the viewpoint of stabilizing the steepness of the attenuation between the passband Pass and the attenuation band, it is preferable to form the attenuation pole A2 by the series circuit 20.

[0047] In the first embodiment and its modified example, as shown in the simulation conditions of FIG. 4(a) and FIG. 4(b), the inductor L12 has a smaller inductance than the inductor L11, the inductor 13, and the inductor L14. In such a case, as shown in FIG. 4(a) and FIG. 4(b), the attenuation characteristics in the high frequency band are improved. From the viewpoint of improving the attenuation characteristics, the inductance of the inductor L12 is preferably 1 / 2 or less, more preferably 1 / 3 or less, and even more preferably 1 / 4 or less, of the smallest inductor among the inductors L11, the inductor 13, and the inductor L14. When the attenuation pole A2 is formed by the series circuit 20, the inductance of the inductor L14 becomes large, so that the inductance of the inductor L12 is preferably 1 / 10 or less, more preferably 1 / 20 or less, and even more preferably 1 / 30 or less, of the inductance of the inductor L14.

[0048] In the first embodiment and the second modification of the first embodiment, as shown in Fig. 1 and Fig. 2(b), a series circuit 22 is shunt-connected to the path 12 between a node N14 located between the node N13 and the output terminal Tout on the path 12 and a ground terminal Tg. The series circuit 22 includes a capacitor C13 and an inductor L15 connected in series between the node N14 and the ground terminal Tg. As shown in Fig. 4(a), the series circuit 22 forms a minimum (third minimum) of the attenuation pole A3 (third attenuation pole) at a frequency higher than the minimum (first minimum) of the attenuation pole A1 (first attenuation pole). This makes it possible to widen the bandwidth of the attenuation region.

[0049] 2B, in the second modification of the first embodiment, a capacitor C14 is shunt-connected to the path 12 between a node N15 located between the node N14 and the output terminal Tout on the path 12 and the ground terminal Tg. The capacitor C14 may be, for example, a capacitor in the final stage connected to the output terminal Tout. This can further improve the attenuation characteristics in the high frequency band. EXAMPLES

[0050] FIG. 6 is a circuit diagram of a diplexer according to a second embodiment. As shown in FIG. 6, a diplexer 300 according to the second embodiment includes a filter 100a according to the first modification of the first embodiment, and a filter 200. The filter 100a is a low-pass filter connected between a common terminal Ant and a terminal LB. The filter 200 is a high-pass filter connected between a common terminal Ant and a terminal HB. The filter 100a passes high-frequency signals in a low band and suppresses signals of other frequencies. The filter 200 passes high-frequency signals in a high band, which is higher than the low band, and suppresses signals of other frequencies.

[0051] The configuration of the filter 100a is the same as that shown in FIG. 2(a), and therefore a description thereof will be omitted.

[0052] In the filter 200, a capacitor C21, a capacitor C22, and a capacitor C23 are connected in series to a path 14 between a common terminal Ant and a terminal HB. A capacitor C24 and an inductor L21 are connected in series between a node N21 between the capacitors C21 and C22 on the path 14 and a ground terminal Tg. The capacitor C24 and the inductor L21 are shunt-connected to the path 14. A capacitor C25 and an inductor L22 are connected in series between a node N22 between the capacitors C22 and C23 on the path 14 and a ground terminal Tg. The capacitor C25 and the inductor L22 are shunt-connected to the path 14.

[0053] FIG. 7 is a cross-sectional view of the laminate in Example 2 mounted on a substrate. As shown in FIG. 7, the laminate 30 is mounted on a substrate 40. The laminate 30 is formed of a plurality of dielectric layers 31a-31l. The laminate 30 includes inductors L11-L14 and capacitors C11 and C12 constituting the filter 100a, and inductors L21, L22 and capacitors C21-C25 constituting the filter 200. A terminal 34 is provided on the lower surface of the laminate 30. A terminal 42 is provided on the substrate 40. The terminal 34 and the terminal 42 are bonded to each other by a bonding material 44. The substrate 40 is, for example, a circuit board. When mounting the laminate 30 on the substrate 40, for example, solder is used as the bonding material 44.

[0054] Fig. 8(a) to Fig. 9(f) are plan views of the dielectric layers in Example 2. Fig. 8(a) to Fig. 9(e) are plan views of the dielectric layers 31b to 31l as viewed from above. Fig. 9(f) is a plan view of the terminal 34 as viewed through the dielectric layer 31l. The dielectric layer 31a is omitted from the illustration.

[0055] As shown in FIGS. 8(a) to 9(e), conductor patterns 32b to 32l are provided on dielectric layers 31b to 31l, respectively, and via wirings 33b to 33l are provided penetrating the dielectric layers 31b to 31l, respectively.

[0056] First, a description will be given of the inductors L11 to L14 and the capacitors C11, C12 formed in the laminate 30. The inductors L11 to L14 and the capacitors C11, C12 configure a filter 100a, which is a low-pass filter, as shown in FIG.

[0057] A conductor pattern 32b provided on the dielectric layer 31b forms a line L11a. A conductor pattern 32c provided on the dielectric layer 31c forms a line L11b. The lines L11a and L11b are electrically connected by a via wiring 33b to form an inductor L11.

[0058] Conductor pattern 32b provided on dielectric layer 31b forms line L14a. Conductor pattern 32c provided on dielectric layer 31c forms line L14b. Conductor pattern 32d provided on dielectric layer 31d forms line L14c. Conductor pattern 32e provided on dielectric layer 31e forms line L14d. Lines L14a to L14d are electrically connected by via wirings 33b to 33d to form inductor L14.

[0059] A conductor pattern 32b provided on the dielectric layer 31b forms a line L13a. A conductor pattern 32c provided on the dielectric layer 31c forms a line L13b. The lines L13a and L13b are electrically connected by a via wiring 33b to form the inductor L13.

[0060] A conductor pattern 32k provided on the dielectric layer 31k forms a line L12a. This line L12a forms the inductor L12.

[0061] A conductor pattern 32h provided on the dielectric layer 31h forms one electrode C11a of the capacitor C11, and a conductor pattern 32i provided on the dielectric layer 31i forms the other electrode C11b of the capacitor C11.

[0062] A conductor pattern 32h provided on the dielectric layer 31h forms one electrode C12a of the capacitor C12, and a conductor pattern 32f provided on the dielectric layer 31f forms the other electrode C12b of the capacitor C12.

[0063] Next, a description will be given of the capacitors C21 to C25 and the inductors L21, L22 formed in the laminate 30. The capacitors C21 to C25 and the inductors L21, L22 configure a filter 200, which is a high-pass filter, as shown in FIG.

[0064] A conductor pattern 32i provided on the dielectric layer 31i forms one electrode C21a of the capacitor C21, and a conductor pattern 32h provided on the dielectric layer 31h forms the other electrode C21b of the capacitor C21.

[0065] A conductor pattern 32h provided on the dielectric layer 31h forms one electrode C22b of the capacitor C22, and a conductor pattern 32i provided on the dielectric layer 31i forms the other electrode C22a of the capacitor C22.

[0066] A conductor pattern 32h provided on the dielectric layer 31h forms one electrode C24b of the capacitor C24, and a conductor pattern 32f provided on the dielectric layer 31f forms the other electrode C24a of the capacitor C24.

[0067] A conductor pattern 32i provided on the dielectric layer 31i forms one electrode C25a of the capacitor C25, and a conductor pattern 32g provided on the dielectric layer 31g forms the other electrode C25b of the capacitor C25.

[0068] The conductor pattern 32i provided on the dielectric layer 31i forms one electrode C23a of the capacitor C23, and the conductor pattern 32j provided on the dielectric layer 31j forms the other electrode C23b of the capacitor C23.

[0069] Conductor pattern 32b provided on dielectric layer 31b forms line L21a. Conductor pattern 32c provided on dielectric layer 31c forms line L21b. Conductor pattern 32d provided on dielectric layer 31d forms line L21c. The lines L21a to L21c are electrically connected by via wirings 33b and 33c to form inductor L21.

[0070] A conductor pattern 32b provided on the dielectric layer 31b forms the line L22a. A conductor pattern 32c provided on the dielectric layer 31c forms the line L22b. The line L22a and the line L22b are electrically connected by a via wiring 33b to form the inductor L22.

[0071] 9(f), the terminals 34 provided on the lower surface of the dielectric layer 31l form a common terminal Ant, a terminal LB, a terminal HB, and a ground terminal Tg. Although the example shows a case where a plurality of ground terminals Tg are provided, they may be connected to each other to provide a single ground terminal Tg.

[0072] The dielectric layers 31a to 31l are made of, for example, a ceramic material, and mainly contain, for example, oxides of Si, Ca, and Mg (for example, diopside crystals such as CaMgSi 2 O 6 ). The main component of the dielectric layers 31a-31l may be an oxide other than Si, Ca, and / or Mg. Furthermore, the dielectric layers 31a-31l may contain at least one oxide of Ti, Zr, and Al as an insulating material. The dielectric layers 31a-31l may be made of a resin such as glass epoxy resin, or ceramics such as LTCC (Low Temperature Co-fired Ceramics) or HTCC (High Temperature Co-fired Ceramics). The conductor patterns 32b-32l, the via wirings 33b-33l, and the upper portion of the terminal 34 are non-magnetic metal layers mainly composed of, for example, Ag, Pd, Pt, Cu, Ni, Au, an Au-Pd alloy, or an Ag-Pd alloy. The upper portion of the terminal 34 may be made of TiO in addition to the above metal materials. 2 , ZrO 2 , or Al 2 O 3 The lower portion of the terminal 34 may include a non-conductive material such as a Ni film and a Sn film.

[0073] In the second embodiment, for example, when a high-frequency signal passes from the common terminal Ant to the terminal LB, as shown in Fig. 8(a) to Fig. 9(f), a current flows clockwise through the line L12a forming the inductor L12. A current flows counterclockwise through the lines L13a and 13b forming the inductor L13. A current flows counterclockwise through the lines L14a to 14d forming the inductor L14. Here, the relationship between the direction of the current flowing through the line L12a (inductor L12), the lines L13a and 13b (inductor L13), and the lines L14a to 14d (inductor L14) and the passing characteristics will be described.

[0074] [simulation] FIG. 10 is a circuit diagram of a diplexer for which a simulation was performed. As shown in FIG. 10, in the diplexer for which a simulation was performed, a filter 100 is connected between a common terminal Ant and a terminal LB, and a filter 200 is connected between a common terminal Ant and a terminal HB. The filter 100 has been described in FIG. 1, and the filter 200 has been described in FIG. 6, so their description will be omitted here. In addition, hereinafter, the direction of the current flowing through the line L12a forming the inductor L12 is simply referred to as the direction of the current in the inductor L12. Similarly, the direction of the current flowing through the lines 13a and 13b forming the inductor L13 is referred to as the direction of the current in the inductor L13. The direction of the current flowing through the lines L14a to 14d forming the inductor L14 is referred to as the direction of the current in the inductor L14.

[0075] An electromagnetic field simulation was performed on the pass characteristics of a diplexer having the circuit configuration shown in Fig. 10. Approximate values ​​of capacitance of capacitors C11 to C13 and approximate values ​​of inductance of inductors L11 to L16 constituting filter 100 are as follows. Capacitor C11: 0.97pF Capacitor C12: 0.30pF Capacitor C13: 0.30pF Inductor L11: 3.7nH Inductor L12: 0.3nH Inductor L13: 2.55nH Inductor L14: 15.0nH Inductor L15: 12.0nH Q value of inductors L11 to L15: 50

[0076] The approximate values ​​of capacitance of capacitors C21 to C25 and the approximate values ​​of inductance of inductors L21 and L22 that configure filter 200 are as follows. Capacitor C21: 1.3pF Capacitor C22: 1.2pF Capacitor C23: 1.4pF Capacitor C24: 0.3 pF Capacitor C25: 2.0pF Inductor L21: 18.0nH Inductor L22: 6.0nH Q value of inductors L21 and L22: 50

[0077] Figures 11(a) and 11(b) are diagrams showing the results of a simulation that investigated the relationship between the direction of the current flowing through the inductors and the passing characteristics. Figure 11(a) shows the simulation result when the direction of the current in inductor L13 is the same as the direction of the current in inductor L14, and Figure 11(b) shows the simulation result when they are opposite. In Figures 11(a) and 11(b), the solid lines show the case when the direction of the current in inductor L12 is opposite to the direction of the current in inductor L14, and the dotted lines show the case when they are the same.

[0078] 11(a) and 11(b), whether the direction of the current in inductor L13 and the direction of the current in inductor L14 are the same or opposite, when the direction of the current in inductor L12 and the direction of the current in inductor L14 are opposite, the attenuation characteristics of filter 100 in the high frequency band are improved compared to when the directions of the current in inductor L12 and the current in inductor L14 are the same. This is believed to be because the magnetic field generated by the current flowing through line L12a forming inductor L12 and the magnetic field generated by the current flowing through lines 14a to 14d forming inductor L14 are in the opposite directions and therefore cancel each other out, preventing the inductance from decreasing.

[0079] Therefore, from the viewpoint of improving the attenuation characteristics of the filter 100 in the high frequency band, it is preferable that the direction of the current flowing through the line L12a forming the inductor L12 is opposite to the direction of the current flowing through the lines L14a-14d forming the inductor L14, as in the second embodiment.

[0080] Next, FIG. 10 shows the results of a circuit simulation of the pass characteristics when the filter 500 according to the comparative example 1 (see FIG. 3(a)) or the filter 500a according to the comparative example 2 (see FIG. 3(b)) is connected between the common terminal Ant and the terminal LB instead of the filter 100 according to the first embodiment.

[0081] The simulation conditions for filter 200 are as follows: Capacitor C21: 1.3pF Capacitor C22: 1.2pF Capacitor C23: 1.4pF Capacitor C24: 0.3 pF Capacitor C25: 2.0pF Inductor L21: 18.0nH Inductor L22: 6.0nH Q value of inductors L21 and L22: 50

[0082] The simulation conditions for filter 100 when filter 100 according to Example 1 is connected between common terminal Ant and terminal LB, the simulation conditions for filter 500 when filter 500 according to Comparative Example 1 is connected, and the simulation conditions for filter 500a when filter 500a according to Comparative Example 2 is connected are the same as the simulation conditions in Figures 4(a) and 4(b).

[0083] Fig. 12 shows a simulation result of the pass characteristic of a diplexer using the filter of Example 1, Comparative Example 1, or Comparative Example 2. As shown in Fig. 12, in the diplexer, even when the conditions of filter 200, which is a high-pass filter, are the same, the attenuation characteristics of filter 200 in the high frequency band change when filter 100, 500, or 500a of Example 1, Comparative Example 1, or Comparative Example 2 is used as the low-pass filter. When filter 100 of Example 1 is used as the low-pass filter, the pass characteristic of filter 200, which is a high-pass filter, in the high frequency band is improved compared to when filters 500 and 500a of Comparative Example 1 and Comparative Example 2 are used.

[0084] In the second embodiment, a diplexer is used as an example of a multiplexer, but a triplexer, a duplexer, a quadplexer, or the like may also be used. EXAMPLES

[0085] In the second embodiment, as shown in Fig. 9(b) and Fig. 9(d), an example is shown in which the electrode C11b forming the capacitor C11 and the line L12a forming the inductor L12 are formed on separate dielectric layers 31i and 31k. In the third embodiment, an example is shown in which the electrode C11b forming the capacitor C11 and the line L12a forming the inductor L12 are formed on the same dielectric layer 31i.

[0086] Fig. 13 is a plan view of a dielectric layer in Example 3. As shown in Fig. 13, an electrode C11b of a capacitor C11 and a line L12a forming an inductor L12 are provided on the upper surface of one dielectric layer 31i. The other configurations are the same as those in Example 2, and therefore illustrations and descriptions thereof are omitted.

[0087] According to the third embodiment, the electrode C11b forming the capacitor C11 and the line L12a forming the inductor L12 are provided on the same surface of one dielectric layer 31i. Due to manufacturing errors and the like, the sizes of the electrode C11b and the line L12a may vary from the design values. When the electrode C11b is smaller than the design value, the line L12a becomes thinner than the design value, so that the capacitance of the capacitor C11 becomes smaller and the inductance of the inductor L12 becomes larger. Conversely, when the electrode C11b is larger than the design value, the line L12a becomes thicker than the design value, so that the capacitance of the capacitor C11 becomes larger and the inductance of the inductor L12 becomes smaller. When the capacitance of the capacitor C11 becomes smaller, the attenuation pole shifts to the high frequency side, and when the capacitance of the capacitor C11 becomes larger, the attenuation pole shifts to the low frequency side. On the other hand, when the inductance of the inductor L12 becomes larger, the attenuation pole shifts to the low frequency side, and when the inductance of the inductor L12 becomes smaller, the attenuation pole shifts to the high frequency side. For this reason, by providing the electrode C11b and the line L12a on the same surface of a single dielectric layer 31i, it is possible to suppress changes in the frequency of the attenuation pole even if the sizes of the electrode C11b and the line L12a vary from the design values.

[0088] [simulation] The electromagnetic field simulation was performed on the transmission characteristics of the diplexer assuming that the electrode C11b forming the capacitor C11 and the line L12a forming the inductor L12 are provided on different dielectric layers as in Example 2, and that they are provided on the same surface of one dielectric layer as in Example 3. The reference conditions for the simulation are the same as those in FIG. 11(b). When the electrode C11b and the line L12a are provided on different dielectric layers as in Example 2, the simulation was performed by setting the line L12a to a size that is 5 μm larger and 5 μm smaller than the size under the reference conditions. When the electrode C11b and the line L12a are provided on the same surface of one dielectric layer as in Example 3, the simulation was performed by setting the electrode C11b and the line L12a to a size that is 5 μm larger and 5 μm smaller than the size under the reference conditions.

[0089] 14(a) and 14(b) show the results of simulating the transmission characteristics of a diplexer when the line L12a forming the inductor L12 and the electrode C11b forming the capacitor C11 are provided on separate dielectric layers or when they are provided on one dielectric layer. As shown in Fig. 14(a) and 14(b), when the electrode C11b and the line L12a are provided on the same surface of one dielectric layer, it is found that the frequency fluctuation when the pattern size changes can be suppressed to a small value, as shown by the arrow, compared to when they are provided on separate dielectric layers.

[0090] Although the embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications and variations are possible within the scope of the gist of the present invention as described in the claims. [Explanation of symbols]

[0091] 10, 110...parallel circuit, 12...path, 14...path, 20...series circuit, 22...series circuit, 30...laminated body, 31a to 31k...dielectric layer, 32b to 32k...conductor pattern, 33b to 33k...via wiring, 34...terminal, 40...substrate, 42...terminal, 100, 100a, 100b, 200, 500, 500a...filter, 300...diplexer, Tin...input terminal, Tout...output terminal, Tg...ground terminal, L11 to L16...inductor, C11 to C14...capacitor, N11 to N15...node, L2 1, L22...inductor, C21 to C25...capacitors, N21, N22...nodes, L11a, L11b...lines, L12a...lines, L13a, L13b...lines, L14a to L14d...lines, C11a, C11b...electrodes, C12a, C12b...electrodes, L21a to L21c...lines, L22a, L22b...lines, C21a, C21b...electrodes, C22a, C22b...electrodes, C23a, C23b...electrodes, C24a, C24b...electrodes, C25a, C25b...electrodes, Ant...common terminal, LB...terminal, HB...terminal

Claims

1. A first terminal; A second terminal; A ground terminal; a first inductor having one end connected to the first terminal and the other end connected to a path connecting the first terminal and the second terminal; a first circuit including a first capacitor and a second inductor connected in series on the path, and a third inductor connected in parallel to the first capacitor and the second inductor, the first circuit being located between the first inductor and the second terminal; a second capacitor and a fourth inductor connected in series between the ground terminal and the path, and a second circuit located between the first inductor and the first circuit.

2. the filter is a low pass filter having a pass band; The filter of claim 1 , wherein the first circuit and the second circuit form an attenuation pole at a frequency higher than the passband.

3. the first circuit forms a first minimum of a first attenuation pole at a frequency higher than the passband; 3. The filter of claim 2, wherein the second circuit forms a second minimum of a second attenuation pole at a frequency between the first minimum and the passband.

4. 3. The filter according to claim 1, wherein the second inductor has a smaller inductance than the first inductor, the third inductor, and the fourth inductor.

5. 3. The filter according to claim 1, wherein no element is connected between the second capacitor and the fourth inductor.

6. 3. The filter according to claim 1, wherein no element is connected between the first capacitor and the second inductor.

7. A laminate in which a plurality of dielectric layers are laminated, The filter according to claim 1 , wherein the first inductor, the second inductor, the third inductor, the fourth inductor, the first capacitor, and the second capacitor are formed within the laminate.

8. 8. The filter according to claim 7, wherein a direction of a current flowing through a line forming the second inductor is opposite to a direction of a current flowing through a line forming the fourth inductor.

9. 8. The filter according to claim 7, wherein one electrode forming the first capacitor and a line forming the second inductor are provided on the same surface of one of the plurality of dielectric layers.

10. a third capacitor and a fifth inductor connected in series between the ground terminal and the path, and a third circuit located between the first circuit and the second terminal; 4. The filter of claim 3, wherein the third circuit forms a third minimum of a third attenuation pole at a frequency higher than the first minimum.

11. A multiplexer comprising a filter according to claim 1 or 2.

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