Imaging apparatus

Abstract

To suppress electrostatic damage in an imaging apparatus.SOLUTION: An imaging apparatus 12 includes a substrate 20 having a main surface 20A including an imaging area IA in which an image is captured and a non-imaging area NIA outside the imaging area IA, an imaging element 25 arranged in the imaging area IA and having an electrode 25A1 made of a first conductive film, first wiring 40 arranged at least in the non-imaging area NIA and made of a second conductive film, an insulating film 31 arranged across the imaging area IA and the non-imaging area NIA and interposed between the first conductive film and the second conductive film, and second wiring 41 arranged at least in the non-imaging area NIA, the second wiring 41 consists of a part of the first conductive film separate from the electrode 25A1, and is arranged such that at least a portion of the second wiring 41 overlaps with the first wiring 40.SELECTED DRAWING: Figure 9

Description

[Technical field]

[0001] The technology disclosed in this specification relates to an imaging device. [Background technology]

[0002] Conventionally, some imaging devices use a photoelectric conversion element (photodiode) as an imaging element. The photoelectric conversion element includes a semiconductor layer, and the one described in the following Patent Document 1 is known as a semiconductor device having a semiconductor layer. The semiconductor device described in Patent Document 1 is a semiconductor device having a first region and a second region on the same plane, the first region has a transistor, the second region has a dummy transistor, the transistor has a first wiring layer, a semiconductor layer containing an oxide arranged above the first wiring layer, a second wiring layer arranged above the semiconductor layer, and a third wiring layer arranged above the second wiring layer, and the dummy transistor has the same area as one or more selected from the first wiring layer, the second wiring layer, the semiconductor layer, and the third wiring layer. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] International Publication No. 2019 / 171198 Summary of the Invention [Problem to be solved by the invention]

[0004] Incidentally, an imaging device using a photoelectric conversion element as an imaging element has an imaging region where the photoelectric conversion element is arranged to capture an image, and a non-imaging region where wiring connected to the photoelectric conversion element and the like is routed. In the non-imaging region, a plurality of wirings are routed at high density, so there is a problem that it is difficult to secure a space for arranging a dummy transistor as described in the above-mentioned Patent Document 1. Therefore, when there is a difference in density of a pattern made of a conductive film between the imaging region and the non-imaging region in the imaging device, there is a risk of electrostatic breakdown due to charge-up.

[0005] The technology described in this specification was developed based on the above circumstances, and aims to suppress electrostatic damage in an imaging device. [Means for solving the problem]

[0006] (1) An imaging device related to the technology described in this specification includes a substrate having a main surface including an imaging region where an image is captured and a non-imaging region outside the imaging region, an imaging element arranged in the imaging region and having an electrode made of a first conductive film, a first wiring arranged at least in the non-imaging region and made of a second conductive film, an insulating film arranged across the imaging region and the non-imaging region and interposed between the first conductive film and the second conductive film, and a second wiring arranged at least in the non-imaging region, wherein the second wiring is made of a part of the first conductive film separate from the electrode and is arranged so as to overlap at least a portion of the first wiring.

[0007] (2) In addition to the above (1), the imaging device may further include a switching element arranged in the imaging region and connected to the imaging element, a third wiring arranged at least in the imaging region and connected to the switching element and the first wiring, the third wiring being made of a third conductive film, and a signal detection unit connected to the first wiring and detecting a signal transmitted by the first wiring, and the second wiring may be directly disconnected from the signal detection unit.

[0008] (3) In addition to the above (2), the imaging device may further include a contact hole that connects the first wiring and the second wiring to each other, the insulating film being provided at a position that overlaps both the first wiring and the second wiring.

[0009] (4) In addition to the above (2) or (3), the imaging device may be configured such that the second conductive film has a lower sheet resistance than the first conductive film.

[0010] (5) In addition to any one of (2) to (4), the imaging device may be configured such that the third conductive film has a lower sheet resistance than the second conductive film.

[0011] (6) In addition to any one of (2) to (5) above, the imaging device may further include a fourth wiring arranged at least in the imaging region, connected to the switching element, and supplying a scanning signal to the switching element, the fourth wiring being made of a part of the second conductive film separate from the first wiring.

[0012] (7) In addition to any one of (1) to (6) above, the imaging device may be configured so that a first area ratio obtained by dividing an area of ​​the second wiring by an area of ​​the non-imaging region is equal to or greater than a second area ratio obtained by dividing an area of ​​the electrode by an area of ​​the imaging region.

[0013] (8) In addition to any one of (1) to (7) above, the imaging device may further include a lower electrode, a photoelectric conversion layer stacked on the upper side of the lower electrode, and an upper electrode stacked between the lower electrode and the photoelectric conversion layer so as to sandwich the photoelectric conversion layer, and the lower electrode may include the electrode.

[0014] (9) In addition to any one of (1) to (8), the imaging device may be configured such that the second conductive film includes a metal material. Effect of the Invention

[0015] According to the technology described in this specification, electrostatic damage can be suppressed in an imaging device. [Brief description of the drawings]

[0016] [Figure 1] FIG. 1 is a block diagram showing a schematic configuration of a radiation image capturing system according to a first embodiment. [Diagram 2] FIG. 1 is a diagram showing a schematic configuration of an imaging device included in a radiation image capturing system according to a first embodiment; [Diagram 3] FIG. 2 is a plan view showing pixels of a substrate provided in the imaging device according to the first embodiment; [Figure 4] 4 is a cross-sectional view of the substrate according to the first embodiment taken along line iv-iv in FIG. [Diagram 5] 4 is a cross-sectional view of the substrate according to the first embodiment taken along line vv in FIG. [Figure 6] 4 is a cross-sectional view of the substrate according to the first embodiment taken along line vi-vi in ​​FIG. [Figure 7] 7 is a cross-sectional view of the substrate according to the first embodiment taken along line vii-vii of FIG. 3 . [Figure 8] FIG. 1 is a plan view showing a configuration in the vicinity of a boundary between an imaging region and a non-imaging region in a substrate according to a first embodiment; [Figure 9] FIG. 4 is a plan view showing a configuration made of a third metal film near the boundary between an imaging region and a non-imaging region in the substrate according to the first embodiment; [Figure 10] 8 in the substrate according to the first embodiment. [Figure 11] 10 is a cross-sectional view of the substrate according to the first embodiment taken along line xi-xi in FIG. [Figure 12] 8 in the substrate according to the first embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0017] <Embodiment 1> A first embodiment will be described with reference to Fig. 1 to Fig. 12. In this embodiment, an imaging device 12 provided in a radiation image capturing system 10 is illustrated. Note that the X-axis, Y-axis, and Z-axis are shown in a part of each drawing, and each axis direction is drawn to be the direction shown in each drawing. In addition, the up-down direction is based on Fig. 4 to Fig. 7 and Fig. 10 to Fig. 12, and the upper side of each drawing is the front side and the lower side of each drawing is the back side.

[0018] As shown in FIG. 1, the radiation image capturing system 10 includes a radiation irradiating device 11 that irradiates a subject (e.g., a person) 1 with radiation (e.g., X-rays (X-rays) or the like), an imaging device 12 that captures a radiation image (image) by detecting radiation irradiated from the radiation irradiating device 11 and transmitted through the subject 1, and a control device 13 that controls the radiation irradiating device 11 and the imaging device 12. The radiation irradiating device 11 irradiates the subject 1 with radiation at a timing based on the control of the control device 13. The radiation irradiated to the subject 1 is irradiated to the imaging device 12 while carrying image information by transmitting through the subject 1. The imaging device 12 detects the irradiated radiation at a timing based on the control of the control device 13, and generates a radiation image based on the image information carried by the radiation. The radiation image generated by the imaging device 12 is acquired by the control device 13.

[0019] Next, the imaging device 12 will be described in detail. As shown in FIG. 2, the imaging device 12 includes a substrate 20 having a plurality of pixels 21, a scanning signal control circuit 22 connected to the substrate 20, a signal detection circuit (signal detection unit) 23 connected to the substrate 20, and a control unit 24 connected to the scanning signal control circuit 22 and the signal detection circuit 23. The substrate 20 has a main surface 20A that is divided into an imaging area IA in which a plurality of pixels 21 are arranged and a radiation image is captured, and a non-imaging area NIA outside the imaging area IA. The substrate 20 is made of a glass material or the like and has translucency. The pixels 21 are arranged in a matrix shape along the X-axis direction and the Y-axis direction in the imaging area IA. The scanning signal control circuit 22, the signal detection circuit 23, and the control unit 24 are provided on a circuit board that is present outside the substrate 20. A flexible substrate is connected to the non-imaging area NIA of the substrate 20 and the circuit board. Therefore, the scanning signal control circuit 22 and the signal detection circuit 23 provided on the circuit board are connected to the substrate 20 via the flexible substrate. Terminals connected to terminals on the flexible substrate side are provided in a portion of the non-imaging area NIA of the substrate 20 to which the flexible substrate is connected. The scanning signal control circuit 22 can output scanning signals for driving the pixels 21. The signal detection circuit 23 can detect signals output from the pixels 21. The substrate 20 is also provided with a scintillator (see FIG. 4) 38 that converts the wavelength of radiation into visible light.

[0020] As shown in Fig. 3, the pixel 21 includes a photoelectric conversion element (imaging element) 25 and a TFT (switching element) 26 connected to the photoelectric conversion element 25. The photoelectric conversion element 25 is a so-called photodiode, and can generate an electric charge when it receives visible light whose wavelength has been converted by a scintillator 38. The TFT 26 can extract the electric charge generated in the photoelectric conversion element 25 as a signal by being driven at a predetermined timing (for example, a timing synchronized with the timing of irradiation of radiation from the radiation irradiation device 11). The TFT 26 is located in the vicinity of the upper left corner of the pixel 21 in Fig. 3. The photoelectric conversion element 25 constitutes most of the pixel 21 except for the upper left corner of Fig. 3.

[0021] As shown in FIG. 3, the imaging area IA of the substrate 20 is provided with scanning wiring (fourth wiring) 27 and signal wiring (third wiring) 28, both of which are connected to the TFT 26. The scanning wiring 27 and the signal wiring 28 are orthogonal (intersecting) to each other, and a plurality of them are arranged to surround the TFT 26 and the photoelectric conversion element 25. The scanning wiring 27 extends along the X-axis direction, and a plurality of them are arranged side by side at intervals in the Y-axis direction. The number of the scanning wiring 27 is equal to the number of the pixels 21 in the Y-axis direction. The signal wiring 28 extends along the Y-axis direction, and a plurality of them are arranged side by side at intervals in the X-axis direction. The number of the signal wiring 28 is equal to the number of the pixels 21 in the X-axis direction. The scanning wiring 27 is connected to the scanning signal control circuit 22 shown in FIG. 2, and can transmit a scanning signal output from the scanning signal control circuit 22 to the TFT 26. The signal wiring 28 is connected to the signal detection circuit 23 shown in Fig. 2, and can transmit a signal output from the TFT 26 (charge generated in the photoelectric conversion element 25) to the signal detection circuit 23. A specific operation will be described. The scanning signal control circuit 22 is controlled by the control device 13 to output a scanning signal to the scanning wiring 27 at a timing synchronized with the irradiation of radiation by the radiation irradiation device 11, and drives the TFT 26 connected to the scanning wiring 27. Then, visible light generated by wavelength conversion of radiation by the scintillator 38 is received by the photoelectric conversion element 25, and a charge is generated. The charge is transmitted as a signal by the TFT 26 to the signal wiring 28 and detected by the signal detection circuit 23. In this way, the imaging device 12 can generate a radiation image based on the signal detected by the signal detection circuit 23.

[0022] 3, power supply wiring 29 connected to the photoelectric conversion elements 25 is provided in the imaging area IA of the substrate 20. The power supply wiring 29 extends along the Y-axis direction in parallel with the signal wiring 28, and crosses the photoelectric conversion elements 25. A plurality of power supply wirings 29 are arranged side by side at intervals in the X-axis direction, and are arranged alternately with the signal wirings 28 arranged at intervals in the X-axis direction. A reference potential (bias potential) is supplied to the power supply wiring 29 from an external power source via a flexible substrate or the like. The reference potential can be supplied to the photoelectric conversion elements 25 by the power supply wiring 29.

[0023] Here, various films laminated on the main surface 20A of the substrate 20 will be described mainly with reference to Fig. 4. On the substrate 20, as shown in Fig. 4, a first metal film, a gate insulating film 30, a first semiconductor film, a second metal film (second conductive film), a first interlayer insulating film (insulating film) 31, a third metal film (first conductive film), a second interlayer insulating film 32, a fourth metal film, a second semiconductor film, a first transparent electrode film, a third interlayer insulating film 33, a first planarizing film 34, a fourth interlayer insulating film 35, a fifth metal film (third conductive film), a fifth interlayer insulating film 36, a second planarizing film 37, and a scintillator 38 are laminated in this order from the lower layer side (the side closer to the substrate 20).

[0024] The first metal film, the second metal film, the third metal film, the fourth metal film, and the fifth metal film are single-layer films made of one type of metal material, or laminated films or alloys made of different types of metal materials. Specifically, the first metal film is a laminated film such as W / TaN. The second metal film is a laminated film such as Ti / Al / Ti. The third metal film is a laminated film such as Ti / Al / Ti. In the third metal film, the thickness of the Ti on the upper layer side is, for example, 100 nm, the thickness of the Al is, for example, 300 nm, and the thickness of the Ti on the lower layer side is, for example, 50 nm. The fourth metal film is a single-layer film made of Ti. The thickness of the fourth metal film is, for example, 30 nm, which is the smallest compared to the other metal films. This can reduce the amount of scattering when the fourth metal film is etched and patterned. The fifth metal film is a laminated film such as ITO / Ti / Al / Ti. Comparing the thicknesses of the second metal film, the third metal film, the fourth metal film, and the fifth metal film, the thickness increases in the order of the fourth metal film, the third metal film, the second metal film, and the fifth metal film. Therefore, comparing the sheet resistances of the second metal film, the third metal film, the fourth metal film, and the fifth metal film, the sheet resistance decreases in the order of the fourth metal film, the third metal film, the second metal film, and the fifth metal film.

[0025] The first semiconductor film and the second semiconductor film are both made of semiconductor materials. Specifically, the first semiconductor film is made of, for example, an oxide semiconductor. The second semiconductor film is formed by stacking an n-type semiconductor layer, an i-type semiconductor layer, and a p-type semiconductor layer in this order from the bottom layer side. The n-type semiconductor layer, the i-type semiconductor layer, and the p-type semiconductor layer constituting the second semiconductor film are all made of, for example, non-crystalline silicon (amorphous silicon). The n-type semiconductor layer and the p-type semiconductor layer both contain impurities, whereas the i-type semiconductor layer is an intrinsic semiconductor that does not contain impurities. The first transparent electrode film is made of a transparent electrode material. Specifically, the first transparent electrode film is made of, for example, ITO (Indium Tin Oxide) or the like. The scintillator 38 is made of a phosphor that converts the wavelength of radiation into visible light. Specifically, the scintillator 38 is made of, for example, CsI (cesium iodide) or the like.

[0026] The gate insulating film 30, the first interlayer insulating film 31, the second interlayer insulating film 32, the third interlayer insulating film 33, and the fourth interlayer insulating film 35 are all made of inorganic materials. The gate insulating film 30 is, for example, SiO2 (silicon oxide) / SiN x The first interlayer insulating film 31 is a single layer film such as SiO2. The second interlayer insulating film 32 is a SiN x Alternatively, the third interlayer insulating film 33 is a single layer film of SiO2 or the like. x The fourth interlayer insulating film 35 is a single layer film of, for example, SiNx. The fifth interlayer insulating film 36, the first planarizing film 34, and the second planarizing film 37 are all made of an organic material having photosensitivity, and have a thickness larger than that of the other insulating films 30, 31, 32, 33, and 35 made of an inorganic material. The fifth interlayer insulating film 36, the first planarizing film 34, and the second planarizing film 37 are all made of, for example, an acrylic resin having photosensitivity. Each of the insulating films 30 to 37 is disposed solidly over almost the entire area of ​​the substrate 20, that is, over the imaging area IA and the non-imaging area NIA.

[0027] The relationship between the films formed on the main surface 20A of the substrate 20 and the structures provided in the imaging region IA of the substrate 20 will be described in detail. First, as shown in Figs. 3 and 4, the TFT 26 has a gate electrode 26A, a source electrode 26B, a drain electrode 26C, and a semiconductor portion 26D. The gate electrode 26A is made of a first metal film. The gate electrode 26A extends along the Y-axis direction, with one end (lower side in Fig. 3) overlapping the semiconductor portion 26D and the other end (upper side in Fig. 3) overlapping the scanning wiring 27. The semiconductor portion 26D is made of a first semiconductor film. The semiconductor portion 26D has a horizontally elongated shape extending along the X-axis direction, and a large part of the central side is arranged to overlap a part of the gate electrode 26A on the upper layer side via the gate insulating film 30. The source electrode 26B and the drain electrode 26C are both made of a second metal film. The source electrode 26B extends along the X-axis direction, and one end (the right side in FIGS. 3 and 4) is connected to a part of the semiconductor portion 26D (the left end in FIGS. 3 and 4). The drain electrode 26C extends along the X-axis direction, and one end (the left side in FIGS. 3 and 4) is connected to a part of the semiconductor portion 26D (the right end in FIGS. 3 and 4) at a position spaced apart from the source electrode 26B in the X-axis direction.

[0028] As shown in Figs. 3 and 5, the scanning line 27 is made of a part of the second metal film that is separate from the source electrode 26B and the drain electrode 26C. This allows the wiring resistance to be reduced compared to when the scanning line is made of any of the first, third, and fourth metal films. The scanning line 27 extends along the X-axis direction and is arranged to overlap a part of the gate electrode 26A of the TFT 26 on the upper layer side via the gate insulating film 30. A first contact hole CH1 is opened and provided in the gate insulating film 30 at a position where the gate electrode 26A and the scanning line 27 overlap. The gate electrode 26A and the scanning line 27 are connected through the first contact hole CH1. As a result, a scanning signal transmitted by the scanning line 27 is supplied to the gate electrode 26A.

[0029] As shown in Figs. 3 and 6, the signal wiring 28 is made of a fifth metal film. This allows the wiring resistance to be reduced compared to when the signal wiring is made of any one of the first, second, third, and fourth metal films. The signal wiring 28 extends along the Y-axis direction and is arranged to overlap a part of the source electrode 26B of the TFT 26 on the upper layer side via the gate insulating film 30, the first interlayer insulating film 31, the second interlayer insulating film 32, the third interlayer insulating film 33, the first planarizing film 34, and the fourth interlayer insulating film 35. An intermediate electrode 39 made of a third metal film is provided at a position where the intermediate electrode 39 overlaps both the signal wiring 28 and the source electrode 26B. The intermediate electrode 39 has a vertically elongated rectangular shape extending along the Y-axis direction, and one end of the intermediate electrode 39 overlaps both the source electrode 26B and the signal wiring 28, and the other end of the intermediate electrode 39 overlaps the signal wiring 28. A first interlayer insulating film 31 is interposed between the intermediate electrode 39 and the source electrode 26B. A second contact hole CH2 is opened and provided in the first interlayer insulating film 31 at a position where the intermediate electrode 39 and the source electrode 26B overlap. The intermediate electrode 39 and the source electrode 26B are connected through the second contact hole CH2. A second interlayer insulating film 32, a third interlayer insulating film 33, a first planarization film 34, and a fourth interlayer insulating film 35 are interposed between the intermediate electrode 39 and the signal wiring 28. A third contact hole CH3 is opened and provided in the second interlayer insulating film 32, the third interlayer insulating film 33, the first planarization film 34, and the fourth interlayer insulating film 35 at a position where the intermediate electrode 39 and the signal wiring 28 overlap. The intermediate electrode 39 and the signal wiring 28 are connected through the third contact hole CH3. In this way, the signal wiring 28 is connected to the source electrode 26B through the intermediate electrode 39. This allows the charge present in the source electrode 26B to be transmitted as a signal to the signal line 28. Furthermore, the signal line 28 crosses the scanning line 27 via the gate insulating film 30, the first interlayer insulating film 31, the second interlayer insulating film 32, the third interlayer insulating film 33, the first planarizing film 34, and the fourth interlayer insulating film 35. In this way, the presence of the multiple insulating films 30, 31, 32, 33, 34, and 35 between the scanning line 27 and the signal line 28 allows the parasitic capacitance to be reduced.

[0030] As shown in Figs. 3 and 7, the power supply wiring 29 is a part of the fifth metal film that is separate from the signal wiring 28. The power supply wiring 29 extends along the Y-axis direction and has a first widened portion 29A and a second widened portion 29B that are partially widened. A main portion (a portion not widened) of the power supply wiring 29 is arranged to overlap a part of the drain electrode 26C of the TFT 26 and a part of the photoelectric conversion element 25 described below. The first widened portion 29A of the power supply wiring 29 is arranged to overlap a main portion of the TFT 26 (including at least the entire area of ​​the gate electrode 26A and the semiconductor portion 26D). The second widened portion 29B of the power supply wiring 29 is arranged to overlap a central portion of the photoelectric conversion element 25. The connection structure between the power supply wiring 29 and the photoelectric conversion element 25 will be described later. In addition, like the signal wiring 28, the power supply wiring 29 intersects with the scanning wiring 27 via a gate insulating film 30, a first interlayer insulating film 31, a second interlayer insulating film 32, a third interlayer insulating film 33, a first planarization film 34, and a fourth interlayer insulating film 35.

[0031] As shown in FIG. 3 and FIG. 4, the photoelectric conversion element 25 has a lower electrode 25A, a photoelectric conversion layer 25B laminated on the upper layer side of the lower electrode 25A, and an upper electrode 25C laminated so as to sandwich the photoelectric conversion layer 25B between the lower electrode 25A and the upper electrode 25C. The lower electrode 25A has a laminated structure of a first lower electrode (electrode) 25A1 made of a third metal film and a second lower electrode 25A2 made of a fourth metal film. A second interlayer insulating film 32 is interposed between the first lower electrode 25A1 and the second lower electrode 25A2. A fourth contact hole CH4 is opened and provided in the second interlayer insulating film 32 at a position where the second interlayer insulating film 32 overlaps both the first lower electrode 25A1 and the second lower electrode 25A2. The first lower electrode 25A1 and the second lower electrode 25A2 are connected through the fourth contact hole CH4.

[0032] As shown in Figs. 3 and 4, the second lower electrode 25A2, the photoelectric conversion layer 25B, and the upper electrode 25C of the lower electrode 25A are arranged so as not to overlap the drain electrode 26C. In contrast, the first lower electrode 25A1 of the lower electrode 25A is extended more than the second lower electrode 25A2, the photoelectric conversion layer 25B, and the upper electrode 25C, and the extended portion is arranged so as to overlap the drain electrode 26C. A first interlayer insulating film 31 is interposed between the first lower electrode 25A1 and the drain electrode 26C. A fifth contact hole CH5 is opened and provided at a position of the first interlayer insulating film 31 that overlaps both the first lower electrode 25A1 and the drain electrode 26C. The first lower electrode 25A1 and the drain electrode 26C are connected through the fifth contact hole CH5.

[0033] As shown in FIG. 4, the photoelectric conversion layer 25B has a laminated structure of an n-type semiconductor portion 25BN made of an n-type semiconductor layer of the second semiconductor film, an i-type semiconductor portion 25BI made of an i-type semiconductor layer of the second semiconductor film, and a p-type semiconductor portion 25BP made of a p-type semiconductor layer of the second semiconductor film, in that order from the bottom. Therefore, the photoelectric conversion element 25 according to this embodiment is a so-called PIN type photodiode. Among them, the n-type semiconductor portion 25BN is in contact with the second lower electrode 25A2 of the lower electrode 25A. When the photoelectric conversion layer 25B receives visible light, it generates charges according to the amount of light received. The charges generated in the photoelectric conversion layer 25B are collected by the lower electrode 25A.

[0034] As shown in FIG. 4 and FIG. 7, the upper electrode 25C has a single-layer structure made of a first transparent electrode film. The upper electrode 25C contacts the p-type semiconductor portion 25BP of the photoelectric conversion layer 25B. The upper electrode 25C is connected to the second widened portion 29B of the power wiring 29. Therefore, a reference potential is supplied to the upper electrode 25C by the power wiring 29. A third interlayer insulating film 33, a first planarizing film 34, and a fourth interlayer insulating film 35 are interposed between the upper electrode 25C and the second widened portion 29B of the power wiring 29. A sixth contact hole CH6 is opened and provided at a position where the third interlayer insulating film 33, the first planarizing film 34, and the fourth interlayer insulating film 35 overlap the upper electrode 25C and the second widened portion 29B. The upper electrode 25C and the second widened portion 29B are connected through the sixth contact hole CH6. The scintillator 38 is provided in a solid manner on the second planarization film 37 over at least the entire imaging area IA, and is disposed so as to cover all the pixels 21.

[0035] Next, a configuration provided in the non-imaging area NIA of the substrate 20 will be described. In the non-imaging area NIA of the substrate 20, as shown in FIG. 8, a lead-out wiring (first wiring) 40 connected to the signal wiring 28 is provided. The lead-out wiring 40 is for transmitting a signal transmitted by the signal wiring 28 to a flexible substrate connected to the signal detection circuit 23. The signal wiring 28 connected to this lead-out wiring 40 has an end portion extending to the non-imaging area NIA and arranged so as to overlap with an end portion of the lead-out wiring 40. The lead-out wiring 40 is routed from the vicinity of the boundary with the imaging area IA in the non-imaging area NIA to a portion of the non-imaging area NIA to which the flexible substrate is connected. In detail, one end portion of the lead-out wiring 40 (upper side of FIG. 8, on the imaging area IA side) overlaps with an end portion of the signal wiring 28, and the other end portion (lower side of FIG. 8, on the opposite side to the imaging area IA) is connected to a terminal arranged in a portion of the non-imaging area NIA to which the flexible substrate is connected. The lead-out wiring 40 extends from one end along the Y-axis direction away from the imaging area IA, is then bent, and extends in a diagonal direction relative to the X-axis and Y-axis directions to the other end connected to the above-mentioned terminal. The lead-out wiring 40 is made of a portion of the second metal film that is separate from the source electrode 26B, the drain electrode 26C, and the scanning wiring 27. This makes it possible to reduce the wiring resistance compared to a case in which the lead-out wiring is made of any one of the first metal film, the third metal film, and the fourth metal film.

[0036] Here, in the imaging region IA of the substrate 20, the source electrode 26B, the drain electrode 26C, and the scanning wiring 27 made of the second metal film, the first lower electrode 25A1 made of the third metal film, the second lower electrode 25A2 made of the fourth metal film, and the signal wiring 28 and the power wiring 29 made of the fifth metal film are provided. Among them, the first lower electrode 25A1 constituting the photoelectric conversion element 25 has the highest area ratio in the imaging region IA, and is thicker (has a lower sheet resistance) than the second lower electrode 25A2 having the second lowest area ratio. For this reason, when the third metal film is processed (e.g., dry etching, etc.) by a known photolithography method in manufacturing the substrate 20, if there is a difference in density of the pattern related to the structure made of the third metal film between the imaging region IA and the non-imaging region NIA, there is a concern that the first lower electrode 25A1 will be charged up. If the first lower electrode 25A1 is charged up, electrostatic breakdown (ESD: Electro-Static Discharge) is likely to occur. In particular, since the first lower electrode 25A1 has the function of collecting electric charges generated in the photoelectric conversion layer 25B by receiving visible light, the area of ​​the first lower electrode 25A1 may be designed to be larger in order to improve the signal detection sensitivity, and in such a case, electric charges tend to build up more easily in the first lower electrode 25A1.

[0037] Therefore, in the non-imaging area NIA of the substrate 20 according to the present embodiment, as shown in FIG. 8 and FIG. 9, dummy wiring (second wiring) 41 made of a part of the third metal film other than the first lower electrode 25A1 is provided. Note that in FIG. 9, the configuration made of the third metal film is illustrated in a hatched shape. As shown in FIG. 10, the dummy wiring 41 is arranged so as to overlap at least a part of the drawing wiring 40. A first interlayer insulating film 31 is interposed between the dummy wiring 41 and the drawing wiring 40. The dummy wiring 41 is routed in parallel with the drawing wiring 40, and is arranged so as to overlap over the entire width and almost the entire length of the drawing wiring 40. Therefore, the pattern of the dummy wiring 41 in a plan view is almost the same as the pattern of the drawing wiring 40 in a plan view (FIG. 8 and FIG. 9). The number of the dummy wirings 41 is set to be equal to the number of the drawing wirings 40. Therefore, the multiple dummy wirings 41 are arranged so as to overlap individually with all of the multiple lead-out wirings 40 arranged in the non-imaging area NIA. Also, as described above, one end of the lead-out wirings 40 overlaps with an end of the signal wiring 28, so that the dummy wirings 41 overlapping with the lead-out wirings 40 have one end (the upper side in FIGS. 8 and 9, the imaging area IA side) overlap with the end of the signal wiring 28.

[0038] In this way, since the non-imaging area NIA is provided with the dummy wiring 41 made of a part of the third metal film other than the first lower electrode 25A1, it is possible to mitigate the difference in density of the pattern related to the structure made of the third metal film (the first lower electrode 25A1 and the dummy wiring 41) between the imaging area IA and the non-imaging area NIA. This makes it difficult for the first lower electrode 25A1 to be charged up during the manufacturing process, so that the occurrence of electrostatic breakdown can be suppressed. Furthermore, since the dummy wiring 41 made of a part of the third metal film other than the first lower electrode 25A1 is at least partially arranged to overlap the lead-out wiring 40 made of the second metal film via the first interlayer insulating film 31, it is possible to ensure a sufficient arrangement space for the dummy wiring 41 even if the lead-out wiring 40 is arranged at high density. This increases the degree of freedom in the arrangement of the dummy wiring 41, so that it is possible to more suitably mitigate the difference in density of the pattern related to the structure made of the third metal film between the imaging area IA and the non-imaging area NIA.

[0039] Here, the area ratio obtained by dividing the sum of the areas of the plurality of dummy wirings 41 by the area of ​​the non-imaging area NIA is defined as the "first area ratio", and the area ratio obtained by dividing the sum of the areas of the plurality of first lower electrodes 25A1 by the area of ​​the imaging area IA is defined as the "second area ratio". As shown in FIG. 9, the dummy wirings 41 are provided so that the above-mentioned first area ratio is equal to or higher than the above-mentioned second area ratio. Specifically, the dummy wirings 41 are configured so that the line width of the dummy wirings 41 is made larger than the line width of the lead wiring 40 (see FIG. 8 and FIG. 10) so that the first area ratio is equal to or higher than the second area ratio. In this way, by making the first area ratio equal to or higher than the second area ratio, the difference that may occur in the density of the pattern related to the structure made of the third metal film between the imaging area IA and the non-imaging area NIA can be more suitably alleviated. This makes it possible to more suitably suppress electrostatic breakdown caused by charge-up.

[0040] In this embodiment, the signal wiring 28 is connected to the lead-out wiring 40 via the dummy wiring 41 as shown in FIG. 11. More specifically, the second interlayer insulating film 32, the third interlayer insulating film 33, the first planarization film 34, and the fourth interlayer insulating film 35 are interposed between the signal wiring 28 and the dummy wiring 41. The seventh contact hole CH7 is opened and provided in the second interlayer insulating film 32, the third interlayer insulating film 33, the first planarization film 34, and the fourth interlayer insulating film 35 at a position where the end of the signal wiring 28 and one end of the dummy wiring 41 overlap each other. The end of the signal wiring 28 and one end of the dummy wiring 41 are connected through the seventh contact hole CH7. The first interlayer insulating film 31 is interposed between the dummy wiring 41 and the lead-out wiring 40. The eighth contact hole CH8 is opened and provided in the first interlayer insulating film 31 at a position where the first interlayer insulating film 31 overlaps each of the dummy wiring 41 and one end of the lead-out wiring 40. The dummy wiring 41 and the lead-out wiring 40 have one end connected to each other through the eighth contact hole CH8. The eighth contact hole CH8 does not overlap with the seventh contact hole CH7 and is disposed at a distance from the seventh contact hole CH7 on the opposite side to the imaging area IA side. With this configuration, the signal transmitted by the signal wiring 28 is transmitted to the lead-out wiring 40 via the dummy wiring 41.

[0041] As described above, the dummy wiring 41 is indirectly connected to the signal detection circuit 23 (see FIG. 2) via the lead-out wiring 40, but is not directly connected. In other words, the dummy wiring 41 is a "dummy wiring" that does not have a specific electrical function. Therefore, whether the lead-out wiring 40 is connected to the dummy wiring 41 or not, the signal detection circuit 23 can detect the signal transmitted by the signal wiring 28 and the lead-out wiring 40 without any problem.

[0042] The dummy wiring 41 and the lead-out wiring 40, which are parallel to each other, are connected to each other at multiple locations, as shown in FIG. 12. In detail, a plurality of ninth contact holes CH9 are opened and provided in the first interlayer insulating film 31 at positions overlapping with most of the dummy wiring 41 and the lead-out wiring 40 except for one end. The dummy wiring 41 and the lead-out wiring 40 are connected to each other at most of the dummy wiring 41 and the lead-out wiring 40 except for one end through the plurality of ninth contact holes CH9. The plurality of ninth contact holes CH9 are arranged at positions spaced apart in the extending direction of the dummy wiring 41 and the lead-out wiring 40. In this way, the dummy wiring 41 and the lead-out wiring 40 are connected to each other by the eighth contact hole CH8 and the plurality of ninth contact holes CH9, so that if the lead-out wiring 40 is partially disconnected, a signal can be transmitted by the dummy wiring 41 instead of the lead-out wiring 40. In other words, the dummy wiring 41 can be used as a spare wiring for the lead-out wiring 40, and the lead-out wiring 40 can be made redundant.

[0043] As shown in FIG. 10, the second metal film constituting the lead-out wiring 40 is a laminated film (Ti / Al / Ti, etc.) having the same configuration as the third metal film constituting the dummy wiring 41, but the thickness of the second metal film is larger than that of the third metal film. That is, the sheet resistance of the second metal film is lower than that of the third metal film. In this way, if the lead-out wiring 40 and the dummy wiring 41 have the same length and width, for example, the wiring resistance of the lead-out wiring 40 made of the second metal film is lower than the wiring resistance of the dummy wiring 41 made of the third metal film. Therefore, the signal transmitted by the signal wiring 28 can be transmitted to the signal detection circuit 23 by the lead-out wiring 40 with low loss. This is preferable for improving the detection sensitivity of the signal. In this embodiment, since the signal transmitted by the signal wiring 28 is very weak, it is preferable that the detection sensitivity of the signal can be improved to obtain a radiographic image with high resolution. Furthermore, since a part of the second metal film constituting the lead-out wiring 40 constitutes the scanning wiring 27, the wiring resistance of the lead-out wiring 40 can be suppressed to a level equivalent to the wiring resistance of the scanning wiring 27. As a result, the signal transmitted by the signal wiring 28 can be transmitted to the signal detection circuit 23 by the lead-out wiring 40 with low loss. This is preferable for improving the detection sensitivity of the signal. Moreover, even if the width of the scanning wiring 27 made of a part of the second metal film is narrowed, the wiring resistance can be sufficiently reduced, so that the area of ​​the photoelectric conversion element 25 can be increased. This is preferable for improving the sensitivity of the photoelectric conversion element 25.

[0044] As shown in FIG. 11, the fifth metal film constituting the signal wiring 28 includes a laminated film (Ti / Al / Ti, etc.) having the same configuration as the second metal film constituting the lead-out wiring 40, but the thickness of the fifth metal film is larger than that of the second metal film. That is, the sheet resistance of the fifth metal film is lower than that of the second metal film. In this way, even if the width of the signal wiring 28 made of the fifth metal film is narrowed, the wiring resistance can be sufficiently reduced. Therefore, the signal from the photoelectric conversion element 25 can be transmitted to the lead-out wiring 40 by the signal wiring 28 with low loss. This is more suitable for improving the detection sensitivity of the signal. Moreover, if the width of the signal wiring 28 can be narrowed, the area of ​​the photoelectric conversion element 25 can be increased, which is suitable for improving the sensitivity of the photoelectric conversion element 25.

[0045] As described above, the imaging device 12 of this embodiment includes a substrate 20 having a main surface 20A including an imaging area IA in which an image is captured and a non-imaging area NIA outside the imaging area IA, a photoelectric conversion element (imaging element) 25 arranged in the imaging area IA and having a first lower electrode (electrode) 25A1 made of a third metal film (first conductive film), a lead-out wiring (first wiring) 40 arranged at least in the non-imaging area NIA and made of a second metal film (second conductive film), a first interlayer insulating film (insulating film) 31 arranged across the imaging area IA and the non-imaging area NIA and interposed between the third metal film and the second metal film, and a dummy wiring (second wiring) 41 arranged at least in the non-imaging area NIA, where the dummy wiring 41 is made of a part of the third metal film other than the first lower electrode 25A1 and is arranged so as to overlap at least a portion of the lead-out wiring 40.

[0046] Since the photoelectric conversion element 25 arranged in the imaging area IA has the first lower electrode 25A1 made of the third metal film, there is a concern that a difference in density of the pattern related to the structure made of the third metal film will occur between the imaging area IA and the non-imaging area NIA. In this regard, since the non-imaging area NIA is provided with the dummy wiring 41 made of a part of the third metal film other than the first lower electrode 25A1, it is possible to alleviate the difference that may occur in the density of the pattern related to the structure made of the third metal film between the imaging area IA and the non-imaging area NIA. This makes it possible to suppress electrostatic breakdown caused by charge-up. In addition, since the dummy wiring 41 made of a part of the third metal film other than the first lower electrode 25A1 is at least partially arranged to overlap the lead-out wiring 40 made of the second metal film via the first interlayer insulating film 31, it is possible to ensure a sufficient arrangement space for the dummy wiring 41 even if the lead-out wiring 40 is arranged at high density. This increases the degree of freedom in arranging the dummy wirings 41, and therefore makes it possible to more suitably reduce the difference that may occur in the density of the pattern related to the structure made of the third metal film between the imaging area IA and the non-imaging area NIA.

[0047] The display device also includes a TFT (switching element) 26 arranged in the imaging area IA and connected to the photoelectric conversion element 25, a signal wiring (third wiring) 28 arranged at least in the imaging area IA, connected to the TFT 26 and the lead-out wiring 40, and made of a fifth metal film (third conductive film), and a signal detection circuit (signal detection unit) 23 connected to the lead-out wiring 40 and detecting a signal transmitted by the lead-out wiring 40, and the dummy wiring 41 is not directly connected to the signal detection circuit 23. When the TFT 26 is driven, a charge generated in the photoelectric conversion element 25 is transmitted as a signal to the signal wiring 28, then transmitted by the lead-out wiring 40, and detected by the signal detection circuit 23. The dummy wiring 41 is not directly connected to the signal detection circuit 23, and is a "dummy wiring" that does not have a specific electrical function. Therefore, whether the lead-out wiring 40 is connected to the dummy wiring 41 or not, the signal transmitted by the signal wiring 28 and the lead-out wiring 40 can be detected by the signal detection circuit 23 without any problem.

[0048] Furthermore, an eighth contact hole CH8 and a ninth contact hole CH9 (contact holes) that connect the lead-out wiring 40 and the dummy wiring 41 are provided in the first interlayer insulating film 31 at a position that overlaps both the lead-out wiring 40 and the dummy wiring 41. If the lead-out wiring 40 is partially disconnected, a signal can be transmitted by the dummy wiring 41 instead of the lead-out wiring 40. In other words, the dummy wiring 41 can be used as a spare wiring for the lead-out wiring 40, and the lead-out wiring 40 can be made redundant.

[0049] Moreover, the second metal film has a lower sheet resistance than the third metal film. In this way, if the length and width of the lead-out wiring 40 and the dummy wiring 41 are approximately the same, the wiring resistance of the lead-out wiring 40 made of the second metal film is lower than the wiring resistance of the dummy wiring 41 made of the third metal film. Therefore, the signal transmitted by the signal wiring 28 can be transmitted to the signal detection circuit 23 by the lead-out wiring 40 with low loss. This is suitable for improving the detection sensitivity of the signal.

[0050] Moreover, the fifth metal film has a lower sheet resistance than the second metal film. In this way, even if the width of the signal wiring 28 made of the fifth metal film is narrowed, the wiring resistance can be sufficiently reduced. Therefore, the signal from the photoelectric conversion element 25 can be transmitted to the lead-out wiring 40 by the signal wiring 28 with low loss. This is more suitable for improving the detection sensitivity of the signal. Moreover, if the width of the signal wiring 28 can be narrowed, the area of ​​the photoelectric conversion element 25 can be increased, which is suitable for improving the sensitivity of the photoelectric conversion element 25.

[0051] Also, the pixel includes a scanning line (fourth line) 27 that is disposed at least in the imaging area IA, is connected to the TFT 26, and supplies a scanning signal to the TFT 26. The scanning line 27 is made of a part of the second metal film that is different from the lead-out line 40. The TFT 26 is driven based on the scanning signal supplied by the scanning line 27. In order to appropriately control the operation of the TFT 26, the wiring resistance of the scanning line 27 is made sufficiently low. It can be said that the lead-out line 40 is made of a part of the same second metal film as the scanning line 27 connected to the TFT 26. Therefore, the wiring resistance of the lead-out line 40 is also sufficiently low, so that the signal transmitted by the signal line 28 can be transmitted to the signal detection circuit 23 by the lead-out line 40 with low loss. This is suitable for improving the detection sensitivity of the signal. Moreover, even if the width of the scanning line 27 made of a part of the second metal film is narrowed, the wiring resistance can be made sufficiently low, so that the area of ​​the photoelectric conversion element 25 can be increased. This is suitable for improving the sensitivity of the photoelectric conversion element 25.

[0052] The dummy wiring 41 is provided so that a first area ratio obtained by dividing the area of ​​the dummy wiring 41 by the area of ​​the non-imaging area NIA is equal to or greater than a second area ratio obtained by dividing the area of ​​the first lower electrode 25A1 by the area of ​​the imaging area IA. By making the first area ratio equal to or greater than the second area ratio, it is possible to more suitably reduce the difference in density of the pattern related to the structure made of the third metal film between the imaging area IA and the non-imaging area NIA. This makes it possible to more suitably suppress electrostatic breakdown caused by charge-up.

[0053] The photoelectric conversion element 25 has a lower electrode 25A, a photoelectric conversion layer 25B laminated on the upper layer side of the lower electrode 25A, and an upper electrode 25C laminated so as to sandwich the photoelectric conversion layer 25B between the lower electrode 25A, and the lower electrode 25A includes a first lower electrode 25A1. In this way, the imaging element is a so-called photoelectric conversion element 25. When light is irradiated onto the photoelectric conversion layer 25B, charges are generated in the photoelectric conversion layer 25B, and the generated charges are collected by the lower electrode 25A. Here, in order to improve the sensitivity of the photoelectric conversion element, it is preferable to make the area of ​​the lower electrode 25A as large as possible. However, if the area of ​​the lower electrode 25A is increased, there is a concern that a large difference will occur in the density of the pattern related to the structure made of the third metal film between the imaging area IA and the non-imaging area NIA. In this respect, since the non-imaging area NIA is provided with the dummy wiring 41 made of a part of the third metal film other than the lower electrode 25A, even if the area of ​​the lower electrode 25A including the first lower electrode 25A1 is increased, it is possible to reduce the difference in density of the pattern related to the structure made of the third metal film between the imaging area IA and the non-imaging area NIA. This makes it possible to suppress electrostatic breakdown caused by charge-up.

[0054] The second metal film contains a metal material. Compared to a case where the second metal film is made of a transparent electrode material, the sheet resistance of the second metal film can be lowered. This allows the amount of charge stored by the dummy wiring 41 in the non-imaging area NIA to be sufficiently increased.

[0055] <Other embodiments> The technology disclosed in this specification is not limited to the embodiments described above and illustrated in the drawings, and the following embodiments, for example, are also included in the technical scope.

[0056] (1) A portion of the lead-out wiring 40 may be disposed in the imaging region IA. Also, a portion of the dummy wiring 41 may be disposed in the imaging region IA.

[0057] (2) The line width of the lead-out wiring 40 and the dummy wiring 41 may be the same.

[0058] (3) The dummy wiring 41 may partially overlap the lead-out wiring 40 in the extending direction, and may partially not overlap the lead-out wiring 40.

[0059] (4) The number of connection points (the eighth contact hole CH8 and the ninth contact hole CH9) between the lead-out wiring 40 and the dummy wiring 41 can be changed as appropriate to be different from those shown in the figure. Also, the eighth contact hole CH8 can be omitted.

[0060] (5) The lead-out wiring 40 may be directly connected to the signal wiring 28 without the dummy wiring 41. In this case, a contact hole connecting the lead-out wiring 40 and the signal wiring 28 may be provided in the first interlayer insulating film 31, the second interlayer insulating film 32, the third interlayer insulating film 33, the first planarization film 34, and the fourth interlayer insulating film 35 interposed between the lead-out wiring 40 and the signal wiring 28 at a position overlapping both the lead-out wiring 40 and the signal wiring 28.

[0061] (6) In the above (5), the dummy wiring 41 may be disconnected from the drawing wiring 40. In this case, the formation range (line width and length) and position of the dummy wiring 41 can be set independently of the formation range and position of the drawing wiring 40. If the dummy wiring 41 is arranged to overlap the drawing wiring 40, when a break occurs in the drawing wiring 40, it is possible to short-circuit the dummy wiring 41 to the broken drawing wiring 40 by irradiating it with a laser beam, and the dummy wiring 41 can be used as a spare wiring.

[0062] (7) The fifth metal film and the second metal film may be made of different materials or have different film configurations. In this way, for example, the fifth metal film and the second metal film may have the same thickness, and the sheet resistance of the fifth metal film may be made lower than the sheet resistance of the second metal film.

[0063] (8) The fifth metal film may have approximately the same sheet resistance as the second metal film.

[0064] (9) The second metal film may have approximately the same sheet resistance as the third metal film.

[0065] (10) A planarizing film may be additionally provided between the first interlayer insulating film 31 and the third metal film.

[0066] (11) The specific materials, film thicknesses, film configurations, etc. used for each metal film, each insulating film 30 to 37, each semiconductor film, etc. can be changed as appropriate. For example, the third metal film may be a single layer film made of a metal material (e.g., Al, etc.).

[0067] (12) The planar shape of the imaging area IA may be a square, a vertically elongated rectangle, or the like, and may be modified as appropriate.

[0068] (13) The scanning signal control circuit 22 and the signal detection circuit 23 may be provided in the non-imaging area NIA of the substrate 20.

[0069] (14) It is also possible to use an irradiation device that irradiates visible light instead of the radiation irradiation device 11. In that case, the scintillator 38 can be omitted.

[0070] (15) The subject 1 may be an animal other than a human, or an object other than an animal (such as a suitcase).

[0071] (16) The imaging device 12 may include an imaging element other than the photoelectric conversion element 25.

[0072] (17) The imaging device 12 may be used in an imaging system other than the radiation image capturing system 10. [Explanation of symbols]

[0073] 12...imaging device, 20...substrate, 20A...main surface, 23...signal detection circuit (signal detection section), 25...photoelectric conversion element (imaging element), 25A...lower electrode, 25A1...first lower electrode (electrode), 25B...photoelectric conversion layer, 25C...upper electrode, 26...TFT (switching element), 27...scanning wiring (fourth wiring), 28...signal wiring (third wiring), 31...first interlayer insulating film (insulating film), 40...drawing wiring (first wiring), 41...dummy wiring (second wiring), CH8...eighth contact hole (contact hole), CH9...ninth contact hole (contact hole), IA...imaging area, NIA...non-imaging area

Claims

1. a substrate having a main surface including an imaging region where an image is captured and a non-imaging region outside the imaging region; an imaging element disposed in the imaging region and having an electrode made of a first conductive film; a first wiring arranged in at least the non-imaging region and made of a second conductive film; an insulating film disposed across the imaging region and the non-imaging region and interposed between the first conductive film and the second conductive film; a second wiring arranged at least in the non-imaging region; The second wiring is made of a part of the first conductive film that is separate from the electrode, and is arranged so as to overlap at least a portion of the first wiring.

2. A switching element disposed in the imaging region and connected to the imaging element; a third wiring that is arranged at least in the imaging region, that is connected to the switching element and the first wiring, and that is made of a third conductive film; a signal detection unit connected to the first wiring and detecting a signal transmitted through the first wiring, The imaging device according to claim 1 , wherein the second wiring is not directly connected to the signal detection section.

3. 3. The image pickup device according to claim 2, wherein the insulating film has a contact hole for connecting the first wiring and the second wiring at a position where the insulating film overlaps both the first wiring and the second wiring.

4. 4. The imaging device according to claim 2, wherein the second conductive film has a sheet resistance lower than that of the first conductive film.

5. 4. The imaging device according to claim 2, wherein the third conductive film has a sheet resistance lower than that of the second conductive film.

6. a fourth wiring that is arranged at least in the imaging region and connected to the switching element to supply a scanning signal to the switching element; 4. The imaging device according to claim 2, wherein the fourth wiring is formed from a portion of the second conductive film that is separate from the first wiring.

7. 4. The imaging device according to claim 1, wherein the second wiring is arranged so that a first area ratio obtained by dividing an area of ​​the second wiring by an area of ​​the non-imaging region is equal to or greater than a second area ratio obtained by dividing an area of ​​the electrode by an area of ​​the imaging region.

8. the imaging element includes a lower electrode, a photoelectric conversion layer stacked on an upper layer side of the lower electrode, and an upper electrode stacked so as to sandwich the photoelectric conversion layer between the lower electrode and the upper electrode, The imaging device according to claim 1 , wherein the lower electrode includes the electrode.

9. The imaging device according to claim 1 , wherein the second conductive film includes a metal material.

Images