Substrate processing apparatus

Abstract

To provide a new apparatus for determining an arrangement state of a substrate.SOLUTION: An apparatus comprises: a chamber; a stage containing a chuck member and a plurality of penetration holes; a light source; a plurality of optical guide parts that is the plurality of optical guide parts, in which the plurality of optical guide parts is provided into an inner part of the plurality of penetration holes so that a gap is formed between their upper end surface and a back surface of the substrate, and is constructed so as to receive a return light from the back surface of the substrate while radiating the light generated from a light source to the back surface of the substrate; a measurement part that is connected to the plurality of optical guide parts, and measures a spectrum of the return light injected into each of the plurality of optical guide parts; and a control part that calculates a length of the gap for each of the plurality of optical guide parts on the basis of the spectrum of the return light measured by the measurement part, and determines an arrangement state of the substrate on the basis of the length of the gap corresponded to each of the plurality of optical guide parts.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] SUMMARY OF THE DISCLOSURE Exemplary embodiments of the present disclosure relate to a substrate processing apparatus. [Background technology]

[0002] Patent documents 1 to 3 disclose substrate processing apparatuses that determine the positional state of a substrate on an electrostatic chuck. The apparatuses disclosed in Patent documents 1 and 2 determine the positional state of a substrate on an electrostatic chuck based on electrical detection results. The apparatus disclosed in Patent document 3 determines the positional state of a substrate on an electrostatic chuck based on the amount of light emitted by plasma reflected by the substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Japanese Patent Application Publication No. 7-211768 [Patent Document 2] JP 2020-21866 A [Patent Document 3] JP 2021-163949 A Summary of the Invention [Problem to be solved by the invention]

[0004] The present disclosure provides a new substrate processing apparatus that determines the placement state of a substrate. [Means for solving the problem]

[0005] One aspect of the present disclosure is a substrate processing apparatus. The apparatus includes a chamber, a stage, a light source, a plurality of light introduction parts, a measurement part, and a control part. The chamber provides a processing space therein. The stage is disposed in the processing space. The stage includes a chuck member. The chuck member has a support surface for supporting a substrate and is configured to fix the substrate to the support surface. The stage includes a plurality of through holes penetrating downward from the support surface. Each of the plurality of light introduction parts is provided inside the plurality of through holes so that a gap is formed between an upper end surface of the light introduction part and a rear surface of the substrate. Each of the plurality of light introduction parts is configured to emit light generated from the light source to the rear surface of the substrate and to receive return light from the rear surface of the substrate. The measurement part is connected to the plurality of light introduction parts and configured to measure a spectrum of the return light incident on each of the plurality of light introduction parts. The control part is configured to calculate a length of a gap for each of the plurality of light introduction parts based on the spectrum of the return light measured by the measurement part, and to determine a placement state of the substrate based on the length of the gap corresponding to each of the plurality of light introduction parts. Effect of the Invention

[0006] According to the present disclosure, the placement state of the board can be determined. [Brief description of the drawings]

[0007] [Figure 1] FIG. 1 is a diagram illustrating an example of a substrate processing apparatus according to an exemplary embodiment. [Diagram 2] FIG. 2 is a schematic diagram of an example light measurement system according to an example embodiment. [Diagram 3] FIG. 3 is a diagram illustrating an example of an optical path length of an air gap. [Figure 4] FIG. 4 is a graph showing an example of the measurement result of the light measurement system. [Diagram 5] FIG. 5A is a diagram showing an example of a substrate arrangement, and FIG. 5B is a graph showing an example of the relationship between measurement position and gap length obtained in the arrangement shown in FIG. 5A. [Figure 6]FIG. 6A is a diagram showing an example of a substrate arrangement, and FIG. 6B is a graph showing an example of the relationship between measurement position and gap length obtained in the arrangement shown in FIG. 6A. [Figure 7] FIG. 7A is a diagram showing an example of a substrate arrangement, and FIG. 7B is a graph showing an example of the relationship between measurement position and gap length obtained in the arrangement shown in FIG. 7A. [Figure 8] FIG. 8A is a diagram showing an example of a substrate arrangement, and FIG. 8B is a graph showing an example of the relationship between measurement position and gap length obtained in the arrangement shown in FIG. 8A. [Figure 9] FIG. 9A is a diagram showing an example of a substrate arrangement, and FIG. 9B is a graph showing an example of the relationship between measurement position and gap length obtained in the arrangement shown in FIG. 9A. [Figure 10] FIG. 10 is a graph showing an example of the relationship between the process temperature and the gap length. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0008] Various exemplary embodiments are described below. In a substrate processing process, the substrate temperature is controlled by conducting heat between the substrate and the stage. In order to control the substrate temperature properly, the substrate needs to be correctly positioned on the stage.

[0009] The position of the substrate on the stage can be determined by monitoring the capacitance between the substrate and the electrostatic chuck, or the voltage applied to the electrostatic chuck. The position of the substrate on the stage can also be determined by detecting the amount of light emitted by the plasma reflected by the substrate through a window on the side of the chamber and based on the relationship between the detected amount of light and the natural frequency of the substrate. Alternatively, the position of the substrate on the stage can be determined based on the amount of leakage of helium gas introduced between the substrate and the electrostatic chuck.

[0010] However, when determining the positional state of the substrate on the stage based on the electrical measurement results, it is necessary to prepare an electrostatic chuck specialized for the measurement. Also, when determining the positional state of the substrate on the stage based on the amount of light emitted by the plasma reflected by the substrate, it is not possible to determine the positional state of the substrate on the stage before the plasma is emitted. When determining the positional state of the substrate on the stage based on the amount of helium gas leakage, it is not possible to determine a state in which only the center part of the substrate is raised.

[0011] One aspect of the present disclosure is a substrate processing apparatus. The apparatus includes a chamber, a stage, a light source, a plurality of light introduction units, and a control unit. The chamber provides a processing space therein. The stage is disposed in the processing space. The stage includes a chuck member. The chuck member has a support surface for supporting a substrate and is configured to fix the substrate to the support surface. The stage includes a plurality of through holes penetrating downward from the support surface. Each of the plurality of light introduction units is provided inside the plurality of through holes such that a gap is formed between an upper end surface of the light introduction unit and a rear surface of the substrate. Each of the plurality of light introduction units is configured to emit light generated from the light source to the rear surface of the substrate and to receive return light from the rear surface of the substrate. The measurement unit is connected to the plurality of light introduction units and configured to measure a spectrum of the return light incident on each of the plurality of light introduction units. The control unit is configured to calculate a length of a gap for each of the plurality of light introduction units based on the spectrum of the return light measured by the measurement unit, and to determine a placement state of the substrate based on the length of the gap corresponding to each of the plurality of light introduction units.

[0012] In this substrate processing apparatus, a gap is formed between the upper end face of each light introduction part and the back surface of the substrate. The light emitted from each of the light introduction parts is reflected by the back surface of the substrate and received as return light. The length of the gap is calculated for each of the light introduction parts based on the return light. The arrangement state of the substrate is determined based on the length of the gap corresponding to each of the light introduction parts. In this manner, this substrate processing apparatus can determine the arrangement state of the substrate by measuring the length of the gap (the distance between the upper end face and the back surface of the substrate) of each light introduction part with light. Therefore, this substrate processing apparatus can determine the arrangement state of the substrate without being limited by the type of chuck member. In addition, this substrate processing apparatus can determine the arrangement state of the substrate without emitting plasma. Furthermore, this substrate processing apparatus can determine a state in which only the center part of the substrate is raised by measuring at least two points, for example, the edge of the substrate and the center of the substrate.

[0013] Various embodiments will be described in detail below with reference to the drawings. In the following description and in each drawing, the same or corresponding elements are given the same reference numerals, and redundant description will not be repeated. The dimensional ratios of the drawings do not necessarily match those in the description. The terms "upper", "lower", "left" and "right" are based on the illustrated state and are for convenience.

[0014] [Outline of substrate processing equipment] FIG. 1 is a diagram that illustrates a schematic diagram of a substrate processing apparatus according to an exemplary embodiment. The plasma processing apparatus 1 (an example of a substrate processing apparatus) illustrated in FIG. 1 is a capacitively coupled plasma etching apparatus. The plasma processing apparatus 1 includes a chamber body 12. The chamber body 12 has a substantially cylindrical shape and provides an internal space 12s (an example of a processing space). The chamber body 12 is formed of, for example, aluminum. An inner wall surface of the chamber body 12 is subjected to a treatment that imparts plasma resistance. For example, an anodizing treatment is performed on the inner wall surface of the chamber body 12. The chamber body 12 is electrically grounded.

[0015] A passage 12p is formed in the side wall of the chamber body 12. The workpiece passes through the passage 12p when it is loaded into the internal space 12s or when it is unloaded from the internal space 12s. The passage 12p can be opened and closed by a gate valve 12g.

[0016] A support 13 is provided on the bottom of the chamber body 12. The support 13 is made of an insulating material. The support 13 has a substantially cylindrical shape. The support 13 extends vertically from the bottom of the chamber body 12 in the internal space 12s. The support 13 supports a stage 14. The stage 14 is provided in the internal space 12s.

[0017] The stage 14 has a lower electrode 18 and an electrostatic chuck 20 (an example of a chuck member). The stage 14 may further include an electrode plate 16. The electrode plate 16 is made of a conductive material such as aluminum and has a substantially disk-like shape. The lower electrode 18 is provided on the electrode plate 16. The lower electrode 18 is made of a conductive material such as aluminum and has a substantially disk-like shape. The lower electrode 18 is electrically connected to the electrode plate 16.

[0018] The electrostatic chuck 20 is provided on the lower electrode 18. A workpiece (an example of a substrate) is placed on the upper surface of the electrostatic chuck 20. The electrostatic chuck 20 has a body formed from a dielectric material. A film-like electrode is provided inside the body of the electrostatic chuck 20. The electrode of the electrostatic chuck 20 is connected to a power source 22 via a switch. The power source 22 may be a DC power source or an AC power source. When a voltage from the power source 22 is applied to the electrode of the electrostatic chuck 20, an electrostatic attractive force is generated between the electrostatic chuck 20 and the workpiece. The generated electrostatic attractive force attracts the workpiece to the electrostatic chuck 20 and the workpiece is held by the electrostatic chuck 20.

[0019] An edge ring ER is disposed on the stage 14 so as to surround the edge of the workpiece. The edge ring ER is provided to improve the in-plane etching uniformity. The edge ring ER may be made of silicon, silicon carbide, quartz, or the like.

[0020] A flow path 18f is provided inside the lower electrode 18. A coolant is supplied to the flow path 18f from a chiller unit 26 disposed outside the chamber body 12 via a pipe 26a. The coolant supplied to the flow path 18f is returned to the chiller unit 26 via a pipe 26b. In the plasma processing apparatus 1, the temperature of the workpiece placed on the electrostatic chuck 20 is adjusted by heat exchange between the coolant and the lower electrode 18.

[0021] The plasma processing apparatus 1 is provided with a gas supply line 28. The gas supply line 28 supplies a heat transfer gas, for example, He gas, from a heat transfer gas supply mechanism to between the upper surface of the electrostatic chuck 20 and the back surface of the workpiece.

[0022] The plasma processing apparatus 1 further includes an upper electrode 30. The upper electrode 30 is provided above the stage 14. The upper electrode 30 includes an electrode plate 34. The lower surface of the electrode plate 34 is the lower surface on the internal space 12s side and defines the internal space 12s. The electrode plate 34 may be formed of a low electrical resistance conductor or semiconductor that generates little Joule heat. As an example, the electrode plate 34 is made of silicon. A plurality of gas discharge holes 34a are formed in the electrode plate 34. The plurality of gas discharge holes 34a penetrate the electrode plate 34 in the plate thickness direction.

[0023] A cooling plate 37 that holds the electrode plate 34 is disposed on the upper part of the electrode plate 34. The cooling plate 37 includes a cooling plate main body 37A. The cooling plate main body 37A may be made of a conductive material such as aluminum. The cooling plate 37 includes an electrostatic chuck 35 on the lower surface of the cooling plate main body 37A. The electrode plate 34 is in close contact with the cooling plate main body 37A by the attraction force of the electrostatic chuck 35. The electrode plate 34 is supported on the upper part of the chamber body 12 by the attraction force of the electrostatic chuck 35. The member 32 and the locking portion 39 are support members that support the electrode plate 34 from below and prevent the electrode plate 34 from falling. The member 32 and the locking portion 39 are made of, for example, an insulating material. The locking portion 39 may be configured to be rotatable downward.

[0024] A flow path 37c is provided inside the cooling plate main body 37A. A coolant is supplied to the flow path 37c from a chiller unit (not shown) disposed outside the chamber body 12. The coolant supplied to the flow path 37c is returned to the chiller unit. This adjusts the temperature of the cooling plate main body 37A. In the plasma processing apparatus 1, the temperature of the electrode plate 34 is adjusted by heat exchange with the cooling plate main body 37A.

[0025] A plurality of gas introduction passages 37a are provided inside the cooling plate main body 37A so as to extend downward. A plurality of gas diffusion chambers 37b are provided between the upper surface of the electrode plate 34 and the lower surface of the cooling plate main body 37A so as to correspond to the plurality of gas introduction passages 37a. A plurality of gas supply passages 37e are provided so as to extend in the thickness direction from the gas diffusion chambers 37b toward the electrode plate 34. The gas supply passages 37e supply processing gas to the plurality of gas discharge holes 34a of the electrode plate 34. A plurality of gas introduction ports 37d are formed in the cooling plate main body 37A to introduce processing gas to the plurality of gas diffusion chambers 37b. A gas supply pipe 38 is connected to the gas introduction ports 37d.

[0026] A gas supply unit GS is connected to the gas supply pipe 38. In one embodiment, the gas supply unit GS includes a gas source group 40, a valve group 42, and a flow rate controller group 44. The gas source group 40 is connected to the gas supply pipe 38 via the flow rate controller group 44 and the valve group 42. The gas source group 40 includes a plurality of gas sources. The valve group 42 includes a plurality of opening and closing valves. The flow rate controller group 44 includes a plurality of flow rate controllers. Each of the plurality of flow rate controllers is a mass flow controller or a pressure-controlled flow rate controller. The plurality of gas sources of the gas source group 40 are connected to the gas supply pipe 38 via the corresponding valves of the valve group 42 and the corresponding flow rate controllers of the flow rate controller group 44.

[0027] In the plasma processing apparatus 1, a shield 46 is detachably provided along the inner wall of the chamber body 12. The shield 46 is also provided on the outer periphery of the support part 13. The shield 46 prevents etching by-products from adhering to the chamber body 12. The shield 46 is formed, for example, by coating an aluminum member with ceramics such as Y2O3.

[0028] A baffle plate 48 is provided between the support 13 and the side wall of the chamber body 12. The baffle plate 48 is formed, for example, by coating an aluminum member with ceramics such as Y2O3. A plurality of through holes are formed in the baffle plate 48. An exhaust port 12e is provided below the baffle plate 48 and at the bottom of the chamber body 12. An exhaust device 50 is connected to the exhaust port 12e via an exhaust pipe 52. The exhaust device 50 has a pressure control valve and a vacuum pump such as a turbo molecular pump.

[0029] The plasma processing apparatus 1 further includes a first high frequency power supply 62 and a second high frequency power supply 64. The first high frequency power supply 62 is a power supply that generates a first high frequency (high frequency power) for generating plasma. The frequency of the first high frequency is, for example, within a range of 27 MHz to 100 MHz. The first high frequency power supply 62 is connected to the lower electrode 18 via a matching device 66 and the electrode plate 16. The matching device 66 has a circuit for matching the output impedance of the first high frequency power supply 62 with the input impedance on the load side (lower electrode 18 side). The first high frequency power supply 62 may be connected to the upper electrode 30 via the matching device 66.

[0030] The second high frequency power supply 64 is a power supply that generates a second high frequency for attracting ions into the workpiece. The frequency of the second high frequency is lower than the frequency of the first high frequency. The frequency of the second high frequency is, for example, within a range of 400 kHz to 13.56 MHz. The second high frequency power supply 64 is connected to the lower electrode 18 via a matching device 68 and the electrode plate 16. The matching device 68 has a circuit for matching the output impedance of the second high frequency power supply 64 with the input impedance on the load side (lower electrode 18 side).

[0031] The plasma processing apparatus 1 may further include a DC power supply unit 70. The DC power supply unit 70 is connected to the upper electrode 30. The DC power supply unit 70 is capable of generating a negative DC voltage and applying the DC voltage to the upper electrode 30.

[0032] The plasma processing apparatus 1 may further include a control unit Cnt. The control unit Cnt may be a computer including a processor, a storage unit, an input device, a display device, and the like. The control unit Cnt controls each unit of the plasma processing apparatus 1. In the control unit Cnt, an operator can use the input device to input commands and the like to manage the plasma processing apparatus 1. In addition, the control unit Cnt can visualize and display the operating status of the plasma processing apparatus 1 using the display device. Furthermore, the storage unit of the control unit Cnt stores a control program and recipe data for controlling various processes executed by the plasma processing apparatus 1 using the processor. The processor of the control unit Cnt executes the control program and controls each unit of the plasma processing apparatus 1 according to the recipe data, whereby the method described below is executed in the plasma processing apparatus 1.

[0033] [Outline of the optical measurement system] FIG. 2 is a diagram illustrating an example of an optical measurement system according to an exemplary embodiment. In FIG. 2, the configuration of the stage 14 is mainly illustrated, and configurations other than the chamber body 12 of the plasma processing apparatus 1 are omitted. The optical measurement system 10 illustrated in FIG. 2 irradiates light onto the back surface of the wafer W (an example of a substrate) to measure the arrangement state of the wafer W arranged in the chamber of the plasma processing apparatus 1. As an example, the wafer W is made of silicon. The wafer W is placed on a support surface 20a, which is the surface of the stage 14 (i.e., the surface of the electrostatic chuck 20). A plurality of through holes (first through hole 14a, second through hole 14b, third through hole 14c) penetrating downward are formed in the support surface 20a.

[0034] The light measurement system 10 includes, for example, an interferometer 80 (an example of a measurement unit), a plurality of light emitting units (a first light emitting unit 83a, a second light emitting unit 83b, a third light emitting unit 83c), a plurality of window members (a first window member 84a, a second window member 84b, a third window member 84c), and a control device 86. The plurality of light emitting units and the plurality of window members each have the same configuration. In the following, the first light emitting unit 83a and the first window member 84a will be representatively described as a "first light introducing unit", and descriptions of the second light emitting unit 83b and the second window member 84b (a second light introducing unit), and the third light emitting unit 83c and the third window member 84c (a third light introducing unit) will be omitted.

[0035] The interferometer 80 has a light source 81. The interferometer 80 and the first light emitting part 83a are connected by an optical fiber 82. As a result, the light generated by the light source 81 propagates to the first light emitting part 83a via the optical fiber 82. The first light emitting part 83a is a focuser or a collimator, and is disposed so as to emit light toward the back surface Wa of the wafer W.

[0036] A first window member 84a is airtightly provided in the first through hole 14a of the stage 14. The first window member 84a is provided inside the first through hole 14a so that a gap S is formed between an upper end surface 85a (an upper end surface of the first light introducing portion) of the first window member 84a and the rear surface Wa of the wafer W. The first window member 84a is made of, for example, sapphire, quartz, silicon, or the like.

[0037] The first light emitting unit 83a emits light to the back surface Wa of the wafer W through the first window member 84a. The first light emitting unit 83a receives the returning light. The returning light includes reflected light from the back surface Wa of the wafer W. Based on the interference of the reflected light, the length of the gap S, that is, the distance between the upper end surface 85a of the first window member 84a and the back surface Wa of the wafer W, is measured. The returning light propagates through the optical fiber 82 and is measured by the interferometer 80.

[0038] The interferometer 80 can measure the return light by either a spectroscopic method or a wavelength scanning method. In the case of the spectroscopic method, the light source 81 is a broadband light source such as an SLD (Super luminescent diode) or an ASE (Amplified Spontaneous Emission). The light is dispersed using a grating or the like, and the spectrum is acquired using a CCD (Charge Coupled Device) array or the like. In the case of the wavelength scanning method, the light source 81 is a narrowband light source capable of controlling the wavelength of the output light, and the wavelength of the output light is swept and the spectrum is acquired by receiving the light using a photodiode or the like. The interferometer 80 may also measure by a mirror scanning method in which a reference mirror is swept and the sweep distance and signal intensity are acquired.

[0039] The wavelength of the light from the light source 81 is arbitrarily selected from among wavelengths that can transmit through the first window member 84a. When light in the long wavelength region (1.2 μm or more) that can transmit through silicon is used, the optical path length of the wafer W made of silicon can be measured along with the length of the above-mentioned gap S. This allows the temperature of the wafer W to be measured in parallel. When light in the short wavelength region, for example, when light in the visible light region is used, the length of the gap S can be measured with higher resolution than when light in the long wavelength region is used.

[0040] The control device 86 (an example of a control unit) is connected to the interferometer 80 and the storage unit 87. The control device 86 may be a computer including a processor, a storage unit, an input device, a display device, and the like. The control device 86 calculates the distance (length of the gap S) between the upper end surface 85a of the first window member 84a and the back surface Wa of the wafer W based on the spectrum of the return light detected by the interferometer 80. Similarly, the control device 86 calculates the distance between the upper end surface 85b of the second window member 84b and the back surface Wa of the wafer W, and calculates the distance between the upper end surface 85c of the third window member 84c and the back surface Wc of the wafer W. The control device 86 determines the arrangement state of the wafer W based on the obtained lengths of the multiple gaps S and the allowable range stored in the storage unit 87.

[0041] Fig. 3 is a diagram showing an example of the optical path length of the gap. In Fig. 3, the first window member 84a is illustrated, but the second window member 84b and the third window member 84c are the same. As shown in Fig. 3, the distance between the upper end surface 85a of the first window member 84a and the back surface Wa of the wafer W is the gap length L1, the optical path length of the wafer W is L2, and the optical path length from the upper end surface 85a of the first window member 84a to the front surface Wb of the wafer W is L3.

[0042] FIG. 4 is a graph showing an example of the measurement result of the light measurement system. The horizontal axis is the optical path length, and the vertical axis is the signal intensity. FIG. 4 illustrates a case where light having a wavelength that can transmit through the wafer W is used. As shown in FIG. 4, the spectrum of the return light acquired by the interferometer 80 has a peak due to the gap length L1, a peak due to the optical path length L2 of the wafer W, and a peak due to the optical path length L3 from the upper end surface 85a of the first window member 84a to the surface Wb of the wafer W. The control device 86 acquires the gap length L1 based on the optical path length of the peak position due to the gap length L1. Here, the gap length L1 is about 100 μm. The control device 86 acquires the gap length L1 for the second window member 84b and the third window member 84c in the same manner.

[0043] When all of the gap lengths L1 fall within the allowable range, the control device 86 determines that the wafer W is normally adsorbed to the stage 14. The allowable range is obtained in advance by measuring a properly adsorbed wafer W, and is stored in the memory unit 87. When at least one of the gap lengths L1 falls outside the allowable range, the control device 86 determines that the wafer W is not normally adsorbed to the stage 14. An example of an abnormal positional state of the wafer W will be described below.

[0044] Fig. 5A is a diagram showing an example of the arrangement state of the substrate, and Fig. 5B is a graph showing an example of the relationship between the measurement position and the gap length obtained in the arrangement state shown in Fig. 5A. As shown in Fig. 5A, the first window member 84a and the third window member 84c are arranged at the first position E1 and the second position E2 so as to correspond to the edge of the wafer W, and the second window member 84b is arranged at the third position C so as to correspond to the center of the wafer W. The wafer W is arranged on the edge ring ER. More specifically, the edge of the wafer W corresponding to the first window member 84a is arranged on the edge ring ER. Such an arrangement state can occur due to a transfer error or the like.

[0045] In Fig. 5B, the horizontal axis represents the in-plane position, and the vertical axis represents the gap length. When the wafer W is disposed on the edge ring ER as shown in Fig. 5A, the gap length at the second position E2 falls within the allowable range R1, but the gap lengths at the first position E1 and the third position C exceed the allowable range R1, as shown in Fig. 5B. In this way, the control device 86 can determine that the wafer W is disposed on the edge ring ER based on the measurement result shown in Fig. 5B.

[0046] Fig. 6A is a diagram showing an example of the arrangement of the substrate, and Fig. 6B is a graph showing an example of the relationship between the measurement position and the gap length obtained in the arrangement shown in Fig. 6A. Fig. 6A is different from Fig. 5A in that only the arrangement of the wafer W is different, and the rest is the same. As shown in Fig. 6A, the wafer W is in a state where the center is raised (convexly warped). Such an arrangement can occur due to a stress difference between the front and back of the wafer W on which a film has been formed.

[0047] When the center of the wafer W is raised as shown in Fig. 6(A), the gap lengths at the first position E1 and the second position E2 fall within the allowable range R1, but the gap length at the third position C exceeds the allowable range R1 as shown in Fig. 6(B). Based on the measurement result shown in Fig. 6(B), the control device 86 can determine that the wafer W is in an arrangement state in which the outer periphery is sufficiently attracted to the wafer W, but the center of the wafer W is not attracted to the wafer W.

[0048] Fig. 7A is a diagram showing an example of the arrangement of the substrate, and Fig. 7B is a graph showing an example of the relationship between the measurement position and the gap length obtained in the arrangement shown in Fig. 7A. Fig. 7A is different from Fig. 5A in that only the arrangement of the wafer W is different, and the rest is the same. As shown in Fig. 7A, the wafer W is in a concave state (concavely warped state). Such an arrangement can occur due to a stress difference between the front and back of the wafer W on which a film has been formed.

[0049] When the center of the wafer W is recessed as shown in Fig. 7A, the gap length at the third position C falls within the allowable range R1, but the gap lengths at the first position E1 and the second position E2 exceed the allowable range R1 as shown in Fig. 7B. Based on the measurement result shown in Fig. 7B, the control device 86 can determine that the wafer W is in an arrangement state in which the center of the wafer W is sufficiently attracted to the wafer W, but the outer periphery of the wafer W is not attracted to the wafer W.

[0050] Fig. 8(A) is a diagram showing an example of the arrangement state of the substrate, and Fig. 8(B) is a graph showing an example of the relationship between the measurement position and the gap length obtained in the arrangement state shown in Fig. 8(A). Fig. 8(A) is the same as Fig. 5(A) except for the arrangement state of the wafer W. As shown in Fig. 8(A), the wafer W is recessed in the center (concavely warped), the chucking force near the first position E1 is weak, and the outer periphery is partially raised.

[0051] When the outer periphery of the wafer W is partially floating as shown in Fig. 8(A), the gap length at the second position E2 and the third position C falls within the allowable range R1, but the gap length at the first position E1 exceeds the allowable range R1 as shown in Fig. 8(B). Based on the measurement result shown in Fig. 8(B), the control device 86 can determine that the central portion of the wafer W is sufficiently attracted to the wafer W, but the outer periphery of the wafer W is not partially attracted to the wafer W.

[0052] Fig. 9(A) is a diagram showing an example of the arrangement state of the substrate, and Fig. 9(B) is a graph showing an example of the relationship between the measurement position and the gap length obtained in the arrangement state shown in Fig. 9(A). Fig. 9(A) is the same as Fig. 5(A) except for the arrangement state of the wafer W. As shown in Fig. 9(A), the wafer W is in a floating state. This arrangement state can occur when dust or the like is present between the support surface 20a and the wafer W, or when a pin (not shown) for lifting the wafer W does not move down due to a malfunction.

[0053] When the wafer W is in a floating state as shown in Fig. 9A, the gap lengths at the first position E1, the second position E2, and the third position C exceed the allowable range R1 as shown in Fig. 9B. The control device 86 can determine that the wafer W is in a floating position based on the measurement results shown in Fig. 9B.

[0054] As described above with reference to FIGS. 5A to 9B, the control device 86 can determine the positional state of the wafer W based on the gap lengths acquired by the multiple light introducing parts.

[0055] [Summary of the embodiment] In the plasma processing apparatus 1, a gap S is formed between the upper end surface of each light introducing portion and the back surface Wa of the wafer W. The light emitted from each of the light introducing portions is reflected by the back surface Wa of the wafer W and received as return light. The distance (gap length L1) between the upper end surface and the back surface Wa of the wafer W is calculated based on the return light for each of the light introducing portions. The arrangement state of the wafer W is determined based on the distance corresponding to each of the light introducing portions. In this way, the plasma processing apparatus 1 can determine the arrangement state of the wafer W by measuring the distance between the upper end surface of each light introducing portion and the back surface Wa of the wafer W with light. Therefore, the plasma processing apparatus 1 can determine the arrangement state of the wafer W without being limited by the type of chuck member. In addition, the plasma processing apparatus 1 can determine the arrangement state of the wafer W without emitting plasma. Furthermore, the plasma processing apparatus 1 can determine a state in which only the center part of the wafer W is raised by measuring at least two points, for example, the edge of the wafer W and the center of the substrate, as the measurement target.

[0056] Furthermore, after the wafer W is placed on the stage 14, the plasma processing apparatus 1 can detect any transport errors of the wafer W in advance by measuring the gap length of each light introducing portion with light before the wafer W is adsorbed to the stage 14 (see (A) and (B) of Figures 5).

[0057] (Modification) It will be understood that various modifications of the exemplary embodiments of the present disclosure may be made without departing from the scope and spirit of the present disclosure. Accordingly, the various exemplary embodiments disclosed herein are not intended to be limiting, with the true scope and spirit being indicated by the appended claims.

[0058] In the above-mentioned exemplary embodiment, the number of the through holes is three, but the number of the through holes may be two or four or more. The positions of the through holes and the light introduction part may be arranged linearly in the radial direction or in the circumferential direction. The light introduction part has been described as a combination of a focuser or collimator and a window member, but a so-called fiber field-through structure, which is a combination of an optical fiber and a window member, may be adopted. As a substitute for the interferometer 80, a laser displacement meter or a white light confocal displacement meter, which is a non-contact optical distance measuring instrument, may be adopted. The process performed by the plasma processing device 1 is not limited to plasma processing, and may be any process that requires placing and adsorbing the wafer W on a flat plate. The wafer W may be fixed to the stage 14, and is not limited to adsorption.

[0059] Generally, dots of uniform height are arranged on the stage 14 to keep the distance between the stage 14 and the wafer W constant. The arrangement of the dots makes the thermal conductivity of He gas uniform. The dots are worn down by friction with the wafer W and cleaning processing in the chamber (mainly removal of deposits by plasma). Due to the wear of the dots, the distance between the wafer W and the stage 14 decreases over time and the contact area with the dots also increases, so that the thermal conductivity fluctuates. The plasma processing apparatus 1 can detect the change in the height of the dots over time by measuring the gap length. For this reason, the plasma processing apparatus 1 may correct the change in thermal conductivity due to the wear of the dots with other parameters (He pressure, stage temperature, etc.). For example, the plasma processing apparatus 1 may operate the gas supply line 28 based on the measured gap length to correct the pressure of the He gas supplied between the upper surface of the electrostatic chuck 20 and the back surface Wa of the wafer W.

[0060] FIG. 10 is a graph showing an example of the relationship between the process temperature and the gap length. The horizontal axis of FIG. 10 is the gap length, and the vertical axis is the process temperature. The first temperature A is the target process temperature. When the gap length is shortened due to wear of the dots, the process temperature measured under the same process conditions decreases (solid line in the figure). For this reason, the plasma processing device 1 may correct the He gas pressure based on the measured gap length so as to fill the temperature difference with the target process temperature. For example, the plasma processing device 1 may reduce the He gas pressure as the measured gap length becomes shorter.

[0061] The gap length may vary within the range of processing accuracy. In addition, due to the difference in linear expansion coefficient caused by the difference in the material between the stage 14 and the window member, the gap length may vary depending on the temperature of the stage 14. For example, the window distance L4 of the first window member 84a and the thickness of the stage 14 shown in FIG. 3 expand and contract depending on the temperature. If the thickness of the stage 14 at the reference temperature is X, the linear expansion coefficient of the stage 14 is α, the window distance of the window member at the reference temperature is Y, and the linear expansion coefficient of the window member is β, the variation of the gap length with respect to the temperature change ΔT is X·(1+α)·ΔT-Y·(1+β)·ΔT. If the temperature rises and α>β, the gap length increases. If the temperature rises and α<β, the gap length decreases. In general, the linear expansion coefficient of metals used for the stage 14 is larger than that of quartz, sapphire, and the like used for the window member. For this reason, since this corresponds to the case of α>β, the gap length increases when the temperature rises. The gap length allowable range R1 may be set taking these variations into consideration. For example, a temperature sensor may be provided on the stage 14, and the upper and lower limits of the gap length allowable range R1 may be corrected according to the variations in the gap length. Alternatively, the gap length may be corrected with a correction value according to the measured temperature.

[0062] In the above-described exemplary embodiment, the application example to the stage 14 has been described, but the present disclosure may be applied to the cooling plate 37, for example. In this case, the cooling plate 37 has a support surface for supporting the electrode plate 34, is configured to fix the electrode plate 34 to the support surface, and includes a plurality of through holes penetrating upward from the support surface. Each of the plurality of light introduction parts is provided inside the plurality of through holes so that a gap is formed between the lower end surface and the back surface of the electrode plate 34. Each light introduction part is configured to emit light generated from the light source to the back surface of the electrode plate 34 and to receive return light from the back surface of the electrode plate 34, and the control device 86 is configured to determine the arrangement state of the electrode plate 34 based on the length of the gap corresponding to each of the plurality of light introduction parts.

[0063] [Example] The inventors prepared a wafer W with small warpage (gap length L1 before chucking was 310 μm) and a wafer W with large warpage (gap length L1 before chucking was 410 μm), and measured the gap length L1 after chucking, which was 300 μm in both cases. This confirmed that the normality or abnormality of chucking can be determined by measuring the gap length L1. [Explanation of symbols]

[0064] 1...plasma processing apparatus (an example of a substrate processing apparatus), 12...chamber body, 14...stage, 20...electrostatic chuck (an example of a chuck member), 20a...support surface, 80...interferometer (an example of a measurement unit), 81...light source, 83a...first light-emitting portion, 83b...second light-emitting portion, 83c...third light-emitting portion, 84a...first window member, 84b...second window member, 84c...third window member, 86...control device (an example of a control unit).

Claims

1. a chamber providing a processing volume therein; a stage disposed in the processing space, the stage including a chuck member, the chuck member having a support surface for supporting a substrate and configured to fix the substrate to the support surface, the stage including a plurality of through holes extending downward from the support surface; A light source; a plurality of light introducing sections, each of which is provided inside the plurality of through holes such that a gap is formed between an upper end surface of the light introducing section and a rear surface of the substrate, and which is configured to emit light generated from the light source to the rear surface of the substrate and to receive return light from the rear surface of the substrate; a measurement unit connected to the plurality of light introducing units and configured to measure a spectrum of the return light incident on each of the plurality of light introducing units; a control unit configured to calculate a length of the gap for each of the plurality of light introducing portions based on the spectrum of the return light measured by the measurement unit, and to determine an arrangement state of the substrate based on the length of the gap corresponding to each of the plurality of light introducing portions; The substrate processing apparatus includes:

2. a chamber providing a processing volume therein; a stage disposed in the processing space; an upper electrode disposed above the stage; a cooling plate having a support surface for supporting the upper electrode and configured to fix the upper electrode to the support surface, the cooling plate including a plurality of through holes penetrating upward from the support surface; A light source; a plurality of light introducing sections, each of which is provided inside the plurality of through holes such that a gap is formed between a lower end surface of the light introducing section and a rear surface of the upper electrode, and which is configured to emit light generated from the light source to the rear surface of the upper electrode and to receive return light from the rear surface of the upper electrode; a measurement unit connected to the plurality of light introducing units and configured to measure a spectrum of the return light incident on each of the plurality of light introducing units; a control unit configured to calculate a length of the gap for each of the plurality of light introducing portions based on the spectrum of the return light measured by the measurement unit, and to determine an arrangement state of the upper electrode based on the length of the gap corresponding to each of the plurality of light introducing portions; The substrate processing apparatus includes:

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