Margin tester and method for providing prediction performance measurement value of device under test

Machine learning-based neural networks in margin testers like TMT standardize measurement results and speed up testing by using device-specific signatures, addressing inconsistency and enhancing throughput.

JP2025013321APending Publication Date: 2025-01-24TEKTRONIX INC
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Patent Information

Application Number
JP2024113041
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Priority Date
2024-07-11
Filing Date
2024-07-16
Publication Date
2025-01-24

AI Technical Summary

Technical Problem

Measurement results for device under test (DUT) vary across different margin testers, and traditional methods using real-time oscilloscopes and BERTs yield inconsistent results.

Method used

Employing machine learning neural networks to adjust measurements made by margin testers, such as the Tektronix Margin Tester (TMT), by using the 'signature' of the specific tester to standardize results and reduce testing time.

Benefits of technology

The solution speeds up the testing process and ensures consistent measurement results across different TMT devices by calibrating neural networks with TMT signatures, allowing simultaneous testing of multiple channels.

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Abstract

To provide prediction performance measurement of a device under test (DUT).SOLUTION: A margin tester 12 includes one or more ports 14 to allow the margin tester 12 to connect to a DUT10, a memory 22 containing a margin tester signature, a transmitter 16, a receiver 18 for receiving signals from the DUT10, and one or more processors 20. One or more processors are configured to execute a program that causes one or more processors to perform processing of: receiving a plurality of signals from the receiver 18 through one or more ports 14, generating a performance indicator from the plurality of signals, transmitting the performance indicator and the margin tester signature to a machine learning system 30, and receiving a result containing a prediction performance measurement value of the DUT10 from the machine learning system 30.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present disclosure relates to test and measurement instruments, and more particularly to using machine learning to better correlate measurements made on different test and measurement instruments. [Background technology]

[0002] The Tektronix Margin Tester (TMT) currently includes both a transmitter and receiver that supports PCIe Gen3 and Gen4 standards. See https: / / www.tek.com / en / products / pciemargintester.

[0003] The traditional method of testing the transmitter of a device under test (DUT) is to use a real-time (RT) oscilloscope to acquire waveforms and then use measurement software such as SigTest, Seasim, or DPOJET (see https: / / www.tek.com / en / datasheet / jitter-noise-and-eye-diagram-analysis-solution) to generate measurements such as eye diagrams, BER (bit error rate) contour plots, eye height, eye width, receiver DFE (decision feedback equalizer) tap values, and CTLE (continuous time linear equalizer) gain. The traditional method of testing the receiver of a DUT is to use a BERT (bit error rate tester) to generate signals with the desired stresses.

[0004] The TMT can test all PCIe (Peripheral Component Interface Express) channels (up to 16 channels) simultaneously. This approach allows for much higher throughput than traditional methods using real-time oscilloscopes, which usually only have four channels. The transmitter part of the TMT can generate various stress signals that are used as signal sources for DUT receiver testing. The TMT can generate signals simultaneously on all channels (up to 16 channels), which is much more than a BERT. This allows for much higher throughput. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] US Patent Application Publication No. 2022 / 0373598 [Patent Document 2] Patent Publication No. 2022-179495 [Non-patent literature]

[0006] [Non-Patent Document 1] "TMT4 type margin tester", Tektronix, [online], [searched July 12, 2024], Internet<https: / / www.tek.com / ja / products / pciemargintester> [Non-Patent Document 2] "Jitter / Eye Diagram Analysis Tool Data Sheet (DPOJET Data Sheet)", Tektronix, [online], [Retrieved July 12, 2024], Internet < https: / / www.tek.com / ja / datasheet / jitter-noise-and-eye-diagram-analysis-solution> Summary of the Invention [Problem to be solved by the invention]

[0007] However, measurements of the same DUT may vary from one specific TMT device to another, and the measurements of the TMT devices may not match the measurements using traditional methods with real-time oscilloscopes and BERTs. Embodiments of the present disclosure generally include machine learning-based methods to reduce the mismatch between these devices. [Means for solving the problem]

[0008] Embodiments of the present application provide a solution to the problem of mismatch between various margin testers, and can speed up the testing process for transmitter and receiver devices, such as those used in PCIe devices. Using a machine learning neural network, the time required to test a device under test (DUT) is reduced. By providing the neural network with the "signature" of the margin tester being used for testing, the neural network can adjust the measurements made by that margin tester to accommodate that particular margin tester. [Brief description of the drawings]

[0009] [Figure 1] FIG. 1 shows one embodiment of a setup for testing a device under test (DUT) using a margin tester. [Diagram 2] Figure 2 shows an example of a BER contour scan result taken on a margin tester. [Diagram 3] Figure 3 shows an embodiment of a setup for training a machine learning network for testing a DUT using a margin tester. [Figure 4] Figure 4 shows an embodiment of training data for a neural network for a transmitter. [Diagram 5] FIG. 5 illustrates one embodiment of a run-time operation setup for a margin tester using a machine learning network to test a DUT. [Figure 6]Figure 6 illustrates an embodiment of run-time data for testing a DUT. [Figure 7] Figure 7 shows an embodiment of a training setup for training a neural network for receiver testing. [Figure 8] Figure 8 shows an embodiment of the run-time setup for testing a receiver using a neural network. [Figure 9] Figure 9 shows an embodiment of the run-time setup for receiver testing using a calibrated TMT receiver with a neural network. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Currently, Tektronix is ​​the sole provider of margin testers. In the following description, we refer to the margin tester as a "Tektronix Margin Tester" (TMT), but understand that other margin testers from other manufacturers may have similar characteristics. The claims below are directed to margin testers with the same characteristics and functionality as those described in this application, supporting current and future standards such as PCIe5 and PCIe6, as well as standards other than PCIe.

[0011] The following description applies to testing transmitters and receivers. It is not intended or implied to be limited to these particular types of DUTs. The DUTs may include different types of devices that the TMT may have the capability to test. Additionally, the transmitters and receivers that the TMT uses for testing may be present on the TMT (either the same or two different pieces of equipment), but it is not intended or implied to be limited to these transmitters or receivers.

[0012] Before the advent of TMT, transmitters (Tx) and receivers (Rx) had more complex test procedures using more and usually more expensive equipment. In receiver (Rx) testing, the BERT output signal is calibrated using an oscilloscope. After the BERT output signal is calibrated, the BERT is connected to the DUT (Rx). The BERT receives a loopback signal from the DUT to obtain the BER count value, but this does not use an oscilloscope. In Rx testing, there is usually a target stress level for the signal from the transmitter in the TMT. TMT has the ability to provide various stress levels so that the TMT transmitter can test the receiver. In Tx testing, as will be explained in more detail later, an oscilloscope with analysis software can make pass / fail predictions and measurements that are used as labels for training the neural network. The oscilloscope plus analysis software forms a reference system that allows the translator to examine the contours of the margin tester's BER data, predict pass / fail conversions, and perform various types of measurements, as described in more detail below. TM The analysis software constitutes an embodiment of the analysis software.

[0013] FIG. 1 shows an overall test setup for testing a DUT 10 using a TMT 12. The TMT has one or more ports (e.g., 14) that allow the TMT to send and receive signals from the DUT 10. As mentioned above, the TMT can test multiple channels (e.g., 16 channels) at a time. The connection between the DUT and the TMT may consist of a ribbon cable with 16 or more connection lines to the TMT. The TMT has a transmitter 16 that allows the TMT to send test signals to the DUT and a receiver 18 that allows the TMT to receive signals. The TMT will also have one or more processors 20 and memory 22. The one or more processors may have access to a machine learning system 30 on an external device, or, as described below, the machine learning network may reside on the TMT.

[0014] In one embodiment, the TMT receives the signal transmitted from the DUT and generates a set of BER contours for various BER levels for each channel. FIG. 2 shows an example of a set of BER contours generated by the TMT using data from one of the 16 lanes on the DUT. Each contour for each channel can be represented by an image. This results in 16 times as many contour vectors being used. The contours in FIG. 2 show 10 contours for 10 BER levels for one channel, so the resulting array is a 10×16 array of individual contours. The machine learning system can receive this image array for one DUT as input, or it can receive other formats, such as one image for each channel, one image for each of the DUT contours across all channels, etc. The image format used at runtime should match the image format used to train the neural network. Additionally, the input images may contain other types of data.

[0015] FIG. 3 illustrates an embodiment of a test setup for training a machine learning network 38 in a machine learning system 30. To simplify the drawing, the TMT 12 is not shown with its internal components, with the understanding that the TMT has the components shown in FIG. 1. During training, the TMT transmits the BER contour, parameters, and measurements of the DUT received from the DUT (described in more detail in connection with FIG. 4) and the manufacturing reference BER contour to the machine learning system 30 (referred to herein as an instrument translator). The manufacturing reference BER contour serves as the "signature" of the TMT. As discussed above, measurements and performance are different for each TMT. This allows the machine learning system 30 to take the measurements of the TMT into account.

[0016] Developing a TMT signature can take many forms. TMT does not have a way to calibrate multiple TMTs so that they are more consistent. In one embodiment, the process uses a "golden" reference DUT connected to the TMT to generate a set of contours for the reference DUT, as shown in FIG. 2. The TMT then saves the resulting contours as the TMT's signature. In one embodiment, the signature contours may be located in one of the color channels of the input image that is different from the BER contour data of the DUT.

[0017] As shown, the machine learning system 30 includes a neural network 38 and a tensor builder 32. These components may reside on another computing device, in the cloud, or in the TMT 12. The tensor builder 32 receives input data and builds a tensor image for input to the neural network. This input image may have three color channels (RGB), one of which may contain the TMT signature, as described above. U.S. Patent Application Publication No. 2022 / 0373598 can provide more information about tensors and is incorporated herein by reference in its entirety.

[0018] The tensor input received from the tensor builder 32 may undergo a normalization process at 34. Although not used in the training environment of FIG. 3, the output of the neural network undergoes a de-normalization process at 36. The neural network receives input data from the DUT, the TMT signature, and measurements made by the TMT. The tensor builder 32 may include the measurements in a tensor image as a bar graph, pie chart, or a variety of other graphs. These may include measurements in a variety of formats, as described in connection with FIG. 4, and may also include other information, such as the PCIe standard under which the transmitter is operating.

[0019] During training, the neural network 38 also receives reference data from a reference test station 40. The reference test station is also connected to the DUT 10, which is shown duplicated for simplicity. A variable ISI (Inter-Symbol Interference) board 42 is between the output of the DUT's Tx and an oscilloscope (or "scope") 44. The ISI 42 can normally use multiple channels, but in one embodiment, the TMT 12 uses only one worst case channel, and the ISI 42 uses only one channel that matches as closely as possible to the margin tester's one channel. This minimizes the amount of training required. The oscilloscope 44 receives the 16 lanes of waveforms, measures them using some test measurement software such as SigTest, DPOJET, PAM4, etc., and then provides those measurements 46 to the neural network to correlate with the tensor data from the TMT.

[0020] FIG. 4 shows an example of training inputs 50 to the neural network. The training inputs include the TMT signature 52 and the contour 54 of the DUT under test as the BER contour. Additional information 56 may be included as a bar graph 58, including, but is not limited to, lane, preset, temperature, measurements (eye width (EW), eye height (EH), etc.), attenuation (ATT), continuous time linear equalizer (CTLE) settings, gain, any DFE (decision feedback equalizer), etc. The results of the oscilloscope reference measurements 46, followed by the same measurements 62 made by the TMT, are also input to the neural network 38. The neural network then relates the DUT and its signature as well as the TMT measurements to the reference measurements.

[0021] It should be noted that in this particular embodiment, the DUT contour is used as a performance metric for the DUT. In other margin testers or in future embodiments of the margin tester, different types of performance metrics may be used. Similarly, as described below, during run-time, the neural network provides results that include one or more predicted performance measures of the DUT.

[0022] FIG. 5 illustrates an embodiment of the test system during run-time. FIG. 5 shows the same components as FIG. 3, although other setups may be present. In this run-time environment embodiment, the output data from the TMT is used to provide a measurement or a prediction of a pass / fail indicator for the DUT, or both. As mentioned above, the output of the neural network 38 may undergo a de-normalization process at 36. The normalization process converts the output of the tensor builder 32 to a range of values ​​from −1 to +1. The output of the neural network is then converted from this range back to the expected range of normal measurements. In one embodiment, the measurement or a general pass / fail indicator may be provided to a decision block 68. If the DUT does not pass or the measurement is out of range, the user may have the option of making a measurement using the reference test station 40, which is enabled by switch 66. In another embodiment, this option is not included and the user is simply presented with various measurement results.

[0023] Figure 6 shows an embodiment for predicting DUT results. On the left, the data provided to the neural network 50 is the same type of data provided during training. However, in this environment, the neural network provides predictions of one or more measurements. The neural network can also be configured to generate a pass / fail result as the predicted performance measurement.

[0024] The above description, although generic to all DUTs, is primarily focused on configuring a transmitter test setup. For transmitter testing, the TMT receiver receives signals from the lanes used by the DUT and uses the received signals to generate contours and other measurements. As will be explained later, the TMT can also be used to perform receiver tests, in which case the TMT also transmits signals to the DUT.

[0025] Characterizing the receiver involves generating a signal with a desired stress level. In traditional testing, an oscilloscope, such as a real-time oscilloscope, calibrates the BERT to generate an output signal with the desired stress. The output of the BERT is then connected to the receiver of the DUT. The TMT has a fairly high channel count, so using the TMT as a signal generator increases the test throughput. The TMT's Tx can be configured to generate signals with various stresses. There are various transmitter settings, such as the Tx's FFE (feed-forward equalizer) setting, gain setting, etc. Adjusting (tuning) the Tx's FFE taps can result in various conditions, for example, preshoot. The oscilloscope then provides labels (information indicating the correct answer of the data) for the training data (stress levels). These labels include random jitter, periodic jitter, total jitter, vertical noise, inter-symbol interference (ISI), etc.

[0026] Figure 7 shows a simplified setup during training. The oscilloscope 44 is part of the reference test station 40 from the previous figure. The TMT Tx generates a signal with the desired stress and sends it to the receiver 18 and the oscilloscope 44. The receiver sends the results (e.g. contours) to the neural network 38 along with labels provided by the oscilloscope for the training data.

[0027] At runtime, two cases can be considered for receiver testing. In the first case, a neural network external to the TMT receiver receives the contours from the TXT receiver and predicts the receiver stress. Figure 8 shows an example implementation. TMT Tx16 sends a test signal to TMT Rx18, which sends the contours generated by the scan to the neural network 38. The neural network determines the stress level in the signal.

[0028] In another embodiment, as shown in FIG. 9 and described above, the TMT Rx may be "calibrated" in that it has a trained neural network within it. The TMT 60 may have a trained neural network, or in another embodiment, may be trained. However, in the embodiment of FIG. 9, the TMT Tx 16 sends a signal to a calibrated TMT 60 that has a receiver, which contains a trained neural network. The neural network within the TMT then detects the stress level.

[0029] As a variation, a system could use multiple neural networks, for example one trained to predict transmitter measurements and another trained to predict stress levels during exams, the training setup would be the same and the networks would only receive a subset of the information used to train one neural network.

[0030] The above embodiments use machine learning to predict the performance of the DUT. One embodiment has a transmitter as the DUT and another embodiment has a receiver as the DUT. The machine learning system also provides a prediction of the performance of the DUT based on the input of performance metrics to the neural network. The neural network then provides a prediction of the measured value of the DUT performance. The margin tester allows the DUT to be tested using multiple lanes simultaneously. In one experiment, results were obtained in less than a minute using the margin tester. This speeds up the testing process, and the TMT signature allows the neural network to be "calibrated" based on inputs that include the TMT signature, mitigating issues of differences between multiple TMT devices.

[0031] Aspects of the disclosed technology can operate on specially created hardware, firmware, digital signal processors, or specially programmed general-purpose computers, including processors that operate according to programmed instructions. The term "controller" or "processor" in this application contemplates microprocessors, microcomputers, ASICs, and dedicated hardware controllers, among others. Aspects of the disclosed technology can be implemented in computer-available data and computer-executable instructions, such as one or more program modules, executed by one or more computers (including a monitoring module) or other devices. Generally, program modules include routines, programs, objects, components, data structures, and the like, which, when executed by a processor in a computer or other device, perform particular tasks or implement particular abstract data formats. The computer-executable instructions may be stored in computer-readable storage media, such as hard disks, optical disks, removable storage media, solid-state memory, RAM, and the like. As will be appreciated by those skilled in the art, the functionality of the program modules may be combined or distributed as desired in various embodiments. Furthermore, such functionality may be embodied in whole or in part in firmware or hardware equivalents, such as integrated circuits, field programmable gate arrays (FPGAs), etc. Certain data structures may be used to more effectively implement one or more aspects of the disclosed techniques, and such data structures are considered to be within the scope of the computer-executable instructions and computer-usable data described herein.

[0032] The disclosed aspects may, in some cases, be implemented in hardware, firmware, software, or any combination thereof. The disclosed aspects may also be implemented as instructions carried by or stored on one or more computer-readable media that may be read and executed by one or more processors. Such instructions may be referred to as computer program products. A computer-readable medium as described herein means any medium that can be accessed by a computing device. By way of example, and not limitation, computer-readable media may include computer storage media and communication media.

[0033] The above-described versions of the presently disclosed subject matter have many advantages that have been described or that will be apparent to those of skill in the art. Nevertheless, not all of these advantages or features are required in every version of a disclosed device, system or method.

[0034] Computer storage media means any medium that can be used to store computer-readable information. By way of example and not limitation, computer storage media may include random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital video disc (DVD) or other optical disk storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, and any other volatile or non-volatile removable or non-removable media implemented in any technology. Computer storage media excludes signals themselves and transitory forms of signal transmission.

[0035] A communication medium refers to any medium capable of communicating computer readable information. By way of example, and not limitation, communication media may include coaxial cables, fiber optic cables, air, or any other medium suitable for communicating electrical, optical, radio frequency (RF), infrared, acoustic, or other types of signals. Working Example

[0036] In the following, examples useful for understanding the technology disclosed in the present application are presented. The embodiment of the technology may include one or more of the examples described below and any combination thereof.

[0037] Example 1 is a margin tester comprising one or more ports enabling the margin tester to be connected to a device under test (DUT), a memory storing a margin tester signature, a transmitter, a receiver receiving signals from the DUT, and one or more processors, the one or more processors being configured to execute a program that causes the one or more processors to perform the following processes: receiving a plurality of signals from the receiver through the one or more ports; generating performance indicators from the plurality of signals; transmitting the performance indicators and the margin tester signature to one or more machine learning networks; and receiving results from the one or more machine learning networks including predicted performance measurements of the DUT.

[0038] Example 2 is a margin tester of example 1, wherein the DUT includes a transmitter, and one or more of the plurality of signals from the receiver include a performance indicator generated from receiving a transmission from the transmitter.

[0039] Example 3 is a margin tester of Example 2, wherein the program that causes the one or more processors to perform a process of transmitting the performance index and the margin tester signature to the one or more machine learning networks includes a program that causes the one or more processors to perform a process of transmitting parameters and settings related to the transmitter to the one or more machine learning networks.

[0040] Example 4 is a margin tester of Example 2, wherein the program that causes the one or more processors to perform a process of generating the performance index includes a program that causes the one or more processors to perform a process of generating a bit error rate (BER) contour.

[0041] Example 5 is the margin tester of any one of Examples 1 to 4, wherein the margin tester signature includes a BER contour unique to the margin tester.

[0042] Example 6 is the margin tester of any of examples 1-5, wherein the predicted performance measurements include either a pass / fail prediction or one or more measurements, or both.

[0043] Example 7 is a margin tester of any of Examples 1 to 6, wherein the program that causes the one or more processors to perform a process of sending the performance index to the machine learning network includes a program that causes the one or more processors to perform a process of creating a tensor image of the performance index and a process of sending the tensor image to the machine learning network.

[0044] Example 8 is the margin tester of example 7, wherein the tensor image includes one or more setting parameters, environmental parameters, and measurement results for one or more channels of the DUT.

[0045] A ninth embodiment is the margin tester of the first embodiment, wherein the DUT under test includes a receiver, and the signal received from the DUT includes a signal received by the receiver.

[0046] Example 10 is the margin tester of any of Examples 1 to X, wherein the signal received by the receiver is generated by the transmitter of the margin tester.

[0047] Example 11 is a margin tester of either Example 9 or 10, wherein the program that causes the one or more processors to perform a process of generating the performance index from a signal includes a program that causes the one or more processors to perform a process of generating a BER contour scan of the signal.

[0048] Example 12 is a margin tester of any of Examples 1 to 11, wherein the program that causes the one or more processors to perform a process of transmitting the performance indicators and the margin tester signature to the one or more machine learning networks includes a program that causes the one or more processors to perform a process of transmitting the performance indicators and the margin tester signature to one or more external neural networks.

[0049] Example 13 is a margin tester of any of Examples 1 to 12, wherein the program that causes the one or more processors to perform a process of transmitting the performance index and the margin tester signature to the one or more machine learning networks includes a program that causes the one or more processors to perform a process of transmitting the performance index and the margin tester signature to one or more neural networks present on the margin tester.

[0050] Example 14 is a method comprising: receiving a plurality of signals from a device under test (DUT) at a receiver of a margin tester having a margin tester signature; generating performance indicators from the plurality of signals; transmitting the performance indicators and the margin tester signature to one or more machine learning networks; and receiving results from the one or more machine learning networks including predicted performance measurements of the DUT.

[0051] Example 15 is the method of example 14, in which the DUT comprises a transmitter.

[0052] Example 16 is the method of example 15, further comprising a process of training one or more neural networks, the training process including a process of collecting performance indicators of a plurality of margin testers, and a process of labeling the performance indicators of each of the margin testers using the margin tester signatures, one or more settings of a transmitter channel, environmental parameters, and raw measurement results.

[0053] Example 17 is the method of example 14, in which the DUT comprises a receiver.

[0054] Example 18 is the method of example 17, further comprising a process of training one or more neural networks, the training process including a process of collecting performance indicators of a plurality of margin testers, and a process of labeling the performance indicators of each of the margin testers with stresses applied to the plurality of signals before the signals are transmitted and the margin tester signature.

[0055] Example 19 is the method of any of examples 14-18, wherein the predictive performance measures include either or both of a pass / fail prediction or one or more predictive measures.

[0056] Example 20 is any of the methods of Examples 14 to 19, wherein the process of sending the performance metrics and the margin tester signature to the one or more machine learning networks includes a process of sending the performance metrics and the margin tester signature to either one or more neural networks external to the margin tester or one or more neural networks present in the margin tester.

[0057] In addition, the description of this application refers to specific features. It should be understood that the disclosure herein includes all possible combinations of those specific features. When a specific feature is disclosed in connection with a particular aspect or embodiment, that feature can also be used in connection with other aspects and embodiments, to the extent possible.

[0058] Furthermore, when the application refers to a method having two or more defined steps or processes, those defined steps or processes may be performed in any order or simultaneously, unless the context precludes such a possibility.

[0059] All features disclosed in the specification, claims, abstract and drawings, and all steps in any disclosed method or process, may be combined in any combination, except where at least some of such features or steps are mutually exclusive combinations. Each feature disclosed in the specification, abstract, claims and drawings may be replaced by an alternative feature serving the same, equivalent or similar purpose, unless expressly stated otherwise.

[0060] For purposes of illustration, specific embodiments of the invention have been illustrated and described, but it will be understood that various modifications can be made without departing from the spirit and scope of the invention. Accordingly, the invention should not be limited, except as by the appended claims. [Explanation of symbols]

[0061] 10 Device Under Test (DUT) 12 Tektronix Margin Tester (TMT) 14 One or more ports 16 TMT Transmitter (Tx) 18 TMT Receiver (Rx) 20 One or more processors 22 Memory 30 Machine Learning Systems 32 Tensor Builder 34 Normalization Blocks 36 Denormalization Block 38 Convolutional Neural Networks (Machine Learning Networks) 40 Reference Testing Stations 42 ISI (Inter-Symbol Interference) Board 44 Oscilloscope (scope) 46 Reference Measurement Values ​​(Labels) 50 Example of training input 52 TMT Signature 54 DUT contour line 56 Additional Information 58 Additional Information Bar Chart 60 Calibrated TMT 62 TMT measurements 66 Optional Switches 68 Decision Block

Claims

1. 1. A margin tester comprising: one or more ports that allow the margin tester to be connected to a device under test (DUT); a memory containing a margin tester signature; A transmitter; A receiver for receiving a signal from the DUT; One or more processors Equipped with the one or more processors receiving a plurality of signals from the receiver via the one or more ports; generating a performance index from the plurality of signals; sending said performance metrics and said margin tester signatures to one or more machine learning networks; receiving results from the one or more machine learning networks, the results including predicted performance measures of the DUT; a margin tester configured to execute a program that causes the one or more processors to:

2. 2. The margin tester of claim 1, wherein the DUT includes a transmitter, and one or more of the signals from the receiver include a performance indicator generated from receiving a transmission from the transmitter.

3. 3. The margin tester of claim 2, wherein the program causing the one or more processors to perform a process for generating the performance index comprises a program causing the one or more processors to perform a process for generating a bit error rate (BER) contour.

4. 2. The margin tester of claim 1, wherein the margin tester signature comprises a BER contour that is unique to the margin tester.

5. 2. The margin tester of claim 1, wherein the program causing the one or more processors to perform a process of sending the performance index to the machine learning network includes a program causing the one or more processors to perform a process of creating a tensor image of the performance index and a process of sending the tensor image to the machine learning network.

6. 2. The margin tester of claim 1, wherein the DUT under test includes a receiver, and the signals received from the DUT include signals generated by the transmitter and received by the receiver of the margin tester.

7. 7. The margin tester of claim 6, wherein the program causing the one or more processors to generate the performance index from a signal comprises program causing the one or more processors to generate a BER contour scan of the signal.

8. receiving a plurality of signals from a device under test (DUT) at a receiver of a margin tester having a margin tester signature; generating a performance index from the plurality of signals; sending said performance metrics and said margin tester signatures to one or more machine learning networks; receiving results from the one or more machine learning networks, the results including predicted performance measures of the DUT; A method for providing predicted performance measurements for a device under test (DUT), comprising:

9. The DUT has a transmitter and further comprises a process for training one or more neural networks, the process for training comprising: collecting performance metrics for a plurality of margin testers; labeling the performance metrics of each of the margin testers with the margin tester signature, one or more settings of a transmitter channel, environmental parameters, and raw measurement results; The method of claim 8 comprising:

10. The DUT has a receiver and further comprises a process for training one or more neural networks, the process for training comprising: collecting performance metrics for a plurality of margin testers; labeling the performance metrics of each of the margin testers with stresses applied to the signals before they are transmitted and with the margin tester signature; The method of claim 8 comprising:

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