Storage device

JP2025022463AActive Publication Date: 2025-02-14HITACHI VANTARA LTD
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Patent Information

Application Number
JP2023127066
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-08-03
Publication Date
2025-02-14
Estimated Expiration
2043-08-03

AI Technical Summary

Benefits of technology

【0009】 本発明の一態様により、データ削減率を向上させてデータ保持コストを低減すると共に、I/O性能を向上できる。

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Abstract

To reduce data retaining costs by improving a data reduction rate, and to improve an I / O performance.SOLUTION: A processor receives first update wright data for a part of a first logical address region with respect to first compression data in the first logical address region compressed by basic compression unit, instructs an accelerator to perform compression with a smaller size than the basic compression unit in order to compress the first update wright data, creates uncompressed data in the basic compression unit by merging non-update data in the first logical address region elongated by the accelerator with the first update write data, and instructs the accelerator to compress the uncompressed data by the basic compression unit.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The present invention relates to a storage device that reduces the amount of stored data through compression. [Background technology]

[0002] In recent years, technologies that create new value by analyzing huge amounts of data, such as IoT (Internet of Things) and AI (Artificial Intelligence), have become widespread. Storage devices that store huge amounts of data require low data retention costs (price per capacity) and high I / O (Input / Output) performance.

[0003] Data retention costs are calculated by multiplying the low bit cost (price per capacity) by the amount of data to be stored. Compression is a technology that reduces data retention costs by reducing the amount of data to be stored. Compression reduces the amount of data by replacing bit strings of data with shorter bit strings through encoding.

[0004] Patent Document 1 discloses a storage system that employs a large compression unit and compresses data written by a host collectively in order to increase the effect of reducing the amount of data. [Prior art documents] [Patent documents]

[0005] [Patent Document 1] U.S. Patent Publication No. 2022 / 0121402 Summary of the Invention [Problem to be solved by the invention]

[0006] The lossless compression algorithm used in storage devices is generally the sliding dictionary method. In this method, the larger the compression unit, the wider the dictionary search space. This increases the probability of finding matching data in a wide dictionary search space, resulting in a higher data reduction effect. For example, if there is a data string ABABABCD, and the compression unit is four units long, it is compressed into data string ABAB and data string ABCD. In this case, the data string ABAB can be encoded as two repetitions of the dictionary data AB. However, the data string ABCD cannot be encoded. On the other hand, if the compression unit is eight units long, the data string ABABABCD can be encoded as three repetitions of the dictionary data AB and a data string CD.

[0007] Patent Document 1 discloses a method in which a storage device adopts a larger compression unit and compresses data written by a host collectively in order to improve the data reduction effect. However, no consideration is given to how to process the compressed data when the host updates only a part of the compressed data. [Means for solving the problem]

[0008] A storage device of one embodiment of the present invention includes a processor and an accelerator that performs compression and decompression of data, wherein the processor receives first updated write data of a portion of a first logical address area for first compressed data of the first logical address area compressed in a basic compression unit, and instructs the accelerator to compress the first updated write data at a size smaller than the basic compression unit, and the accelerator compresses the first updated write data at the smaller size, and the processor merges the non-updated data of the first logical address area and the first updated write data decompressed by the accelerator to generate uncompressed data of the basic compression unit, and the processor instructs the accelerator to compress the uncompressed data in the basic compression unit. Effect of the Invention

[0009] According to one aspect of the present invention, it is possible to improve the data reduction rate, reduce data retention costs, and improve I / O performance. [Brief description of the drawings]

[0010] [Figure 1] FIG. 13 is a diagram showing the concept of compression processing for a host write with a data length shorter than the compression unit. [Diagram 2] FIG. 13 illustrates the concept of garbage collection processing for compressed data in which some data is garbage. [Diagram 3] FIG. 1 is a diagram illustrating a concept of aggregating processing of compressed data. [Figure 4] FIG. 2 illustrates a configuration of a storage device. [Diagram 5] FIG. 13 is a diagram showing a configuration of compressed data management information. [Figure 6] 13 is a flowchart showing a compression process. [Figure 7] 13 is a flowchart showing a garbage collection process. [Figure 8] 13 is a flowchart showing a process of aggregating compressed data. [Figure 9] 13 is a flowchart showing a data merge process within a logical address range. [Figure 10] 13 is a flowchart showing a garbage collection process for implementing forward-close recompression. [Figure 11] 11 is a flowchart illustrating a garbage collection process that performs aggregation of compressed data. [Figure 12] 13 is a flowchart showing a compression process for switching the compression unit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0011] Hereinafter, an embodiment of the present invention will be described with reference to the drawings. However, the present invention is not to be interpreted as being limited to the description of the embodiment shown below. It will be easily understood by those skilled in the art that the specific configuration can be changed without departing from the concept or purpose of the present invention.

[0012] In this specification, the terms "first," "second," "third," and the like are used to identify components and do not necessarily limit the number or order.

[0013] In the configurations of the invention described below, the same or similar configurations or functions are given the same reference numerals, and duplicated explanations are omitted.

[0014] In addition, in the following description, when describing elements of the same type without distinguishing between them, common symbols (or reference signs) may be used, and when describing elements of the same type with distinction between them, reference signs (or element IDs) may be used.

[0015] In the following description, the "main memory" may be one or more storage devices including a memory. For example, the main memory may be at least a main storage device among a main storage device (typically a volatile storage device) and an auxiliary storage device (typically a non-volatile storage device). The storage unit may include at least one of a cache area (e.g., a cache memory or a partial area thereof) and a buffer area (e.g., a buffer memory or a partial area thereof).

[0016] In the following explanation, "LUN" means a logical storage device or volume, and is mapped to a part or all of the storage area of ​​a pool. In other words, a LUN is composed of a part or all of the storage area of ​​a pool. A host executes I / O (Input / Output) requests to a "LUN." A LUN is a logical volume. Allocation of storage area between a LUN and the storage area of ​​a storage drive is managed via a pool.

[0017] The program is executed by a processor (e.g., a CPU (Central Processing Unit)) included in the storage controller to perform a defined process using a storage resource (e.g., a main memory) and / or a communication interface device (e.g., an HCA) as appropriate, so the subject of the process may be the storage controller or the processor. The storage controller may also include hardware circuits that perform some or all of the process. The computer program may be installed from a program source. The program source may be, for example, a program distribution server or a computer-readable storage medium.

[0018] In the following description, a "host" is a system that sends an I / O request to a storage device, and may include an interface device, a storage unit (e.g., a memory), and a processor connected thereto. A host system may be composed of one or more host computers. At least one host computer may be a physical computer, and the host system may include a virtual host computer in addition to the physical host computer.

[0019] First, an example of an expected operation of the compression process of the storage device will be described when the host writes data to the storage device that is smaller than the compression unit (hereinafter referred to as the basic compression unit) defined by the storage device. Regardless of the size of the write data received from the host, the storage device attempts to compress the data in the basic compression unit in order to maintain a high data reduction rate. This is achieved, for example, by the following procedure.

[0020] The storage device reads compressed data including write data from a storage medium in the storage device and decompresses it. The storage device then merges the received write data with the decompressed data to make the size of the write data equal to the basic compression unit. The storage device then compresses this write data in the basic compression unit and writes it to the storage medium. In this way, when the size of the write data is smaller than the basic compression unit, the storage device complements the write data using data in the compressed data, allowing the storage device to compress the write data in the basic compression unit.

[0021] However, with this expected operation, in addition to compressing the write data received by the storage device from the host, the storage device will also read the compressed data from the storage medium, decompress it, and merge it, which increases the processing load on the storage device and reduces I / O performance.

[0022] Hereinafter, in each embodiment, a compression process for preventing the above-mentioned decrease in write performance will be described. EXAMPLES

[0023] This embodiment describes a case where, when the size of the host write data is smaller than the basic compression unit, the storage device compresses the data to the size of the write data and stores the data in a storage medium. This embodiment executes a compression process, a garbage collection process, and an aggregation process of the compressed data. According to this embodiment, the garbage collection process and the aggregation process of the compressed data operate asynchronously with the host write, and the write data is recompressed in the basic compression unit of the storage device, thereby improving the I / O performance in the host write of a size smaller than the basic compression unit.

[0024] First, an overview of the compression process will be explained using Fig. 1. In Fig. 1, the host 7 writes data A, data B, data C, and data D, and the storage device 6 compresses these data in basic compression units to generate compressed data abcd, which is then stored in the storage medium 5.

[0025] 1 shows the operation of the compression process S1 when the host 7 transmits updated write data E to the position of data B. When the storage device 6 receives the updated write data E from the host 7, the write data E is stored in the memory 4 in the storage controller 1 in the storage device 6.

[0026] Processor 2 recognizes that the size of the updated write data E is smaller than the basic compression unit, and instructs accelerator 3 to compress the updated write data E at the size. Accelerator 3 reads the updated write data E from memory 4, compresses it, and stores the compressed data e in memory 4. Processor 2 stores the compressed data e in storage medium 5. Here, processor 2 records in the management information that pre-write data B has become unnecessary data (called garbage).

[0027] Next, an overview of the garbage collection process S10 will be described with reference to Fig. 2. Fig. 2 shows how garbage data B recorded in the compression process S1 in Fig. 1 is deleted to free up space in the storage medium 5. The processor 2 reads compressed data abcd including garbage data B from the storage medium 5 and stores it in the memory 4.

[0028] Next, the processor 2 instructs the accelerator 3 to decompress the compressed data abcd. The accelerator 3 reads the compressed data abcd in the memory 4, decompresses it, and stores the data string ABCD in the memory 4. The processor 2 then writes zero data into the location of the garbage data B, updating it to a data string A0CD consisting of non-updated data A, B, D and 0 data.

[0029] The processor 2 instructs the accelerator 3 to compress the data string A0CD. The accelerator 3 reads the data string A0CD from the memory 4, compresses it, and stores the compressed data a0cd in the memory 4. After that, the processor 2 stores the compressed data a0cd in the storage medium 5, and deletes the compressed data abcd in the storage medium 5. In this way, the garbage B is deleted.

[0030] Finally, an overview of the compressed data aggregation process S30 will be described with reference to Fig. 3. Fig. 3 shows how the compressed data e and compressed data a0cd are aggregated and replaced with compressed data aecd in the basic compression unit, thereby maintaining a high data reduction effect.

[0031] The processor reads compressed data e and compressed data a0cd that have not been compressed in basic compression units from the storage medium 5, and stores them in the memory 4. The processor 2 instructs the accelerator 3 to decompress the compressed data e and compressed data a0cd. The accelerator 3 reads and decompresses the compressed data e and compressed data a0cd, and stores the data E and data string A0CD in the memory 4. Note that the instruction to decompress from the processor 2 to the accelerator 3 may be given in two increments.

[0032] The processor 2 merges the data E and the data string A0CD to generate a data string AECD, and instructs the accelerator 3 to compress it. The accelerator 3 reads the data string AECD, compresses it, and stores the compressed data aecd in the memory 4. The processor 2 stores the compressed data aecd in the storage medium 5, and deletes the compressed data e and compressed data a0cd in the storage medium 5.

[0033] The compression process S1, the garbage collection process S10, and the compressed data aggregation process S30 have been outlined above. The compression and decompression processes may be executed by the processor 2 instead of the accelerator 3. The storage device 6 of the first embodiment will now be described in detail.

[0034] FIG. 4 is a diagram illustrating an example of the configuration of the storage apparatus 6 of the first embodiment.

[0035] The storage device 6 is connected to a host 7 that provides a storage area via a network such as a SAN (Storage Area Network) or a LAN (Local Area Network). The host 7 is, for example, a personal computer or a smartphone.

[0036] The storage device 6 includes a storage controller 1 and a storage medium 5. The storage controller 1 executes processing in response to a command. The storage controller 1 includes a processor 2, an accelerator 3, a memory 4, and a host interface (I / F) 8. Each piece of hardware is connected to each other via an internal network.

[0037] The host I / F 8 is an interface for connecting to the host 7. The host I / F 8 executes transmission and reception processing of commands and data between the storage device 6 and the host 7. The processor 2 executes a program stored in the memory 4. The processor 2 of the first embodiment functions as an arithmetic unit or a control unit that executes various processes in response to commands.

[0038] The accelerator 3 executes compression and decompression processes in accordance with instructions from the processor 2. The accelerator 3 is hardware designed to be able to execute compression and decompression processes at high speed, and is implemented using, for example, an FPGA (Field Programmable Gate Array).

[0039] The memory 4 is a storage device such as a DRAM (Dynamic Random Access Memory) and stores the programs executed by the processor 2 and information used by the programs. The memory 4 is also used as a work area used by the programs. The memory 4 may be either a volatile memory or a non-volatile memory.

[0040] The memory 4 of this embodiment stores compressed data management information 10. The memory 4 also stores a program (not shown) that realizes a calculation unit or a control unit. Details of the compressed data management information 10 will be described with reference to FIG. 5.

[0041] The storage medium 5 is a non-volatile storage device. The storage medium 5 is, for example, a semiconductor storage device such as an SSD (Solid State Drive) or a hard disk drive. The storage medium 5 is connected to the storage controller 1 via an internal network, and executes a process of sending and receiving commands to and from the processor 2, and a process of sending and receiving data to and from the memory 4. The storage medium 5 is directly connected to the storage controller 1 via the internal network, but may also be connected to the storage controller 1 via an interface for a storage medium connected to the internal network.

[0042] 5 is a diagram showing an example of compressed data management information 10 according to the first embodiment. The compressed data management information 10 is information for managing compressed data. The compressed data management information 10 stores entries each consisting of a logical address 11, a physical address 12, a compressed data size 13, an offset within a logical address 14, a physical address for each offset 15, and a compressed data size for each offset 16. One entry holds a plurality of offsets within a logical address 14, physical addresses for each offset 15, and compressed data sizes for each offset 16. One entry corresponds to one piece of compressed data compressed in a basic compression unit.

[0043] The logical address 11 is a field that stores a logical address indicating the storage location of a data string in a volume provided to the host 7. The compression unit is managed by a logical address. For example, when the compression unit is 32 KB, 32 KB of data at consecutive logical addresses is compressed together. The combination of logical addresses that make up each compression unit is constant. The logical address 11 indicates the start address of the compression unit. The physical address 12 is a field that stores the address of the storage medium 5 indicating the storage location of the compressed data in the storage device 6. Here, the compressed data is data generated by the accelerator 3 compressing the data string.

[0044] The compressed data size 13 is a field that stores the data size of the compressed data. The data size of the compressed data depends on the size of the original data string and the value to be stored. Therefore, the size of each compressed data is generally different. In order to increase the data reduction effect, it is necessary to store the compressed data in the storage medium 5 without leaving any gaps. Therefore, the processor 2 uses the compressed data management information 10 to control the arrangement of the compressed data on the storage medium 5.

[0045] The logical address offset 14 is a field that stores a logical address indicating the storage position of the host write data unit in the compression unit before compression. The host write data unit is the minimum size of a host write, for example, 8 KB. The data length specified in one write command is an integer multiple of the data unit. In the following, the size of the write data means the host write data unit. The logical address offset 14 is position information of the difference when the first logical address is set to 0 when compressing in the basic compression unit. Note that the logical address offset 14 may store the logical address of the host write data unit instead of the difference.

[0046] The offset-specific physical address 15 is a field that stores an address on the storage medium 5 that indicates a storage location of compressed data compressed by the size of the host write data, rather than the basic compression unit. The offset-specific compressed data size 16 is a field that stores the data size of compressed data compressed by the size of the host write data.

[0047] In addition, the physical address 12 and the offset-specific physical address 15 may be, instead of the address of the storage medium 5, an address provided by the storage medium 5 to the storage controller 1, or an address of a RAID (Redundant Array of Inexpensive Disks) volume generated using multiple storage media 5, or an address of an external storage device 6 provided by a capacity virtualization mechanism.

[0048] Although the compressed data management information 10 is described in table format as one form, the format is not limited to a table as long as it can manage information required for the processing in the following embodiments.

[0049] FIG. 6 is a flowchart illustrating an example of the compression process executed by the processor 2 according to the first embodiment.

[0050] The processor 2 executes a compression process S1 when a write process is executed or periodically. The write process is executed when the storage device 6 receives write data from the host 7. Here, the compression process S1 is explained as being executed when the write process is executed. In the write process, the storage device 6 stores the write data in the memory 4 and transmits a completion notification of the write process to the host 7.

[0051] The processor 2 determines whether or not the size of the unprocessed portion of the write data stored in the memory 4 is smaller than the basic compression unit (step S2).

[0052] If the size of the unprocessed portion of the write data is smaller than the basic compression unit, the processor 2 instructs the accelerator 3 to compress the write data to the size of the write data (step S3).

[0053] After the accelerator 3 compresses the unprocessed portion of the write data and stores the compressed data in memory 4, the processor 2 refers to the physical address 12, compressed data size 13, physical address by offset 15, and compressed data size by offset 16 in the compressed data management information 10 to identify the end position (address) of the storage area in the storage medium 5 where the compressed data is stored, and determines this as the physical address of the storage destination of the compressed data on the memory 4 (step S4). In this way, the write data is added to the free area of ​​the storage medium 5.

[0054] Processor 2 updates the entry for the corresponding offset in logical address in compressed data management information 10. Specifically, processor 2 searches for corresponding offset in logical address 14 in compressed data management information 10 from the logical address of the write data, and stores the physical address determined in step S4 in offset-specific physical address 15 corresponding to the offset in logical address 14, and stores the size of the compressed data in memory 4 in offset-specific compressed data size 16 (step S5).

[0055] On the other hand, if it is determined in step S2 that the size of the unprocessed portion is not smaller than the basic compression unit, the processor 2 instructs the accelerator 3 to compress the portion in the basic compression unit (step S6).

[0056] The accelerator 3 reads data within the logical address range of the basic compression unit from the memory 4, among the unprocessed write data, compresses it, and stores the compressed data in the memory 4. The processor 2 executes the process described in step S4 for the compressed data stored in the memory 4, and determines the physical address of the storage destination.

[0057] The processor 2 updates the entry for the corresponding logical address in the compressed data management information 10. Specifically, the processor 2 searches for the corresponding logical address 11 in the compressed data management information 10 from the logical address of the write data, and stores the physical address determined in step S4 in the physical address 12 corresponding to the logical address 11, and stores the size of the compressed data on the memory 4 in the compressed data size 13 (step S7). The processor 2 stores "none" as an invalid value in the multiple physical addresses by offset 15 and the compressed data size by offset 16 corresponding to the logical address 11. Although "none" has been described as an example of an invalid value, other values ​​may be used as long as they can be distinguished from valid values.

[0058] Next, the processor 2 determines whether or not the write data has an unprocessed portion (step S8). If the write data has an unprocessed portion, the processor 2 executes the process of step S2. If the write data has no unprocessed portion, the compression process S1 ends.

[0059] This concludes the description of the process in step S1.

[0060] When the compression process S1 is executed periodically, the processor 2 executes the process explained in FIG. 6 for each data.

[0061] After executing the compression process S1, the processor 2 stores the compressed data at a determined address in the storage medium 5 at an arbitrary timing. For example, the compression process S1 and the storage process of the compressed data may be executed continuously, or the storage process of the compressed data may be executed periodically. When executing the storage process of the compressed data periodically, the processor 2 searches for the compressed data stored in the memory 4, and stores the searched compressed data in the storage medium 5.

[0062] 7 is a flowchart for explaining an example of garbage collection processing executed by the processor 2 of the embodiment 1. The garbage collection processing deletes compressed data in the storage medium 5 that is no longer referenced due to data update, and makes the storage area an unused area. The garbage collection processing S10 may be started when the compressed data becomes garbage as a result of the processor 2 receiving write data from the host 7, or may be executed periodically.

[0063] The processor 2 selects a physical address to be subjected to garbage collection (step S11). The physical addresses to be subjected to garbage collection are managed in management information (not shown). If a physical address containing more garbage is selected, the movement of compressed data, which will be described later, is reduced, and more physical addresses can be freed. Therefore, the processor 2 selects a physical address containing more garbage. For example, in the compression process S1, when the processor 2 updates the compressed data management information 10, the processor 2 obtains the compressed data size that will become garbage, calculates the amount of garbage for each physical address, and searches for and selects physical addresses with a large amount of garbage.

[0064] The processor 2 searches for an entry that matches the physical address selected in step S11 from the physical addresses 12 in the compressed data management information 10 (step S12). The processor 2 determines whether or not there is a matching entry (step S13). If there is a matching entry, the processor 2 determines whether or not a valid value is stored in any of the physical addresses 15 by offset in the entry (step S14).

[0065] If a valid value is not stored in the physical address 15 by offset, that is, if the processor 2 has not compressed write data of a size smaller than the basic compression unit and the compressed data corresponding to the logical address of the entry is only data compressed in the basic compression unit, the processor 2 executes the processing of step S4 described below.

[0066] On the other hand, if a valid value is stored in the physical address 15 by offset, the processor 2 reads the compressed data indicated by the physical address 12 of the entry from the storage medium 5, stores it in the memory 4, and instructs the accelerator 3 to decompress it (step S15).

[0067] After the accelerator 3 stores the decompressed data in the memory 4, the processor 2 rewrites the decompressed data in the memory 4 corresponding to the offset where the identified valid value is stored in step S14 to 0 data (step S16). This makes it possible to increase the data compression rate in the basic compression unit. Also, data shifting is not required when reading data. Note that 0 data is data with a high compression rate. It may be rewritten to specified data (bit string) different from 0 data. The specified data is data having a regularity with a high compression rate that is defined in advance. For example, it may be a bit string in which each bit indicates 1.

[0068] The processor 2 instructs the accelerator 3 to compress the data rewritten in step S16 in the basic compression unit (step S6). The accelerator 3 reads the data in the memory 4, compresses it, and stores the compressed data in the memory 4.

[0069] 6, and determines the physical address of the storage destination of the compressed data. The processor 2 stores the physical address determined in step S4 in the physical address 12 of the entry in the compressed data management information 10, and stores the size of the compressed data in the memory 4 in the compressed data size 13 (step S17).

[0070] The processor 2 releases the physical address determined in step S11, making the physical address available for other processes (step S18).

[0071] On the other hand, if there is no entry in step S13, the processor 2 searches the physical address 15 in the offset in the compressed data management information 10 for an entry that matches the physical address selected in step S11 (step S19).

[0072] Processor 2 determines whether or not there is a matching entry (step S20). If there is a matching entry, that is, if the data is compressed with the size of the host's write data, processor 2 executes the process of step S4. On the other hand, if there is no matching entry, that is, if the compressed data has become garbage due to the write update, processor 2 executes the process of step S18. This concludes the description of the process of step S10.

[0073] 8 is a flowchart illustrating an example of the aggregation process of compressed data executed by the processor 2 of the embodiment 1. The processor 2 periodically executes the aggregation process S30 of compressed data.

[0074] The processor 2 searches for the logical address 11 corresponding to an entry in which a valid value is stored in the physical address 15 by offset in the compressed data management information 10 (step S31). The processor 2 determines whether the logical address 11 is found as a result of the search (step S32).

[0075] If the logical address 11 is not found, the compressed data aggregation process S30 is terminated. On the other hand, if the logical address 11 is found, the processor 2 executes a merge process of the compressed data in the range corresponding to the logical address 11 (step S40). In this merge process, the processor 2 instructs to decompress the compressed data in the basic compression unit and the compressed data in the host write size, and merges these decompressed data and stores them in the memory 4. The details of this merge process will be described later with reference to FIG. 9.

[0076] The processor 2 executes the process described in step S6 with reference to FIG. 6, and causes the accelerator 3 to store in the memory 4 the compressed data for the merged data generated in step S40.

[0077] The processor 2 executes the process described in step S4 with reference to FIG. 6 to determine the physical address of the storage destination of the compressed data.

[0078] Then, for the entry searched for in step S31, processor 2 stores the physical address determined in step S4 in physical address 12, and stores the size of the compressed data stored in memory 4 in step S6 in compressed data size 13. Furthermore, processor 2 stores invalid values ​​in physical address by offset 15 and compressed data size by offset 16 in the entry (step S33). This concludes the description of the process in step S30.

[0079] FIG. 9 is a flowchart illustrating an example of the data merge process S40 within the logical address range executed by the processor 2 of the first embodiment.

[0080] The processor 2 reads the compressed data indicated by the physical address 12 for the entry to be processed in the compressed data management information 10 from the storage medium 5, stores the data in the memory 4, and instructs the accelerator 3 to decompress the data (step S41).

[0081] The accelerator 3 reads the compressed data in the memory 4 , decompresses it, and stores the decompressed data in the memory 4 .

[0082] The processor 2 determines whether or not there is a valid and unprocessed physical address 15 by offset in an entry in the compressed data management information 10 (step S42). If there is no valid and unprocessed physical address 15 by offset, the data merge process within the logical address range is terminated.

[0083] On the other hand, if there is a valid and unprocessed offset-specific physical address 15, the processor 2 reads the compressed data indicated by the offset-specific physical address 15 from the storage medium 5, stores it in the memory 4, and instructs the accelerator 3 to decompress it (step S43). The accelerator 3 reads the compressed data in the memory 4, decompresses it, and stores the decompressed data in the memory 4.

[0084] The processor 2 calculates the position information of the merge target in the decompressed data stored in the memory 4 based on the offset 14 in the logical address based on step S41, and merges the two compressed data by copying the decompressed data stored in the memory 4 to the calculated position based on the instruction of step S43 (step S44).

[0085] Then, the processor 2 executes the process of step S42.

[0086] This concludes the description of the process in step S40.

[0087] The above describes a method in which the storage device 6 that receives write data from the host 7 compresses the data based on the size of the write data. The storage device 6 re-compresses the data in basic compression units asynchronously with the host write, thereby improving the I / O performance in the host write.

[0088] In the above example, one of two compression units, compression using a basic compression unit or compression using a smaller data write unit, is selected to compress the update data received from the host. In another example, one compression unit may be selected from three or more compression units. For example, a compression unit of a size between the basic compression unit and the data write compression unit is prepared. For example, the basic compression unit is 32KB, the data write unit is 8KB, and the intermediate compression unit is 16KB. For example, a 16KB compression unit is used to compress 16KB of data, and a 16KB compression unit and an 8KB compression unit are used to compress 24KB of data. EXAMPLES

[0089] A garbage collection process removes garbage from the compressed data and compresses non-garbage data by front-filling it.

[0090] According to this embodiment, by combining data that is not garbage, repeated parts are created, and it is possible to improve I / O performance when the free space of the storage medium 5 is low.

[0091] The configuration of the storage device 6 of the second embodiment is the same as that of Fig. 6 in the first embodiment. Moreover, the compression process and the aggregation process of compressed data executed by the storage device 6 of the second embodiment are the same as the compression process S1 and the aggregation process S30 of compressed data in the first embodiment.

[0092] Fig. 10 is a flowchart for explaining an example of garbage collection processing for performing forward closing executed by the processor 2 of the embodiment 2. Here, detailed explanations of the same processing as in Fig. 7 of the embodiment 1 will be omitted.

[0093] The garbage collection process S50 that performs forward packing is started at the same time as the garbage collection process S10 in the embodiment 1. That is, the garbage collection process may be started when the compressed data becomes garbage as a result of the processor 2 receiving write data from the host 7, or may be executed periodically.

[0094] The processor 2 executes the processes described in steps S11, S12, S13, S14, and S15 of the first embodiment.

[0095] After step S15, the processor 2 generates a data string by concatenating only the decompressed data corresponding to the entry in the compressed data management information 10 in which an invalid value is stored in the offset-specific physical address 15, and stores the data string in the memory 4 (step S51).

[0096] The processor 2 instructs the accelerator 3 to compress the data strings linked in step S51 by their size (step S52). The accelerator 3 has a data compression function for the basic compression unit and the size of the write data, as well as for compression functions for sizes between them. For example, the basic compression unit is 32 KB, the minimum unit of write data is 8 KB, and the accelerator 3 has a compression function for both 16 KB and 24 KB.

[0097] After step S52, the processor 2 executes the processes described in steps S4, S17, and S18 of the first embodiment.

[0098] Moreover, if there is no entry in step S13, the processor 2 executes the processes described in steps S19 and S20 in the first embodiment.

[0099] This concludes the description of the process in step S50.

[0100] As described above, in the garbage collection process executed by the storage device 6, by combining and recompressing only non-garbage data, repeated parts across the combined data are generated, and the compression efficiency may be improved. This reduces the amount of physical addresses newly secured in the garbage collection, thereby improving I / O performance when the free space of the storage medium 5 is low. The compression process of the update data from the host may be selected from the basic compression unit and the unit of write data, as well as a compression unit between them. This allows the data length of the update data to be compressed at that data length even if it is shorter than the basic compression unit. For example, in addition to the basic compression unit of 32 KB and the write data unit of 8 KB, update data of 24 KB or 16 KB can be compressed together. EXAMPLES

[0101] A form in which garbage collection processing overwrites garbage portions in compressed data with data after host write and compresses them will be described.

[0102] According to this embodiment, the garbage collection process includes the compressed data aggregation process S30, so that the amount of garbage created can be reduced, and the I / O performance can be improved when the free space on the storage medium 5 is low.

[0103] The configuration of the storage device 6 of the third embodiment is the same as that of Fig. 6 in the first embodiment. Moreover, the compression process and the aggregation process of compressed data executed by the storage device 6 of the third embodiment are the same as the compression process S1 and the aggregation process S30 of compressed data in the first embodiment.

[0104] Fig. 11 is a flowchart for explaining an example of garbage collection processing for implementing data aggregation executed by the processor 2 of the embodiment 3. Here, detailed explanations of the same processing as in Fig. 7 of the embodiment 1 will be omitted.

[0105] The garbage collection process S60 for carrying out data aggregation is executed periodically because step S60 includes data aggregation processing, and if it is executed upon receiving write data from the host 7, the effect of improving the I / O performance of host writes cannot be obtained.

[0106] The processor 2 executes the processes described in steps S11, S12, S13, and S14 of the first embodiment.

[0107] In step S14, if a valid value is stored in the offset-specific physical address 15, the processor 2 specifies the entry searched for in step S12 and executes the process of step S40. As a result, the compressed data corresponding to the physical address 12 of the entry and the data decompressed from the compressed data corresponding to the offset-specific physical address 15 are merged and stored in the memory 4.

[0108] Subsequently, the processor 2 executes the processes described in steps S6 and S4 with reference to FIG.

[0109] Then, for that entry in the compressed data management information 10, the processor 2 stores the physical address determined in step S4 in the physical address 12 and stores the size of the compressed data generated in step S6 in the compressed data size 13. Furthermore, the processor 2 stores invalid values ​​in the offset-specific physical address 15 and offset-specific compressed data size 16 in that entry (step S61).

[0110] Thereafter, the processor 2 executes the process described in step S18 with reference to FIG.

[0111] Moreover, if there is no entry in step S13, the processor 2 executes the processes described in steps S19 and S20 in the first embodiment.

[0112] This concludes the description of the process in step S60.

[0113] As described above, by performing the garbage collection process executed by the storage device 6 to aggregate compressed data, it is possible to reduce the amount of garbage created and improve I / O performance when the free space of the storage medium 5 is low. EXAMPLES

[0114] A mode in which the compression process switches the compression unit depending on the usage status of the storage medium 5 will be described.

[0115] In the compression process S1 and the compressed data aggregation process S30 in the first embodiment, new compressed data is generated to make part or all of the original compressed data garbage. As a result, the amount of garbage generated in the first embodiment is greater than the example of the operation assumed as the compression process described above. If the free space of the storage medium 5 is less than the amount of garbage generated by the compression process S1 and the compressed data aggregation process S30 in the first embodiment, the free space of the storage medium 5 may be insufficient only by the process described in the first embodiment.

[0116] According to this embodiment, when the free space on the storage medium 5 is less than the threshold value, compression is performed only in basic compression units, which has the effect of suppressing the reduction in free space on the storage medium 5 due to host writes.

[0117] The configuration of the storage device 6 of the fourth embodiment is the same as that of Fig. 6 in the first embodiment. Moreover, the garbage collection process and the compressed data aggregation process executed by the storage device 6 of the second embodiment are the same as the garbage collection process S10 and the compressed data aggregation process S30 in the first embodiment.

[0118] Fig. 12 is a flowchart for explaining an example of a compression process for switching the compression unit executed by the processor 2 according to the embodiment 4. Here, detailed explanations of the same processes as those in Fig. 6 according to the embodiment 1 will be omitted.

[0119] The compression process S70 for switching the compression unit is started at the same timing as the compression process S1 in the embodiment 1. That is, the processor 2 executes the compression process when executing the write process or periodically.

[0120] The processor 2 executes the process described in step S2 of the first embodiment.

[0121] If the size of the unprocessed portion of the write data is smaller than the basic compression unit, the processor 2 judges whether the free space of the storage medium 5 is equal to or smaller than a threshold (step S71). Here, the threshold may be a fixed value set in advance in the product design, or a value set by the user of the storage device 6 while the storage device 6 is in use. The judgment in step S71 may be whether the speed at which the physical addresses of the storage medium 5 are released by the garbage collection process S10 is lower than the write speed of the host 7, and whether the free space of the storage medium 5 will decrease in the future and the storage medium 5 will be unable to accept write data from the host 7. For example, this judgment may be made by a method in which the free space of the storage medium 5 is judged to be equal to or smaller than the threshold by the garbage amount continuing to increase based on the transition of the garbage amount in the LUN.

[0122] In step S71, if the free space of the storage medium 5 is equal to or less than the threshold, the processor 2 reads compressed data including the write data from the storage medium 5, stores it in the memory 4, and instructs the accelerator 3 to decompress it. The accelerator 3 reads the compressed data in the memory 4, decompresses it, and stores the decompressed data in the memory 4. The processor 2 merges the decompressed data and the write data by overwriting the decompressed data in the memory 4 with the write data (step S72).

[0123] The processor 2 instructs the accelerator 3 to compress the data generated in step S72 in the basic compression unit (step S73).

[0124] The accelerator 3 reads the data in the memory 4 , compresses it, and stores the compressed data in the memory 4 .

[0125] Thereafter, the processor 2 executes the processes described in steps S4, S7, and S8 of the first embodiment.

[0126] On the other hand, if the free space of the storage medium 5 is not equal to or less than the threshold in step S71, the processor executes the processes described in steps S3, S4, and S5 in the first embodiment.

[0127] If the size of the unprocessed portion of the write data is not less than the basic compression unit in step S2, the processor 2 executes the processes described in steps S6, S4, S7, and S8 in the first embodiment. This concludes the description of the process in step S70.

[0128] As described above, in the compression process executed by the storage device 6, when the free space on the storage medium 5 is low, compression is performed only in basic compression units, thereby making it possible to suppress a reduction in the free space on the storage medium 5 due to host write when the free space on the storage medium 5 is so low that the storage medium 5 cannot store the garbage generated in the compression process S1 and the compressed data aggregation process S30 of Example 1.

[0129] The present invention is not limited to the above-mentioned embodiment, but includes various modified examples. For example, the above-mentioned embodiment has been described in detail to clearly explain the present invention, and is not necessarily limited to those including all of the configurations described. It is also possible to replace a part of the configuration of one embodiment with the configuration of another embodiment, and it is also possible to add the configuration of another embodiment to the configuration of one embodiment. It is also possible to add, delete, or replace a part of the configuration of each embodiment with another configuration.

[0130] In addition, the above-mentioned configurations, functions, processing units, etc. may be realized in part or in whole by hardware, for example, by designing them as integrated circuits. In addition, the above-mentioned configurations, functions, etc. may be realized in software by a processor interpreting and executing a program that realizes each function. Information such as the program, table, file, etc. that realizes each function can be stored in a memory, a recording device such as a hard disk or SSD (Solid State Drive), or a recording medium such as an IC card or SD card.

[0131] In addition, the control lines and information lines shown are those that are considered necessary for the explanation, and not all control lines and information lines in the product are necessarily shown. In reality, it can be considered that almost all components are connected to each other. [Explanation of symbols]

[0132] 1...storage controller, 2...processor, 3...accelerator, 4...memory, 5...storage medium, 6...storage device, 7...host, 8...host I / F, 10...compressed data management information, 11...logical address, 12...physical address, 13...compressed data size, 14...offset within logical address, 15...physical address by offset, 16...compressed data size by offset

Claims

1. A storage device having a data compression function, Processor and an accelerator for performing compression and decompression of data; The processor receives first updated write data of a part of a first logical address area for first compressed data of the first logical address area compressed in a basic compression unit, The processor instructs the accelerator to compress the first update write data at a size smaller than the basic compression unit, The accelerator compresses the first updated write data in the small size; The processor merges the non-updated data in the first logical address area decompressed by the accelerator and the first updated write data to generate uncompressed data of the basic compression unit; The processor instructs the accelerator to compress the uncompressed data in the basic compression unit.

2. 2. The storage device according to claim 1, The processor executes a garbage collection process for deleting compressed data that is no longer referenced due to data updates and creating an unused area; The processor performs the garbage collection process before the merging; The garbage collection process instructing the accelerator to decompress the first compressed data; In the decompressed first compressed data, the part of the data in the first logical address area is rewritten to a specified bit pattern; The storage device instructs the accelerator to compress the rewritten first compressed data in the basic compression unit.

3. 2. The storage device according to claim 1, The processor executes a garbage collection process for deleting compressed data that is no longer referenced due to data updates and creating an unused area; The processor performs the garbage collection process before the merging; The garbage collection process causing the accelerator to decompress the first compressed data; Concatenating the non-updated data of the decompressed first compressed data; The storage device instructs the accelerator to compress the concatenated non-updated data to a size of the concatenated non-updated data.

4. 2. The storage device according to claim 1, The processor executes a garbage collection process for deleting compressed data that is no longer referenced due to data updates and creating an unused area; The processor performs the merging during the garbage collection process; The garbage collection process instructing the accelerator to decompress the first compressed data and the first updated write data; rewriting the part of the first logical address area in the decompressed first compressed data with the first updated write data; The storage device instructs the accelerator to compress the rewritten first compressed data in the basic compression unit.

5. 2. The storage device according to claim 1, The storage device further includes a storage medium; The processor, When the free space of the storage medium is larger than a threshold value, instructing the accelerator to compress the first update write data at a size smaller than the basic compression unit; When the free space of the storage medium is equal to or less than the threshold value, instructing the accelerator to decompress the first compressed data; updating the decompressed first compressed data with the first updated write data; The storage device instructs the accelerator to compress the updated first compressed data in the basic compression unit.

6. 1. A data processing method for storing compressed data on a storage medium, comprising the steps of: receiving first updated write data of a part of a first logical address area for first compressed data of the first logical address area compressed in a basic compression unit; compressing the first updated write data to a size smaller than the basic compression unit; Decompressing and merging the compressed non-updated data and the compressed first updated write data in the first logical address area to generate uncompressed data of the basic compression unit; The data processing method further comprises compressing the uncompressed data in the basic compression unit.

7. 7. A data processing method according to claim 6, comprising: A garbage collection process is performed before the merging, in which compressed data that is no longer referenced due to data updates is deleted to create unused space; The garbage collection process Decompressing the first compressed data; In the decompressed first compressed data, the part of the data in the first logical address area is rewritten to a specified bit pattern; the rewritten first compressed data is compressed in the basic compression unit.

8. 7. A data processing method according to claim 6, comprising: A garbage collection process is performed before the merging, in which compressed data that is no longer referenced due to data updates is deleted to create unused space; The garbage collection process Decompressing the first compressed data; Concatenating the non-updated data of the decompressed first compressed data; A data processing method comprising: compressing the concatenated non-updated data by a size of the concatenated non-updated data.

9. 7. A data processing method according to claim 6, comprising: Execute garbage collection to delete compressed data that is no longer referenced due to data updates and create unused space. The garbage collection process Including said merging, decompressing the first compressed data and the first updated write data; rewriting the part of the first logical address area in the decompressed first compressed data with the first updated write data; the rewritten first compressed data is compressed in the basic compression unit.

10. 7. A data processing method according to claim 6, comprising: When the free space of the storage medium is larger than a threshold value, the first updated write data is compressed to a size smaller than the basic compression unit; When the free space of the storage medium is equal to or less than the threshold value, Decompressing the first compressed data; updating the decompressed first compressed data with the first updated write data; a data processing method for compressing the updated first compressed data in the basic compression unit;

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