Semiconductor device and power conversion apparatus
Patent Information
- Application Number
- JP2023129544
- Authority / Receiving Office
- JP · JP
- Patent Type
- Applications
- Current Assignee / Owner
- Filing Date
- 2023-08-08
- Publication Date
- 2025-10-07
Smart Images
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Abstract
Description
[Technical field]
[0001] The disclosure herein relates to semiconductor devices and power conversion devices. [Background technology]
[0002] 1 to 3, Patent Document 1 discloses a module in which snubber circuits are adjacent to both a semiconductor element constituting an upper arm and a semiconductor element constituting a lower arm. The snubber circuit is arranged alongside both semiconductor elements in a direction perpendicular to the direction in which the semiconductor elements of the upper arm and the lower arm are arranged. [Prior art documents] [Patent documents]
[0003] [Patent Document 1] JP 2015-207739 A Summary of the Invention [Problem to be solved by the invention]
[0004] In the module of Patent Document 1, the snubber circuit faces both semiconductor elements and is therefore susceptible to the effects of heat radiation from both semiconductor elements.
[0005] An object of the disclosure in this specification is to provide a semiconductor device and a power conversion device that attempt to suppress the thermal effect of a semiconductor element on a snubber circuit. [Means for solving the problem]
[0006] The various aspects disclosed in this specification employ different technical means to achieve their respective objectives. The reference symbols in parentheses in the claims and in this section are merely examples showing the corresponding relationship with the specific means described in the embodiments described below as one aspect, and do not limit the technical scope.
[0007] One of the disclosed semiconductor devices includes a first semiconductor element (30H) forming an upper arm (9H), a second semiconductor element (30L) provided in parallel with the first semiconductor element and forming a lower arm (9L), and a snubber circuit component (40) forming a snubber circuit (13) connected in parallel with the upper arm and the lower arm, The snubber circuit component is provided adjacent to a semiconductor element group in which a first semiconductor element and a second semiconductor element are arranged side by side in an element arrangement direction in which the first semiconductor element and the second semiconductor element are arranged side by side. Also, one of the disclosed power conversion devices includes the above-mentioned semiconductor device and a smoothing capacitor.
[0008] This semiconductor device provides a snubber circuit component that is adjacent to one of a first semiconductor element and a second semiconductor element that are arranged side by side but not adjacent to the other. This makes it possible to suppress the thermal effect of the other of the semiconductor elements that constitute the upper and lower arms on the snubber circuit. This semiconductor device can suppress the thermal effect of the semiconductor elements on the snubber circuit. Furthermore, a power conversion device that can suppress the thermal effect of the semiconductor elements on the snubber circuit can be provided by using this semiconductor device. [Brief description of the drawings]
[0009] [Figure 1] 1 is a circuit diagram of a power conversion device according to a first embodiment. [Diagram 2] FIG. 1 is a plan view illustrating a configuration of a semiconductor device. [Diagram 3] 1 is a cross-sectional view showing a configuration of a portion of a semiconductor device; [Figure 4] 4 is a plan view showing the positional relationship between the semiconductor elements and snubber circuits of the upper and lower arms. FIG. [Diagram 5] 4 is a plan view showing the positional relationship between the semiconductor elements and snubber circuits of the upper and lower arms. FIG. [Figure 6] 4 is a plan view showing the positional relationship between the semiconductor elements and snubber circuits of the upper and lower arms. FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS
[0010] Hereinafter, a number of embodiments for carrying out the present disclosure will be described with reference to the drawings. In each embodiment, the same reference numerals may be used to designate parts corresponding to matters described in the preceding embodiment, and duplicated descriptions may be omitted. In each embodiment, when only a part of the configuration is described, other embodiments described previously may be applied to other parts of the configuration. In addition to combinations of parts that are specifically indicated as being possible in each embodiment, it is also possible to partially combine embodiments even if not indicated, as long as there is no particular problem with the combination.
[0011] First embodiment A first embodiment disclosing an example of a power conversion device will be described with reference to Figs. 1 to 6. Application examples of the power conversion device are as follows. The power conversion device can be applied to an on-board power conversion device mounted on vehicles such as electric cars, hybrid cars, and plug-in hybrid cars. The power conversion device can also be mounted on flying objects such as electric vertical take-off and landing aircraft and drones, ships, construction machinery, agricultural machinery, and the like. An example in which the power conversion device is applied to a vehicle will be described below.
[0012] As shown in FIG. 1, a vehicle drive system 1 includes a DC power supply 2, a motor generator 3, and a power conversion device 4. The DC power supply 2 is a DC voltage source constituted by a chargeable and dischargeable secondary battery. The secondary battery is, for example, a lithium ion battery, a nickel-metal hydride battery, or the like. The motor generator 3 is, for example, a three-phase AC rotating electric machine. The motor generator 3 functions as a drive source for the vehicle, that is, an electric motor. The motor generator 3 functions as a generator during regeneration. The power conversion device 4 performs power conversion between the DC power supply 2 and the motor generator 3.
[0013] The power conversion device 4 includes a power conversion circuit. As shown in Fig. 1, the power conversion device 4 includes a smoothing capacitor 5 and an inverter 6 which is a power conversion circuit. The smoothing capacitor 5 mainly has a function of smoothing the DC voltage supplied from the DC power supply 2. The smoothing capacitor 5 is connected to a P line 7 which is a power supply line on the high potential side and an N line 8 which is a power supply line on the low potential side.
[0014] The smoothing capacitor 5 is connected in parallel to the DC power supply 2. The P line 7 is connected to the positive terminal of the DC power supply 2. The N line 8 is connected to the negative terminal of the DC power supply 2. The positive terminal of the smoothing capacitor 5 is connected to the P line 7 between the DC power supply 2 and the inverter 6. The negative terminal of the smoothing capacitor 5 is connected to the N line 8 between the DC power supply 2 and the inverter 6. The P line 7 includes a plurality of P bus bars that connect electric components to each other. The N line 8 includes a plurality of N bus bars that connect electric components to each other.
[0015] The inverter 6 is a DC-AC conversion circuit. The inverter 6 converts a DC voltage into a three-phase AC voltage in accordance with switching control by a control circuit provided on the control circuit board, and outputs the voltage to the motor generator 3. This operation drives the motor generator 3 to generate a predetermined torque. During regenerative braking of the vehicle, the inverter 6 converts the three-phase AC voltage generated by the motor generator 3 upon receiving rotational force from the wheels into a DC voltage in accordance with switching control of the control circuit. The converted DC power is output to the P line 7. In this way, the inverter 6 performs bidirectional power conversion between the DC power source 2 and the motor generator 3.
[0016] The control circuit of the switching element generates a drive command for operating the MOSFET 11 and outputs it to the drive circuit. The control circuit generates the drive command based on, for example, a torque request input from a higher-level ECU and signals detected by various sensors. ECU is an abbreviation for Electronic Control Unit. The various sensors include, for example, a current sensor, a rotation angle sensor, and a voltage sensor. The current sensor detects the phase current flowing through the winding 3a of each phase. The rotation angle sensor detects the rotation angle of the rotor of the motor generator 3. The voltage sensor detects the voltage across the smoothing capacitor 5. The control circuit outputs, for example, a PWM signal as the drive command. The control circuit is configured to include, for example, a processor and a memory. PWM is an abbreviation for Pulse Width Modulation.
[0017] The inverter 6 includes upper and lower arm circuits 9 corresponding to each of the three phases. The upper and lower arm circuits 9 are sometimes referred to as legs. The upper and lower arm circuits 9 include an upper arm 9H and a lower arm 9L. The upper arm 9H and the lower arm 9L are connected in series between the P line 7 and the N line 8, with the upper arm 9H on the P line 7 side and the lower arm 9L on the N line 8 side.
[0018] A connection point between the upper arm 9H and the lower arm 9L is connected to the winding 3a of the corresponding phase in the motor generator 3 via an output line 10. Of the upper and lower arm circuits 9, the U-phase upper and lower arm circuit 9U is connected to the U-phase winding 3a via a corresponding output line 10. The V-phase upper and lower arm circuit 9V is connected to the V-phase winding 3a via a corresponding output line 10. The W-phase upper and lower arm circuit 9W is connected to the W-phase winding 3a via a corresponding output line 10. At least a portion of the output line 10 is formed of a conductive member such as a bus bar.
[0019] The inverter 6 has six arms. Each arm is equipped with a switching element. The number of switching elements constituting each arm is not particularly limited. There may be one or more. When there are more than one switching elements, the multiple switching elements connected in parallel to each other are turned on and off at the same timing by a common gate drive signal.
[0020] In this specification, an n-channel MOSFET 11 is adopted as a switching element constituting each arm. MOSFET is an abbreviation for Metal Oxide Semiconductor Field Effect Transistor. In the upper arm 9H, the drain of the MOSFET 11 is connected to a P line 7. In the lower arm 9L, the source of the MOSFET 11 is connected to an N line 8. The source of the MOSFET 11 in the upper arm 9H and the drain of the MOSFET 11 in the lower arm 9L are connected to each other.
[0021] A freewheeling diode 12 is connected in anti-parallel to each of the MOSFETs 11. The diode 12 may be a parasitic diode of the MOSFET 11 or may be provided separately from the parasitic diode. The anode of the diode 12 is connected to the source of the corresponding MOSFET 11. The cathode of the diode 12 is connected to the drain.
[0022] The switching element is not limited to the MOSFET 11. An IGBT may be used as the switching element. IGBT is an abbreviation for Insulated Gate Bipolar Transistor. In the case of an IGBT, a freewheeling diode is also connected in inverse parallel.
[0023] The inverter 6 includes a snubber circuit 13 in addition to the upper and lower arm circuits 9 described above. The snubber circuit 13 absorbs a transient high voltage that occurs during switching, a so-called switching surge. This enables high-speed switching. The snubber circuit 13 may be provided individually for each of the upper and lower arm circuits 9 and connected in parallel to the corresponding upper and lower arm circuits 9.
[0024] The snubber circuit 13 has at least a capacitor 131. The snubber circuit 13 may be, for example, a C snubber circuit having the capacitor 131, or an RC snubber circuit having the capacitor 131 and a resistor 132 as shown in Fig. 1. The snubber circuit 13 may also be an RCD snubber circuit having the capacitor 131, the resistor 132, and a diode.
[0025] Fig. 2 is a plan view showing the configuration of an example of a semiconductor device. Fig. 3 is a view showing a cross section of a part of the semiconductor device. In the following, the thickness direction of the substrate is defined as the Z direction, and one direction perpendicular to the Z direction is defined as the Y direction. The direction perpendicular to both the Z direction and the Y direction is defined as the X direction. Unless otherwise specified, a shape viewed in a plane along the Z direction, in other words, a shape along the XY plane defined by the X direction and the Y direction, is defined as a planar shape. Also, a planar view in a direction along the Z direction may be simply referred to as a planar view.
[0026] As shown in Fig. 2, the semiconductor device 21 includes upper and lower arm circuits 9, snubber circuit components 40, and a housing 60. As shown in Fig. 3, the semiconductor device 21 may include a cooler 70. The semiconductor device 21 constitutes the power conversion device 4 together with a capacitor device that provides the smoothing capacitor 5, an input terminal block, an output terminal block, and the like. The semiconductor device 21 may be configured to be housed in a case that forms the outer casing of the power conversion device 4 together with other elements such as the capacitor device.
[0027] The semiconductor device 21 includes a first semiconductor element 30H forming the upper arm 9H and a second semiconductor element 30L forming the lower arm 9L. The first semiconductor element 30H and the second semiconductor element 30L form a semiconductor element group arranged side by side in the element arrangement direction. The element arrangement direction corresponds to the Y direction in each drawing. The semiconductor device 21 includes a snubber circuit component 40 arranged adjacent to the semiconductor element group in the element arrangement direction. The snubber circuit component 40 includes a snubber circuit 13 connected in parallel to the upper arm 9H and the lower arm 9L. The snubber circuit component 40 is formed of, for example, a thin-film element.
[0028] The first semiconductor element 30H forms a flat outer shell and includes a plurality of semiconductor elements 30 contained inside the shell. The second semiconductor element 30L forms a flat outer shell and includes a plurality of semiconductor elements 30 contained inside the shell. The "plurality" here means two or more. The number of semiconductor elements 30 included in each of the first semiconductor element 30H and the second semiconductor element 30L is not particularly limited. There may be one each, or there may be multiple each. The multiple semiconductor elements 30 are connected in parallel to provide the MOSFET 11 of one phase arm. The multiple semiconductor elements 30 are lined up in the X direction.
[0029] The flat outer shell is, for example, a thin plate or a thin film. Each semiconductor element 30 is provided in such a manner that the thickness direction, which is the minimum dimension length direction, is perpendicular to the element arrangement direction. The thickness direction is the plate thickness direction of the thin plate, and corresponds to the Z direction. The multiple semiconductor elements 30 included in the first semiconductor element 30H are arranged in a direction in which the flat maximum surface is perpendicular to both the element arrangement direction and the thickness direction. The multiple semiconductor elements 30 included in the second semiconductor element 30L are arranged in a direction in which the flat maximum surface is perpendicular to both the element arrangement direction and the thickness direction. As shown in FIG. 2, the multiple semiconductor elements are arranged in the X direction. In contrast, in the case of a configuration in which the first semiconductor element and the second semiconductor element are arranged in the X direction, the current of the path with the shortest distance among the multiple current paths formed between the snubber circuit and the semiconductor elements becomes large, causing an imbalance. According to the configuration of this specification, for example, as shown in FIG. 2, multiple current paths formed between the snubber circuit and the semiconductor elements can be formed in a balanced manner.
[0030] The semiconductor element 30 is formed by forming a vertical element on a semiconductor substrate made of silicon (Si) or a wide band gap semiconductor having a wider band gap than silicon. Examples of wide band gap semiconductors include silicon carbide (SiC), gallium nitride (GaN), gallium oxide (Ga2O3), and diamond. The semiconductor element 30 may be called a power element, a semiconductor chip, or the like.
[0031] The vertical element is configured to pass a main current in the plate thickness direction of the semiconductor element 30. The semiconductor element 30 is arranged so that the plate thickness direction is along the Z direction. The semiconductor element 30 has main electrodes on both sides in the plate thickness direction. The semiconductor element 30 of this embodiment is formed by forming an n-channel MOSFET 11 as a vertical element on a semiconductor substrate made of SiC. The semiconductor element 30 has a drain electrode on one plate-like surface and a source electrode on the other plate-like surface as main electrodes.
[0032] When the MOSFET 11 is turned on, a current flows between the main electrodes, that is, between the drain electrode and the source electrode. When the diode 12 is a parasitic diode, the source electrode also serves as the anode electrode, and the drain electrode also serves as the cathode electrode. The drain electrode is a main electrode on the high potential side, and the source electrode is a main electrode on the low potential side. The semiconductor element 30 has a rectangular shape when viewed in a plane in the Z direction.
[0033] As shown in FIG. 3, the first semiconductor element 30H and the second semiconductor element 30L are disposed at approximately the same height in the Z direction. The multiple semiconductor elements 30 included in the first semiconductor element 30H are disposed in the same orientation so that the drain electrodes are on the P wiring 511 side. The multiple semiconductor elements 30 included in the first semiconductor element 30H are disposed in the same orientation so that the source electrodes are on the opposite side to the P wiring 511. The multiple semiconductor elements 30 included in the second semiconductor element 30L are disposed in the same orientation so that the drain electrodes are on the O wiring 531 side. The multiple semiconductor elements 30 included in the second semiconductor element 30L are disposed in the same orientation as the multiple semiconductor elements 30 included in the first semiconductor element 30H so that the source electrodes are on the N wiring 521 side.
[0034] The semiconductor device 21 includes a P terminal 51 connected to the drain electrode of the first semiconductor element 30H via a P wiring 511. The semiconductor device 21 includes an N terminal 52 connected to the source electrode of the second semiconductor element 30L via an N wiring 521. The P terminal 51 is an external connection terminal electrically connected to a P line 7. The P terminal 51 is electrically connected to the positive terminal of the smoothing capacitor 5. The N terminal 52 is an external connection terminal electrically connected to an N line 8. The N terminal 52 is electrically connected to the negative terminal of the smoothing capacitor 5.
[0035] The P wiring 511 is formed of one wiring board. The N wiring 521 is formed of one wiring board. The P terminal 51 is an end of the P wiring 511 formed of one wiring board. The P terminal 51 is shaped to protrude from the snubber circuit component 40 on the opposite side to the semiconductor element group in the element arrangement direction. The N terminal 52 is an end of the N wiring 521 formed of one wiring board. The N terminal 52 is shaped to protrude from the snubber circuit component 40 on the opposite side to the semiconductor element group in the element arrangement direction. The P wiring board and the N wiring board shown in FIG. 3 are provided at positions shifted from each other in the thickness direction of the first semiconductor element, which is perpendicular to the element arrangement direction and is the minimum dimension length direction.
[0036] The P wiring 511 is connected to the drain electrode of the first semiconductor element 30H. The P wiring 511 electrically connects the drain electrode of the first semiconductor element 30H and the P terminal 51. The P wiring 511 is connected to the positive electrode part of the snubber circuit 13 included in the snubber circuit component 40. The P wiring 511 electrically connects the positive electrode part of the snubber circuit 13 and the P terminal 51. The P wiring 511 may be referred to as a positive wiring, a high potential power supply wiring, or the like.
[0037] The source electrode of the second semiconductor element 30L is electrically connected to the N wiring 521. The N wiring 521 electrically couples the source electrode of the second semiconductor element 30L and the N terminal 52. The N wiring 521 is connected to the negative electrode part of the snubber circuit 13 included in the snubber circuit component 40. The N wiring 521 may be referred to as a negative wiring, a low potential power supply wiring, or the like.
[0038] The O terminal 53 is an external connection terminal electrically connected to the output line 10. The O terminal 53 is electrically connected to the winding 3a of the opposing phase of the motor generator 3. The O terminal 53 may be referred to as an output terminal, an AC terminal, or the like. The O wiring 531 is formed of a single wiring board. The O terminal 53 is an end of the O wiring 531 formed of a single wiring board. The O terminal 53 is shaped to protrude on the opposite side of the snubber circuit component 40 with respect to the second semiconductor element 30L in the element arrangement direction. The O terminal 53 protrudes on the opposite side of the P terminal 51 and the N terminal 52 in the semiconductor device 21. The O wiring 531 is connected to the drain electrode of the second semiconductor element 30L. The O wiring 531 electrically connects the source electrode of the second semiconductor element 30L and the N terminal 52.
[0039] The O wiring 532 is formed by one wiring plate. The O wiring 532 is connected to the source electrode of the first semiconductor element 30H. As shown in FIG. 3, the P wiring 511 and the O wiring 531 are disposed at substantially the same height in the Z direction. The P wiring 511 and the O wiring 531 are formed so as to overlap in the element arrangement direction. As shown in FIG. 3, the N wiring 521 and the O wiring 532 are disposed at substantially the same height in the Z direction. The N wiring 521 and the O wiring 532 are formed so as to overlap in the element arrangement direction. The O wiring 532 electrically connects the source electrode of the first semiconductor element 30H and the O wiring 531. The O wiring 531 may be referred to as an output wiring or the like.
[0040] 3, the O wiring 531 and the O wiring 532 are electrically connected by a height adjustment member 81. The height adjustment member 81 is a conductive member for offsetting the height position of the O wiring 531 and the height position of the O wiring 532 in the Z direction.
[0041] The signal terminal 54 has a shape that protrudes from the second semiconductor element 30L on the opposite side to the snubber circuit component 40 in the element arrangement direction. The signal terminal 54 protrudes on the same side as the O-terminal 53 in the semiconductor device 21, and on the opposite side to the P-terminal 51 and the N-terminal 52. The signal terminal 54 is connected to a pad of the first semiconductor element 30H via a signal wiring.
[0042] The signal terminal 55 has a shape that protrudes from the second semiconductor element 30L on the opposite side to the snubber circuit component 40 in the element arrangement direction. The signal terminal 55 protrudes on the same side as the O-terminal 53 in the semiconductor device 21, and on the opposite side to the P-terminal 51 and the N-terminal 52. The signal terminal 55 is connected to a pad of the second semiconductor element 30L via a signal wiring.
[0043] Each signal terminal electrically connects the semiconductor element 30 to the control circuit board. Each signal terminal is electrically connected to a pad of the semiconductor element 30 via a connection member such as a bonding wire. The signal terminal may include at least a terminal for applying a drive voltage to the gate electrode of the semiconductor element 30. The signal terminal may include a terminal for detecting a source potential of the semiconductor element 30. The signal terminal may include a terminal for detecting a drain potential of the semiconductor element 30. The signal terminal may include a terminal for detecting a temperature of the semiconductor element 30.
[0044] The snubber circuit component 40 includes at least a capacitor as an electronic component, and provides the snubber circuit 13 shown in Fig. 1. The snubber circuit 13 is an RC snubber circuit. The snubber circuit 13 includes a capacitor 131 and a resistor 132.
[0045] As shown in FIG. 3, the semiconductor device 21 is disposed on one surface of the cooler 70 in the Z direction. The semiconductor device 21 is fixed to the cooler 70. The cooler 70 is in close contact with a heat sink 61, which is a member that promotes heat dissipation. An insulating member 62 is interposed between the heat sink 61 and the N wiring 521 and the O wiring 532. The insulating member 62 is a sheet-like member, grease, gel-like substance, or the like, formed of an insulating material. As an example, the components other than the cooler 70 and the heat sink 61 shown in FIG. 2 are covered by the housing 60.
[0046] The housing 60 is formed using an electrically insulating material such as resin. The housing 60 may be, for example, a resin molded body. The housing 60 may hold some of the components of the semiconductor device 21. Some of the components of the semiconductor device 21 may be integrally molded with the housing 60 as an insert part. The housing 60 may be fixed to the case of the power conversion device 4 together with the cooler 70. The housing 60 may be formed of, for example, gel or potting resin.
[0047] The positional relationship between the snubber circuit component 40 in this specification and the semiconductor element group including the first semiconductor element 30H and the second semiconductor element 30L will be described with reference to Figures 4 to 6. Figures 4 to 6 show views of the semiconductor device 21 viewed from above in the thickness direction of the semiconductor element 30.
[0048] In Fig. 4, the extension lines of the sides located at the ends in the X direction of the outline of the semiconductor element group along the arrangement direction of the elements are shown by dashed lines. As shown in Fig. 4, the snubber circuit component 40 is provided over a range including the extension lines of both sides in the X direction.
[0049] 5, the dashed lines show extensions of sides located at the ends in the X direction of the outline of the semiconductor element group along the arrangement direction of the elements to the snubber circuit component 40. As shown in FIG 4, the snubber circuit component 40 is provided over an area that is within the range of the extensions of both sides in the X direction.
[0050] 6, the extension lines of the sides located at the ends in the X direction of the outline of the semiconductor element group along the arrangement direction of the elements are shown by dashed lines. As shown in FIG 6, the snubber circuit component 40 is provided over an area that overlaps with one of the extension lines of the sides on both sides in the X direction.
[0051] The effects of the semiconductor device 21 disclosed in the specification will be described. The semiconductor device 21 includes a first semiconductor element 30H forming an upper arm 9H and a second semiconductor element 30L forming a lower arm 9L. The first semiconductor element 30H and the second semiconductor element 30L are arranged side by side to form a semiconductor element group. The semiconductor device 21 includes a snubber circuit component 40 forming a snubber circuit 13 connected in parallel to the upper arm 9H and the lower arm 9L. The snubber circuit component 40 is arranged adjacent to the semiconductor element group in the element arrangement direction in which the first semiconductor element 30H and the second semiconductor element 30L are arranged side by side.
[0052] This semiconductor device 21 includes a snubber circuit component 40 that is adjacent to one of the first semiconductor element 30H and the second semiconductor element 30L arranged side by side but not adjacent to the other. This configuration realizes suppression of heat dissipation from the other of the semiconductor elements constituting the upper and lower arms to the snubber circuit 13. Therefore, the semiconductor device 21 can suppress the thermal influence from the semiconductor element group on the snubber circuit 13. Furthermore, the current flowing from the snubber circuit to the drain electrode of the first semiconductor element and the current returning from the source electrode of the second semiconductor element to the snubber circuit flow in opposite directions. Therefore, a semiconductor device capable of reducing the inductance between the semiconductor elements and the snubber circuit can be provided.
[0053] Semiconductor device 21 includes a P terminal 51 connected to a drain electrode of a first semiconductor element via a P wiring 511, and an N terminal 52 connected to a source electrode of a second semiconductor element via an N wiring 521. P terminal 51 and N terminal 52 are provided so as to protrude from snubber circuit 13 on the opposite side to the semiconductor element group in the element arrangement direction.
[0054] According to this configuration, the P terminal and the N terminal protrude beyond the area where the capacitor of the snubber circuit is mounted, so that the thermal effect from the semiconductor element to both terminals can be suppressed. Furthermore, the current from the P terminal to the drain electrode of the first semiconductor element and the current from the source electrode of the second semiconductor element to the N terminal can be formed in the opposite direction. Therefore, a semiconductor device can be provided that can reduce the inductance between the semiconductor element and the smoothing capacitor 5. Furthermore, according to this configuration, the device for cooling the P terminal and the N terminal can be made compact, so that a power conversion device equipped with three-phase semiconductor devices can be made compact.
[0055] P wiring 511 extends so as to form a current from P terminal 51 to the drain electrode of the first semiconductor element. N wiring 521 extends so as to form a current from the source electrode of the second semiconductor element to N terminal 52 in the opposite direction to the current flowing through P wiring 511. This configuration makes it possible to provide a semiconductor device that can reduce the inductance between the semiconductor elements and smoothing capacitor 5.
[0056] At least one of P wiring 511 and N wiring 521 is formed by a single wiring board. With this configuration, it is possible to simplify the shape of P wiring 511 and N wiring 521 and to reduce the thickness of the semiconductor device. Therefore, it is possible to provide a semiconductor device that contributes to the miniaturization of a power conversion device. This configuration is useful for miniaturizing a power conversion device that includes semiconductor devices for three phases.
[0057] Each of the P wiring 511 and the N wiring 521 is formed by a single wiring board. The P wiring board and the N wiring board are provided at positions offset from each other in the thickness direction of the first semiconductor element, which is perpendicular to the element arrangement direction and is the minimum dimension length direction. With this configuration, a configuration that can be formed compactly in terms of the length of the P wiring, the N wiring, the first semiconductor element, and the second semiconductor element in the thickness direction can be adopted. Therefore, a configuration that is very useful for miniaturizing a power conversion device equipped with three-phase semiconductor devices can be provided.
[0058] The semiconductor device includes an O wiring 532 that connects a source electrode of a first semiconductor element and a drain electrode of a second semiconductor element. The O wiring 532 and the N wiring 521 are formed to overlap in the arrangement direction of the elements. With this configuration, it is possible to adopt a configuration that allows the P wiring, the N wiring, the O wiring, the first semiconductor element, and the second semiconductor element to be formed compactly in terms of the length in the thickness direction.
[0059] The first semiconductor element 30H and the snubber circuit component 40 are arranged to overlap in the arrangement direction of the elements. With this configuration, it is possible to adopt a configuration in which the first semiconductor element 30H and the snubber circuit component 40 can be formed compactly in terms of the length in the thickness direction.
[0060] The power conversion device 4 includes the semiconductor device described in this specification and a smoothing capacitor 5. This makes it possible to provide a power conversion device that suppresses the thermal effect of the semiconductor elements on the snubber circuit 13, as described above.
[0061] Other embodiments The disclosure of this specification is not limited to the exemplified embodiments. The disclosure includes the exemplified embodiments and modifications by those skilled in the art based thereon. For example, the disclosure is not limited to the combination of parts and elements shown in the embodiments, and can be implemented in various modifications. The disclosure can be implemented by various combinations. The disclosure can have additional parts that can be added to the embodiments. The disclosure includes those in which parts and elements of the embodiments are omitted. The disclosure includes the replacement or combination of parts and elements between one embodiment and another embodiment. The disclosed technical scope is not limited to the description of the embodiments. The disclosed technical scope is indicated by the description of the claims, and should be interpreted as including all modifications within the meaning and scope equivalent to the description of the claims.
[0062] The power conversion device 4 of the above-described embodiment may further include a converter as a power conversion circuit. The converter is a DC-DC conversion circuit that converts a DC voltage into a DC voltage of a different value. This converter is provided between the DC power source 2 and the smoothing capacitor 5. The converter is configured to include, for example, a reactor and the above-mentioned upper and lower arm circuits 9. In this configuration, voltage step-up and step-down are possible. The power conversion device 4 may also include a filter capacitor that removes power supply noise from the DC power source 2. This filter capacitor is provided between the DC power source 2 and the converter.
[0063] A power conversion device capable of achieving the object disclosed in the specification may have a configuration in which a part of the snubber circuit overlaps a part of the semiconductor element in the thickness direction.
[0064] (Disclosure of technical ideas) This specification discloses multiple technical ideas described in the following multiple dependent claims. Some of the claims may be described in a multiple dependent form, where the subsequent claim alternatively refers to the preceding claim. Furthermore, some of the claims may be described in a multiple dependent form, where the subsequent claim alternatively refers to the preceding claim. The claims described in these multiple dependent forms define multiple technical ideas.
[0065] (Technical thought 1) a first semiconductor element (30H) forming an upper arm (9H); a second semiconductor element (30L) arranged in parallel with the first semiconductor element and forming a lower arm (9L); a snubber circuit component (40) forming a snubber circuit (13) connected in parallel to the upper arm and the lower arm; Equipped with The snubber circuit component is a semiconductor device that is arranged adjacent to a semiconductor element group in which the first semiconductor element and the second semiconductor element are arranged side by side, in an element arrangement direction in which the first semiconductor element and the second semiconductor element are arranged.
[0066] (Technical thought 2) Each of the first semiconductor element and the second semiconductor element includes a plurality of semiconductor elements contained within a flat outer shell, the plurality of semiconductor elements are disposed in such a manner that a thickness direction, which is a length direction of a minimum dimension, is perpendicular to an arrangement direction of the elements, A semiconductor device according to technical idea 1, wherein each of the first semiconductor element and the second semiconductor element is formed by a plurality of semiconductor elements arranged in a direction perpendicular to both the element arrangement direction and the thickness direction, the flattened maximum surface of each of the first semiconductor element and the second semiconductor element being formed by a plurality of semiconductor elements arranged in a direction perpendicular to both the element arrangement direction and the thickness direction.
[0067] (Technical Thought 3) A P terminal (51) connected to the drain electrode of the first semiconductor element via a P wiring (511); an N terminal (52) connected to a source electrode of the second semiconductor element via an N wiring (521); The semiconductor device according to Technical Idea 1, wherein the P terminal and the N terminal are provided so as to protrude on the opposite side to the semiconductor element group with respect to the element arrangement direction with respect to the snubber circuit component.
[0068] (Technical Thought 4) the P wiring extends so as to form a current from the P terminal to a drain electrode of the first semiconductor element; The semiconductor device according to Technical Idea 3, wherein the N wiring extends so as to form a current from the source electrode of the second semiconductor element to the N terminal in the opposite direction to the current flowing through the P wiring.
[0069] (Technical Thought 5) The semiconductor device according to Technical Idea 3 or 4, wherein at least one of the P wiring and the N wiring is formed from a single wiring board.
[0070] (Technical Thought 6) Each of the P wiring and the N wiring is formed from a single wiring board, A semiconductor device according to technical idea 5, in which the P wiring board and the N wiring board are arranged at positions offset from each other in the thickness direction of the first semiconductor element, which is perpendicular to the arrangement direction of the elements and is the direction of the minimum dimension length.
[0071] (Technical Thought 7) an O wiring (532) connecting a source electrode of the first semiconductor element and a drain electrode of a second semiconductor element; The semiconductor device according to Technical Idea 3, wherein the O wiring and the N wiring are formed to overlap in the element arrangement direction.
[0072] (Technical Thought 8) The semiconductor device according to any one of Technical Ideas 1 to 7, wherein the first semiconductor element and the snubber circuit component are arranged to overlap in an arrangement direction of the elements.
[0073] (Technical Thought 9) A semiconductor device according to any one of technical concepts 1 to 8; A smoothing capacitor (5); A power conversion device comprising: [Explanation of symbols]
[0074] 9H: Upper arm, 9L: Lower arm, 13: Snubber circuit, 30H: first semiconductor element; 30L: second semiconductor element; 40: snubber circuit component;
Claims
1. A first semiconductor element (30H) forming an upper arm (9H); a second semiconductor element (30L) arranged in parallel with the first semiconductor element to form a lower arm (9L); A snubber circuit component (40) forming a snubber circuit (13) connected in parallel to the upper arm and the lower arm; Equipped with The snubber circuit component is arranged adjacent to a semiconductor element group in which the first semiconductor element and the second semiconductor element are arranged side by side, in an element arrangement direction in which the first semiconductor element and the second semiconductor element are arranged.
2. Each of the first semiconductor element and the second semiconductor element includes a plurality of semiconductor elements contained within a flat outer shell, the plurality of semiconductor elements are disposed in such a manner that a thickness direction, which is a length direction of a minimum dimension, is perpendicular to an arrangement direction of the elements, 2. The semiconductor device according to claim 1, wherein each of the first semiconductor element and the second semiconductor element is formed by a plurality of semiconductor elements whose flattened largest surfaces are arranged in a direction perpendicular to both the element arrangement direction and the thickness direction.
3. A P terminal (51) connected to the drain electrode of the first semiconductor element via a P wiring (511); an N terminal (52) connected to a source electrode of the second semiconductor element via an N wiring (521); 2. The semiconductor device according to claim 1, wherein the P terminal and the N terminal are provided so as to protrude from the snubber circuit component on a side opposite to the semiconductor element group in the element arrangement direction.
4. the P wiring extends so as to form a current from the P terminal to a drain electrode of the first semiconductor element; 4. The semiconductor device according to claim 3, wherein the N-type wiring extends so as to form a current from a source electrode of the second semiconductor element to the N-terminal in a direction opposite to the direction of the current flowing through the P-type wiring.
5. 5. The semiconductor device according to claim 3, wherein at least one of the P wiring and the N wiring is formed from a single wiring board.
6. Each of the P wiring and the N wiring is formed from a single wiring board, 6. The semiconductor device according to claim 5, wherein the P wiring board and the N wiring board are provided at positions offset from each other in a thickness direction of the first semiconductor element, which is a direction perpendicular to the arrangement direction of the elements and a direction of the minimum dimension length.
7. An O wiring (532) is provided which connects a source electrode of the first semiconductor element and a drain electrode of a second semiconductor element; 4. The semiconductor device according to claim 3, wherein the O wiring and the N wiring are formed so as to overlap in the element arrangement direction.
8. 5 . The semiconductor device according to claim 1 , wherein the first semiconductor element and the snubber circuit component are provided so as to overlap in an arrangement direction of the elements.
9. A semiconductor device according to any one of claims 1 to 4, A smoothing capacitor (5); A power conversion device comprising: