Encoding device, decoding device, and bitstream generator

Abstract

To provide an encoding device capable of contributing to one or more of improving coding efficiency, improving image quality, reducing processing volume, reducing circuit size, improving processing speed, and appropriate selection of elements or operations.SOLUTION: An encoding device 100 includes a processor a1 and a memory a2. The processor a1 is configured to calculate the forecast absolute value of a coefficient based on the absolute value of the sum of the five marginal coefficients of the coefficient in the current block, determine the value of the rice parameter from multiple candidates, and encode the remaining coefficients by using the rice parameters. The five marginal coefficients include: a first marginal coefficient, which is located to the right of the coefficient; a second marginal coefficient, which is located to the right of the first marginal coefficient; a third marginal coefficient, which is located just below the coefficient; a fourth marginal coefficient, which is located just below the third marginal coefficient; and a fifth marginal coefficient, which is located to the right of the third marginal coefficient.SELECTED DRAWING: Figure 40

Description

[Technical field]

[0001] TECHNICAL FIELD This disclosure relates to video coding, such as systems, components, and methods for encoding and decoding video images. [Background technology]

[0002] Video coding technology has progressed from H.261 and MPEG-1 to H.264 / AVC (Advanced Video Coding), MPEG-LA, H.265 / HEVC (High Efficiency Video Coding), and H.266 / VVC (Versatile Video Codec). With this progress, there is a constant need to provide improvements and optimizations in video coding technology to handle the ever-increasing amount of digital video data in various applications.

[0003] Non-Patent Document 1 relates to an example of a conventional standard regarding the above-mentioned video coding technology. [Prior art documents] [Non-patent literature]

[0004] [Non-Patent Document 1] H.265(ISO / IEC 23008-2 HEVC) / HEVC(High Efficiency Video Coding) Summary of the Invention [Problem to be solved by the invention]

[0005] Regarding the above-mentioned encoding methods, it is desirable to propose new methods in order to improve encoding efficiency, improve image quality, reduce the amount of processing, reduce circuit scale, or appropriately select elements or operations such as filters, block sizes, motion vectors, reference pictures or reference blocks.

[0006] The present disclosure provides a configuration or method that can contribute to one or more of, for example, improved coding efficiency, improved image quality, reduced processing amount, reduced circuit scale, improved processing speed, and appropriate selection of elements or operations, etc. Note that the present disclosure may include a configuration or method that can contribute to benefits other than those described above. [Means for solving the problem]

[0007] For example, an encoding device according to an embodiment of the present disclosure includes a memory and a Context-Based Adaptive Binary Arithmetic Acceleration (CABAC) processor connected to the memory. and a processor for executing CABAC (Computer Aided Binary Coding), in which in predictive residual coding of a current block, the processor codes, by CABAC, each of a plurality of flags indicating a property of a numerical value of a coefficient for each of a plurality of coefficients, the plurality of coefficients being a plurality of quantized coefficients generated by performing transformation and quantization on a difference between the current block and a predicted block, the plurality of flags including a first flag indicating whether the coefficient is zero or not, a second flag indicating whether the coefficient is odd or even, a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number), and a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold (the second threshold is a natural number greater than the first threshold), and determines a base level serving as a reference value for obtaining a remainder consisting of a numerical value further required to express the absolute value of the coefficient, and determines a predictive residual coding of the coefficient based on an absolute value of a sum of five peripheral coefficients of the coefficient in the current block. a Rice parameter value among a plurality of candidates based on a difference between the calculated predicted absolute value and the base level, the Rice parameter being set to zero if the difference is less than a first value, the Rice parameter being set to one if the difference is equal to or greater than a first value and less than a second value, and the Rice parameter being set to two if the difference is equal to or greater than a second value; and encoding a remainder of the coefficient using the Rice parameter, the remainder being calculated using the absolute value of the coefficient and the base level, and encoding a fifth flag indicating whether the coefficient is a positive value or a negative value if the absolute value of the coefficient is greater than zero, the five peripheral coefficients including a first peripheral coefficient located to the right of the coefficient, a second peripheral coefficient located to the right of the first peripheral coefficient, a third peripheral coefficient located immediately below the coefficient, a fourth peripheral coefficient located immediately below the third peripheral coefficient, and a fifth peripheral coefficient located to the right of the third peripheral coefficient.

[0008] For example, a coding device according to an embodiment of the present disclosure includes a memory and a processor connected to the memory and configured to execute CABAC (Context-Based Adaptive Binary Arithmetic Coding). In a prediction residual coding of a current block, the processor codes, by CABAC, each of a plurality of flags indicating a numerical property of a coefficient for each of a plurality of coefficients, the plurality of coefficients being a plurality of quantized coefficients generated by performing transformation and quantization on a difference between the current block and a prediction block. The plurality of flags include a first flag indicating whether the coefficient is zero or not, a second flag indicating whether the coefficient is odd or even, a third flag indicating whether an absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number), and a fourth flag indicating whether an absolute value of the coefficient is equal to or greater than a second threshold (the second threshold is a natural number greater than the first threshold). , and when the absolute value of the coefficient cannot be expressed by the plurality of flags alone, a base level is determined as a reference value for obtaining a remainder consisting of a numerical value further required to express the absolute value of the coefficient, and when the number of coded flags reaches a limit on the number of CABAC coding times, the base level takes a value smaller than that when the limit is not reached, a predicted absolute value of the coefficient is calculated based on the absolute value of a sum of five peripheral coefficients of the coefficient in the current block, a value of a Rice parameter is determined from among a plurality of candidates based on a difference between the calculated predicted absolute value and the base level, and the remainder of the coefficient is coded using the Rice parameter.

[0009] Some implementations of the embodiments of the present disclosure may improve encoding efficiency, simplify the encoding / decoding process, increase the encoding / decoding process speed, and / or efficiently select appropriate components / operations used in encoding and decoding, such as appropriate filters, block sizes, motion vectors, reference pictures, reference blocks, etc.

[0010] Further advantages and benefits of certain aspects of the present disclosure will become apparent from the specification and drawings, and while such advantages and / or benefits may be obtained by various embodiments and features described in the specification and drawings, not all of them necessarily need to be provided in order to obtain one or more advantages and / or benefits.

[0011] These general or specific aspects may be realized as a system, a method, an integrated circuit, a computer program, a recording medium, or any combination thereof. Effect of the Invention

[0012] A configuration or method according to an aspect of the present disclosure may contribute to one or more of, for example, improved coding efficiency, improved image quality, reduced processing amount, reduced circuit scale, improved processing speed, and appropriate selection of elements or operations. Note that a configuration or method according to an aspect of the present disclosure may contribute to benefits other than those described above. [Brief description of the drawings]

[0013] [Figure 1] FIG. 1 is a block diagram showing a functional configuration of an encoding device according to an embodiment. [Diagram 2] FIG. 2 is a flowchart showing an example of the overall encoding process performed by the encoding device. [Diagram 3] FIG. 3 is a conceptual diagram showing an example of block division. [Figure 4A] FIG. 4A is a conceptual diagram showing an example of a slice configuration. [Figure 4B] FIG. 4B is a conceptual diagram showing an example of a tile configuration. [Figure 5A] FIG. 5A is a table showing the transform basis functions that correspond to various transform types. [Figure 5B] FIG. 5B is a conceptual diagram showing an example of SVT (Spatially Varying Transform). [Figure 6A]FIG. 6A is a conceptual diagram showing an example of the shape of a filter used in an adaptive loop filter (ALF). [Figure 6B] FIG. 6B is a conceptual diagram showing another example of the shape of the filter used in the ALF. [Figure 6C] FIG. 6C is a conceptual diagram showing another example of the shape of the filter used in the ALF. [Figure 7] FIG. 7 is a block diagram showing an example of a detailed configuration of a loop filter unit functioning as a DBF (deblocking filter). [Figure 8] FIG. 8 is a conceptual diagram showing an example of a deblocking filter having symmetric filter characteristics with respect to block boundaries. [Figure 9] FIG. 9 is a conceptual diagram for explaining block boundaries on which deblocking filter processing is performed. [Figure 10] FIG. 10 is a conceptual diagram showing an example of the Bs value. [Figure 11] FIG. 11 is a flowchart illustrating an example of processing performed in the prediction processing unit of the encoding device. [Figure 12] FIG. 12 is a flowchart showing another example of the process performed in the prediction processing unit of the encoding device. [Figure 13] FIG. 13 is a flowchart showing another example of the process performed in the prediction processing unit of the encoding device. [Figure 14] FIG. 14 is a conceptual diagram showing an example of 67 intra prediction modes in intra prediction according to the embodiment. [Figure 15] FIG. 15 is a flowchart showing an example of the flow of basic inter prediction processing. [Figure 16] FIG. 16 is a flowchart showing an example of motion vector derivation. [Figure 17] FIG. 17 is a flowchart showing another example of motion vector derivation. [Figure 18] FIG. 18 is a flowchart showing another example of motion vector derivation. [Figure 19]FIG. 19 is a flowchart showing an example of inter prediction in the normal inter mode. [Figure 20] FIG. 20 is a flowchart showing an example of inter prediction in the merge mode. [Figure 21] FIG. 21 is a conceptual diagram for explaining an example of a motion vector derivation process in the merge mode. [Figure 22] FIG. 22 is a flowchart showing an example of a frame rate up conversion (FRUC) process. [Figure 23] FIG. 23 is a conceptual diagram for explaining an example of pattern matching (bilateral matching) between two blocks along a motion trajectory. [Figure 24] FIG. 24 is a conceptual diagram for explaining an example of pattern matching (template matching) between a template in a current picture and a block in a reference picture. [Figure 25A] FIG. 25A is a conceptual diagram for explaining an example of derivation of a motion vector for each sub-block based on motion vectors of a plurality of adjacent blocks. [Figure 25B] FIG. 25B is a conceptual diagram for explaining an example of derivation of a motion vector for each sub-block in the affine mode having three control points. [Figure 26A] FIG. 26A is a conceptual diagram for explaining the affine merge mode. [Figure 26B] FIG. 26B is a conceptual diagram for explaining an affine merge mode having two control points. [Figure 26C] FIG. 26C is a conceptual diagram for explaining an affine merge mode having three control points. [Figure 27] FIG. 27 is a flowchart showing an example of a process in the affine merge mode. [Figure 28A] FIG. 28A is a conceptual diagram for explaining an affine inter mode having two control points. [Figure 28B]FIG. 28B is a conceptual diagram for explaining an affine inter mode having three control points. [Figure 29] FIG. 29 is a flowchart showing an example of processing in the affine inter mode. [Figure 30A] FIG. 30A is a conceptual diagram for explaining an affine inter mode in which a current block has three control points and an adjacent block has two control points. [Figure 30B] FIG. 30B is a conceptual diagram for explaining an affine inter mode in which a current block has two control points and an adjacent block has three control points. [Figure 31A] FIG. 31A is a flow chart showing a merge mode including decoder motion vector refinement (DMVR). [Figure 31B] FIG. 31B is a conceptual diagram for explaining an example of the DMVR process. [Diagram 32] FIG. 32 is a flowchart showing an example of generation of a predicted image. [Diagram 33] FIG. 33 is a flowchart showing another example of generation of a predicted image. [Diagram 34] FIG. 34 is a flowchart showing another example of generation of a predicted image. [Diagram 35] FIG. 35 is a flowchart illustrating an example of a predictive image correction process using overlapped block motion compensation (OBMC). [Diagram 36] FIG. 36 is a conceptual diagram for explaining an example of the predicted image correction process by the OBMC process. [Figure 37] FIG. 37 is a conceptual diagram for explaining generation of predicted images of two triangles. [Figure 38] FIG. 38 is a conceptual diagram for explaining a model assuming uniform linear motion. [Figure 39]FIG. 39 is a conceptual diagram for explaining an example of a predicted image generating method using luminance correction processing by LIC (local illumination compensation) processing. [Diagram 40] FIG. 40 is a block diagram showing an example of implementation of an encoding device. [Diagram 41] FIG. 41 is a block diagram showing a functional configuration of a decoding device according to an embodiment. As shown in FIG. [Diagram 42] FIG. 42 is a flowchart showing an example of the overall decoding process by the decoding device. [Diagram 43] FIG. 43 is a flowchart illustrating an example of processing performed in the prediction processing unit of the decoding device. [Diagram 44] FIG. 44 is a flowchart showing another example of the process performed in the prediction processing unit of the decoding device. [Diagram 45] FIG. 45 is a flowchart showing an example of inter prediction in the normal inter mode in the decoding device. [Diagram 46] FIG. 46 is a block diagram showing an implementation example of a decoding device. [Figure 47] FIG. 47 is a diagram for explaining an overview of DQ (Dependent Quantization). [Figure 48] FIG. 48 is a diagram illustrating an example of a state transition of the quantization unit. [Figure 49] FIG. 49 is a diagram illustrating an example of a state transition of the quantization unit. [Figure 50] FIG. 50 is a diagram showing an example of binarization of remainder. [Figure 51] FIG. 51 is a diagram for explaining a method for determining the Rice parameter. [Figure 52] FIG. 52 is a diagram showing the code length (i.e., the number of bits) of a binary signal obtained by Golomb-Rice coding of remainder. [Diagram 53] FIG. 53 is a flowchart showing an overall processing operation of the entropy encoding unit in the first example of the first aspect. [Figure 54]FIG. 54 is a flowchart showing an example of detailed processing operations in step S110 of FIG. [Figure 55] FIG. 55 is a flowchart showing an example of detailed processing operations in step S120 of FIG. [Figure 56] FIG. 56 is a flowchart showing an example of detailed processing operations in step S130 of FIG. [Figure 57] FIG. 57 is a diagram illustrating syntax related to entropy coding in a first example of the first aspect. [Figure 58] FIG. 58 shows a specific example of a sub-block including 4×4 coefficients. [Figure 59] FIG. 59 is a diagram showing a specific example in which each coefficient included in the sub-block of FIG. 58 is expressed in flag format in the first example of the first mode. [Figure 60] FIG. 60 is a flowchart showing an overall processing operation of the entropy encoding unit in the second example of the first aspect. [Figure 61] FIG. 61 is a flowchart showing an example of detailed processing operations in step S210 of FIG. [Figure 62] FIG. 62 is a flowchart showing an example of detailed processing operations in step S220 of FIG. [Figure 63] FIG. 63 is a flowchart showing an example of detailed processing operations in step S230 of FIG. [Figure 64] FIG. 64 is a diagram illustrating syntax related to entropy coding in the second example of the first aspect. [Figure 65] FIG. 65 is a diagram showing a specific example in which each coefficient included in the sub-block of FIG. 58 is expressed in flag format in the second example of the first mode. [Figure 66] FIG. 66 is a flowchart showing the overall processing operation of the entropy encoding unit in the second aspect. [Figure 67] FIG. 67 is a flowchart showing an example of detailed processing operations in step S330 of FIG. [Figure 68] FIG. 68 is a diagram showing syntax relating to entropy coding in the second aspect. [Figure 69] FIG. 69 is a diagram showing a specific example in which each coefficient included in the sub-block of FIG. 58 is expressed in flag format in the second aspect. [Figure 70] FIG. 70 is a flowchart showing the overall processing operation of the entropy encoding unit in the third aspect. [Figure 71] FIG. 71 is a flowchart showing an example of detailed processing operations in step S430 of FIG. [Figure 72] FIG. 72 is a flowchart showing the processing operation of the encoding device in the second embodiment. [Figure 73] FIG. 73 is a flowchart showing coding of the remaining part by the coding device in the second embodiment. [Figure 74] FIG. 74 is a flowchart showing the processing operation of the decoding device in the second embodiment. [Figure 75] FIG. 75 is a flowchart showing decoding of the flag and the remainder by the decoding device in the second embodiment. [Figure 76] FIG. 76 is a block diagram showing the overall configuration of a content supply system that realizes a content distribution service. [Figure 77] FIG. 77 is a conceptual diagram showing an example of a coding structure in scalable coding. [Figure 78] FIG. 78 is a conceptual diagram showing an example of a coding structure in scalable coding. [Figure 79] FIG. 79 is a conceptual diagram showing an example of a display screen of a web page. [Figure 80] FIG. 80 is a conceptual diagram showing an example of a display screen of a web page. [Figure 81] FIG. 81 is a block diagram showing an example of a smartphone. [Figure 82] FIG. 82 is a block diagram showing an example configuration of a smartphone. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0014] An encoding device according to one embodiment of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, the circuit encodes, for each of a plurality of coefficients included in a constituent unit of a transformed and quantized image, an absolute value of the coefficient in accordance with a predetermined order, encodes, for each of the plurality of coefficients, a sign indicating whether the coefficient is positive or negative, and in encoding the absolute value, encodes a signal indicating parity which is the least significant bit of the absolute value, determines whether to use a flag in encoding a portion other than the least significant bit of the absolute value based on a first condition and a second condition, and if it is determined that the flag is to be used, encodes the flag using CABAC (Context-Based Adaptive Binary Arithmetic Coding) with updating of symbol occurrence probability, wherein the first condition is a condition based on the magnitude of the absolute value, and the second condition is a condition for limiting the number of flags used in the constituent unit.

[0015] As a result, whether or not to use a flag is determined based not only on the first condition based on the magnitude of the absolute value of the coefficient, but also on the second condition for limiting the number of flags, thereby making it possible to appropriately limit the number of flags.

[0016] In addition, when a flag is used, the code amount of the absolute value of the coefficient can be suppressed, and when a flag is not used, the code amount of the absolute value of the coefficient, specifically, the code amount of the remainder for expressing the absolute value of the coefficient, may increase. In addition, CABAC using an adaptive variable symbol occurrence probability may be applied to the encoding of the flag, and bypass processing of CABAC using a fixed symbol occurrence probability may be applied to the encoding of the remainder. Here, CABAC using a variable symbol occurrence probability tends to have a larger processing load than bypass processing. Therefore, in the encoding device according to one aspect of the present disclosure, the number of flags can be appropriately limited, so that it is possible to achieve both a reduction in the code amount of the absolute value and a reduction in the processing load required for encoding the absolute value.

[0017] In addition, in encoding the absolute value, the circuit counts the number of the coded flags each time the flag is coded, and if the first condition is satisfied but the second condition is not satisfied, determines that the flag is not used for coding a part of the absolute value other than the least significant bit, and the second condition may be a condition that a count number corresponding to the counted number of the flags is less than a limit number.

[0018] This allows the number of coded flags to be more appropriately limited, since each time a flag is coded the number of coded flags is counted.

[0019] The first condition may be that the absolute value is not a first value, or that the absolute value is greater than or equal to a second value. For example, the first value may be 0 and the second value may be 3.

[0020] This makes it possible to appropriately limit the number of flags (e.g., gt1_flag) indicating whether or not the absolute value of a coefficient is 3 or more for a coefficient whose absolute value is not 0. Alternatively, it is possible to appropriately limit the number of flags (e.g., gt2_flag) indicating whether or not the absolute value of a coefficient is 5 or more for a coefficient whose absolute value is 3 or more.

[0021] The flag may be made up of a plurality of different types of flags.

[0022] This makes it possible to appropriately limit the number of each of a plurality of types of flags such as the above-mentioned gt1_flag and gt2_flag.

[0023] In addition, when the flag cannot be used in encoding the absolute value or when the absolute value cannot be expressed by at least one flag only, the circuit may derive a remainder consisting of a numerical value for expressing the absolute value, and encode the derived remainder by a CABAC bypass process.

[0024] This allows the absolute value of the coefficient to be suitably coded as a flag or as a set of data consisting of at least one flag and a remainder.

[0025] In addition, the circuit may determine a base level indicating a different value depending on whether a count number according to the number of the flags coded for each coefficient preceding the coefficient corresponding to the remainder reaches a limit number in deriving the remainder, derive the remainder using the determined base level, and in coding the remainder, select a binarization method corresponding to the remainder from a plurality of binarization methods different from each other based on the base level used in deriving the remainder, binarize the remainder according to the selected binarization method, and arithmetically code the binarized remainder. For example, the base level determined when the count number reaches the limit number may be smaller than the base level determined when the limit number is not reached.

[0026] This allows the remainder for the absolute value of the coefficient to be appropriately derived using the base level. Furthermore, the binarization method used for binarizing the remainder is selected based on the base level, so that the amount of code for the remainder can be appropriately reduced.

[0027] Moreover, a decoding device according to an embodiment of the present disclosure includes a circuit and a memory connected to the circuit, and in operation, for each of a plurality of coefficients included in a constituent unit of an encoded image, the circuit decodes an absolute value of the coefficient in a predetermined order, and for each of the plurality of coefficients, decodes a code indicating whether the coefficient is positive or negative, and in the constituent unit, of N (N is an integer equal to or greater than 2) coefficients each having an absolute value that satisfies a predetermined condition regarding magnitude, a flag is used to code each of M (M is an integer less than N) coefficients, and the flag is not used to code each of the absolute values ​​of the remaining (NM) coefficients, and in decoding the absolute values, a signal indicating parity, which is the least significant bit of the absolute value, is decoded, and when the flag is used to code a portion other than the least significant bit of the absolute value, the circuit decodes the flag by CABAC (Context-Based Adaptive Binary Arithmetic Coding) with updating of symbol occurrence probability.

[0028] This makes it possible to appropriately decode the encoded image constituent units even if the number of flags used in encoding the image constituent units is limited.

[0029] The predetermined condition may be a condition that the absolute value of the coefficient is not a first value, or a condition that the absolute value of the coefficient is equal to or greater than a second value. For example, the first value may be 0 and the second value may be 3.

[0030] This makes it possible to properly decode the constituent units of the coded image even if the number of flags (e.g., gt1_flag) indicating whether the absolute value of a coefficient is not 0 is 3 or more is limited, for example. Or, even if the number of flags (e.g., gt2_flag) indicating whether the absolute value of a coefficient is 3 or more is limited, for example, the constituent units of the coded image can be properly decoded.

[0031] The flag may be made up of a plurality of different types of flags.

[0032] This makes it possible to appropriately decode the constituent units of the encoded image even if the number of each of a plurality of types of flags such as the above-mentioned gt1_flag and gt2_flag is limited.

[0033] In addition, in decoding the absolute value, if a remainder consisting of a numerical value for expressing the absolute value is encoded, the circuit may further decode the remainder by CABAC bypass processing.

[0034] This allows the components of the coded image to be properly decoded even if the absolute values ​​of the coefficients are coded as flags or as a data group consisting of at least one flag and a remainder.

[0035] Furthermore, in decoding the remainder, the circuit may determine a base level indicating a different numerical value depending on whether a count number corresponding to the number of the flags decoded for each coefficient preceding the coefficient corresponding to the remainder has reached a limit number, arithmetically decode the remainder into a binary signal, select a multi-value method corresponding to the binary signal from a plurality of mutually different multi-value methods based on the determined base level, and multi-value the binary signal in accordance with the selected multi-value method. For example, the base level determined when the count number has reached the limit number may be smaller than the base level determined when the limit number has not been reached.

[0036] In this way, the multi-value method used for multi-value conversion of a binary signal is selected based on the base level, so that the remainder can be appropriately decoded.

[0037] Alternatively, for example, an encoding device according to one aspect of the present disclosure includes a division unit, an intra prediction unit, an inter prediction unit, a loop filter unit, a transform unit, a quantization unit, and an entropy encoding unit.

[0038] The division unit divides a picture included in an image into a plurality of blocks. The intra prediction unit predicts a block included in the picture using the picture. The inter prediction unit predicts the block using a reference picture different from the picture. The loop filter unit applies a filter to an image reconstructed from a predicted image generated by prediction by the intra prediction unit or the inter prediction unit.

[0039] The transform unit transforms a prediction error between the predicted image and the block to generate transform coefficients of the block, the quantization unit quantizes the transform coefficients, and the entropy coding unit codes the quantized transform coefficients.

[0040] Also, for example, the entropy coding unit encodes the absolute value of each of a plurality of coefficients included in a constituent unit of the transformed and quantized image in accordance with a predetermined order, encodes a sign indicating whether each of the plurality of coefficients is positive or negative, and in encoding the absolute value, encodes a signal indicating parity which is the least significant bit of the absolute value, determines whether or not to use a flag in encoding a portion other than the least significant bit of the absolute value based on a first condition and a second condition, and if it is determined that the flag is to be used, encodes the flag by CABAC (Context-Based Adaptive Binary Arithmetic Coding) with updating of symbol occurrence probability, wherein the first condition is a condition based on the magnitude of the absolute value, and the second condition is a condition for limiting the number of flags used in the constituent unit.

[0041] Alternatively, for example, a decoding device according to one aspect of the present disclosure includes an entropy decoding unit, an inverse quantization unit, an inverse transform unit, an intra prediction unit, an inter prediction unit, and a loop filter unit.

[0042] The entropy decoding unit decodes quantized transform coefficients of blocks constituting a picture included in an encoded image, the inverse quantization unit inverse quantizes the quantized transform coefficients, and the inverse transform unit inversely transforms the transform coefficients to obtain a prediction error of the block.

[0043] The intra prediction unit predicts the block using the picture, the inter prediction unit predicts the block using a reference picture different from the picture, and the loop filter unit applies a filter to an image reconstructed from a predicted image generated by prediction by the intra prediction unit or the inter prediction unit.

[0044] Also, for example, the entropy decoding unit decodes the absolute value of each of a plurality of coefficients included in a constituent unit of the encoded image in accordance with a predetermined order, decodes a code indicating whether the coefficient is positive or negative for each of the plurality of coefficients, and in the constituent unit, of N (N is an integer equal to or greater than 2) coefficients each having an absolute value that satisfies a predetermined condition regarding magnitude, a flag is used to code the absolute value of each of M (M is an integer less than N) coefficients, and the flag is not used to code the absolute value of each of the remaining (NM) coefficients, and in decoding the absolute value, a signal indicating parity, which is the least significant bit of the absolute value, is decoded, and if the flag is used to code a portion other than the least significant bit of the absolute value, the flag is decoded by CABAC (Context-Based Adaptive Binary Arithmetic Coding) involving updating of symbol occurrence probability.

[0045] Furthermore, these comprehensive or specific aspects may be realized in a system, an apparatus, a method, an integrated circuit, a computer program, or a non-transitory recording medium such as a computer-readable CD-ROM, or may be realized in any combination of a system, an apparatus, a method, an integrated circuit, a computer program, and a recording medium.

[0046] Hereinafter, the embodiments will be described in detail with reference to the drawings. Note that the embodiments described below are all comprehensive or specific examples. The numerical values, shapes, materials, components, the arrangement and connection of the components, steps, and the relationship and order of the steps shown in the following embodiments are merely examples and are not intended to limit the scope of the claims.

[0047] In the following, embodiments of an encoding device and a decoding device will be described. The embodiments are examples of encoding devices and decoding devices to which the processes and / or configurations described in each aspect of the present disclosure can be applied. The processes and / or configurations can also be implemented in encoding devices and decoding devices different from the embodiments. For example, with respect to the processes and / or configurations applied to the embodiments, for example, any of the following may be implemented.

[0048] (1) Any of the multiple components of the encoding device or decoding device of the embodiments described in each aspect of the present disclosure may be replaced or combined with other components described in any of the aspects of the present disclosure.

[0049] (2) In the encoding device or decoding device of the embodiment, the functions or processes performed by some of the multiple components of the encoding device or decoding device may be changed in any way, such as by adding, replacing, deleting, etc. For example, any function or process may be replaced or combined with another function or process described in any of the aspects of the present disclosure.

[0050] (3) In the method implemented by the encoding device or decoding device of the embodiment, some of the processes included in the method may be arbitrarily changed, such as added, replaced, deleted, etc. For example, any process in the method may be replaced or combined with another process described in any of the aspects of the present disclosure.

[0051] (4) Some of the multiple components constituting the encoding device or decoding device of the embodiment may be combined with components described in any of the aspects of the present disclosure, or may be combined with components having some of the functions described in any of the aspects of the present disclosure, or may be combined with components that perform some of the processing performed by the components described in each aspect of the present disclosure.

[0052] (5) A component having part of the functionality of the encoding device or decoding device of an embodiment, or a component that performs part of the processing of the encoding device or decoding device of an embodiment, may be combined or replaced with a component described in any of the aspects of the present disclosure, a component having part of the functionality described in any of the aspects of the present disclosure, or a component that performs part of the processing described in any of the aspects of the present disclosure.

[0053] (6) In a method implemented by an encoding device or a decoding device of an embodiment, any of the multiple processes included in the method may be replaced or combined with a process described in any of the aspects of the present disclosure or with any similar process.

[0054] (7) Some of the processes among the multiple processes included in the method implemented by the encoding device or decoding device of the embodiment may be combined with the processes described in any of the aspects of the present disclosure.

[0055] (8) The manner in which the processes and / or configurations described in each aspect of the present disclosure are implemented is not limited to the encoding device or decoding device of the embodiment. For example, the processes and / or configurations may be implemented in a device used for a purpose other than the video encoding or video decoding disclosed in the embodiment.

[0056] [Encoding device] First, a coding device according to an embodiment will be described. Fig. 1 is a block diagram showing a functional configuration of a coding device 100 according to an embodiment. The coding device 100 is a video coding device that codes a video on a block-by-block basis.

[0057] As shown in FIG. 1, the encoding device 100 is a device that encodes an image on a block-by-block basis, and includes a division unit 102, a subtraction unit 104, a transformation unit 106, a quantization unit 108, an entropy encoding unit 110, an inverse quantization unit 112, an inverse transformation unit 114, an addition unit 116, a block memory 118, a loop filter unit 120, a frame memory 122, an intra prediction unit 124, an inter prediction unit 126, and a prediction control unit 128.

[0058] The encoding device 100 is realized by, for example, a general-purpose processor and a memory. In this case, when the software program stored in the memory is executed by the processor, the processor functions as the division unit 102, the subtraction unit 104, the transformation unit 106, the quantization unit 108, the entropy coding unit 110, the inverse quantization unit 112, the inverse transformation unit 114, the addition unit 116, the loop filter unit 120, the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128. The encoding device 100 may also be realized as one or more dedicated electronic circuits corresponding to the division unit 102, the subtraction unit 104, the transformation unit 106, the quantization unit 108, the entropy coding unit 110, the inverse quantization unit 112, the inverse transformation unit 114, the addition unit 116, the loop filter unit 120, the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.

[0059] Below, the overall processing flow of the encoding device 100 will be described, and then each component included in the encoding device 100 will be described.

[0060] [Overall encoding process flow] FIG. 2 is a flowchart showing an example of the overall encoding process performed by the encoding device 100.

[0061] First, the division unit 102 of the encoding device 100 divides each picture included in an input image, which is a moving image, into a plurality of fixed-size blocks (e.g., 128×128 pixels) (step Sa_1). Then, the division unit 102 selects a division pattern (also called a block shape) for the fixed-size blocks (step Sa_2). That is, the division unit 102 further divides the fixed-size block into a plurality of blocks constituting the selected division pattern. Then, the encoding device 100 performs the process of steps Sa_3 to Sa_9 for each of the plurality of blocks (i.e., the block to be encoded).

[0062] That is, a prediction processing unit consisting of all or part of the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128 generates a prediction signal (also called a prediction block) of the block to be coded (also called a current block) (step Sa_3).

[0063] Next, the subtraction unit 104 generates a difference between the encoding target block and the prediction block as a prediction residual (also called a difference block) (step Sa_4).

[0064] Next, the transform unit 106 and the quantization unit 108 perform transform and quantization on the difference block to generate a plurality of quantized coefficients (step Sa_5). Note that a block made up of a plurality of quantized coefficients is also called a coefficient block.

[0065] Next, the entropy coding unit 110 performs coding (specifically, entropy coding) on ​​the coefficient block and the prediction parameters related to the generation of the prediction signal to generate a coded signal (step Sa_6). The coded signal is also called a coded bit stream, a compressed bit stream, or a stream.

[0066] Next, the inverse quantization unit 112 and the inverse transformation unit 114 perform inverse quantization and inverse transformation on the coefficient block to reconstruct a plurality of prediction residuals (that is, difference blocks) (step Sa_7).

[0067] Next, the adder 116 reconstructs the current block into a reconstructed image (also called a reconstructed block or a decoded image block) by adding the predicted block to the restored difference block (step Sa_8). In this way, a reconstructed image is generated.

[0068] When this reconstructed image is generated, the loop filter unit 120 performs filtering on the reconstructed image as necessary (step Sa_9).

[0069] Then, the encoding device 100 determines whether or not encoding of the entire picture is completed (step Sa_10), and if it determines that encoding is not completed (No in step Sa_10), repeats the process from step Sa_2.

[0070] In the above example, the encoding device 100 selects one division pattern for fixed-size blocks and encodes each block according to the division pattern, but it may also encode each block according to each of a plurality of division patterns. In this case, the encoding device 100 may evaluate the cost for each of the plurality of division patterns and select, for example, the encoded signal obtained by encoding according to the division pattern with the smallest cost as the encoded signal to be output.

[0071] As shown in the figure, the processes of steps Sa_1 to Sa_10 are performed sequentially by the encoding device 100. Alternatively, some of the processes may be performed in parallel, or the order of the processes may be changed.

[0072] [Divided part] The division unit 102 divides each picture included in the input video into a plurality of blocks, and outputs each block to the subtraction unit 104. For example, the division unit 102 first divides the picture into blocks of a fixed size (for example, 128x128). Other fixed block sizes may be adopted. The fixed-size blocks may be called coding tree units (CTUs). Then, the division unit 102 divides each of the fixed-size blocks into blocks of a variable size (for example, 64x64 or less) based on, for example, recursive quadtree and / or binary tree block division. That is, the division unit 102 selects a division pattern. The variable-size blocks may be called coding units (CUs), prediction units (PUs), or transform units (TUs). Note that in various processing examples, CUs, PUs, and TUs do not need to be distinguished, and some or all of the blocks in a picture may be the processing units of CUs, PUs, and TUs.

[0073] Fig. 3 is a conceptual diagram showing an example of block division according to an embodiment, in which solid lines represent block boundaries based on quadtree block division, and dashed lines represent block boundaries based on binary tree block division.

[0074] Here, the block 10 is a square block of 128x128 pixels (128x128 block). This 128x128 block 10 is first divided into four square 64x64 blocks (quadtree block division).

[0075] The top-left 64x64 block is further divided vertically into two rectangular 32x64 blocks, and the left 32x64 block is further divided vertically into two rectangular 16x64 blocks (binary tree block division). As a result, the top-left 64x64 block is divided into two 16x64 blocks 11 and 12 and a 32x64 block 13.

[0076] The top right 64x64 block is divided horizontally into two rectangular 64x32 blocks 14, 15 (binary tree block division).

[0077] The bottom left 64x64 block is divided into four square 32x32 blocks (quadtree block division). Of the four 32x32 blocks, the top left and bottom right blocks are further divided. The top left 32x32 block is divided vertically into two rectangular 16x32 blocks, and the right 16x32 block is further divided horizontally into two 16x16 blocks (binary tree block division). The bottom right 32x32 block is divided horizontally into two 32x16 blocks (binary tree block division). As a result, the bottom left 64x64 block is divided into a 16x32 block 16, two 16x16 blocks 17, 18, two 32x32 blocks 19, 20, and two 32x16 blocks 21, 22.

[0078] The bottom right 64x64 block 23 is not split.

[0079] 3, the block 10 is divided into 13 variable-sized blocks 11 to 23 based on recursive quad-tree and binary tree block division. Such division is sometimes called QTBT (quad-tree plus binary tree) division.

[0080] In Fig. 3, one block is divided into four or two blocks (quadtree or binary tree block division), but the division is not limited to this. For example, one block may be divided into three blocks (ternary tree block division). Division including such ternary tree block division is sometimes called MBT (multi type tree) division.

[0081] [Picture Composition Slices / Tiles] In order to decode pictures in parallel, the pictures may be arranged in slice units or tile units. A picture arranged in slice units or tile units may be arranged by the division unit 102.

[0082] A slice is a basic coding unit constituting a picture. A picture is made up of, for example, one or more slices. Furthermore, a slice is made up of one or more consecutive coding tree units (CTUs).

[0083] FIG. 4A is a conceptual diagram showing an example of a slice configuration. For example, a picture includes 11×8 CTUs and is divided into four slices (slices 1-4). Slice 1 includes 16 CTUs, slice 2 includes 21 CTUs, slice 3 includes 29 CTUs, and slice 4 includes 22 CTUs. Here, each CTU in a picture belongs to one of the slices. The shape of a slice is obtained by dividing a picture in the horizontal direction. The boundary of a slice does not need to be an edge of a screen, and may be any boundary of a CTU in a screen. The processing order (encoding order or decoding order) of the CTUs in a slice is, for example, a raster scan order. In addition, a slice includes header information and encoded data. The header information may describe the characteristics of the slice, such as the address of the CTU at the beginning of the slice and the slice type.

[0084] A tile is a rectangular unit that makes up a picture. Each tile may be assigned a number called a TileId in raster scan order.

[0085] FIG. 4B is a conceptual diagram showing an example of a tile configuration. For example, a picture includes 11×8 CTUs and is divided into four rectangular tiles (tiles 1-4). When tiles are used, the processing order of the CTUs is changed compared to when tiles are not used. When tiles are not used, multiple CTUs in a picture are processed in raster scan order. When tiles are used, at least one CTU is processed in raster scan order in each of multiple tiles. For example, as shown in FIG. 4B, the processing order of multiple CTUs included in tile 1 is from the left end of the first row of tile 1 to the right end of the first row of tile 1, and then from the left end of the second row of tile 1 to the right end of the second row of tile 1.

[0086] It should be noted that one tile may include one or more slices, and one slice may include one or more tiles.

[0087] [Subtraction section] The subtraction unit 104 subtracts a prediction signal (a prediction sample input from a prediction control unit 128 described below) from an original signal (original sample) input from the division unit 102 for each block divided by the division unit 102. That is, the subtraction unit 104 calculates a prediction error (also called a residual) of a block to be coded (hereinafter called a current block). Then, the subtraction unit 104 outputs the calculated prediction error (residual) to the conversion unit 106.

[0088] The original signal is an input signal to the encoding device 100, and is a signal representing an image of each picture constituting a moving image (for example, a luminance (luma) signal and two color difference (chroma) signals). Hereinafter, the signal representing the image may also be referred to as a sample.

[0089] [Conversion section] The transform unit 106 transforms the prediction error in the spatial domain into a transform coefficient in the frequency domain, and outputs the transform coefficient to the quantization unit 108. Specifically, the transform unit 106 performs a predetermined discrete cosine transform (DCT) or discrete sine transform (DST) on the prediction error in the spatial domain, for example. The predetermined DCT or DST may be determined in advance.

[0090] The transform unit 106 may adaptively select a transform type from among a plurality of transform types, and transform the prediction errors into transform coefficients using a transform basis function corresponding to the selected transform type. Such a transform may be called an explicit multiple core transform (EMT) or an adaptive multiple transform (AMT).

[0091] The multiple transform types include, for example, DCT-II, DCT-V, DCT-VIII, DST-I, and DST-VII. Figure 5A is a table showing transform basis functions corresponding to example transform types. In Figure 5A, N indicates the number of input pixels. The selection of a transform type from among the multiple transform types may depend, for example, on the type of prediction (intra prediction and inter prediction) or on the intra prediction mode.

[0092] Such information indicating whether EMT or AMT is applied (e.g., called an EMT flag or an AMT flag) and information indicating the selected transformation type are usually signaled at a CU level, but the signaling of such information does not need to be limited to the CU level and may be at other levels (e.g., a bit sequence level, a picture level, a slice level, a tile level, or a CTU level).

[0093] Furthermore, the transform unit 106 may retransform the transform coefficients (transformation results). Such retransformation may be called an adaptive secondary transform (AST) or a non-separable secondary transform (NSST). For example, the transform unit 106 performs retransformation for each subblock (e.g., 4x4 subblock) included in a block of transform coefficients corresponding to intra-prediction errors. Information indicating whether or not to apply NSST and information regarding a transform matrix used in NSST are usually signaled at a CU level. Note that signaling of these pieces of information does not need to be limited to the CU level, and may be at other levels (e.g., sequence level, picture level, slice level, tile level, or CTU level).

[0094] Separable transformation and non-separable transformation may be applied to the transformation unit 106. Separable transformation is a method of performing transformation multiple times by separating the input into directions for the number of dimensions, and non-separable transformation is a method of performing transformation collectively when the input is multidimensional, regarding two or more dimensions as one dimension.

[0095] For example, one example of a non-separable transformation is one in which, if the input is a 4x4 block, it is treated as a single array with 16 elements and a transformation process is performed on that array using a 16x16 transformation matrix.

[0096] As another example of a non-separable transformation, a 4x4 input block may be treated as a single array with 16 elements, and then a transformation (Hypercube Givens Transform) may be performed on the array by performing multiple Givens rotations.

[0097] In the transform in the transform unit 106, the type of basis for transforming into the frequency domain can be switched according to the area in the CU. One example is SVT (Spatially Varying Transform). In SVT, as shown in FIG. 5B, a CU is divided into two equal parts in the horizontal or vertical direction, and only one of the areas is transformed into the frequency domain. The type of transform basis can be set for each area, and for example, DST7 and DCT8 are used. In this example, only one of the two areas in the CU is transformed and the other is not transformed, but both areas may be transformed. In addition, the division method can be more flexible, such as not only dividing into two, but also dividing into four equal parts, or separately encoding information indicating the division and signaling it in the same way as the CU division. In addition, SVT is also called SBT (Sub-block Transform).

[0098] [Quantization section] The quantization unit 108 quantizes the transform coefficients output from the transform unit 106. Specifically, the quantization unit 108 scans the transform coefficients of the current block in a predetermined scanning order, and quantizes the transform coefficients based on a quantization parameter (QP) corresponding to the scanned transform coefficients. Then, the quantization unit 108 outputs the quantized transform coefficients of the current block (hereinafter, referred to as quantized coefficients) to the entropy coding unit 110 and the inverse quantization unit 112. The predetermined scanning order may be determined in advance.

[0099] The predetermined scanning order is an order for quantization / dequantization of transform coefficients. For example, the predetermined scanning order may be defined as an ascending order of frequency (low to high frequencies) or a descending order of frequency (high to low frequencies).

[0100] The quantization parameter (QP) is a parameter that defines the quantization step (quantization width). For example, if the value of the quantization parameter increases, the quantization step also increases. In other words, if the value of the quantization parameter increases, the quantization error increases.

[0101] In addition, a quantization matrix may be used for quantization. For example, several types of quantization matrices may be used corresponding to frequency transform sizes such as 4x4 and 8x8, prediction modes such as intra prediction and inter prediction, and pixel components such as luminance and chrominance. Note that quantization refers to digitizing values ​​sampled at a predetermined interval in association with a predetermined level, and in this technical field, it may be referred to using other expressions such as rounding, rounding, and scaling, or rounding, rounding, and scaling may be adopted. The predetermined interval and level may be determined in advance.

[0102] There are two methods of using a quantization matrix: one is to use a quantization matrix that is directly set on the encoding device side, and the other is to use a default quantization matrix (default matrix). By directly setting a quantization matrix on the encoding device side, it is possible to set a quantization matrix according to the characteristics of an image. However, in this case, there is a disadvantage that the amount of code increases due to the encoding of the quantization matrix.

[0103] On the other hand, there is a method that does not use a quantization matrix and quantizes the coefficients of high-frequency components and low-frequency components in the same way. Note that this method is equivalent to using a quantization matrix in which all coefficients have the same value (a flat matrix).

[0104] The quantization matrix may be specified, for example, in a Sequence Parameter Set (SPS) or a Picture Parameter Set (PPS). The SPS contains parameters used for a sequence, and the PPS contains parameters used for a picture. The SPS and PPS are sometimes simply referred to as parameter sets.

[0105] [Entropy coding part] The entropy coding unit 110 generates a coded signal (coded bit stream) based on the quantized coefficients input from the quantization unit 108. Specifically, the entropy coding unit 110, for example, binarizes the quantized coefficients, arithmetically codes the binary signal, and outputs a compressed bit stream or sequence.

[0106] [Dequantization section] The inverse quantization unit 112 inverse quantizes the quantized coefficients input from the quantization unit 108. Specifically, the inverse quantization unit 112 inverse quantizes the quantized coefficients of the current block in a predetermined scanning order. Then, the inverse quantization unit 112 outputs the inverse quantized transform coefficients of the current block to the inverse transform unit 114. The predetermined scanning order may be determined in advance.

[0107] [Inverse conversion section] The inverse transform unit 114 restores the prediction error (residual) by inverse transforming the transform coefficients input from the inverse quantization unit 112. Specifically, the inverse transform unit 114 restores the prediction error of the current block by performing an inverse transform corresponding to the transform by the transform unit 106 on the transform coefficients. Then, the inverse transform unit 114 outputs the restored prediction error to the adder unit 116.

[0108] Note that the restored prediction error usually loses information due to quantization, and therefore does not match the prediction error calculated by the subtraction unit 104. That is, the restored prediction error usually contains a quantization error.

[0109] [Addition section] The adder 116 reconstructs a current block by adding the prediction error input from the inverse transformer 114 and the prediction sample input from the prediction control unit 128. The adder 116 then outputs the reconstructed block to the block memory 118 and the loop filter unit 120. The reconstructed block is sometimes called a local decoded block.

[0110] [Block memory] The block memory 118 is a storage unit for storing, for example, blocks referenced in intra prediction and in a picture to be coded (referred to as a current picture). Specifically, the block memory 118 stores the reconstructed block output from the adder 116.

[0111] [Frame memory] The frame memory 122 is a storage unit for storing reference pictures used in inter prediction, and may be called a frame buffer. Specifically, the frame memory 122 stores the reconstructed block filtered by the loop filter unit 120.

[0112] [Loop filter section] The loop filter unit 120 applies a loop filter to the block reconstructed by the adder unit 116, and outputs the filtered reconstructed block to the frame memory 122. The loop filter is a filter (in-loop filter) used in the encoding loop, and includes, for example, a deblocking filter (DF or DBF), a sample adaptive offset (SAO), and an adaptive loop filter (ALF).

[0113] In ALF, a least squared error filter is applied to remove coding artifacts. For example, for each 2x2 sub-block in the current block, one filter is selected from among multiple filters based on local gradient direction and activity.

[0114] Specifically, first, sub-blocks (e.g., 2x2 sub-blocks) are classified into a plurality of classes (e.g., 15 or 25 classes). The classification of the sub-blocks is performed based on the gradient direction and activity. For example, a classification value C (e.g., C=5D+A) is calculated using a gradient direction value D (e.g., 0 to 2 or 0 to 4) and a gradient activity value A (e.g., 0 to 4). Then, based on the classification value C, the sub-blocks are classified into a plurality of classes.

[0115] The gradient direction value D is derived, for example, by comparing gradients in multiple directions (e.g., horizontal, vertical, and two diagonal directions), and the gradient activity value A is derived, for example, by adding gradients in multiple directions and quantizing the sum.

[0116] Based on the result of such classification, a filter for the sub-block is determined from among a plurality of filters.

[0117] The shape of the filter used in the ALF is, for example, a circularly symmetric shape. FIGS. 6A to 6C are diagrams showing a number of examples of the shape of the filter used in the ALF. FIG. 6A shows a 5×5 diamond-shaped filter, FIG. 6B shows a 7×7 diamond-shaped filter, and FIG. 6C shows a 9×9 diamond-shaped filter. Information indicating the shape of the filter is usually signaled at the picture level. Note that the signaling of the information indicating the shape of the filter does not need to be limited to the picture level, and may be at other levels (for example, the sequence level, slice level, tile level, CTU level, or CU level).

[0118] The on / off of ALF may be determined, for example, at the picture level or the CU level. For example, whether or not to apply ALF for luminance may be determined at the CU level, and whether or not to apply ALF for chrominance may be determined at the picture level. Information indicating whether or not to apply ALF is usually signaled at the picture level or the CU level. Note that the signaling of information indicating whether or not to apply ALF is not limited to the picture level or the CU level, and may be at another level (for example, the sequence level, the slice level, the tile level, or the CTU level).

[0119] The coefficient sets of multiple selectable filters (e.g., up to 15 or 25 filters) are typically signaled at the picture level, although the signaling of the coefficient sets need not be limited to the picture level, but may be at other levels (e.g., sequence level, slice level, tile level, CTU level, CU level, or subblock level).

[0120] [Loop filter section > Deblocking filter] In the deblocking filter, the loop filter unit 120 reduces distortion at block boundaries of the reconstructed image by applying a filtering process to the block boundaries.

[0121] FIG. 7 is a block diagram showing an example of a detailed configuration of the loop filter unit 120 functioning as a deblocking filter.

[0122] The loop filter unit 120 includes a boundary determination unit 1201 , a filter determination unit 1203 , a filter processing unit 1205 , a processing determination unit 1208 , a filter characteristic determination unit 1207 , and switches 1202 , 1204 and 1206 .

[0123] The boundary determination unit 1201 determines whether or not a pixel to be deblocking-filtered (i.e., a target pixel) exists near a block boundary. Then, the boundary determination unit 1201 outputs the determination result to the switch 1202 and the process determination unit 1208.

[0124] When the boundary determination unit 1201 determines that the target pixel is located near the block boundary, the switch 1202 outputs the image before filtering to the switch 1204. Conversely, when the boundary determination unit 1201 determines that the target pixel is not located near the block boundary, the switch 1202 outputs the image before filtering to the switch 1206.

[0125] The filter determination unit 1203 determines whether or not to perform deblocking filter processing on the target pixel based on the pixel value of at least one surrounding pixel around the target pixel. Then, the filter determination unit 1203 outputs the determination result to the switch 1204 and the processing determination unit 1208.

[0126] When the filter determination unit 1203 determines that the deblocking filter process is to be performed on the target pixel, the switch 1204 outputs the unfiltered image acquired via the switch 1202 to the filter processing unit 1205. Conversely, when the filter determination unit 1203 determines that the deblocking filter process is not to be performed on the target pixel, the switch 1204 outputs the unfiltered image acquired via the switch 1202 to the switch 1206.

[0127] When the filtering unit 1205 acquires an unfiltered image via the switches 1202 and 1204, it executes deblocking filtering on the target pixel using the filter characteristics determined by the filter characteristics determination unit 1207. Then, the filtering unit 1205 outputs the filtered pixel to the switch 1206.

[0128] The switch 1206 selectively outputs pixels that have not been subjected to the deblocking filter process and pixels that have been subjected to the deblocking filter process by the filter processing unit 1205 under the control of the process determination unit 1208 .

[0129] The processing determination unit 1208 controls the switch 1206 based on the respective determination results of the boundary determination unit 1201 and the filter determination unit 1203. That is, when the boundary determination unit 1201 determines that the target pixel exists near a block boundary and the filter determination unit 1203 determines that the target pixel is to be subjected to deblocking filter processing, the processing determination unit 1208 causes the switch 1206 to output a pixel that has been subjected to deblocking filter processing. In addition, in cases other than the above, the processing determination unit 1208 causes the switch 1206 to output a pixel that has not been subjected to deblocking filter processing. By repeatedly outputting pixels in this manner, a filtered image is output from the switch 1206.

[0130] FIG. 8 is a conceptual diagram showing an example of a deblocking filter having symmetric filter characteristics with respect to block boundaries.

[0131] In the deblocking filter process, for example, a pixel value and a quantization parameter are used to select one of two deblocking filters with different characteristics, that is, a strong filter and a weak filter. In the strong filter, when pixels p0 to p2 and pixels q0 to q2 exist on either side of a block boundary as shown in Fig. 8, the pixel values ​​of the pixels q0 to q2 are changed to pixel values ​​q'0 to q'2 by performing the calculation shown in the following equation, for example.

[0132] q'0=(p1+2×p0+2×q0+2×q1+q2+4) / 8 q'1=(p0+q0+q1+q2+2) / 4 q'2=(p0+q0+q1+3×q2+2×q3+4) / 8

[0133] In the above equations, p0 to p2 and q0 to q2 are the pixel values ​​of pixels p0 to p2 and pixels q0 to q2, respectively. Also, q3 is the pixel value of pixel q3 adjacent to pixel q2 on the opposite side of the block boundary. Also, on the right side of each equation, the coefficients by which the pixel values ​​of each pixel used in the deblocking filter process are multiplied are filter coefficients.

[0134] Furthermore, in the deblocking filter process, a clipping process may be performed so that the pixel value after the calculation is not set to exceed the threshold. In this clipping process, the pixel value after the calculation according to the above formula is clipped to "the pixel value to be calculated ±2 × threshold" using a threshold determined from the quantization parameter. This makes it possible to prevent excessive smoothing.

[0135] Fig. 9 is a conceptual diagram for explaining block boundaries on which deblocking filter processing is performed, and Fig. 10 is a conceptual diagram showing an example of the Bs value.

[0136] The block boundary where the deblocking filter process is performed is, for example, the boundary of a PU (Prediction Unit) or TU (Transform Unit) of an 8x8 pixel block as shown in Fig. 9. The deblocking filter process can be performed in units of 4 rows or 4 columns. First, for blocks P and Q shown in Fig. 9, a Bs (Boundary Strength) value is determined as shown in Fig. 10.

[0137] According to the Bs value in FIG. 10, it is determined whether or not to perform deblocking filter processing of different strengths even for block boundaries belonging to the same image. Deblocking filter processing for the color difference signal is performed when the Bs value is 2. Deblocking filter processing for the luminance signal is performed when the Bs value is 1 or more and a predetermined condition is satisfied. The predetermined condition may be determined in advance. Note that the judgment condition for the Bs value is not limited to that shown in FIG. 10, and may be determined based on other parameters.

[0138] [Prediction processing unit (intra prediction unit, inter prediction unit, prediction control unit)] 11 is a flowchart showing an example of processing performed in the prediction processing unit of the encoding device 100. Note that the prediction processing unit is made up of all or some of the components of the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.

[0139] The prediction processing unit generates a prediction image of the current block (step Sb_1). This prediction image is also called a prediction signal or a prediction block. The prediction signal includes, for example, an intra prediction signal or an inter prediction signal. Specifically, the prediction processing unit generates a prediction image of the current block using a reconstructed image that has already been obtained by generating a prediction block, generating a difference block, generating a coefficient block, restoring the difference block, and generating a decoded image block.

[0140] The reconstructed image may be, for example, an image of a reference picture or an image of an encoded block in a current picture, which is a picture that includes the current block. The encoded block in the current picture may be, for example, a neighboring block of the current block.

[0141] FIG. 12 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device 100.

[0142] The prediction processing unit generates a predicted image by a first method (step Sc_1a), generates a predicted image by a second method (step Sc_1b), and generates a predicted image by a third method (step Sc_1c). The first method, the second method, and the third method are different methods for generating a predicted image, and may be, for example, an inter prediction method, an intra prediction method, and other prediction methods. In these prediction methods, the above-mentioned reconstructed image may be used.

[0143] Next, the prediction processing unit selects one of the multiple predicted images generated in steps Sc_1a, Sc_1b, and Sc_1c (step Sc_2). This selection of the predicted image, that is, the selection of the method or mode for obtaining the final predicted image, may be performed by calculating a cost for each generated predicted image and based on the cost. Alternatively, the selection of the predicted image may be performed based on parameters used in the encoding process. The encoding device 100 may signal information for identifying the selected predicted image, method, or mode in an encoding signal (also called an encoded bit stream). The information may be, for example, a flag. This allows the decoding device to generate a predicted image according to the method or mode selected in the encoding device 100 based on the information. Note that in the example shown in FIG. 12, the prediction processing unit generates a predicted image in each method and then selects one of the predicted images. However, the prediction processing unit may select a method or mode based on parameters used in the encoding process described above before generating those predicted images, and generate a predicted image according to the method or mode.

[0144] For example, the first and second methods may be intra prediction and inter prediction, respectively, and the prediction processing unit may select a final predicted image for the current block from predicted images generated according to these prediction methods.

[0145] FIG. 13 is a flowchart showing another example of the processing performed by the prediction processing unit of the encoding device 100.

[0146] First, the prediction processing unit generates a predicted image by intra prediction (step Sd_1a), and generates a predicted image by inter prediction (step Sd_1b). Note that the predicted image generated by intra prediction is also called an intra predicted image, and the predicted image generated by inter prediction is also called an inter predicted image.

[0147] Next, the prediction processing unit evaluates each of the intra-predicted image and the inter-predicted image (step Sd_2). A cost may be used for this evaluation. That is, the prediction processing unit calculates the cost C of each of the intra-predicted image and the inter-predicted image. This cost C can be calculated by an RD optimization model formula, for example, C=D+λ×R. In this formula, D is the coding distortion of the predicted image, and is represented by, for example, the sum of absolute differences between the pixel values ​​of the current block and the pixel values ​​of the predicted image. Furthermore, R is the generated code amount of the predicted image, and specifically, is the code amount required for coding the motion information for generating the predicted image. Furthermore, λ is, for example, Lagrange's undetermined multiplier.

[0148] Then, the prediction processing unit selects the predicted image with the smallest calculated cost C from the intra-predicted image and the inter-predicted image as the final predicted image of the current block (step Sd_3). That is, a prediction method or mode for generating a predicted image of the current block is selected.

[0149] [Intra prediction section] The intra prediction unit 124 generates a prediction signal (intra prediction signal) by performing intra prediction (also called intra-screen prediction) of the current block with reference to a block in the current picture stored in the block memory 118. Specifically, the intra prediction unit 124 generates an intra prediction signal by performing intra prediction with reference to samples (e.g., luminance values, chrominance values) of blocks adjacent to the current block, and outputs the intra prediction signal to the prediction control unit 128.

[0150] For example, the intra prediction unit 124 performs intra prediction using one of a plurality of predefined intra prediction modes. The plurality of intra prediction modes typically includes one or more non-directional prediction modes and a plurality of directional prediction modes. The plurality of predefined modes may be predefined.

[0151] The one or more non-directional prediction modes include, for example, a planar prediction mode and a DC prediction mode defined in the H.265 / HEVC standard.

[0152] The multiple directional prediction modes include, for example, 33 prediction modes defined in the H.265 / HEVC standard. The multiple directional prediction modes may include 32 prediction modes in addition to the 33 directions (a total of 65 directional prediction modes). Figure 14 is a conceptual diagram showing all 67 intra prediction modes (2 non-directional prediction modes and 65 directional prediction modes) that can be used in intra prediction. The solid arrows represent the 33 directions defined in the H.265 / HEVC standard, and the dashed arrows represent the additional 32 directions (the 2 non-directional prediction modes are not shown in Figure 14).

[0153] In various processing examples, a luminance block may be referenced in intra prediction of a chrominance block. That is, a chrominance component of a current block may be predicted based on a luminance component of the current block. Such intra prediction may be called a cross-component linear model (CCLM) prediction. An intra prediction mode of a chrominance block that references such a luminance block (e.g., called a CCLM mode) may be added as one of the intra prediction modes of the chrominance block.

[0154] The intra prediction unit 124 may correct pixel values ​​after intra prediction based on the gradient of reference pixels in the horizontal / vertical directions. Intra prediction with such correction may be called PDPC (position dependent intra prediction combination). Information indicating whether PDPC is applied (e.g., called a PDPC flag) is usually signaled at the CU level. Note that the signaling of this information does not need to be limited to the CU level, and may be at other levels (e.g., sequence level, picture level, slice level, tile level, or CTU level).

[0155] [Inter prediction section] The inter prediction unit 126 performs inter prediction (also called inter prediction) of the current block with reference to a reference picture stored in the frame memory 122 and different from the current picture, thereby generating a prediction signal (inter prediction signal). The inter prediction is performed in units of the current block or a current sub-block (e.g., 4x4 block) in the current block. For example, the inter prediction unit 126 performs motion estimation in the reference picture for the current block or the current sub-block, and finds a reference block or sub-block that most closely matches the current block or the current sub-block. Then, the inter prediction unit 126 obtains motion information (e.g., a motion vector) that compensates for the motion or change from the reference block or sub-block to the current block or sub-block. The inter prediction unit 126 performs motion compensation (or motion prediction) based on the motion information, and generates an inter prediction signal of the current block or sub-block. The inter prediction unit 126 outputs the generated inter prediction signal to the prediction control unit 128.

[0156] The motion information used for motion compensation may be signaled as an inter prediction signal in various forms, for example, a motion vector may be signaled, or, as another example, a difference between a motion vector and a motion vector predictor may be signaled.

[0157] [Basic flow of inter prediction] FIG. 15 is a flowchart showing an example of a basic flow of inter prediction.

[0158] The inter prediction unit 126 first generates a prediction image (steps Se_1 to Se_3). Next, the subtraction unit 104 generates a difference between the current block and the prediction image as a prediction residual (step Se_4).

[0159] Here, in generating a predicted image, the inter prediction unit 126 generates the predicted image by determining a motion vector (MV) of the current block (steps Se_1 and Se_2) and performing motion compensation (step Se_3). In determining an MV, the inter prediction unit 126 selects a candidate motion vector (candidate MV) (step Se_1) and derives an MV (step Se_2) to determine the MV. The selection of the candidate MV is performed, for example, by selecting at least one candidate MV from a candidate MV list. In deriving an MV, the inter prediction unit 126 may further select at least one candidate MV from the at least one candidate MV, and determine the selected at least one candidate MV as the MV of the current block. Alternatively, the inter prediction unit 126 may determine the MV of the current block by searching the area of ​​the reference picture indicated by the candidate MV for each of the selected at least one candidate MV. Note that searching the area of ​​the reference picture may be referred to as motion estimation.

[0160] In the above example, steps Se_1 to Se_3 are performed by the inter prediction unit 126. However, the process of step Se_1 or step Se_2 may be performed by another component included in the encoding device 100.

[0161] [Motion vector derivation flow] FIG. 16 is a flowchart showing an example of motion vector derivation.

[0162] The inter prediction unit 126 derives the MV of the current block in a mode in which motion information (e.g., MV) is coded. In this case, for example, the motion information is coded as a prediction parameter and signaled. That is, the coded motion information is included in a coded signal (also called a coded bitstream).

[0163] Alternatively, the inter prediction unit 126 derives the MV in a mode in which motion information is not coded. In this case, the motion information is not included in the coded signal.

[0164] Here, the MV derivation mode may include a normal inter mode, a merge mode, a FRUC mode, and an affine mode, which will be described later. Among these modes, the modes for encoding motion information include a normal inter mode, a merge mode, and an affine mode (specifically, an affine inter mode and an affine merge mode). The motion information may include not only the MV but also predicted motion vector selection information, which will be described later. The modes for not encoding motion information include the FRUC mode. The inter prediction unit 126 selects a mode for deriving the MV of the current block from these multiple modes, and derives the MV of the current block using the selected mode.

[0165] FIG. 17 is a flowchart showing another example of motion vector derivation.

[0166] The inter prediction unit 126 derives the MV of the current block in a mode of encoding the differential MV. In this case, for example, the differential MV is encoded as a prediction parameter and signaled. That is, the encoded differential MV is included in the encoded signal. This differential MV is the difference between the MV of the current block and its predicted MV.

[0167] Alternatively, the inter prediction unit 126 derives the MV in a mode in which the differential MV is not coded. In this case, the coded differential MV is not included in the coded signal.

[0168] Here, as described above, the modes of deriving an MV include normal inter, merge mode, FRUC mode, and affine mode, which will be described later. Among these modes, the modes for encoding a differential MV include normal inter mode and affine mode (specifically, affine inter mode). Also, the modes for not encoding a differential MV include FRUC mode, merge mode, and affine mode (specifically, affine merge mode). The inter prediction unit 126 selects a mode for deriving an MV of the current block from these multiple modes, and derives the MV of the current block using the selected mode.

[0169] [Motion vector derivation flow] FIG. 18 is a flowchart showing another example of motion vector derivation. There are a plurality of modes of MV derivation, that is, inter prediction modes, which are roughly divided into a mode in which a differential MV is coded and a mode in which a differential motion vector is not coded. The modes in which a differential MV is not coded include a merge mode, a FRUC mode, and an affine mode (specifically, an affine merge mode). Details of these modes will be described later, but simply, the merge mode is a mode in which the MV of the current block is derived by selecting a motion vector from a surrounding coded block, and the FRUC mode is a mode in which the MV of the current block is derived by searching between coded regions. In addition, the affine mode is a mode in which the motion vector of each of a plurality of sub-blocks constituting the current block is derived as the MV of the current block, assuming an affine transformation.

[0170] Specifically, as shown in the figure, when the inter prediction mode information indicates 0 (Sf_1 is 0), the inter prediction unit 126 derives a motion vector by the merge mode (Sf_2). When the inter prediction mode information indicates 1 (Sf_1 is 1), the inter prediction unit 126 derives a motion vector by the FRUC mode (Sf_3). When the inter prediction mode information indicates 2 (Sf_1 is 2), the inter prediction unit 126 derives a motion vector by the affine mode (specifically, the affine merge mode) (Sf_4). When the inter prediction mode information indicates 3 (Sf_1 is 3), the inter prediction unit 126 derives a motion vector by a mode for encoding a differential MV (for example, normal inter mode) (Sf_5).

[0171] [MV Derivation > Normal Inter Mode] The normal inter mode is an inter prediction mode in which the MV of the current block is derived based on a block similar to the image of the current block from the region of the reference picture indicated by the candidate MV. In addition, in this normal inter mode, the differential MV is coded.

[0172] FIG. 19 is a flowchart showing an example of inter prediction in the normal inter mode.

[0173] The inter prediction unit 126 first obtains multiple candidate MVs for the current block based on information such as MVs of multiple coded blocks around the current block in time or space (step Sg_1). That is, the inter prediction unit 126 creates a candidate MV list.

[0174] Next, the inter prediction unit 126 extracts N candidate MVs (N is an integer equal to or greater than 2) from the multiple candidate MVs acquired in step Sg_1 as motion vector predictor candidates (also called predicted MV candidates) according to a predetermined priority order (step Sg_2). Note that the priority order may be predefined for each of the N candidate MVs.

[0175] Next, the inter prediction unit 126 selects one of the N motion vector predictor candidates as a motion vector predictor (also called a prediction MV) of the current block (step Sg_3). At this time, the inter prediction unit 126 encodes motion vector predictor selection information for identifying the selected motion vector predictor into a stream. Note that the stream is the above-mentioned encoded signal or encoded bit stream.

[0176] Next, the inter prediction unit 126 derives the MV of the current block by referring to the coded reference picture (step Sg_4). At this time, the inter prediction unit 126 further encodes the difference value between the derived MV and the predicted motion vector as a differential MV into a stream. Note that the coded reference picture is a picture consisting of a plurality of blocks reconstructed after coding.

[0177] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture to generate a predicted image of the current block (step Sg_5). Note that the predicted image is the above-mentioned inter prediction signal.

[0178] Furthermore, information indicating the inter prediction mode (normal inter mode in the above example) used to generate the predicted image, which is included in the coded signal, is coded as, for example, a prediction parameter.

[0179] The candidate MV list may be used in common with lists used in other modes. Furthermore, processing related to the candidate MV list may be applied to processing related to lists used in other modes. Processing related to this candidate MV list may include, for example, extraction or selection of candidate MVs from the candidate MV list, sorting of the candidate MVs, or deletion of candidate MVs.

[0180] [MV Derivation > Merge Mode] Merge mode is an inter prediction mode that derives the MV of the current block by selecting a candidate MV from a candidate MV list as the MV for that block.

[0181] FIG. 20 is a flowchart showing an example of inter prediction in the merge mode.

[0182] The inter prediction unit 126 first obtains multiple candidate MVs for the current block based on information such as MVs of multiple coded blocks around the current block in time or space (step Sh_1). That is, the inter prediction unit 126 creates a candidate MV list.

[0183] Next, the inter prediction unit 126 derives the MV of the current block by selecting one candidate MV from the multiple candidate MVs obtained in step Sh_1 (step Sh_2). At this time, the inter prediction unit 126 encodes MV selection information for identifying the selected candidate MV into the stream.

[0184] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture to generate a predicted image of the current block (step Sh_3).

[0185] Furthermore, information indicating the inter prediction mode (merge mode in the above example) used to generate the predicted image, which is included in the coded signal, is coded as, for example, a prediction parameter.

[0186] FIG. 21 is a conceptual diagram for explaining an example of a motion vector derivation process for a current picture in the merge mode.

[0187] First, a prediction MV list is generated in which prediction MV candidates are registered. The prediction MV candidates include a spatially adjacent prediction MV, which is an MV held by a plurality of coded blocks located spatially around the target block, a temporally adjacent prediction MV, which is an MV held by a nearby block projected onto the position of the target block in a coded reference picture, a joint prediction MV, which is an MV generated by combining the MV values ​​of the spatially adjacent prediction MV and the temporally adjacent prediction MV, and a zero prediction MV, which is an MV with a value of zero.

[0188] Next, one predicted MV is selected from the multiple predicted MVs registered in the predicted MV list, and is determined as the MV for the target block.

[0189] Furthermore, the variable length coding unit writes merge_idx, which is a signal indicating which predicted MV has been selected, into the stream and codes it.

[0190] Note that the predicted MVs registered in the predicted MV list described in Figure 21 are just an example, and the number may be different from the number shown in the figure, the configuration may not include some of the types of predicted MVs shown in the figure, or the configuration may include additional predicted MVs other than the types of predicted MVs shown in the figure.

[0191] The final MV may be determined by performing a decoder motion vector refinement (DMVR) process, which will be described later, using the MV of the current block derived in the merge mode.

[0192] The prediction MV candidates are the above-mentioned candidate MVs, and the prediction MV list is the above-mentioned candidate MV list. The candidate MV list may also be called a candidate list. merge_idx is MV selection information.

[0193] [MV derivation > FRUC mode] The motion information may be derived at the decoding device side without being signaled from the encoding device side. As described above, the merge mode defined in the H.265 / HEVC standard may be used. For example, the motion information may be derived by performing motion estimation at the decoding device side. In the embodiment, the motion estimation is performed at the decoding device side without using pixel values ​​of the current block.

[0194] Here, a mode in which motion estimation is performed on the decoding device side will be described. This mode in which motion estimation is performed on the decoding device side is sometimes called a pattern matched motion vector derivation (PMMVD) mode or a frame rate up-conversion (FRUC) mode.

[0195] FIG. 22 shows an example of the FRUC process in the form of a flow chart. First, a list of multiple candidates (i.e., a candidate MV list, which may be common to the merge list) each having a predicted motion vector (MV) is generated with reference to the motion vectors of coded blocks spatially or temporally adjacent to the current block (step Si_1). Next, a best candidate MV is selected from the multiple candidate MVs registered in the candidate MV list (step Si_2). For example, an evaluation value of each candidate MV included in the candidate MV list is calculated, and one candidate MV is selected based on the evaluation value. Then, a motion vector for the current block is derived based on the motion vector of the selected candidate (step Si_4). Specifically, for example, the motion vector of the selected candidate (best candidate MV) is derived as it is as the motion vector for the current block. Also, for example, the motion vector for the current block may be derived by performing pattern matching in a peripheral area of ​​a position in a reference picture corresponding to the motion vector of the selected candidate. That is, a search is performed on the area around the best candidate MV using pattern matching and evaluation values ​​in the reference picture, and if an MV with a better evaluation value is found, the best candidate MV is updated to that MV and used as the final MV for the current block. It is also possible to configure the system without performing the process of updating to an MV with a better evaluation value.

[0196] Finally, the inter prediction unit 126 performs motion compensation on the current block using the derived MV and the coded reference picture to generate a predicted image of the current block (step Si_5).

[0197] The same processing may be performed when processing is performed in sub-block units.

[0198] The evaluation value may be calculated by various methods. For example, a reconstructed image of an area in a reference picture corresponding to the motion vector is compared with a reconstructed image of a predetermined area (which may be, for example, an area of ​​another reference picture or an area of ​​an adjacent block of the current picture, as shown below). The predetermined area may be predetermined.

[0199] Then, the difference between the pixel values ​​of the two reconstructed images may be calculated and used as an evaluation value for the motion vector. Note that the evaluation value may be calculated using other information in addition to the difference value.

[0200] Next, an example of pattern matching will be described in detail. First, one candidate MV included in a candidate MV list (e.g., a merge list) is selected as a start point of a search by pattern matching. For example, a first pattern matching or a second pattern matching can be used as the pattern matching. The first pattern matching and the second pattern matching are sometimes called bilateral matching and template matching, respectively.

[0201] [MV derivation > FRUC > Bilateral matching] In the first pattern matching, pattern matching is performed between two blocks in two different reference pictures that are along the motion trajectory of the current block. Therefore, in the first pattern matching, an area in another reference picture along the motion trajectory of the current block is used as a predetermined area for calculating the evaluation value of the candidate. The predetermined area may be determined in advance.

[0202] FIG. 23 is a conceptual diagram for explaining an example of the first pattern matching (bilateral matching) between two blocks in two reference pictures along a motion trajectory. As shown in FIG. 23, in the first pattern matching, two motion vectors (MV0, MV1) are derived by searching for a pair of blocks that best match among pairs of two blocks in two different reference pictures (Ref0, Ref1) along the motion trajectory of a current block (Cur block). Specifically, for the current block, a difference is derived between a reconstructed image at a specified position in a first coded reference picture (Ref0) specified by a candidate MV and a reconstructed image at a specified position in a second coded reference picture (Ref1) specified by a symmetric MV obtained by scaling the candidate MV by a display time interval, and an evaluation value is calculated using the obtained difference value. It is possible to select the candidate MV with the best evaluation value among multiple candidate MVs as the final MV, which may bring about good results.

[0203] Under the assumption of continuous motion trajectories, the motion vectors (MV0, MV1) pointing to two reference blocks are proportional to the temporal distances (TD0, TD1) between the current picture (Cur Pic) and the two reference pictures (Ref0, Ref1). For example, if the current picture is located between two reference pictures in time and the temporal distances from the current picture to the two reference pictures are equal, the first pattern matching derives bidirectional motion vectors that are mirror-symmetric.

[0204] [MV derivation > FRUC > Template matching] In the second pattern matching (template matching), pattern matching is performed between a template in the current picture (a block adjacent to the current block in the current picture (e.g., an upper and / or left adjacent block)) and a block in the reference picture. Therefore, in the second pattern matching, a block adjacent to the current block in the current picture is used as a predetermined area for calculating the evaluation value of the above-mentioned candidate.

[0205] Fig. 24 is a conceptual diagram for explaining an example of pattern matching (template matching) between a template in a current picture and a block in a reference picture. As shown in Fig. 24, in the second pattern matching, a motion vector of a current block is derived by searching in a reference picture (Ref0) for a block that best matches a block adjacent to a current block (Cur block) in a current picture (Cur Pic). Specifically, for a current block, a difference is derived between a reconstructed image of both or either of the left adjacent and / or upper adjacent coded areas and a reconstructed image at the same position in a coded reference picture (Ref0) specified by a candidate MV, an evaluation value is calculated using the obtained difference value, and a candidate MV with the best evaluation value among a plurality of candidate MVs can be selected as a best candidate MV.

[0206] Information indicating whether such a FRUC mode is applied (e.g., called a FRUC flag) may be signaled at the CU level. Also, when the FRUC mode is applied (e.g., when the FRUC flag is true), information indicating an applicable pattern matching method (first pattern matching or second pattern matching) may be signaled at the CU level. Note that the signaling of such information does not need to be limited to the CU level, and may be at other levels (e.g., sequence level, picture level, slice level, tile level, CTU level, or sub-block level).

[0207] [MV derivation > Affine mode] Next, a description will be given of an affine mode in which a motion vector is derived for each sub-block based on the motion vectors of a plurality of adjacent blocks. This mode is sometimes called an affine motion compensation prediction mode.

[0208] FIG. 25A is a conceptual diagram for explaining an example of derivation of a motion vector for each sub-block based on the motion vectors of multiple adjacent blocks. In FIG. 25A, the current block includes 16 4x4 sub-blocks. Here, a motion vector v0 of the top left corner control point of the current block is derived based on the motion vectors of the adjacent blocks, and similarly, a motion vector v1 of the top right corner control point of the current block is derived based on the motion vectors of the adjacent sub-blocks. Then, the two motion vectors v0 and v1 may be projected according to the following formula (1A), and the motion vectors (v x ,v y ) may be derived.

[0209]

number

[0210] Here, x and y respectively indicate the horizontal and vertical positions of the sub-block, and w indicates a predetermined weighting factor, which may be determined in advance.

[0211] Such information indicating the affine mode (e.g., called an affine flag) may be signaled at the CU level. Note that the signaling of the information indicating the affine mode does not need to be limited to the CU level, and may be at other levels (e.g., sequence level, picture level, slice level, tile level, CTU level, or sub-block level).

[0212] In addition, such an affine mode may include several modes that differ in the method of deriving the motion vectors of the upper-left and upper-right corner control points. For example, the affine mode includes two modes: an affine inter (also called an affine normal inter) mode and an affine merge mode.

[0213] [MV derivation > Affine mode] FIG. 25B is a conceptual diagram for explaining an example of derivation of a motion vector for each sub-block in an affine mode having three control points. In FIG. 25B, the current block includes 16 4x4 sub-blocks. Here, a motion vector v0 of the upper left corner control point of the current block is derived based on the motion vector of an adjacent block, and similarly, a motion vector v1 of the upper right corner control point of the current block is derived based on the motion vector of the adjacent block, and a motion vector v2 of the lower left corner control point of the current block is derived based on the motion vector of the adjacent block. Then, the three motion vectors v0, v1, and v2 may be projected according to the following formula (1B), and the motion vectors (v x ,v y ) may be derived.

[0214]

number

[0215] Here, x and y respectively indicate the horizontal and vertical positions of the subblock center, w indicates the width of the current block, and h indicates the height of the current block.

[0216] Affine modes with different numbers of control points (e.g., two and three) may be switched and signaled at the CU level. Note that information indicating the number of control points of the affine mode used at the CU level may also be signaled at other levels (e.g., sequence level, picture level, slice level, tile level, CTU level, or subblock level).

[0217] In addition, such an affine mode having three control points may include several modes with different methods of deriving the motion vectors of the upper left, upper right, and lower left corner control points. For example, the affine mode includes two modes: affine inter (also called affine normal inter) mode and affine merge mode.

[0218] [MV Derivation > Affine Merge Mode] 26A, 26B, and 26C are conceptual diagrams for explaining the affine merge mode.

[0219] In the affine merge mode, as shown in FIG. 26A, for example, among the coded blocks A (left), B (top), C (top right), D (bottom left) and E (top left) adjacent to the current block, the predicted motion vectors of each of the control points of the current block are calculated based on a plurality of motion vectors corresponding to the blocks coded in affine mode. Specifically, these blocks are inspected in the order of coded blocks A (left), B (top), C (top right), D (bottom left) and E (top left), and the first valid block coded in affine mode is identified. Based on a plurality of motion vectors corresponding to this identified block, the predicted motion vector of the control point of the current block is calculated.

[0220] For example, as shown in Figure 26B, when the block A adjacent to the left of the current block is coded in affine mode with two control points, motion vectors v3 and v4 are derived by projecting the upper left corner and upper right corner positions of the coded block including block A. Then, from the derived motion vectors v3 and v4, the predicted motion vector v0 of the control point of the upper left corner of the current block and the predicted motion vector v1 of the control point of the upper right corner are calculated.

[0221] For example, as shown in Figure 26C, when the block A adjacent to the left of the current block is coded in affine mode with three control points, motion vectors v3, v4 and v5 are derived by projecting to the upper left corner, upper right corner and lower left corner positions of the coded block including block A. Then, from the derived motion vectors v3, v4 and v5, the predicted motion vector v0 of the control point of the upper left corner of the current block, the predicted motion vector v1 of the control point of the upper right corner and the predicted motion vector v2 of the control point of the lower left corner are calculated.

[0222] Note that this predicted motion vector derivation method may be used to derive predicted motion vectors for each control point of the current block in step Sj_1 of FIG. 29, which will be described later.

[0223] FIG. 27 is a flow chart illustrating an example of the affine merge mode.

[0224] In the affine merge mode, as shown in the figure, first, the inter prediction unit 126 derives prediction MVs for each of the control points of the current block (step Sk_1). The control points are the upper left and upper right corner points of the current block as shown in Figure 25A, or the upper left, upper right and lower left corner points of the current block as shown in Figure 25B.

[0225] That is, the inter prediction unit 126 examines the coded blocks in the following order, as shown in FIG. 26A: coded block A (left), block B (top), block C (top right), block D (bottom left) and block E (top left), and identifies the first valid block coded in affine mode.

[0226] Then, when block A is identified and has two control points, as shown in FIG. 26B, the inter prediction unit 126 calculates the motion vector v0 of the control point of the upper left corner of the current block and the motion vector v1 of the control point of the upper right corner from the motion vectors v3 and v4 of the upper left corner and upper right corner of the coded block including block A. For example, the inter prediction unit 126 calculates the predicted motion vector v0 of the control point of the upper left corner of the current block and the predicted motion vector v1 of the control point of the upper right corner by projecting the motion vectors v3 and v4 of the upper left corner and upper right corner of the coded block onto the current block.

[0227] Alternatively, when block A is specified and block A has three control points, as shown in FIG. 26C, the inter prediction unit 126 calculates the motion vector v0 of the control point of the upper left corner of the current block, the motion vector v1 of the control point of the upper right corner, and the motion vector v2 of the control point of the lower left corner from the motion vectors v3, v4, and v5 of the upper left corner, upper right corner, and lower left corner of the coded block including block A. For example, the inter prediction unit 126 calculates the predicted motion vector v0 of the control point of the upper left corner of the current block, the predicted motion vector v1 of the control point of the upper right corner, and the motion vector v2 of the control point of the lower left corner by projecting the motion vectors v3, v4, and v5 of the upper left corner, upper right corner, and lower left corner of the coded block onto the current block.

[0228] Next, the inter prediction unit 126 performs motion compensation for each of the sub-blocks included in the current block. That is, for each of the sub-blocks, the inter prediction unit 126 calculates the motion vector of the sub-block as an affine MV using two predicted motion vectors v0 and v1 and the above formula (1A), or three predicted motion vectors v0, v1, and v2 and the above formula (1B) (step Sk_2). Then, the inter prediction unit 126 performs motion compensation for the sub-block using the affine MVs and the coded reference picture (step Sk_3). As a result, motion compensation is performed on the current block, and a predicted image of the current block is generated.

[0229] [MV Derivation > Affine Intermode] FIG. 28A is a conceptual diagram for explaining an affine inter mode having two control points.

[0230] In this affine inter mode, as shown in Figure 28A, a motion vector selected from the motion vectors of the coded blocks A, B, and C adjacent to the current block is used as a predicted motion vector v0 of the control point of the upper left corner of the current block. Similarly, a motion vector selected from the motion vectors of the coded blocks D and E adjacent to the current block is used as a predicted motion vector v1 of the control point of the upper right corner of the current block.

[0231] FIG. 28B is a conceptual diagram for explaining an affine inter mode having three control points.

[0232] In this affine inter mode, as shown in FIG. 28B, a motion vector selected from the motion vectors of the coded blocks A, B and C adjacent to the current block is used as the predicted motion vector v0 of the control point of the upper left corner of the current block. Similarly, a motion vector selected from the motion vectors of the coded blocks D and E adjacent to the current block is used as the predicted motion vector v1 of the control point of the upper right corner of the current block. Furthermore, a motion vector selected from the motion vectors of the coded blocks F and G adjacent to the current block is used as the predicted motion vector v2 of the control point of the lower left corner of the current block.

[0233] FIG. 29 is a flowchart showing an example of the affine inter mode.

[0234] As shown in the figure, in the affine inter mode, the inter prediction unit 126 first derives predicted MVs (v0, v1) or (v0, v1, v2) of two or three control points of the current block (step Sj_1). The control points are the upper left corner, upper right corner, or lower left corner of the current block, as shown in FIG. 25A or FIG. 25B.

[0235] That is, the inter prediction unit 126 derives the predicted motion vector (v0, v1) or (v0, v1, v2) of the control point of the current block by selecting the motion vector of any one of the coded blocks in the vicinity of each control point of the current block shown in Figure 28A or Figure 28B. At this time, the inter prediction unit 126 codes the predicted motion vector selection information for identifying the two selected motion vectors into a stream.

[0236] For example, the inter prediction unit 126 may use cost evaluation or the like to determine which motion vector of an encoded block adjacent to the current block to select as the predicted motion vector of the control point, and may write a flag indicating which predicted motion vector has been selected in the bitstream.

[0237] Next, the inter prediction unit 126 performs motion search (steps Sj_3 and Sj_4) while updating each of the predicted motion vectors selected or derived in step Sj_1 (step Sj_2). That is, the inter prediction unit 126 calculates the motion vector of each sub-block corresponding to the predicted motion vector to be updated as an affine MV using the above-mentioned formula (1A) or formula (1B) (step Sj_3). Then, the inter prediction unit 126 performs motion compensation for each sub-block using the affine MVs and the coded reference picture (step Sj_4). As a result, the inter prediction unit 126 determines, in the motion search loop, for example, the predicted motion vector that provides the smallest cost as the motion vector of the control point (step Sj_5). At this time, the inter prediction unit 126 further codes the difference value between the determined MV and the predicted motion vector as a differential MV into a stream.

[0238] Finally, the inter prediction unit 126 performs motion compensation on the current block using the determined MV and the encoded reference picture, thereby generating a predicted image of the current block (step Sj_6).

[0239] [MV Derivation > Affine Intermode] When affine modes with different numbers of control points (for example, two and three) are switched and signaled at the CU level, the number of control points may differ between the coded block and the current block. Figures 30A and 30B are conceptual diagrams for explaining a method of deriving a predicted vector of a control point when the number of control points differs between the coded block and the current block.

[0240] For example, as shown in FIG. 30A, when the current block has three control points, which are the upper left corner, the upper right corner and the lower left corner, and the block A adjacent to the left of the current block is coded in affine mode with two control points, motion vectors v3 and v4 are derived that are projected to the upper left corner and the upper right corner of the coded block including block A.Then, from the derived motion vectors v3 and v4, the predicted motion vector v0 of the control point of the upper left corner of the current block and the predicted motion vector v1 of the control point of the upper right corner are calculated.Furthermore, from the derived motion vectors v0 and v1, the predicted motion vector v2 of the control point of the lower left corner is calculated.

[0241] For example, as shown in Figure 30B, if the current block has two control points at the upper left corner and the upper right corner, and the block A adjacent to the left of the current block is coded in affine mode with three control points, motion vectors v3, v4 and v5 are derived by projecting the upper left corner, upper right corner and lower left corner positions of the coded block including block A. Then, the predicted motion vector v0 of the control point at the upper left corner of the current block and the predicted motion vector v1 of the control point at the upper right corner are calculated from the derived motion vectors v3, v4 and v5.

[0242] This prediction motion vector derivation method may be used to derive the prediction motion vector for each control point of the current block in step Sj_1 of FIG.

[0243] [MV Derivation > DMVR] FIG. 31A is a flowchart showing the relationship between the merge mode and the DMVR.

[0244] The inter prediction unit 126 derives a motion vector of the current block in merge mode (step Sl_1). Next, the inter prediction unit 126 determines whether or not to search for a motion vector, that is, to perform motion search (step Sl_2). Here, when the inter prediction unit 126 determines not to perform motion search (No in step Sl_2), it determines the motion vector derived in step Sl_1 as the final motion vector for the current block (step Sl_4). That is, in this case, the motion vector of the current block is determined in merge mode.

[0245] On the other hand, when it is determined in step Sl_1 that motion search is to be performed (Yes in step Sl_2), the inter prediction unit 126 derives a final motion vector for the current block by searching the surrounding area of ​​the reference picture indicated by the motion vector derived in step Sl_1 (step Sl_3). That is, in this case, the motion vector of the current block is determined by DMVR.

[0246] FIG. 31B is a conceptual diagram for explaining an example of DMVR processing for determining an MV.

[0247] First, the optimal MVP set for the current block (e.g., in merge mode) is set as the candidate MV. Then, according to the candidate MV(L0), reference pixels are identified from the first reference picture (L0), which is an encoded picture in the L0 direction. Similarly, according to the candidate MV(L1), reference pixels are identified from the second reference picture (L1), which is an encoded picture in the L1 direction. A template is generated by averaging these reference pixels.

[0248] Next, the template is used to search the surrounding areas of the candidate MVs in the first reference picture (L0) and the second reference picture (L1), and the MV with the smallest cost is determined as the final MV. Note that the cost value may be calculated using, for example, the difference value between each pixel value of the template and each pixel value of the search area, the candidate MV value, etc.

[0249] Typically, the encoding device and a decoding device (to be described later) basically have the same configuration and operation for the processes described here.

[0250] Any process may be used other than the process example described here as long as it is capable of searching the vicinity of the candidate MV and deriving the final MV.

[0251] [Motion compensation > BIO / OBMC] In motion compensation, there is a mode in which a predicted image is generated and the predicted image is corrected, such as BIO and OBMC, which will be described later.

[0252] FIG. 32 is a flowchart showing an example of generation of a predicted image.

[0253] The inter prediction unit 126 generates a predicted image (step Sm_1), and corrects the predicted image using, for example, any of the modes described above (step Sm_2).

[0254] FIG. 33 is a flowchart showing another example of generation of a predicted image.

[0255] The inter prediction unit 126 determines a motion vector of the current block (step Sn_1). Next, the inter prediction unit 126 generates a predicted image (step Sn_2) and determines whether or not to perform correction processing (step Sn_3). Here, if the inter prediction unit 126 determines that correction processing is to be performed (Yes in step Sn_3), it generates a final predicted image by correcting the predicted image (step Sn_4). On the other hand, if the inter prediction unit 126 determines that correction processing is not to be performed (No in step Sn_3), it outputs the predicted image as the final predicted image without correcting it (step Sn_5).

[0256] Furthermore, motion compensation has a mode in which luminance is corrected when generating a predicted image, such as LIC, which will be described later.

[0257] FIG. 34 is a flowchart showing another example of generation of a predicted image.

[0258] The inter prediction unit 126 derives a motion vector of the current block (step So_1). Next, the inter prediction unit 126 determines whether or not to perform luminance correction processing (step So_2). Here, if the inter prediction unit 126 determines to perform luminance correction processing (Yes in step So_2), it generates a predicted image while performing luminance correction (step So_3). That is, the predicted image is generated by LIC. On the other hand, if the inter prediction unit 126 determines not to perform luminance correction processing (No in step So_2), it generates a predicted image by normal motion compensation without performing luminance correction (step So_4).

[0259] [Motion Compensation > OBMC] An inter prediction signal may be generated using not only the motion information of the current block obtained by motion search, but also the motion information of adjacent blocks. Specifically, a prediction signal based on the motion information obtained by motion search (in the reference picture) and a prediction signal based on the motion information of adjacent blocks (in the current picture) may be weighted and added to generate an inter prediction signal for each sub-block in the current block. Such inter prediction (motion compensation) may be called OBMC (overlapped block motion compensation).

[0260] In the OBMC mode, information indicating the size of a sub-block for OBMC (e.g., called OBMC block size) may be signaled at the sequence level. Furthermore, information indicating whether the OBMC mode is applied (e.g., called OBMC flag) may be signaled at the CU level. Note that the signaling level of these pieces of information does not need to be limited to the sequence level and the CU level, and may be other levels (e.g., the picture level, slice level, tile level, CTU level, or sub-block level).

[0261] An example of the OBMC mode will now be described more specifically. Figures 35 and 36 are a flowchart and a conceptual diagram for explaining an overview of the predicted image correction process in the OBMC process.

[0262] First, as shown in Fig. 36, a predicted image (Pred) is obtained by normal motion compensation using a motion vector (MV) assigned to a processing target (current) block. In Fig. 36, the arrow "MV" indicates a reference picture, and indicates what the current block of the current picture refers to in order to obtain a predicted image.

[0263] Next, the motion vector (MV_L) already derived for the coded left adjacent block is applied (reused) to the block to be coded to obtain a predicted image (Pred_L). The motion vector (MV_L) is indicated by an arrow "MV_L" pointing from the current block to the reference picture. The first correction of the predicted image is then performed by superimposing the two predicted images Pred and Pred_L. This has the effect of blending the boundaries between the adjacent blocks.

[0264] Similarly, a motion vector (MV_U) already derived for the coded upper adjacent block is applied (reused) to the current block to obtain a predicted image (Pred_U). The motion vector (MV_U) is indicated by an arrow "MV_U" pointing from the current block to the reference picture. The predicted image Pred_U is then superimposed on the predicted images (e.g., Pred and Pred_L) that have been corrected the first time, thereby performing a second correction of the predicted image. This has the effect of blending the boundaries between the adjacent blocks. The predicted image obtained by the second correction is the final predicted image of the current block, with the boundaries with the adjacent blocks blended (smoothed).

[0265] Note that the above example is a two-pass correction method using the left adjacent and above adjacent blocks, but the correction method may also be a three-pass or more pass correction method using the right adjacent and / or below adjacent blocks.

[0266] The area in which overlapping is performed does not have to be the entire pixel area of ​​the block, but may be only a part of the area near the block boundary.

[0267] Here, the OBMC predicted image correction process for obtaining one predicted image Pred by superimposing additional predicted images Pred_L and Pred_U from one reference picture has been described. However, when the predicted image is corrected based on multiple reference pictures, the same process may be applied to each of the multiple reference pictures. In such a case, the OBMC image correction based on multiple reference pictures is performed to obtain a corrected predicted image from each reference picture, and then the obtained multiple corrected predicted images are further superimposed to obtain a final predicted image.

[0268] In addition, in OBMC, the unit of the target block may be a prediction block unit, or a sub-block unit obtained by further dividing the prediction block.

[0269] As a method of determining whether or not to apply OBMC processing, for example, there is a method of using obmc_flag, which is a signal indicating whether or not to apply OBMC processing. As a specific example, the encoding device may determine whether or not the target block belongs to an area with complex motion. If the target block belongs to an area with complex motion, the encoding device sets a value of 1 as obmc_flag and applies OBMC processing to perform encoding, and if the target block does not belong to an area with complex motion, the encoding device sets a value of 0 as obmc_flag and performs encoding of the block without applying OBMC processing. On the other hand, the decoding device decodes obmc_flag described in a stream (e.g., a compressed sequence), and switches whether or not to apply OBMC processing depending on the value to perform decoding.

[0270] In the above example, the inter prediction unit 126 generates one rectangular predicted image for the rectangular current block. However, the inter prediction unit 126 may generate multiple predicted images of shapes other than a rectangle for the rectangular current block, and combine the multiple predicted images to generate a final rectangular predicted image. The shape other than a rectangle may be, for example, a triangle.

[0271] FIG. 37 is a conceptual diagram for explaining generation of predicted images of two triangles.

[0272] The inter prediction unit 126 generates a predicted image of a triangle by performing motion compensation on a first partition of a triangle in the current block using a first MV of the first partition. Similarly, the inter prediction unit 126 generates a predicted image of a triangle by performing motion compensation on a second partition of a triangle in the current block using a second MV of the second partition. Then, the inter prediction unit 126 generates a predicted image of the same rectangle as the current block by combining these predicted images.

[0273] In the example shown in Fig. 37, the first partition and the second partition are each triangular, but they may be trapezoidal or may have different shapes. Furthermore, in the example shown in Fig. 37, the current block is composed of two partitions, but it may be composed of three or more partitions.

[0274] Also, the first partition and the second partition may overlap each other, i.e., the first partition and the second partition may include the same pixel area. In this case, the predicted image of the current block may be generated using the predicted image of the first partition and the predicted image of the second partition.

[0275] Furthermore, in this example, a predicted image is generated by inter prediction for both of the two partitions, but a predicted image may be generated by intra prediction for at least one partition.

[0276] [Motion compensation > BIO] Next, a method for deriving a motion vector will be described. First, a mode for deriving a motion vector based on a model assuming uniform linear motion will be described. This mode is sometimes called a BIO (bi-directional optical flow) mode.

[0277] Fig. 38 is a conceptual diagram for explaining a model assuming uniform linear motion. In Fig. 38, (vx, vy) indicates a velocity vector, and τ0 and τ1 indicate the temporal distance between the current picture (Cur Pic) and two reference pictures (Ref0, Ref1), respectively. (MVx0, MVy0) indicates a motion vector corresponding to the reference picture Ref0, and (MVx1, MVy1) indicates a motion vector corresponding to the reference picture Ref1.

[0278] In this case, under the assumption of uniform linear motion of the velocity vector (vx, vy), (MVx0, MVy0) and (MVx1, MVy1) are expressed as (vxτ0, vyτ0) and (-vxτ1, -vyτ1), respectively, and the following optical flow equation (2) may be adopted.

[0279]

number

[0280] Here, I(k) denotes the luminance value of reference image k (k=0,1) after motion compensation. This optical flow equation indicates that the sum of (i) the time derivative of the luminance value, (ii) the product of the horizontal velocity and the horizontal component of the spatial gradient of the reference image, and (iii) the product of the vertical velocity and the vertical component of the spatial gradient of the reference image is equal to zero. Based on a combination of this optical flow equation and Hermite interpolation, block-wise motion vectors obtained from a merge list or the like may be corrected pixel by pixel.

[0281] Note that the decoding device may derive a motion vector using a method other than the method based on a model assuming uniform linear motion. For example, a motion vector may be derived for each sub-block based on the motion vectors of multiple adjacent blocks.

[0282] [Motion Compensation > LIC] Next, an example of a mode in which a predicted image (prediction) is generated using LIC (local illumination compensation) processing will be described.

[0283] FIG. 39 is a conceptual diagram for explaining an example of a predicted image generating method using a luminance correction process by LIC processing.

[0284] First, the MV is derived from the coded reference picture to obtain the reference image corresponding to the current block.

[0285] Next, extract information indicating how the luminance value of the current block has changed between the reference picture and the current picture. This extraction is performed based on the luminance pixel values ​​of the coded left adjacent reference area (peripheral reference area) and the coded upper adjacent reference area (peripheral reference area) in the current picture, and the luminance pixel values ​​at the equivalent positions in the reference picture specified by the derived MV. Then, calculate a luminance correction parameter using the information indicating how the luminance value has changed.

[0286] A luminance correction process is performed by applying the luminance correction parameters to a reference image in a reference picture specified by the MV, thereby generating a predicted image for the current block.

[0287] It should be noted that the shape of the surrounding reference region in FIG. 39 is just an example, and other shapes may be used.

[0288] Although the process of generating a predicted image from one reference picture has been described here, the process is similar when generating a predicted image from multiple reference pictures, and a luminance correction process may be performed on the reference images obtained from each reference picture in a manner similar to that described above before generating a predicted image.

[0289] As a method of determining whether or not to apply LIC processing, for example, there is a method of using lic_flag, which is a signal indicating whether or not to apply LIC processing. As a specific example, in an encoding device, it is determined whether or not the current block belongs to an area where a luminance change occurs, and if it belongs to an area where a luminance change occurs, a value of 1 is set as lic_flag and encoding is performed by applying LIC processing, and if it does not belong to an area where a luminance change occurs, a value of 0 is set as lic_flag and encoding is performed without applying LIC processing. On the other hand, a decoding device may decode lic_flag described in a stream, and switch whether or not to apply LIC processing depending on the value and perform decoding.

[0290] Another method of determining whether to apply LIC processing is, for example, a method of determining according to whether LIC processing has been applied to surrounding blocks.As a specific example, when the current block is in merge mode, it is determined whether the surrounding coded blocks selected when deriving MV in merge mode processing have been coded by applying LIC processing.Depending on the result, it is switched to whether to apply LIC processing and performs coding.In this example, the same processing is also applied to the processing on the decoding device side.

[0291] The aspect of the LIC process (luminance correction process) has been described with reference to FIG. 39, and will be described in detail below.

[0292] First, the inter prediction unit 126 derives a motion vector for obtaining a reference image corresponding to the current block to be coded from a reference picture that is a coded picture.

[0293] Next, the inter prediction unit 126 uses the luminance pixel values ​​of the coded surrounding reference areas adjacent to the left and above the coding target block and the luminance pixel values ​​at the equivalent positions in the reference picture specified by the motion vector to extract information indicating how the luminance values ​​have changed between the reference picture and the coding target picture, and calculates a luminance correction parameter. For example, the luminance pixel value of a pixel in the surrounding reference area in the coding target picture is set to p0, and the luminance pixel value of a pixel in the surrounding reference area in the reference picture at the equivalent position to the pixel is set to p1. The inter prediction unit 126 calculates coefficients A and B that optimize A×p1+B=p0 for multiple pixels in the surrounding reference areas as the luminance correction parameter.

[0294] Next, the inter prediction unit 126 performs luminance correction processing on a reference image in a reference picture specified by the motion vector using the luminance correction parameter to generate a predicted image for the block to be coded. For example, the luminance pixel value in the reference image is p2, and the luminance pixel value of the predicted image after the luminance correction processing is p3. The inter prediction unit 126 calculates A×p2+B=p3 for each pixel in the reference image to generate a predicted image after the luminance correction processing.

[0295] The shape of the surrounding reference area in FIG. 39 is an example, and other shapes may be used. A part of the surrounding reference area shown in FIG. 39 may be used. For example, an area including a predetermined number of pixels thinned out from each of the upper adjacent pixel and the left adjacent pixel may be used as the surrounding reference area. The surrounding reference area is not limited to an area adjacent to the encoding target block, and may be an area not adjacent to the encoding target block. The predetermined number of pixels may be determined in advance.

[0296] In the example shown in Figure 39, the surrounding reference area in the reference picture is an area specified by the motion vector of the encoding target picture from the surrounding reference area in the encoding target picture, but may be an area specified by another motion vector. For example, the other motion vector may be the motion vector of the surrounding reference area in the encoding target picture.

[0297] Although the operation of the encoding device 100 has been described above, the operation of the decoding device 200 is typically similar.

[0298] The LIC process may be applied to color difference instead of luminance. In this case, correction parameters may be derived separately for each of Y, Cb, and Cr, or a common correction parameter may be used for any of them.

[0299] Alternatively, the LIC process may be applied on a subblock basis. For example, the correction parameters may be derived using a surrounding reference region of the current subblock and a surrounding reference region of a reference subblock in a reference picture specified by the MV of the current subblock.

[0300] [Predictive control unit] The prediction control unit 128 selects either an intra-prediction signal (a signal output from the intra-prediction unit 124) or an inter-prediction signal (a signal output from the inter-prediction unit 126), and outputs the selected signal to the subtraction unit 104 and the addition unit 116 as a prediction signal.

[0301] As shown in FIG. 1, in various exemplary encoding devices, the prediction control unit 128 may output prediction parameters to be input to the entropy coding unit 110. The entropy coding unit 110 may generate an encoded bitstream (or sequence) based on the prediction parameters input from the prediction control unit 128 and the quantization coefficients input from the quantization unit 108. The prediction parameters may be used by a decoding device. The decoding device may receive and decode the encoded bitstream and perform the same prediction process as that performed in the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128. The prediction parameters may include a selected prediction signal (e.g., a motion vector, a prediction type, or a prediction mode used in the intra prediction unit 124 or the inter prediction unit 126), or any index, flag, or value based on or indicating the prediction process performed in the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128.

[0302] [Example of an implementation of an encoding device] 40 is a block diagram showing an implementation example of the encoding device 100. The encoding device 100 includes a processor a1 and a memory a2. For example, several components of the encoding device 100 shown in FIG. 1 are implemented by the processor a1 and the memory a2 shown in FIG.

[0303] The processor a1 is a circuit that performs information processing and is a circuit that can access the memory a2. For example, the processor a1 is a dedicated or general-purpose electronic circuit that encodes moving images. The processor a1 may be a processor such as a CPU. The processor a1 may also be a collection of multiple electronic circuits. For example, the processor a1 may play the role of multiple components among multiple components of the encoding device 100 shown in FIG. 1 etc.

[0304] The memory a2 is a dedicated or general-purpose memory in which information for the processor a1 to encode a moving image is stored. The memory a2 may be an electronic circuit and may be connected to the processor a1. The memory a2 may be included in the processor a1. The memory a2 may be a collection of multiple electronic circuits. The memory a2 may be a magnetic disk or an optical disk, etc., and may be expressed as a storage or a recording medium, etc. The memory a2 may be a non-volatile memory or a volatile memory.

[0305] For example, the memory a2 may store a video to be encoded, or a bit string corresponding to the encoded video, or may store a program for the processor a1 to encode the video.

[0306] Also, for example, the memory a2 may play the role of a component for storing information among the multiple components of the encoding device 100 shown in Fig. 1 etc. For example, the memory a2 may play the role of the block memory 118 and the frame memory 122 shown in Fig. 1. More specifically, the memory a2 may store reconstructed blocks, reconstructed pictures, etc.

[0307] It should be noted that not all of the components shown in Fig. 1 and the like may be implemented, and not all of the processes described above may be performed, in the encoding device 100. Some of the components shown in Fig. 1 and the like may be included in another device, and some of the processes described above may be executed by another device.

[0308] [Decryption device] Next, a description will be given of a decoding device capable of decoding a coded signal (coded bit stream) output from, for example, the above coding device 100. Fig. 41 is a block diagram showing a functional configuration of a decoding device 200 according to an embodiment. The decoding device 200 is a video decoding device that decodes a video on a block-by-block basis.

[0309] As shown in FIG. 41, the decoding device 200 includes an entropy decoding unit 202, an inverse quantization unit 204, an inverse transform unit 206, an addition unit 208, a block memory 210, a loop filter unit 212, a frame memory 214, an intra prediction unit 216, an inter prediction unit 218, and a prediction control unit 220.

[0310] The decoding device 200 is realized by, for example, a general-purpose processor and a memory. In this case, when the software program stored in the memory is executed by the processor, the processor functions as the entropy decoding unit 202, the inverse quantization unit 204, the inverse transform unit 206, the addition unit 208, the loop filter unit 212, the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220. The decoding device 200 may also be realized as one or more dedicated electronic circuits corresponding to the entropy decoding unit 202, the inverse quantization unit 204, the inverse transform unit 206, the addition unit 208, the loop filter unit 212, the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220.

[0311] Below, the overall processing flow of the decoding device 200 will be described, and then each component included in the decoding device 200 will be described.

[0312] [Overall flow of decryption process] FIG. 42 is a flowchart showing an example of the overall decoding process by the decoding device 200.

[0313] First, the entropy decoding unit 202 of the decoding device 200 identifies a division pattern of fixed-size blocks (e.g., 128×128 pixels) (step Sp_1). This division pattern is the division pattern selected by the encoding device 100. Then, the decoding device 200 performs the processes of steps Sp_2 to Sp_6 on each of the multiple blocks constituting the division pattern.

[0314] That is, the entropy decoding unit 202 decodes (specifically, entropy decodes) the coded quantized coefficients and prediction parameters of the block to be decoded (also called the current block) (step Sp_2).

[0315] Next, the inverse quantization unit 204 and the inverse transform unit 206 perform inverse quantization and inverse transform on the multiple quantized coefficients to reconstruct multiple prediction residuals (that is, difference blocks) (step Sp_3).

[0316] Next, a prediction processing unit consisting of all or a part of the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 generates a prediction signal (also called a prediction block) of the current block (step Sp_4).

[0317] Next, the adder 208 reconstructs the current block into a reconstructed image (also called a decoded image block) by adding the predicted block to the difference block (step Sp_5).

[0318] Then, when this reconstructed image is generated, the loop filter unit 212 performs filtering on the reconstructed image (step Sp_6).

[0319] Then, the decoding device 200 determines whether or not the decoding of the entire picture is completed (step Sp_7), and if it determines that the decoding is not completed (No in step Sp_7), it repeats the process from step Sp_1.

[0320] As illustrated, the processes of steps Sp_1 to Sp_7 are sequentially performed by the decoding device 200. Alternatively, some of the processes may be performed in parallel, or the order of the processes may be changed.

[0321] [Entropy Decoding Part] The entropy decoding unit 202 entropy decodes the coded bitstream. Specifically, for example, the entropy decoding unit 202 arithmetically decodes the coded bitstream into a binary signal. Then, the entropy decoding unit 202 debinarizes the binary signal. The entropy decoding unit 202 outputs the quantization coefficients to the inverse quantization unit 204 on a block-by-block basis. The entropy decoding unit 202 may output prediction parameters included in the coded bitstream (see FIG. 1) to the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 in the embodiment. The intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220 can execute the same prediction process as the process executed by the intra prediction unit 124, the inter prediction unit 126, and the prediction control unit 128 on the coding device side.

[0322] [Dequantization section] The inverse quantization unit 204 inverse quantizes the quantized coefficients of a block to be decoded (hereinafter, referred to as a current block) that is input from the entropy decoding unit 202. Specifically, the inverse quantization unit 204 inverse quantizes each quantized coefficient of the current block based on a quantization parameter corresponding to the quantized coefficient. Then, the inverse quantization unit 204 outputs the inverse quantized quantized coefficients (i.e., transform coefficients) of the current block to the inverse transform unit 206.

[0323] [Inverse conversion section] The inverse transform unit 206 restores the prediction error by inverse transforming the transform coefficients input from the inverse quantization unit 204 .

[0324] For example, if the information interpreted from the encoded bitstream indicates that EMT or AMT is to be applied (e.g., the AMT flag is true), the inverse transform unit 206 inverse transforms the transform coefficients of the current block based on the interpreted information indicating the transform type.

[0325] Also for example, if the information interpreted from the encoded bitstream indicates to apply NSST, then inverse transform unit 206 applies an inverse re-transform to the transform coefficients.

[0326] [Addition section] The adder 208 reconstructs the current block by adding the prediction error, which is an input from the inverse transformer 206, and the prediction sample, which is an input from the prediction control unit 220. The adder 208 then outputs the reconstructed block to the block memory 210 and the loop filter unit 212.

[0327] [Block memory] The block memory 210 is a storage unit for storing blocks that are referenced in intra prediction and are in a picture to be decoded (hereinafter, referred to as a current picture). Specifically, the block memory 210 stores the reconstructed block output from the adder 208.

[0328] [Loop filter section] The loop filter unit 212 applies a loop filter to the block reconstructed by the adder unit 208, and outputs the filtered reconstructed block to a frame memory 214, a display device, or the like.

[0329] If the information indicating ALF on / off read from the encoded bitstream indicates ALF on, one filter is selected from among multiple filters based on the local gradient direction and activity, and the selected filter is applied to the reconstructed block.

[0330] [Frame memory] The frame memory 214 is a storage unit for storing reference pictures used in inter prediction, and may be called a frame buffer. Specifically, the frame memory 214 stores the reconstructed blocks filtered by the loop filter unit 212.

[0331] [Prediction processing unit (intra prediction unit, inter prediction unit, prediction control unit)] 43 is a flowchart showing an example of processing performed in the prediction processing unit of the decoding device 200. Note that the prediction processing unit is made up of all or some of the components of the intra prediction unit 216, the inter prediction unit 218, and the prediction control unit 220.

[0332] The prediction processing unit generates a prediction image of the current block (step Sq_1). This prediction image is also called a prediction signal or a prediction block. The prediction signal includes, for example, an intra prediction signal or an inter prediction signal. Specifically, the prediction processing unit generates a prediction image of the current block using a reconstructed image that has already been obtained by generating a prediction block, generating a difference block, generating a coefficient block, restoring the difference block, and generating a decoded image block.

[0333] The reconstructed image may be, for example, an image of a reference picture, or an image of a decoded block in a current picture, which is a picture that includes the current block. The decoded block in the current picture may be, for example, a neighboring block of the current block.

[0334] FIG. 44 is a flowchart showing another example of the process performed by the prediction processing unit of the decoding device 200.

[0335] The prediction processing unit determines a method or mode for generating a predicted image (step Sr_1). For example, the method or mode may be determined based on prediction parameters, for example.

[0336] When the prediction processing unit determines the first method as the mode for generating the predicted image, the prediction processing unit generates the predicted image according to the first method (step Sr_2a). When the prediction processing unit determines the second method as the mode for generating the predicted image, the prediction processing unit generates the predicted image according to the second method (step Sr_2b). When the prediction processing unit determines the third method as the mode for generating the predicted image, the prediction processing unit generates the predicted image according to the third method (step Sr_2c).

[0337] The first method, the second method, and the third method are different methods for generating a predicted image, and may be, for example, an inter-prediction method, an intra-prediction method, and other prediction methods. These prediction methods may use the above-mentioned reconstructed image.

[0338] [Intra prediction section] The intra prediction unit 216 generates a prediction signal (intra prediction signal) by performing intra prediction with reference to a block in the current picture stored in the block memory 210 based on an intra prediction mode interpreted from the encoded bit stream. Specifically, the intra prediction unit 216 generates an intra prediction signal by performing intra prediction with reference to samples (e.g., luminance values, chrominance values) of blocks adjacent to the current block, and outputs the intra prediction signal to the prediction control unit 220.

[0339] Note that, when an intra prediction mode that references a luminance block in intra prediction of a chrominance block is selected, the intra prediction unit 216 may predict the chrominance component of the current block based on the luminance component of the current block.

[0340] Furthermore, when information interpreted from the encoded bitstream indicates the application of PDPC, the intra prediction unit 216 corrects pixel values ​​after intra prediction based on the gradients of reference pixels in the horizontal / vertical directions.

[0341] [Inter prediction section] The inter prediction unit 218 predicts the current block by referring to a reference picture stored in the frame memory 214. The prediction is performed in units of the current block or sub-blocks (e.g., 4x4 blocks) in the current block. For example, the inter prediction unit 218 generates an inter prediction signal of the current block or sub-block by performing motion compensation using motion information (e.g., motion vectors) interpreted from the encoded bit stream (e.g., prediction parameters output from the entropy decoding unit 202), and outputs the inter prediction signal to the prediction control unit 220.

[0342] If the information interpreted from the encoded bitstream indicates that the OBMC mode is to be applied, the inter prediction unit 218 generates an inter prediction signal using not only the motion information of the current block obtained by motion search, but also the motion information of adjacent blocks.

[0343] Also, if the information interpreted from the encoded bitstream indicates that the FRUC mode is applied, the inter prediction unit 218 derives motion information by performing motion search according to the pattern matching method (bilateral matching or template matching) interpreted from the encoded bitstream. Then, the inter prediction unit 218 performs motion compensation (prediction) using the derived motion information.

[0344] In addition, when the BIO mode is applied, the inter prediction unit 218 derives a motion vector based on a model assuming uniform linear motion. In addition, when information interpreted from the encoded bitstream indicates that an affine motion compensation prediction mode is applied, the inter prediction unit 218 derives a motion vector on a sub-block basis based on the motion vectors of multiple adjacent blocks.

[0345] [MV Derivation > Normal Inter Mode] If the information interpreted from the encoded bitstream indicates that normal inter mode is to be applied, the inter prediction unit 218 derives an MV based on the information interpreted from the encoded bitstream, and performs motion compensation (prediction) using the MV.

[0346] FIG. 45 is a flowchart showing an example of inter prediction in the normal inter mode in the decoding device 200.

[0347] The inter prediction unit 218 of the decoding device 200 performs motion compensation for each block. The inter prediction unit 218 obtains multiple candidate MVs for the current block based on information such as MVs of multiple decoded blocks around the current block in time or space (step Ss_1). That is, the inter prediction unit 218 creates a candidate MV list.

[0348] Next, the inter prediction unit 218 extracts N candidate MVs (N is an integer equal to or greater than 2) from the multiple candidate MVs acquired in step Ss_1 as motion vector predictor candidates (also called prediction MV candidates) according to a predetermined priority order (step Ss_2). Note that the priority order may be predefined for each of the N prediction MV candidates.

[0349] Next, the inter prediction unit 218 decodes the predicted motion vector selection information from the input stream (i.e., the encoded bit stream), and uses the decoded predicted motion vector selection information to select one predicted MV candidate from the N predicted MV candidates as the predicted motion vector (also called predicted MV) of the current block (step Ss_3).

[0350] Next, the inter prediction unit 218 decodes the differential MV from the input stream, and derives the MV of the current block by adding the differential value, which is the decoded differential MV, to the selected predicted motion vector (step Ss_4).

[0351] Finally, the inter prediction unit 218 performs motion compensation on the current block using the derived MV and the decoded reference picture to generate a predicted image of the current block (step Ss_5).

[0352] [Predictive control unit] The prediction control unit 220 selects either the intra prediction signal or the inter prediction signal, and outputs the selected signal as a prediction signal to the adder unit 208. Overall, the configurations, functions, and processing of the prediction control unit 220, the intra prediction unit 216, and the inter prediction unit 218 on the decoding device side may correspond to the configurations, functions, and processing of the prediction control unit 128, the intra prediction unit 124, and the inter prediction unit 126 on the encoding device side.

[0353] [Example of implementation of a decryption device] Fig. 46 is a block diagram showing an implementation example of the decoding device 200. The decoding device 200 includes a processor b1 and a memory b2. For example, several components of the decoding device 200 shown in Fig. 41 are implemented by the processor b1 and the memory b2 shown in Fig. 46.

[0354] The processor b1 is a circuit that performs information processing and is a circuit that can access the memory b2. For example, the processor b1 is a dedicated or general-purpose electronic circuit that decodes encoded video (i.e., an encoded bitstream). The processor b1 may be a processor such as a CPU. The processor b1 may also be a collection of multiple electronic circuits. For example, the processor b1 may play the role of multiple components among multiple components of the decoding device 200 shown in FIG. 41 etc.

[0355] The memory b2 is a dedicated or general-purpose memory in which information for the processor b1 to decode the encoded bit stream is stored. The memory b2 may be an electronic circuit and may be connected to the processor b1. The memory b2 may be included in the processor b1. The memory b2 may be a collection of multiple electronic circuits. The memory b2 may be a magnetic disk or an optical disk, etc., and may be expressed as a storage or a recording medium, etc. The memory b2 may be a non-volatile memory or a volatile memory.

[0356] For example, the memory b2 may store a video image or a coded bitstream, and may store a program for the processor b1 to decode the coded bitstream.

[0357] Also, for example, the memory b2 may play the role of a component for storing information among the multiple components of the decoding device 200 shown in Fig. 41 etc. Specifically, the memory b2 may play the role of the block memory 210 and the frame memory 214 shown in Fig. 41. More specifically, the memory b2 may store reconstructed blocks, reconstructed pictures, etc.

[0358] Note that not all of the components shown in Fig. 41 and the like may be implemented, and not all of the above-described processes may be performed, in the decoding device 200. Some of the components shown in Fig. 41 and the like may be included in another device, and some of the above-described processes may be executed by another device.

[0359] [Definition of each term] As an example, each term may be defined as follows:

[0360] A picture is an array of luma samples in monochrome format, or two corresponding arrays of luma samples and chroma samples in 4:2:0, 4:2:2 and 4:4:4 color formats. A picture may be a frame or a field.

[0361] A frame is a composition of a top field from which a number of sample rows occur: 0, 2, 4, . . . and a bottom field from which a number of sample rows occur: 1, 3, 5, . . .

[0362] A slice is an integer number of coding tree units contained in one independent slice segment and all subsequent dependent slice segments (if any) that precede the next independent slice segment (if any) within the same access unit.

[0363] A tile is a rectangular region of multiple coding tree blocks in a particular tile column and a particular tile row in a picture. A tile may also be a rectangular region of a frame that is intended to be decoded and coded independently, although loop filters across tile edges may still be applied.

[0364] A block is an MxN (N rows and M columns) array of samples, or an MxN array of transform coefficients. A block may be a square or rectangular region of pixels consisting of one luma and two chroma matrices.

[0365] A CTU (coding tree unit) may be a coding tree block of luma samples for a picture with three sample arrangements, or two corresponding coding tree blocks of chroma samples, or a coding tree block of samples for either monochrome pictures or pictures coded with three separated color planes and a syntax structure used for coding the samples.

[0366] A superblock may comprise one or two mode information blocks, or may be a square block of 64x64 pixels that can be recursively divided into four 32x32 blocks and further divided.

[0367] (Embodiment 2) The coding device 100 in this embodiment has the same configuration as that in embodiment 1. Moreover, the quantization unit 108, the inverse quantization unit 112, and the entropy coding unit 110 of the coding device 100 in this embodiment have additional functions or alternative functions to those in embodiment 1. Similarly, the decoding device 200 in this embodiment has the same configuration as that in embodiment 1, and the inverse quantization unit 204 and the entropy decoding unit 202 of the decoding device 200 in this embodiment have additional functions or alternative functions to those in embodiment 1.

[0368] For example, the quantization unit 108 in this embodiment performs DQ (Dependent Quantization), and the inverse quantization units 112 and 204 in this embodiment perform inverse quantization corresponding to DQ. Also, the entropy coding unit 110 in this embodiment arithmetically codes the quantized coefficients using the flags, and the entropy decoding unit 202 arithmetically decodes the arithmetically coded quantized coefficients using the flags.

[0369] The following first to third aspects are specific aspects of the processing performed by the encoding device 100 and the decoding device 200 in this embodiment.

[0370] [First aspect] <Overview of Coefficient Coding> The entropy coding unit 110 of the coding device 100 in this embodiment converts the above-mentioned quantized coefficients into a format using at least one flag (hereinafter, referred to as flag format), and performs arithmetic coding on the quantized coefficients in that format. Note that the quantized coefficients are values ​​obtained by converting and quantizing prediction residuals generated by inter prediction or intra prediction. The quantized coefficients are also referred to as residual coefficients. In the following description, the quantized coefficients are also simply referred to as coefficients.

[0371] The entropy encoding unit 110 converts the coefficients into a flag format using at least one of significant_flag (hereinafter, referred to as sig_flag), parity_flag, greater1_flag (hereinafter, referred to as gt1_flag), greater2_flag (hereinafter, referred to as gt2_flag), and remainder.

[0372] sig_flag is a flag indicating whether or not the coefficient is 0. For example, if the coefficient is 0, sig_flag indicates 0, and if the coefficient is not 0, sig_flag indicates 1.

[0373] Parity_flag is a flag used when a coefficient is not 0, and indicates whether the coefficient is even or odd. In other words, parity_flag is a flag that indicates whether the first bit (e.g., the least significant bit) of a coefficient is 0 or 1. For example, if the coefficient is even, parity_flag indicates 1, and if the coefficient is odd, parity_flag indicates 0. Also, parity_flag is used together with sig_flag, and together with sig_flag, indicates a value between 1 and 2.

[0374] gt1_flag is a flag used when a coefficient is not 0, and indicates whether the absolute value of the coefficient is, for example, greater than or equal to 3. For example, if the absolute value of the coefficient is greater than or equal to 3, gt1_flag indicates 1, and if the absolute value of the coefficient is not greater than or equal to 3, gt1_flag indicates 0.

[0375] gt2_flag is a flag used when the absolute value of a coefficient is 3 or more (i.e., when gt1_flag=1), and indicates whether the absolute value of the coefficient is, for example, 5 or more. For example, if the absolute value of the coefficient is 5 or more, gt2_flag indicates 1, and if the absolute value of the coefficient is not 5 or more, gt2_flag indicates 0.

[0376] The remainder is a value indicated by, for example, (AbsLevel-5) / 2, which is used for coefficients with gt2_flag=1. Note that AbsLevel is the absolute value of the coefficient. Also, the decimal part of (AbsLevel-5) / 2 may be truncated.

[0377] Therefore, the entropy decoding unit 202 calculates the AbsLevel by "AbsLevel=sig_flag+parity_flag+2*gt1_flag+2*gt2_flag+2*remainder".

[0378] In the H.265 / HEVC standard, parity_flag is not used. Therefore, in entropy decoding, AbsLevel is calculated by "AbsLevel=sig_flag+gt1_flag+gt2_flag+remainder".

[0379] Here, the parity_flag may be used for example in the above-mentioned DQ.

[0380] FIG. 47 is a diagram for explaining an overview of DQ (Dependent Quantization).

[0381] The quantization unit 108 of the encoding device 100 switches between two different quantizers. Note that these two quantizers use two different quantization methods, respectively, and therefore it can be said that the quantization unit 108 switches between two different quantization methods.

[0382] As shown in FIG. 47, the two quantizers are a first quantizer Q0 and a second quantizer Q1. The first quantizer Q0 uses equally spaced quantization widths determined by the quantization parameters, and the second quantizer Q1 uses at least two quantization widths that are different from each other. In a specific example, as shown in FIG. 47, the quantization widths used in the range between the numerical value "0" and the numerical value "1" and the range between the numerical value "0" and the numerical value "-1" in the second quantizer Q1 are half the quantization widths used outside these ranges. For example, when using the first quantizer Q0, the inverse quantization units 112 and 204 inverse quantize the numerical values ​​"1", "2", and "3" included in the bit stream to "12", "24", and "36", respectively. On the other hand, when the inverse quantization units 112 and 204 use the second quantizer Q1, they inverse quantize the numerical values ​​"1," "2," and "3" contained in the bit stream to "6," "18," and "30," respectively.

[0383] Figures 48 and 49 are diagrams showing an example of state transition of the quantization unit 108. Specifically, Figure 48 is a diagram visually showing the state transition. Figure 49 is a diagram showing the state transition in a two-dimensional table format, showing the state before the transition and the state after the transition determined by the quantization coefficient.

[0384] The quantization unit 108 can take four states. The four states are state=0, 1, 2, and 3. When state=0 or 1, the quantization unit 108 performs quantization using the first quantizer Q0, and when state=2 or 3, the quantization unit 108 performs quantization using the second quantizer Q1.

[0385] In the initial state, for example, state=0. At this time, the quantization unit 108 obtains a quantization coefficient k by quantizing the first pre-quantization coefficient in the scan order using the first quantizer Q0. The pre-quantization coefficient is a coefficient before quantization is performed, and is the above-mentioned transform coefficient. As a result, if the first bit of the quantization coefficient k is 0, the quantization unit 108 transitions to state=0, and if the first bit of the quantization coefficient k is 1, the quantization unit 108 transitions to state=2. Therefore, the quantization unit 108 obtains a new quantization coefficient k by quantizing the next pre-quantization coefficient in the scan order using the quantizer corresponding to the state after the transition. In this way, every time the quantization unit 108 obtains a new quantization coefficient k, the quantization unit 108 performs a state transition depending on whether the first bit of the quantization coefficient k is 0 or 1.

[0386] Although quantization section 108 uses two quantizers in DQ, it may use three or more quantizers and may perform state transitions different from those in FIGS.

[0387] Furthermore, the above-mentioned parity_flag indicates whether the first bit of the quantization coefficient k is 0 or 1. Therefore, in DQ, the quantization unit 108 may determine the quantizer to be used for the next pre-quantization coefficient according to the parity_flag.

[0388] Similarly to the quantization unit 108, the inverse quantization units 112 and 204 also perform state transitions using a plurality of quantizers in DQ.

[0389] FIG. 50 is a diagram showing an example of binarization of remainder.

[0390] The entropy coding unit 110 codes the remainder using Golomb-Rice coding. The entropy coding unit 110 also switches the coding method of the remainder, for example, by a rice parameter. For example, the rice parameter can take three values, such as g=0, 1, and 2. Note that g is a variable indicating the rice parameter. Therefore, the entropy coding unit 110 selects an encoding method according to the value indicated by the rice parameter from among the three encoding methods, and codes the remainder using the encoding method. Note that the encoding method can also be called a binarization method.

[0391] Furthermore, the entropy coding unit 110 binarizes the remainder using a prefix and a suffix in the Golomb-Rice code. The Rice coding is used for the prefix, and the unary code and the exponential-Golomb code are used for the suffix.

[0392] For example, as shown in Fig. 50, when the Rice parameter is g = 0, the entropy coding unit 110 binarizes the remainder using a prefix without using a suffix. On the other hand, when the Rice parameter is g = 1 or 2, the entropy coding unit 110 binarizes the remainder using a prefix and a suffix.

[0393] Also, in the example shown in Fig. 50, the smaller the value of remainder, the less the number of bits the encoding method with g=0 can binarize the remainder into than the other encoding methods. Conversely, the larger the value of remainder, the less the number of bits the encoding method with g=2 can binarize the remainder into than the other encoding methods. Also, if the value of remainder is neither small nor large, the encoding method with g=1 can binarize the remainder into fewer bits than the other encoding methods.

[0394] 50, the rice parameter can take three values, but may take four or more values. In this case, the entropy coding unit 110 selects an encoding method according to the rice parameter from four or more encoding methods (i.e., binarization methods), and encodes the remainder using the selected encoding method.

[0395] Similarly to the entropy coding unit 110, the entropy decoding unit 202 may also switch the decoding method (specifically, the multi-value conversion method) depending on the Rice parameter.

[0396] Fig. 51 is a diagram for explaining a method for determining the Rice parameter. Specifically, Fig. 51 shows a coefficient to be coded (black rectangle in Fig. 51) among the coefficients included in a block (e.g., a transform unit) and five coefficients surrounding the coefficient to be coded (hatched rectangles in Fig. 51).

[0397] For example, when the entropy coding unit 110 codes a coefficient to be coded, it determines a Rice parameter for the coefficient to be coded using five coefficients (hereinafter, referred to as peripheral coefficients) surrounding the coefficient. The five peripheral coefficients include two coefficients arranged horizontally to the right of the coefficient to be coded, two coefficients arranged vertically below the coefficient to be coded, and one coefficient located to the lower right of the coefficient to be coded. In coding, these five peripheral coefficients are coded before the coefficient to be coded, and in decoding, these five peripheral coefficients are decoded before the coefficient to be decoded (the same coefficient as the coefficient to be coded).

[0398] In order to determine the Rice parameter, the entropy coding unit 110 calculates sum_minus1 by sum_minus1=sum_abs-num_sig. sum_abs is the absolute value of the sum of the five peripheral coefficients. num_sig is the number of non-zero coefficients among the five peripheral coefficients. Note that the method of deriving sum_minus1 described here is an example, and it may be derived using a method other than this. For example, sum_minus1 may be derived by sum_minus1=sum_abs without using num_sig, or sum_minus1 may be derived by sum_minus1=sum_abs-offset value using another offset value instead of num_sig.

[0399] According to this calculation, the entropy coding unit 110 determines the Rice parameter to be g=0 when sum_minus1<12. Moreover, the entropy coding unit 110 determines the Rice parameter to be g=1 when 12≦sum_minus1<25. Moreover, the entropy coding unit 110 determines the Rice parameter to be g=2 when 25≦sum_minus1. The entropy coding unit 110 selects an encoding method corresponding to the Rice parameter thus determined, and performs Golomb-Rice encoding on the remainder, that is, (AbsLevel-5) / 2, using the encoding method.

[0400] FIG. 52 is a diagram showing the code length (i.e., the number of bits) of a binary signal obtained by Golomb-Rice coding of remainder.

[0401] For example, the code length of a binary signal obtained by Golomb-Rice coding with remainder=0 is 1 when the Rice parameter is g=0, 2 when the Rice parameter is g=1, and 3 when the Rice parameter is g=2. The code length of a binary signal obtained by Golomb-Rice coding with remainder=1 is 2 when the Rice parameter is g=0, 2 when the Rice parameter is g=1, and 3 when the Rice parameter is g=2. The code length of a binary signal obtained by Golomb-Rice coding with remainder=6 is 7 when the Rice parameter is g=0, 5 when the Rice parameter is g=1, and 4 when the Rice parameter is g=2.

[0402] Here, when sum_minus1<12, the above-mentioned five peripheral coefficients are considered to have an average value of approximately 3 to 4 or less. As a result, the coefficient to be coded is likely to be close to the five peripheral coefficients and larger than the peripheral coefficients, so it is predicted to be 5 or 6. Therefore, since gt1_flag and gt2_flag are used in the flag format of the coefficient to be coded, the remainder of the coefficient is predicted to be remainder=0. For example, in the example shown in FIG. 52, when remainder=0, the entropy coding unit 110 selects g=0 as the Rice parameter to minimize the code length of the binary signal.

[0403] Also, when 12≦sum_minus1<25, the above-mentioned five surrounding coefficients are considered to have an average value of about 3 to 5. As a result, the coefficient to be coded is likely to be close to the five surrounding coefficients and larger than the surrounding coefficients, so it is predicted to be 7 or 8. Therefore, since gt1_flag and gt2_flag are used in the flag format of the coefficient to be coded, the remainder of the coefficient is predicted to be remainder=1. For example, in the example shown in FIG. 52, when remainder=1, the entropy coding unit 110 selects g=1 as the Rice parameter to minimize the code length of the binary signal.

[0404] Also, when 25≦sum_minus1, the above-mentioned five surrounding coefficients are considered to have values ​​of approximately 7 or more. As a result, the coefficient to be coded is likely to be close to the five surrounding coefficients and larger than the surrounding coefficients, and is predicted to be 9 or more. Therefore, since gt1_flag and gt2_flag are used in the flag format of the coefficient to be coded, the remainder of the coefficient is predicted to be remainder≧2. For example, in the example shown in FIG. 52, when remainder≧2, the entropy coding unit 110 selects g=2 as the Rice parameter to minimize the code length of the binary signal.

[0405] Similarly to the entropy coding unit 110, the entropy decoding unit 202 can also determine the Rice parameter.

[0406] <First Example of First Aspect> Fig. 53 is a flowchart showing the overall processing operation of the entropy coding unit 110 in the first example of the first aspect. Note that the flowchart in Fig. 53 shows the processing operation of the entropy coding unit 110 in the case where the above-mentioned DQ is used, for example.

[0407] Entropy coding unit 110 repeats the process of steps S110 to S140 for each sub-block so that each coefficient in the sub-block is coded. A sub-block is, for example, a block consisting of 4×4 pixels obtained by further dividing the above-mentioned transform unit.

[0408] Specifically, first, the entropy coding unit 110 codes the sig_flag of each coefficient in the sub-block, and codes the parity_flag of the coefficient if the sig_flag is 1. Furthermore, if the sig_flag is 1, the entropy coding unit 110 codes the gt1_flag of the coefficient based on whether the AbsLevel of the coefficient is 3 or more (step S110).

[0409] Next, for each coefficient in the sub-block, if the coefficient is 3 or more, the entropy coding unit 110 codes the gt2_flag of the coefficient based on whether the AbsLevel of the coefficient is 5 or more (Step S120).

[0410] Next, for each coefficient in the sub-block, the entropy coding unit 110 codes the remainder=(AbsLevel-5) / 2 of the coefficient based on whether the AbsLevel of the coefficient is 5 or more (Step S130).

[0411] Then, for each coefficient in the sub-block, if the coefficient is not 0, the entropy coding unit 110 codes the sign (plus or minus) of the coefficient (step S140). Note that the sign may be coded as sign_flag.

[0412] After performing the processes of steps S110 to S140 on a sub-block, entropy encoding section 110 similarly performs the processes of steps S110 to S140 on other sub-blocks.

[0413] FIG. 54 is a flowchart showing an example of detailed processing operations in step S110 of FIG.

[0414] The entropy encoding unit 110 repeats the process of steps S111 to S117 for each coefficient in the sub-block.

[0415] First, the entropy coding unit 110 determines whether the AbsLevel of the coefficient to be coded is AbsLevel≠0 (step S111). If the entropy coding unit 110 determines that AbsLevel≠0 is not the case (No in step S111), it codes sig_flag=0 for the coefficient (step S112b). On the other hand, if the entropy coding unit 110 determines that AbsLevel≠0 is the case (Yes in step S111), it codes sig_flag=1 for the coefficient (step S112a).

[0416] Next, the entropy coding unit 110 determines whether the first bit (the least significant bit) of the AbsLevel of the coefficient to be coded is 1 or not (step S113). If the entropy coding unit 110 determines that the first bit is 1 (Yes in step S113), it codes parity_flag=0 for the coefficient (step S114a). On the other hand, if the entropy coding unit 110 determines that the first bit is not 1 (No in step S113), it codes parity_flag=1 for the coefficient (step S114b).

[0417] Next, the entropy coding unit 110 determines whether the AbsLevel of the coefficient to be coded is 3 or more (step S115). If the entropy coding unit 110 determines that the AbsLevel is 3 or more (Yes in step S115), it codes gt1_flag=1 for the coefficient (step S116a). On the other hand, if the entropy coding unit 110 determines that the AbsLevel is not 3 or more (No in step S115), it codes gt1_flag=0 for the coefficient (step S116b).

[0418] Then, the entropy coding unit 110 causes the quantization unit 108 and the inverse quantization unit 112 to update the DQ state according to the coefficient to be coded, that is, according to parity_flag (step S117).

[0419] After performing the processes of steps S111 to S117 on the coefficients included in a sub-block, the entropy coding unit 110 also performs the processes of steps S111 to S117 on the next coefficient included in the sub-block in the same manner. As a result, for each coefficient included in the sub-block, at least one flag corresponding to the coefficient among sig_flag, parity_flag, and gt1_flag is coded.

[0420] FIG. 55 is a flowchart showing an example of detailed processing operations in step S120 of FIG.

[0421] The entropy encoding unit 110 repeats the process of steps S121 to S123b for each coefficient in the sub-block.

[0422] First, the entropy coding unit 110 determines whether or not the AbsLevel of the coefficient to be coded is 3 or more (step S121). If the entropy coding unit 110 determines that the AbsLevel is not 3 or more (No in step S121), it does not code gt2_flag for the coefficient. On the other hand, if the entropy coding unit 110 determines that the AbsLevel is 3 or more (Yes in step S121), it further determines whether or not the AbsLevel is 5 or more (step S122). If the entropy coding unit 110 determines that the AbsLevel is 5 or more (Yes in step S122), it codes gt2_flag=1 for the coefficient (step S123a). On the other hand, if the entropy coding unit 110 determines that the AbsLevel is not 5 or more (No in step S122), it codes gt2_flag=0 for the coefficient (step S123b).

[0423] After performing the process of steps S121 to S123b on a coefficient included in a sub-block, the entropy coding unit 110 similarly performs the process of steps S121 to S123b on the next coefficient included in the sub-block. As a result, gt2_flag is coded as necessary for each coefficient included in the sub-block.

[0424] FIG. 56 is a flowchart showing an example of detailed processing operations in step S130 of FIG.

[0425] The entropy encoding unit 110 repeats the process of steps S131 to S132 for each coefficient in the sub-block.

[0426] First, the entropy coding unit 110 determines whether the AbsLevel of the coefficient to be coded is 5 or more (step S131). If the entropy coding unit 110 determines that the AbsLevel is not 5 or more (No in step S131), it does not code the remainder for that coefficient. On the other hand, if the entropy coding unit 110 determines that the AbsLevel is 5 or more (Yes in step S131), it codes the remainder for that coefficient (step S132). That is, the entropy coding unit 110 codes (AbsLevel-5) / 2 (step S132).

[0427] After performing the process of steps S131 to S132 for a coefficient included in a sub-block, the entropy coding unit 110 similarly performs the process of steps S131 to S132 for the next coefficient included in the sub-block. As a result, the remainder is coded as necessary for each coefficient included in the sub-block.

[0428] Fig. 57 is a diagram showing syntax related to entropy coding in a first example of the first aspect. Specifically, Fig. 57 shows a syntax configuration of a stream generated by the processing shown in the flowcharts of Figs. 53 to 56.

[0429] The entropy coding unit 110 codes each coefficient included in each of a plurality of sub-blocks according to the syntax shown in Fig. 57. In Fig. 57, sig_flag[n] and parity_flag[n] are sig_flag and parity_flag of the n-th coefficient included in the sub-block. In Fig. 57, abs_gt1_flag[n] and abs_gt2_flag[n] are gt1_flag and gt2_flag of the n-th coefficient included in the sub-block. In Fig. 57, abs_remainder[n] and sign_flag[n] are remainder and sign_flag of the n-th coefficient included in the sub-block.

[0430] Fig. 58 is a diagram showing a specific example of a sub-block including 4 × 4 coefficients. Fig. 59 is a diagram showing a specific example in which each coefficient included in the sub-block of Fig. 58 is expressed in flag format in the first example of the first mode. In Fig. 59, each coefficient is arranged from left to right in scan order.

[0431] The entropy coding unit 110 scans the sub-blocks shown in FIG. 58. That is, the entropy coding unit 110 acquires each coefficient included in the sub-block in a predetermined order (i.e., scan order). For example, the entropy coding unit 110 acquires each coefficient in a diagonal order from the coefficient at the bottom right of the sub-block to the coefficient at the top left. In the example shown in FIG. 58, the entropy coding unit 110 acquires each coefficient in the order of 1, 1, 0, 2, 3, 4, 7, 5, 4, 5, 3, 6, 10, 8, 10, 20 as shown in FIG. Then, the entropy coding unit 110 converts each coefficient into a flag format in the acquired order.

[0432] Specifically, if a coefficient is "1", the entropy coding unit 110 codes sig_flag=1, parity_flag=0, and gt1_flag=0 for that coefficient because the AbsLevel is "1".

[0433] Furthermore, if a coefficient is "0", the entropy coding unit 110 codes sig_flag=0 for that coefficient. Furthermore, if a coefficient is "4", the AbsLevel is "4", so the entropy coding unit 110 codes sig_flag=1, parity_flag=1, gt1_flag=1, and gt2_flag=0 for that coefficient. Furthermore, if a coefficient is "7", the AbsLevel is "7", so the entropy coding unit 110 codes sig_flag=1, parity_flag=0, gt1_flag=1, gt2_flag=1, and remainder=1 for that coefficient.

[0434] Moreover, the entropy coding unit 110 arithmetically codes these sig_flag, parity_flag, gt1_flag, gt2_flag, and remainder. For the arithmetic coding, for example, CABAC (Context-Based Adaptive Binary Arithmetic Coding) is used. For sig_flag, parity_flag, gt1_flag, and gt2_flag, an adaptive variable symbol occurrence probability may be used, and for remainder, a fixed symbol occurrence probability may be used. That is, the entropy coding unit 110 arithmetically codes sig_flag, parity_flag, gt1_flag, and gt2_flag while updating the symbol occurrence probability by CABAC. On the other hand, for remainder, the entropy coding unit 110 determines the above-mentioned rice parameter for the remainder, and binarizes the remainder by a binarization method according to the rice parameter. Then, the entropy coding unit 110 performs arithmetic coding on the binarized remainder using a fixed symbol occurrence probability by CABAC bypass processing.

[0435] Moreover, the entropy decoding unit 202 in the first example of the first aspect sequentially decodes the flag and remainder of each coded coefficient configured by the syntax shown in Fig. 57. Then, the entropy decoding unit 202 calculates the AbsLevel for each coded coefficient as described above using the decoded flag, remainder, etc., thereby decoding the coded coefficient.

[0436] <Effects of the first example of the first aspect> In such a first example of the first aspect, the amount of code for remainder can be reduced by using flags such as gt1_flag and gt2_flag in coding the coefficients.

[0437] Generally, in a coding unit or a transform unit, the lower the sub-block is (i.e., the upper left side), the more coefficients that are not 0 are contained in the sub-block. In the example shown in FIG. 59, gt1_flag and gt2_flag are used for many coefficients contained in the sub-block. In addition, in this way, when there are many coefficients with values ​​of 3 or more in the sub-block, the code amount of the sub-block may be increased by gt1_flag and gt2_flag.

[0438] In addition, when each flag is arithmetically coded while updating the symbol occurrence probability by CABAC, the processing load is larger than when arithmetically coded by bypass processing. Therefore, when each flag is arithmetically coded while updating the symbol occurrence probability by CABAC, the processing load is larger as the number of flags increases. Therefore, the number of flags may be limited.

[0439] <Second Example of First Aspect> FIG. 60 is a flowchart showing the overall processing operation of the entropy encoding unit 110 in the second example of the first aspect.

[0440] In the second example of the first aspect, unlike the first example, the number of gt1_flag and gt2_flag used in the sub-block is limited. For example, the number of gt1_flag is limited to n_1, and the number of gt2_flag is limited to n_2. For example, n_1 is an integer that satisfies 1≦n_1≦16, and n_2 is an integer that satisfies 1≦n_2≦16.

[0441] For example, as shown in FIG. 60, the entropy encoding unit 110 repeats the processes of steps S210 to S230 and S140 for each sub-block so that each coefficient in the sub-block is encoded.

[0442] Specifically, first, the entropy coding unit 110 codes sig_flag of each coefficient in the sub-block, and if sig_flag is 1, codes parity_flag of the coefficient. Furthermore, if the coefficient is within the n_1th non-zero coefficient, the entropy coding unit 110 codes gt1_flag of the coefficient based on whether the AbsLevel of the coefficient is 3 or more (step S210). Note that the within n_1th non-zero coefficient is a coefficient within the n_1th non-zero coefficient in the scan order among the non-zero coefficients in the sub-block.

[0443] Next, for each coefficient in the sub-block, if the coefficient is within the n_2th coefficient having an AbsLevel of 3 or more, the entropy coding unit 110 codes the gt2_flag of the coefficient based on whether the AbsLevel of the coefficient is 5 or more (step S220). Note that the n_2th coefficient having an AbsLevel of 3 or more is the coefficient within the n_2th coefficient in scan order among the coefficients in the sub-block having an AbsLevel of 3 or more.

[0444] Next, for each coefficient in the subblock, if the AbsLevel of the coefficient is equal to or greater than the baseLevel, the entropy coding unit 110 codes the remainder=(AbsLevel-baseLevel) / 2 of the coefficient (step S230). The baseLevel is a value that varies depending on the number of times that gt1_flag and gt2_flag are used. For example, the initial value of baseLevel is 5. Also, when n_2 gt2_flag are used, the baseLevel is updated from its initial value 5 to 3, and thereafter, when n_1 gt1_flag are used (for example, n_1>n_2), the baseLevel is updated from 3 to 1.

[0445] Then, for each coefficient in the sub-block, if the coefficient is not 0, the entropy coding unit 110 codes the sign (plus or minus) of the coefficient (step S140).

[0446] After performing the processes of steps S210 to S230 and S140 on a sub-block, entropy encoding section 110 similarly performs the processes of steps S210 to S230 and S140 on other sub-blocks.

[0447] Fig. 61 is a flowchart showing an example of detailed processing operations in step S210 in Fig. 60. Note that the flowchart shown in Fig. 61 includes steps S111 to S117 of the flowchart shown in Fig. 54, and further includes step S211.

[0448] That is, the entropy encoding unit 110 repeats the processes of steps S111 to S117 and S211 for each coefficient in the sub-block.

[0449] Specifically, the entropy coding unit 110 executes the processes of steps S111 to S114b, similarly to the first example described above. Thereafter, the entropy coding unit 110 determines whether the coefficient a to be coded is within the n_1-th coefficient that is not 0 (step S211). Here, if the entropy coding unit 110 determines that the coefficient a to be coded is within the n_1-th coefficient that is not 0 (Yes in step S211), it executes the processes of steps S115 to S117, similarly to the first example described above. On the other hand, if the entropy coding unit 110 determines that the coefficient a to be coded is not within the n_1-th coefficient that is not 0 (No in step S211), it executes the process of step S117 without executing the processes of steps S115 to S116b. That is, in the first example, the entropy coding unit 110 uses gt1_flag for all non-zero coefficients in the sub-block. However, in the second example, after the entropy coding unit 110 uses gt1_flag n_1 times, when coding a coefficient that is not 0 thereafter, the entropy coding unit 110 does not use gt1_flag for that coefficient.

[0450] Fig. 62 is a flowchart showing an example of detailed processing operations in step S220 in Fig. 60. Note that the flowchart shown in Fig. 62 includes steps S122 to S123b of the flowchart shown in Fig. 55, and includes step S221 instead of step S121.

[0451] That is, the entropy encoding unit 110 repeats the processes of steps S221 and S122 to S123b for each coefficient in the sub-block.

[0452] Specifically, the entropy coding unit 110 determines whether the coefficient a to be coded is within the n_2th coefficient that satisfies AbsLevel≧3 (step S221). If the entropy coding unit 110 determines that the coefficient a is not within the n_2th coefficient that satisfies AbsLevel≧3 (No in step S221), the entropy coding unit 110 does not code gt2_flag for the coefficient a. On the other hand, if the entropy coding unit 110 determines that the coefficient a is within the n_2th coefficient that satisfies AbsLevel≧3 (Yes in step S221), the entropy coding unit 110 further determines whether the AbsLevel is 5 or more (step S122). If the entropy coding unit 110 determines that the AbsLevel is 5 or more (Yes in step S122), the entropy coding unit 110 codes gt2_flag=1 for the coefficient (step S123a). On the other hand, if the entropy coding unit 110 determines that the AbsLevel is not 5 or more (No in step S122), it codes gt2_flag=0 for the coefficient (step S123b).

[0453] After performing the processes of steps S221 and S122 to S123b on the coefficients included in the sub-block, the entropy coding unit 110 similarly performs the processes of steps S221 and S122 to S123b on the next coefficient included in the sub-block. As a result, gt2_flag is coded as necessary for each coefficient included in the sub-block.

[0454] FIG. 63 is a flowchart showing an example of detailed processing operations in step S230 of FIG.

[0455] The entropy encoding unit 110 first sets baseLevel to 5 (step S231). Then, the entropy encoding unit 110 repeats the processes of steps S232 to S236 for each coefficient in the sub-block.

[0456] Specifically, the entropy coding unit 110 determines whether or not the gt1_flag is used n_1 times for each coefficient preceding the coefficient a to be coded in the subblock in the scan order (step S232). If the entropy coding unit 110 determines that the gt1_flag is used n_1 times (Yes in step S232), it updates the baseLevel to 1 (step S233).

[0457] On the other hand, when the entropy coding unit 110 determines that the gt1_flag is not used n_1 times (No in step S232), it further performs a determination on the number of gt2_flag. That is, the entropy coding unit 110 determines whether or not the gt2_flag is used n_2 times for each coefficient preceding the coding target coefficient a in the scan order in the subblock (step S234). Here, when the entropy coding unit 110 determines that the gt2_flag is used n_2 times (Yes in step S234), it updates the baseLevel to 3 (step S235).

[0458] On the other hand, when the entropy coding unit 110 determines that the gt1_flag is not used n_2 times (No in step S234), it codes remainder for the coefficient a (step S236). After the processes of steps S233 and S235 are performed, the entropy coding unit 110 codes remainder for the coefficient a (step S236). That is, the entropy coding unit 110 codes (AbsLevel-baseLevel) / 2. Note that the coding of remainder is performed when AbsLevel≧baseLevel is satisfied. Note that the baseLevel is 5 when neither the process of step S233 nor S235 is performed. Note that the baseLevel is 1 when the process of step S233 is performed, and is 3 when the process of step S235 is performed. Note that in the flowchart shown in FIG. 63, n_1>n_2 may be satisfied.

[0459] After performing the processes of steps S232 to S236 on the coefficients included in the sub-block, the entropy coding unit 110 similarly performs the processes of steps S232 to S236 on the next coefficient included in the sub-block. In this way, the remainder is coded as necessary for each coefficient included in the sub-block.

[0460] Fig. 64 is a diagram showing syntax related to entropy coding in the second example of the first aspect. Specifically, Fig. 64 shows a syntax configuration of a stream generated by the processing shown in the flowcharts of Figs. 60 to 63.

[0461] The entropy coding unit 110 codes each of the coefficients included in each of the multiple sub-blocks according to the syntax shown in FIG.

[0462] Here, the syntax shown in FIG. 64 further includes setting or updating of two counters and setting or updating of baseLevel, compared to the syntax shown in FIG. 57. The two counters are numNonZero and numUpper3. numNonZero is initialized to 0, and if sig_flag[n] is 1, it is incremented. Then, if sig_flag[n] is 1 and numNonZero is equal to or less than n_1, abs_gt1_flag[n] is encoded. numUpper3 is initialized to 0. After that, if abs_gt1_flag[n] is 1 and numUpper3 is equal to or less than n_2, abs_gt2_flag[n] is encoded, and numUpper3 is incremented.

[0463] In addition, in encoding remainder, first, numNonZero and numUpper3 are initialized to 0, and baseLevel is initialized to 5. Then, if absLevel[n] is not 0, numNonZero is incremented, and further, if absLevel[n] is 3 or more, numUpper3 is incremented. Note that absLevel[n] is the AbsLevel of the n-th coefficient. Then, if absLevel[n] is baseLevel or more, (AbsLevel-baseLevel) / 2 of the n-th coefficient is encoded as abs_remainder[n]. Then, if numNonZero is n_1 or more, baseLevel is updated to 1. Furthermore, if baseLevel is 5 and numUpper3 is n_2 or more, the baseLevel is updated to 3.

[0464] Fig. 65 is a diagram showing a specific example in which each coefficient included in the sub-block of Fig. 58 is expressed in flag format in the second example of the first aspect. In Fig. 65, each coefficient is arranged from left to right in scan order.

[0465] In the example shown in FIG. 65, n_1=8 and n_2=1. Therefore, gt2_flag is used for the first coefficient in scan order with AbsLevel≧3, and is not used for other coefficients after that coefficient. Also, gt1_flag is used for the first 8 coefficients in scan order that are not 0, and is not used for the coefficients after that. Furthermore, baseLevel is initially set to 5, but is updated to 3 when gt2_flag cannot be used, and is updated to 1 when gt1_flag cannot be used. Then, remainder is calculated and coded by (AbsLevel-baseLevel) / 2 using baseLevel updated in this way.

[0466] Moreover, the entropy decoding unit 202 in the second example of the first aspect sequentially decodes the flag and remainder of each coded coefficient configured by the syntax shown in Fig. 64. Then, the entropy decoding unit 202 calculates the AbsLevel for each coded coefficient as described above using the decoded flag, remainder, etc., thereby decoding the coded coefficient.

[0467] <Effects of the second example of the first aspect> In this second example, the number of flags (eg, gt1_flag or gt2_flag) used for coefficients in a sub-block is limited, and therefore the amount of code for the flags can be reduced.

[0468] Specifically, in the example shown in FIG. 65, the numbers of gt1_flag and gt2_flag are limited to 8 and 1, respectively. Therefore, after 8 gt1_flag are used, gt1_flag is not used for the coefficient even if the coefficient is not 0. Similarly, after 1 gt2_flag is used, gt2_flag is not used for the coefficient even if the AbsLevel of the coefficient is 3 or more. Therefore, in the second example, the number of occurrences of gt1_flag and gt2_flag can be reduced compared to the first example (for example, the example shown in FIG. 59), so that the amount of coding of these flags can be reduced. Also, when CABAC with variable symbol occurrence probability is used for coding gt1_flag and gt2_flag, the processing load of the coding can be suppressed. In other words, CABAC with variable symbol occurrence probability has a larger processing load than CABAC bypass processing. However, in the second example, the number of flags to which CABAC with the variable symbol occurrence probability is applied can be reduced, so the processing load can be reduced more than in the first example. That is, in the second example, it is possible to achieve both a reduction in the amount of coding of coefficients and a reduction in the processing load required for coding the coefficients.

[0469] In this second example, in FIG. 65, the maximum number for which gt1_flag is used is n_1=8, and the maximum number for which gt2_flag is used is n_2=1. However, the maximum numbers are not limited to these, and may be other values. Furthermore, the maximum numbers n_1 and n_2 may be predetermined fixed values, or may be set or updated as appropriate. That is, the entropy coding unit 110 may adaptively determine the maximum numbers n_1 and n_2, respectively.

[0470] For example, as described above, in the coding of each coefficient in a subblock, a specific flag for the coefficient, that is, a specific type of flag other than gt1_flag and gt2_flag, is coded first. The specific type of flag is, for example, at least one flag among sig_flag and parity_flag. After the specific type of flag, gt1_flag for each coefficient is coded, and then gt2_flag for each coefficient is coded. In such a case, the entropy coding unit 110 may determine the maximum number n_1 as a value that depends on the total number M of the specific type of flag. Alternatively, the entropy coding unit 110 may determine the maximum number n_1 as a value that depends on the total number Ma of flags that indicate a specific value such as 0 or 1 among the specific type of flags. The entropy coding unit 110 may also determine the maximum number n_2 as a value that depends on the total number N of at least one flag among the specific type of flag and gt1_flag. Alternatively, the entropy encoding unit 110 may determine the maximum number n_2 as a value that depends on the total number Na of flags indicating a specific value such as 0 or 1 among at least one flag of the specific type and gt1_flag. Note that the total numbers M, Ma, N, and Na of flags described above may all be the total number of already encoded flags.

[0471] In the second example, a method for not encoding the flags gt1_flag and gt2_flag when the maximum number is reached is described, but the present disclosure is not limited to these flags. For example, even if a flag other than gt1_flag and gt2_flag is a flag related to the encoding of the absolute value of the coefficient and is encoded using CABAC with updating of the symbol occurrence probability, the same method may be used to switch whether or not to encode the flag.

[0472] [Second aspect] In the second example of the first aspect, the number of gt1_flag used is limited to a maximum number n_1 or less, and the number of gt2_flag used is limited to a maximum number n_2 or less. In this second aspect, n_2=0. That is, in the second aspect, gt2_flag is not used.

[0473] FIG. 66 is a flowchart showing the overall processing operation of the entropy encoding unit 110 in the second aspect.

[0474] The entropy coding unit 110 repeats the processes of steps S210, S330, and S140 for each sub-block so that each coefficient in the sub-block is coded.

[0475] Specifically, first, the entropy coding unit 110 codes the sig_flag of each coefficient in the sub-block, and codes the parity_flag of the coefficient if the sig_flag is 1. Furthermore, if the coefficient is one of the n_1 non-zero coefficients, the entropy coding unit 110 codes the gt1_flag of the coefficient based on whether the AbsLevel of the coefficient is 3 or more (step S210).

[0476] Next, for each coefficient in the subblock, if the AbsLevel of the coefficient is equal to or greater than the baseLevel, the entropy coding unit 110 codes the remainder of the coefficient=(AbsLevel-baseLevel) / 2 (step S330). In this second mode, the baseLevel has a different value according to the number of times gt1_flag is used. For example, the initial value of the baseLevel is 3. Also, when n_1 gt1_flag are used, the baseLevel is updated from 3 to 1.

[0477] Then, for each coefficient in the sub-block, if the coefficient is not 0, the entropy coding unit 110 codes the sign (plus or minus) of the coefficient (step S140).

[0478] After performing the processes of steps S210, S330, and S140 for a sub-block, entropy encoding unit 110 similarly performs the processes of steps S210, S330, and S140 for other sub-blocks. Note that the process of step S210 is performed according to the flowchart shown in FIG.

[0479] FIG. 67 is a flowchart showing an example of detailed processing operations in step S330 of FIG.

[0480] The entropy encoding unit 110 first sets baseLevel to 3 (step S235). Then, the entropy encoding unit 110 repeats the processes of steps S232, S233, and S236 for each coefficient in the sub-block.

[0481] Specifically, the entropy coding unit 110 determines whether or not the gt1_flag is used n_1 times for each coefficient preceding the coefficient a to be coded in the subblock in the scan order (step S232). If the entropy coding unit 110 determines that the gt1_flag is used n_1 times (Yes in step S232), it updates the baseLevel to 1 (step S233).

[0482] On the other hand, when the entropy coding unit 110 determines that the gt1_flag has not been used n_1 times (No in step S232), it codes remainder for the coefficient a (step S236). After the process of step S233 is performed, the entropy coding unit 110 also codes remainder for the coefficient a (step S236). That is, the entropy coding unit 110 codes (AbsLevel-baseLevel) / 2. Note that remainder is coded when AbsLevel≧baseLevel is satisfied. Note that baseLevel is 3 when the process of step S233 is not performed, and is 1 when the process of step S233 is performed.

[0483] After performing the processes of steps S232, S233, and S236 on the coefficients included in the sub-block, the entropy coding unit 110 similarly performs the processes of steps S232, S233, and S236 on the next coefficient included in the sub-block. In this way, the remainder is coded as necessary for each coefficient included in the sub-block.

[0484] Fig. 68 is a diagram showing syntax related to entropy coding in the second aspect. Specifically, Fig. 68 shows the syntax configuration of a stream generated by the processing shown in the flowcharts of Figs. 61, 66, and 67.

[0485] The entropy coding unit 110 codes each of the coefficients included in each of the multiple sub-blocks according to the syntax shown in FIG.

[0486] Here, the syntax shown in Fig. 68 does not include the setting or updating of numUpper3 and the encoding of gt2_flag, unlike the syntax shown in Fig. 64. Also, in the encoding of remainder, unlike the syntax shown in Fig. 64, baseLevel is initialized to 3.

[0487] Fig. 69 is a diagram showing a specific example in which each coefficient included in the sub-block of Fig. 58 is expressed in flag format in the second aspect. Note that in Fig. 69, each coefficient is arranged from left to right in scan order.

[0488] In the example shown in FIG. 69, n_1=16. Therefore, gt1_flag is used for the first 16 coefficients in scan order that are not 0, and is not used for subsequent coefficients. Furthermore, baseLevel is initially set to 3, but is updated to 1 when gt1_flag cannot be used. Then, using the baseLevel updated in this way, remainder is calculated by (AbsLevel-baseLevel) / 2 and coded.

[0489] Moreover, the entropy decoding unit 202 in the second aspect sequentially decodes the flag and remainder of each coded coefficient configured by the syntax shown in Fig. 68. Then, the entropy decoding unit 202 calculates the AbsLevel for each coded coefficient as described above using the decoded flag, remainder, etc., thereby decoding the coded coefficient.

[0490] <Effects in the second aspect> In this second aspect, gt2_flag is not used. This reduces the amount of code for the flag and reduces the processing load. Also, as in the second example of the first aspect, the number of gt1_flag is limited to n_1 or less, which further reduces the processing load.

[0491] Specifically, in the example shown in FIG. 69, gt2_flag is not used, and the number of gt1_flag is limited to 16 or less. Therefore, after 16 gt1_flag are used, gt1_flag is not used for the coefficient even if the coefficient is not 0. Also, like the second example of the first aspect, the number of gt1_flag may be limited to 8 or less, or may be limited to any number other than 16 or 8. Therefore, in the second aspect, the amount of coding of flags can be further reduced compared to the second example of the first aspect (for example, the example shown in FIG. 65). Also, when CABAC with variable symbol occurrence probability is used for coding gt1_flag and gt2_flag, the processing load of the coding can be suppressed. That is, CABAC with variable symbol occurrence probability has a larger processing load than CABAC bypass processing. However, in the second aspect, since the number of flags to which CABAC with the variable symbol occurrence probabilities is applied can be further reduced, the processing load can be further reduced compared to the second example of the first aspect.

[0492] [Third aspect] In the first and second aspects, the rice parameter is determined by sum_minus1, and remainder is encoded by an encoding method according to the rice parameter. Specifically, the rice parameter is determined by comparing sum_minus1 with a threshold value (for example, 12 or 25).

[0493] In the third embodiment, the number of gt1_flag and gt2_flag is limited, and the baseLevel is updated according to the number of times these flags are used, as in the second embodiment. Furthermore, in the third embodiment, the threshold value compared with sum_minus1 to determine the Rice parameter is changed according to the baseLevel.

[0494] 70 is a flowchart showing the overall processing operation of the entropy encoding unit 110 in the third aspect. Note that the flowchart shown in Fig. 70 includes step S430 instead of step S230 included in the flowchart in Fig. 60.

[0495] In the third aspect, similarly to the second example of the first aspect, the number of gt1_flag and gt2_flag used in the sub-block is limited. For example, the number of gt1_flag is limited to n_1, and the number of gt2_flag is limited to n_2. For example, n_1 is an integer that satisfies 1≦n_1≦16, and n_2 is an integer that satisfies 1≦n_2≦16.

[0496] For example, as shown in FIG. 70, the entropy encoding unit 110 repeats the processes of steps S210, S220, S430, and S140 for each sub-block so that each coefficient in the sub-block is encoded.

[0497] Specifically, the entropy coding unit 110 performs the processes of steps S210 and S220 in the same manner as the second example of the first aspect. That is, the entropy coding unit 110 first codes the sig_flag of each coefficient in the sub-block, and if the sig_flag is 1, codes the parity_flag of the coefficient. Furthermore, if the coefficient is within the n_1th coefficient that is not 0, the entropy coding unit 110 codes the gt1_flag of the coefficient based on whether the AbsLevel of the coefficient is 3 or more (step S210). Then, if the coefficient is within the n_2th coefficient that has an AbsLevel of 3 or more, the entropy coding unit 110 codes the gt2_flag of the coefficient based on whether the AbsLevel of the coefficient is 5 or more (step S220).

[0498] Next, for each coefficient in the subblock, if the AbsLevel of the coefficient is equal to or greater than the baseLevel, the entropy coding unit 110 codes the remainder of the coefficient=(AbsLevel-baseLevel) / 2 (step S430). At this time, in the third aspect, the entropy coding unit 110 determines a different rice parameter according to the baseLevel, and codes the remainder by a coding method according to the rice parameter.

[0499] Then, for each coefficient in the sub-block, if the coefficient is not 0, the entropy coding unit 110 codes the sign (plus or minus) of the coefficient (step S140).

[0500] After performing the processes of steps S210, S220, S430, and S140 for a sub-block, entropy encoding section 110 similarly performs the processes of steps S210, S220, S430, and S140 for other sub-blocks.

[0501] Fig. 71 is a flowchart showing an example of detailed processing operations in step S430 in Fig. 70. Note that the flowchart shown in Fig. 71 includes step S431 instead of step S236 included in the flowchart in Fig. 63.

[0502] As in the second example of the first aspect, the entropy encoding unit 110 first sets baseLevel to 5 (step S231). Then, the entropy encoding unit 110 repeats the processes of steps S232 to S235 and S431 for each coefficient in the sub-block.

[0503] Specifically, the entropy encoding unit 110 performs the processes of steps S232 to S235 on the coefficient a to be encoded, similarly to the second example of the first aspect.

[0504] Then, when the entropy coding unit 110 determines that gt2_flag is not used n_2 times for each coefficient preceding the coefficient a to be coded in the subblock in the scan order (No in step S234), it codes remainder for the coefficient a (step S431). After the processes in steps S233 and S235 are performed, the entropy coding unit 110 also codes remainder for the coefficient a (step S236). That is, the entropy coding unit 110 codes (AbsLevel-baseLevel) / 2. Note that coding of remainder is performed when AbsLevel≧baseLevel is satisfied.

[0505] After performing the processes of steps S232 to S235 and S431 on the coefficients included in the sub-block, the entropy coding unit 110 similarly performs the processes of steps S232 to S235 and S431 on the next coefficient included in the sub-block. In this way, the remainder is coded as necessary for each coefficient included in the sub-block.

[0506] Here, in step S431, if neither the process of step S233 nor the process of step S235 has been performed, the baseLevel is 5. If the process of step S233 has been performed, the baseLevel is 1, and if the process of step S235 has been performed, the baseLevel is 3. In this third aspect, the entropy coding unit 110 determines a different rice parameter according to the baseLevel, and codes the remainder by a coding method according to the rice parameter. The coding method according to the rice parameter is, for example, one of the three coding methods shown in FIG. 50.

[0507] Specifically, in the third aspect, the threshold for determining the Rice parameter is changed according to the value of baseLevel.

[0508] That is, when baseLevel = 5, as in the first and second aspects, 12 and 25 are used as the threshold values. Therefore, when sum_minus1 < 12, the entropy encoding unit 110 determines the Rice parameter g = 0. Also, when 12 ≤ sum_minus1 < 25, the entropy encoding unit 110 determines the Rice parameter g = 1. Further, when 25 ≤ sum_minus1, the entropy encoding unit 110 determines the Rice parameter g = 2. The entropy encoding unit 110 selects an encoding method corresponding to the thus determined Rice parameter, and performs Golomb-Rice encoding on the remainder, that is, (AbsLevel - baseLevel) / 2, using the encoding method.

[0509] Also, when baseLevel = 3, a value thres_1 smaller than 12 and a value thres_2 smaller than 25 are used as the threshold values. Note that thres_1 and thres_2 satisfy the relationship thres_1 < thres_2. Therefore, when sum_minus1 < thres_1, the entropy encoding unit 110 determines the Rice parameter g = 0. Also, when thres_1 ≤ sum_minus1 < thres_2, the entropy encoding unit 110 determines the Rice parameter g = 1. Further, when thres_2 ≤ sum_minus1, the entropy encoding unit 110 determines the Rice parameter g = 2. The entropy encoding unit 110 selects an encoding method corresponding to the thus determined Rice parameter, and performs Golomb-Rice encoding on the remainder, that is, (AbsLevel - baseLevel) / 2, using the encoding method.

[0510] Also, when baseLevel = 1, as the threshold values, thres_3 which is smaller than thres_1 and thres_4 which is smaller than thres_2 are used. Note that thres_3 and thres_4 satisfy the relationship thres_3 < thres_4. Therefore, when sum_minus1 < thres_3, the entropy encoding unit 110 determines the Rice parameter g = 0. Also, when thres_3 ≤ sum_minus1 < thres_4, the entropy encoding unit 110 determines the Rice parameter g = 1. Also, when thres_4 ≤ sum_minus1, the entropy encoding unit 110 determines the Rice parameter g = 2. The entropy encoding unit 110 selects an encoding method corresponding to the Rice parameter determined in this way, and performs Golomb-Rice encoding on the remainder, that is, (AbsLevel - baseLevel) / 2, using the encoding method.

[0511] As a more specific example, the above four threshold values are thres_1 = 2, thres_2 = 12, thres_3 = 1, and thres_4 = 2.

[0512] In such an example, when baseLevel = 3, the Rice parameter is determined as follows.

[0513] When sum_minus1 < 2, the Rice parameter is determined to be g = 0. This is because when g = 0, the code length of the remainder can be made the shortest. That is, when sum_minus1 < 2, for example, as shown in FIG. 51, the five peripheral coefficients around the coefficient to be encoded are on average 1 or 2. Therefore, the coefficient to be encoded is predicted to be 3 or 4, and the remainder of the coefficient to be encoded is predicted to be 0. Thereby, as shown in FIG. 52, when the Rice parameter is g = 0, the code length of the remainder can be made the shortest.

[0514] When 2≦sum_minus1<12, the Rice parameter is determined to be g=1. This is because, when g=1, the code length of remainder can be made the shortest. That is, when 2≦sum_minus1<12, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 3 or 4 on average. Therefore, the coefficient to be coded is predicted to be 5 or 6, and the remainder of the coefficient to be coded is predicted to be 1. As a result, when the Rice parameter is g=1, as shown in FIG. 52, the code length of the remainder can be made the shortest.

[0515] When 12≦sum_minus1, the Rice parameter is determined to be g=2. This is because when g=2, the code length of remainder can be made the shortest. In other words, when 12≦sum_minus1, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 5 or more on average. Therefore, the coefficient to be coded is predicted to be 7 or more, and the remainder of the coefficient to be coded is predicted to be 2 or more. As a result, when the Rice parameter is g=2, as shown in FIG. 52, the code length of the remainder can be made the shortest.

[0516] Also, when baseLevel=1, the Rice parameter is determined as follows:

[0517] When sum_minus1=0, the Rice parameter is determined to be g=0. This is because, when g=0, the code length of the remainder can be made the shortest. In other words, when sum_minus1=0, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 0 or 1 on average. Therefore, the coefficient to be coded is predicted to be 1 or 2, and the remainder of the coefficient to be coded is predicted to be 0. As a result, when the Rice parameter is g=0, as shown in FIG. 52, the code length of the remainder can be made the shortest.

[0518] When 1≦sum_minus1<2, the Rice parameter is determined to be g=1. This is because, when g=1, the code length of remainder can be made the shortest. In other words, when 1≦sum_minus1<2, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 1 or 2 on average. Therefore, the coefficient to be coded is predicted to be 3 or 4, and the remainder of the coefficient to be coded is predicted to be 1. As a result, when the Rice parameter is g=1, as shown in FIG. 52, the code length of the remainder can be made the shortest.

[0519] When 2≦sum_minus1, the Rice parameter is determined to be g=2. This is because when g=2, the code length of remainder can be made the shortest. In other words, when 2≦sum_minus1, for example, as shown in FIG. 51, the five surrounding coefficients around the coefficient to be coded are 3 or more on average. Therefore, the coefficient to be coded is predicted to be 5 or more, and the remainder of the coefficient to be coded is predicted to be 2 or more. As a result, when the Rice parameter is g=2, as shown in FIG. 52, the code length of the remainder can be made the shortest.

[0520] <Effects in the third aspect> In this third aspect, since a more appropriate rice parameter is determined than in the second example of the first aspect, it is possible to reduce the amount of code for remainder. In this third aspect, the rice parameter is switched depending on the baseLevel, but it is not limited to the baseLevel, and the rice parameter may be switched depending on whether the number of times a flag (e.g., gt1_flag or gt2_flag) used when encoding a coefficient has reached the above-mentioned maximum number. In addition, when encoding the remainder, the binarization method for the remainder may be switched depending on the baseLevel without using the rice parameter.

[0521] In the third aspect, the threshold for determining the rice parameter is changed according to the value of baseLevel, but the rice parameter may be determined based on the difference between the predicted value of the absolute value of the coefficient to be coded and baseLevel without changing the threshold. That is, in the third aspect, by changing the threshold according to baseLevel, different rice parameters may be determined for the same numerical value (for example, the same sum_minus1) compared with the threshold. However, by changing the numerical value (for example, the above-mentioned difference) compared with the threshold according to baseLevel without changing the threshold, different rice parameters may be determined. Even in this case, the same effect as the third aspect can be achieved.

[0522] <Summary of the second embodiment> As described above, in this embodiment, flags are used for coding coefficients, and the number of flags can be appropriately limited.

[0523] Fig. 72 is a flowchart showing the processing operation of the encoding device 100 in this embodiment. Note that the flowchart shown in Fig. 72 shows the processing operation of the second example of the first aspect or the third aspect.

[0524] The encoding device 100 in this embodiment includes a circuit and a memory connected to the circuit, and the circuit performs the processes of steps S10 and S20 in operation.

[0525] That is, the circuit encodes the absolute value of each of the multiple coefficients included in the constituent unit of the transformed and quantized image according to a predetermined order (step S10). Next, the circuit encodes a sign indicating whether the multiple coefficient is positive or negative for each of the multiple coefficients (step S20). Here, in encoding the absolute value (step S10), the circuit encodes a signal indicating parity, which is the least significant bit of the absolute value (step S11a). Next, the circuit determines whether or not to use a flag for encoding a portion other than the least significant bit of the absolute value based on a first condition and a second condition (step S12a). Then, if it is determined that a flag is to be used, the circuit encodes the flag by CABAC (Context-Based Adaptive Binary Arithmetic Coding) with update of the symbol occurrence probability (step S13a). The above-mentioned first condition is a condition based on the magnitude of the absolute value, and the second condition is a condition for limiting the number of flags used in the constituent unit. For example, the above-mentioned signal indicating parity is parity_flag.

[0526] As a result, whether or not to use a flag is determined based not only on the first condition based on the magnitude of the absolute value of the coefficient, but also on the second condition for limiting the number of flags, thereby making it possible to appropriately limit the number of flags.

[0527] In addition, when a flag is used, the code amount of the absolute value of the coefficient can be suppressed, and when a flag is not used, the code amount of the absolute value of the coefficient, specifically, the code amount of the remainder for expressing the absolute value of the coefficient, may increase. In addition, CABAC using an adaptive variable symbol occurrence probability may be applied to the encoding of the flag, and bypass processing of CABAC using a fixed symbol occurrence probability may be applied to the encoding of the remainder. Here, CABAC using a variable symbol occurrence probability tends to have a larger processing load than bypass processing. Therefore, in the encoding device according to one aspect of the present disclosure, the number of flags can be appropriately limited, so that it is possible to achieve both a reduction in the code amount of the absolute value and a reduction in the processing load required for encoding the absolute value.

[0528] In addition, in encoding the absolute value (step S10), the circuit may count the number of encoded flags each time a flag is encoded, and if the first condition is satisfied but the second condition is not satisfied, determine that no flag is used to encode a portion other than the least significant bit of the absolute value. Here, the second condition is that the count number according to the number of counted flags is less than a limit number. The limit number is, for example, the maximum number described above, and a specific example of this is n_1 or n_2 described above.

[0529] For example, in the process of step S211 in Fig. 61, the number of encoded gt1_flag is counted. Then, if the second condition that the count number is less than the limit number is satisfied, the processes of steps S115 to S116b are performed. On the other hand, if the second condition is not satisfied, the processes of steps S115 to S116b are not performed even if the condition AbsLevel ≠ 0 (i.e., the first condition) is satisfied. In other words, it is determined that gt1_flag is not used to encode the absolute value.

[0530] In addition, in the process of step S221 in Fig. 62, the number of encoded gt2_flag is counted. Then, if the second condition that the count number is less than the limit number is satisfied, the processes of steps S122 to S123b are performed. On the other hand, if the second condition is not satisfied, the processes of steps S122 to S123b are not performed even if the condition AbsLevel ≥ 3 (i.e., the first condition) is satisfied. In other words, it is determined that gt2_flag is not used to encode the absolute value.

[0531] This allows the number of coded flags to be more appropriately limited, since each time a flag is coded the number of coded flags is counted.

[0532] The first condition may be that the absolute value is not a first value, or that the absolute value is greater than or equal to a second value. For example, the first value may be 0 and the second value may be 3.

[0533] This makes it possible to appropriately limit the number of flags (e.g., gt1_flag) indicating whether the absolute value of a coefficient is not 0 is 3 or more, for example. Alternatively, it is possible to appropriately limit the number of flags (e.g., gt2_flag) indicating whether the absolute value of a coefficient is 3 or more is 5 or more, for example.

[0534] The flag may be made up of a plurality of different types of flags.

[0535] This makes it possible to appropriately limit the number of each of the multiple types of flags such as the above-mentioned gt1_flag and gt2_flag. The multiple types of flags may also include sig_flag and parity_flag.

[0536] In addition, in the encoding of the absolute value (step S10), the circuit may further derive a remainder consisting of a numerical value for expressing the absolute value when a flag cannot be used or when the absolute value cannot be expressed by at least one flag alone, and the circuit may encode the derived remainder by a CABAC bypass process.

[0537] This allows the absolute value of the coefficient to be suitably coded as a flag or as a set of data consisting of at least one flag and a remainder.

[0538] Fig. 73 is a flowchart showing the coding of the remaining part by the coding device 100 in this embodiment. Note that the flowchart shown in Fig. 73 shows the processing operation of the above-mentioned third aspect.

[0539] In the above-mentioned derivation of the remainder, the circuit determines a base level (i.e., the above-mentioned baseLevel) that indicates a different value depending on whether a count number according to the number of flags coded for each coefficient preceding the coefficient corresponding to the remainder reaches a limit number (step S11b). Next, the circuit derives the remainder using the determined base level (step S12b). Furthermore, in the coding of the remainder, the circuit selects a binarization method corresponding to the remainder from a plurality of binarization methods different from each other based on the base level used in the derivation of the remainder (step S13b). Next, the circuit binarizes the remainder according to the selected binarization method (step S14b) and arithmetically codes the binarized remainder (step S15b).

[0540] For example, step S11b corresponds to the processing of steps S231, S233, and S235 shown in Fig. 71. That is, the base level determined when the count number reaches the limit is, for example, 1 or 3, which is smaller than the base level (for example, 5) determined when the limit is not reached. Also, steps S12b to S15b correspond to the processing of step S431 shown in Fig. 71.

[0541] This allows the remainder for the absolute value of the coefficient to be appropriately derived using the base level. Furthermore, the binarization method used for binarizing the remainder is selected based on the base level, so that the amount of code for the remainder can be appropriately reduced.

[0542] Fig. 74 is a flowchart showing the processing operation of the decoding device 200 in this embodiment. Note that the flowchart shown in Fig. 74 shows the decoding processing operation corresponding to the encoding in the second example of the first aspect or the encoding in the third aspect.

[0543] The decoding device 200 in this embodiment includes a circuit and a memory connected to the circuit, and the circuit performs the processes of steps S30 and S40 in operation.

[0544] That is, the circuit decodes the absolute value of each of the multiple coefficients included in the constituent unit of the encoded image according to a predetermined order (step S30). Next, the circuit decodes a code indicating whether the multiple coefficient is positive or negative for each of the multiple coefficients (step S40). Here, in the constituent unit, of N coefficients (N is an integer equal to or greater than 2) each having an absolute value that satisfies a predetermined condition regarding the magnitude, a flag is used to code the absolute value of each of M coefficients (M is an integer less than N), and no flag is used to code the absolute value of each of the remaining (NM) coefficients. In addition, in decoding the absolute value (step S30), the circuit decodes a signal indicating parity, which is the least significant bit of the absolute value (step S31a). Then, if a flag is used to code a part other than the least significant bit of the absolute value, the circuit decodes the flag by CABAC (Context-Based Adaptive Binary Arithmetic Coding) with updating of the symbol occurrence probability (step S32a). For example, the signal indicating the above-mentioned parity is parity_flag.

[0545] This makes it possible to appropriately decode the encoded image constituent units even if the number of flags used in encoding the image constituent units is limited.

[0546] The predetermined condition may be a condition that the absolute value of the coefficient is not a first value, or a condition that the absolute value of the coefficient is greater than or equal to a second value. For example, the first value may be 0 and the second value may be 3.

[0547] This makes it possible to properly decode the constituent units of the coded image even if the number of flags (e.g., gt1_flag) indicating whether the absolute value of a coefficient is not 0 is 3 or more is limited, for example. Or, even if the number of flags (e.g., gt2_flag) indicating whether the absolute value of a coefficient is 3 or more is limited, for example, the constituent units of the coded image can be properly decoded.

[0548] The flag may also consist of a plurality of different types of flags.

[0549] This allows the encoded image units to be appropriately decoded even if the number of each of the multiple flags such as the above-mentioned gt1_flag and gt2_flag is limited. The multiple flags may also include sig_flag and parity_flag.

[0550] Furthermore, in decoding the absolute value (step S30), if a remainder consisting of a numerical value for expressing the absolute value is encoded, the circuit may further decode the remainder by CABAC bypass processing.

[0551] This allows the components of the coded image to be properly decoded even if the absolute values ​​of the coefficients are coded as flags or as a data group consisting of at least one flag and a remainder.

[0552] Fig. 75 is a flowchart showing the decoding of the remaining part by the decoding device 200 in this embodiment. Note that the flowchart shown in Fig. 74 shows the decoding process operation corresponding to the encoding in the above third aspect.

[0553] In decoding the remainder, the circuit first determines a base level (i.e., the above-mentioned baseLevel) that indicates a different value depending on whether a count number according to the number of decoded flags for each coefficient preceding the coefficient corresponding to the remainder has reached a limit number (step S31b). Next, the circuit arithmetically decodes the remainder into a binary signal (step S32b). Next, the circuit selects a multi-value method corresponding to the binary signal from a plurality of different multi-value methods based on the determined base level (step S33b). Then, the circuit multi-values ​​the binary signal according to the selected multi-value method (step S34b).

[0554] For example, step S31b corresponds to the processes of steps S231, S233, and S235 shown in Fig. 71. That is, the base level determined when the count number reaches the limit is, for example, 1 or 3, which is smaller than the base level (for example, 5) determined when the limit has not been reached.

[0555] In this way, the multi-value method used for multi-value conversion of a binary signal is selected based on the base level, so that the remainder can be appropriately decoded.

[0556] In this embodiment, a sub-block is used as an example of a structural unit of an image, but the structural unit is not limited to a sub-block and may be any other unit. Also, in this embodiment, a block consisting of 4×4 pixels included in a transform unit is used as a specific example of a sub-block. However, the sub-block is not limited to this specific example and may be any other block.

[0557] In addition, in this embodiment, when encoding the absolute values ​​of each of a plurality of coefficients in sequence, the number of already encoded flags is counted, and if the counted number of flags is less than a limit number or a maximum number, it is determined that a flag is used to encode the absolute value of the next coefficient. However, without being limited to the number of flags, if a count number including the number of flags is less than a limit number, it may be determined that a flag is used, and if the count number is not less than the limit number, it may be determined that a flag is not used. The count number may be a numerical value that increases as the number of already encoded flags increases, and may include the number of other flags.

[0558] In addition, in this embodiment, the number of gt1_flag and gt2_flag is limited, but the definition of the flags whose number is limited in this way may be any. For example, gt1_flag is used for a coefficient whose absolute value is not 0, and indicates whether the absolute value is 3 or more, but may also indicate whether the absolute value is a number other than 3. Also, gt2_flag is used for a coefficient whose absolute value is 3 or more, and indicates whether the absolute value is 5 or more, but may also be used for a coefficient whose absolute value is a number other than 3, and indicates whether the absolute value is a number other than 5.

[0559] [Other examples] The encoding device 100 and the decoding device 200 in each of the above-mentioned examples may be used as an image encoding device and an image decoding device, or as a video encoding device and a video decoding device, respectively.

[0560] Alternatively, the encoding device 100 and the decoding device 200 may be used as an entropy encoding device and an entropy decoding device, respectively. That is, the encoding device 100 and the decoding device 200 may correspond only to the entropy encoding unit 110 and the entropy decoding unit 202. And, other components may be included in other devices.

[0561] In addition, at least a portion of each of the above examples may be used as an encoding method, a decoding method, an entropy encoding method or an entropy decoding method, or other methods.

[0562] Each component may be implemented by dedicated hardware or by executing a software program suitable for each component. Each component may be implemented by a program execution unit such as a CPU or processor reading and executing a software program recorded on a recording medium such as a hard disk or semiconductor memory.

[0563] Specifically, each of the encoding device 100 and the decoding device 200 may include a processing circuitry and a storage device electrically connected to and accessible from the processing circuitry. For example, the processing circuitry corresponds to the processor a1 or b1, and the storage device corresponds to the memory a2 or b2.

[0564] The processing circuit includes at least one of dedicated hardware and a program execution unit, and executes processing using a storage device. In addition, when the processing circuit includes a program execution unit, the storage device stores a software program to be executed by the program execution unit.

[0565] Here, the software for realizing the above-described encoding device 100 or decoding device 200 is a program such as the following.

[0566] For example, this program causes a computer to execute the process of the following encoding method, which includes the steps of: encoding the absolute value of each of a plurality of coefficients included in a constituent unit of a transformed and quantized image according to a predetermined order; encoding a sign indicating whether the coefficient is positive or negative for each of the plurality of coefficients; in encoding the absolute value, encoding a signal indicating parity which is the least significant bit of the absolute value; determining whether or not to use a flag for encoding a portion other than the least significant bit of the absolute value based on a first condition and a second condition; and, if it is determined that the flag is to be used, encoding the flag by CABAC with updating of symbol occurrence probability, the first condition is a condition based on the magnitude of the absolute value, and the second condition is a condition for limiting the number of the flags used in the constituent unit.

[0567] Furthermore, for example, this program causes a computer to execute the process of the following decoding method, in which, for each of a plurality of coefficients included in a constituent unit of an encoded image, the absolute value of the coefficient is decoded according to a predetermined order, and for each of the plurality of coefficients, a code indicating whether the coefficient is positive or negative is decoded, in the constituent unit, a flag is used to code the absolute value of each of M coefficients (M is an integer less than N) out of N coefficients (N is an integer equal to or greater than 2) each having an absolute value that satisfies a predetermined condition regarding the magnitude, and the flag is not used to code the absolute value of each of the remaining (NM) coefficients, and in the decoding of the absolute value, a signal indicating parity, which is the least significant bit of the absolute value, is decoded, and when the flag is used to code a portion other than the least significant bit of the absolute value, the flag is decoded by CABAC with updating of the symbol occurrence probability.

[0568] Also, each component may be a circuit, as described above. These circuits may form one circuit as a whole, or each may be a separate circuit. Also, each component may be realized by a general-purpose processor, or a dedicated processor.

[0569] Furthermore, the processing performed by a specific component may be executed by another component. The order in which the processing is executed may be changed, or multiple processing may be executed in parallel. Furthermore, the encoding / decoding device may include the encoding device 100 and the decoding device 200.

[0570] In addition, the ordinal numbers such as first and second used in the description may be changed as appropriate. Furthermore, new ordinal numbers may be given to components, or ordinal numbers may be removed.

[0571] Although the aspects of the encoding device 100 and the decoding device 200 have been described above based on a number of examples, the aspects of the encoding device 100 and the decoding device 200 are not limited to these examples. As long as they do not deviate from the spirit of the present disclosure, the scope of the aspects of the encoding device 100 and the decoding device 200 may include various modifications conceived by a person skilled in the art to each example, or configurations constructed by combining components in different examples.

[0572] One or more aspects disclosed herein may be implemented in combination with at least a part of other aspects in the present disclosure. Also, some processes, some configurations of devices, some syntax, etc. shown in the flowcharts of one or more aspects disclosed herein may be implemented in combination with other aspects.

[0573] [Implementation and Application] In each of the above embodiments, each of the functional or operational blocks can usually be realized by an MPU (micro processing unit) and a memory, etc. Furthermore, the processing by each of the functional blocks may be realized as a program execution unit such as a processor that reads and executes software (programs) recorded on a recording medium such as a ROM. The software may be distributed. The software may be recorded on various recording media such as semiconductor memories. It is also possible to realize each functional block by hardware (dedicated circuitry). Various combinations of hardware and software may be adopted.

[0574] The processing described in each embodiment may be realized by centralized processing using a single device (system), or may be realized by distributed processing using multiple devices. Also, the processor that executes the above program may be single or multiple. That is, centralized processing or distributed processing may be performed.

[0575] The aspects of the present disclosure are not limited to the above examples, and various modifications are possible, which are also included within the scope of the aspects of the present disclosure.

[0576] Further, here, application examples of the video coding method (image coding method) or video decoding method (image decoding method) shown in each of the above embodiments and various systems implementing the application examples will be described. Such a system may be characterized by having an image coding device using the image coding method, an image decoding device using the image decoding method, or an image coding / decoding device including both. Other configurations of such a system can be appropriately changed depending on the case.

[0577] [Usage example] 76 is a diagram showing the overall configuration of an appropriate content supply system ex100 for realizing a content distribution service. The area where communication services are provided is divided into cells of a desired size, and base stations ex106, ex107, ex108, ex109, and ex110, which are fixed wireless stations in the illustrated example, are installed in each cell.

[0578] In this content supply system ex100, devices such as a computer ex111, a game machine ex112, a camera ex113, a home appliance ex114, and a smartphone ex115 are connected to the Internet ex101 via an Internet service provider ex102 or a communication network ex104, and base stations ex106 to ex110. The content supply system ex100 may be configured to connect any of the above devices in combination. In various implementations, the devices may be directly or indirectly connected to each other via a telephone network or short-distance wireless communication, etc., without the base stations ex106 to ex110. Furthermore, the streaming server ex103 may be connected to devices such as the computer ex111, the game machine ex112, the camera ex113, the home appliance ex114, and the smartphone ex115 via the Internet ex101, etc. Furthermore, the streaming server ex103 may be connected to a terminal in a hotspot in an airplane ex117, etc., via a satellite ex116.

[0579] Instead of the base stations ex106 to ex110, wireless access points or hot spots may be used. The streaming server ex103 may be directly connected to the communication network ex104 without going through the Internet ex101 or the Internet service provider ex102, or may be directly connected to an airplane ex117 without going through a satellite ex116.

[0580] The camera ex113 is a device capable of taking still images and videos, such as a digital camera. The smartphone ex115 is a smartphone, a mobile phone, or a PHS (Personal Handy-phone System) that supports the mobile communication system, such as 2G, 3G, 3.9G, 4G, and 5G in the future.

[0581] The home appliance ex114 is a refrigerator, or an appliance included in a home fuel cell cogeneration system.

[0582] In the content supply system ex100, a terminal having a photographing function is connected to a streaming server ex103 via a base station ex106 or the like, thereby enabling live distribution or the like. In live distribution, a terminal (such as a computer ex111, a game machine ex112, a camera ex113, a home appliance ex114, a smartphone ex115, and a terminal in an airplane ex117) may perform the encoding process described in each of the above embodiments on still image or video content photographed by a user using the terminal, may multiplex the video data obtained by encoding with sound data obtained by encoding sound corresponding to the video, and may transmit the obtained data to the streaming server ex103. That is, each terminal functions as an image encoding device according to one aspect of the present disclosure.

[0583] Meanwhile, the streaming server ex103 streams the transmitted content data to the requesting client. The client is a computer ex111, a game machine ex112, a camera ex113, a home appliance ex114, a smartphone ex115, a terminal in an airplane ex117, or the like, capable of decoding the encoded data. Each device that receives the distributed data may decode and play the received data. That is, each device may function as an image decoding device according to one aspect of the present disclosure.

[0584] [Distributed processing] The streaming server ex103 may be a plurality of servers or computers that process, record, and distribute data in a distributed manner. For example, the streaming server ex103 may be realized by a CDN (Contents Delivery Network), and content distribution may be realized by a network that connects a large number of edge servers distributed around the world. In the CDN, a physically close edge server may be dynamically assigned according to the client. The content is cached and distributed to the edge server, thereby reducing delays. In addition, when some types of errors occur or communication conditions change due to an increase in traffic, processing can be distributed among multiple edge servers, the distribution entity can be switched to another edge server, or distribution can be continued by bypassing the part of the network where a failure has occurred, thereby realizing high-speed and stable distribution.

[0585] In addition to the distributed processing of the distribution itself, the encoding processing of the captured data may be performed by each terminal, may be performed by the server side, or may be shared among the terminals. As an example, in the encoding processing, a processing loop is generally performed twice. In the first loop, the complexity of the image or the amount of code is detected for each frame or scene. In the second loop, processing is performed to maintain the image quality and improve the encoding efficiency. For example, the terminal performs the first encoding processing, and the server side that receives the content performs the second encoding processing, thereby improving the quality and efficiency of the content while reducing the processing load on each terminal. In this case, if there is a request to receive and decode almost in real time, the data encoded once by the terminal can be received and played back by other terminals, making it possible to perform more flexible real-time distribution.

[0586] As another example, the camera ex113 etc. extracts features (amount of features or characteristics) from an image, compresses data related to the features as metadata, and transmits the compressed data to the server. The server performs compression according to the meaning of the image (or the importance of the content), for example by determining the importance of an object from the features and switching the quantization precision. The feature data is particularly effective in improving the accuracy and efficiency of motion vector prediction when the server recompresses the image. Alternatively, the terminal may perform simple encoding such as VLC (variable length coding), and the server may perform encoding with a high processing load such as CABAC (context-adaptive binary arithmetic coding).

[0587] As another example, in a stadium, a shopping mall, a factory, etc., there may be a plurality of video data in which almost the same scene has been shot by a plurality of terminals. In this case, using the plurality of terminals that shot the video and, as necessary, other terminals and servers that did not shoot the video, coding processing is assigned to each of them, for example, in units of GOPs (Group of Pictures), in units of pictures, or in units of tiles obtained by dividing a picture, for distributed processing. This reduces delays and realizes better real-time performance.

[0588] Since the multiple video data are of almost the same scene, the server may manage and / or instruct the video data shot by each terminal to be mutually referenced. The server may also receive the encoded data from each terminal and change the reference relationship between the multiple data, or correct or replace the pictures themselves and re-encode them. This makes it possible to generate a stream with improved quality and efficiency for each piece of data.

[0589] Furthermore, the server may distribute the video data after performing transcoding to change the encoding method of the video data. For example, the server may convert the MPEG encoding method to the VP encoding method (e.g., VP9), or convert H.264 to H.265.

[0590] In this way, the encoding process can be performed by a terminal or one or more servers. Therefore, in the following, descriptions such as "server" or "terminal" are used to indicate the entity performing the processing, but some or all of the processing performed by the server may be performed by the terminal, and some or all of the processing performed by the terminal may be performed by the server. The same applies to the decoding process.

[0591] [3D, multi-angle] It is becoming increasingly common to integrate and use images or videos of different scenes or the same scene taken from different angles by multiple devices such as cameras ex113 and / or smartphones ex115 that are approximately synchronized with each other. The videos taken by each device can be integrated based on the relative positional relationship between the devices obtained separately, or on areas where feature points included in the videos match.

[0592] The server may not only encode 2D video, but also encode still images automatically or at a time specified by the user based on scene analysis of the video and transmit them to the receiving terminal. If the server can obtain the relative positional relationship between the shooting terminals, the server may generate a 3D shape of the scene based on not only 2D video but also images of the same scene captured from different angles. The server may separately encode 3D data generated by point cloud or the like, or may generate images to be transmitted to the receiving terminal by selecting or reconstructing images from images captured by multiple terminals based on the results of recognizing or tracking people or objects using the 3D data.

[0593] In this way, the user can enjoy a scene by arbitrarily selecting each video corresponding to each shooting terminal, or can enjoy content in which a video of a selected viewpoint is cut out from 3D data reconstructed using multiple images or videos. Furthermore, together with the video, sound may also be collected from multiple different angles, and the server may multiplex the sound from a specific angle or space with the corresponding video and transmit the multiplexed video and sound.

[0594] In recent years, content that associates the real world with a virtual world, such as Virtual Reality (VR) and Augmented Reality (AR), has also become popular. In the case of VR images, the server creates viewpoint images for the right eye and the left eye, respectively, and may perform encoding that allows reference between each viewpoint video using Multi-View Coding (MVC) or the like, or may encode them as separate streams without mutual reference. When decoding the separate streams, it is preferable to play them in synchronization with each other so that a virtual three-dimensional space is reproduced according to the user's viewpoint.

[0595] In the case of an AR image, the server may superimpose virtual object information in the virtual space on camera information in the real space based on the three-dimensional position or the movement of the user's viewpoint. The decoding device may obtain or hold virtual object information and three-dimensional data, generate a two-dimensional image according to the movement of the user's viewpoint, and smoothly connect the two-dimensional image to create superimposed data. Alternatively, the decoding device may transmit the movement of the user's viewpoint to the server in addition to the request for virtual object information. The server may create superimposed data according to the movement of the viewpoint received from the three-dimensional data held by the server, encode the superimposed data, and distribute it to the decoding device. Note that the superimposed data typically has an α value indicating the transparency in addition to RGB, and the server may set the α value of the part other than the object created from the three-dimensional data to 0 or the like, and encode the part in a state where the part is transparent. Alternatively, the server may generate data in which a predetermined value of RGB value is set to the background like a chromakey, and the part other than the object is the background color. The predetermined value of RGB value may be determined in advance.

[0596] Similarly, the decoding process of the distributed data may be performed by the client (e.g., a terminal), by the server, or may be shared between the client and the server. As an example, a certain terminal may once send a reception request to the server, and the content corresponding to the request may be received by another terminal, decoded, and the decoded signal may be transmitted to a device having a display. By distributing the processing and selecting the appropriate content regardless of the performance of the communication-enabled terminal itself, data with good image quality can be reproduced. As another example, while large-sized image data is received by a TV or the like, a part of the area, such as tiles into which the picture is divided, may be decoded and displayed on the viewer's personal terminal. This allows the viewer to check his / her own area of ​​responsibility or the area he / she wants to check in more detail while sharing the overall picture.

[0597] It may be possible to seamlessly receive content using delivery system standards such as MPEG-DASH in situations where multiple short-range, medium-range, or long-range wireless communication is available indoors and outdoors. A user may freely select and switch in real time between a decoding device or a display device, such as a user's terminal or a display device placed indoors or outdoors. In addition, decoding can be performed while switching between a decoding device and a display device using the user's location information, etc. This makes it possible to map and display information on a part of the wall or ground of a neighboring building where a displayable device is embedded while the user is moving to a destination. It is also possible to switch the bit rate of the received data based on the accessibility of the encoded data on the network, such as when the encoded data is cached on a server that can be accessed from the receiving terminal in a short time, or copied to an edge server in a content delivery service.

[0598] [Scalable Coding] Regarding the switching of contents, a scalable stream compressed and coded by applying the video coding method shown in each of the above embodiments shown in FIG. 77 will be used for explanation. The server may have multiple streams with the same content but different qualities as individual streams, but may be configured to switch contents by taking advantage of the characteristics of a temporal / spatial scalable stream realized by coding in layers as shown in the figure. In other words, the decoding side can freely switch and decode low-resolution content and high-resolution content by determining which layer to decode according to an internal factor such as performance and an external factor such as the state of the communication band. For example, if a user wants to continue watching a video that he or she was watching on the smartphone ex115 while on the move on a device such as an Internet TV after returning home, the device only needs to decode the same stream up to a different layer, thereby reducing the burden on the server side.

[0599] Furthermore, as described above, pictures are coded for each layer, and in addition to the configuration in which scalability is realized in an enhancement layer above the base layer, the enhancement layer may include meta-information based on image statistics and the like. The decoding side may generate high-quality content by super-resolving pictures in the base layer based on the meta-information. The super-resolution may improve the signal-to-noise ratio while maintaining and / or increasing the resolution. The meta-information includes information for specifying linear or non-linear filter coefficients to be used in the super-resolution process, or information for specifying parameter values ​​in the filter process, machine learning, or least squares calculation to be used in the super-resolution process.

[0600] Alternatively, a configuration may be provided in which a picture is divided into tiles or the like according to the meaning of an object or the like in an image. The decoding side selects tiles to be decoded to decode only a part of the area. Furthermore, by storing the attributes of the object (person, car, ball, etc.) and the position in the video (coordinate position in the same image, etc.) as meta information, the decoding side can identify the position of a desired object based on the meta information and determine the tile including the object. For example, as shown in FIG. 78, the meta information may be stored using a data storage structure different from pixel data, such as a supplemental enhancement information (SEI) message in HEVC. This meta information indicates, for example, the position, size, or color of the main object.

[0601] Meta information may be stored in units consisting of multiple pictures, such as streams, sequences, or random access units. The decoding side can obtain the time when a specific person appears in a video, and by combining the picture-by-picture information with the time information, it can identify the picture in which an object exists and determine the position of the object within the picture.

[0602] [Web page optimization] FIG. 79 is a diagram showing an example of a display screen of a web page in a computer ex111 or the like. FIG. 80 is a diagram showing an example of a display screen of a web page in a smartphone ex115 or the like. As shown in FIG. 79 and FIG. 80, a web page may include multiple link images that are links to image content, and the appearance may differ depending on the device used to view the page. When multiple link images are visible on the screen, the display device (decoding device) may display a still image or I picture that each content has as a link image, or may display an image such as a gif animation using multiple still images or I pictures, or may receive only the base layer and decode and display the image until the user explicitly selects the link image, or until the link image approaches the center of the screen or the entire link image enters the screen.

[0603] When a link image is selected by a user, the display device performs decoding, for example, giving top priority to the base layer. If the HTML constituting the web page contains information indicating that the content is scalable, the display device may decode up to the enhancement layer. Furthermore, in order to ensure real-time performance, before selection or when the communication band is very tight, the display device decodes and displays only forward-reference pictures (I pictures, P pictures, and B pictures with forward reference only), thereby reducing the delay between the decoding time of the first picture and the display time (the delay from the start of decoding the content to the start of display). Furthermore, the display device may intentionally ignore the reference relationship of pictures, roughly decode all B pictures and P pictures with forward reference, and perform normal decoding as the number of received pictures increases over time.

[0604] [Automatic driving] Furthermore, when transmitting and receiving still image or video data such as 2D or 3D map information for automatic driving or driving assistance of a vehicle, the receiving terminal may receive weather or construction information as meta information in addition to image data belonging to one or more layers, and may associate and decode these. Note that the meta information may belong to a layer, or may simply be multiplexed with the image data.

[0605] In this case, since a car, drone, or airplane including a receiving terminal moves, the receiving terminal can realize seamless reception and decoding while switching between base stations ex106 to ex110 by transmitting location information of the receiving terminal. Also, the receiving terminal can dynamically switch how much meta information to receive or how much to update map information according to a user's selection, a user's situation, and / or a communication band state.

[0606] In the content supply system ex100, the client can receive, decode, and play back encoded information sent by a user in real time.

[0607] [Distribution of personal content] Furthermore, the content supply system ex100 allows not only high-quality, long-duration content from video distributors, but also low-quality, short-duration content from individuals via unicast or multicast distribution. Such personal content is expected to continue to increase in the future. To improve the quality of personal content, the server may perform editing before encoding. This can be achieved, for example, by using the following configuration.

[0608] During shooting, in real time or after accumulating, the server performs recognition processing such as shooting errors, scene search, semantic analysis, and object detection from the original image data or the encoded data. Then, based on the recognition results, the server manually or automatically performs editing such as correcting focus deviation or camera shake, deleting less important scenes such as scenes that are less bright than other pictures or out of focus, emphasizing object edges, and changing color. The server encodes the edited data based on the editing results. It is also known that if the shooting time is too long, the viewer rating will decrease, and the server may automatically clip not only scenes with less importance as described above but also scenes with little movement based on the image processing results so that the content will be within a specific time range depending on the shooting time. Alternatively, the server may generate a digest based on the result of the semantic analysis of the scene and encode it.

[0609] In some cases, personal content may contain content that infringes copyright, moral rights, or portrait rights, and the range of sharing may exceed the intended range, which may be inconvenient for individuals. Therefore, for example, the server may change the image to an unfocused image of a person's face on the periphery of the screen, or the inside of a house, and encode it. Furthermore, the server may recognize whether the image to be encoded contains a face of a person other than a person registered in advance, and if so, may perform processing such as applying a mosaic to the face. Alternatively, as pre-processing or post-processing of encoding, the user may specify a person or background area that he or she wishes to process in the image from the viewpoint of copyright, etc. The server may replace the specified area with another image, or may perform processing such as blurring the focus. If it is a person, the person can be tracked in the video and the image of the person's face can be replaced.

[0610] Since viewing of personal content with a small amount of data requires real-time performance, the decoding device may receive the base layer as a top priority and decode and play it, depending on the bandwidth. The decoding device may receive an enhancement layer during this time, and when the content is played back two or more times, such as when the playback is looped, play back high-quality video including the enhancement layer. With a stream that has been scalably encoded in this way, it is possible to provide an experience in which the video is rough when not selected or when viewing begins, but the stream gradually becomes smarter and the image quality improves. In addition to scalable encoding, a similar experience can be provided even if a rough stream that is played the first time and a second stream that is encoded with reference to the first video are configured as a single stream.

[0611] [Other application examples] Moreover, these encoding or decoding processes are generally processed in an LSIex500 possessed by each terminal. The LSI (large scale integration circuitry)ex500 (see FIG. 76) may be a one-chip or multiple-chip configuration. Note that software for encoding or decoding moving images may be incorporated into some kind of recording medium (such as a CD-ROM, a flexible disk, or a hard disk) that can be read by the computer ex111 or the like, and the encoding or decoding process may be performed using the software. Furthermore, if the smartphone ex115 has a camera, video data captured by the camera may be transmitted. The video data at this time may be data encoded and processed by the LSIex500 possessed by the smartphone ex115.

[0612] The LSIex500 may be configured to download and activate application software. In this case, the terminal first determines whether the terminal supports the encoding method of the content or has the ability to execute a specific service. If the terminal does not support the encoding method of the content or does not have the ability to execute a specific service, the terminal may download a codec or application software, and then acquire and play the content.

[0613] Furthermore, at least one of the video encoding devices (image encoding devices) or video decoding devices (image decoding devices) of the above-mentioned embodiments can be incorporated into a digital broadcasting system, not limited to the content supply system ex100 via the Internet ex101. Since multiplexed data in which video and audio are multiplexed is carried and transmitted on broadcasting radio waves using a satellite or the like, there is a difference in that it is more suitable for multicast compared to the content supply system ex100, which has a configuration that is easy to use for unicast, but similar applications are possible with regard to the encoding process and decoding process.

[0614] [Hardware configuration] FIG. 81 is a diagram showing further details of the smartphone ex115 shown in FIG. 76. FIG. 82 is a diagram showing a configuration example of the smartphone ex115. The smartphone ex115 includes an antenna ex450 for transmitting and receiving radio waves to and from the base station ex110, a camera unit ex465 capable of taking videos and still images, and a display unit ex458 for displaying the video captured by the camera unit ex465 and the decoded data of the video received by the antenna ex450. The smartphone ex115 further includes an operation unit ex466 such as a touch panel, an audio output unit ex457 such as a speaker for outputting audio or sound, an audio input unit ex456 such as a microphone for inputting audio, a memory unit ex467 capable of storing encoded data such as captured video or still images, recorded audio, received video or still images, and e-mail, or decoded data, and a slot unit ex464 which is an interface unit with a SIMex468 for identifying a user and authenticating access to various data including a network. In addition, an external memory may be used instead of the memory unit ex467.

[0615] A main control unit ex460 that can comprehensively control the display unit ex458 and operation unit ex466 etc. is connected to a power supply circuit unit ex461, an operation input control unit ex462, a video signal processing unit ex455, a camera interface unit ex463, a display control unit ex459, a modulation / demodulation unit ex452, a multiplexing / separation unit ex453, an audio signal processing unit ex454, a slot unit ex464, and a memory unit ex467 via a synchronization bus ex470.

[0616] When the power key is turned on by a user's operation, the power supply circuit unit ex461 starts up the smartphone ex115 into an operational state and supplies power to each unit from the battery pack.

[0617] The smartphone ex115 performs processes such as telephone calls and data communications under the control of a main control unit ex460 having a CPU, a ROM, and a RAM. During a telephone call, a voice signal collected by a voice input unit ex456 is converted into a digital voice signal by a voice signal processing unit ex454, and then subjected to spectrum spreading processing by a modulation / demodulation unit ex452, and then subjected to digital-to-analog conversion processing and frequency conversion processing by a transmission / reception unit ex451, and the resulting signal is transmitted via an antenna ex450. In addition, the received data is amplified and subjected to frequency conversion processing and analog-to-digital conversion processing, and then subjected to spectrum inverse spreading processing by a modulation / demodulation unit ex452, and then converted into an analog voice signal by a voice signal processing unit ex454, and then output from a voice output unit ex457. During a data communication mode, text, still images, or video data can be sent under the control of the main control unit ex460 via an operation input control unit ex462 based on the operation of an operation unit ex466 or the like of the main unit. Similar transmission and reception processing is performed. When transmitting video, still images, or video and audio in the data communication mode, the video signal processing unit ex455 compresses and codes the video signal stored in the memory unit ex467 or the video signal input from the camera unit ex465 by the moving image coding method shown in each of the above embodiments, and sends the coded video data to the multiplexing / separation unit ex453. The audio signal processing unit ex454 codes the audio signal collected by the audio input unit ex456 while the video or still image is being captured by the camera unit ex465, and sends the coded audio data to the multiplexing / separation unit ex453. The multiplexing / separation unit ex453 multiplexes the coded video data and the coded audio data by a predetermined method, and performs modulation and conversion processing in the modulation / demodulation unit (modulation / demodulation circuit unit) ex452 and the transmission / reception unit ex451, and transmits the data via the antenna ex450. The predetermined method may be determined in advance.

[0618] In the case of receiving a video attached to an e-mail or a chat, or a video linked to a web page, in order to decode the multiplexed data received via the antenna ex450, the multiplexing / separation unit ex453 separates the multiplexed data into a bit stream of video data and a bit stream of audio data by separating the multiplexed data, and supplies the encoded video data to the video signal processing unit ex455 via the synchronization bus ex470, and supplies the encoded audio data to the audio signal processing unit ex454. The video signal processing unit ex455 decodes the video signal by a video decoding method corresponding to the video encoding method shown in each of the above embodiments, and the video or still image included in the linked video file is displayed on the display unit ex458 via the display control unit ex459. The audio signal processing unit ex454 decodes the audio signal, and the audio is output from the audio output unit ex457. As real-time streaming becomes more and more popular, audio playback may not be socially appropriate depending on the user's situation. Therefore, as an initial setting, it is preferable to have a configuration in which only the video data is played without playing the audio signal, and audio may be played in sync only when the user performs an operation such as clicking on the video data.

[0619] Although the smartphone ex115 has been described as an example here, other implementation formats are possible, such as a transmitting terminal having only an encoder and a receiving terminal having only a decoder, in addition to a transmitting / receiving terminal having both an encoder and a decoder. In the digital broadcasting system, multiplexed data in which audio data is multiplexed with video data is received or transmitted. However, in addition to audio data, text data related to the video may also be multiplexed in the multiplexed data. Also, video data itself may be received or transmitted instead of the multiplexed data.

[0620] Although the main control unit ex460 including the CPU controls the encoding or decoding process, various terminals are often equipped with a GPU. Therefore, a configuration may be used in which a wide area is processed collectively by utilizing the performance of the GPU using a memory shared by the CPU and GPU, or a memory whose addresses are managed so that they can be used in common. This can shorten the encoding time, ensure real-time performance, and achieve low latency. In particular, it is efficient to perform the processing of motion search, deblocking filter, SAO (Sample Adaptive Offset), and transformation and quantization collectively in units such as pictures by the GPU, rather than by the CPU. [Industrial Applicability]

[0621] The present disclosure is applicable to, for example, television receivers, digital video recorders, car navigation systems, mobile phones, digital cameras, digital video cameras, video conference systems, electronic mirrors, and the like. [Explanation of symbols]

[0622] 100 Encoding device 102 Division 104 Subtraction section 106 Conversion unit 108 Quantization section 110 Entropy coding unit 112, 204 Inverse quantization section 114, 206 Inverse conversion unit 116, 208 Addition section 118, 210 Block Memory 120, 212 Loop filter section 122, 214 frame memory 124, 216 Intra prediction section 126, 218 Inter prediction section 128, 220 Predictive control unit 200 Decryption device 202 Entropy Decoding Unit 1201 Boundary determination section 1202, 1204, 1206 Switches 1203 Filter Judgment Unit 1205 Filter processing section 1207 Filter characteristic determination section 1208 Processing Judgment Unit a1, b1 processor a2, b2 memory

Claims

1. Memory, a processor coupled to the memory and configured to perform Context-Based Adaptive Binary Arithmetic Coding (CABAC); In the predictive residual coding of the current block, the processor For each of a plurality of coefficients, which are a plurality of quantized coefficients generated by performing transformation and quantization on the difference between the current block and the predicted block, encoding each of a plurality of flags, each of which indicates a numerical property of a coefficient, by CABAC; The plurality of flags are a first flag indicating whether the coefficient is zero; a second flag indicating whether the coefficient is odd or even; a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number); a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold (the second threshold is a natural number greater than the first threshold); and Including, determining a base level that is a reference value for obtaining a remainder that is a further required value for expressing the absolute value of the coefficient; Calculating a predicted absolute value of the coefficient based on an absolute value of a sum of five surrounding coefficients of the coefficient in the current block; determining a value of the Rice parameter from among a plurality of candidates based on the calculated difference between the predicted absolute value and the base level; if the difference is less than a first value, the Rice parameter is set to zero; if the difference is greater than or equal to a first value and less than a second value, the Rice parameter is set to 1; if the difference is greater than or equal to a second value, the Rice parameter is set to 2; encoding a remainder of the coefficient using the Rice parameter, the remainder being calculated using the absolute value of the coefficient and the base level; if the absolute value of the coefficient is greater than zero, encoding a fifth flag indicating whether the coefficient is a positive or negative value; The five surrounding coefficients include a first surrounding coefficient located to the right of the coefficient, a second surrounding coefficient located to the right of the first surrounding coefficient, a third surrounding coefficient located immediately below the coefficient, a fourth surrounding coefficient located immediately below the third surrounding coefficient, and a fifth surrounding coefficient located to the right of the third surrounding coefficient. Encoding device.

2. Memory, a processor coupled to the memory and configured to perform Context-Based Adaptive Binary Arithmetic Coding (CABAC) decoding; In the prediction residual decoding of the current block, the processor For each of a plurality of coefficients, which are a plurality of quantized coefficients generated by performing transformation and quantization on the difference between the current block and the predicted block, Decoding each of a plurality of flags, each of which indicates a numerical property of a coefficient, by CABAC decoding; The plurality of flags are a first flag indicating whether the coefficient is zero; a second flag indicating whether the coefficient is odd or even; a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number); a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold (the second threshold is a natural number greater than the first threshold); and Including, determining a base level that is a reference value for obtaining a remainder that is a further required value for expressing the absolute value of the coefficient; Calculating a predicted absolute value of the coefficient based on an absolute value of a sum of five surrounding coefficients of the coefficient in the current block; determining a value of the Rice parameter from among a plurality of candidates based on the calculated difference between the predicted absolute value and the base level; if the difference is less than a first value, the Rice parameter is set to zero; if the difference is greater than or equal to a first value and less than a second value, the Rice parameter is set to 1; if the difference is greater than or equal to a second value, the Rice parameter is set to 2; Decoding the remainder of the coefficients using the Rice parameters; if the absolute value of the coefficient is greater than zero, decoding a fifth flag indicating whether the coefficient is a positive or negative value; The five surrounding coefficients include a first surrounding coefficient located to the right of the coefficient, a second surrounding coefficient located to the right of the first surrounding coefficient, a third surrounding coefficient located immediately below the coefficient, a fourth surrounding coefficient located immediately below the third surrounding coefficient, and a fifth surrounding coefficient located to the right of the third surrounding coefficient. Decryption device.

3. Memory, a processor coupled to the memory, The processor, in operation, generating a bitstream for decoding by a decoding device that performs predictive residual decoding of the current block; including in the bitstream a number of flags, each of which indicates a nature of numerical values ​​of coefficients included in the current block, by CABAC (Context-Based Adaptive Binary Arithmetic Coding) coding; The plurality of flags are a first flag indicating whether the coefficient is zero; a second flag indicating whether the coefficient is odd or even; a third flag indicating whether the absolute value of the coefficient is equal to or greater than a first threshold (the first threshold is a natural number); a fourth flag indicating whether the absolute value of the coefficient is equal to or greater than a second threshold (the second threshold is a natural number greater than the first threshold); and a remainder, which is a value further required to express the absolute value of the coefficient when the absolute value of the coefficient cannot be expressed by the plurality of flags alone, the remainder being calculated using the absolute value of the coefficient and a base level of the coefficient and coded using a Rice parameter; a fifth flag indicating whether the coefficient is a positive value or a negative value when the absolute value of the coefficient is greater than zero, the fifth flag being coded by the CABAC coding; Including, The predicted absolute value of the coefficient is calculated based on the absolute value of the sum of five neighboring coefficients of the coefficient in the current block; The Rice parameter is determined from among a plurality of candidates based on a difference between a predicted absolute value of the coefficient and the base level; if the difference is less than a first value, the Rice parameter is set to zero; if the difference is greater than or equal to a first value and less than a second value, the Rice parameter is set to 1; if the difference is greater than or equal to a second value, the Rice parameter is set to 2; The five surrounding coefficients include a first surrounding coefficient located to the right of the coefficient, a second surrounding coefficient located to the right of the first surrounding coefficient, a third surrounding coefficient located immediately below the coefficient, a fourth surrounding coefficient located immediately below the third surrounding coefficient, and a fifth surrounding coefficient located to the right of the third surrounding coefficient. Bitstream generator.

Images