Display device

Abstract

To improve the reliability of a light-emitting device.SOLUTION: A light-emitting device has a driving circuit unit including a driving circuit transistor and a pixel unit including a pixel transistor on the same substrate. The driving circuit transistor and the pixel transistor are inverted-staggered transistors including an oxide semiconductor layer partially in contact with an oxide insulating layer. In the pixel unit, a color filter layer and a light-emitting element are provided on the oxide insulating layer. In the driving circuit transistor, a gate electrode layer and a conductive layer overlapping with the oxide semiconductor layer are provided on the oxide insulating layer. The gate electrode layer, a source electrode layer, and a drain electrode layer are formed of a metal conductive film.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a light-emitting device having a layer containing an organic compound as a light-emitting layer, and a method for manufacturing the same. The present invention relates to electronic equipment incorporating a light-emitting display device having light-emitting elements as a component.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This generally refers to electro-optical devices such as light-emitting devices, semiconductor circuits, and electronic equipment. be. [Background technology]

[0003] The organic compound used as the light emitter has characteristics such as being thin and lightweight, having high-speed response, and being driven by a low direct current voltage. The light-emitting element is being considered for use in next-generation flat panel displays and lighting. In particular, display devices in which light-emitting elements are arranged in a matrix are more difficult to manufacture than conventional liquid crystal display devices. Compared to LCDs, it is believed to have an advantage in that it has a wider viewing angle and better visibility.

[0004] The mechanism of light emission of a light-emitting element is to sandwich an EL layer between a pair of electrodes and apply a voltage to the cathode. The electrons injected from the anode and the holes injected from the anode recombine at the luminescence centers of the EL layer to form molecules. When an exciton is formed, and the molecular exciton relaxes to the ground state, it releases energy and emits light. There are two types of excited states: singlet and triplet. It is believed that this is possible even after going through a state of

[0005] The EL layer constituting the light-emitting element has at least a light-emitting layer. The layer structure may include a hole injection layer, a hole transport layer, an electron transport layer, an electron injection layer, etc. It is also possible.

[0006] Metal oxides are also attracting attention as materials that exhibit semiconducting properties. Examples of oxides include tungsten oxide, tin oxide, indium oxide, and zinc oxide. There are thin-film transistors in which metal oxides that exhibit such semiconducting properties are used as channel formation regions. Such a capacitor is already known (Patent Document 1 and Patent Document 2).

[0007] In addition, the TFT using an oxide semiconductor has a high field effect mobility. It is also possible to configure a driving circuit for a display device or the like using the above. [Prior art documents] [Patent documents]

[0008] [Patent Document 1] JP 2007-123861 A [Patent Document 2] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0009] Thin film transistors using oxide semiconductor films have high operating speeds and are relatively easy to manufacture. Therefore, sufficient reliability is required.

[0010] To improve the operating characteristics and reliability of a thin film transistor using an oxide semiconductor film is one of the challenges.

[0011] In particular, it is preferable that the operating speed of thin film transistors used in the driver circuits is fast.

[0012] For example, the channel length (L) of a thin-film transistor can be shortened or the channel width (W) can be widened. However, shortening the channel length reduces the switching characteristics, e.g. For example, the on / off ratio becomes smaller. Also, if the channel width W is widened, the thin-film transistor However, this increases the capacity load on the star itself.

[0013] In addition, a light-emitting device having a thin-film transistor with stable electrical characteristics even if the channel length is short is also It is also an object of the present invention to provide an apparatus.

[0014] In addition, when forming a plurality of different circuits on an insulating surface, for example, a pixel portion and a driver circuit may be formed on the same substrate. When formed on a substrate, the thin film transistor used in the pixel portion must have excellent switching characteristics. For example, a large on-off ratio is required, and the thin film transistors used in the drive circuits Fast operation speed is required. In particular, the higher the resolution of the display device, Since the time it takes to write a display image is shortened, the thin-film transistors used in the driver circuits operate faster. It is preferable to use speed.

[0015] In addition, it is also possible to reduce variations in electrical characteristics of thin film transistors using an oxide semiconductor film. This will be one of the challenges. [Means for solving the problem]

[0016] One embodiment of the light-emitting device of the present invention is a light-emitting device having a driver circuit portion including a driver circuit transistor on the same substrate. and a pixel portion including a pixel transistor, The transistor is made up of a gate electrode layer, a gate insulating layer on the gate electrode layer, and an oxide semiconductor layer on the gate insulating layer. A conductor layer, a source electrode layer and a drain electrode layer on the oxide semiconductor layer, the oxide semiconductor layer, an oxide insulating layer over the source electrode layer and the drain electrode layer and in contact with a part of the oxide semiconductor layer; In the pixel area, a color filter layer is formed on the oxide insulating layer, and a pixel transistor is formed on the color filter layer. A first electrode layer, an EL layer, and a second electrode layer are laminated to electrically connect to the transistor. In the circuit transistor, a gate electrode layer and an oxide semiconductor layer are formed on an oxide insulating layer. A conductive layer is provided, and the gate electrode layer, the source electrode layer, and the drain electrode layer are each a metal conductive film. do.

[0017] Another embodiment of the light emitting device of the present invention is a light emitting device including a driving circuit including a driving circuit transistor on the same substrate. A pixel portion including a driver circuit transistor and a pixel transistor. The transistor is made up of a gate electrode layer, a gate insulating layer on the gate electrode layer, and an oxide layer on the gate insulating layer. an oxide semiconductor layer, a source electrode layer and a drain electrode layer on the oxide semiconductor layer, and an oxide semiconductor layer an oxide insulating layer that is in contact with a part of the oxide semiconductor layer over the source electrode layer and the drain electrode layer; In the pixel portion, a color filter layer is formed on the oxide insulating layer, and a pixel transistor is formed on the color filter layer. A first electrode layer, an EL layer, and a second electrode layer electrically connected to the transistor via a connection electrode layer. In the transistor for a driver circuit, a gate electrode layer and a A conductive layer overlapping with the oxide semiconductor layer is provided, and a gate electrode layer, a source electrode layer, and a drain electrode layer are provided. The electrode layer is a metal conductive film.

[0018] The pixel transistor and the driver circuit transistor are inverted staggered type with a bottom gate structure. The pixel transistor and the driver circuit transistor are connected to the source electrode layer. and an oxide insulating film in contact with a portion of the oxide semiconductor layer exposed between the drain electrode layer and the oxide insulating film is provided. This is a channel etch type transistor.

[0019] The transistor for the driver circuit has a structure in which an oxide semiconductor layer is sandwiched between a gate electrode and a conductive layer. This reduces the variation in the threshold voltage of the transistors, resulting in stable electrical A light-emitting device having a transistor having the above characteristics can be provided. It may be at the same potential as the electrode layer, a floating potential, or a fixed potential, e.g., GN It may be a D potential or 0V. In addition, by applying an arbitrary potential to the conductive layer, the threshold of the transistor can be The value can be controlled.

[0020] The pixel transistor and the pixel electrode may be formed in direct contact with each other, or may be formed with a connection electrode layer therebetween. The connection electrode layer may be made of Al, Cr, Cu, Ta, Ti, Mo, A laminated film consisting of a film mainly composed of an element selected from W, or a combination of an alloy film of such an element. can be used.

[0021] The conductive layer provided on the oxide semiconductor layer of the transistor for the driver circuit, the first wiring (terminal or The first wiring (also called a terminal or a connection electrode) and the second wiring (also called a terminal or a connection electrode) are connected to the pixel electrode In the same process, indium oxide, indium oxide tin oxide alloy, indium oxide zinc oxide alloy Alternatively, the conductive layer 12 may be formed using an oxide conductive material such as zinc oxide, or may be formed in the same process as the connection electrode layer. A film mainly composed of an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W, or Alternatively, the insulating layer 12 may be formed using a metal material such as an alloy film of these materials.

[0022] In addition, light-emitting elements of multiple types of luminescent colors and pixel elements electrically connected to the light-emitting elements are formed on the same substrate. A transistor can be formed to manufacture a light emitting device such as a display.

[0023] In addition, a plurality of light-emitting elements that emit white light are provided, and the light-emitting areas of the respective light-emitting elements are overlapped. An optical film, specifically a color filter, is provided on the display to create a full-color light-emitting display device. The color filter here includes the black matrix and overcoat. Three color filter layers (red color filter, blue color filter, green color filter) It does not refer to the entire film with a color filter, but rather to a single color filter. refers to...

[0024] One embodiment of a method for manufacturing a light-emitting device of the present invention for realizing the above structure is a method for manufacturing a driving circuit portion and a pixel A gate electrode layer is formed on a substrate having an insulating surface including a gate electrode portion by using a metal conductive film. A gate insulating layer is formed on the electrode layer, an oxide semiconductor layer is formed on the gate insulating layer, and an oxide semiconductor After dehydrating or dehydrogenating the oxide semiconductor layer, water or hydrogen is removed from the oxide semiconductor layer without contacting it with the air. The source electrode layer and the drain electrode layer are formed by using a metal conductive film on the oxide semiconductor layer. a source electrode layer and a drain electrode layer; and An oxide insulating layer is formed in contact with a part of the driver circuit. A pixel transistor is formed in the pixel portion, and a color filter layer is formed on the oxide insulating layer in the pixel portion. A first electrode layer is formed on the color filter layer to electrically connect to the pixel transistor. An EL layer is formed on the first electrode layer, and a second electrode layer is formed on the EL layer. On an oxide insulating layer overlapping with a gate electrode layer and an oxide semiconductor layer of a transistor for a driver circuit, The conductive layer is formed in the same process as the first electrode layer.

[0025] One embodiment of a method for manufacturing a light-emitting device of the present invention for realizing the above structure is a method for manufacturing a driving circuit portion and a pixel A gate electrode layer is formed on a substrate having an insulating surface including a gate electrode portion by using a metal conductive film. A gate insulating layer is formed on the electrode layer, an oxide semiconductor layer is formed on the gate insulating layer, and an oxide semiconductor After dehydrating or dehydrogenating the oxide semiconductor layer, water or hydrogen is removed from the oxide semiconductor layer without contacting it with the air. The source electrode layer and the drain electrode layer are formed by using a metal conductive film on the oxide semiconductor layer. a source electrode layer and a drain electrode layer; and An oxide insulating layer is formed in contact with a part of the driver circuit. A pixel transistor is formed in the pixel portion, and a color filter layer is formed on the oxide insulating layer in the pixel portion. A pixel transistor is formed on the color filter layer and electrically connected to the pixel transistor through a connection electrode layer. forming a first electrode layer, forming an EL layer on the first electrode layer, and forming a second electrode layer on the EL layer; In the driver circuit portion, a gate electrode layer and an oxide semiconductor layer of the driver circuit transistor are overlapped. A conductive layer is formed on the oxide insulating layer in the same process as the connection electrode layer.

[0026] In the photolithography process in the manufacturing process of the light-emitting device described above, the transmitted light A mask layer formed by a multi-tone mask, which is an exposure mask with multiple intensities, is used. An etching step may also be performed.

[0027] The mask layer formed using the multi-tone mask has a shape with multiple film thicknesses. The shape can be further modified by etching the metal into different patterns. It can be used for multiple etching processes. Thus, a mask layer corresponding to at least two different patterns can be formed. This reduces the number of exposure masks and the corresponding photolithography steps. This allows the process to be simplified.

[0028] The above configuration solves at least one of the above problems.

[0029] The oxide semiconductor used in this specification is InMO 3 (ZnO) m (m>0) A thin film is formed on the oxide semiconductor layer, and a thin film transistor is fabricated using the thin film as an oxide semiconductor layer. In addition, M is one or more metal elements selected from Ga, Fe, Ni, Mn, and Co. Indicates a metal element. For example, M can be Ga, Ga and Ni, or Ga and Ni. In some cases, the oxide semiconductor may contain the above-mentioned metal elements other than Ga, such as Fe. In addition to the metal elements contained as M, Fe, Ni and other transition metals are included as impurity elements. In the present specification, the term "In" refers to a transition metal oxide. MO 3 (ZnO) m In the oxide semiconductor layer with a structure represented by (m>0), M is Ga The oxide semiconductor with the structure containing In-Ga-Zn-O is called the In-Ga-Zn-O oxide semiconductor, and the thin film of the In-Ga-Zn-O oxide semiconductor is called the In-Ga-Zn-O oxide semiconductor. It is also called n-Ga-Zn-O type non-single crystal film.

[0030] In addition to the above, metal oxides that can be used for the oxide semiconductor layer include In-Sn-Zn-O In-Al-Zn-O, Sn-Ga-Zn-O, Al-Ga-Zn-O, Sn -Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In- Metal oxides of O, Sn-O, and Zn-O can be used. The oxide semiconductor layer made of such a material may contain silicon oxide.

[0031] Heat treatment is performed under an inert gas atmosphere of nitrogen or rare gas (argon, helium, etc.). In this case, the oxide semiconductor layer becomes oxygen-deficient and has low resistance, that is, becomes N-type ( N - Then, an oxide insulating film is formed in contact with the oxide semiconductor layer, and a heat treatment is performed after the formation. By performing heat treatment, the oxide semiconductor layer is made into an oxygen-excess state, and the resistance is increased, i.e., I In addition, solid-phase oxidation is performed to place the oxide semiconductor layer in an oxygen-excess state. This allows us to obtain thin film transistors with good electrical characteristics and high reliability. It is therefore possible to manufacture and provide a light emitting device that achieves this.

[0032] Dehydration or dehydrogenation is performed using inert gases such as nitrogen or noble gases (argon, helium, etc.). Heat treatment in an atmosphere at 400°C to 750°C, preferably 425°C to 750°C. This process reduces impurities such as moisture contained in the oxide semiconductor layer. 2 O) can be prevented from re-impregnation.

[0033] The heat treatment for dehydration or dehydrogenation is 2 This can be done in a nitrogen atmosphere with an O content of 20 ppm or less. Also, H 2 It may be performed in ultra-dry air with an O concentration of 20 ppm or less.

[0034] The oxide semiconductor layer that has been dehydrated or dehydrogenated is Even when TDS measurements were performed on the layer up to 450°C, two peaks of water and at least 300 The heat treatment conditions should be such that a peak that appears around 100 °C is not detectable. A thin-film transistor using a dehydrogenated oxide semiconductor layer was found to have a TDS value of 4 Even when measurements are performed up to 50°C, the water peak that appears at around 300°C is not detected.

[0035] The heating temperature T at which the oxide semiconductor layer is dehydrated or dehydrogenated is changed to The hydrogen or water is recontaminated in the same furnace as the hydrogen or water dehydration without exposure to air. It is important that the oxide semiconductor layer is dehydrated or dehydrogenated to reduce its resistance, i.e. N-type (N - After that, the oxide semiconductor layer is made high-resistance and made into an I-type oxide semiconductor layer, and then a thin film transistor is formed. When a transistor is created, the threshold voltage (Vth) of the thin film transistor is made positive. This makes it possible to realize a so-called normally-off switching element. In semiconductors, the channel is formed with a positive threshold voltage as close as possible to 0V. This is desirable for devices (light-emitting devices). When the gate voltage is 0V, current flows between the source and drain electrodes. In an active matrix display device, the circuit The electrical characteristics of the thin film transistor are important and determine the performance of the display device. Among the electrical characteristics of thin film transistors, the threshold voltage is particularly important. Even if the value is high, if the threshold voltage is high or the threshold voltage is negative, It is difficult to control the threshold voltage. In the case of a thin-film transistor, when the driving voltage is low, it functions as a TFT. In the case of an n-channel thin-film transistor, Only when a positive voltage is applied to the gate does a channel form and drain current begin to flow. A transistor in which a channel does not form unless the driving voltage is high is desirable. A transistor that forms a channel and flows a drain current even under a negative voltage condition is called a circuit. However, it is not suitable for use as a thin film transistor in a circuit.

[0036] In addition, the gas atmosphere used to lower the temperature from T is different from the gas atmosphere used to raise the temperature to T. A gas atmosphere may be switched to, for example, air in the same furnace where dehydration or dehydrogenation was performed. The furnace is filled with high-purity oxygen gas or N 2 O gas, ultra-dry air (dew point Cooling is performed by filling the container with water at a temperature of -40°C or less, preferably -60°C or less.

[0037] The moisture content in the film is reduced by a heat treatment for dehydration or dehydrogenation, and then the film is Cool slowly (or cool) in an atmosphere that is not prone to dew (dew point is -40°C or less, preferably -60°C or less). The oxide semiconductor film is used to improve the electrical characteristics of thin film transistors and to facilitate mass production. This will realize thin-film transistors that are both reliable and high performance.

[0038] In this specification, the method is carried out under an inert gas atmosphere of nitrogen or a rare gas (argon, helium, etc.). This heat treatment is called a heat treatment for dehydration or dehydrogenation. By reason 2 Dehydrogenation does not only mean that hydrogen is removed as hydrogen, but also as hydrogen. For convenience, this process is referred to as dehydration or dehydrogenation, which also includes the elimination of OH and other groups.

[0039] Heat treatment is performed under an inert gas atmosphere of nitrogen or rare gas (argon, helium, etc.). In this case, the oxide semiconductor layer becomes oxygen-deficient and has low resistance, that is, becomes N-type ( N - To make something (e.g., convert it into something new).

[0040] In addition, the drain electrode layer overlaps with the oxygen-deficient high-resistance drain region (HRD). A resistance drain region is also formed. The oxygen-deficient high-resistance source region (HRS) overlaps the layer. e Source region) is formed.

[0041] Specifically, the carrier concentration in the high-resistance drain region is 1×10 18 / cm 3 Within the above range and the carrier concentration in the channel formation region is at least (1×10 18 / cm 3 Less than The carrier concentration in this specification is calculated from Hall effect measurements at room temperature. This refers to the carrier concentration value measured.

[0042] Thereafter, at least a part of the dehydrated or dehydrogenated oxide semiconductor layer is brought into an oxygen-excess state. By this, the resistance is increased, that is, the I-type is formed, and a channel formation region is formed. The treatment for making a part of the dehydrogenated oxide semiconductor layer into an oxygen-excess state can be carried out by the following method. The oxide insulating layer in contact with the dehydrated or dehydrogenated oxide semiconductor layer is An insulating film is formed by sputtering, or on a dehydrated or dehydrogenated oxide semiconductor layer. An oxide insulating film is formed so as to be in contact with the oxide film, and then heat treatment is performed or dehydration or dehydrogenation is performed. An oxide insulating film is formed in contact with the oxide semiconductor layer, and then the oxide insulating film is further heated in an atmosphere containing oxygen. Heat treatment is performed, or an oxide semiconductor layer is formed in contact with the dehydrated or dehydrogenated oxide semiconductor layer. After the insulating film is formed, it is heated in an inert gas atmosphere and then cooled in an oxygen atmosphere. or an oxide insulating film is formed in contact with the dehydrated or dehydrogenated oxide semiconductor layer. After that, it is heated under an inert gas atmosphere and then dried with ultra-dry air (dew point of -40°C or less, preferably Cooling treatment is carried out at temperatures below -60°C.

[0043] In addition, at least a part of the dehydrated or dehydrogenated oxide semiconductor layer (which overlaps with the gate electrode layer) is In order to make the channel formation region in the region where the oxygen is present, a high resistance is achieved by selectively creating an oxygen-excess state. The oxide semiconductor layer may be in contact with the dehydrated or dehydrogenated oxide semiconductor layer. The source electrode layer and the drain electrode layer are formed of a metal electrode such as Ti. The exposed area that does not overlap with the drain electrode layer is selectively made into an oxygen-excessive state to form a channel formation area. When the oxygen-excess state is selectively created, the first layer overlapping the source electrode layer can be formed. A first high-resistance source region and a second high-resistance drain region overlapping the drain electrode layer are formed. The region between the first high-resistance source region and the second high-resistance drain region is a channel formation region. That is, the channel formation region is formed in a self-aligned manner between the source electrode layer and the drain electrode layer. is formed.

[0044] This allows the manufacture of a light-emitting device having a thin-film transistor with good electrical characteristics and high reliability. , it becomes possible to provide.

[0045] Note that a high-resistance drain region is formed in the oxide semiconductor layer overlapping with the drain electrode layer. This makes it possible to improve the reliability of the drive circuit. By forming a resistive drain region, the drain electrode layer, the high-resistance drain region, and the channel It is possible to form a structure in which the conductivity can be changed stepwise over the formation region. Therefore, when the drain electrode layer is connected to a wiring that supplies a high power supply potential VDD, Even if a high electric field is applied between the drain electrode layer and the drain electrode layer, the high resistance drain region acts as a buffer. This prevents a local high electric field from being applied, improving the breakdown voltage of the thin film transistor. It is possible.

[0046] In addition, in the oxide semiconductor layer overlapping with the drain electrode layer and the source electrode layer, By forming a high-resistance source region and a high-resistance in-region, the channel Specifically, the high resistance drain region can be formed by By forming the gate insulating film, the leakage current of the transistor flowing between the drain electrode layer and the source electrode layer is reduced. The drain electrode layer, the high-resistance drain region on the drain electrode layer side, and the channel-shaped The order is the channel region, the high resistance source region on the source electrode layer side, and the source electrode layer. In the drain formation region, the leakage current flows from the high-resistance drain region on the drain electrode layer side to the channel region. The gate insulating layer and the channel formation region interface, which has high resistance when the transistor is off, are The back channel (channel away from the gate electrode layer) can be concentrated in the vicinity of the gate electrode. It is possible to reduce leakage current in a portion of the surface of the formation region.

[0047] In addition, a high resistance source region overlapping the source electrode layer and a high resistance drain region overlapping the drain electrode layer are The gate region overlaps a part of the gate electrode layer via the gate insulating layer, depending on the width of the gate electrode layer. As a result, the electric field intensity in the vicinity of the end portion of the drain electrode layer can be more effectively reduced.

[0048] In addition, an oxide conductive layer may be formed between the oxide semiconductor layer and the source electrode and the drain electrode. The oxide conductive layer preferably contains zinc oxide as a component, and more preferably contains indium oxide. For example, zinc oxide, zinc aluminum oxide, zinc oxynitride, etc. Lead aluminum, zinc gallium oxide, or the like can be used. Drain region (LRN(Low Resistance N-type conduction ivity region, and LRD (Low Resistance Drain) region. Specifically, the carrier concentration in the low-resistance drain region is The HRD region is larger than the HRD region, e.g., 1×10 20 / cm 3 More than 1×10 21 / c m 3 The oxide conductive layer is preferably in the range of 100 to 2000 nm. By placing it between the drain electrodes, the contact resistance can be reduced, enabling high-speed operation of the transistor. Therefore, the frequency characteristics of the peripheral circuits (drive circuits) can be improved.

[0049] The oxide conductive layer and the metal layer for forming the source and drain electrodes can be formed successively. It is.

[0050] The first and second wirings are formed by oxidizing the first and second wirings to function as LRN or LRD. Alternatively, the wiring may be a laminated wiring composed of the same material as the conductive layer and a metal material. By stacking conductive layers, the coverage of steps such as overcoming lower wiring and openings is improved. This reduces the wiring resistance. It is also expected to prevent high resistance and disconnection, making it possible to provide a highly reliable light-emitting device. Cut.

[0051] In addition, when the first wiring and the second wiring are connected as described above, the oxide conductive layer is sandwiched between them. By connecting the two parts together, an insulating oxide is formed on the metal surface of the connection part (contact part). This is expected to prevent an increase in contact resistance due to the contact hole, resulting in a highly reliable light-emitting device. can be provided.

[0052] In addition, since thin-film transistors are easily damaged by static electricity, etc., For the line, a protection circuit for protecting the thin film transistor in the pixel area can be provided on the same substrate. The protection circuit is preferably formed using a nonlinear element using an oxide semiconductor layer. It is.

[0053] The ordinal numbers such as 1st and 2nd are used for convenience and do not indicate the order of steps or stacking. In addition, the specific names used in this specification are not intended to identify the invention. This does not indicate the Effect of the Invention

[0054] Semiconductor device including thin film transistors using oxide semiconductor layers and having excellent electrical characteristics and reliability It is possible to realize a light emitting device having the above structure. [Brief description of the drawings]

[0055] [Figure 1] 1A and 1B are diagrams illustrating a light-emitting device. [Diagram 2] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Diagram 3] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 4] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Diagram 5] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 6] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 7] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 8] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 9] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 10] 1A and 1B are diagrams illustrating a light-emitting device. [Figure 11] 1A and 1B are diagrams illustrating a light-emitting device. [Figure 12] FIG. 1 is a block diagram illustrating a light-emitting device. [Figure 13] FIG. 2 illustrates a configuration of a signal line driver circuit. [Figure 14] FIG. 1 is a circuit diagram showing a configuration of a shift register. [Figure 15] 1A and 1B are a circuit diagram and a timing chart illustrating the operation of a shift register. [Figure 16] 1A and 1B are diagrams illustrating a light-emitting device. [Figure 17] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 18] 1A to 1C illustrate a method for manufacturing a light-emitting device. [Figure 19] FIG. 1 is a diagram illustrating a pixel equivalent circuit of a light-emitting device. [Figure 20] 1A and 1B are diagrams illustrating a light-emitting device. [Figure 21] 1A and 1B are diagrams illustrating light-emitting elements. [Figure 22] 1A and 1B are diagrams illustrating a light-emitting device. [Figure 23] FIG. [Figure 24] FIG. [Diagram 25] FIG. [Figure 26] FIG. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0056] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. It is understood by those skilled in the art that various changes in form and detail may be made without departing from the spirit and scope of the present invention. Therefore, the present invention should be interpreted as being limited to the following description of the embodiment. In the configuration described below, parts having the same parts or similar functions are not included. The same reference numerals are used in common between different drawings for the corresponding parts, and the repeated explanations will be omitted.

[0057] (Embodiment 1) A light-emitting device including a thin film transistor and a manufacturing process thereof will be described with reference to FIGS. This will be explained using:

[0058] A light-emitting device according to one embodiment of the present invention is shown in FIG. A pixel portion including the element, the thin film transistor 170 and the capacitor 147, and a thin film transistor 180 A driving circuit section including a first terminal 121 is provided at the terminal section of the gate wiring. , a connection electrode 120, a terminal electrode 128 for connection, and a second terminal 1 22 and a terminal electrode 129 for connection. An oxide insulating film 107 and a protective insulating layer 106 are formed on the thin film transistor 170. do.

[0059] The light-emitting element is formed by laminating a first electrode layer 110, an EL layer 194, and a second electrode layer 195. The drain electrode layer of the thin film transistor 170 and the first electrode layer 110 are in contact with each other. By forming the thin film transistor 170, the thin film transistor 170 is electrically connected to the pixel portion. A color filter layer 191 is formed on the protective insulating layer 106. The color filter layer 191 It is covered with an overcoat layer 192 and then covered with a protective insulating layer 109. The electrode layer 110 is formed on the protective insulating layer 109. 193 is formed on the thin film transistor 170 .

[0060] In the driving circuit section, the thin film transistor 180 is formed by forming a conductive layer above the gate electrode layer and the semiconductor layer. The drain electrode layer 165b is a conductive layer formed in the same process as the gate electrode layer. It is in electrical contact with layer 162 .

[0061] The manufacturing method will be described in detail below with reference to Figs. 2 to 5 and Fig. 11. 1 corresponds to a cross-sectional view of the device.

[0062] A conductive layer is formed on the entire surface of a substrate 100 having an insulating surface. The photolithography process of step 1 is carried out, a resist mask is formed, and the unnecessary portions are removed by etching. The wiring and the electrode (gate electrode layer 101, gate electrode layer 161, conductive layer 162) are formed by removing the portions. 2A, the wiring and the capacitor wiring layer 108 are formed. If the end of the electrode is etched to have a tapered shape, the coating property of the laminated film is improved. Note that the gate electrode layer 101 and the gate electrode layer 161 are gate electrodes. Included in the route wiring.

[0063] There is no significant limitation on the substrate that can be used for the substrate 100 having an insulating surface. In any case, it is necessary for the insulating surface to have sufficient heat resistance to withstand subsequent heat treatment. The substrate 100 may be a glass substrate.

[0064] In addition, for glass substrates, if the temperature of the subsequent heat treatment is high, the distortion point is 730°C or higher. For the glass substrate, for example, aluminosilicate glass, alumina Glass materials such as lumino borosilicate glass and barium borosilicate glass are used. In addition, by containing more barium oxide (BaO) than boric acid, it is more practical. Heat-resistant glass is obtained. 2 O 3 By using a glass substrate containing more BaO, is preferred.

[0065] Instead of the above glass substrate, an insulating substrate such as a ceramic substrate, a quartz substrate, or a sapphire substrate may be used. Alternatively, a substrate made of an insulating material may be used. Alternatively, a substrate made of a crystallized glass may be used. The light emitting device shown in the embodiment is a bottom emission type in which light is emitted from the surface on the substrate 100 side. The substrate 100 is a light-transmitting substrate, but the light is emitted from the surface opposite the substrate 100. In the case of a top-emission type, a non-transparent metal substrate or the like is used as the substrate 100. Good too.

[0066] The insulating film serving as the base film is a substrate 100, a gate electrode layer 101, a gate electrode layer 161, and a conductive layer 1 The base film may be provided between the substrate 62, the capacitor wiring layer 108, and the first terminal 121. It has the function of preventing the diffusion of impurity elements from 100, and is used in silicon nitride films, silicon oxide films, and oxynitride films. The insulating film is formed by a laminate structure of one or more films selected from a silicon nitride film, a silicon oxynitride film, or a silicon oxynitride film. It is possible.

[0067] A gate electrode layer 101, a gate electrode layer 161, a conductive layer 162, a capacitance wiring layer 108, and a first The material of the terminal 121 is molybdenum, titanium, chromium, tantalum, tungsten, aluminum. Metallic materials such as tungsten, copper, neodymium, scandium, etc., or alloy materials mainly composed of these It can be formed as a single layer or a laminate using the above-mentioned materials.

[0068] For example, a gate electrode layer 101, a gate electrode layer 161, a conductive layer 162, a capacitance wiring layer 108, The two-layer laminated structure of the first terminal 121 is a molybdenum layer laminated on an aluminum layer. A two-layer structure with a molybdenum layer on a copper layer, or a two-layer structure with a molybdenum layer on a copper layer, or A two-layer structure with a titanium nitride layer or tantalum nitride layer laminated on top, a titanium nitride layer and molybdenum It is preferable to use a two-layer structure in which a tungsten layer is laminated. layer or tungsten nitride and an alloy of aluminum and silicon or aluminum and titanium A laminate of an alloy and a titanium nitride or titanium layer is preferred.

[0069] Next, the gate electrode layer 101, the gate electrode layer 161, the conductive layer 162, the capacitance wiring layer 108, A gate insulating layer 102 is formed over the first terminal 121 (see FIG. 2A).

[0070] The gate insulating layer 102 is a silicon oxide layer formed by using a plasma CVD method, a sputtering method, or the like. , a silicon nitride layer, a silicon oxynitride layer, a silicon nitride oxide layer, or an aluminum oxide layer, For example, the deposition gas is SiH 4 , oxygen and nitrogen A silicon oxynitride layer may be formed by plasma CVD. The thickness is 100 nm to 500 nm. In the case of a multilayer structure, the thickness is, for example, 50 nm to 2 A first gate insulating layer having a thickness of 000 nm or less, and a second gate insulating layer having a thickness of 5 nm or more and 300 nm or less on the first gate insulating layer. The second gate insulating layer has a thickness of 1 m or less.

[0071] In this embodiment, the gate insulating layer 102 is formed by a plasma CVD method to a thickness of 200 nm or more. A bottom silicon nitride layer is formed.

[0072] Next, an oxide semiconductor film 13 having a thickness of 2 nm to 200 nm is formed on the gate insulating layer 102. 0 (see Figure 2(B)).

[0073] Note that before the oxide semiconductor film is formed by a sputtering method, argon gas is introduced. Reverse sputtering is performed to generate plasma, and the gate insulating layer 102 is adhered to the surface of the gate insulating layer 102. In reverse sputtering, the substrate is sputtered in an argon atmosphere. This is a method of modifying the surface by applying voltage using an RF power source to generate plasma near the substrate. Instead of the argon atmosphere, nitrogen, helium, etc. may be used. The atmosphere is oxygen and N 2 It is also possible to carry out the experiment in an atmosphere containing O or the like. 2 , C.F. 4 The above may be added to the atmosphere.

[0074] Even if heat treatment for dehydration or dehydrogenation is performed after the formation of the oxide semiconductor film 130, the oxide semiconductor film 130 is not oxidized. In order to make the semiconductor film amorphous, it is preferable to make the film thickness as thin as 50 nm or less. When the oxide semiconductor film is thinned, the oxide semiconductor layer is heated after the oxide semiconductor layer is formed. Crystallization can be suppressed.

[0075] The oxide semiconductor film 130 is an In-Ga-Zn-O based non-single crystal film, an In-Sn-Zn-O based , In-Al-Zn-O system, Sn-Ga-Zn-O system, Al-Ga-Zn-O system, Sn- Al-Zn-O series, In-Zn-O series, Sn-Zn-O series, Al-Zn-O series, In-O In this embodiment, an In-Ga-based, Sn-O-based, or Zn-O-based oxide semiconductor film is used. The film is formed by a sputtering method using a Zn-O-based oxide semiconductor target. The oxide semiconductor film 130 is grown under a rare gas (typically, argon) atmosphere, an oxygen atmosphere, or It is formed by sputtering in an atmosphere of rare gas (typically argon) and oxygen. In addition, when the sputtering method is used, SiO 2 2% by weight or more 10 times % or less, The material contains SiOx (x>0) and is heat-treated for dehydration or dehydrogenation in the subsequent process. It is preferable to suppress crystallization during the process.

[0076] Here, an oxide semiconductor target containing In, Ga, and Zn (In 2 O 3 :Ga 2 O 3 :ZnO=1:1:1[mol%], In:Ga:Zn=1:1:0.5[at%]) The distance between the substrate and the target was 100 mm, the pressure was 0.2 Pa, and the direct current (DC) was Power supply: 0.5 kW, argon and oxygen (argon:oxygen = 30 sccm:20 sccm, oxygen The film is formed in an atmosphere with a nitrogen flow rate of 40%). Note that if a pulsed direct current (DC) power supply is used, This is preferable because it reduces the damage and makes the film thickness distribution uniform. The thickness of the film is greater than or equal to 5 nm and less than or equal to 200 nm. Then, a film was formed by sputtering using an In-Ga-Zn-O oxide semiconductor target. A 20 nm thick In-Ga-Zn-O based non-single crystal film is deposited.

[0077] The sputtering method uses a high-frequency power source as the sputtering power source. There are two types of sputtering: DC sputtering and pulsed DC sputtering, which applies a bias in a pulsed manner. RF sputtering is mainly used to deposit insulating films, while DC The sputtering method is mainly used when forming a metal film.

[0078] There are also multi-target sputtering devices that can accommodate multiple targets of different materials. The sputtering equipment can deposit layers of different materials in the same chamber, or multiple layers in the same chamber. It is also possible to form films by discharging multiple types of materials simultaneously using the bar.

[0079] In addition, a magnetron sputtering method using a magnet mechanism inside the chamber is used. E using a plasma generating device using microwaves instead of glow discharge. There is a sputtering device that uses the CR sputtering method.

[0080] In addition, as a method for forming a film using a sputtering method, a target material and a sputtering method are used during film formation. Reactive sputtering is a method in which a compound thin film is formed by chemically reacting the components of the sputtering gas with the There are also sputtering methods in which a voltage is applied to the substrate during deposition, and bias sputtering methods in which a voltage is also applied to the substrate during deposition.

[0081] Next, a second photolithography process is performed on the oxide semiconductor film 130, and a resist mask 137, and the oxide semiconductor film 130 and the gate insulating layer 102 are removed by etching. Then, a contact hole reaching the first terminal 121 is formed in the gate insulating layer 102. 119 and a contact hole 118 reaching the conductive layer 162 are formed (see FIG. 2(C)). ).

[0082] In this manner, in a state where the oxide semiconductor film 130 is laminated on the entire surface of the gate insulating layer 102, When a step of forming a contact hole in the insulating layer 102 is performed, a laser is formed on the surface of the gate insulating layer 102. Since the resist mask does not come into direct contact with the gate insulating layer 102, contamination of the surface of the gate insulating layer 102 (such as adhesion of impurities) is prevented. ) can be prevented. This improves the condition of the device, leading to improved reliability.

[0083] A resist pattern may be formed directly on the gate insulating layer to open the contact holes. In that case, after removing the resist, a heat treatment is performed to dehydrate the surface of the gate insulating film, It is preferable to carry out dehydrogenation and dehydroxylation treatment. For example, the treatment is carried out in an inert gas atmosphere (nitrogen, or helium, neon, argon, etc.) and heat treatment in an oxygen atmosphere (400°C or higher) The gate insulating layer is then heated at a temperature of 750°C or less to remove impurities such as hydrogen and water. Good.

[0084] Next, the resist mask 137 is removed, and the oxide semiconductor film 130 is subjected to a third photolithography. The islands are formed by etching using resist masks 135a and 135b formed by a lithography process. In addition, island-shaped oxide semiconductor layers 131 and 132 are formed (see FIG. 3A). Resist masks 135a and 135b for forming the semiconductor layer are formed by the inkjet method. If the resist mask is formed by the inkjet method, a photomask is not required. This reduces manufacturing costs.

[0085] Next, the oxide semiconductor layers 131 and 132 are dehydrated or dehydrogenated. Hydrogenated oxide semiconductor layers 133 and 134 are formed (see FIG. 3B). The temperature of the first heat treatment for hydrogenation or dehydrogenation is 400° C. or higher and 750° C. or lower, preferably 400° C. or lower. The temperature must be between 25℃ and 750℃. If the temperature is over 425℃, the heat treatment time must be less than 1 hour. However, if the temperature is less than 425° C., the heat treatment time should be longer than one hour. Here, the substrate is placed in an electric furnace, which is a type of heat treatment apparatus, and the oxide semiconductor layer is heated to a nitrogen atmosphere. After the heat treatment in a nitrogen atmosphere, the oxide semiconductor layer was dehydrated without being exposed to air. In this embodiment, the oxide semiconductor layers 133 and 134 are obtained by preventing the re-mixing of oxygen and hydrogen. The heating temperature T at which the semiconductor layer is dehydrated or dehydrogenated is lowered sufficiently so that water does not enter again. The same furnace was used until the temperature reached the desired temperature, specifically, the temperature was kept in a nitrogen atmosphere until it dropped by 100°C or more below the heating temperature T. The atmosphere is not limited to nitrogen, and may be a rare gas such as helium, neon, or argon. Dehydration or dehydrogenation is carried out under a nitrogen atmosphere.

[0086] The oxide semiconductor layer is heat-treated at a temperature of 400° C. to 700° C. Dehydration and dehydrogenation are performed, and the water (H 2 O) can be prevented from re-impregnation.

[0087] The heat treatment device is not limited to an electric furnace, and may be, for example, a GRTA (Gas Rapid Th thermal annealing) equipment, LRTA (Lamp Rapid Thermal) Using RTA (Rapid Thermal Anneal) equipment such as LRTA devices can be used with halogen lamps, metal halide lamps, xenon Arc lamps, carbon arc lamps, high pressure sodium lamps, high pressure mercury lamps, etc. This is a device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp. TA devices use heat conduction or radiation from heating elements such as resistance heating elements as well as lamps. The GRTA is a gas processing system that uses high-temperature gas to heat the object to be processed. This is a method of performing heat treatment. The gas used is a rare gas such as argon, or a heating gas such as nitrogen. An inert gas that does not react with the material to be treated is used. Heat treatment may be performed at a temperature of from 0.degree. C. to 750.degree. C. for several minutes.

[0088] In the first heat treatment, nitrogen or a rare gas such as helium, neon, or argon is used. In particular, it is preferable that the oxide semiconductor layer does not contain water, hydrogen, or the like. The dehydration and dehydrogenation heat treatment, which is carried out at up to 750°C, is carried out using H 2 Nitrogen atmosphere with O of 20 ppm or less It is preferable to carry out the treatment in an atmosphere of nitrogen, helium, or neodymium. The purity of rare gas such as argon or argon should be 6N (99.9999%) or more, preferably 7N ( 99.99999%) or more (i.e. impurity concentration is 1 ppm or less, preferably 0.1 ppm) It is preferable to use the following:

[0089] Depending on the conditions of the first heat treatment or the material of the oxide semiconductor layer, the oxide semiconductor layer may be crystallized and microcrystalline. For example, the crystallinity may be 90% or more, or 80% or more. In addition, depending on the conditions of the first heat treatment or the amount of the acid, the oxide semiconductor film may become a microcrystalline oxide semiconductor film. Depending on the material of the oxide semiconductor film, it may become an amorphous oxide semiconductor film that does not contain crystalline components. There are also.

[0090] In addition, the first heat treatment of the oxide semiconductor layer is performed to process the oxide semiconductor layers into island-shaped oxide semiconductor layers 131 and 132. In that case, the first heat treatment may be performed on the oxide semiconductor film 130 before the first heat treatment. The substrate is then removed from the heating apparatus and a photolithography process is carried out.

[0091] The heat treatment for dehydration and dehydrogenation of the oxide semiconductor layer is performed after the formation of the oxide semiconductor layer. After the source electrode and the drain electrode are laminated on the semiconductor layer, the source electrode and the drain electrode After forming a passivation film thereon, the above-mentioned step may be performed.

[0092] In addition, contact holes 118 and 119 are formed in the gate insulating layer 102 as shown in FIG. The step of forming the oxide semiconductor film 130 is performed after the oxide semiconductor film 130 is subjected to dehydration or dehydrogenation treatment. Good too.

[0093] Note that the etching of the oxide semiconductor film here is not limited to wet etching and may be dry etching. Etching may also be used.

[0094] The etching gas used in dry etching is a gas containing chlorine (chlorine-based gas, e.g. Chlorine (Cl 2 ), boron chloride (BCl 3 ), silicon chloride (SiCl 4 ), carbon tetrachloride (CC l 4 ) etc.) are preferred.

[0095] In addition, gases containing fluorine (fluorine-based gases, such as carbon tetrafluoride (CF 4 ), sulfur fluoride (SF 6 ), nitrogen fluoride (NF 3 ), trifluoromethane (CHF 3 ), hydrogen bromide (HBr ), oxygen (O 2), and adding rare gases such as helium (He) and argon (Ar) to these gases. Additive gases, etc. can be used.

[0096] As a dry etching method, parallel plate type RIE (Reactive Ion Etch) ing method and ICP (Inductively Coupled Plasma) A combined plasma etching method can be used. It is possible to etch into the desired shape. The etching conditions (the amount of power applied to the coil-type electrode, the amount of power applied to the electrode on the substrate side) were set so that The amount of power used, the temperature of the electrode on the substrate, etc. are adjusted appropriately.

[0097] The etching solution used for wet etching is a mixture of phosphoric acid, acetic acid, and nitric acid. Ammonia peroxide (31% by weight hydrogen peroxide: 28% by weight ammonia water: water = 5:2:2) Alternatively, ITO07N (manufactured by Kanto Chemical Co., Ltd.) may be used.

[0098] In addition, the etching solution after wet etching is washed away together with the etched material. The waste etching solution containing the removed material is purified to remove the contained material. The indium, etc. contained in the oxide semiconductor layer may be reused from the waste liquid after the etching. By recovering and reusing materials, resources can be used more effectively and costs can be reduced. .

[0099] In order to etch the desired shape, the etching conditions (etching Adjust the etching conditions (liquid, etching time, temperature, etc.) as appropriate.

[0100] Next, a metal conductive film made of a metal material is formed on the oxide semiconductor layers 133 and 134 by sputtering. It is formed by deposition or vacuum deposition.

[0101] The material of the metal conductive film was selected from Al, Cr, Cu, Ta, Ti, Mo, and W. The elements, or alloys containing the above elements, or alloy films combining the above elements, etc. The metal conductive film may have a single layer structure or a laminated structure of two or more layers. For example, a single-layer structure of an aluminum film containing silicon, a titanium film laminated on an aluminum film, A two-layer structure is formed by laminating a Ti film and an aluminum film on top of the Ti film. A three-layer structure in which a Ti film is formed is also available. In addition, titanium (Ti) and tantalum are added to Al. (Ta), tungsten (W), molybdenum (Mo), chromium (Cr), neodymium (Nd ), scandium (Sc), or a film or alloy film made of a single or multiple combinations of elements selected from the group consisting of Alternatively, a nitride film may be used.

[0102] When a heat treatment is performed after the metal conductive film is formed, the metal conductive film must have heat resistance to withstand the heat treatment. It is preferable to make the above-mentioned

[0103] Next, a fourth photolithography process is performed, and resist masks 136a, 136b, and 13 6c, 136d, 136e, 136f, and 136g are formed, and the metal conductive film is etched. The unnecessary portions are removed to form the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 105c. 165a, the drain electrode layer 165b, the capacitance electrode layer 149, the connection electrode 120, and the second terminal A child 122 is formed (see FIG. 3(C)).

[0104] Note that the oxide semiconductor layers 133 and 134 are not removed when the metal conductive film is etched. The materials and etching conditions are appropriately adjusted as described above.

[0105] In this embodiment, a Ti film is used as the metal conductive film, and the oxide semiconductor layers 133 and 134 are In the present embodiment, an In-Ga-Zn-O oxide is used to etch the oxide semiconductor layers 133 and 134. The liquid was ammonia / hydrogen peroxide (31% by weight hydrogen peroxide: 28% by weight ammonia water: water = 5: 2:2) etc.

[0106] In this fourth photolithography step, the source electrode layers 105a, 165a, the drain The connection electrode 120 and the second terminal 122 are made of the same material as the first electrode layers 105b and 165b. The second terminal 122 is formed on the source wiring (the source electrode layer 105a , 165a)。 Also, the connection electrode 120 is electrically connected to the The contact hole 119 is formed in contact with the first terminal 121 and electrically connected thereto.

[0107] Note that resist masks 136a and 136b for forming the source electrode layer and the drain electrode layer are 6b, 136c, 136d, 136e, 136f, and 136g are formed by the inkjet method. If the resist mask is formed by the inkjet method, a photomask is not required. This reduces manufacturing costs.

[0108] Next, resist masks 136a, 136b, 136c, 136d, 136e, 136f, The oxide insulating film 136g is removed, and the oxide insulating film 136b is formed as a protective insulating film in contact with the oxide semiconductor layers 133 and 134. A film 107 is formed.

[0109] At this stage, the oxide semiconductor layers 133 and 134 are formed in regions in contact with the oxide insulating film. Of this region, a region overlapping with the oxide insulating film 107 via the gate electrode layer and the gate insulating layer This is the channel formation region.

[0110] The oxide insulating film 107 has a thickness of at least 1 nm and is formed by an oxide deposition method such as a sputtering method. The insulating film 107 can be formed by using an appropriate method that does not allow impurities such as water and hydrogen to be mixed in. In this embodiment, a silicon oxide film having a thickness of 300 nm is used as the oxide insulating film 107. The substrate temperature during film formation should be between room temperature and 300°C. In this embodiment, the temperature is set to room temperature. (typically argon) atmosphere, oxygen atmosphere, or rare gas (typically argon) The deposition can be carried out under an oxygen atmosphere. For example, a silicon target can be used to irradiate oxygen and Silicon oxide can be formed by sputtering in a low-resistance atmosphere. The oxide insulating film formed in contact with the semiconductor layer is resistant to moisture, hydrogen ions, and OH - Impurities such as It uses an inorganic insulating film that does not contain any substances and blocks the intrusion of these substances from the outside. The film may be a silicon oxide film, a silicon nitride oxide film, an aluminum oxide film, an aluminum oxide nitride film, or the like. is used.

[0111] Next, a second heat treatment (preferably a second heat treatment) is performed under an inert gas atmosphere or a nitrogen gas atmosphere. For example, the heating is performed in a nitrogen atmosphere. The second heat treatment is performed at 250°C for 1 hour under atmospheric pressure. Part of the oxide semiconductor layers 133 and 134 overlapping with the oxide insulating film 107 is in contact with the oxide insulating film 107. The material is heated in a

[0112] Through the above steps, the oxide semiconductor layer after deposition is dehydrated or dehydrogenated. After the heat treatment for reducing the resistance, a part of the oxide semiconductor layer is selectively treated with an oxygen-excess This is the state.

[0113] As a result, in the oxide semiconductor layer 133, a channel formation region overlapping with the gate electrode layer 161 is formed. The region 166 is an I-type region, and includes a high resistance source region 167a overlapping the source electrode layer 165a, A high-resistance drain region 167b overlapping the drain electrode layer 165b is formed in a self-aligned manner. Similarly, in the oxide semiconductor layer 134, the gate The channel forming region 116 overlapping with the electrode layer 101 is an I-type region. A high-resistance source region 117a overlapping the drain electrode layer 105b and a high-resistance drain region 117b overlapping the drain electrode layer 105b. The region 117b is formed in a self-aligned manner, and the oxide semiconductor layer 103 is formed.

[0114] In addition, the drain electrode layers 105b and 165b (and the source electrode layers 105a and 165a) overlap. In the folded oxide semiconductor layers 103 and 163, the high-resistance drain regions 117b and 167b ( or high resistance source regions 117a, 167a) are formed to form a circuit. The reliability can be improved. Specifically, the high-resistance drain regions 117b and 167b By forming the drain electrode layer 105b, 165b to the high resistance drain region 117b , 167b, the conductivity of the channel forming regions 116, 166 can be changed stepwise. Therefore, the drain electrode layers 105b and 165b can be provided with a high voltage power supply. When the gate electrode layers 101 and 161 are connected to a wiring that supplies a potential VDD, Even if a high electric field is applied between the drain electrode layers 105b and 165b, the high resistance drain region is prevented from being broken. This buffer prevents localized high electric fields from being applied, improving the breakdown voltage of the transistor. It is possible.

[0115] Also, the drain electrode layers 105b and 165b (and the source electrode layers 105a and 165a) are overlapped. In the folded oxide semiconductor layers 103 and 163, the high-resistance drain regions 117b and 167b ( or high resistance source regions 117a, 167a) are formed to form a circuit. The leakage current in the channel formation regions 116 and 166 can be reduced.

[0116] In this embodiment, a silicon oxide film is formed as the oxide insulating film 107 by a sputtering method. After this, a heat treatment is performed at 250°C to 350°C to remove the oxide layer between the source and drain regions. Oxygen is impregnated and diffused into the oxide semiconductor layer from the exposed portion of the oxide semiconductor layer (channel formation region). By forming a silicon oxide film by sputtering, the excess acid in the silicon oxide film is eliminated. The oxygen can be impregnated and diffused into the oxide semiconductor layer by heat treatment. The channel region can be made highly resistive by the impregnation and diffusion of oxygen into the oxide semiconductor layer. This allows the thin film transistor to be normally off. can be obtained.

[0117] The high-resistance source region or the high-resistance drain region in the oxide semiconductor layer is preferably an oxide semiconductor. When the thickness of the oxide layer is thin, 15 nm or less, it is formed throughout the thickness direction. When the thickness of the conductor layer is thicker, 30 nm or more and 50 nm or less, a part of the oxide semiconductor layer, The region in contact with the source electrode layer or the drain electrode layer and its vicinity have low resistance, forming a high resistance source region. Alternatively, a high-resistance drain region is formed, and a region of the oxide semiconductor layer close to the gate insulating film is It can also be type I.

[0118] A protective insulating layer may be further formed over the oxide insulating film 107. For example, The RF sputtering method is suitable for mass production, so the protection film is This is a preferred method for forming an insulating layer. The protective insulating layer is formed by removing moisture, hydrogen ions, and OH - etc. It uses an inorganic insulating film that does not contain impurities and blocks them from entering from the outside, and nitrides Silicon film, aluminum nitride film, silicon nitride oxide film, aluminum oxynitride film, etc. are used. In this embodiment, the protective insulating layer 106 is formed using a silicon nitride film. See Figure 4(A).

[0119] Through the above steps, the thin film transistor 180 is formed in the driver circuit section and the pixel section is formed on the same substrate. A thin film transistor 170 and a capacitor 147 can be fabricated on the thin film transistor 17. 0, 180 are oxides including a high-resistance source region, a high-resistance drain region, and a channel forming region. The thin film transistor is a bottom-gate type thin film transistor including a nitride semiconductor layer. 170, 180 are high resistance drain regions or high resistance source regions even when a high electric field is applied This acts as a buffer to prevent localized high electric fields from being applied, improving the breakdown voltage of the transistor. It is.

[0120] The capacitor 147 is connected to the capacitor wiring layer 108 with the gate insulating layer 102 in the capacitor portion as a dielectric. The capacitor electrode layer 149 is formed.

[0121] By forming the driver circuit and the pixel section on the same substrate, the connection wiring between the driver circuit and the external signal is The lines can be shortened, making it possible to reduce the size and cost of the light emitting device.

[0122] Next, a color filter layer 191 is formed on the protective insulating layer 106. For example, a green color filter layer, a blue color filter layer, a red color filter layer, etc. A green color filter layer, a blue color filter layer, a red color filter layer, and a Each color filter layer is formed by a printing method, an inkjet method, a photolithography method, and a laser beam irradiation method. The color filter layer is formed by etching using lithography technology. By doing so, the color filter layer and the light emitting layer can be attached without depending on the accuracy of the lamination of the sealing substrate. In this embodiment, the fifth, sixth, and seventh optical elements are aligned with each other. 7. Perform the photolithography process to form the green color filter layer, the blue color filter layer, and the A red color filter layer is formed.

[0123] Next, a color filter layer (a green color filter layer, a blue color filter layer, and a red color filter layer) is formed. An overcoat layer 192 is formed to cover the color filter layer (color filter layer). The resin 92 has a light-transmitting property. In this embodiment, the eighth photolithography process is performed. This is performed to form an overcoat layer 192.

[0124] Here, an example of full color display using three colors of RGB is shown, but there is no particular limitation. A full color display may be performed using the four colors of BW.

[0125] Next, the protective insulating layer 109 is formed to cover the overcoat layer 192 and the protective insulating layer 106. (See FIG. 4(B)). The protective insulating layer 109 is made of an inorganic insulating film, and is preferably made of a silicon nitride film or an alumina nitride film. The protective insulating layer 109 is made of an aluminum film, a silicon nitride oxide film, an aluminum oxynitride film, or the like. If the insulating film has the same composition as the protective insulating layer 106, the subsequent formation of contact holes will be This is preferable because etching can be performed in a single step in the actual process.

[0126] Next, a ninth photolithography step is performed to form a resist mask, and the oxide insulating film 1 07, the protective insulating layer 106 and the protective insulating layer 109 are etched to form the drain electrode layer 105 Then, a contact hole 125 is formed reaching b, and the resist mask is removed (see FIG. 5(A)). In addition, a contact hole 121 reaching the second terminal 122 is formed by etching in this step. 27, a contact hole 126 reaching the connection electrode 120 is also formed. A resist mask for forming holes may be formed by an inkjet method. If the mask is formed by the inkjet method, no photomask is used, so manufacturing costs are reduced. It can be reduced.

[0127] Next, a light-transmitting conductive film is formed. Indium (In 2 O 3 ) and indium tin oxide alloy (In 2 O 3 - SnO 2 , IT The transparent film is formed by sputtering or vacuum deposition. As another material for the conductive film, a nitrogen-containing Al-Zn-O-based non-single crystal film, i.e., Al- Zn-ON type non-single crystal film, Zn-O type non-single crystal film containing nitrogen, and A Sn-Zn-O based non-single crystal film may be used. The composition ratio (atomic %) of zinc is 47 atomic % or less, and the composition ratio of aluminum in the non-single crystal film is (atomic%), and the composition ratio (atomic%) of aluminum in the non-single crystal film is The composition ratio (atomic percent) of nitrogen in the material is larger than that in the material containing hydrochloric acid. However, etching of ITO is particularly prone to leaving residues, so Indium oxide zinc oxide alloy (InO2) was used to improve workability. 2 O 3 -ZnO) good.

[0128] The composition ratio of the light-transmitting conductive film is expressed in atomic percent. (EPMA:Electron Probe X-ray MicroAnalyzer ) will be used for the evaluation.

[0129] Next, a tenth photolithography process is performed to form a resist mask and perform etching. The unnecessary portions of the conductive film having a light-transmitting property are removed to form the first electrode layer 110, the conductive layer 111, The terminal electrodes 128 and 129 are formed, and the resist mask is removed.

[0130] The gate insulating layer 102 is a dielectric and the capacitor formed by the capacitor wiring layer 108 and the capacitor electrode layer 149 is The capacitance 147 can also be formed on the same substrate. The reference numeral 49 denotes a part of a power supply line, and the capacitance wiring layer 108 is a part of the gate electrode layer of the driving TFT. It is a department.

[0131] The terminal electrodes 128 and 129 formed on the terminal portion are electrodes or wiring used for connection with an FPC. The terminal electrode 128 formed on the first terminal 121 via the connection electrode 120 is This serves as a terminal electrode for connection that functions as an input terminal for the gate wiring. The formed terminal electrode 129 is a connection terminal electrode that functions as an input terminal of the source wiring. do.

[0132] 11(A1) and 11(A2) are cross-sectional views of the gate line terminal portion at this stage, 11(A1) is a top view taken along the line C1-C2 in FIG. 11(A2). In FIG. 11A1, a conductive film is formed on the oxide insulating film 107. The conductive film 155 is a terminal electrode for connection that functions as an input terminal. In the terminal section, a first terminal 151 made of the same material as the gate line and a source The connection electrode 153, which is made of the same material as the wiring, overlaps directly with the gate insulating layer 102. The connection electrode 153 and the conductive film 155 are provided on the oxide insulating film 107. The contact holes are drilled through the substrate to provide direct contact and electrical continuity.

[0133] FIG. 11B1 and FIG. 11B2 are a cross-sectional view and a top view of a source wiring terminal portion. Also, FIG. 11(B1) is taken along the line D1-D2 in FIG. 11(B2). In FIG. 11B1, a conductive film formed over the oxide insulating film 107 The film 155 is a terminal electrode for connection that functions as an input terminal. In the terminal portion, an electrode 156 made of the same material as the gate wiring is connected to the source wiring. The electrode 1 overlaps the second terminal 150, which is electrically connected to the electrode 1 through the gate insulating layer 102. 56 is not electrically connected to the second terminal 150, and the electrode 156 is connected to the second terminal 150. By setting different potentials, such as floating, GND, or 0V, you can reduce noise. A capacitance for preventing electrostatic discharge or a capacitance for preventing static electricity can be formed. is electrically connected to the conductive film 155 through the oxide insulating film 107.

[0134] A plurality of gate lines, source lines, and capacitance lines are provided according to the pixel density. In addition, in the terminal section, a first terminal has the same potential as the gate wiring, a second terminal has the same potential as the source wiring, The terminal 2 and the third terminal of the same potential as the capacitance wiring are arranged in a row. The number of terminals may be any number and may be determined appropriately by the implementer.

[0135] The pixel section is made up of thin-film transistors and storage capacitors arranged in a matrix to correspond to each pixel. The resulting substrate can be used as one of the substrates for manufacturing an active matrix display device. For the sake of convenience, this type of substrate is referred to as an active matrix substrate in this specification.

[0136] The conductive layer 111 is provided so as to overlap with the channel formation region 166 of the oxide semiconductor layer. The bias-thermal stress test (BT) is used to check the reliability of thin-film transistors. In the test, the threshold voltage of the thin film transistor 180 before and after the BT test was In addition, the conductive layer 111 has a potential equal to that of the gate electrode layer 161. It may be the same or different and may also function as the second gate electrode layer. The potential of the conductive layer 111 may be GND, 0V, or may be in a floating state. .

[0137] Next, a partition wall 193 is formed so as to cover the periphery of the first electrode layer 110. , polyimide, acrylic, polyamide, epoxy, or other organic resin film, inorganic insulating film, or white It is formed using xanthane resin.

[0138] Siloxane-based resin is a type of Si-OS formed using siloxane-based materials as starting materials. The siloxane resin corresponds to a resin containing an i bond. Alternatively, the organic group may have a fluoro group. That's fine.

[0139] The partition 193 may be made of PSG (phosphorus glass), BPSG (borophosphorus glass), or the like. In addition, by laminating a plurality of insulating films made of these materials, the partition wall 1 can be formed. 93 may be formed.

[0140] The method for forming the partition wall 193 is not particularly limited. Depending on the material, a sputtering method, a SOG method, or the like may be used. method, spin coating, dip coating, spray coating, droplet ejection method (inkjet method, screen printing, offset printing, etc.), doctor knife, roll coater, curtain coater, In addition, as another insulating layer used in the light emitting device, a partition wall 1 The materials and methods given above as examples in 93 may be used.

[0141] The partition wall 193 is made of a photosensitive resin material, and has an opening formed on the first electrode layer 110. The side wall of the opening is preferably formed as an inclined surface having a continuous curvature. When a photosensitive resin material is used for the partition wall 193, the process of forming a resist mask can be omitted. In this embodiment, an eleventh photolithography step is performed to form the partition wall 1. Form 93.

[0142] An EL layer 194 is formed on the first electrode layer 110, and a second electrode layer 195 is formed on the EL layer 194. The second electrode layer 195 is electrically connected to a common potential line. The second electrode layer 195 can be made of various materials, but a material with a small work function is preferable. Specifically, for example, alkali metals such as Li and Cs, and aluminum metals such as Mg, Ca, and Sr. In addition to potassium earth metals and alloys containing them (Mg:Ag, Al:Li, etc.), Yb and E In this embodiment, the second electrode layer 195 is preferably made of aluminum. A membrane is used.

[0143] In this way, 11 photolithography steps were performed using 11 photomasks to produce a thin A driving circuit section having a thin film transistor 180, a thin film transistor 170, and a light emitting element The pixel portion includes a storage capacitor 147, and an external output terminal portion. The light emitting device of this embodiment mode can be manufactured.

[0144] In this embodiment, the oxide insulating film 107, the protective insulating layer 106, and the protective insulating layer 10 9 in a single photolithography process. Alternatively, the process may be divided into a plurality of photolithography steps using different photomasks. For example, The oxide insulating film 107 that will be the interlayer insulating layer and the protective insulating layer 106 are first subjected to a fifth photolithography. A contact hole is formed by a photolithography process, and then the sixth to ninth photolithography processes are performed. Therefore, after forming the RGB color filter layer and the overcoat layer, the tenth filter layer is formed. Even if a contact hole is formed in the protective insulating layer 109 by a photolithography process, In this case, the number of photolithography steps and photomasks increases by one, and the number of steps for the light-emitting device is increased by one. The fabrication requires 12 photolithography steps and 12 photomasks.

[0145] In the above-mentioned photolithography process, the transmitted light has a plurality of intensities. The etching step may be performed using a mask layer formed by a multi-tone mask. stomach.

[0146] The mask layer formed using the multi-tone mask has a shape with multiple film thicknesses. The shape can be further modified by etching the metal into different patterns. It can be used for multiple etching processes. Thus, a mask layer corresponding to at least two different patterns can be formed. This reduces the number of exposure masks and the corresponding photolithography steps. This allows the process to be simplified.

[0147] In addition, when manufacturing a light-emitting device, a power supply that is electrically connected to the source electrode layer of the driving TFT is A power supply line is provided, the power supply line intersecting the gate line and the source line, and The gate electrode layer is formed using the same material and process as the gate electrode layer.

[0148] In addition, when a light emitting device is manufactured, one electrode of the light emitting element is the drain electrode layer of the driving TFT. and a common potential line electrically connected to the other electrode of the light emitting element. The common potential line can be formed of the same material and in the same process as the gate electrode layer. .

[0149] In addition, when a light-emitting device is manufactured, one pixel has a plurality of thin film transistors. A connection portion is provided for connecting the gate electrode layer of the membrane transistor to the other drain electrode layer. can be.

[0150] By forming the thin film transistor using an oxide semiconductor, the manufacturing cost can be reduced. In particular, the above-described method can be used to form an oxide insulating film in contact with an oxide semiconductor layer. By this, it is possible to manufacture and provide a thin film transistor having stable electrical characteristics. Therefore, a light emitting device having a thin film transistor with good electrical characteristics and high reliability can be provided. It is possible.

[0151] Since the semiconductor layer in the channel formation region is a high resistance region, the electrical characteristics of the thin film transistor are This stabilizes the device and prevents an increase in the off-state current. This results in good electrical characteristics and reliability. It is possible to provide a light emitting device having a thin film transistor with excellent performance.

[0152] In addition, thin film transistors are easily damaged by static electricity, etc. The protection circuit is preferably provided over the same substrate as the semiconductor device. It is preferable to use a nonlinear element. For example, the protection circuit is In this embodiment, a plurality of protection circuits are provided between the terminal and the signal line input terminal. A surge voltage is applied to the scanning lines, signal lines and capacitance bus lines due to static electricity or the like, and the pixel transistors are The protection circuit is designed to prevent the transistors from being destroyed. When a voltage is applied, the protection circuit is configured to release the electric charge to the common wiring. The nonlinear element is arranged in parallel with the scanning line. It is composed of a two-terminal element such as an electrode or a three-terminal element such as a transistor. For example, It is also possible to form the thin film transistor 170 in the pixel portion in the same process. For example, By connecting the drain terminal to the terminal, it can have the same characteristics as a diode. do.

[0153] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0154] (Embodiment 2) In this embodiment, the oxide semiconductor layer and the source electrode layer or the drain electrode layer in Embodiment 1 are An example in which an oxide conductive layer is provided between an electrode layer and a source region and a drain region is shown in FIG. As shown in FIG. 7, the other steps can be performed in the same manner as in the first embodiment, and the same parts as in the first embodiment can be used. The description of the parts having the same functions and the repetition of the steps will be omitted. FIG. 7 is the same as FIG. 1 to FIG. 5 except for some steps, and therefore the same parts are designated by the same reference numerals. Reference numbers will be used and detailed explanations of the same parts will be omitted.

[0155] First, the steps up to the step of FIG. 3(B) in the first embodiment are carried out according to the first embodiment. A) is the same as FIG. 3(B).

[0156] An oxide conductive film 140 is formed on the dehydrated or dehydrogenated oxide semiconductor layers 133 and 134. A metal conductive film made of a metal conductive material is laminated on the oxide conductive film 140 .

[0157] The oxide conductive film 140 is formed by a method such as sputtering or vacuum deposition (electron beam deposition). The oxide conductive film 14 is formed by arc discharge ion plating or spraying. The material for 0 preferably contains zinc oxide as a component and does not contain indium oxide. As such an oxide conductive film 140, zinc oxide, zinc oxide, etc. Lead aluminum, zinc aluminum oxynitride, zinc gallium oxide, etc. can be applied. The film thickness is appropriately selected within the range of 50 nm to 300 nm. When using the SiO 2 The film was formed using a target containing 2% by weight or more and 10% by weight or less. This process makes the oxide conductive film contain SiOx (X>0), which inhibits crystallization, and prevents the decrystallization process from being performed later. It is preferable to suppress crystallization during the heat treatment for hydration or dehydrogenation. stomach.

[0158] Next, a fourth photolithography process is performed, and resist masks 136a, 136b, and 13 6c, 136d, 136e, 136f, and 136g are formed, and a metal conductive film is formed by etching. The unnecessary portions of the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 105c are removed. 165a, the drain electrode layer 165b, the capacitance electrode layer 149, the connection electrode 120, and the second terminal A child 122 is formed (see FIG. 6(B)).

[0159] Note that when the metal conductive film is etched, the oxide conductive film 140, the oxide semiconductor layer 133, The materials and etching conditions are appropriately adjusted so that the layer 134 is not removed.

[0160] Next, resist masks 136a, 136b, 136c, 136d, 136e, 136f, 136g is removed, and the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 16 5a, the oxide conductive film 140 is etched using the drain electrode layer 165b as a mask, and The oxide conductive layers 104a and 104b, the capacitor electrode layer 185, The oxide conductive film 140 containing zinc oxide is formed, for example, by It can be easily etched using an alkaline solution such as a resist stripper. In the same process, oxide conductive layers 138 and 139 are also formed on the terminal portions.

[0161] A channel region is formed by utilizing the difference in etching rate between an oxide semiconductor layer and an oxide conductive layer. In order to form the oxide conductive layer, an etching process is performed to divide the oxide conductive layer. The oxide conductive layer on the oxide semiconductor layer is formed by utilizing the fact that the ionization rate of the oxide conductive layer is faster than that of the oxide semiconductor layer. The layer is selectively etched.

[0162] Therefore, the resist masks 136a, 136b, 136c, 136d, 136e, and 136f The removal of 136g is preferably performed by an ashing process. In the case of etching, the oxide conductive film 140 and the oxide semiconductor layers 133 and 134 are excessively etched. In order to prevent etching, the etching conditions (type of etchant, concentration, etching time, etc.) ) and adjust as appropriate.

[0163] As in this embodiment, after the oxide semiconductor layer is etched into an island shape, the oxide conductive film and the gold A metal conductive film is laminated, and a wiring pattern including a source electrode layer and a drain electrode layer is formed using the same mask. By etching the GaN, an oxide conductive film remains under the wiring pattern of the metal conductive film. It can be done.

[0164] At the contact between the gate wiring (conductive layer 162) and the source wiring (drain electrode layer 165b), However, since the oxide conductive layer 164b is formed under the source wiring, the buffer The series resistance is only that of the thickness, and it is preferable because it does not form an insulating oxide with metal. stomach

[0165] The oxide insulating film 107 serving as a protective insulating film in contact with the oxide semiconductor layers 133 and 134 is formed. In this embodiment, a silicon oxide film having a thickness of 300 nm is used as the oxide insulating film 107. The film is formed by using a deposition method.

[0166] Next, a second heat treatment (preferably a second heat treatment) is performed under an inert gas atmosphere or a nitrogen gas atmosphere. For example, the heating is performed in a nitrogen atmosphere. The second heat treatment is performed at 250°C for 1 hour under atmospheric pressure. Part of the oxide semiconductor layers 133 and 134 overlapping with the oxide insulating film 107 is in contact with the oxide insulating film 107. The material is heated in a

[0167] Through the above steps, the oxide semiconductor layer after deposition is dehydrated or dehydrogenated. After the heat treatment for reducing the resistance, a part of the oxide semiconductor layer is selectively treated with an oxygen-excess This is the state.

[0168] As a result, in the oxide semiconductor layer 133, a channel formation region overlapping with the gate electrode layer 161 is formed. The region 166 is an I-type high-resistance region overlapping the source electrode layer 165a and the oxide conductive layer 164a. The anti-source region 167a and the high-temperature insulating layer 166a overlapping the drain electrode layer 165b and the oxide conductive layer 164b are The resistive drain region 167b is formed in a self-aligned manner, and the oxide semiconductor layer 163 is formed. Similarly, in the oxide semiconductor layer 134, a channel is formed overlapping with the gate electrode layer 101. The region 116 is an I-type region, and has a high conductivity type overlapping the source electrode layer 105a and the oxide conductive layer 104a. The resistive source region 117a overlaps the drain electrode layer 105b and the oxide conductive layer 164b. The high-resistance drain region 117b is formed in a self-aligned manner, and the oxide semiconductor layer 103 is formed. can be.

[0169] The oxide semiconductor layers 103 and 163 and the drain electrode layer 105b made of a metal material. The oxide conductive layers 104b and 164b provided between the electrode layers 165b are low-resistance drain regions ( LRN (Low Resistance N-type conductivity) area It also functions as a low resistance drain (LRD) region. Similarly, the oxide semiconductor layers 103 and 163 and the source electrode layer 105a made of a metal material are The oxide conductive layers 104a and 164a provided between the source electrode layers 165a are low-resistance sources. Low Resistance N-type conduction region (LRN) ty (also called LRS (Low Resistance Source) region) The drain electrode is made of an oxide semiconductor layer, a low-resistance drain region, and a metal material. By using a layered structure, the breakdown voltage of the transistor can be further improved. In general, the carrier concentration in the low-resistance drain region is higher than that in the high-resistance drain region (HRD region). is also large, for example 1×10 20 / cm 3 More than 1×10 21 / cm 3 Within the following range preferable.

[0170] By the above steps, the thin film transistor 181 is formed in the driver circuit portion and the pixel portion is formed on the same substrate. The thin film transistor 171 can be fabricated in the above-mentioned manner. a high-resistance source region, a high-resistance drain region, and a channel formation region; Thus, the thin film transistors 171 and 18 are bottom-gate type thin film transistors. In the case of 1, the high-resistance drain region or the high-resistance source region acts as a buffer even when a high electric field is applied. This prevents a high electric field from being applied locally, improving the breakdown voltage of the transistor.

[0171] In the capacitance section, the capacitance wiring layer 108, the gate insulating layer 102, the oxide conductive layer 104b The capacitance electrode layer 185 is formed in the same process as the drain electrode layer 105b. A capacitor 146 is formed by laminating the capacitor electrode layer 149 .

[0172] Next, a protective insulating layer 106 is formed over the oxide insulating film 107, and the protective insulating layer A color filter layer 191 is formed on the substrate 106. A protective insulating layer 106 and an overcoat layer 192 are formed to cover the protective insulating layer 106 and the overcoat layer 192. A protective insulating layer 109 is formed.

[0173] Next, a ninth photolithography process is carried out in the same manner as in the first embodiment to form a resist mask. The oxide insulating film 107, the protective insulating layer 106, and the protective insulating layer 109 are formed by etching. A contact hole 125 reaching the drain electrode layer 105b is formed, and the resist mask is removed. (See FIG. 6(D)). In addition, the etching in this step is performed so that the connecting electrode 120 is reached. A contact hole 126 and a contact hole 127 reaching the second terminal 122 are also formed. .

[0174] Next, a light-transmitting conductive film is formed, and a tenth photolithography process is performed. A mask is formed, and unnecessary portions are removed by etching to form the first electrode layer 110 and the conductive layer 111, terminal electrodes 128 and 129 are formed, and the resist mask is removed (see FIG. 7(A)). .).

[0175] Similarly to the first embodiment, an eleventh photolithography step is carried out to form the partition wall 193. An EL layer 194 and a second electrode layer 195 are laminated on a first electrode layer 110 to form a light-emitting element. A light emitting device according to this embodiment mode is manufactured (see FIG. 7(B)).

[0176] The oxide conductive layer is formed as a source region and a drain region, and the oxide semiconductor layer is formed as a source electrode layer and a drain region. By providing the source region and the drain electrode layer, the resistance of the source region and the drain region can be reduced. This allows the transistor to operate at high speed. The use of an oxide conductive layer as a gate insulating layer improves the frequency characteristics of the peripheral circuits (drive circuits). This is effective for preventing the formation of oxide semiconductor layers. This is because the contact between the conductive layer and the oxide layer can reduce the contact resistance.

[0177] In addition, molybdenum (Mo), which is used as part of the wiring material in light-emitting devices (e.g., The problem was that the contact resistance with the oxide semiconductor layer was high. Mo is less likely to oxidize than This is because the contact interface of the oxide semiconductor layer does not become n-type. The conductive layer is formed by interposing an oxide conductive layer between the conductor layer and the source electrode layer and the drain electrode layer. The resistance can be reduced, and the frequency characteristics of the peripheral circuits (drive circuits) can be improved.

[0178] Since the channel length of the thin film transistor is determined during etching of the oxide conductive layer, For example, the channel length L can be shortened to 0.1 μm or more and 2 μm or less. The operating speed can be increased.

[0179] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0180] (Embodiment 3) In this embodiment, the oxide semiconductor layer and the source electrode in Embodiment 1 or 2 are A conductive oxide layer is provided between the source and drain electrode layers. Other examples are shown in Figs. 8 and 9. Therefore, the rest is the same as in the first or second embodiment. and a part having the same function as in embodiment 1 or embodiment 2. 8 and 9 are the same as those in FIG. 1 to FIG. 7. Since the two models are the same except for some differences, the same reference numerals are used for the same parts and detailed explanations of the same parts are provided. The details are omitted.

[0181] First, according to the first embodiment, a metal conductive film is formed on the substrate 100, and the metal conductive film is The first end is etched using a resist mask formed by a photolithography process. 121, a gate electrode layer 161, a conductive layer 162, a gate electrode layer 101, and a capacitance wiring layer 108 Form.

[0182] Next, the first terminal 121, the gate electrode layer 161, the conductive layer 162, the gate electrode layer 101, A gate insulating layer 102 is formed on the wiring layer 108, and an oxide semiconductor film and an oxide conductive film are laminated. The gate insulating layer, the oxide semiconductor film, and the oxide conductive film are successively formed without exposure to air. It is possible.

[0183] A resist mask is formed over the oxide conductive film by a second photolithography process. the gate insulating layer, the oxide semiconductor film, and the oxide conductive film are etched using a mask; A contact hole 119 reaching the first terminal 121 and a contact hole 162 reaching the conductive layer 162 are provided. Form a hole 118.

[0184] The resist mask by the second photolithography process is removed, and then a second photoresist is formed on the oxide conductive film. A resist mask is formed by the third photolithography process. An island-shaped oxide semiconductor layer and an island-shaped oxide conductive layer are formed using a resist mask by a deposition process.

[0185] In this manner, in a state where the oxide semiconductor film and the oxide conductive film are laminated on the entire surface of the gate insulating layer, When a step of forming a contact hole in the gate insulating layer is performed, a resist mask is formed on the surface of the gate insulating layer. Since the mask does not come into direct contact with the gate insulating layer, contamination of the gate insulating layer surface (such as adhesion of impurities) can be prevented. Therefore, the state of the interfaces between the gate insulating layer and the oxide semiconductor film and between the gate insulating layer and the oxide conductive film can be improved. This leads to improved reliability.

[0186] Next, the oxide semiconductor layer and the oxide conductive layer are stacked together, and then subjected to heat treatment for dehydration and dehydrogenation. Heat treatment at temperatures between 400 and 700°C dehydrates the oxide semiconductor layer. , dehydrogenation is attempted, and then water (H 2 O) can be prevented from re-impregnation.

[0187] This heat treatment ensures that the oxide conductive layer does not contain crystallization inhibitors such as silicon oxide. The oxide conductive layer crystallizes as long as the oxide conductive layer is kept at a constant temperature. The crystals of the oxide conductive layer grow in a columnar shape with respect to the base surface. As a result, in order to form the source electrode layer and the drain electrode layer, When etching a metal conductive film, the formation of an undercut can be prevented.

[0188] In addition, the conductivity of the oxide conductive layer is increased by the heat treatment for dehydration and dehydrogenation of the oxide semiconductor layer. Note that the heat treatment for only the oxide conductive layer can be performed at a lower temperature than that for the oxide semiconductor layer. Heat treatment may also be performed.

[0189] In addition, the first heat treatment of the oxide semiconductor layer and the oxide conductive layer is performed to form an island-shaped oxide semiconductor layer and This can also be performed on an oxide semiconductor film and an oxide conductive film before they are processed into an oxide conductive layer. In this case, after the first heat treatment, the substrate is removed from the heating apparatus and a photolithography process is performed. Do the following.

[0190] Through the above steps, the oxide semiconductor layers 133 and 134 and the oxide conductive layers 142 and 143 are obtained. (See FIG. 8A.) The oxide semiconductor layer 133, the oxide conductive layer 142, and the oxide semiconductor layer The oxide conductive layer 134 and the oxide conductive layer 143 are island-shaped stacked layers formed using the same mask. do.

[0191] Next, a fourth photolithography process is performed, and resist masks 136a, 136b, and 13 6c, 136d, 136e, 136f, and 136g are formed, and a metal conductive film is formed by etching. The unnecessary portions of the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 105c are removed. 165a, the drain electrode layer 165b, the capacitance electrode layer 149, the connection electrode 120, and the second terminal A child 122 is formed (see FIG. 8(B)).

[0192] Note that when the metal conductive film is etched, the oxide conductive layers 142 and 143 and the oxide semiconductor layer The materials and etching conditions are appropriately adjusted so that the layers 133 and 134 are not removed. .

[0193] Next, resist masks 136a, 136b, 136c, 136d, 136e, 136f, 136g is removed, and the source electrode layer 105a, the drain electrode layer 105b, and the source electrode layer 16 5a, the oxide conductive layers 142 and 143 are etched using the drain electrode layer 165b as a mask. Then, the oxide conductive layers 164a and 164b and the oxide conductive layers 104a and 104b are formed ( The oxide conductive layers 142 and 143 containing zinc oxide are formed of, for example, a resist. It can be easily etched using an alkaline solution such as a photoresist stripper.

[0194] Therefore, the resist masks 136a, 136b, 136c, 136d, 136e, and 136f The removal of 136g is preferably performed by an ashing process. In the case of etching, the oxide conductive layers 142 and 143 and the oxide semiconductor layers 133 and 134 are In order to avoid over-etching, the etching conditions (type of etchant, concentration, etc.) Adjust the time (time required for the test) appropriately.

[0195] The oxide insulating film 107 serving as a protective insulating film in contact with the oxide semiconductor layers 133 and 134 is formed. In this embodiment, a silicon oxide film having a thickness of 300 nm is used as the oxide insulating film 107. The film is formed by using a deposition method.

[0196] Next, a second heat treatment (preferably a second heat treatment) is performed under an inert gas atmosphere or a nitrogen gas atmosphere. For example, the heating is performed in a nitrogen atmosphere. The second heat treatment is performed at 250°C for 1 hour under atmospheric pressure. Part of the oxide semiconductor layers 133 and 134 overlapping with the oxide insulating film 107 is in contact with the oxide insulating film 107. The material is heated in a

[0197] Through the above steps, the oxide semiconductor layer after deposition is dehydrated or dehydrogenated. After the heat treatment for reducing the resistance, a part of the oxide semiconductor layer is selectively treated with an oxygen-excess This is the state.

[0198] As a result, in the oxide semiconductor layer 133, a channel formation region overlapping with the gate electrode layer 161 is formed. The region 166 is an I-type high-resistance region overlapping the source electrode layer 165a and the oxide conductive layer 164a. The anti-source region 167a and the high-temperature insulating layer 166a overlapping the drain electrode layer 165b and the oxide conductive layer 164b are The resistive drain region 167b is formed in a self-aligned manner, and the oxide semiconductor layer 163 is formed. Similarly, in the oxide semiconductor layer 134, a channel is formed overlapping with the gate electrode layer 101. The region 116 is an I-type region, and has a high conductivity type overlapping the source electrode layer 105a and the oxide conductive layer 104a. The resistive source region 117a overlaps the drain electrode layer 105b and the oxide conductive layer 164b. The high-resistance drain region 117b is formed in a self-aligned manner, and the oxide semiconductor layer 103 is formed. can be.

[0199] The oxide semiconductor layers 103 and 163 and the drain electrode layer 105b made of a metal material. The oxide conductive layers 104b and 164b provided between the electrode layers 165b are low-resistance drain regions ( Similarly, the oxide semiconductor layer 103 also functions as a region between the oxide semiconductor layer 102 and the oxide semiconductor layer 103 (also referred to as an LRN region or an LRD region). 163 and the source electrode layer 105a made of a metal material, and the source electrode layer 165a are provided between the The oxide conductive layers 104a and 164a are low-resistance source regions (also called LRN regions or LRS regions). The drain region is made of an oxide semiconductor layer, a low-resistance drain region, and a metal material. By using this structure for the gate electrode layer, the breakdown voltage of the transistor can be further improved. Specifically, the carrier concentration in the low-resistance drain region is higher than that in the high-resistance drain region (HRD region). ), e.g., 1×10 20 / cm 3 More than 1×10 21 / cm 3 Within the following range It is preferable to have one.

[0200] Through the above steps, a thin film transistor 182 is formed in the driver circuit section and a thin film transistor 183 is formed in the pixel section on the same substrate. The thin film transistor 172 can be fabricated on the same substrate. a high-resistance source region, a high-resistance drain region, and a channel formation region; Thus, the thin film transistors 172 and 18 are bottom gate type thin film transistors. 2. The high-resistance drain region or high-resistance source region acts as a buffer even when a high electric field is applied. This prevents a high electric field from being applied locally, improving the breakdown voltage of the transistor.

[0201] In the capacitance section, the capacitance wiring layer 108, the gate insulating layer 102, the drain electrode layer 105 A capacitor 146 is formed by laminating a capacitor electrode layer 149 formed in the same process as b.

[0202] Next, a protective insulating layer 106 is formed over the oxide insulating film 107, and the protective insulating layer A color filter layer 191 is formed on the substrate 106. A protective insulating layer 106 and an overcoat layer 192 are formed to cover the protective insulating layer 106 and the overcoat layer 192. A protective insulating layer 109 is formed.

[0203] Next, a ninth photolithography process is carried out in the same manner as in the first embodiment to form a resist mask. The oxide insulating film 107, the protective insulating layer 106, and the protective insulating layer 109 are formed by etching. A contact hole 125 reaching the drain electrode layer 105b is formed, and the resist mask is removed. (See FIG. 8(D)). Also, the etching here reaches the second terminal 122. A contact hole 127 that reaches the connecting electrode 120 and a contact hole 126 that reaches the connecting electrode 120 are also formed. .

[0204] Next, a light-transmitting conductive film is formed, and a tenth photolithography process is performed. A mask is formed, and unnecessary portions are removed by etching to form the first electrode layer 110 and the conductive layer 111, terminal electrodes 128 and 129 are formed, and the resist mask is removed (see FIG. 9(A)). .).

[0205] Similarly to the first embodiment, an eleventh photolithography step is carried out to form the partition wall 193. An EL layer 194 and a second electrode layer 195 are laminated on a first electrode layer 110 to form a light-emitting element. A light emitting device according to this embodiment mode is manufactured (see FIG. 9(B)).

[0206] The oxide conductive layer is formed as a source region and a drain region, and the oxide semiconductor layer is formed as a source electrode layer and a drain region. By providing the source region and the drain electrode layer, the resistance of the source region and the drain region can be reduced. This allows the transistor to operate at high speed. The use of an oxide conductive layer as a gate insulating layer improves the frequency characteristics of the peripheral circuits (drive circuits). This is effective for preventing the formation of oxide semiconductor layers. This is because the contact between the conductive layer and the oxide layer can reduce the contact resistance.

[0207] An oxide conductive layer is interposed between the oxide semiconductor layer and the source electrode layer and the drain electrode layer. This reduces the contact resistance and improves the frequency characteristics of the peripheral circuits (drive circuits). .

[0208] Since the channel length of the thin film transistor is determined during etching of the oxide conductive layer, For example, the channel length L is 0.1 μm or more and 2 μm or less. , and the operation speed can be increased.

[0209] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0210] (Embodiment 4) In this embodiment, a thin film transistor in a pixel portion and a first electrode layer of a light emitting element are connected to each other through a connection electrode layer. Examples of light emitting devices electrically connected through the intervening electrodes are shown in Figs. 16 to 18. The difference between the two configurations is the method of connecting the transistor in the pixel portion and the first electrode layer of the light-emitting element. Other than that, the same materials and methods can be used. Therefore, the other aspects are the same as those of the first embodiment. The present invention can be carried out by repeating the steps and using the same parts as those in the first embodiment or parts having similar functions. The explanation of the return is omitted. Also, the steps in Figs. 16 to 18 are partially different from those in Figs. 1 to 5. Since the other parts are the same, the same reference numerals are used for the same parts, and detailed description of the same parts is omitted. .

[0211] The light emitting device of this embodiment is shown in FIG. The electrode layer 105b is electrically connected to the first electrode layer 110 via the connection electrode layer 196. A method for manufacturing the light emitting device shown in FIG. 16 will be described with reference to FIGS.

[0212] First, the steps up to the step of FIG. 4(A) in the first embodiment are performed according to the first embodiment. (A) is the same as FIG. 4(A).

[0213] Next, a fifth photolithography step is performed to form a resist mask, and an oxide insulating film 1 07 and the protective insulating layer 106 are etched to form a contact that reaches the drain electrode layer 105b. a contact hole 125 reaching the second terminal 122; a contact hole 127 reaching the connection electrode 120; Then, the resist mask is removed (see FIG. 17(B)). .).

[0214] Next, a conductive film is formed, and a sixth photolithography process is performed to form a resist mask. Then, unnecessary portions are removed by etching to form the connection electrode layer 196, the conductive layer 112, and the terminal electrode 1 13 and 114 are formed, and the resist mask is removed (see FIG. 17(C)). Since a metal conductive film can be used for the connection electrode layer 196, the conductive layer 112, and the terminal electrode 113 and 114 may also be metal conductive layers.

[0215] The connection electrode layer 196 is mainly composed of an element selected from Al, Cr, Cu, Ta, Ti, Mo, and W. A laminated film combining a film containing the above-mentioned metal and an alloy film can be used. In this embodiment, the conductive layer 112 and the terminal electrodes 113 and 114 are connected to the connection electrode layer 196. When they are formed in the same process, the conductive layer 112 and the terminal electrodes 113 and 114 are also made of Al, Cr, Cu, A film mainly composed of an element selected from Ta, Ti, Mo, and W, or an alloy film thereof. The conductive film is not limited to a single layer containing the above-mentioned elements. The conductive film can be formed by a method such as sputtering. deposition method, vacuum deposition method (electron beam deposition method, etc.), arc discharge ion plating method, A spray method can be used.

[0216] Next, seventh to ninth photolithography steps are performed on the protective insulating layer 106 in the pixel area. A RGB color filter layer 191 is formed, and a tenth photolithography process is performed. An overcoat layer 192 is formed so as to cover the color filter layer 191. 96, conductive layer 112, terminal electrodes 113, 114, protective insulating layer 106 and overcoat layer A protective insulating layer 109 is formed covering 192 (see FIG. 17(D)).

[0217] Next, an eleventh photolithography process is performed to form a resist mask and a protective insulating layer 1 A contact hole 125 reaching the connection electrode layer 196 is formed by etching in step 09. The resist mask is removed. Also, the etching on the terminal electrodes 113 and 114 is The protective insulating layer 109 is also removed to expose the terminal electrodes 113 and 114 (see FIG. 18(A)). ).

[0218] Next, a light-transmitting conductive film is formed, and a 12th photolithography process is performed. A mask is formed, and unnecessary portions are removed by etching to form the first electrode layer 110. Then, the resist mask is removed.

[0219] Similarly to the first embodiment, a thirteenth photolithography step is carried out to form the partition wall 193. An EL layer 194 and a second electrode layer 195 are laminated on a first electrode layer 110 to form a light-emitting element. A light emitting device according to this embodiment mode is manufactured (see FIG. 18(B)).

[0220] When forming the connection electrode layer 196, the power supply line is made of the same material as the connection electrode layer 196 and in the same process. The common potential line can be formed using the same material and process as the connection electrode layer 196. It can be formed with.

[0221] This embodiment can be implemented in appropriate combination with the configurations described in other embodiment modes. do.

[0222] (Embodiment 5) In this embodiment mode, a manufacturing process of a thin film transistor is partially different from that in Embodiment Mode 1. 10 is the same as FIG. 1 to FIG. 5 except for some differences in the steps. The same reference numerals are used in the following description, and detailed explanations of the same parts will be omitted.

[0223] First, a gate electrode layer and a gate insulating layer are formed on a substrate according to the first embodiment. A contact hole reaching the gate electrode layer is formed by a second photolithography process. Form (not shown).

[0224] Next, the oxide semiconductor film 130 is formed, and the oxide semiconductor film 130 is subjected to a third photolithography. The oxide semiconductor layers 131 and 132 are processed into island-shaped oxide semiconductor layers by a film forming process.

[0225] Next, the oxide semiconductor layers 131 and 132 are dehydrated or dehydrogenated. The temperature of the first heat treatment for hydrogenation is 400° C. or higher and 750° C. or lower, preferably 425° C. If the temperature is 425°C or higher, the heat treatment time can be 1 hour or less. However, if the temperature is less than 425°C, the heat treatment time is to be longer than one hour. The substrate is placed in an electric furnace, which is a type of heat treatment device, and the oxide semiconductor layer is heated in a nitrogen atmosphere. After the heat treatment under atmospheric pressure, water and hydrogen are not allowed to enter the oxide semiconductor layer without exposure to the air. After that, the same furnace is filled with high-purity oxygen gas and high-purity N 2 Introduce O gas or ultra-dry air (dew point below -40°C, preferably below -60°C). Cooling is performed using oxygen gas or N 2 It is preferable that the O gas does not contain water, hydrogen, etc. Alternatively, oxygen gas or N 2 The purity of O gas is 6N (99.9 999%) or more, preferably 7N (99.99999%) or more (i.e. oxygen gas or N 2 The impurity concentration in the O gas is preferably 1 ppm or less, more preferably 0.1 ppm or less. I wish.

[0226] The heat treatment device is not limited to an electric furnace, and may be, for example, a GRTA (Gas Rapid Th thermal annealing) equipment, LRTA (Lamp Rapid Thermal) Using RTA (Rapid Thermal Anneal) equipment such as LRTA devices can be used with halogen lamps, metal halide lamps, xenon Arc lamps, carbon arc lamps, high pressure sodium lamps, high pressure mercury lamps, etc. This is a device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp. Heat is generated by heat conduction or radiation from heating elements such as TA devices, lamps, and resistance heating elements. The GRTA is a heating device that uses high-temperature gas to heat the object to be treated. The gas used is a rare gas such as argon or nitrogen, which is suitable for heating. The RTA method is used to heat the material to 600℃. Heat treatment may be performed at up to 750° C. for several minutes.

[0227] After the first heat treatment for dehydration or dehydrogenation, the temperature is preferably 200° C. or higher and 400° C. or lower. Or oxygen gas or N2 at a temperature of 200°C to 300°C 2 Heat treatment under O gas atmosphere The theory may also be carried out.

[0228] In addition, the first heat treatment of the oxide semiconductor layers 131 and 132 is performed to process the oxide semiconductor layers into island-shaped oxide semiconductor layers. In that case, the first heat treatment may be performed on the oxide semiconductor film 130 before the first heat treatment. The substrate is then removed from the heating apparatus and a photolithography process is carried out.

[0229] By going through the above steps, the entire oxide semiconductor film is made into an oxygen-excess state, and thus a high resistance As a result, the oxide semiconductor layers 168 and 198 are entirely i-type. do.

[0230] Next, a resist pattern is formed on the oxide semiconductor layers 168 and 198 by a fourth photolithography process. A mask is formed and selectively etched to form a source electrode layer and a drain electrode layer. Then, the oxide insulating film 107 is formed by a sputtering method.

[0231] Next, in order to reduce the variation in the electrical characteristics of the thin-film transistors, Alternatively, heat treatment (preferably at 150°C or higher and lower than 350°C) is performed under a nitrogen gas atmosphere. For example, a heat treatment is performed at 250° C. for 1 hour in a nitrogen atmosphere.

[0232] Next, a protective insulating layer 106 is formed over the oxide insulating film 107, and the protective insulating layer A color filter layer 191 is formed on the substrate 106. A protective insulating layer 106 and an overcoat layer 192 are formed to cover the protective insulating layer 106 and the overcoat layer 192. A protective insulating layer 109 is formed.

[0233] Next, a ninth photolithography process is performed to form a resist mask and a gate insulating layer 1 02, the oxide insulating film 107, the protective insulating layer 106, and the protective insulating layer 109 are etched. The first terminal 121, the conductive layer 162, the drain electrode layer 105b, and the second terminal 122 are connected to each other. After forming a light-transmitting conductive film, a tenth photolithography process is performed. A resist mask is formed by a lithography process, and selective etching is performed to form the first electrode layer. 110, a terminal electrode 128, a terminal electrode 129, and a wiring layer 145 are formed.

[0234] In this embodiment, the first terminal 121 and the terminal electrode 128 are connected via the connection electrode 120. In this example, the drain electrode layer 165b and the conductive layer 162 are directly connected to each other without using a wiring. This is done via the line layer 145.

[0235] In the capacitance section, the capacitance wiring layer 108, the gate insulating layer 102, the source electrode layer and the drain A capacitor 147 is formed by laminating the in-electrode layer and the capacitor electrode layer 149 formed in the same process. is.

[0236] By the above steps, the thin film transistor 183 is formed in the driver circuit portion and the pixel portion is formed on the same substrate. A thin film transistor 173 can be fabricated on the substrate 172 .

[0237] As in the first embodiment, a partition wall 193 is formed, and an EL layer 194 and a second electrode layer 195 are formed on the first electrode layer 110. The light emitting device of this embodiment having a light emitting element is fabricated by laminating two electrode layers 195 (FIG. 1 See 0.).

[0238] This embodiment can be implemented in appropriate combination with the configurations described in other embodiment modes. do.

[0239] (Embodiment 6) In this embodiment mode, in the light-emitting device described in any of the embodiments 1 to 5, and a light-emitting element that utilizes electroluminescence, An example of how to fabricate an optical display device will be described.

[0240] Light-emitting elements that utilize electroluminescence are characterized by the fact that the light-emitting material is either an organic compound or an inorganic compound. Generally, the former are organic EL elements and the latter are inorganic EL elements. It is called.

[0241] In an organic EL element, electrons and holes are released from a pair of electrodes by applying a voltage to the light-emitting element. are injected into layers containing light-emitting organic compounds, causing a current to flow. The rears (electrons and holes) recombine to form an excited state in the light-emitting organic compound. When the excited state returns to the ground state, light is emitted. Such a light-emitting element is called a current-excitation type light-emitting element.

[0242] Inorganic EL elements are divided into dispersion-type inorganic EL elements and thin-film-type inorganic EL elements according to their element structure. Dispersion-type inorganic EL elements have a light-emitting layer in which particles of a light-emitting material are dispersed in a binder. The emission mechanism is a donor-acceptor reaction that utilizes the donor and acceptor levels. Thin-film inorganic EL elements are made by sandwiching a light-emitting layer between dielectric layers. The structure is sandwiched between electrodes, and the light emission mechanism utilizes the inner shell electron transition of metal ions. In this example, the light-emitting element is an organic EL element. do.

[0243] FIG. 19 shows an example of a pixel configuration to which digital time gray scale driving can be applied as an example of a light emitting device. FIG.

[0244] The configuration of a pixel to which digital time gray scale driving can be applied and the operation of the pixel will be described. The figure shows an n-channel transistor that uses an oxide semiconductor layer as a channel formation region in one pixel. Here is an example of using two of them.

[0245] The pixel 6400 includes a switching transistor 6401, a driving transistor 6402, The switching transistor 64 has a light emitting element 6404 and a capacitor element 6403. 01 has a gate connected to a scanning line 6406 and a first electrode (one of the source and drain electrodes) The first electrode (the other of the source electrode and the drain electrode) is connected to a signal line 6405, and the second electrode (the other of the source electrode and the drain electrode) is connected to a drive The driving transistor 6402 is connected to the gate of the driving transistor 6402. The gate is connected to a power supply line 6407 via a capacitor element 6403, and the first electrode is connected to a power supply line 640 7, and the second electrode is connected to the first electrode (pixel electrode) of the light emitting element 6404. The second electrode of the light emitting element 6404 corresponds to a common electrode 6408. It is electrically connected to a common potential line formed on the substrate.

[0246] A low power supply potential is set to the second electrode (common electrode 6408) of the light emitting element 6404. Note that the low power supply potential is a low power supply potential with respect to the high power supply potential set to the power supply line 6407. A high power supply potential is a potential that is higher than the potential. Examples of low power supply potential include GND and 0V. The potential difference between the high power supply potential and the low power supply potential is applied to the light emitting element 6404. In order to apply a current to the light emitting element 6404 to make the light emitting element 6404 emit light, a high power supply voltage is applied. The potential difference between the low power supply potential and the low power supply potential is set to be equal to or higher than the forward threshold voltage of the light emitting element 6404. The respective potentials are set.

[0247] The capacitor 6403 is omitted by substituting the gate capacitance of the driving transistor 6402. It is also possible to set the gate capacitance of the driving transistor 6402 as follows: A capacitance may be formed between the gate electrode and the second electrode.

[0248] In the case of a voltage input voltage driving method, the gate of the driving transistor 6402 is The driving transistor 6402 is in two states, either fully on or fully off. A video signal is inputted, that is, the driving transistor 6402 is operated in a linear region. In order to operate the driving transistor 6402 in a linear region, the voltage of the power supply line 6407 must be higher than that of the driving transistor 6402. A high voltage is applied to the gate of the driving transistor 6402. A voltage equal to or higher than (power supply line voltage + Vth of the driving transistor 6402) is applied.

[0249] In addition, when analog gray scale driving is performed instead of digital time gray scale driving, the input of the signal is different. By doing so, the same pixel configuration as in FIG. 19 can be used.

[0250] In the case of performing analog gradation driving, a light emitting element 6404 is connected to the gate of a driving transistor 6402. A voltage equal to or higher than the forward voltage of the light emitting element 6401 and the Vth of the driving transistor 6402 is applied. The forward voltage in 04 refers to the voltage required to achieve the desired brightness, and should be at least 100% forward voltage. In addition, the video transistor 6402 is designed to operate in the saturation region. By inputting an optical signal, a current can be passed through the light emitting element 6404. In order to operate the transistor 6402 in the saturation region, the potential of the power supply line 6407 is The gate potential of the light emitting element 6402 is set higher than that of the gate of the transistor 6403. Analog gradation drive can be performed by passing a current corresponding to a video signal through 6404.

[0251] Note that the pixel configuration shown in FIG. 19 is not limited to this. For example, A switch, a resistive element, a capacitive element, a transistor, a logic circuit, or the like may be added.

[0252] Next, the configuration of the light-emitting element will be described with reference to FIG. The cross-sectional structure of a pixel will be described using the example of the type shown in Figures 20(A), (B), and (C). The driving TFTs used in the light-emitting device, TFT7001, 7011, and 7021, are The thin film transistors can be manufactured in the same manner as in any one of the first to fifth embodiments. It is a thin film transistor with high performance.

[0253] The light emitting element only needs to have at least one of the anode and cathode transparent in order to extract light. Then, a thin film transistor and a light emitting element are formed on the substrate, and light is taken from the surface opposite to the substrate. The structure has a top emission structure that emits light from the top surface of the substrate, a bottom emission structure that emits light from the bottom surface of the substrate, and a structure that emits light from the bottom surface of the substrate and the bottom surface of the substrate. There are also light-emitting elements with a double-sided emission structure that emit light from the opposite side of the pixel. The present invention can also be applied to a light emitting device having a structure.

[0254] A light emitting element having a bottom emission structure will be described with reference to FIG.

[0255] The driving TFT 7011 is an n-type TFT, and the light emitted from the light emitting element 7012 is incident on the first electrode layer 70. FIG. 20(A) shows a cross-sectional view of a pixel when light is emitted to the driving TFT 701. A first light-emitting element 7012 is formed on a light-transmitting conductive film 7017 electrically connected to the first light-emitting element 7012. An electrode layer 7013 is formed, and an EL layer 7014 and a second electrode layer 7015 are formed on the first electrode layer 7013. The conductive film 7017 is covered with a protective insulating layer 7035 and a protective The driving current is supplied through contact holes formed in the protective insulating layer 7032 and the oxide insulating layer 7031. It is electrically connected to the drain electrode layer of the active TFT 7011 .

[0256] The light-transmitting conductive film 7017 can be formed of indium oxide containing tungsten oxide, oxide Indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide containing titanium, indium tin oxide, indium zinc oxide, oxide carbide A light-transmitting conductive film such as indium tin oxide to which indium is added can be used.

[0257] In addition, various materials can be used for the first electrode layer 7013 of the light-emitting element. When the electrode layer 7013 of the first embodiment is used as a cathode, a material having a small work function is used. For example, alkali metals such as Li and Cs, and alkaline earth metals such as Mg, Ca, and Sr, In addition to alloys containing these (Mg:Ag, Al:Li, etc.), rare earth elements such as Yb and Er In FIG. 20A, the thickness of the first electrode layer 7013 is set to a thickness that allows light to pass through. (Preferably, about 5 nm to 30 nm). For example, an aluminum film having a thickness of 20 nm is A ZnO film is used as the first electrode layer 7013 .

[0258] After a light-transmitting conductive film and an aluminum film are laminated, the film is selectively etched. In this case, a light-transmitting conductive film 7017 and a first electrode layer 7013 may be formed. This is preferable since etching can be performed using the same mask.

[0259] The periphery of the first electrode layer 7013 is covered with a partition wall 7019. The partition wall 7019 is made of polyimide. Organic resin films such as amide, acrylic, polyamide, and epoxy, inorganic insulating films, and organic polysiloxanes The partition wall 7019 is formed by using a photosensitive resin material. An opening is formed on the surface of the substrate 7013, and the sidewall of the opening is formed with a continuous curvature. It is preferable to form the partition wall 7019 so as to have a surface. In this case, the step of forming a resist mask can be omitted.

[0260] In addition, the EL layer 7014 formed over the first electrode layer 7013 and the partition wall 7019 is at least The light-emitting layer may be included, and may be composed of a single layer or a plurality of layers may be laminated. When the EL layer 7014 is composed of a plurality of layers, the cathode and the An electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a second electrode layer are formed on the first electrode layer 7013. The hole injection layer and the hole injection layer are laminated in this order. Note that it is not necessary to provide all of these layers.

[0261] The stacking order is not limited to the above, and the first electrode layer 7013 may function as an anode. A hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer are formed on the electrode layer 7013 in this order. However, when comparing power consumption, the first electrode layer 7013 is used as a cathode. By this function, an electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, By stacking the layers in order, the voltage rise in the drive circuit section can be suppressed, and power consumption can be reduced. This is preferable because it can be done more efficiently.

[0262] In addition, various materials can be used for the second electrode layer 7015 formed on the EL layer 7014. For example, when the second electrode layer 7015 is used as an anode, the work function is large. Materials such as ZrN, Ti, W, Ni, Pt, Cr, ITO, IZO, ZnO, etc. Any transparent conductive material is preferable. Also, a shielding film 7016, e.g. For example, a metal that blocks light or a metal that reflects light is used. In this embodiment, the second electrode layer 7 An ITO film is used as the shielding film 7015 and a Ti film is used as the shielding film 7016 .

[0263] An EL layer 7014 including a light-emitting layer is sandwiched between a first electrode layer 7013 and a second electrode layer 7015. In the case of the element structure shown in FIG. Light emitted from the element 7012 is emitted to the first electrode layer 7013 side as shown by the arrow. The light passes through the color filter layer 7033 and exits to the outside.

[0264] The color filter layer 7033 is formed by a droplet discharge method such as an inkjet method, a printing method, a photolithography method, or the like. Each is formed by an etching method using graphic technology.

[0265] The color filter layer 7033 is covered with an overcoat layer 7034, which is a protective insulating layer. In FIG. 20A, the overcoat layer 7034 is thin. As shown in FIG. 7, the overcoat layer 7034 has irregularities caused by the color filter layer 7033. It has the function of flattening the surface.

[0266] Next, a light emitting element having a dual emission structure will be described with reference to FIG.

[0267] In FIG. 20B, a conductive film 7 having a light transmitting property is electrically connected to a driving TFT 7021. A first electrode layer 7023 of a light-emitting element 7022 is formed on the first electrode layer 7027. An EL layer 7024 and a second electrode layer 7025 are laminated in this order on the conductive layer 7023. The film 7027 is formed into a protective insulating layer 7045, a protective insulating layer 7042, and an oxide insulating layer 7041. The drain electrode layer of the driving TFT7021 is electrically connected to the drain electrode layer of the driving TFT7021 through a contact hole formed in the This is being continued.

[0268] The light-transmitting conductive film 7027 can be formed using indium oxide containing tungsten oxide, Indium zinc oxide with tungsten oxide, indium oxide with titanium oxide, Indium tin oxide containing titanium, indium tin oxide, indium zinc oxide, oxide carbide A light-transmitting conductive film such as indium tin oxide to which indium is added can be used.

[0269] In addition, various materials can be used for the first electrode layer 7023. For example, When using 7023 as a cathode, a material with a small work function, specifically, for example, Li or Alkaline metals such as Cs, and alkaline earth metals such as Mg, Ca, and Sr, and In addition to alloys containing Mg (Mg:Ag, Al:Li, etc.), rare earth metals such as Yb and Er are preferred. In this embodiment mode, the first electrode layer 7023 is used as a cathode, and its thickness is set to a thickness that allows light to pass through. For example, the thickness of the 20 nm thick film is set to a value of about 5 nm to 30 nm. An aluminum film is used as the cathode.

[0270] After a light-transmitting conductive film and an aluminum film are laminated, the film is selectively etched. In this case, a light-transmitting conductive film 7027 and a first electrode layer 7023 may be formed. It is preferable that the same mask be used for etching.

[0271] The periphery of the first electrode layer 7023 is covered with a partition wall 7029. Organic resin films such as amide, acrylic, polyamide, and epoxy, inorganic insulating films, and organic polysiloxanes The partition wall 7029 is formed by using a photosensitive resin material. An opening is formed on the surface of the substrate 7023, and the side walls of the opening are formed with a continuous curvature. It is preferable to form the partition 7029 so as to have a surface. In this case, the step of forming a resist mask can be omitted.

[0272] In addition, the EL layer 7024 formed on the first electrode layer 7023 and the partition wall 7029 is a light-emitting layer. It is sufficient to include the material, and it may be composed of a single layer or multiple layers may be laminated. When the EL layer 7024 is composed of multiple layers, the layer that functions as the cathode may be a An electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, a hole injection layer, and a hole transport layer are formed on the first electrode layer 7023. It is not necessary to provide all of these layers.

[0273] The stacking order is not limited to the above. The first electrode layer 7023 may be used as an anode, and a hose may be formed on the anode. Alternatively, the hole injection layer, the hole transport layer, the light emitting layer, the electron transport layer, and the electron injection layer may be laminated in this order. When comparing power consumption, the first electrode layer 7023 is used as a cathode, and electrons are injected onto the cathode. The order of lamination of the injection layer, electron transport layer, light-emitting layer, hole transport layer, and hole injection layer reduces power consumption. is preferable because

[0274] In addition, various materials can be used for the second electrode layer 7025 formed on the EL layer 7024. For example, when the second electrode layer 7025 is used as an anode, the work function is large. It is preferable to use a transparent conductive material such as ITO, IZO, or ZnO. In this embodiment, the second electrode layer 7025 is used as an anode, and an I Form a TO film.

[0275] An EL layer 7024 including a light-emitting layer is sandwiched between a first electrode layer 7023 and a second electrode layer 7025. In the case of the element structure shown in FIG. The light emitted from the element 7022 is incident on the second electrode layer 7025 side and the first electrode layer 7026 side as shown by the arrows. The liquid is injected onto both sides of the polar layer 7023.

[0276] The color filter layer 7043 is formed by a droplet discharge method such as an inkjet method, a printing method, a photolithography method, or the like. Each is formed by an etching method using graphic technology.

[0277] The color filter layer 7043 is covered with an overcoat layer 7044, which is a protective insulating layer. Covered by layer 7045 .

[0278] However, when using a light-emitting element with a dual-side emission structure and making both display surfaces full color display, Since light from the second electrode layer 7025 side does not pass through the color filter layer 7043, a separate color filter is required. It is preferable that a sealing substrate having a color filter layer be provided above the second electrode layer 7025.

[0279] Next, a light emitting element having a top emission structure will be described with reference to FIG.

[0280] In FIG. 20C, a TFT 7001 which is a driving TFT is an n-type TFT, and a light emitting element 7002 emits light. FIG. 20(C) is a cross-sectional view of a pixel in the case where the incident light is guided to the second electrode layer 7005 side. 7001 and a first electrode layer 7003 of a light-emitting element 7002 electrically connected to the TFT 7001. An EL layer 7004 and a second electrode layer 7005 are formed on a first electrode layer 7003. They are layered in order.

[0281] In addition, various materials can be used for the first electrode layer 7003. For example, When using 7003 as a cathode, a material with a small work function, specifically, for example, Li or Alkaline metals such as Cs, and alkaline earth metals such as Mg, Ca, and Sr, and In addition to alloys containing Mg (Mg:Ag, Al:Li, etc.), rare earth metals such as Yb and Er are preferred. .

[0282] The periphery of the first electrode layer 7003 is covered with a partition wall 7009. Organic resin films such as amide, acrylic, polyamide, and epoxy, inorganic insulating films, and organic polysiloxanes The partition wall 7009 is formed by using a photosensitive resin material. An opening is formed on the surface of the substrate 7003, and the side wall of the opening is formed with a continuous curvature. It is preferable to form the partition 7009 so as to have a surface. In this case, the step of forming a resist mask can be omitted.

[0283] The EL layer 7004 formed on the first electrode layer 7003 and the partition wall 7009 is at least The light-emitting layer may be included, and may be composed of a single layer or a plurality of layers may be laminated. When the EL layer 7004 is composed of a plurality of layers, the cathode and the An electron injection layer, an electron transport layer, a light emitting layer, a hole transport layer, and a The hole injection layer is laminated in this order. Note that it is not necessary to provide all of these layers.

[0284] The stacking order is not limited to the above, and the hole injection onto the first electrode layer 7003 used as the anode may be selected. Alternatively, the layer may be laminated in the order of a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer.

[0285] In FIG. 20(C), a hole injection is performed on a laminated film in which a Ti film, an aluminum film, and a Ti film are laminated in this order. The dopant layer, hole transport layer, light emitting layer, electron transport layer, and electron injection layer are laminated in that order, and Mg:A A laminate of a g-alloy thin film and an ITO film is formed.

[0286] However, when the TFT 7001 is an n-type, an electron injection layer and an electron transport layer are provided on the first electrode layer 7003. The order of lamination of the layer, light-emitting layer, hole transport layer, and hole injection layer reduces the voltage in the drive circuit. This is preferable because it is possible to suppress the rise in temperature and reduce power consumption.

[0287] The second electrode layer 7005 is formed using a light-transmitting conductive material, for example. Indium oxide containing tungsten oxide, Indium zinc oxide containing tungsten oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium Indium tin oxide, indium zinc oxide, indium tin oxide with silicon oxide added, etc. A light-transmitting conductive film may be used.

[0288] An EL layer 7004 including a light-emitting layer is sandwiched between a first electrode layer 7003 and a second electrode layer 7005. In the case of the pixel shown in FIG. 20C, the light-emitting element 7002 corresponds to the light-emitting element 7003. Light emitted from 002 is emitted to the second electrode layer 7005 side as shown by the arrow.

[0289] In FIG. 20C, the drain electrode layer of the TFT 7001 is an oxide insulating layer 705. 1. Through contact holes formed in the protective insulating layer 7052 and the protective insulating layer 7055 It is electrically connected to the first electrode layer 7003. The planarization insulating layer 7053 is made of polyimide, acrylic, etc. Examples of the resin material that can be used include polystyrene, benzocyclobutene, polyamide, and epoxy. In addition to the above resin materials, low-dielectric constant materials (low-k materials), siloxane resins, and PSG are also available. (phosphorus glass), BPSG (boron phosphorus glass), etc. can be used. The planarization insulating layer 7053 can be formed by stacking a plurality of insulating films made of the above material. The method for forming the planarization insulating layer 7053 is not particularly limited. Ring method, SOG method, spin coating, dip, spray coating, droplet ejection method (inkjet (printing, screen printing, offset printing, etc.), doctor knife, roll coater, car A ten coater, a knife coater, or the like can be used.

[0290] In addition, a partition wall 7 is provided to insulate the first electrode layer 7003 from the first electrode layer of an adjacent pixel. The partition wall 7009 is made of a material such as polyimide, acrylic, polyamide, or epoxy. The partition wall 7009 is formed by using an organic resin film, an inorganic insulating film, or an organic polysiloxane. A photosensitive resin material is used to form an opening on the first electrode layer 7003, and a It is preferable that the wall is formed to have an inclined surface having a continuous curvature. When a photosensitive resin material is used as 7009, the process of forming a resist mask can be omitted. It is possible.

[0291] In the structure of FIG. 20C, when a full-color display is performed, for example, the light-emitting element 70 02 is a green light emitting element, one of the adjacent light emitting elements is a red light emitting element, and the other The elements are blue light-emitting elements. In addition to the three types of light-emitting elements, a white element is added for a total of four types. A light-emitting display device capable of full-color display may be manufactured using the light-emitting element.

[0292] In the structure of FIG. 20C, all the light emitting elements are white light emitting elements. A sealing substrate having a color filter or the like is disposed above the light emitting element 7002. A light-emitting display device capable of full color display may be manufactured. By forming a material and combining it with a color filter and a color conversion layer, a full color display is achieved. It is possible.

[0293] 20A to 20C show an example in which the thin film transistor and the first electrode layer are in direct contact with each other. As in the fourth embodiment, the drain electrode layer of the thin film transistor and the first electrode layer are The TFT 700 may be electrically connected to the TFT 700 via a connection electrode layer. 1, 7011, and 7021 are also thin films as shown in the second, third, and fifth embodiments. A transistor may also be used.

[0294] Of course, a single-color display may be used. For example, a lighting device may be formed using white light. Alternatively, monochromatic light may be used to form an area color type light emitting device.

[0295] If necessary, an optical film such as a polarizing film, eg, a circular polarizing plate, may be provided.

[0296] Although the organic EL element has been described as the light-emitting element here, inorganic EL elements can also be used as the light-emitting element. It is also possible to provide an L element.

[0297] In addition, the thin film transistor (driving TFT) that controls the driving of the light-emitting element and the light-emitting element are electrically However, a current control TFT is connected between the driving TFT and the light emitting element. The configuration may be such that the input / output terminals are connected to each other.

[0298] This embodiment mode can be combined with other embodiment modes as appropriate.

[0299] (Embodiment 7) In this embodiment mode, an example of the element structure of the light-emitting element shown in any of the first to sixth embodiments will be described. do.

[0300] The element structure shown in FIG. 21(A) includes a pair of electrodes (a first electrode 1001 and a second electrode 1002). ) and an EL layer 1003 including a light-emitting region is sandwiched between them. In the description of the embodiment, the first electrode 1001 is used as an anode, and the second electrode 10 02 shall be used as the cathode.

[0301] The EL layer 1003 is sufficient as long as it includes at least a light-emitting layer. The functional layer other than the light-emitting layer may be a layer structure including a functional layer having a high hole injection property. materials with high hole transport properties, materials with high electron transport properties, materials with high electron injection properties, A layer containing a material having a high electron and hole transporting property can be used. Specifically, functional layers such as a hole injection layer, a hole transport layer, an electron transport layer, and an electron injection layer are appropriately combined. It can be used in combination.

[0302] The light-emitting element shown in FIG. 21A is formed between a first electrode 1001 and a second electrode 1002. The potential difference causes a current to flow, and holes and electrons recombine in the EL layer 1003, causing light to be emitted. In other words, the EL layer 1003 is configured to form a light emitting region.

[0303] Light is emitted through either the first electrode 1001 or the second electrode 1002, or both. Therefore, the electric current is taken out to the outside through either the first electrode 1001 or the second electrode 1002. Either or both of the first and second electrodes are made of a material having optical transparency.

[0304] As shown in FIG. 21B, the EL layer is disposed between the first electrode 1001 and the second electrode 1002. In the case where the laminate structure has n layers (n is a natural number of 2 or more), The mth (m is a natural number, m is 1 or more and n-1 or less) EL layer and the (m+1)th EL layer It is preferable to provide a charge generating layer 1004 between the two layers.

[0305] The charge generating layer 1004 may be a composite material of an organic compound and a metal oxide, a metal oxide, an organic compound, Alkali metals, alkaline earth metals, or composite materials with these compounds, as well as Examples of composite materials of organic compounds and metal oxides include For example, organic compounds and V 2 O 5 Or MoO 3 Or WO 3 The organic compounds include metal oxides such as The following compounds are considered to be suitable for use: aromatic amine compounds, carbazole derivatives, aromatic hydrocarbons, polymer compounds (oligosaccharides, etc.) Various compounds such as carboxymers, dendrimers, polymers, etc. can be used. As an organic compound, a hole-transporting organic compound with a hole mobility of 10 -6 cm 2 / Vs or later However, it is preferable that the material has a higher hole transporting property than the electron transporting property. If necessary, materials other than these may be used. The material has excellent carrier injection and carrier transport properties, and is therefore suitable for low-current driving of light-emitting devices and It is possible to realize low-voltage driving.

[0306] The charge generating layer 1004 is made of a composite material of an organic compound and a metal oxide, and other materials. For example, a layer including a composite material of an organic compound and a metal oxide and a layer including an electron transport layer may be formed. A compound selected from among the electroconductive materials and a layer containing a compound having high electron transport properties are combined. Alternatively, a layer containing a composite material of an organic compound and a metal oxide and a transparent conductive film may be combined. may be formed in combination.

[0307] A light-emitting element having such a configuration is less susceptible to problems such as energy transfer and quenching. By expanding the range of materials to be selected, it will be possible to develop light-emitting devices that have both high luminous efficiency and a long lifespan. It is also easy to obtain phosphorescence in one EL layer and fluorescence in the other. .

[0308] The charge generating layer 1004 is a layer that generates a charge when a voltage is applied between the first electrode 1001 and the second electrode 1002. When the charge generating layer 1004 is turned on, holes are generated in the EL layer 1003 formed in contact with the charge generating layer 1004. The EL layer 1002 has a function of injecting electrons into the other EL layer 1003 .

[0309] The light-emitting element shown in FIG. 21B can be variously formed by changing the type of light-emitting material used in the light-emitting layer. In addition, it is possible to obtain a wide variety of luminescent colors by using multiple luminescent materials with different luminescent colors. This makes it possible to obtain light emission with a broad spectrum or white light emission.

[0310] When white light is obtained using the light-emitting element shown in FIG. 21(B), a combination of multiple light-emitting layers is used. The light emitting element may be configured to emit white light containing red, blue, and green light. For example, The first EL layer contains a fluorescent material as a light-emitting material, and the second EL layer contains green and red phosphorescent materials as light-emitting materials. In addition, the first EL layer that emits red light may have a second EL layer that contains The second EL layer emits green light, and the third EL layer emits blue light. Alternatively, even if the device has a light-emitting layer that emits light of complementary colors, it can be used as a white light source. In a stacked element in which two EL layers are stacked, the color emitted from the first EL layer is When the color of the light emitted from the first EL layer and the color of the light emitted from the second EL layer are in a complementary color relationship, Examples of color relationships include blue and yellow, or blue-green and red.

[0311] In the above-mentioned laminated element configuration, a charge generating layer is disposed between the laminated EL layers. This makes it possible to realize a long-life element in the high-luminance region while keeping the current density low. In addition, the voltage drop due to the resistance of the electrode material can be reduced, allowing for uniform light emission over a large area. This becomes possible.

[0312] This embodiment mode can be appropriately combined with any of the configurations described in the other embodiment modes.

[0313] (Embodiment 8) In this embodiment mode, the appearance and cross section of a light-emitting display panel (also called a light-emitting panel) will be described with reference to FIG. FIG. 22(A) shows a thin film transistor and a FIG. 2 is a plan view of a panel in which a light-emitting element and a second substrate are sealed with a sealant; FIG. 22B corresponds to a cross-sectional view taken along line HI in FIG. 22A.

[0314] A pixel portion 4502, a signal line driver circuit 4503a, and a signal line driver circuit 4504 are provided on a first substrate 4501. A sealant 4505 is formed to surround the gate driver circuits 4504a and 4504b. In addition, a pixel portion 4502, signal line driver circuits 4503a and 4503b, and A second substrate 4506 is provided on the scanning line driver circuits 4504a and 4504b. The pixel portion 4502, the signal line driver circuits 4503a and 4503b, and the scanning line driver circuit 45 4504a and 4504b are a first substrate 4501, a sealant 4505, and a second substrate 4506. The filling material 4507 is sealed with the sealing material 4507. Highly sealed protective film with little outgassing (lamination film, UV curable resin film) It is preferable to package (enclose) the package in a material such as a film or a cover material.

[0315] A pixel portion 4502, a signal line driver circuit 4503a, and a fourth 503b and the scanning line driver circuits 4504a and 4504b each have a plurality of thin film transistors. In FIG. 22B, a thin film transistor 4510 included in a pixel portion 4502 and a signal 45, a thin film transistor 4509 included in a line driver circuit 4503a is illustrated.

[0316] The thin film transistors 4509 and 4510 each include the oxide semiconductor layer described in any of Embodiments 1 to 5. Thin film transistors with high reliability, including thin film transistors for driving circuits, can be used. The transistor 4509 may be the thin film transistors 180 and 181 shown in any of the first to fifth embodiments. 182, as the thin film transistor 4510 for the pixel, the thin film transistors 170, 171 In this embodiment, the thin film transistors 4509 and 172 can be used. 510 is an n-channel thin film transistor.

[0317] The oxide semiconductor layer of the thin film transistor 4509 for the driver circuit is formed over the insulating layer 4544. A conductive layer 4540 is provided in a position overlapping with the channel forming region. By providing the MOSFET in a position overlapping the channel formation region of the semiconductor layer, It is possible to reduce the amount of change in the threshold voltage of the thin film transistor 4509. The potential of the gate electrode layer 4540 may be the same as that of the gate electrode layer of the thin film transistor 4509 or may be different. The conductive layer 4 may be formed of a conductive material and may function as a second gate electrode layer. The potential of 540 may be GND, 0V, or may be in a floating state.

[0318] Although not shown, the oxide insulating layer 4542 and the insulating layer 4544 may be formed by a method similar to that described in Embodiment 1. Such a protective insulating layer 106 may be provided.

[0319] In addition, the thin film transistor 4510 is electrically connected to a first electrode layer 4517 .

[0320] The oxide insulating layer 4542 was formed using a material and a method similar to those of the oxide insulating film 107 described in Embodiment 1. It may be formed as follows.

[0321] A color filter layer 4545 is formed on the oxide insulating layer 4541 so as to overlap with the light-emitting region of the light-emitting element 4511. Formed on 4542.

[0322] In addition, it functions as a planarizing insulating film to reduce the surface unevenness of the color filter layer 4545. It is covered with an overcoat layer 4543 .

[0323] In addition, an insulating layer 4544 is formed on the overcoat layer 4543. The protective insulating layer 109 may be formed using a material and a method similar to those of the protective insulating layer 109 described in Embodiment 1.

[0324] In addition, 4511 corresponds to a light-emitting element, and a first electrode layer which is a pixel electrode of the light-emitting element 4511 The thin film transistor 4517 is electrically connected to the source electrode layer or the drain electrode layer of the thin film transistor 4510. The light emitting element 4511 is configured with a first electrode layer 4517, an electroluminescent layer 45 12, the second electrode layer 4513, but is not limited to the structure shown. The configuration of the light emitting element 4511 can be changed appropriately according to the direction of the light extracted from 511. can be done.

[0325] The partition 4520 is formed using an organic resin film, an inorganic insulating film, or an organic polysiloxane. In particular, a photosensitive material is used to form an opening on the first electrode layer 4517, and the sidewall of the opening It is preferable that the inclined surface is formed so as to have a continuous curvature.

[0326] The electroluminescent layer 4512 may be composed of a single layer or a plurality of layers may be laminated. It doesn't matter whether it is done or not.

[0327] In order to prevent oxygen, hydrogen, moisture, carbon dioxide, and the like from entering the light-emitting element 4511, the second electrode layer A protective film may be formed on the partition wall 4513 and the partition wall 4520. The protective film may be a silicon nitride film, A silicon oxynitride film, DLC film, etc. can be formed.

[0328] In addition, signal line driver circuits 4503a and 4503b, scanning line driver circuits 4504a and 4504b Various signals and potentials applied to the pixel portion 4502 are It is supplied by b.

[0329] The connection terminal electrode 4515 is made of the same conductive film as the first electrode layer 4517 of the light emitting element 4511. The terminal electrode 4516 is formed from the source electrode layer and the drain electrode layer of the thin film transistor 4509. The second electrode layer is formed from the same conductive film.

[0330] The connection terminal electrode 4515 is connected to the terminal of the FPC 4518a via the anisotropic conductive film 4519. The electrodes are electrically connected to each other.

[0331] The second substrate is not transparent to light, and is located in the direction of light extraction from the light emitting element 4511. In this case, glass plates, plastic plates, polyester films or A light-transmitting material such as an acrylic film is used.

[0332] In addition, filler 4507 can be inert gas such as nitrogen or argon, or ultraviolet-curing resin. It can be made of oil or thermosetting resin, and can be made of PVC (polyvinyl chloride), acrylic, Polyimide, epoxy resin, silicone resin, PVB (polyvinyl butyral) or EV A (ethylene vinyl acetate) can be used. For example, nitrogen can be used as a filler. That's good.

[0333] If necessary, a polarizing plate or a circular polarizing plate (including an elliptical polarizing plate) may be provided on the light-emitting surface of the light-emitting element. Optical films such as retardation plates (λ / 4 plates, λ / 2 plates) and color filters may be provided as appropriate. In addition, the polarizing plate or the circular polarizing plate may be provided with an anti-reflection film. Anti-glare treatment can be applied to diffuse reflected light and reduce glare.

[0334] The signal line driver circuits 4503a and 4503b and the scanning line driver circuits 4504a and 4504b are A driving circuit formed of a single crystal semiconductor film or a polycrystalline semiconductor film on a separately prepared substrate is Also, only the signal line driver circuit, or a part of the signal line driver circuit, or the scanning line driver circuit may be mounted. Only the path or only a part of the path may be separately formed and mounted, and the configuration is not limited to that of FIG.

[0335] By the above steps, a highly reliable light-emitting device (display panel) can be manufactured as a semiconductor device. This can be done.

[0336] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0337] (Embodiment 9) In this embodiment, at least a part of the driver circuit and a thin film transistor to be disposed in the pixel portion are formed on the same substrate. An example of fabricating a transistor will be described below.

[0338] The thin film transistor disposed in the pixel portion is formed according to any one of the first to fifth embodiments. Since the thin film transistors shown in the first to fifth embodiments are n-channel TFTs, the driver circuit Of these, a part of the driver circuit that can be configured with n-channel TFTs is a thin-film transistor in the pixel area. The transistor is formed on the same substrate.

[0339] An example of a block diagram of an active matrix display device is shown in FIG. A pixel portion 5301, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, and a third scanning line driver circuit 5304 are provided on a substrate 5300. The pixel portion 5301 includes a signal line driver circuit 5303 and a signal line driver circuit 5304. is arranged extending from a signal line driver circuit 5304, and a plurality of scanning lines are arranged in a first scanning line driver circuit The first scanning line driver circuit 5302 and the second scanning line driver circuit 5303 are arranged to extend from each other. At the intersections of the signal lines and the display elements, pixels each having a display element are arranged in a matrix. In addition, the substrate 5300 of the display device is a flexible printed circuit (FPC). A timing control circuit 5305 (controller, control I / F) is connected to the timing control circuit 5305 via a connection part such as a C).

[0340] In FIG. 12A, a first scanning line driver circuit 5302, a second scanning line driver circuit 5303, a signal The signal line driver circuit 5304 is formed on the same substrate 5300 as the pixel portion 5301. This reduces the number of external components such as drive circuits, and therefore reduces costs. In addition, when a driving circuit is provided outside the substrate 5300, the wiring is extended to provide a connection portion. The number of connections can be reduced, and the reliability and yield can be improved.

[0341] The timing control circuit 5305 is, for example, A first scanning line driving circuit start signal (GSP1), a scanning line driving circuit clock signal The timing control circuit 5305 also supplies the second scanning line driving circuit (GCLK1). For example, a start signal for the second scanning line driving circuit (GSP2) (S It supplies the clock signal (GCLK2) for the scanning line driver circuit. The timing control circuit 5305 supplies a start signal for the signal line driver circuit to the signal line driver circuit 5304. signal (SSP), clock signal for signal line driver circuit (SCLK), data for video signal (DA TA) (also simply called video signal), and latch signal (LAT). Each clock signal may be a plurality of clock signals with different periods, or may be an inverted clock signal. The first scanning line driving circuit may be supplied together with a signal (CKB) that is a signal obtained by It is possible to omit either the first scanning line driver circuit 5302 or the second scanning line driver circuit 5303.

[0342] In FIG. 12B, a circuit with a low driving frequency (for example, the first scanning line driving circuit 5302, The second scanning line driver circuit 5303) is formed on the same substrate 5300 as the pixel portion 5301, and the signal line driver The configuration in which the driving circuit 5304 is formed on a substrate different from that of the pixel portion 5301 is shown. Due to its structure, the field effect mobility is smaller than that of a transistor using a single crystal semiconductor. The driving circuit formed on the substrate 5300 can be configured by the thin film transistor. Therefore, it is possible to increase the size of the display device, reduce the cost, and improve the yield. do.

[0343] The thin film transistors described in Embodiments 1 to 5 are n-channel TFTs. 3(A) and 13(B) show the configuration and operation of a signal line driver circuit configured with n-channel TFTs. An example will be given below.

[0344] The signal line driver circuit includes a shift register 5601 and a switching circuit 5602 . The switching circuit 5602 includes switching circuits 5602_1 to 5602_N (N is a natural number). The switching circuits 5602_1 to 5602_N each have a A plurality of thin film transistors 5603_1 to 5603_k (k is a natural number) are provided. The thin film transistors 5603_1 to 5603_k are n-channel TFTs. An example will be explained.

[0345] The connection relationship of the signal line driver circuit will be described using the switching circuit 5602_1 as an example. The first terminals of the thin film transistors 5603_1 to 5603_k are respectively connected to the wiring 5604_1 The second terminals of the thin film transistors 5603_1 to 5603_k are connected to are connected to the signal lines S1 to Sk, respectively. The gate of k is connected to the wiring 5605_1.

[0346] The shift register 5601 sequentially outputs H level (H signal) to the wirings 5605_1 to 5605_N. , or high power supply potential level), and the switching circuits 5602_1 to 56 It has the function of selecting 02_N in sequence.

[0347] The switching circuit 5602_1 includes wirings 5604_1 to 5604_k and signal lines S1 to Sk. A function of controlling the conduction state (conduction between the first terminal and the second terminal) with the wiring 5604_ The switches have a function of controlling whether or not potentials of 1 to 5604_k are supplied to the signal lines S1 to Sk. In this way, the switching circuit 5602_1 has a function as a selector. The film transistors 5603_1 to 5603_k are connected to the wirings 5604_1 to 5604_k, respectively. and the signal lines S1 to Sk, that is, the wirings 5604_1 to 5604_k The thin film transistor 56 has a function of supplying the potential to the signal lines S1 to Sk. Each of 03_1 to 5603_k has a function as a switch.

[0348] In addition, the wirings 5604_1 to 5604_k each carry video signal data (DATA). The video signal data (DATA) is an analog signal corresponding to the image information or image signal. This is often a signal that

[0349] Next, the operation of the signal line driver circuit of FIG. 13(A) will be described with reference to the timing chart of FIG. 13(B). FIG. 13B shows signals Sout_1 to Sout_N and An example of Vdata_1 to Vdata_k is shown. These are examples of output signals of the shift register 5601, and signals Vdata_1 to Vdata _k are examples of signals input to the wirings 5604_1 to 5604_k, respectively. One operation period of the signal line driving circuit corresponds to one gate selection period in the display device. The selection period is divided into periods T1 to TN, for example. This is a period for writing video signal data (DATA) to the pixels belonging to the selected row. be.

[0350] In the drawings of the present embodiment, the signal waveforms of the components are not rounded for clarity. Therefore, the scale may not necessarily be limited to the actual scale. It should be noted that

[0351] During the period T1 to the period TN, the shift register 5601 outputs an H-level signal to the wiring 560 For example, in the period T1, the shift registers 5 601 outputs a high-level signal to the wiring 5605_1. Since 5603_1 to 5603_k are turned on, wiring 5604_1 to 5604_k and signal At this time, the wirings 5604_1 to 5604_k are in a conductive state. Data(S1)~Data(Sk) are input. Data(S1)~Data(Sk ) belong to a selected row via thin film transistors 5603_1 to 5603_k. In this way, during the periods T1 to TN, Then, the video signal data (DATA) is sent to the pixels in the selected row in order of k columns. It will be written.

[0352] As described above, video signal data (DATA) is written to the pixels in multiple columns. This makes it possible to reduce the number of video signal data (DATA) or the number of wirings. This reduces the number of connections to external circuits. By writing directly to the memory, the writing time can be increased, and the video signal can be written more quickly. This can prevent under-crowding.

[0353] The shift register 5601 and the switching circuit 5602 may be the same as those in the first embodiment. It is possible to use circuits constituted by thin film transistors shown in the above to 5.

[0354] Regarding one form of a shift register used as a part of a scanning line driver circuit and / or a signal line driver circuit, This will be described with reference to FIG. 14 and FIG. 15.

[0355] The scanning line driving circuit has a shift register. In some cases, it may also have a level shifter or a buffer. In the scanning line driver circuit, a clock signal is input to the shift register. The selection signal is generated by inputting the clock (CLK) and start pulse signal (SP). The generated selection signal is buffered and amplified in a buffer and then supplied to the corresponding scan line. The gate electrodes of the transistors of the pixels for one line are connected to the scanning line. Since the transistors of the pixels in one line must be turned on simultaneously, The capacitor used is capable of carrying a large current.

[0356] The shift register includes a first pulse output circuit 10_1 to an N-th pulse output circuit 10_N ( N is a natural number of 3 or more (see FIG. 14(A)). The first pulse output circuit 10_1 to the N-th pulse output circuit 10_N of the register are A first clock signal CK1 is transmitted from a wiring 11, and a second clock signal CK2 is transmitted from a second wiring 12. , a third clock signal CK3 is output from a third wiring 13, and a fourth clock signal CK4 is output from a fourth wiring 14. In the first pulse output circuit 10_1, a signal CK4 is supplied from the fifth wiring 15. A start pulse SP1 (first start pulse) is input. In the pulse output circuit 10_n (n is a natural number between 2 and N), The signal from the line 10_n-1 (called the previous signal OUT(n-1)) (n is a natural number greater than or equal to 2) In the first pulse output circuit 10_1, the third pulse output circuit 10_2 is connected to the second stage Similarly, a signal from the n-th pulse output circuit 10_n in the second stage or later is input. Then, the signal from the (n+2)th pulse output circuit 10_(n+2) two stages later (the later stage signal OUT(n+2)) is input. Therefore, the pulse output circuit of each stage outputs the and / or a first output signal (OUT(1)(SR ) to OUT(N)(SR)), a second output signal (OUT(1) to be input to another circuit, etc. As shown in FIG. 14(A), the final output of the shift register is Since the next stage signal OUT(n+2) is not input to the two stages of the stage, as an example, The second start pulse SP2 and the third start pulse SP3 are input. That's good.

[0357] The clock signal (CK) goes between H and L levels (L signal, low power supply potential) at regular intervals. Here, the first clock signal (CK1) to the second clock signal (CK2) are The four clock signals (CK4) are delayed by 1 / 4 of a period in sequence (i.e., 90 degrees from each other). In this embodiment, the first clock signal (CK1) to the fourth clock signal (CK2) are The clock signal (CK4) is used to control the driving of the pulse output circuit. The signal may be called GCK or SCK depending on the drive circuit to which it is input. I will explain as K.

[0358] FIG. 14B shows one of the pulse output circuits 10_1 to 10_N shown in FIG. 14A. The first input terminal 21, the second input terminal 22, and the third input terminal 23 are connected to the first wiring 11 to The fourth wiring 14 is electrically connected to the fourth wiring 14. For example, in FIG. The first pulse output circuit 10_1 has a first input terminal 21 electrically connected to the first wiring 11. The second input terminal 22 is electrically connected to the second wiring 12, and the third input terminal 23 is The second pulse output circuit 10_2 is electrically connected to the third wiring 13. The first input terminal 21 is electrically connected to the second wiring 12, and the second input terminal 22 is electrically connected to the third wiring 13. The third input terminal 23 is electrically connected to the fourth wiring 14. There are.

[0359] Each of the first pulse output circuit 10_1 to the N-th pulse output circuit 10_N has a first input terminal a first input terminal 21, a second input terminal 22, a third input terminal 23, a fourth input terminal 24, a fifth input terminal The input terminal 25, the first output terminal 26, and the second output terminal 27 (see FIG. 14(B)). In the first pulse output circuit 10_1, a first clock signal is input to a first input terminal 21. A first clock signal CK1 is input to the first input terminal 22, a second clock signal CK2 is input to the third input terminal 23, and a third clock signal CK3 is input to the second input terminal 24. A third clock signal CK3 is input to the input terminal 23 of the second clock CLK1, and a start signal CK4 is input to the fourth input terminal 24 of the third clock CLK2. A pulse is input, the next stage signal OUT(3) is input to the fifth input terminal 25, and the first output A first output signal OUT(1)(SR) is output from a terminal 26, and a second output signal OUT(1)(SR) is output from a second output terminal 27. The second output signal OUT(1) is output.

[0360] The first pulse output circuit 10_1 to the N-th pulse output circuit 10_N are each a three-terminal thin-film transistor. In addition to TFTs (also called Thin Film Transistors), The four-terminal thin film transistor described in the above embodiment can be used. In the document, when a thin film transistor has two gate electrodes via a semiconductor layer, The gate electrode below the semiconductor layer is called the lower gate electrode, and the gate electrode above the semiconductor layer is called the upper gate electrode. It is also called the gate electrode.

[0361] When an oxide semiconductor is used for a semiconductor layer including a channel formation region of a thin film transistor, The threshold voltage may shift to the negative or positive side depending on the process. Therefore, in a thin film transistor in which an oxide semiconductor is used for a semiconductor layer including a channel formation region, A configuration capable of controlling the threshold voltage is preferable. The threshold voltage can be adjusted to the desired value by controlling the potential of the upper and / or lower gate electrodes. The value can be controlled.

[0362] Next, an example of a specific circuit configuration of the pulse output circuit shown in FIG. 14(B) will be described with reference to FIG. This is explained in (C).

[0363] The pulse output circuit shown in FIG. 14C includes a first transistor 31 to a thirteenth transistor. In addition to the first input terminal 21 to the fifth input terminal 25, A power supply line 51 to which a first high power supply potential VDD is supplied, a power supply line 52 to which a second high power supply potential VCC is supplied, A power supply line 52 to which a low power supply potential VSS is supplied and a power supply line 53 to which a low power supply potential VSS is supplied are connected to the first transistor 31. A signal or a power supply potential is supplied to the thirteenth transistor 43. A signal or the like is output to the first output terminal 26 and the second output terminal 27. The magnitude relationship of the power supply potential of the power supply lines is as follows: the first power supply potential VDD is a potential equal to or higher than the second power supply potential VCC. The second power supply potential VCC is set to a potential higher than the third power supply potential VSS. The first clock signal (CK1) through the fourth clock signal (CK4) go high at regular intervals. When it is H level, it is VDD, and when it is L level, it is VSS. In addition, the potential VDD of the power supply line 51 is set higher than the potential VCC of the power supply line 52. This allows the potential applied to the gate electrode of a transistor to be lowered without affecting its operation. This can reduce the shift in the threshold voltage of the transistor and suppress degradation. Of the first transistor 31 to the thirteenth transistor 43, The sixth transistor 31, the sixth transistor 36 to the ninth transistor 39 are provided with four-terminal thin film transistors. It is preferable to use a first transistor 31 and a sixth transistor 36. The first to ninth transistors 39 are connected to a transistor having one of a source electrode and a drain electrode. A transistor in which the potential of the gate electrode is required to be switched by a control signal of the gate electrode. and the response to the control signal input to the gate electrode is fast (the rise of the on-current is This transistor can reduce malfunctions in pulse output circuits by reducing the steepness of the switching frequency. Therefore, it is possible to control the threshold voltage by using a four-terminal thin-film transistor. As a result, a pulse output circuit capable of further reducing malfunctions can be obtained.

[0364] In FIG. 14C, the first transistor 31 has a first terminal electrically connected to a power supply line 51. a second terminal electrically connected to a first terminal of a ninth transistor 39; (the lower gate electrode and the upper gate electrode) are electrically connected to the fourth input terminal 24. The second transistor 32 has a first terminal electrically connected to the power supply line 53 and a second terminal a gate electrode electrically connected to the first terminal of the ninth transistor 39 and a gate electrode electrically connected to the first terminal of the fourth transistor The third transistor 33 is electrically connected to the gate electrode of the first terminal The first terminal is electrically connected to the first input terminal 21, and the second terminal is electrically connected to the first output terminal 26. The fourth transistor 34 has a first terminal electrically connected to the power supply line 53, The second terminal is electrically connected to the first output terminal 26. The fifth transistor 35 is The first terminal is electrically connected to the power supply line 53, and the second terminal is connected to the gate of the second transistor 32. The electrode of the fourth transistor 34 is electrically connected to the gate electrode of the fourth transistor 34. The sixth transistor 36 has a first terminal electrically connected to the power supply line 52, and the second terminal is electrically connected to the gate electrode of the second transistor 32 and the fourth transistor The gate electrode of the transistor 34 is electrically connected to the gate electrode of the transistor 34. The seventh transistor (the gate electrode of the seventh transistor) is electrically connected to the fifth input terminal 25. The eighth transistor 37 has a first terminal electrically connected to the power supply line 52 and a second terminal electrically connected to the eighth transistor 38. and a gate electrode (a lower gate electrode and an upper gate electrode) electrically connected to the second terminal of the is electrically connected to the third input terminal 23. The eighth transistor 38 is is electrically connected to the gate electrode of the second transistor 32 and the gate electrode of the fourth transistor 34. and the gate electrodes (the lower gate electrode and the upper gate electrode) are connected to the second input terminal The ninth transistor 39 has a first terminal electrically connected to the first transistor 22. The second terminal is electrically connected to the second terminal of the second transistor 31 and the second terminal of the second transistor 32. The gate electrode of the third transistor 33 and the gate electrode of the tenth transistor 40 are connected to The gate electrodes (the lower gate electrode and the upper gate electrode) are electrically connected to the power supply line 52. The tenth transistor 40 has a first terminal electrically connected to the first input terminal 2. 1, the second terminal is electrically connected to the second output terminal 27, and the gate electrode is electrically connected to the second terminal of the ninth transistor 39. 41 has a first terminal electrically connected to the power supply line 53 and a second terminal electrically connected to the second output terminal 27. The gate electrodes of the second transistor 32 and the fourth transistor The twelfth transistor 42 is electrically connected to the gate electrode of the first terminal of the transistor 34. The first terminal is electrically connected to the power supply line 53, and the second terminal is electrically connected to the second output terminal 27. The gate electrode of the seventh transistor 37 (the lower gate electrode and the upper gate electrode) The thirteenth transistor 43 has a first terminal electrically connected to the power supply line 5 3, the second terminal is electrically connected to the first output terminal 26, and the gate electrode The seventh transistor 37 has a gate electrode (lower gate electrode and upper gate electrode) are electrically connected.

[0365] In FIG. 14C, the gate electrode of the third transistor 33 and the gate electrode of the tenth transistor 4 The connection point of the gate electrode of transistor 0 and the second terminal of transistor 939 is referred to as node A. In addition, the gate electrode of the second transistor 32, the gate electrode of the fourth transistor 34, the second terminal of the fifth transistor 35, the second terminal of the sixth transistor 36, the second terminal of the eighth transistor The connection point of the first terminal of the transistor 38 and the gate electrode of the eleventh transistor 41 is node B. Let us assume that.

[0366] FIG. 15(A) shows the pulse output circuit described in FIG. 14(C) as a first pulse output circuit 10_ 1, the first input terminal 21 to the fifth input terminal 25 and the first output terminal 26 and a signal input to or output from a second output terminal 27.

[0367] Specifically, a first clock signal CK1 is input to the first input terminal 21, and A second clock signal CK2 is input to the third input terminal 22, and a third clock signal CK3 is input to the third input terminal 23. A start pulse (SP1) is input to the fourth input terminal 24, and a fifth The next stage signal OUT(3) is input to the first input terminal 25, and the first output terminal 26 outputs the first output The signal OUT(1) (SR) is output, and the second output signal OUT( 1) is output.

[0368] A thin film transistor is defined as a transistor having at least three elements including a gate, a drain, and a source. A semiconductor device has a terminal and a channel region formed in a region overlapping with the gate. By controlling the gate potential, the drain and source are connected via the channel region. The current flowing between the source and drain can be controlled by the thin film transistor. Which is the source and which is the drain depends on the transistor structure and operating conditions, etc. Therefore, the regions that function as the source and drain are In some cases, the term "source" or "drain" is not used. In such cases, for example, They may be written as terminal or second terminal.

[0369] In FIG. 14(C) and FIG. 15(A), the node A is put into a floating state, and the boot A capacitor may be provided separately to perform a strap operation. To achieve this, a capacitor having one electrode electrically connected to the node B may be provided separately.

[0370] Here, the timing of the shift register having a plurality of pulse output circuits shown in FIG. A shift register is a scanning line driver circuit. In this case, the period 61 in FIG. 15(B) corresponds to a vertical blanking period, and the period 62 corresponds to a gate selection period. do.

[0371] As shown in FIG. 15A, in the ninth transistor in which the second power supply potential VCC is applied to the gate electrode, By providing the transistor 39, the following can be achieved before and after the bootstrap operation: The advantages are as follows:

[0372] In the absence of the ninth transistor 39, the gate electrode of which is applied with the second power supply potential VCC, When the potential of the node A rises due to the base strap operation, the second transistor 31 The potential of the source terminal rises and becomes higher than the first power supply potential VDD. Then, the source of the first transistor 31 is switched to the first terminal side, that is, the power supply line 51 side. Therefore, in the first transistor 31, between the gate and the source, between the gate and the drain In both cases, a large bias voltage is applied, which places a large stress on the transistor. Therefore, the ninth power supply potential VCC is applied to the gate electrode. By providing the transistor 39, the voltage of the node A is increased by the bootstrap operation. The potential of the second terminal of the first transistor 31 is increased, but the potential of the second terminal of the first transistor 31 is not increased. That is, by providing the ninth transistor 39, It is possible to reduce the value of the negative bias voltage applied between the gate and source of the transistor 31. Therefore, by using the circuit configuration of this embodiment, the first transistor 31 The negative bias voltage applied between the gate and source can also be reduced, reducing the stress-induced Deterioration of the first transistor 31 can be suppressed.

[0373] The ninth transistor 39 is provided at a position corresponding to the second gate of the first transistor 31. A terminal is connected between the terminal and the gate of the third transistor 33 via a first terminal and a second terminal. In addition, in the present embodiment, a system having a plurality of pulse output circuits may be provided. In the case of a soft register, the signal line driver circuit has more stages than the scan line driver circuit. The resistor 39 may be omitted, which has the advantage of reducing the number of transistors.

[0374] Note that the semiconductor layers of the first to thirteenth transistors 31 to 43 are made of oxide semiconductor. By using a conductor, the off-current of the thin film transistor is reduced, and the on-current and Because it is possible to increase the field effect mobility and reduce the degree of degradation. In addition, a transistor including an oxide semiconductor can be Compared to transistors using amorphous silicon, a high potential is applied to the gate electrode. Therefore, the degree of deterioration of the transistor due to the second power supply potential VCC is small. The same operation can be obtained by supplying the first power supply potential VDD to the power supply line. Since the number of power lines to be routed can be reduced, the circuit can be made more compact.

[0375] The gate electrodes (lower gate electrode and upper gate electrode) of the seventh transistor 37 a clock signal provided by the third input terminal 23 to the gate of the eighth transistor 38; The input electrodes (lower gate electrode and upper gate electrode) are supplied with a second input terminal 22. The clock signal is applied to the gate electrode of the seventh transistor 37 (the lower gate electrode and the upper gate electrode). A clock signal is supplied to the gate electrode of the eighth transistor by the second input terminal 22. The third input terminal 23 is connected to the gate electrodes (lower gate electrode and upper gate electrode) of the gate electrode of the transistor 38. The same effect can be obtained by swapping the wiring so that the clock signal is supplied by In the shift register shown in FIG. The seventh transistor 37 is turned off and the eighth transistor 38 is turned on. The transistor 38 is on, then the seventh transistor 37 is off, and the eighth transistor By turning off the input terminal 38, the second input terminal 22 and the third input terminal 23 are The voltage drop at node B is generated by the gate of the seventh transistor 37. due to a drop in the potential of the gate electrode of the eighth transistor 38 and a drop in the potential of the gate electrode of the eighth transistor 39. On the other hand, in the shift register shown in FIG. The seventh transistor 37 and the eighth transistor 38 are both in an on state. 7 is on, the eighth transistor 38 is off, then the seventh transistor 37 is on. By turning off the eighth transistor 38, the second input terminal 22 and The drop in the potential of the node B caused by the drop in the potential of the third input terminal 23 is The number of times the potential of the gate electrode of the transistor 38 is decreased can be reduced to one time. The gate electrodes (lower gate electrode and upper gate electrode) of the seventh transistor 37 are connected to the third A clock signal CK3 is supplied from the input terminal 23, and the gate voltage of the eighth transistor 38 is A clock signal C is input from the second input terminal 22 to the electrodes (lower gate electrode and upper gate electrode). It is preferable to use a wiring relationship in which K2 is supplied. This is because the voltage fluctuation circuit of node B This is because the number of signals is reduced and noise can be reduced.

[0376] In this manner, the potentials of the first output terminal 26 and the second output terminal 27 are maintained at the L level. By configuring the node B to periodically receive a high-level signal during the period, the pulse output This makes it possible to suppress malfunction of the power circuit.

[0377] This embodiment mode can be implemented in appropriate combination with the configurations described in other embodiments. It is.

[0378] (Embodiment 10) The light emitting device disclosed in this specification can be applied to various electronic devices (including gaming machines). The electronic device can be, for example, a television device (a television or a television receiver). (also called "transmitting devices"), computer monitors, digital cameras, digital video cameras , digital photo frames, mobile phones (also called mobile phones or mobile phone devices), portable games Examples include gaming machines, mobile information terminals, audio playback devices, and large game machines such as pachinko machines. .

[0379] FIG. 23A shows an example of a mobile phone. The mobile phone 1100 has a housing 1101. In addition to the display unit 1102, the operation buttons 1103, the external connection port 1104, It is equipped with a speaker 1105, a microphone 1106, etc.

[0380] In the mobile phone 1100 shown in FIG. 23A, information is displayed by touching a display unit 1102 with a finger or the like. In addition, operations such as making a phone call or sending an e-mail can be performed by using the display. This can be done by touching 1102 with a finger or the like.

[0381] The screen of the display unit 1102 has three main modes. The first is a display mode that is mainly used for displaying images. The first mode is a display mode, the second is an input mode for inputting information such as characters, and the third mode is a display mode. This is a display + input mode that combines the display mode and the input mode.

[0382] For example, when making a call or composing an e-mail, the display unit 1102 is used to input characters. The main character input mode is to input characters displayed on the screen. It is preferable to display a keyboard or number buttons on most of the screen of the display unit 1102. I wish.

[0383] In addition, the mobile phone 1100 may include a sensor for detecting tilt, such as a gyro or an acceleration sensor. By providing a detection device having the above configuration, the orientation of the mobile phone 1100 (portrait or landscape) can be determined and the display The screen display of the display unit 1102 can be automatically switched.

[0384] The screen mode can be changed by touching the display unit 1102 or by operating the housing 1101. This is done by operating the button 1103. Also, depending on the type of image displayed on the display unit 1102, For example, the image signal to be displayed on the display unit is a moving image. If it is data, the mode is switched to display mode, and if it is text data, the mode is switched to input mode.

[0385] In the input mode, the optical sensor of the display unit 1102 detects a signal and displays If there is no input by touch operation of the unit 1102 for a certain period of time, the screen mode is changed to the input mode. Alternatively, the display mode may be switched from the normal mode to the display mode.

[0386] The display unit 1102 can also function as an image sensor. By touching the palm or fingers to the sensor 02, the palm print, fingerprint, etc. can be captured and identity authentication can be performed. In addition, the display unit may be equipped with a backlight that emits near-infrared light or a sensor that emits near-infrared light. By using a scanning light source, it is also possible to image finger veins, palm veins, etc.

[0387] The light-emitting device described in any of the embodiments 1 to 9 is used for the display portion 1102, so that the reliability can be improved. can be done.

[0388] Fig. 23(B) is an example of a portable information terminal. A mobile phone can have multiple functions. For example, in addition to the telephone function, it can also have a built-in computer. , and may also be equipped with various data processing functions.

[0389] The portable information terminal shown in FIG. 23B includes two housings, a housing 1800 and a housing 1801. The housing 1801 includes a display panel 1802, a speaker 1803, a microphone, and a microphone array. Phone 1804, pointing device 1806, camera lens 1807, external connection The housing 1800 includes a keyboard 1810 and an external memory slot. 1811. The antenna is built into the housing 1800 or 1801. It is being done.

[0390] The display panel 1802 is equipped with a touch panel, and in FIG. A plurality of operation keys 1805 are indicated by dotted lines.

[0391] In addition to the above configuration, a non-contact IC chip, a small recording device, etc. may be built in.

[0392] The light emitting device can be used in a display panel 1802, and the display direction can be appropriately adjusted according to the usage mode. In addition, a camera lens 1807 is provided on the same surface as the display panel 1802. A speaker 1803 and a microphone 1804 are used for audio. Not only voice calls, but also video calls, recording, playback, etc. are possible. The body 1801 slides and changes from the unfolded state to the overlapped state as shown in FIG. 23(B). The device can be made compact and portable.

[0393] The external connection terminal 1808 can be connected to various cables such as AC adapters and USB cables. It is possible to charge the battery and to communicate data with a personal computer, etc. By inserting a recording medium into the memory slot 1811, it is possible to store and transfer a larger amount of data. do.

[0394] In addition to the above functions, even if the device has infrared communication function, TV reception function, etc. good.

[0395] FIG. 24A shows an example of a television device. The television device 9600 includes: A display unit 9603 is incorporated in a housing 9601. The display unit 9603 displays images. In this embodiment, the housing 9601 is supported by a stand 9605. The configuration shown is as follows.

[0396] The television device 9600 can be operated using an operation switch on the housing 9601 or a separate remote control. This can be done by the remote control operation device 9610. The channel and volume can be controlled by the 9609, and the display 9603 shows In addition, the remote control unit 9610 can control the video. A display portion 9607 for displaying information output from 9610 may be provided.

[0397] The television device 9600 includes a receiver and a modem. It can receive more general television broadcasts, and can also be connected to a modem via wired or wireless connection. By connecting to a network, communication can be one-way (sender to receiver) or two-way. It is also possible to communicate information (between a sender and a receiver, or between receivers).

[0398] The display portion 9603 is made of a light-emitting device described in any of the embodiments 1 to 9, and therefore has high reliability. It is possible.

[0399] FIG. 24B shows an example of a digital photo frame 9700. The photo frame 9700 includes a display unit 9703 built into a housing 9701. The unit 9703 is capable of displaying various images, for example images captured by a digital camera. By displaying the image data, it can function like a normal photo frame.

[0400] The display portion 9703 is made of a light-emitting device described in any of the embodiments 1 to 9, and therefore has high reliability. It is possible.

[0401] The Digital Photo Frame 9700 is equipped with an operation unit, external connection terminals (USB terminal, US A terminal that can be connected to various cables such as B cable, etc., and a recording medium insertion section, etc. These components may be installed on the same surface as the display unit, but they may be installed on the side or back. It is preferable to have a digital photo frame with a built-in memory card because it improves the design. A memory that stores image data taken with a digital camera is inserted into the body insertion section. The captured image data can be displayed on the display portion 9703 .

[0402] The digital photo frame 9700 may also be configured to transmit and receive information wirelessly. It is also possible to wirelessly import and display desired image data.

[0403] FIG. 25 shows a portable gaming machine, which is composed of two cabinets, a cabinet 9881 and a cabinet 9891. The housing 9881 includes a display unit 988 and a connector 9893 for connecting the display unit 988 to the housing 9881 in an openable and closable manner. 2 is incorporated in the housing 9891, and a display unit 9883 is incorporated in the housing 9891.

[0404] The light-emitting device described in any of the embodiments 1 to 9 is used for the display portions 9882 and 9883. It can increase reliability.

[0405] In addition, the portable gaming machine shown in FIG. 25 also includes a speaker unit 9884, a recording medium insertion unit 9 886, LED lamp 9890, input means (operation key 9885, connection terminal 9887, sensor Sa9888 (force, displacement, position, velocity, acceleration, angular velocity, rotation speed, distance, light, liquid, magnetism, temperature degree, chemicals, sound, time, hardness, electric field, current, voltage, power, radiation, flow rate, humidity, gradient 9889) microphones, etc. Of course, the configuration of the portable gaming machine is not limited to the above, and at least It is sufficient that the device is equipped with the thin film transistor disclosed in the specification, and other auxiliary equipment is provided as appropriate. The portable game machine shown in FIG. The function of reading out the program or data stored in the device and displaying it on the display unit, as well as wireless communication with other portable gaming machines, The portable game machine shown in FIG. 25 has a function for communicating with the player and sharing information. The functions are not limited to these, and may have a variety of functions.

[0406] FIG. 26 shows a light emitting device formed by applying the above embodiment as an indoor lighting device 3001. The light-emitting device shown in the above embodiment can be made large in area. The light-emitting device shown in the above embodiment 2 can be used as a lighting device having a large area. It can also be used as a tabletop lighting fixture 3000. In addition to standard lighting fixtures and tabletop lighting fixtures, this also includes wall-mounted lighting fixtures, in-car lighting, and emergency exit lights. Can be enjoyed.

[0407] As described above, the light-emitting devices described in any of the first to ninth embodiments can be used in various electronic devices. The display panel can be provided with the light emitting diode, and highly reliable electronic equipment can be provided. [Explanation of symbols]

[0408] 10 Pulse output circuit 11 Wiring 12 Wiring 13 Wiring 14 Wiring 15 Wiring 21 Input terminal 22 Input terminal 23 Input terminal 24 Input terminals 25 Input terminal 26 Output terminal 27 Output terminal 31 Transistor 32 Transistor 33 Transistor 34 Transistor 35 Transistor 36 Transistor 37 Transistor 38 Transistor 39 Transistor 40 Transistor 41 Transistor 42 Transistor 43 Transistor 51 Power line 52 Power line 53 Power line 100 Substrates 101 Gate electrode layer 102 Gate insulating layer 103 Oxide semiconductor layer 106 Protective insulation layer 107 Oxide insulating film 108 Capacitive wiring layer 109 Protective insulation layer 110 Electrode layer 111 Conductive layer 112 Conductive layer 113 Terminal electrode 116 Channel formation region 118 Contact Hole 119 Contact Hole 120 Connection electrode 121 Terminal 122 Terminal 125 Contact Hole 126 Contact Hole 127 Contact Hole 128 Terminal electrode 129 Terminal electrode 130 Oxide Semiconductor Film 131 Oxide semiconductor layer 133 Oxide Semiconductor Layer 134 Oxide semiconductor layer 137 Resist Mask 138 Oxide Conductive Layer 140 Oxide Conductive Film 142 Oxide conductive layer 143 Oxide Conductive Layer 145 Wiring layer 146 capacity 147 capacity 149 Capacitive electrode layer 150 Terminals 151 Terminal 153 Connection electrode 155 Conductive Film 156 Electrode 161 Gate electrode layer 162 Conductive Layer 163 Oxide semiconductor layer 166 Channel Formation Region 168 Oxide semiconductor layer 170 Thin-film transistor 171 Thin-film transistor 172 Thin-film transistor 173 Thin-film transistor 180 Thin Film Transistor 181 Thin-film transistor 182 Thin-film transistor 183 Thin-film transistor 185 Capacitive electrode layer 191 Color filter layer 192 Overcoat layer 193 Bulkhead 194 EL layer 195 Electrode layer 196 Connection electrode layer 198 Oxide semiconductor layer 1001 Electrode 1002 Electrode 1003 EL layer 1004 Charge generating layer 104a Oxide conductive layer 104b Oxide conductive layer 105a Source electrode layer 105b Drain electrode layer 1100 Mobile Phone 1101 Case 1102 Display section 1103 Operation button 1104 External connection port 1105 Speaker 1106 Mike 117a High resistance source region 117b High-resistance drain region 135a Resist mask 136a Resist mask 164a Oxide conductive layer 164b Oxide conductive layer 165a Source electrode layer 165b Drain electrode layer 167a High resistance source region 167b High-resistance drain region 1800 Case 1801 Case 1802 Display Panel 1803 Speaker 1804 Microphone 1805 Operation key 1806 Pointing Device 1807 Camera Lenses 1808 External connection terminal 1810 Keyboard 1811 External memory slot 3000 Table Lamp 3001 Lighting equipment 4501 Board 4502 Pixel section 4505 Sealing material 4506 Board 4507 Filling material 4509 Thin-film transistor 4510 Thin-film transistor 4511 Light emitting element 4512 Electroluminescent layer 4513 Electrode layer 4515 Connection terminal electrode 4516 Terminal electrode 4517 Electrode layer 4519 Anisotropic conductive film 4520 Bulkhead 4540 Conductive layer 4542 Oxide insulating layer 4543 Overcoat layer 4544 Insulation layer 4545 Color filter layer 4546 Insulation layer 5300 Board 5301 Pixel unit 5302 Scanning line driver circuit 5303 Scanning line driver circuit 5304 Signal line driver circuit 5305 Timing Control Circuit 5601 Shift Register 5602 Switching Circuit 5603 Thin Film Transistor 5604 Wiring 5605 Wiring 6400 pixels 6401 Switching transistor 6402 Transistor 6403 Capacitor 6404 Light emitting element 6405 Signal Line 6406 scan lines 6407 Power line 6408 Common electrode 7001 TFT 7002 Light emitting element 7003 Electrode layer 7004 EL layer 7005 Electrode layer 7009 Bulkhead 7011 Driving TFT 7012 Light emitting element 7013 Electrode layer 7014 EL layer 7015 Electrode layer 7016 Shielding membrane 7017 Conductive film 7019 Bulkhead 7021 Driving TFT 7022 Light emitting element 7023 Electrode layer 7024 EL layer 7025 Electrode layer 7026 Electrode layer 7027 Conductive film 7029 Bulkhead 7031 Oxide insulating layer 7032 Protective insulation layer 7033 Color filter layer 7034 Overcoat layer 7035 Protective insulation layer 7041 Oxide insulating layer 7042 Protective insulation layer 7043 Color filter layer 7044 Overcoat layer 7045 Protective insulation layer 7051 Oxide insulating layer 7052 Protective insulation layer 7053 Planarizing insulating layer 7055 Protective insulation layer 9600 Television Equipment 9601 Case 9603 Display section 9605 Stand 9607 Display section 9609 Operation key 9610 Remote control device 9700 Digital Photo Frame 9701 Case 9703 Display section 9881 Case 9882 Display section 9883 Display section 9884 Speaker section 9885 Operation key 9886 Recording medium insertion section 9887 Connection terminal 9888 Sensor 9889 Microphone 9890 LED Lamp 9891 Case 4503a Signal line driver circuit 4504a Scanning line driver circuit

Claims

1. A driver circuit portion including a driver circuit transistor and a pixel portion including a pixel transistor are provided on the same substrate, the driver circuit transistor and the pixel transistor each include a gate electrode layer, a gate insulating layer on the gate electrode layer, an oxide semiconductor layer on the gate insulating layer, a source electrode layer and a drain electrode layer on the oxide semiconductor layer, and an oxide insulating layer on the oxide semiconductor layer and in contact with a part of the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; a color filter layer is provided on the oxide insulating layer in the pixel portion, and a first electrode layer, an EL layer, and a second electrode layer are provided on the color filter layer, the first electrode layer being electrically connected to the pixel transistor; the gate electrode layer, the source electrode layer, and the drain electrode layer are each a metal conductive film.

2. 2. The light-emitting device according to claim 1, wherein the conductive layer is a light-transmitting conductive film formed in the same process as the first electrode layer.

Images