Chip production method, chip supply system, chip bonding system, chip mounting substrate, and resin part forming method

Abstract

To provide a chip production method, a chip supply system, a chip bonding system, a chip mounting substrate, and a resin portion forming method that suppress adhesion of foreign matter to and damage to a bonding surface of a chip.SOLUTION: In a chip production method, a set of multiple chips is produced from a substrate on which multiple device regions and non-device regions surrounding each of the multiple device regions are formed in a plane perpendicular to the thickness direction. This chip production method includes a groove forming step of forming a first groove having a preset first width and shallower than the thickness of the substrate so as to surround the multiple device regions in the non-device region, and a dicing step of dicing the inside of the first groove after the groove forming step.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to a chip production method, a chip supply system, a chip bonding system, a chip mounting substrate, and a resin part forming method. Regarding. [Background technology]

[0002] A method has been proposed that includes a stage for holding a substrate and a bonding unit disposed above the stage, and that lowers the bonding unit while holding a chip on its head to bond the chip to the substrate (see, for example, Patent Document 1). Another method has been proposed in which plasma processing is performed on the bonding surfaces of two objects to be bonded, and then the bonding surfaces of the two objects are brought into contact with each other to bond them (see, for example, Patent Document 2). A method is being provided in which plasma processing is performed on the bonding surface of the chip to be bonded to the substrate, and then the bonding surface of the chip is brought into contact with the substrate to bond the chip to the substrate. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] JP 2012-238775 A [Patent Document 2] Special Publication No. 2003-523627 Summary of the Invention [Problem to be solved by the invention]

[0004] In the above-mentioned method, if foreign matter or scratches are present on the bonding surface of the chip when the chip is bonded to the substrate, poor bonding between the chip and the substrate occurs. Therefore, when a chip with a plasma-treated bonding surface is transported to the head of the bonding unit, it is required to suppress the adhesion of foreign matter to the bonding surface of the chip or damage to the bonding surface of the chip due to contact with a transport jig, for example.

[0005] The present invention has been made in consideration of the above-mentioned reasons, and aims to provide a chip production method, a chip supply system, a chip bonding system, a chip mounting substrate, and a resin part formation method that suppress the adhesion of foreign matter to the chip bonding surface and damage to the chip bonding surface. [Means for solving the problem]

[0006] In order to achieve the above object, the chip production method according to the present invention comprises: A chip production method for producing a set of a plurality of chips from a substrate having a plurality of device regions and non-device regions surrounding each of the plurality of device regions formed in a plane perpendicular to a thickness direction, comprising the steps of: a groove forming step of forming a first groove having a preset first width and shallower than a thickness of the substrate in the non-device region so as to surround the plurality of device regions; After the groove forming step, a dicing step of dicing the inside of the first groove is included.

[0007] In another aspect, the chip supply system according to the present invention comprises: a sheet holding section for holding a sheet formed of resin and having a surface side of each of a plurality of chips attached thereto, the surface side being opposite to the surface side in the thickness direction of each of the chips; a pick-up mechanism for picking out at least one of the plurality of chips; a chip transport device having a chip holding part for holding at least one of the cut chips and transporting the at least one chip; The chip has a device region formed in a central portion on the one surface side, and a step portion formed at an outer end portion of a non-device region surrounding the device region, The chip holding portion holds at least one of the chips in a state in which the chip holding portion abuts against the step portion of each of the at least one of the chips but does not abut against the device region. Effect of the Invention

[0008] According to the chip production method of the present invention, a set of chips can be produced, each having a bonding surface corresponding to a device region and a step portion formed to surround the bonding surface. Also, the chip supply system of the present invention holds the chips in a state where each chip abuts against the step portion and does not abut against the device region. Therefore, the chips can be held and transported in a state where each chip abuts against the step portion and does not abut against the bonding surface, and therefore, when the chips are transported, adhesion of foreign matter to or damage to the bonding surface of the chip due to contact with the bonding surface of the chip can be suppressed. [Brief description of the drawings]

[0009] [Figure 1] 1 is a schematic configuration diagram of a tip joining system according to an embodiment of the present invention. [Diagram 2] 5A and 5B are diagrams illustrating the operation of the dicing device according to the embodiment, in which (A) is a cross-sectional view showing a state after a groove forming step, and (B) is a plan view showing a state after the groove forming step. [Diagram 3] 5A and 5B are diagrams illustrating the operation of the dicing device according to the embodiment, in which (A) is a cross-sectional view showing the state after the dicing process, and (B) is a plan view showing the state after the dicing process. [Figure 4] 1 is a schematic configuration diagram of a sheet stretching device according to an embodiment; [Diagram 5] 1A is a diagram showing a state before a sheet is stretched by the sheet stretching device of the embodiment, and FIG. 1B is a diagram showing a state after the sheet is stretched by the sheet stretching device of the embodiment. [Figure 6] 1A is a diagram showing the state in which the third annular frame of the sheet stretching device of the embodiment is fitted, and FIG. 1B is a diagram showing the state in which the sheet of the sheet stretching device of the embodiment is cut from the annular frame. [Figure 7] FIG. 2A is a schematic diagram of a cleaning device according to an embodiment, and FIG. 2B is an explanatory diagram of the operation of the cleaning device according to the embodiment. [Figure 8] 1 is a schematic configuration diagram of a part of a chip joining system according to an embodiment, as viewed from the side; [Figure 9] 1 shows a portion of a chip supplying device 10 according to an embodiment, where (A) is a cross-sectional view showing the chip holding part positioned opposite a chip attached to a sheet, and (B) is a cross-sectional view showing the chip being held by the chip holding part. [Figure 10] 1A and 1B show a head of a bonding apparatus according to an embodiment, in which FIG. 1A is a cross-sectional view and FIG. [Figure 11] 1 is a schematic configuration diagram of an activation treatment apparatus according to an embodiment; [Figure 12] 5A and 5B are diagrams illustrating the operation of the activation processing device according to the embodiment; [Figure 13] 4 is a flowchart showing an example of a flow of a chip bonding method according to the embodiment. [Figure 14] 1A and 1B are schematic side and plan views showing how a particle beam is irradiated in an activation treatment apparatus according to an embodiment; [Figure 15] 1A is an explanatory diagram of the operation of a dicing device according to a modified example, and FIG. 1B is a cross-sectional view of a diced substrate after a dicing step according to the modified example. [Figure 16] 13A shows a process for a modified example, in which (A) is a diagram showing the activation of the bonding surface of the chip, (B) is a diagram showing the annular frame being fitted after the sheet has been stretched, (C) is a diagram showing the cleaning of the bonding surface of the chip, and (D) is a diagram showing the picking up of the chip. [Figure 17] 13 is a schematic cross-sectional view of a tip holding portion according to a modified example. FIG. [Figure 18] 11 is a schematic cross-sectional view of a chip and a substrate according to a modified example. [Figure 19] 1A is a schematic cross-sectional view of a chip according to a modified example, and FIG. 1B is a schematic cross-sectional view of a substrate according to a modified example. [Figure 20] 11 is a schematic cross-sectional view of a chip and a substrate according to a modified example. [Figure 21] FIG. 13 is a schematic perspective view of a chip and a substrate according to a modified example. [Figure 22]13 shows captured images relating to a modified example, where (A) is an image captured when the positions of the two chips and the substrate are misaligned, and (B) is an image captured when the positions of the two chips and the substrate are not misaligned. [Figure 23] 13A and 13B show a resin portion forming device according to a modified example, in which FIG. 13A shows a state after a resin applying step has been performed, and FIG. 13B shows a state after a resin filling step has been performed. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, a chip bonding system according to an embodiment of the present invention will be described with reference to the drawings. The chip bonding system according to the present embodiment is a system that dices a substrate to generate a chip, and then mounts the generated chip on the substrate. The chip is a semiconductor chip generated by dicing and separating a non-device region of a semiconductor substrate in which a plurality of device regions are formed in a lattice shape. The chip may be a chip in which only an insulating material is exposed on the bonding surface to be bonded to the substrate, or a chip in which an insulating material and a conductive material are exposed. Here, examples of the insulating material include oxides such as SiO2 and Al2O3, nitrides such as SiN and AlN, oxynitrides such as SiON, or resins. Examples of the conductive material include semiconductor materials such as Si and Ge, and metals such as Cu, Al, and solder. That is, the chip may be a chip in which a plurality of types of regions made of different materials are formed on the bonding surface. Specifically, the chip may be a chip in which an electrode and an insulating film are provided on the bonding surface, and the insulating film is formed of an oxide such as SiO2 and Al2O3 or a nitride such as SiN and AlN. This chip bonding system performs an activation process on the mounting surface of the substrate on which the chip is mounted and the bonding surface of the chip, and then bonds the chip to the substrate by contacting or applying pressure to it, and then, or at the same time, heat is applied to firmly bond the chip to the substrate.

[0011] 1, the chip bonding system 1 according to this embodiment includes a dicing device 86, a chip supplying device 10, a chip transporting device 39, a bonding device 30, an activation processing device 60, a transporting device 70, a carry-in / out unit 80, a cleaning device 85, and a control unit 90. Here, the chip supplying device 10 and the chip transporting device 39 constitute a chip supplying system that supplies chips to the bonding device 30.

[0012] The dicing device 86 performs dicing by a plasma dicing method in which a dicing substrate DW attached to one surface side in the thickness direction of a sheet TE made of resin is diced into a plurality of chips by dry etching under reduced pressure, as shown in FIG. 2(A). The dicing substrate has a plurality of device regions and non-device regions surrounding each of the plurality of device regions, for example, in a plane perpendicular to the thickness direction. Then, the dicing device 86 first performs a groove forming process in which grooves TR1 having a preset width W1 and a depth Th1 shallower than the thickness of the dicing substrate DW are formed in the non-device regions of the dicing substrate DW so as to surround the plurality of device regions, as shown in FIGS. 2(A) and (B). In the groove forming process, first, a mask material is applied to the regions of the dicing substrate DW other than the regions in which the grooves TR1 are to be formed. Here, the application of the mask material is performed by, for example, using a spin coating method. As the mask material, for example, a water-soluble liquid resin such as polyvinyl alcohol (PVA) can be adopted. Next, the mask material is removed from the area corresponding to the groove TR1 by irradiating the portion of the mask material corresponding to the groove TR1 with a laser beam. The dicing substrate DW is then exposed to oxygen plasma to remove unnecessary mask material remaining in the area to be diced by ashing. Thereafter, the dicing substrate DW is exposed to SF6 gas plasma to perform isotropic etching, thereby forming the groove TR1.

[0013] Then, after the groove forming step, the dicing device 86 performs a dicing step in which, as shown in FIGS. 3(A) and (B), dicing is performed so as to surround the device region inside the groove TR1, thereby forming a groove TR2 with a width W2 narrower than the width W1 of the groove TR1 inside the groove TR1. In this dicing step, first, a mask material is coated on the bonding surface CPf side of the dicing substrate DW after the groove forming step. Here, the coating of the mask material is performed by using, for example, a spin coating method. As the mask material, for example, a water-soluble liquid resin can be adopted. Next, the mask material is removed from the region to be diced by irradiating the mask material with a laser beam. Next, the dicing substrate DW is exposed to oxygen plasma to remove unnecessary mask material remaining in the region to be diced by ashing. Thereafter, the dicing substrate DW is exposed to SF6 gas plasma to perform isotropic etching, and a recess is formed in the region to be diced. Thereafter, the dicing substrate DW is exposed to C4F6 gas plasma to form a protective film on the inner wall of the recess. Next, the dicing substrate DW is exposed to plasma of SF6 gas to perform anisotropic etching on the bottom of the recess, and the protective film on the bottom of the recess is removed. Next, the dicing substrate DW is exposed to plasma of SF6 gas to perform isotropic etching, and the bottom of the recess that is not covered with the mask material and the protective film is dug in the depth direction. After that, the dicing substrate DW is diced by repeating the formation of a protective film by exposure to plasma of C4F6 gas, the anisotropic etching by exposure to plasma of SF6 gas, and the isotropic etching to dug the recess in the depth direction, and finally the groove TR2 is formed. The dicing substrate DW may be one on which a dicing line is formed for dicing using a dicing blade or dicing by other dicing methods. Then, in the groove forming step, the groove TR1 may be formed inside the dicing line. In this case, it is preferable that the dicing substrate DW with the dicing line that has been generally manufactured in the past can be adopted without changing the layout of the chip CP in the dicing substrate DW in order to perform the processing method according to the present embodiment in which the groove forming step and the dicing step are newly performed.

[0014] Returning to FIG. 1, the sheet stretching device 40 uses the force when stretching the sheet TE to make the chips CP spaced apart from each other. As shown in FIG. 4, the sheet stretching device 40 has frame holding parts 4191 and 4192 for holding the annular frame RI1 that holds the sheet TE, and a frame support part 4411. The outer dimension of the annular frame RI2 is smaller than the inner dimension of the annular frame RI1. The sheet stretching device 40 also has a frame support part driving part 414 for moving the frame support part 4411 in the direction indicated by the arrow AR30, and a cutting mechanism 413 for cutting the sheet TE from the annular frame RI1. The frame support part driving part 414 moves the annular frame RI2 to the opposite side to the frame support part 4411 side of the annular frame RI1 while abutting the annular frame RI2 on the opposite side of the sheet TE to the side to which the chips CP are attached, thereby stretching the sheet TE radially from the center of the annular frame RI1, making the chips CP spaced apart from each other.

[0015] In the sheet stretching device 40, first, as shown in FIG. 5(A), the frame holding parts 4191 and 4192 hold the annular frame RI1. At this time, the annular frame RI2 abuts against the side of the sheet TE opposite to the side to which the multiple chips CP are attached. Next, the frame support part driving part 414 moves the frame support part 4411 supporting the annular frame RI2 vertically upward as shown by the arrow AR31 in FIG. 5(A), and places the annular frame RI2 at a position higher than the annular frame RI1 by a preset height. At this time, the sheet TE is stretched radially, and the multiple chips CP are spaced apart from each other as shown in FIG. 5(B). Next, in the stretched state of the sheet TE, as shown by the arrow AR32, the annular frame RI3 for fixing the sheet TE to the annular frame RI2 is fitted to the outside of the annular frame RI2 from above the annular frame RI2, resulting in the state shown in FIG. 6(A). Here, the inner dimension of the annular frame RI3 is the same as the outer dimension of the annular frame RI2. Thereafter, as shown by an arrow AR33 in Fig. 6(B), the cutting mechanism 413 cuts off the sheet TE from the annular frame RI1. The sheet stretching device 40 may not have the cutting mechanism 413. In this case, for example, an operator may cut off the sheet TE from the annular frame RI1 using a cutter. The sheet stretching device 40 may be configured to move the annular frame RI2 to a position relatively higher than the annular frame RI1, and may, for example, move the frame holding parts 4191, 4192 toward the -Z direction side of the frame support part 4411.

[0016] 1, the transport device 70 has a transport robot 71 having an arm that grips a holding frame 112 that holds the substrate WT or the sheet TE to which the chips CP are attached. Here, the sheet TE is made of, for example, resin. As shown by the arrow AR11, the transport robot 71 is capable of moving the holding frame 112 that holds the substrate WT or the sheet TE to which the chips CP are attached, received from the carry-in / out unit 80, to positions where the holding frame 112 is transferred to each of the activation processing device 60, the cleaning device 85, the bonding device 30, and the chip supply device 10.

[0017] When the transport robot 71 receives the substrate WT from the carry-in / out unit 80, it moves to a position where it will be transferred to the activation processing device 60 while holding the received substrate WT, and transfers the substrate WT to the activation processing device 60. Furthermore, after the activation processing of the mounting surface WTf of the substrate WT is completed in the activation processing device 60, the transport robot 71 receives the substrate WT from the activation processing device 60, and transfers the received substrate WT to the cleaning device 85. Furthermore, after the cleaning device 85 completes the water cleaning of the substrate WT, the transport robot 71 receives the substrate WT from the cleaning device 85, and inverts the substrate WT while holding the received substrate WT, and then moves to a position where it will be transferred to the bonding device 30. Then, the transport robot 71 transfers the substrate WT to the bonding device 30.

[0018] Furthermore, when the transport robot 71 receives from the carry-in / out unit 80 the holding frame 112 holding the sheet TE on which a plurality of chips CP generated by dicing the dicing substrate DW in the dicing device 86 are attached, the transport robot 71 moves the holding frame 112 while gripping it to a position for transferring the holding frame 112 to the activation processing device 60, and transfers the holding frame 112 to the activation processing device 60. Furthermore, after the activation processing of the bonding surface of the chips CP attached to the sheet TE in the activation processing device 60 is completed, the transport robot 71 receives the holding frame 112 from the activation processing device 60 and transfers the received holding frame 112 to the chip supply device 10. Furthermore, for example, a HEPA (High Efficiency Particulate Air) filter (not shown) is installed in the transport device 70. As a result, the inside of the transport device 70 is an atmospheric pressure environment with extremely few particles.

[0019] The cleaning device 85 has a stage 852 that supports the substrate WT, a stage drive unit 853 that rotates and drives the stage 852, a cleaning head 851 that is disposed vertically above the stage 852 and ejects water vertically downward, and a cleaning head drive unit 854 that moves the cleaning head 851 in the horizontal direction. Here, the stage 852 is a sheet holding unit that has an adsorption unit that adsorbs the sheet TE and adsorbs and holds the sheet TE that has a plurality of chips CP attached thereto and is held by the annular frames RI2 and RI3. The stage 852 may hold the annular frames RI2 and RI3 together with the sheet TE. The cleaning head drive unit 854 has a mechanism that moves the cleaning head 851 in the X-axis direction and the Y-axis direction. 7(A), the cleaning device 85 rotates the stage 852 in the direction indicated by the arrow AR81 by the stage drive unit 853 while supporting the sheet TE on which the chips CP are attached, and moves the cleaning head 851 in the horizontal direction, i.e., in the X-axis direction or the Y-axis direction, as indicated by the arrows AR821 and AR822 while discharging water from the cleaning head 851 toward the substrate WT as indicated by the dashed arrow, thereby cleaning the chips CP with water. Here, the cleaning device 85 first, with the stage 852 fixed, moves the cleaning head 851 in the horizontal direction, i.e., in the X-axis direction or the Y-axis direction along the grooves TR1 and TR2 formed by the groove forming process and the dicing process of the chips CP attached to the stretched sheet TE, as indicated by the arrows AR83 and AR84 in FIG. 7(B), thereby discharging water to clean the insides of the grooves TR1 and TR2. Next, the cleaning device 85 rotates the stage 852 in the direction indicated by the arrow AR81, while discharging water from the cleaning head 851 toward the substrate WT, and moves the cleaning head 851 back and forth along the radial direction of the substrate WT as indicated by the arrow AR82, thereby cleaning the entirety of the multiple chips CP with water. Note that the cleaning head 851 may perform cleaning while moving along one axial direction, for example, the Y-axis direction, with the stage 852 fixed, and then rotate the stage 852 by 90 degrees and perform cleaning again while moving along the Y-axis direction.In this case, the cleaning head driving unit 854 may be configured to move the cleaning head 851 along the Y-axis direction, and also to move it in a direction rotating about one fulcrum.

[0020] The chip supply device 10 cuts out one chip CP from among the multiple chips CP attached to the sheet TE, and supplies the chip CP to the bonding device 30. The chip supply device 10 has a chip supply unit 11, as shown in FIG. 8. The chip supply unit 11 has a frame support unit 112, a pickup mechanism 111 for picking up one chip CP from among the multiple chips CP, and a suction holding unit 114. Here, the frame support unit 112 supports annular frames RI2 and RI3 that hold the sheet TE to which the multiple chips CP are attached. The frame support unit 112 may support only the annular frame RI2, or may support only the annular frame RI3. The chip supply unit 11 also has a frame drive unit 113 that drives the annular frames RI2 and RI3 in the XY direction or in a direction rotating around the Z axis. The frame support unit 112 holds the annular frames RI2 and RI3 in a position in which the surface of the sheet TE to which the multiple chips CP are attached faces vertically upward (+Z direction).

[0021] The pickup mechanism 111 cuts out at least one chip from among the multiple chips CP. Specifically, the pickup mechanism 111 pushes out a protrusion target portion of the sheet TE to which the one chip CP to be protruded is attached from the opposite side of the sheet TE to the multiple chips CP side, thereby protruding the one chip CP. The pickup mechanism 111 has a pin 111a and is movable in the vertical direction as shown by an arrow AR24 in FIG. 4. There are, for example, four pins 111a. However, the number of pins 111a may be three, or five or more. The suction holding unit 114 suctions and holds the outer periphery of the protrusion target portion of the sheet TE protruded by the tip of the pin 111a. The suction holding unit 114 has a through hole 114a through which the pin 111a is inserted, and a suction unit 114b that suctions the sheet TE, as shown in FIG. 5(A), for example.

[0022] As shown in FIG. 5(A), the pickup mechanism 111 inserts the tip of the pin 111a into the through hole 114a of the suction holding part 114 and abuts the tip of the pin 111a vertically downward (-Z direction) on the sheet TE, and then moves the pin 111a vertically upward (+Z direction) as shown in FIG. 5(B) to lift the sheet TE in the +Z direction, thereby protruding the chip CP in the +Z direction. Then, each chip CP attached to the sheet TE is protruded in the +Z direction one by one and delivered to the chip conveying device 39. After that, when the pickup mechanism 111 moves the pin 111a vertically downward, the sheet TE is peeled off from the -Z direction side of the chip CP. The holding frame driving part 113 drives the holding frame 112 in the XY direction or in a direction rotating around the Z axis, thereby changing the position of the chip CP located vertically above the pin 111a.

[0023] The chip transport device 39 transports the chip CP supplied from the chip supply unit 11 to a transfer position Pos1 where the chip CP is transferred to the head 33H of the bonding unit 33 of the bonding device 30. As shown in FIG. 1, the chip transport device 39 has a long plate 391, a chip holder 393 provided at the tip of the plate 391, and a plate drive unit 392 that rotates the plates 391 in unison and moves the plate 391 in the vertical direction. The plate 391 is in the shape of a long plate, and one end of the plate 391 rotates around the other end located between the chip supply unit 11 and the head 33H. The number of plates 391 may be more than one. As shown in FIG. 9A, the chip holding part 393 has a recess 393b formed in a part that holds the chip CP, and a suction part 393a that is provided at the bottom of the recess 393b and suctions the chip CP, and holds the chip CP in a state where it abuts against a step part CPf of the chip CP but does not abut against a device region (bonding surface CPf). Here, the "step part CPs" also includes a so-called corner part of the chip CP. Here, a distance De1 from the outer periphery of the recess 393b in the chip holding part 393 to the end of the suction part 393a in the depth direction of the recess 393b is set to be longer than the depth Th1 of the groove TR1 of the chip CP. This prevents the bonding surface CPf from contacting the suction part 393a when the chip CP is held by the chip holding part 393. When receiving the chip CP, the chip holding part 393 is disposed at a position facing the chip CP that is protruded in the +Z direction by the pickup mechanism 111. 9B, the chip CP is sucked and held in a state where the outer periphery of the recess 393b of the chip holding part 393 abuts against the step CPs of the chip CP protruded in the +Z direction by the pickup mechanism 111. Also, as shown in FIG. 1, the pickup mechanism 111 and the head 33H are disposed at positions overlapping with a path OB1 drawn by the tip of the chip holding part 393 when the plate 391 rotates in the Z axis direction. When the chip transport device 39 receives the chip CP from the pickup mechanism 111, the chip transport device 39 transports the chip CP to a transfer position Pos1 where the chip CP overlaps with the head 33H by rotating the plate 391 about the axis AX as shown by the arrow AR1 in FIG.Then, the chip transport device 39 places the chip CP at the transfer position Pos1, moves the plate 391 in the -Z direction, and brings the chip CP into contact with the tip of the head 33H, and then releases the hold on the chip CP, thereby transferring the chip CP from the chip holding portion 393 to the head 33H.

[0024] The bonding device 30 is a chip bonding device having a stage unit 31, a bonding section 33 having a head 33H, and a head driving section 36 for driving the head 33H. The head 33H has a chip tool 411 and a head main body section 413, for example, as shown in FIG. 10(A). The chip tool 411 is formed of, for example, silicon (Si). The head main body section 413 has a holding mechanism 440 having an adsorption section for adsorbing and holding the chip CP to the chip tool 411, a holding mechanism 440 having an adsorption section for adsorbing and holding the chip CP to the chip tool 411, and a pressing mechanism 431 for pressing the center of the chip CP. The pressing mechanism 431 is vertically movable at the center of the tip surface of the head main body section 413, and has a pressing section 431a for pressing the center of the chip CP vertically upward, and a pressing driving section 431b for driving the pressing section 431a. The head body 413 also includes a ceramic heater, a coil heater, and the like. The head body 413 also includes an adsorption section (not shown) for fixing the chip tool 411 to the head body 413 by vacuum adsorption. The chip tool 411 includes a through hole 411a formed at a position corresponding to the holding mechanism 440 of the head body 413, and a through hole 411b into which the pressing section 431a is inserted. When the pressing drive section 431b moves the pressing section 431a vertically upward with the peripheral section of the chip CP held by the chip tool 411, the central section of the chip CP is pressed vertically upward (in the +Z direction), and the central section of the chip CP is bent vertically upward compared to the peripheral section. This allows the air present between the chip CP and the substrate WT to be pushed out toward the peripheral edge of the chip CP, and prevents voids from being generated between the chip CP and the substrate WT when the chip CP and the substrate WT are bonded to each other. The holding mechanism 440 holds the periphery of the tip CP via the through hole 411a of the tip tool 411. The holding mechanism 440 suction-holds the tip CP in a state in which the tip CP is placed on the tip of the head 33.

[0025] The head driving unit 36 ​​moves the head 33H holding the chip CP transferred at the transfer position Pos1 (see FIG. 4) vertically upward (+Z direction) to bring the head 33H closer to the stage 315 and mount the chip CP on the mounting surface WTf of the substrate WT. More specifically, the head driving unit 36 ​​moves the head 33H holding the chip CP vertically upward (+Z direction) to bring the head 33H closer to the stage 315 and bring the chip CP into contact with the mounting surface WTf of the substrate WT to bond it to the substrate WT. Here, the mounting surface WTf of the substrate WT and the bonding surface CPf of the chip CP to be bonded to the substrate WT have been activated by the activation processing device 60. In addition, the mounting surface WTf of the substrate WT has been subjected to the activation processing and then cleaned with water by the cleaning device 85. Therefore, by bringing the bonding surface CPf of the chip CP into contact with the mounting surface WTf of the substrate WT, the chip CP is so-called hydrophilically bonded to the substrate WT via hydroxyl groups (OH groups).

[0026] The stage unit 31 has a stage 315 that holds the substrate WT in an orientation in which the mounting surface WTf of the substrate WT on which the chips CP are mounted faces vertically downward (-Z direction), and a stage driving section 320 that drives the stage 315. The stage 315 can move in the X direction, Y direction and rotation direction. This makes it possible to change the relative positional relationship between the bonding section 33 and the stage 315, and to adjust the mounting positions of the chips CP on the substrate WT.

[0027] The activation processing device 60 performs an activation process for activating the mounting surface WTf of the substrate WT or the bonding surface CPf of the chip CP. The activation processing device 60 sets the holding frames 112 that hold the substrate WT or the sheet TE to which the chip CP is attached on one processing surface without facing each other, and performs the activation process. As shown in FIG. 7, the activation processing device 60 has a chamber 64, a support unit 62 that supports the holding frame 112, a particle beam source 61, and a beam source transport unit 63. The chamber 64 is connected to a vacuum pump 652 via an exhaust pipe 651. When the vacuum pump 652 is operated, the gas in the chamber 64 is exhausted to the outside of the chamber 64 through the exhaust pipe 651, and the air pressure in the chamber 64 is reduced (depressurized).

[0028] The support unit 62 has a frame-shaped frame holding unit 621 that holds the holding frame 112 on the inside, and a cover 622. When the substrate WT is inserted, the support unit 62 supports the substrate WT with the frame holding unit 621 holding the periphery of the substrate WT. The support unit 62 supports the holding frame 112 that holds the sheet TE to which the chips CP are attached, in a state where the holding frame 112 is set on one processing surface without being arranged opposite to the holding frame 112. The cover 622 is made of, for example, glass, and covers the holding frame 112 and an area outside the part to which the chips CP are attached on the one surface side of the sheet TE to which the chips CP are attached, in a state where the holding frame 112 that holds the sheet TE to which the chips CP are attached is held by the frame holding unit 621. Here, in the case where the multiple chips CP are obtained by dicing a substrate (not shown) that is circular in plan view, the multiple chips CP are attached to the circular area of ​​the sheet TE in plan view. In this case, the cover 622 is shaped to cover the area outside the circular area in plan view on the sheet TE on which the chips CP are attached, thereby preventing the particle beam source 61 from irradiating the area on the sheet TE other than the area on which the chips CP are attached.

[0029] The particle beam source 61 is, for example, a fast atom beam (FAB) source, and includes a discharge chamber 612, an electrode 611 disposed in the discharge chamber 612, a beam source driver 613, and a gas supplier 614 for supplying nitrogen gas into the discharge chamber 612. A FAB emission port 612a for emitting neutral atoms is provided on the peripheral wall of the discharge chamber 612. The discharge chamber 612 is made of a carbon material. Here, the discharge chamber 612 is in the shape of a long box, and a plurality of FAB emission ports 612a are arranged in a straight line along the longitudinal direction. The beam source driver 613 includes a plasma generator (not shown) for generating plasma of nitrogen gas in the discharge chamber 612, and a DC power supply (not shown) for applying a DC voltage between the electrode 611 and the peripheral wall of the discharge chamber 612. The beam source driver 613 applies a DC voltage between the peripheral wall of the discharge chamber 612 and the electrode 611 while generating plasma of nitrogen gas in the discharge chamber 612. At this time, nitrogen ions in the plasma are attracted to the peripheral wall of the discharge chamber 612. At this time, the nitrogen ions moving toward the FAB emission port 612a receive electrons from the peripheral wall of the discharge chamber 612, which is made of a carbon material and is located on the outer periphery of the FAB emission port 612a, when passing through the FAB emission port 612a. Then, these nitrogen ions become electrically neutralized nitrogen atoms and are released outside the discharge chamber 612. However, some of the nitrogen ions cannot receive electrons from the peripheral wall of the discharge chamber 612 and are released outside the discharge chamber 612 as nitrogen ions.

[0030] Here, the particle beam source 61 is set so that the incident angle of the particle beam with respect to a virtual plane S1 including at least one of the bonding surfaces CPf of at least one chip CP attached to the sheet TE is 30 degrees or more and 80 degrees or less. That is, the angle (incident angle) θ1 between the irradiation axis J1 of the particle beam and the normal direction N1 of the virtual plane S1 is set so as to be 30 degrees or more and 80 degrees or less. In addition, as shown in FIG. 8, the incident angle θ1 of the particle beam is set so that the relational expression of the following formula (1) is established, where the interval between adjacent chips CP is L1 and the thickness of the chip CP is T1.

[0031]

number

[0032] This prevents the particle beam from being directly irradiated onto the sheet TE, which in turn prevents impurities from being generated from the sheet TE due to the particle beam being irradiated onto the sheet TE, thereby providing an advantage in that damage to the bonding surface CPf of the chip CP caused by impurities generated from the sheet TE is prevented.

[0033] The beam source transport unit 63 has a long support rod 631 that is inserted into a hole 64a provided in the chamber 64 and supports the particle beam source 61 at one end, a support 632 that supports the support rod 631 at the other end of the support rod 631, and a support drive unit 633 that drives the support 632. The beam source transport unit 63 also has a bellows 634 that is interposed between the outer periphery of the hole 64a of the chamber 64 and the support 632 to maintain the vacuum level in the chamber 64. The support drive unit 633 drives the support 632 in a direction in which the support rod 631 is inserted into and removed from the chamber 64 as shown by an arrow AR31 in FIG. 7, thereby changing the position of the particle beam source 61 in the chamber 64 as shown by an arrow AR32 in FIG. Here, the beam source transport unit 63 moves the particle beam source 61 in a direction perpendicular to the arrangement direction of the multiple FAB emission ports 612a.

[0034] Incidentally, the particle beam source 61 has a plurality of FAB emission ports 612a arranged in a line as described above. The particle beam source 61 is moved in a direction perpendicular to the arrangement direction of the plurality of FAB emission ports 612a. As a result, the shape of the area irradiated with the particle beam becomes rectangular. On the other hand, when the plurality of chips CP are obtained by dicing a substrate (not shown) having a circular shape in plan view, they are attached to a circular area in plan view on the sheet TE. Therefore, when the particle beam is to be irradiated to the entirety of the plurality of chips CP attached to the sheet TE, it is necessary to set the area irradiated with the particle beam to a rectangular area including the circular area in plan view to which the plurality of chips CP are attached. In this case, in a configuration without the above-mentioned cover 622, the particle beam is irradiated to the area outside the plurality of chips CP on the sheet TE or the holding frame 112, which makes it easy for impurities to be generated from the sheet TE. On the other hand, in this embodiment, the cover 622 covers the area outside the plurality of chips CP on the sheet TE or the holding frame 112. This blocks the particle beam irradiated to the area outside the plurality of chips CP on the sheet TE or the holding frame 112, and the generation of impurities from the sheet TE or the holding frame 112 is suppressed.

[0035] Returning to Figure 1, the control unit 90 controls the head driving unit 36, the stage driving unit 320, the plate driving unit 392, the pickup mechanism 111, the holding frame driving unit 113, the cleaning head 851, the stage driving unit 853, the beam source driving unit 613, the beam source transport unit 63 and the transport robot 71 by outputting control signals to each of them.

[0036] Next, the operation of the chip bonding system 1 according to the present embodiment will be described with reference to FIGS. 9 and 10. First, the chip bonding system 1 executes a substrate mounting surface activation process in which the substrate WT loaded from the loading / unloading unit 80 is loaded into the activation processing device 60, thereby performing activation processing on the mounting surface WTf of the substrate WT (step S11). Here, the activation processing device 60 first irradiates the mounting surface WTf of the substrate WT with a particle beam containing nitrogen atoms from the particle beam source 61 in a state in which the mounting surface WTf of the substrate WT is supported by the support part 62 in a vertically downward orientation. At this time, the power supplied to the particle beam source 61 is set to, for example, 1 kV and 100 mA. In addition, the flow rate of the nitrogen gas introduced into the discharge chamber 612 of the particle beam source 61 is set to, for example, 100 sccm. Then, while the particle beam source 61 irradiates the mounting surface WTf of the substrate WT with a particle beam, the particle beam source 61 is caused to make one round trip at a speed of 1.2 to 14.0 mm / sec. For example, when metal electrodes and insulating films are provided on both the mounting surface WTf of the substrate WT and the bonding surface CPf of the chip CP, it is preferable to irradiate the mounting surface WTf of the substrate WT with a particle beam.

[0037] Next, the chip bonding system 1 puts the substrate WT that has been subjected to the activation process from the activation processing device 60 into the cleaning device 85, and executes a water cleaning process for cleaning the mounting surface WTf of the substrate WT with water (step S12). Here, the cleaning device 85 rotates the stage 852 supported by the stage 852 by the stage driving unit 853, and discharges water from the cleaning head 851 toward the substrate WT to clean the substrate WT with water. As a result, a relatively large number of hydroxyl groups (OH groups) or water molecules are attached to the mounting surface WTf of the substrate WT. Next, the chip bonding system 1 transports the cleaned substrate WT to the bonding device 30 (step S13). At this time, the bonding device 30 holds the received substrate WT on the stage 315. Specifically, at this time, the transport robot 71 receives the substrate WT from the cleaning device 85 in an orientation in which the mounting surface WTf faces vertically upward. Thereafter, the transfer robot 71 inverts the received substrate WT and holds the substrate WT in a position in which its mounting surface WTf faces vertically downward. Then, the transfer robot 71 transfers the substrate WT to the stage 315 of the bonding apparatus 30 while keeping the mounting surface WTf facing vertically downward.

[0038] In parallel with the above-mentioned processing, the dicing device 20 executes a dicing process in which the dicing substrate DW attached to the sheet TE is diced to generate a plurality of chips CP attached to the sheet TE while being spaced apart from each other (step S21).

[0039] Next, when the annular frame RI1 holding the sheet TE to which the chip bonding surface activation process has been applied is input into the sheet extension device 40, an extension process is executed in which the sheet TE is extended to separate the chips CP from one another (step S23). In addition, in this extension process, the sheet TE is radially extended from the center of the annular frame RI to separate the chips CP from one another, and the annular frame RI3 is fitted to the outside of the annular frame RI2. As a result, the sheet TE to which the chips CP have been applied in a state of being separated from one another is held by the annular frames RI2 and RI3. In addition, after the extension process is performed, the sheet TE is cut from the annular frame RI1. Then, the annular frames RI2 and RI3 holding the sheet TE are input into the carry-in / out unit 80.

[0040] Next, the chip bonding system 1 puts the annular frame RI1, which is put in from the carry-in / out unit 80, into the activation processing device 60. After that, the activation processing device 60 executes a chip bonding surface activation step for activating the bonding surfaces CPf of the chips CP attached to the sheet TE (step S22). Here, the activation processing device 60 first makes the support unit 62 support the holding frame 112 in a position in which the one surface side of the sheet TE on which the chips CP are attached faces the particle beam source 61 side, that is, in a position facing vertically downward. Then, the activation processing device 60 executes a first activation step for irradiating a particle beam from the particle beam source 61 toward the bonding surfaces CPf of the chips CP attached to the sheet TE. Here, the activation processing device 60 prepares only one holding frame 112 for holding the sheet TE on which the chips CP are attached, and irradiates the particle beam to the chips CP attached to the sheet TE held by the prepared holding frame 112. 14(A) and (B), the activation processing device 60 moves the particle beam source 61 in the X-axis direction while irradiating the bonding surface CPf of the chip CP with a particle beam as shown by an arrow AR35. Here, the activation processing device 60 irradiates the bonding surface CPf of the chip CP with a particle beam while moving the particle beam source 61 in the +X direction, for example, and then irradiates the bonding surface CPf of the chip CP with a particle beam while moving the particle beam source 61 in the -X direction. The moving speed of the particle beam source 61 is set to, for example, 1.2 to 14.0 mm / sec. Furthermore, the angle (incident angle) θ1 between the irradiation axis J1 of the particle beam and the normal direction N1 of the virtual plane S1 shown in FIG. 14(A) is set to be 30 degrees or more and 80 degrees or less. The power supplied to the particle beam source 61 is set to, for example, 1 kV and 100 mA. The flow rate of the nitrogen gas introduced into the discharge chamber 612 of the particle beam source 61 is set to, for example, 100 sccm. At this time, the impurities CPA1 generated from the chip CP or the sheet TE are blown away from the chip CP and do not return to the bonding surface CPf side of the chip CP.

[0041] Next, the chip bonding system 1 puts the annular frames RI2, RI3 holding the sheet TE into the cleaning device 85, and executes a water washing step of washing the bonding surfaces CPf of each of the plurality of chips CP with water (step S24).

[0042] Thereafter, the chip bonding system 1 transports the annular frames RI2, RI3 holding the sheet TE after the water cleaning process from the cleaning device 85 to the chip supplying device 10 (step S25). At this time, the transport robot 71 receives the annular frames RI2, RI3 holding the sheet TE from the cleaning device 85 in a position in which the bonding surfaces CPf of the chips CP face vertically upward. Then, the transport robot 71 transfers the received annular frames RI2, RI3 as they are to the chip supplying section 11 of the chip supplying device 10. Then, in the chip supplying section 11, the transferred annular frames RI2, RI3 are supported by the frame support section 112.

[0043] Next, the chip bonding system 1 executes a chip bonding process in which the chip CP, whose bonding surface CPf has been activated by the activation processing device 60, is brought into contact with the mounting surface WTf of the substrate WT to bond the chip CP to the substrate WT (step S31). Here, the chip bonding system 1 first places one plate 391 of the chip transport device 39 at a position where its chip holding part 393 faces the pin 111a of the pickup mechanism 111, as shown in FIG. 9(A). Next, as shown in FIG. 9(B), the pickup mechanism 111 moves the pin 111a vertically upward to make a portion of the sheet TE corresponding to one chip CP protrude in the +Z direction. At this time, the step part CPs of the protruding chip CP comes into contact with the outer periphery of the recess 393b of the chip holding part 393. Then, the chip CP is transferred to the chip holding part 393 by the suction part 393a of the chip holding part 393 suction-holding the chip CP.

[0044] Next, the chip bonding system 1 rotates the plate 391, and the chip holding part 393 provided at the tip of the plate 391 is placed at the transfer position Pos1 vertically above the head 33H of the bonding part 33. That is, the chip transport device 39 transports the chip CP received from the chip supply part 11 to the transfer position Pos1 where the chip CP is transferred to the head 33H. Here, the chip transport device 39 moves the plate 391 vertically downward at the transfer position Pos1 to bring the chip holding part 393 close to the head 33H and bring the chip CP into contact with the head 33H. Then, the chip transport device 39 releases the suction holding of the chip holding part 393 to make the chip CP detachable from the chip holding part 393. At this time, the holding mechanism 440 suction-holds the chip CP, and the chip CP is held at the tip of the head 33H.

[0045] Thereafter, the chip bonding system 1 performs alignment to correct the relative positional deviation between the chip CP and the substrate WT by driving the stage 315 and rotating the bonding unit 33. Then, the chip bonding system 1 raises the head 33H to bond the chip CP to the substrate WT. Here, the mounting surface WTf of the substrate WT and the bonding surface CPf of the chip CP are hydrophilically bonded via hydroxyl groups (OH groups).

[0046] After the series of steps described above is completed, the substrate WT on which the chip CP is mounted is removed from the chip bonding system 1, and then placed in a heat treatment device (not shown) for heat treatment. The heat treatment device performs heat treatment on the substrate WT under conditions of, for example, a temperature of 350° C. and one hour.

[0047] As described above, according to the chip bonding system 1 of the present embodiment, a set of a plurality of chips CP can be generated, each of which has one surface in the thickness direction attached to the sheet TE and has a bonding surface CPf corresponding to the device region and a step portion CPs formed so as to surround the bonding surface CPf on the other surface. Therefore, the chips CP can be held and transported in a state in which the chips CP abut against the step portion CPs of each chip CP but do not abut against the bonding surface CPf, and therefore, when the chips CP are transported, attachment of foreign matter to or damage to the bonding surface CPf of the chip CP due to contact with the bonding surface CPf of the chip CP can be suppressed.

[0048] However, when the chip holding part comes into contact with the bonding surface CPf of the chip CP or the corners of the chip CP, particles or burrs are generated, and there is a risk of voids being generated at the interface between the chip CP and the substrate WT when the chip CP is bonded to the substrate WT. In addition, when the chip holding part comes into contact with the bonding surface CPf of the chip CP that has been activated, the condition of the bonding surface CPf may deteriorate, and there is a risk of poor bonding between the chip CP and the substrate WT. For example, in a method of bonding the chip CP to the substrate WT by melting the solder provided on the chip CP, particles attached to the bonding surface CPf of the chip CP are taken into the solder, so that the bonding condition between the chip CP and the substrate WT is not significantly affected. However, in a method of bonding the chip CP to the substrate WT after performing activation processing on the bonding surface CPf of the chip CP, the bonding between the bonding surface CPf and the mounting surface WTf is performed in a solid state, so that particles attached to the bonding surface CPf of the chip CP or burrs generated at the corners of the chip CP may significantly affect the bonding condition between the chip CP and the substrate WT. In contrast, according to the present embodiment, a step is provided on the peripheral portion of the bonding surface CPf side of the chip CP, so that the chip CP can be transported without touching the bonding surface CPf of the chip CP. This suppresses the generation of particles or burrs on the bonding surface CPf and corner portions of the chip CP and also enables the bonding surface CPf to be maintained in good condition, thereby suppressing the occurrence of poor bonding between the chip CP and the substrate WT.

[0049] In addition, in the chip bonding system 1 according to the present embodiment, the chip CP to be bonded to the substrate WT may be a chip CP having a bonding surface CPf on which a plurality of regions made of different materials are formed. In this case, the particle beam irradiation suppresses the collision of impurities generated from each of the plurality of regions on the bonding surface CPf of the chip CP with the bonding surface CPf of the chip CP, thereby suppressing damage to the bonding surface CPf of the chip CP caused by the collision of the impurities.

[0050] Furthermore, the activation processing device 60 according to this embodiment has a cover 622 that covers the portion of the sheet TE except the portion to which the chips CP are attached on the one side to which the chips CP are attached, in a state in which the holding frames RI2 and RI3 that hold the sheet TE to which the chips CP are attached are held by the frame holding portion 621. This suppresses the generation of impurities from the sheet TE due to irradiation of the particle beam to the portion of the sheet TE except the portion to which the chips CP are attached.

[0051] In the activation processing apparatus 60 according to the present embodiment, when the bonding surface CPf of the chip CP is irradiated with a particle beam, the support 62 supports the annular frames RI2 and RI3 that hold the sheet TE to which the chip CP is attached, with the bonding surface CPf of the chip CP facing vertically downward. Then, the particle beam source 61 irradiates the bonding surface CPf of the chip CP with a particle beam from vertically below the support 62. As a result, impurities generated by irradiating the sheet TE and the chip CP with the particle beam fall vertically downward due to gravity, and adhesion of the impurities to the bonding surface CPf of the chip CP is suppressed.

[0052] However, when the particle beam source 61 is, for example, an ion gun, the particle beam spreads too much and the particle beam is irradiated to parts other than the holding frame 112 holding the sheet TE to which the chips CP are attached in the chamber 64. This makes it easier for metal contamination to occur from the inner wall of the chamber 64. In particular, when performing hydrophilization processing in the activation processing device 60 as in this embodiment, it is not good for metal to be mixed in. On the other hand, in this embodiment, a high-speed particle beam source with high directivity is used as the particle beam source 61. This suppresses the irradiation of the particle beam to parts other than the annular frames RI2 and RI3 holding the sheet TE to which the chips CP are attached in the chamber 64. In addition, the particle beam source 61 made of a high-speed particle beam source is effective because it can irradiate only the chips CP by scanning and moving it relatively to the annular frames RI2 and RI3 near the sheet TE to which the chips CP are attached, thereby shielding the outer periphery of the multiple chips CP attached to the circular area in plan view on the sheet TE1.

[0053] Although the embodiment of the present invention has been described above, the present invention is not limited to the above-mentioned embodiment. For example, the particle beam source 61 of the activation processing device 60 may be an ion beam source that accelerates and emits nitrogen ions.

[0054] In the embodiment, an example of performing plasma dicing in the dicing process has been described, but the present invention is not limited to this. Dicing may be performed by irradiating a laser beam onto a region to be diced, or by pressing a dicing blade against the region to be diced. In addition, a stealth dicing method using a laser beam may be adopted in the dicing process. In this case, the dicing device may have, for example, a laser processing head 2213, a laser processing head driving unit 2214, a holding table 2215 having an adsorption unit (not shown) for suctioning and holding the sheet TE, and a chuck 2216 for clamping an annular frame RI1 for holding the sheet TE on the side of the holding table 2215, as shown in FIG. 15(A). The laser processing head 2213 emits laser beams having a wavelength that transmits through the dicing substrate DW. The laser processing head driving unit 2214 moves the laser processing head 2213 along the planned division line around the portion corresponding to the plurality of chips CP while maintaining the distance between the laser processing head 2213 and the dicing substrate DW so that the focal point of the laser light is inside the dicing substrate DW. As a result, as shown in Fig. 15(B), a plurality of chips CP are produced in which adjacent chips CP are bonded to the sheet TE via modified areas PAS formed in areas overlapping with the grooves TR1 in the thickness direction of the dicing substrate DW.

[0055] According to this configuration, since the chips CP are bonded to the sheet TE, when the bonding surface CPf of the chip CP is activated by irradiating the bonding surface CPf with a particle beam or exposing the bonding surface CPf to plasma, the sheet TE exposed between the adjacent chips CP is not irradiated with a particle beam or exposed to plasma, which is preferable. In addition, in the case of this modified example, it is preferable to perform an activation process before performing a dicing process.

[0056] In the embodiment, the processing may be performed in the order shown in, for example, Fig. 16(A) to (D). Specifically, as shown in Fig. 16(A), in a state where a plurality of chips CP are attached to a sheet TE held by an annular frame RI, a particle beam is irradiated from a particle beam source 61 to a bonding surface CPf of the chips CP as shown by an arrow AR35, thereby activating the bonding surface CPf. At this time, the chips CP are attached to the sheet TE held by the annular frame R1 in a state where they are in contact with each other. Next, as shown in Fig. 16(B), the frame support part 4411 supporting the annular frame RI2 is moved vertically upward to place the annular frame RI2 at a position higher than the annular frame RI1 by a preset height, thereby radially extending the sheet TE and setting the plurality of chips CP to a state where they are spaced apart from each other, and then the annular frame RI3 for fixing the sheet TE to the annular frame RI2 is fitted to the outside of the annular frame RI2 from above the annular frame RI2. As a result, the sheet TE is fixed to the annular frames RI2 and RI3. 16(C), with multiple chips CP attached to the sheet TE held by the annular frames RI2 and RI3, the chips CP are cleaned by discharging water from the cleaning head 851 onto the chips CP. After that, with the periphery of one chip CP to be picked up on the sheet TE held by the annular frames RI2 and RI3 held by the suction holding portion 114, the chip CP is picked up by pushing up a portion of the sheet TE corresponding to the one chip CP to be picked up with the pin 111a, as shown in FIG. 16(D). In other words, when the sheet TE is stretched, after changing from the annular frame RI1 to the annular frames RI2 and RI3, the chips CP are handled in a state in which they are spaced apart by the annular frames RI2 and RI3.

[0057] In the embodiment, an example in which dry etching is performed in the groove forming step has been described, but the present invention is not limited to this, and the groove TR1 may be formed, for example, by irradiating a laser beam onto the region in which the groove TR1 is to be formed, or by pressing a dicing blade against the region in which the groove TR1 is to be formed and cutting the region. Also, the groove TR1 may be formed by wet etching in the groove forming step.

[0058] In the embodiment, the chip transport device 39 may have a chip holding part 3393 in which an inclined surface 3393c inclined with respect to the vertical direction is formed on the side wall of the recess 3393b, as shown in FIG. 16. In FIG. 16, the same components as those in the embodiment are given the same reference numerals as those in FIG. 9(A). In this case, when the chip CP is held by the chip holding part 3393, the corner part CPC1 of the chip CP is held in contact with the inclined surface 3393c, so that the position of the chip CP is corrected. This is preferable because when the chip CP is held by the chip holding part 3393, the chip holding part 3393 is less likely to come into contact with the bonding surface CPf of the chip CP due to the positional deviation of the chip CP.

[0059] In the embodiment, an example of the activation processing device 60 in which the particle beam source 61 is moved relative to the holding frame 112 that holds the sheet TE to which the chips CP are attached has been described. However, the present invention is not limited to this, and may be configured, for example, such that the particle beam source 61 is fixed and the holding frame 112 that holds the sheet TE to which the chips CP are attached is moved. Alternatively, the particle beam source 61 and the holding frame 112 that holds the sheet TE to which the chips CP are attached may be moved in opposite directions.

[0060] In the embodiment, the chip bonding system 1 may bond a chip CP provided with a plurality of alignment marks MKCa, MKCb corresponding to the plurality of alignment marks MKWa, MKWb to a substrate WT provided with a plurality of alignment marks MKWa, MKWb in a region where one chip CP is bonded on a bonding surface where at least one chip CP is bonded, as shown in FIG. 18. Here, for example, the alignment marks MKWa, MKWb correspond to the first alignment mark, and the alignment marks MKCa, MKCb correspond to the second alignment mark. Here, the chip CP may have a device region formed in the center of one surface side in the thickness direction, a step portion formed at the outer end of a non-device region surrounding the device region, and the alignment marks MKCa, MKCb are provided in the non-device region. In addition, the chip bonding system 1 includes an imaging unit (not shown) that images the plurality of alignment marks MKWa, MKWb and the plurality of alignment marks MKCa, MKCb. The control unit 90 controls the imaging unit to simultaneously capture the alignment marks MKWa, MKWb and the alignment marks MKCa, MKCb in a state where the alignment marks MKWa, MKWb and the alignment marks MKCa, MKCb are spaced apart by a preset first distance within the range of the depth of field of the imaging unit. The control unit 90 calculates the relative positional deviation between the substrate WT and the chip CP from the captured images of the alignment marks MKWa, MKWb and the alignment marks MKCa, MKCb captured by the imaging unit, and controls at least one of the stage 315 and the head driving unit 36 ​​to move the chip CP relative to the substrate WT in a direction parallel to the bonding surface and in which the positional deviation becomes smaller, based on the calculated positional deviation. The alignment marks MKWa, MKWb are provided in a non-device area A41 where the device area DA4 is formed and outside the device area DA4.

[0061] In reading the two alignment marks MKWa, MKWb of the substrate WT and the two alignment marks MKCa, MKCb of the chip CP, the alignment marks MKWa and MKCa adjacent to each other in the opposing direction of the substrate WT and the chip CP may be imaged by one and the same imaging unit, and the alignment marks MKWb and MKCb adjacent to each other in the direction perpendicular to the opposing direction may be imaged by separate imaging units if there is a pitch difference. By simultaneously acquiring images of the four alignment marks MKWa, MKWb, MKCa, and MKCb in one capture and processing the images to recognize the positions of the four first alignment marks MKWa, MKWb, MKCa, and MKCb, it is possible to eliminate errors due to changes over time such as vibration and temperature changes, and to achieve highly accurate alignment. Normally, when the imaging unit is vibrating, the alignment marks MKWa (MKWb) and MKCa (MKCb), which are adjacent in the opposing direction of the substrate WT and the chip CP, are imaged by the same imaging unit at different times, resulting in errors due to the amplitude of the vibration. Also, in a configuration in which the alignment marks MKWa, MKWb and the alignment marks MKCa, MKCb are imaged by different imaging units, differences in thermal expansion due to temperature changes between the imaging units and changes over time appear as errors.

[0062] Furthermore, if the alignment marks MKCa and MKCb are provided in the device area DA4 of the chip CP, it is not preferable because an extra area must be secured in the device area DA4 where the alignment marks MKCa and MKCb are provided, which is integrated at great effort. In contrast, according to the present configuration, the step is formed in the non-device area, i.e., the area corresponding to the dicing line, so that the alignment marks MKCa and MKCb can be provided using the non-device area, which is preferable.

[0063] In the embodiment, as shown in FIG. 19(A), the alignment marks MKCa and MKCb may be embedded in the chip CP5. Here, the bonding pad PAD1 is exposed on the bonding surface of the chip CP5. The chip CP5 also has a device region DA51 and a redistribution layer LAY1 formed on the bonding surface side of the device region DA51. The depth H52 of the step of the chip CP5 in the thickness direction of the chip CP5 is smaller than the thickness H51 of the redistribution layer LAY1 provided on the chip CP5, and is 0.2 μm or more and 1 μm or less. As shown in FIG. 19(B), the alignment marks MKWa and MKWb may be embedded in the substrate WT5. ​​Here, the substrate WT5 has a device region DA52 and a redistribution layer LAY2 formed on the bonding surface side of the substrate WT5 of the device region DA52. Also, the bonding pad PAD2 is exposed on the bonding surface of the substrate WT5. Here, the device areas DA52 on the substrate WT5 side are not necessarily all the same size. As shown in Fig. 20, a plurality of types of chips CP5 of different sizes may be mounted on one substrate WT5. ​​In this case, the imaging unit 5035 may recognize the alignment marks MKWa and MKWb by using reflected light from the alignment marks MKWa and MKWb embedded in the redistribution layer LAY2.

[0064] In this configuration, the second alignment marks MKCa and MKCb are provided in the rewiring layer LAY1 formed on the device area DA51 of the chip CP. The depth of the step is assumed to be 0.5 μm from the viewpoint of not affecting bonding even if a particle is placed on it. It is sufficient that the second alignment marks MKCa and MKCb are provided on the opposite side of the bonding surface side from the portion where the step is formed, and in order to recognize it with an imaging unit using infrared rays, the second alignment marks MKCa and MKCb do not need to be provided on the bonding surface, and may be buried as in this configuration. In the semiconductor industry, the chip CP5 is processed in an environment where the number of particles with a diameter of 0.2 μm is required to be 20 or less, so the diameter of particles that become voids is set to 0.5 μm. Also, as described above, in terms of the depth of field, it is preferable that the depth of the step is 1 μm or less in order to simultaneously recognize the alignment marks MKWa and MKWb and the alignment marks MKCa and MKCb. Therefore, the depth of the step is preferably 1 μm or less, and more preferably 0.5 μm or less, and the depth of the step must be 0.2 μm or more.

[0065] In the embodiment, when a plurality of chips CP are stacked as shown in FIG. 21, at least one of the plurality of chips CP may be provided with a plurality of alignment marks MKCa2, MKCa3 arranged at a distance from each other, as shown in the captured image GA61 shown in FIG. 22(A). That is, the plurality of chips CP each have alignment marks MKCa2, MKCa3 for alignment with another chip CP or the substrate WT, and alignment marks MKCa2, MKCa3 for alignment with another chip CP to be joined next, arranged at a distance from each other. Here, the alignment marks MKCa2, MKCa3 are provided, for example, on the chip CP arranged closer to the substrate WT of the two chips CP in FIG. 21. The alignment marks MKCa2, MKCa3 may have shapes different from each other. Here, the alignment mark MKCa1 is provided on the chip CP arranged farther from the substrate WT of the two chips CP in FIG. 21, and the alignment mark MKWa is provided on the substrate WT. Then, when the alignment mark MKCa2 and the alignment mark MKWa overlap, and the alignment mark MKCa3 and the alignment mark MKCa1 overlap, as in a captured image GA62 shown in FIG. 22(B), it is determined that there is no more misalignment.

[0066] In this way, when stacking multiple chips CP, the dicing lines of the chips CP, i.e., the set of alignment marks MKCa2 and MKWa and the set of alignment marks MKCa3 and MKCa1 are arranged offset from each other on the non-device area of ​​each chip CP, which is preferable because it prevents multiple layers from interfering with each other and causing erroneous recognition when performing position recognition using infrared rays. Also, by making the shapes of the alignment marks of the chips CP and substrate WT adjacent to each other in the overlapping direction different, erroneous recognition is further reduced.

[0067] In the embodiment, a resin portion may be formed between a plurality of chips mounted on a substrate with the chips spaced apart from each other. Here, as shown in FIG. 23(A), the chip CP has a first device region formed in the center of the bonding surface side bonded to the substrate WT and a step portion formed in a first non-device region surrounding the first device region, as described in the embodiment. The chip CP is mounted on the substrate WT with a gap formed in a portion corresponding to the inside of the step portion. Then, a resin application process is performed in which the chamber 7091 in which the substrate WT and the chip CP are disposed is reduced in pressure, and the resin RE1 is applied between the adjacent chips CP by the dispenser 7092. Thereafter, as shown in FIG. 23(B), the environment of the substrate WT on which the chip CP is mounted in the chamber 7091 is set to atmospheric pressure. A resin filling process is performed in which the resin RE1 applied between the adjacent chips CP is filled into the gaps by the differential pressure between the pressure inside the gaps and the atmospheric pressure.

[0068] Incidentally, after mounting the chip CP on the substrate WT, a gap is generated in the portion corresponding to the step portion as shown in FIG. 23(A), and it is necessary to fill the gap with so-called underfill resin. At this time, since this gap does not communicate with the side of the substrate WT opposite to the chip CP side, the resin RE1 does not penetrate to the depth of the gap by simply applying the resin RE1. Therefore, in this configuration, the environment in which the substrate WT and the chip CP are arranged is once depressurized, and the resin RE1 is applied between the adjacent chips CP under the depressurized condition. At this time, the resin RE does not penetrate to the depth of the gap, but it can be applied around the chip CP without any gaps. After that, by returning the environment in which the substrate WT and the chip CP are arranged to atmospheric pressure, the resin RE is filled to the depth of the gap due to the pressure difference with the gap portion, and the gap between the chips CP can be filled.

[0069] In an embodiment, when using a cleaning device 85 to clean a sheet TE or a substrate WT to which a chip CP is attached using liquid ejected from a cleaning head 851 that is positioned vertically above the stage 852 and ejects liquid vertically downward while the sheet TE or the substrate WT to which a chip CP is attached is held on a stage 852, a particle removal process may be performed in which particles attached to the chip CP or the substrate WT are removed using centrifugal force by rotating the stage 852 at a preset first rotation speed, and after the particle removal process, after ejecting liquid from the cleaning head 851 or while ejecting liquid from the cleaning head 851, a water attachment process may be performed in which moisture is attached to the chip CP or the substrate WT by rotating the stage 852 at a preset second rotation speed slower than the first rotation speed.

[0070] However, if the above-mentioned particle removal step is performed only, the moisture attached to the chip CP or the substrate WT may scatter, and moisture suitable for hydrophilic bonding may not remain on the bonding surface of the chip CP or the substrate WT. In contrast, according to the present configuration, the above-mentioned water attachment step is performed after the particle removal step, so that the moisture scattered in the particle removal step can be compensated for in the water attachment step, and therefore the state in which moisture suitable for hydrophilic bonding is attached to the bonding surface of the chip CP or the substrate WT can be maintained. In addition, a state in which the humidity of the bonding surface is 50% to 95% can be realized as the state in which the suitable moisture is attached. In addition, the moisture required for hydrophilic bonding may not only be attached to the bonding surface of the chip CP or the substrate WT, but may also be carried in a so-called porous portion formed in the vicinity of the bonding surface. This porous portion is formed in the vicinity of the bonding surface of the substrate WT or the chip CP, for example, during activation processing.

[0071] In the embodiment, the pickup mechanism 111 is not limited to a configuration in which the sheet TE is pushed out by the pin 111a, but may be a configuration in which the chip CP is scraped off from the sheet TE, or a configuration in which the adhesive strength of the sheet TE is reduced by irradiating the sheet TE with ultraviolet light, thereby cutting out the chip CP from the sheet TE, or a configuration in which any other method of peeling from the sheet TE is adopted. Also, the pickup mechanism 111 does not need to push up with the pin 111a, and may be a configuration in which the chip CP is lifted up by suction-holding a step portion of the chip CP in a state in which the adhesive strength of the sheet TE is reduced.

[0072] The present invention allows various embodiments and modifications without departing from the broad spirit and scope of the present invention. The above-described embodiments are for the purpose of explaining the present invention and do not limit the scope of the present invention. In other words, the scope of the present invention is indicated by the claims, not the embodiments. Various modifications made within the scope of the claims and within the scope of the meaning of the invention equivalent thereto are considered to be within the scope of the present invention. [Industrial Applicability]

[0073] The present invention is suitable for the manufacture of, for example, CMOS image sensors, memories, computing elements, and MEMS. [Explanation of symbols]

[0074] 1: chip bonding system, 10: chip supply device, 11: chip supply section, 30: bonding device, 31: stage unit, 33: bonding section, 33H: head, 36: head drive section, 39: chip transport device, 60: activation processing device, 61: particle beam source, 62: support section, 63: beam source transport section, 64: chamber, 64a: hole, 70: transport device, 71: transport robot, 80: loading / unloading unit, 85: cleaning device, 86: dicing device, 90: control section, 11 1: pickup mechanism, 111a: pin, 112: holding frame, 113: holding frame drive unit, 114: suction holding unit, 622: cover, 114a: through hole, 119, 621: frame holding unit, 315: stage, 320, 853: stage drive unit, 391: plate, 392: plate drive unit, 393, 3393: tip holding unit, 393a: suction unit, 393b, 3393b: recess, 411: tip tool, 411a, 411b: through hole, 413: head main body unit, 431: pressing mechanism , 431a: pressing section, 431b: pressing drive section, 440: holding mechanism, 611: electrode, 612: discharge chamber, 612a: FAB radiation port, 613: beam source drive section, 614: gas supply section, 631: support rod, 632: support, 633: support drive section, 634: bellows, 851: cleaning head, 852: stage, 2213: laser processing head, 2214: laser processing head drive section, 2215: holding table, 2216: chuck, 3393c: inclined surface, 4411: frame support holding part, 7091: chamber, 7092: dispenser, CP, CP5: chip, CPA1, CPA9: impurity, CPf: bonding surface, CPs: step, DA4, DA51, DA52: device area, DW: dicing substrate, MKCa1, MKCa2, MKCa3, MKCb, MKWa, MKWb: alignment mark, TE: sheet, TR1, TR2: groove, OB1: track, RE1: resin, RI1, RI2, RI3: ring frame, WT, WT5: substrate, WTf: mounting surface

Claims

1. A chip production method for producing a set of a plurality of chips from a substrate having a plurality of device regions and non-device regions surrounding each of the plurality of device regions formed in a plane perpendicular to a thickness direction, comprising the steps of: a groove forming step of forming a first groove having a preset first width and shallower than a thickness of the substrate in the non-device region so as to surround the plurality of device regions; A dicing step of dicing the inside of the first groove after the groove forming step. Chip generation method.

2. In the dicing step, a second groove having a second width narrower than the first width is formed inside the first groove by plasma dicing. The method of claim 1 .

3. In the dicing step, a second groove having a second width narrower than the first width is formed inside the first groove using a laser beam or a dicing blade. The method of claim 1 .

4. In the dicing step, a modified portion is formed in a region overlapping with the first groove in a thickness direction of the substrate by a stealth dicing method. The method of claim 1 .

5. The substrate is provided with dicing lines for dicing, In the groove forming step, a first groove is formed inside the dicing line, and then dicing is performed. A method for producing chips according to any one of claims 1 to 4.

6. a sheet holding section for holding a sheet formed of resin and having a surface side of each of a plurality of chips attached thereto, the surface side being opposite to the surface side in the thickness direction of each of the chips; a pick-up mechanism for picking out at least one of the plurality of chips; a chip transport device having a chip holding part for holding at least one of the cut chips and transporting the at least one chip; The chip has a device region formed in a central portion on the one surface side, and a step portion formed at an outer end portion of a non-device region surrounding the device region, the chip holding portion holds at least one of the chips in a state of contacting the step portion of each of the at least one chip and not contacting the device region; Chip feeding system.

7. a suction holding unit that suction-holds an outer periphery of at least one of the chips to be cut out from the sheet, The chip delivery system of claim 6.

8. a cleaning device including a stage for supporting the sheet, a cleaning head disposed vertically above the stage and for ejecting liquid vertically downward, and a cleaning head drive unit for moving the cleaning head in a horizontal direction; The cleaning head driving unit moves the cleaning head along a region extending in an arrangement direction between the plurality of chips arranged orthogonally to each other in a lattice pattern attached to the sheet. The chip supply system according to claim 6 or 7.

9. the chip is provided with an alignment mark in the non-device region; The chip supply system according to claim 6 or 7.

10. A cleaning method for cleaning a chip or a substrate attached to a sheet, comprising the steps of: a particle removal step of removing particles adhering to the chip or the substrate by centrifugal force by rotating the stage at a preset first rotation speed when cleaning the chip or the substrate with liquid discharged from a cleaning head disposed vertically above the stage and discharging liquid vertically downward while the sheet or the substrate is held on the stage; and a water adhering step of adhering water to the chip or the substrate by rotating the stage at a preset second rotation speed slower than the first rotation speed after the particle removal step and after discharging liquid from the cleaning head or while discharging liquid from the cleaning head. Cleaning method:

11. 1. A chip bonding system for mounting a chip provided with a plurality of second alignment marks corresponding to the plurality of first alignment marks on a substrate having a bonding surface on which at least one chip is bonded, the system comprising: the chip has a first device region formed in a central portion on a bonding surface side to be bonded to the substrate, a step portion formed in a first non-device region surrounding the first device region, and the second alignment mark provided in the first non-device region; A substrate holder for holding the substrate; a head that holds the tip in a state facing the joining surface; an imaging unit that images the plurality of first alignment marks and the plurality of second alignment marks; a substrate holder drive unit that drives the substrate; a head driving unit that drives the head; a control unit that calculates a relative positional deviation between the substrate and the chip from captured images of the plurality of first alignment marks and the plurality of second alignment marks captured by the imaging unit, and controls at least one of the substrate holding unit driving unit and the head driving unit based on the calculated positional deviation, to move the chip relatively to the substrate in a direction parallel to the mounting surface and in which the positional deviation is reduced, and then mount the chip on the substrate. Chip bonding system.

12. the control unit controls the imaging unit to simultaneously capture images of the first alignment marks and the second alignment marks in a state in which the first alignment marks and the second alignment marks are spaced apart by a preset first distance within a range of a depth of field of the imaging unit, and calculates a relative positional deviation between the board and the component from the captured images of the first alignment marks and the second alignment marks captured by the imaging unit. The chip bonding system of claim 11.

13. the substrate has a second device region and a second non-device region surrounding the second device region; the first alignment mark is provided outside a projection area of ​​the second device region in the second non-device region in a thickness direction of the substrate; A chip bonding system according to claim 11 or 12.

14. the first alignment mark is embedded in the substrate; the second alignment mark is embedded in the chip; A chip bonding system according to claim 11 or 12.

15. The depth of the step in the thickness direction of the chip is 0.2 μm or more and 1 μm or less. A chip bonding system according to claim 11 or 12.

16. A plurality of the chips are mounted on the substrate in a stacked state, Each of the plurality of chips has a second alignment mark for aligning with the other chips or the substrate, and a third alignment mark for aligning with the other chip to be bonded next, the second alignment mark and the third alignment mark being arranged at a distance from each other. A chip bonding system according to claim 11 or 12.

17. the second alignment mark and the third alignment mark have different shapes; The tip bonding system of claim 16.

18. At least one of the first non-device region and the second non-device region is a dicing line. A chip bonding system according to claim 11 or 12.

19. a substrate having a first alignment mark provided in a region where at least one chip is to be mounted on a bonding surface of the substrate; a device region is formed in a central portion of one surface side in a thickness direction, a step portion is formed in a non-device region surrounding the device region, and a second alignment mark is provided at a position facing the first alignment mark in the non-device region, and a chip is mounted on the substrate; Chip mounting board.

20. 1. A method for forming a resin portion between a plurality of chips mounted on a substrate at a distance from each other, the method comprising the steps of: the chip is mounted on the substrate in a state in which a first device region is formed in a central portion of a bonding surface side to be bonded to the substrate, a step portion is formed in a first non-device region surrounding the first device region, and a gap is formed in a portion corresponding to an inside of the step portion; a resin application step of applying a resin between adjacent chips under reduced pressure; and a resin filling step of filling the gaps with the resin applied between adjacent chips by a pressure difference between the pressure inside the gaps and the atmospheric pressure after the resin application step, by making the environment of the substrate on which the chips are mounted atmospheric pressure. Method of forming resin part.

Images