Touch display device

Abstract

To provide a touch display device with elasticity.SOLUTION: A touch display device according to an embodiment comprises: a display panel including a substrate having a first region arranged in the center of the substrate and a second region surrounding the first region, a plurality of first pixels arranged in the first region of the substrate, and a plurality of second pixels arranged in the second region of the substrate; and a touch sensor arranged on the display pane and including a plurality of first sensing electrodes arranged in the first region and a plurality of second sensing electrodes arranged in the second region. The plurality of first pixels and the plurality of second pixels are arranged at densities different from each other, and the plurality of first sensing electrodes and the plurality of second sensing electrodes are arranged at densities different from each other.SELECTED DRAWING: Figure 5

Description

[Technical field]

[0001] The present invention relates to a touch display device. [Background technology]

[0002] As we enter the information age, the field of displays that visually represent electrical information signals has been rapidly developing, and in response to this, a variety of display devices with excellent performance such as thinness, light weight, and low power consumption have been developed. Examples of such display devices include liquid crystal display devices (LCDs) and organic light emitting display devices (OLEDs).

[0003] 2. Description of the Related Art Display devices are now used in a wide variety of applications, including computer monitors, TVs, and even personal portable devices. As a result, research is ongoing into display devices that have a large display area while being reduced in volume and weight.

[0004] The display device may include a display panel for displaying an image, and a touch panel disposed on the display panel for receiving touch input, the touch panel including a plurality of sensing electrodes. The display device (or the input sensing device) may detect a change in capacitance formed in the plurality of sensing electrodes to find a touched point. Summary of the Invention [Problem to be solved by the invention]

[0005] SUMMARY OF THE PRESENTLY PREFERRED EMBODIMENTS An object of the present invention is to provide a stretchable touch display device.

[0006] Another object of the present invention is to provide a touch display device capable of utilizing connection wiring arranged in an outer region as a part of a touch electrode.

[0007] The object of the present invention is not limited to the above-mentioned objects, and other objects not mentioned herein will be clearly understood by those skilled in the art from the following description. [Means for solving the problem]

[0008] In order to solve the above-mentioned problems, a touch display device according to an embodiment of the present invention includes a first region disposed at a center and a second region surrounding the first region, the touch display device may include a substrate, a display panel including a plurality of first pixels disposed in the first region of the substrate and a plurality of second pixels disposed in the second region of the substrate, and a touch sensor disposed on the display panel, the touch sensor including a plurality of first sensing electrodes disposed in the first region and a plurality of second sensing electrodes disposed in the second region. The plurality of first pixels and the plurality of second pixels may be disposed at different densities, and the plurality of first sensing electrodes and the plurality of second sensing electrodes may be disposed at different densities.

[0009] Further details of the embodiments are included in the detailed description and the drawings. Effect of the Invention

[0010] A touch display device according to an embodiment of the present invention includes a display panel and a touch sensor disposed on the display panel, and may include a first region which is a central region and a second region which is an edge region surrounding the first region. The touch display device may also include a plurality of plate patterns disposed on the second region and on which sensing electrodes are disposed, and a connection pattern on which connection wiring is disposed to connect adjacent plate patterns and to connect the sensing electrodes formed on the plate patterns. Thus, the connection wiring disposed in the edge region may be utilized as a part of the touch electrode.

[0011] In addition, in the case of the touch display device according to the embodiment of the present invention, the second pixels arranged in the second region may be arranged at a lower pixel density than the first pixels arranged in the first region, and thus the touch display device may be deformable in the second region, which is an outer region, and the second region, which is an outer region, may be designed to have a curved shape.

[0012] In addition, in the case of a touch display device according to an embodiment of the present invention, an image can be displayed not only in a first region which is a central region but also in a second region which is an outer region, so that the display surface can be maximized and the bezel area can be minimized.

[0013] The effects of the present invention are not limited to the above-mentioned examples, and various other effects are included within the scope of the present invention. [Brief description of the drawings]

[0014] [Figure 1] 1 is a plan view illustrating a touch display device according to an embodiment of the present invention; [Diagram 2] 1 is a cross-sectional view illustrating a touch display device according to an embodiment of the present invention; [Diagram 3] 2 is an enlarged view showing an example of an FF portion of a display panel included in the touch display device of FIG. 1. [Figure 4] 2 is an enlarged view showing an example of an FF portion of a touch sensor included in the touch display device of FIG. 1. [Diagram 5] 5 is a cross-sectional view showing an example taken along line II' shown in FIG. 4. [Figure 6] 2 is an enlarged view showing an example of a part of a second region of the touch display device of FIG. 1; FIG. [Figure 7] 7 is a cross-sectional view showing an example taken along line II-II' shown in FIG. 6. [Figure 8] 7 is a cross-sectional view showing an example taken along line III-III' shown in FIG. 6. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0015] The advantages and features of the present invention, and the methods for achieving them, will become apparent from the following detailed description of the embodiments in conjunction with the accompanying drawings. However, the present invention is not limited to the embodiments disclosed below, and may be embodied in various different forms. The embodiments are provided solely to ensure that the disclosure of the present invention is complete and to fully inform those skilled in the art of the present invention of the scope of the invention. The present invention is only defined by the scope of the claims.

[0016] The shapes, areas, ratios, angles, numbers, etc. disclosed in the drawings for explaining the embodiments of the present invention are illustrative, and the present invention is not limited to the illustrated matters. The same reference symbols refer to the same components throughout the specification. In addition, when describing the present invention, if it is determined that a detailed description of related known technology may unnecessarily obscure the gist of the present invention, the detailed description will be omitted. When "includes," "has," "is made," etc. are used in the present invention, other parts may be added since "only" is not used. When a component is expressed in the singular, it includes the plural unless otherwise explicitly stated.

[0017] When interpreting elements, they are interpreted as including a margin of error even if there is no other explicit description.

[0018] Furthermore, when the term "connected" or "connected" is used, unless "immediately" or "directly" is used, it can include being "connected" or "connected" through one or more other components located between the two components.

[0019] In addition, although the terms "first", "second" and the like are used to describe various components, these components are not limited by these terms. These terms are used merely to distinguish one component from another. Therefore, the first component referred to below may be the second component within the technical concept of the present invention.

[0020] Like reference numbers refer to like elements throughout the specification.

[0021] The area and thickness of each component shown in the drawings are shown for convenience of explanation, and the present invention is not necessarily limited to the area and thickness of the components shown.

[0022] The respective features of the various embodiments of the present invention may be partially or fully combined or combined with each other, and may be technically interlocked and driven in various ways, and each embodiment may be implemented independently of each other or may be implemented together in a related relationship.

[0023] Various embodiments of the present invention will now be described in detail with reference to the accompanying drawings.

[0024] FIG. 1 is a schematic plan view of a touch display device according to an embodiment of the present invention.

[0025] FIG. 1 shows a display module DM and a driving circuit DCP for driving the display module DM, which are included in a touch display device DD according to an embodiment of the present invention.

[0026] Meanwhile, in FIG. 1, the touch display device DD is shown to be embodied in the form of a smartphone, but this is not limited thereto, and the touch display device DD may be embodied in various electronic devices (e.g., a smart watch, a tablet PC, etc.).

[0027] For ease of explanation, the display module DM and the driving circuit DCP are shown separately in FIG. 1, but the present invention is not limited thereto. Depending on the embodiment, all or a part of the driving circuit DCP may be integrally embodied on the display module DM.

[0028] 1, a touch display device DD according to an embodiment of the present invention may include a display module DM including a display panel DP and a touch sensor TS, and a driving circuit DCP for driving the display module DM. According to an embodiment, the touch display device DD may further include a window WD covering the display module DM.

[0029] The touch display device DD may be provided in various shapes. For example, the touch display device DD may be provided in a rectangular plate shape having two pairs of parallel sides, but the embodiment of the present invention is not limited thereto. When the touch display device DD is provided in a rectangular plate shape, one pair of the two pairs of sides may be provided longer than the other pair of sides. In FIG. 1, for convenience of explanation, the touch display device DD is shown in a rectangular shape having a pair of long sides and a pair of short sides, and the extension direction of the pair of long sides is shown as a second direction DR2, and the extension direction of the pair of short sides is shown as a first direction DR1. In the embodiment, as shown in FIG. 1, the touch display device DD provided in a rectangular plate shape may have a rounded corner where one long side and one short side meet. However, this is merely an example, and the shape of the touch display device DD is not limited thereto. For example, the touch display device DD may have an angular shape at a corner where one long side and one short side intersect.

[0030] Meanwhile, the front (or top) and rear (or bottom) of each member or unit of the touch display device DD described below may be divided along a third direction DR3. However, the first to third directions DR1, DR2, and DR3 shown in this specification are merely examples, and the first to third directions DR1, DR2, and DR3 are relative concepts and may be converted to other directions. Hereinafter, for convenience of description, the first to third directions DR1, DR2, and DR3 will be referred to by the same reference numerals.

[0031] Meanwhile, in this specification, unless otherwise defined, the term "overlapped" means that two components are overlapped in the thickness direction of the touch display device DD (ie, the third direction DR3).

[0032] The touch display device DD may be a flat display device, a flexible display device, a curved display device, a foldable display device, a bendable display device, etc. In addition, the touch display device DD may be applied to a transparent display device, a head-mounted display device, a wearable display device, etc.

[0033] In one embodiment, at least a portion of the touch display device DD may have flexibility, for example, at least a portion of the touch display device DD may have stretchability.

[0034] More specifically, the touch display device DD may include a display surface in which the central region is a flat type and the outer region (e.g., edge region) is a curved type. For example, the touch display device DD may have a front surface including the central region and the outer region (e.g., edge region) surrounding the central region as a display surface.

[0035] For example, the touch display device DD may include a first region A1 and a second region A2 excluding the first region A1. For example, the second region A2 may be defined as a region surrounding the first region A1. For example, the first region A1 may correspond to the above-mentioned central region, and the second region A2 may correspond to the above-mentioned outer region (e.g., edge region). Meanwhile, the first region A1 may occupy most of the area of ​​the display surface.

[0036] In one embodiment, the first area A1 corresponds to a central area of ​​the touch display device DD and is a flat area, and the second area A2 corresponds to an edge area of ​​the touch display device DD and is a curved area, which will be described in more detail with reference to FIGS.

[0037] The touch display device DD can display an image through a display surface (e.g., a first area A1 and a second area A2). Here, the display surface can be defined as an area where an image is displayed. For example, the touch display device DD can include a display module DM, and a display panel DP can include a plurality of pixels (or a plurality of sub-pixels) for displaying an image.

[0038] In one embodiment, the display surface of the touch display device DD, for example, at least one of the first area A1 and the second area A2, may be used as an area for recognizing a user's touch input (for example, a sensing area, a touch area). That is, at least a part of the display surface of the touch display device DD may be set as a sensing area. For example, the display module DM included in the touch display device DD may further include a touch sensor TS, and the touch sensor TS may include a plurality of sensing electrodes for sensing a user's touch input. However, the embodiment of the present invention is not limited thereto, and in some embodiments, the display surface of the touch display device DD, for example, the first area A1 and the second area A2, may all be used as an area for recognizing a user's touch input (for example, a sensing area, a touch area).

[0039] The driving circuit DCP can drive the display module DM. For example, the driving circuit DCP can output data signals corresponding to video data to a plurality of pixels included in the display panel DP, or output driving signals to a plurality of sensing electrodes included in the touch sensor TS, and receive electrical signals (e.g., sensing signals) received from the plurality of sensing electrodes. The driving circuit DCP can sense a user's touch input using the electrical signals.

[0040] According to an embodiment, the driving circuit DCP may include a panel driving unit PDV and a touch driving unit TDV (or a sensor driving unit). For convenience of explanation, the panel driving unit PDV and the touch driving unit TDV are shown as separate components in FIG. 1, but the embodiment of the present invention is not limited thereto. For example, at least a part of the touch driving unit TDV may be integrated with the panel driving unit PDV or may operate in conjunction with the panel driving unit PDV.

[0041] The panel driver PDV can sequentially scan a plurality of pixels included in the display panel DP and supply a data signal corresponding to the image data signal to the plurality of pixels, so that the display panel DP can display an image corresponding to the image data.

[0042] The touch driving unit TDV can detect a touch input by a user based on sensing signals received from a plurality of sensing electrodes included in the touch sensor TS.

[0043] FIG. 2 is a schematic cross-sectional view of a touch display device according to an embodiment of the present invention.

[0044] Referring to FIG. 1 and FIG. 2, a touch display device DD may include a display module DM and a window WD.

[0045] The display module DM may include a display panel DP and a touch sensor TS.

[0046] The touch sensor TS may be disposed directly on the display panel DP, or may be disposed on the display panel DP via an additional layer such as an adhesive layer or a substrate (or an insulating layer).

[0047] The display panel DP can display an image. A self-emissive display panel such as an organic light emitting display panel (OLED panel) can be used as the display panel DP. However, the embodiment of the present invention is not limited thereto. For example, a non-emissive display panel such as a liquid crystal display panel (LCD panel), an electrophoretic display panel (EPD panel), or an electrowetting display panel (EWD panel) can be used as the display panel DP. Meanwhile, when a non-emissive display panel is used as the display panel DP, the touch display device DD can include a backlight unit that supplies light to the display panel DP.

[0048] The touch sensor TS is disposed on the surface of the display panel DP on which an image is output, and can receive a touch input from a user. The touch sensor TS can recognize a touch event of the touch display device DD through a user's hand or a separate input means. The touch sensor TS can recognize a touch event in a capacitance manner. For example, the touch sensor TS can sense a touch input in a mutual capacitance manner or a self capacitance manner.

[0049] A window WD may be provided on the display module DM to protect the exposed surface of the display module DM. The window WD may protect the display module DM from external impact and provide an input surface and / or a display surface for a user. The window WD may be bonded to the display module DM using an optically transparent adhesive member OCA.

[0050] The window WD may have a multi-layer structure selected from a glass substrate, a plastic film, and a plastic substrate. Such a multi-layer structure may be formed through a continuous process or a bonding process using an adhesive layer. The window WD may have flexibility in whole or in part.

[0051] Meanwhile, as described with reference to FIG. 1, in one embodiment, the first area A1 may be a flat area corresponding to a central area of ​​the touch display device DD, and the second area A2 may be a curved area corresponding to an outer area (edge ​​area) of the touch display device DD.

[0052] For example, as shown in FIG. 2, the second region A2 may have a curved surface shape warped along a strain direction (eg, any direction on a plane defined by a first direction DR1 and a second direction DR2).

[0053] In one embodiment, the touch display device DD, for example, a portion of the display panel DP corresponding to the second region A2, may have a property of being warped or stretched. For example, the portion of the display panel DP corresponding to the second region A2 may have not only flexibility but also stretchability. Thus, the touch display device DD corresponding to the second region A2 may be designed to have a curved type in the corresponding region since the shape of the touch display device DD can be freely changed.

[0054] FIG. 3 is an enlarged view showing an example of the FF portion of a display panel included in the touch display device of FIG.

[0055] FIG. 4 is an enlarged view showing an example of an FF portion of a touch sensor included in the touch display device of FIG.

[0056] Figure 3 shows the arrangement relationship of multiple pixels PX1, PX2 included in the display panel DP in the first area A1 and the second area A2, and Figure 4 shows the arrangement relationship of multiple sensing electrodes TE1, TE2 included in the touch sensor TS in the first area A1 and the second area A2.

[0057] 1, 2 and 3, the display panel DP may include a first region A1 and a second region A2. As described above, the first region A1 corresponds to a central region of the touch display device DD and may have a flat type, and the second region A2 corresponds to an outer region (edge ​​region) of the touch display device DD and may have a curved type.

[0058] A plurality of pixels PX1, PX2 may be provided on the display panel DP. According to an embodiment, each of the plurality of pixels PX1, PX2 may include at least one light emitting element. According to an embodiment, the light emitting element may be an organic light emitting diode or an inorganic light emitting diode such as a micro LED or a quantum dot light emitting diode. The light emitting element may also be a light emitting element having a combination of organic and inorganic materials. Furthermore, each of the plurality of pixels PX1, PX2 may include a single light emitting element, or in another embodiment, each of the plurality of pixels PX1, PX2 may include a plurality of light emitting elements, and the plurality of light emitting elements may be connected in series, parallel, or series-parallel to each other. The touch display device DD may display an image on the first area A1 and the second area A2 by driving the plurality of pixels PX1, PX2 in response to input image data.

[0059] Meanwhile, each of the pixels PX1 and PX2 may include at least one of a red sub-pixel, a green sub-pixel, and a blue sub-pixel, and at least a portion of the pixels PX1 and PX2 may further include a white sub-pixel.

[0060] In one embodiment, the display panel DP may have different pixel densities in different regions.

[0061] For example, the display panel DP may include a plurality of first pixels PX1 arranged on a first region A1 and a plurality of second pixels PX2 arranged on a second region A2, where the first pixels PX1 may be arranged at a first pixel density on the first region A1, and the second pixels PX2 may be arranged at a second pixel density on the second region A2 that is smaller than the first pixel density.

[0062] Here, the pixel density may be defined as the total area of ​​the portion where the pixels are actually arranged relative to the total area of ​​the corresponding region, or may be defined as the total area of ​​the pixels included in a preset unit area. Here, the area where each pixel is arranged may be the area of ​​the light emitting surface of the light emitting element included in each pixel. For example, when the pixel includes an organic light emitting element, the pixel area may be the area of ​​the anode electrode exposed between the pixel defining films, or the area of ​​the light emitting layer.

[0063] More specifically, as shown in FIG. 3, a unit area UA having the same size may be defined in each of the first region A1 and the second region A2.

[0064] Here, the first pixels PX1 arranged in the first region A1 may be arranged at a relatively high first pixel density based on the unit area UA. For example, the first pixels PX1 may be arranged at a high PPI in the first region A1. Thus, a high-resolution image may be displayed in the first region A1, which occupies most of the area of ​​the display surface and corresponds to the central region.

[0065] Also, the second pixels PX2 arranged on the second region A2 may be arranged at a relatively small second pixel density based on the unit area UA. Here, the second pixel density may be smaller than the first pixel density, for example, the first pixel density may be four times the second pixel density, but this is merely an example and the embodiment of the present invention is not limited thereto. For example, the second pixels PX2 on the second region A2 may be arranged at a PPI lower than the PPI of the first pixels PX1 of the first region A1.

[0066] 4, the touch sensor TS may include a first region A1 and a second region A2. As described above, the first region A1 may be a region corresponding to a central region of the touch display device DD and may have a flat surface type, and the second region A2 may be a region corresponding to an outer region (edge ​​region) of the touch display device DD and may have a curved surface type.

[0067] A plurality of sensing electrodes TE1, TE2 may be provided on the touch sensor TS. The plurality of sensing electrodes TE1, TE2 may have a mesh pattern or a mesh structure. The mesh pattern may include a mesh line, which is a metal line forming at least one mesh hole (or opening). The at least one mesh hole (or opening) may correspond to a light-emitting area of ​​a pixel and form a path through which light emitted from the pixel passes. The mesh line may cause the mesh hole to have a diamond-shaped planar shape, but is not limited thereto. When the plurality of sensing electrodes TE1, TE2 have a mesh pattern, parasitic capacitance with an electrode of the display panel DP may be reduced. In addition, when the plurality of sensing electrodes TE1, TE2 having a mesh pattern are arranged on the display panel DP, flexibility of the touch display device DD may be improved.

[0068] The plurality of sensing electrodes TE1, TE2 may include aluminum, copper, chromium, nickel, titanium, etc. In some embodiments, the plurality of sensing electrodes TE1, TE2 may have a three-layer structure of titanium / aluminum / titanium. However, the present invention is not limited thereto, and the plurality of sensing electrodes TE1, TE2 may be made of various metals.

[0069] The multiple sensing electrodes TE1, TE2 are electrically connected to signal lines connected to a drive circuit DCP (e.g., a touch drive unit TDV) and can receive a drive signal from the drive circuit DCP (e.g., a touch drive unit TDV) or output a sensing signal to the drive circuit DCP (e.g., a touch drive unit TDV).

[0070] In one embodiment, the multiple sensing electrodes TE1 and TE2 included in the touch sensor TS may be arranged with different densities in different regions.

[0071] For example, the touch sensor TS may include a plurality of first sensing electrodes TE1 arranged on the first region A1 and a plurality of second sensing electrodes TE2 arranged on the second region A2, where the first sensing electrodes TE1 may be arranged at a density greater than the density at which the second sensing electrodes TE2 are arranged on the second region A2.

[0072] More specifically, the first sensing electrodes TE1 may be arranged on the first region A1 to have a continuous mesh pattern. For example, the first sensing electrodes TE1 may be arranged on the entire region of the first region A1 to have a mesh pattern.

[0073] Also, the second sensing electrodes TE2 having a mesh pattern on the second region A2 may be arranged to be spaced apart from each other and electrically connected through a connection line (e.g., a first connection line CL1). For example, the second sensing electrodes TE2 having a mesh pattern may be arranged to be spaced apart from each other in the second region A2 corresponding to a region where the second pixel PX2 of the display panel DP is arranged, and the adjacent second sensing electrodes TE2 may be electrically connected to each other through a first connection line CL1 having a bent shape. For example, the first connection line CL1 may have a sinusoidal shape, but this is merely an example and the embodiment of the present invention is not limited thereto.

[0074] Meanwhile, as described above, the second region A2 is an outer region (edge ​​region) and may have a curved shape warped along the strain direction. For example, the substrate of the touch display device DD is a ductile substrate, and a plurality of rigid plate patterns are arranged on the substrate at a distance from each other. In a unit area UA of the second region A2, the second pixel PX2 and the second sensing electrode TE2 are arranged on the rigid plate patterns, and in an area where the second pixel PX2 and the second sensing electrode TE2 are not arranged, a connection wiring (e.g., the first connection wiring CL1) having a bent shape is arranged, so that the touch display device DD can be extended in the second region A2. Thus, the touch display device DD may have a curved shape warped along the strain direction in the second region A2.

[0075] Hereinafter, the layered relationship between the display panel DP and the touch sensor TS included in the touch display device DD will be described more specifically with reference to FIG.

[0076] FIG. 5 is a cross-sectional view showing an example taken along line II' shown in FIG.

[0077] 1 to 5, a touch display device DD according to an embodiment of the present invention, for example a display module DM, may include a display panel DP and a touch sensor TS on the display panel DP.

[0078] At least one transistor TR1, TR2 and a light emitting element LD constituting a pixel may be arranged on a substrate SUB of the display panel DP. For example, at least one transistor TR1, TR2 and a light emitting element LD arranged on the first region A1 may constitute a first pixel PX1, and at least one transistor TR1, TR2 and a light emitting element LD arranged on the second region A2 may constitute a second pixel PX2.

[0079] Meanwhile, the first transistor TR1 among the transistors disposed on the substrate SUB may be a polysilicon semiconductor transistor. For example, the first transistor TR1 may be a p-type MOSFET transistor (PMOS transistor) including a polysilicon semiconductor layer formed through a low temperature poly-silicon (LTPS) process as an active layer (channel).

[0080] Among the transistors disposed on the substrate SUB, the second transistor TR2 may be an oxide semiconductor transistor. For example, the second transistor TR2 may be an n-type MOSFET transistor (NMOS transistor) including an oxide semiconductor layer as an active layer (channel).

[0081] The substrate SUB is a base substrate of the display panel DP and may be a substantially transparent light-transmitting substrate. The substrate SUB may be a flexible substrate made of a plastic material. Here, the flexible property may be interpreted as being bendable, unbreakable, rollable, foldable, etc.

[0082] For example, the substrate SUB may include an elastomer such as silicone rubber (polydimethylsiloxane (PDMS)) or polyurethane (PU). Thus, the substrate SUB may have a property of being able to warp or stretch. However, this is merely an example, and the material of the substrate SUB is not limited thereto.

[0083] Meanwhile, although not separately shown in FIG. 5, a backplate and a metal plate may be further disposed under the substrate SUB.

[0084] A pattern layer PTL may be disposed on the substrate SUB. The pattern layer PTL is for supporting pixels and connection wirings, and may include a plurality of plate patterns and a plurality of connection patterns disposed on the second region A2. The pattern layer PTL will be described in more detail with reference to FIGS. 6 to 8.

[0085] On the substrate SUB (or on the patterned layer PTL) a shielding metal layer may be arranged which comprises at least one shielding metal pattern BSM.

[0086] The shielding metal pattern BSM included in the shielding metal layer may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0087] Depending on the embodiment, the shielding metal pattern BSM may be defined as a component included in the first transistor TR1. For example, the shielding metal pattern BSM may constitute a lower gate electrode of the first transistor TR1.

[0088] The first buffer layer BUF1 may be disposed on the substrate SUB (or the pattern layer PTL). For example, the first buffer layer BUF1 may be disposed on the substrate SUB (or the pattern layer PTL) so as to cover the shielding metal pattern BSM.

[0089] In one embodiment, the first buffer layer BUF1 may include a multi-buffer layer BUF1a disposed on the substrate SUB (or the pattern layer PTL) and an active buffer layer BUF1b disposed on the multi-buffer layer BUF1a.

[0090] The first transistor TR1 may be disposed on the first buffer layer BUF1. The first transistor TR1 may include a first semiconductor pattern ACT1, a first gate electrode G1, a source electrode SE1, and a drain electrode DE1. Depending on the embodiment, as described above, the first transistor TR1 may further include a shielding metal pattern BSM disposed between the first buffer layer BUF1 and the substrate SUB.

[0091] A first semiconductor layer including at least one first semiconductor pattern ACT1 may be disposed on the first buffer layer BUF1.

[0092] For example, in the first semiconductor layer, a first semiconductor pattern ACT1 included in a first transistor TR1 may be disposed on a first buffer layer BUF1. The first semiconductor pattern ACT1 may include a first region S1 (or a source electrode, a source region), a second region D1 (or a drain electrode, a drain region), and a channel region C1 therebetween. Also, as described above, the first semiconductor pattern ACT1 may include a polysilicon semiconductor layer formed through a low temperature poly-silicon (LTPS) process.

[0093] A first gate insulating layer GI1 may be disposed on the first semiconductor layer, e.g., the first semiconductor pattern ACT1. For example, the first gate insulating layer GI1 may be disposed to cover the first semiconductor layer, e.g., the first semiconductor pattern ACT1, and may insulate the first semiconductor pattern ACT1 and the first gate electrode G1 of the first transistor TR1.

[0094] For example, the first gate insulating layer GI1 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof, but is not limited thereto.

[0095] A first conductive layer GAT1 may be disposed on the first gate insulating layer GI1. The first conductive layer GAT1 may constitute at least a part of a light emission control line for providing a light emission control signal to the pixel, a scan line for providing a scan signal, and a power supply line for providing various power supply voltages. Here, when the first conductive layer GAT1 constitutes at least a part of a power supply line for providing a power supply voltage, the first conductive layer GAT1 may be made of a highly conductive material such as a metal or a conductive oxide. For example, the first conductive layer GAT1 may be a single layer or a multilayer including aluminum (Al), copper (Cu), titanium (Ti), etc. In some embodiments, the first conductive layer GAT1 may be made of a triple layer of titanium, aluminum, and titanium (Ti / Al / Ti) sequentially arranged. However, the first conductive layer GAT1 is not limited thereto, and the first conductive layer GAT1 may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0096] In the first conductive layer GAT1, a first gate electrode G1 of a first transistor TR1 constituting at least a part of a light emission control line or a scan line can be disposed on the first gate insulating layer GI1.

[0097] The first gate electrode G1 of the first transistor TR1 may be disposed to at least partially overlap the first semiconductor pattern ACT1.

[0098] A first insulating layer ILD1 may be disposed on the first conductive layer GAT1, for example, the first gate electrode G1 of the first transistor TR1. For example, the first insulating layer ILD1 may be disposed to cover the first conductive layer GAT1, for example, the first gate electrode G1 of the first transistor TR1.

[0099] The first insulating layer ILD1 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof, but is not limited thereto.

[0100] A second conductive layer TM1 may be disposed on the first insulating layer ILD1. The second conductive layer TM1 may include molybdenum (Mo), copper (Cu), titanium (Ti), etc., and may be a single layer or multiple layers.

[0101] A second insulating layer ILD2 may be disposed on the second conductive layer TM1. For example, the second insulating layer ILD2 may be disposed to cover the second conductive layer TM1.

[0102] The second insulating layer ILD2 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof, but is not limited thereto.

[0103] A third conductive layer TM2 may be disposed on the second insulating layer ILD2. The third conductive layer TM2 may include molybdenum (Mo), copper (Cu), titanium (Ti), etc., and may be a single layer or multiple layers.

[0104] For example, in the third conductive layer TM2, the first source electrode SE1 and the first drain electrode DE1 of the first transistor TR1 may be disposed on the second insulating layer ILD2. In the third conductive layer TM2, the first source electrode SE1 of the first transistor TR1 may contact the first region S1 of the first semiconductor pattern ACT1 through a contact hole penetrating the second insulating layer ILD2, the first insulating layer ILD1, and the first gate insulating layer GI1, and in the third conductive layer TM2, the first drain electrode DE1 of the first transistor TR1 may contact the second region D1 of the first semiconductor pattern ACT1 through a contact hole penetrating the second insulating layer ILD2, the first insulating layer ILD1, and the first gate insulating layer GI1.

[0105] A second buffer layer BUF2 may be disposed on the third conductive layer TM2, for example, on the first source electrode SE1 and the first drain electrode DE1 of the first transistor TR1. For example, the second buffer layer BUF2 may be disposed to cover the third conductive layer TM2.

[0106] The second buffer layer BUF2 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof, but is not limited thereto.

[0107] A second semiconductor layer including at least one second semiconductor pattern ACT2 may be disposed on the second buffer layer BUF2.

[0108] For example, in the second semiconductor layer, the second semiconductor pattern ACT2 included in the second transistor TR2 may be disposed on the second buffer layer BUF2. The second semiconductor pattern ACT2 may include a first region S2 (or a source electrode, a source region), a second region D2 (or a drain electrode, a drain region), and a channel region C2 therebetween. As described above, the second semiconductor pattern ACT2 may include an oxide semiconductor layer.

[0109] A second gate insulating layer GI2 may be disposed on the second semiconductor layer, for example, the second semiconductor pattern ACT2. The second gate insulating layer GI2 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof, but is not limited thereto.

[0110] A fourth conductive layer GAT2 may be disposed on the second gate insulating layer GI2. The fourth conductive layer GAT2 may include molybdenum (Mo), copper (Cu), titanium (Ti), etc., and may be a single layer or multiple layers.

[0111] For example, in the fourth conductive layer GAT2, the second gate electrode G2 of the second transistor TR2 constituting at least a part of the scan line can be disposed on the second gate insulating layer GI2.

[0112] The second gate electrode G2 of the second transistor TR2 may be disposed to at least partially overlap the second semiconductor pattern ACT2.

[0113] A third insulating layer ILD3 may be disposed on the fourth conductive layer GAT2, for example, the second gate electrode G2 of the second transistor TR2. For example, the third insulating layer ILD3 may be disposed to cover the fourth conductive layer GAT2, for example, the second gate electrode G2 of the second transistor TR2.

[0114] The third insulating layer ILD3 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multi-layer thereof, but is not limited thereto.

[0115] A fifth conductive layer SD1 may be disposed on the third insulating layer ILD3. The fifth conductive layer SD1 may constitute at least a portion of a power supply wiring that provides a power supply voltage. Here, since the fifth conductive layer SD1 constitutes at least a portion of the power supply wiring that provides a power supply voltage, the fifth conductive layer SD1 may be formed of a highly conductive material such as a metal or a conductive oxide. For example, the fifth conductive layer SD1 may be formed as a single layer or multiple layers including aluminum (Al), copper (Cu), titanium (Ti), etc. In some embodiments, the fifth conductive layer SD1 may be formed as a triple layer of titanium, aluminum, and titanium (Ti / Al / Ti) that are sequentially arranged. However, the fifth conductive layer SD1 is not limited thereto, and the fifth conductive layer SD1 may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0116] At least a part of the fifth conductive layer SD1 can function as a connection electrode. For example, at least a part of the fifth conductive layer SD1 may be connected to at least a part of the third conductive layer TM2 through a contact hole penetrating the third insulating layer ILD3, the second gate insulating layer GI2, and the second buffer layer BUF2, or may be in contact with at least a part of the fourth conductive layer GAT2 through a contact hole penetrating the third insulating layer ILD3.

[0117] Also, at least a part of the fifth conductive layer SD1 may constitute the second source electrode SE2 and the second drain electrode DE2 of the second transistor TR2. For example, in the fifth conductive layer SD1, the second source electrode SE2 of the second transistor TR2 may contact the first region S2 of the second semiconductor pattern ACT2 through a contact hole penetrating the third insulating layer ILD3 and the second gate insulating layer GI2, and the second drain electrode DE2 of the second transistor TR2 in the fifth conductive layer SD1 may contact the second region D2 of the second semiconductor pattern ACT2 through a contact hole penetrating the third insulating layer ILD3 and the second gate insulating layer GI2.

[0118] A first planarization layer PNL1 may be disposed on the fifth conductive layer SD1. The first planarization layer PNL1 may be an organic layer for planarizing the upper portion and protecting components disposed below. For example, the first planarization layer PNL1 may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0119] A sixth conductive layer SD2 may be disposed on the first planarization layer PNL1.

[0120] The sixth conductive layer SD2 may constitute at least a part of a data wiring for providing a data signal to a pixel or a power wiring for providing a high potential power supply voltage. Here, since the sixth conductive layer SD2 constitutes at least a part of a power wiring for providing a power supply voltage, the sixth conductive layer SD2 may be made of a highly conductive material such as a metal or a conductive oxide. For example, the sixth conductive layer SD2 may be a single layer or a multilayer including aluminum (Al), copper (Cu), titanium (Ti), etc. In some embodiments, the sixth conductive layer SD2 may be a triple layer of titanium, aluminum, and titanium (Ti / Al / Ti) arranged in sequence. However, the sixth conductive layer SD2 is not limited thereto, and the sixth conductive layer SD2 may be formed as a single layer or a multilayer of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0121] At least a part of the sixth conductive layer SD2 can function as a connection electrode. For example, at least a part of the sixth conductive layer SD2 can be connected to at least a part of the fifth conductive layer SD1 through a contact hole penetrating the first planarization layer PNL1.

[0122] A second planarization layer PNL2 may be disposed on the sixth conductive layer SD2. The second planarization layer PNL2 may be an organic layer for planarizing the upper portion and protecting components disposed below. For example, the second planarization layer PNL2 may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0123] A seventh conductive layer SD3 may be disposed on the second planarization layer PNL2. The seventh conductive layer SD3 may be formed as a single layer or multiple layers made of any one of molybdenum (Mo), copper (Cu), titanium (Ti), aluminum (Al), chromium (Cr), gold (Au), nickel (Ni), and neodymium (Nd), or an alloy thereof.

[0124] In one embodiment, at least a part of the seventh conductive layer SD3 may function as a shielding pattern SM. For example, the seventh conductive layer SD3 may cause signal interference between a metal or conductive layer (e.g., the first to sixth conductive layers GAT1, GAT2, TM1, TM2, SD1, SD2) located below and the anode electrode AND of the light emitting element LD located above. In this case, the voltage of the anode electrode AND of the light emitting element LD may become unstable, and the display quality of a desired pixel may be degraded. Thus, in the case of the touch display device DD according to the embodiment of the present invention, the seventh conductive layer SD3 disposed on the second planarization layer PNL2 functions as a shielding pattern SM that performs signal shielding between at least a part of the metal or conductive layer located below and the anode electrode AND of the light emitting element LD, thereby improving the display quality.

[0125] Furthermore, at least a part of the seventh conductive layer SD3 can be connected to at least a part of the sixth conductive layer SD2 through a contact hole penetrating the second planarizing layer PNL2.

[0126] A third planarization layer PNL3 may be disposed on the seventh conductive layer SD3. The third planarization layer PNL3 may be an organic layer for planarizing the upper portion and protecting components disposed below. For example, the third planarization layer PNL3 may include an organic material such as an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, or a polyimide resin.

[0127] The light emitting element LD may be disposed on the third planarization layer PNL3. The light emitting element LD may include an anode electrode AND (or a first electrode), a cathode electrode CAD (or a second electrode), and an emission layer EML formed therebetween.

[0128] The anode electrode AND may be disposed on the third planarization layer PNL3.

[0129] On the other hand, when the touch display device DD is a top emission type in which light emitted from the light emitting element LD is emitted to the top of the substrate SUB on which the light emitting element LD is disposed, the anode electrode AND may further include a transparent conductive layer and a reflective layer on the transparent conductive layer. The transparent conductive layer may be made of a transparent conductive oxide such as ITO or IZO, and the reflective layer may include silver (Ag), aluminum (Al), gold (Au), molybdenum (Mo), tungsten (W), chromium (Cr), or an alloy thereof.

[0130] The bank layer BNK can be arranged to cover at least a part of the anode electrode AND, and can leave the remaining part of the anode electrode AND open. For example, the bank layer BNK can be arranged to leave a part corresponding to the light-emitting area of ​​the pixel open. This allows a part of the anode electrode AND to be exposed by the open part of the bank layer BNK.

[0131] The bank layer BNK may include, but is not limited to, inorganic insulating materials such as silicon nitride (SiNx) and silicon oxide (SiOx) or organic insulating materials such as benzocyclobutene-based resin, acrylic resin, or imide-based resin.

[0132] An emitting layer EML may be disposed on the front surface of the pixel on the upper surface of the bank layer BNK and the anode electrode AND, while the opened portion of the bank layer BNK allows a part of the emitting layer EML to contact the exposed part of the anode electrode AND.

[0133] Depending on the embodiment, the light emitting layer EML may include multiple organic films.

[0134] A cathode electrode CAD may be disposed on the emitting layer EML. For example, the cathode electrode CAD may be disposed on the front surface of the pixel. The anode electrode AND, the light emitting layer EML, and the cathode electrode CAD may form a light emitting element LD.

[0135] An encapsulation layer may be disposed on the light emitting element LD. For example, the encapsulation layer may include a first inorganic encapsulation layer PAS1, a first organic encapsulation layer PCL1 on the first inorganic encapsulation layer PAS1, a second inorganic encapsulation layer PAS2 on the first organic encapsulation layer PCL1, a second organic encapsulation layer PCL2 on the second inorganic encapsulation layer PAS2, and a third inorganic encapsulation layer PAS3 on the second organic encapsulation layer PCL2. The first inorganic encapsulation layer PAS1, the second inorganic encapsulation layer PAS2, and the third inorganic encapsulation layer PAS3 may function to block the penetration of moisture and oxygen. For example, the first inorganic encapsulation layer PAS1, the second inorganic encapsulation layer PAS2, and the third inorganic encapsulation layer PAS3 may be made of an inorganic material such as silicon nitride, aluminum nitride, zirconium nitride, titanium nitride, hafnium nitride, tantalum nitride, silicon oxide, aluminum oxide, or titanium oxide. The first inorganic encapsulation layer PAS1, the second inorganic encapsulation layer PAS2, and the third inorganic encapsulation layer PAS3 may be formed by a chemical vapor deposition process or an atomic layer deposition process.

[0136] The first organic encapsulation layer PCL1 may be disposed between the first inorganic encapsulation layer PAS1 and the second inorganic encapsulation layer PAS2, and the second organic encapsulation layer PCL2 may be disposed between the second inorganic encapsulation layer PAS2 and the third inorganic encapsulation layer PAS3. The first organic encapsulation layer PCL1 and the second organic encapsulation layer PCL2 may be formed to a relatively large thickness compared to the first inorganic encapsulation layer PAS1, the second inorganic encapsulation layer PAS2, and / or the third inorganic encapsulation layer PAS3 so as to adsorb and / or block particles that may be generated during the manufacturing process. The first organic encapsulation layer PCL1 and the second organic encapsulation layer PCL2 may be made of an organic material such as silicon oxycarbonate (SiOCz) acrylic or epoxy-based resin. The first organic encapsulation layer PCL1 and the second organic encapsulation layer PCL2 may be formed by a coating process, for example, an inkjet coating process or a slit coating process.

[0137] A touch sensor TS may be disposed on the display panel DP. For example, the touch sensor TS may include a third buffer layer BUF3, a fourth insulating layer ILD4, and a protective layer PAC disposed on a sealing layer of the display panel DP. The third buffer layer BUF3 of the touch sensor TS may be disposed on the sealing layer of the display panel DP.

[0138] When the touch sensor TS is formed on the display panel DP, chemicals (such as a developer or an etchant) used in the process or moisture from the outside may be generated. By disposing the touch sensor TS on the third buffer layer BUF3, it is possible to prevent the chemicals or moisture from penetrating into the emission layer EML containing an organic material during the manufacturing process of the touch sensor TS. As a result, the third buffer layer BUF3 can prevent damage to the emission layer EML, which is vulnerable to chemicals or moisture.

[0139] The third buffer layer BUF3 may include an organic insulating material having a low dielectric constant of 1 to 3 and may be formed at a low temperature (e.g., 100° C.) or less to prevent damage to the light emitting layer EML including an organic material vulnerable to high temperatures. For example, the third buffer layer BUF3 may include an acrylic-based, epoxy-based, or siloxane-based material. Meanwhile, the warping of the touch display device DD may damage the sealing layer of the display panel DP and may crack the metal of the touch sensor TS (e.g., the sensing electrodes TE1, TE2 and / or the bridge electrodes BRG1, BRG2) located on the third buffer layer BUF3. Here, even if the touch display device DD warps, the third buffer layer BUF3 made of an organic insulating material and having planarization performance may prevent damage to the sealing layer of the display panel DP and / or cracking of the metal constituting the touch sensor TS (e.g., the sensing electrodes TE1, TE2 and / or the bridge electrodes BRG1, BRG2).

[0140] A plurality of sensing electrodes TE1, TE2 and bridge electrodes BRG1, BRG2 arranged in different layers may be arranged on the third buffer layer BUF3.

[0141] For example, a plurality of bridge electrodes BRG1, BRG2 may be arranged on the third buffer layer BUF3. As an example, a first bridge electrode BRG1 may be arranged on the third buffer layer BUF3 in the first region A1, and a second bridge electrode BRG2 may be arranged on the third buffer layer BUF3 in the second region A2.

[0142] A fourth insulating layer ILD4 may be disposed on the bridge electrodes BRG1, BRG2. The fourth insulating layer ILD4 may be disposed between the plurality of sensing electrodes TE1, TE2 and the bridge electrodes BRG1, BRG2, and may insulate the plurality of sensing electrodes TE1, TE2 from the bridge electrodes BRG1, BRG2.

[0143] The fourth insulating layer ILD4 may be composed of a single layer of silicon nitride (SiNx) or silicon oxide (SiOx) or a multilayer thereof, but is not limited thereto.

[0144] A plurality of sensing electrodes TE1, TE2 may be disposed on the fourth insulating layer ILD4. For example, a first sensing electrode TE1 may be disposed on the fourth insulating layer ILD4 in the first region A1, and a second sensing electrode TE2 may be disposed on the fourth insulating layer ILD4 in the second region A2.

[0145] According to an embodiment, on the first region A1, the first sensing electrode TE1 may be electrically connected to the first bridge electrode BRG1 through a contact hole penetrating the fourth insulating layer ILD4, and on the second region A2, the second sensing electrode TE2 may be electrically connected to the second bridge electrode BRG2 through a contact hole penetrating the fourth insulating layer ILD4.

[0146] A protective layer PAC may be disposed on the plurality of sensing electrodes TE1, TE2. For example, the protective layer PAC may be disposed on the fourth insulating layer ILD4 so as to cover the plurality of sensing electrodes TE1, TE2.

[0147] The protective layer PAC may be an organic insulating film, but is not limited thereto. For example, the protective layer PAC may include an inorganic material such as silicon nitride (SiNx) and / or silicon oxide (SiOx).

[0148] Meanwhile, as described with reference to FIG. 4, the first connection wiring CL1 that connects adjacent second sensing electrodes TE2 among the plurality of second sensing electrodes TE2 may be arranged on the second region A2.

[0149] 5, at the boundary between the first region A1 and the second region A2, at least a portion of the first sensing electrode TE1 disposed in the first region A1 extends to the second region A2 to form the first connection wiring CL1, and the first connection wiring CL1 may be electrically connected to the second sensing electrode TE2 in the second region A2. As an example, at least a portion of the first sensing electrode TE1 may be disposed to contact the upper surface and side of the fourth insulating layer ILD4 and the side of the third buffer layer BUF3 disposed in the first region A1 and extend to the upper surface of the pattern layer PTL in the second region A2 to be electrically connected to the first connection wiring CL1, and the first connection wiring CL1 may be disposed to contact the side of the third buffer layer BUF3 and the upper surface and side of the fourth insulating layer ILD4 disposed in the second region A2 to be electrically connected to the second sensing electrode TE2 in the second region A2. Therefore, at the boundary between the first region A1 and the second region A2, the first sensing electrode TE1 arranged in the first region A1 and the second sensing electrode TE2 arranged in the second region A2 can be electrically connected to each other through the first connection wiring CL1.

[0150] FIG. 6 is an enlarged view showing an example of a part of the second region of the touch display device of FIG.

[0151] FIG. 7 is a cross-sectional view showing an example taken along the line II-II' shown in FIG.

[0152] FIG. 8 is a cross-sectional view showing an example taken along line III-III' shown in FIG.

[0153] Meanwhile, in order to avoid redundant explanations, the following description will focus on the content that does not overlap with the content described with reference to Figures 1 to 5, and the parts that are not specifically described will follow the above-mentioned embodiments, with the same numbers indicating the same components and similar numbers indicating similar components.

[0154] Referring to Figures 1 to 6, a touch display device DD of an embodiment of the present invention includes a display panel DP and a touch sensor TS arranged on the display panel DP, where the display panel DP includes a substrate SUB, a pattern layer PTL and a plurality of pixels PX1, PX2, and the touch sensor TS includes a plurality of sensing electrodes TE1, TE2.

[0155] As described above, the substrate SUB is the base material of the display panel DP and serves to support and protect the various components of the touch display device DD.

[0156] The substrate SUB may be a ductile substrate capable of reversibly expanding and contracting. Accordingly, the substrate SUB may also be called a stretchable substrate, an elastic substrate, an elongated substrate, a ductile substrate, or a flexible substrate. The modulus of elasticity of the substrate SUB may range from several MPa to several hundred MPa. The ductile breaking rate of the substrate SUB may be 100% or more. Here, the ductile breaking rate refers to the elongation rate at which the object being stretched breaks or cracks.

[0157] A pattern layer PTL may be disposed on the substrate SUB. In one embodiment, the pattern layer PTL may include a plurality of plate patterns PP, a plurality of first connection patterns LP1, and a plurality of second connection patterns LP2 disposed on the second region A2.

[0158] A plurality of plate patterns PP may be disposed on the second region A2. For example, the plate pattern PP may be disposed on an upper portion of the second region A2 of the substrate SUB. Also, as shown in FIG 6, a plurality of second pixels PX2 each including a plurality of sub-pixels SPX and a second sensing electrode TE2 may be disposed and / or formed on the plate pattern PP.

[0159] The plate patterns PP may be spaced apart from one another and disposed on the second area A2 of the substrate SUB. For example, as shown in Fig. 6, the plate patterns PP may be disposed in a matrix form on the second area A2 of the substrate SUB, but this is merely an example and the embodiment of the present invention is not limited thereto.

[0160] The connection patterns LP1, LP2 are disposed between adjacent plate patterns PP to connect them, and may be disposed on the second area A2. The connection patterns LP1, LP2 may be divided into a first connection pattern LP1 and a second connection pattern LP2.

[0161] The multiple first connection patterns LP1 may be disposed on the second region A2. For example, the first connection patterns LP1 may be disposed on an upper portion of the second region A2 of the substrate SUB.

[0162] The first connection pattern LP1 may be a pattern arranged on the second region A2 and connecting adjacent plate patterns PP. Depending on the embodiment, the first connection pattern LP1 may also be referred to as a first wiring (line) pattern. That is, at least one first connection pattern LP1 may be arranged between the plate patterns PP.

[0163] In one embodiment, each of the first connection patterns LP1 may have a curved shape. For example, the first connection pattern LP1 may have a sine wave shape. However, this is merely an example, and the shape of the first connection pattern LP1 is not limited thereto. For example, each of the first connection patterns LP1 may have a zigzag shape. As another example, each of the first connection patterns LP1 may have various shapes, such as a plurality of diamond-shaped substrates connected at their vertices and extending. Thus, the number and shape of the first connection patterns LP1 shown in FIG. 6 are merely an example, and the number and shape of the first connection patterns LP1 may be variously changed according to the design.

[0164] Moreover, a first connection wiring CL1 may be disposed above each of the first connection patterns LP1.

[0165] The second connection patterns LP2 may be arranged on the second region A2. For example, the second connection patterns LP2 may be arranged on an upper portion of the second region A2 of the substrate SUB.

[0166] The second connection pattern LP2 may be a pattern arranged on the second area A2 and connecting adjacent plate patterns PP to each other, similar to the first connection pattern LP1. Depending on the embodiment, the second connection pattern LP2 may also be referred to as a second connection pattern. That is, at least one second connection pattern LP2 may be arranged between the plate patterns PP.

[0167] In one embodiment, the number of second connection patterns LP2 arranged between the plate patterns PP may be greater than the number of first connection patterns LP1 arranged between the plate patterns PP. For example, as shown in Fig. 6, one first connection pattern LP1 may be arranged between the plate patterns PP, and two second connection patterns LP2 may be arranged between the plate patterns PP, but the embodiment of the present invention is not limited thereto. For example, two or more first connection patterns LP1 may be arranged between the plate patterns PP, and / or one or three or more second connection patterns LP2 may be arranged between the plate patterns PP.

[0168] In one embodiment, each of the second connection patterns LP2 may have a curved shape. For example, the second connection pattern LP2 may have a sine wave shape. However, this is merely an example, and the shape of the second connection pattern LP2 is not limited thereto. For example, each of the second connection patterns LP2 may have a zigzag shape. As another example, each of the second connection patterns LP2 may have various shapes, such as a plurality of diamond-shaped substrates connected at their vertices and extending. Thus, the number and shape of the second connection patterns LP2 shown in FIG. 6 are merely an example, and the number and shape of the second connection patterns LP2 may be variously changed according to the design.

[0169] Moreover, a second connection wiring CL2 may be disposed above each second connection pattern LP2.

[0170] In one embodiment, the pattern layer PTL, for example, the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2, may be rigid patterns. For example, the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2 may be rigid compared to the substrate SUB. Therefore, the modulus of elasticity of the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2 may be higher than the modulus of elasticity of the substrate SUB. The modulus of elasticity is a parameter indicating the ratio of deformation to stress applied to the substrate, and when the modulus of elasticity is relatively high, the hardness may be relatively high. Thus, the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2 may also be referred to as first to third rigidity patterns. For example, the elastic modulus of each of the plate pattern PP, the first connection pattern LP1 and the second connection pattern LP2 may be more than 1000 times higher than the elastic modulus of the substrate SUB, but this is by way of example only and embodiments of the present invention are not limited thereto.

[0171] In one embodiment, the pattern layer PTL, e.g., the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2, may each include a plastic material having a lower flexibility than the substrate SUB. For example, the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2 may each include at least one material selected from the group consisting of polyimide (PI), polyacrylate, and polyacetate.

[0172] According to an embodiment, the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2 may be made of the same material, but are not limited thereto and may be made of different materials. When the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2 are made of the same material, the plate pattern PP, the first connection pattern LP1, and the second connection pattern LP2 may be integrally formed.

[0173] As shown in FIG. 6, first connection wirings CL1 may be formed on the second region A2, each extending along the first direction DR1 or the second direction DR2 and arranged on the first connection pattern LP1, and second connection wirings CL2 may be formed on the second connection pattern LP2, each extending along the first direction DR1 or the second direction DR2.

[0174] In one embodiment, the first connection wiring CL1 can electrically connect sensing electrodes, for example, the second sensing electrodes TE2, arranged on the plate patterns PP adjacent to each other.

[0175] For example, referring to FIG. 7 further, the second sensing electrode TE2 included in the touch sensor TS may be disposed on the plate pattern PP of the pattern layer PTL. Here, at least a part of the second sensing electrode TE2 may be disposed and extended so as to contact the upper surface and side surface of the fourth insulating layer ILD4 disposed on the plate pattern PP and the side surface of the third buffer layer BUF3, and may be electrically connected to the first connection wiring CL1 disposed on the first connection pattern LP1. As a result, the first connection wiring CL1 disposed on the first connection pattern LP1 may electrically connect the second sensing electrodes TE2 disposed on the adjacent plate patterns PP. That is, the first connection wiring CL1 may be used as a touch electrode in the second region A2 together with the second sensing electrode TE2.

[0176] In addition, in one embodiment, the second connection wiring CL2 can electrically connect pixels arranged on the plate pattern PP adjacent to each other, for example, the second pixel PX2.

[0177] For example, referring to FIG. 8 further, a second pixel PX2 included in the display panel DP, for example, at least one transistor TR1, TR2 and a light emitting element LD, may be disposed on the plate pattern PP of the pattern layer PTL. Here, at least a part of the seventh conductive layer SD3 included in the second pixel PX2 may be disposed and extended so as to contact the upper surface and side of the second planarization layer PNL2, the side of the first planarization layer PNL1, the side of the third insulating layer ILD3, the side of the second gate insulating layer GI2, the side of the second insulating layer ILD2, the side of the first insulating layer ILD1, the side of the first gate insulating layer GI1 and the side of the first buffer layer BUF1 disposed on the plate pattern PP, and may be electrically connected to the second connection wiring CL2 disposed on the second connection pattern LP2. As a result, the second connection wiring CL2 disposed on the second connection pattern LP2 may electrically connect the second pixels PX2 disposed on the plate pattern PP adjacent to each other.

[0178] In one embodiment, the second connection line CL2 connecting the second pixel PX2 may include various lines such as a gate line (e.g., a scan signal line or a light emission control line), a data line, a high potential voltage line, a low potential voltage line, and an initialization voltage line, etc.

[0179] The first connection wiring CL1 and the second connection wiring CL2 may be made of a metal material such as copper (Cu), aluminum (Al), titanium (Ti), molybdenum (Mo), or a laminated structure of metal materials such as copper / molybdenum-titanium (Cu / MoTi), titanium / aluminum / titanium (Ti / Al / Ti), etc., but are not limited thereto.

[0180] In one embodiment, the first connection line CL1 may be formed simultaneously with a sensing electrode of the touch sensor TS, for example, the second sensing electrode TE2, in the same process. In this case, the first connection line CL1 and the second sensing electrode TE2 may include the same material.

[0181] In one embodiment, the second connection line CL2 may be formed simultaneously with the seventh conductive layer SD3 of the display panel DP in the same process. In this case, the second connection line CL2 and the seventh conductive layer SD3 may include the same material.

[0182] According to an embodiment, as shown in Figures 7 and 8, the first connection line CL1 and the second connection line CL2 may be disposed on the same plane. For example, the first connection line CL1 may be disposed directly on the first connection pattern LP1, and the second connection line CL2 may be disposed directly on the second connection pattern LP2 disposed in the same layer as the first connection pattern LP1. That is, the first connection line CL1 and the second connection line CL2 may be horizontally deposited. This may ensure the flexibility of the touch display device DD in the second region A2.

[0183] As described above, the touch display device according to the embodiment of the present invention includes a display panel and a touch sensor disposed on the display panel, and may include a first region which is a central region and a second region which is an outer region (edge ​​region) surrounding the first region. The touch display device may also include a plurality of plate patterns disposed on the second region and having sensing electrodes disposed thereon, and a connection pattern in which connection wiring is disposed to connect adjacent plate patterns and connect sensing electrodes formed on the plate patterns. Thus, the connection wiring disposed in the outer region may be utilized as a part of the touch electrode.

[0184] In addition, in the case of the touch display device according to the embodiment of the present invention, the second pixels arranged in the second region may be arranged at a lower pixel density than the first pixels arranged in the first region, and thus the touch display device may be deformed in the second region, which is an outer region, and the second region, which is an outer region, may be designed to have a curved shape.

[0185] A touch display device according to various embodiments of the present invention can be described as follows.

[0186] In order to solve the above-mentioned problems, a touch display device according to an embodiment of the present invention includes a first region disposed at a center and a second region surrounding the first region, the touch display device may include a substrate, a display panel including a plurality of first pixels disposed in the first region of the substrate and a plurality of second pixels disposed in the second region of the substrate, and a touch sensor disposed on the display panel, the touch sensor including a plurality of first sensing electrodes disposed in the first region and a plurality of second sensing electrodes disposed in the second region. The plurality of first pixels and the plurality of second pixels may be disposed at different densities, and the plurality of first sensing electrodes and the plurality of second sensing electrodes may be disposed at different densities.

[0187] In one embodiment, the first pixels may be arranged in the first region at a first pixel density, and the second pixels may be arranged in the second region at a second pixel density that is smaller than the first pixel density.

[0188] In one embodiment, the first sensing electrodes may be arranged at a density greater than the density at which the second sensing electrodes are arranged.

[0189] In an embodiment, each of the second sensing electrodes may be disposed corresponding to an area in which each of the second pixels is disposed.

[0190] In an embodiment, the touch sensor may further include a connection wire connecting adjacent ones of the second sensing electrodes.

[0191] In one embodiment, the touch display device may further include a pattern layer including a plurality of plate patterns, a plurality of first connection patterns and a plurality of second connection patterns arranged on the second region of the substrate, and including an insulating material.

[0192] In one embodiment, the multiple plate patterns are arranged at a distance from each other, the first connection pattern connects adjacent plate patterns among the multiple plate patterns, and the second connection pattern connects adjacent plate patterns among the multiple plate patterns.

[0193] In one embodiment, the touch display device further includes a plurality of second connection wirings arranged on the second connection pattern, each of the second pixels is arranged on the upper portion of each of the plurality of plate patterns, and the second connection wirings can electrically connect adjacent second pixels among the second pixels.

[0194] In one embodiment, the touch display device further includes a plurality of first connection wirings arranged on the first connection pattern, each of the second sensing electrodes is arranged on an upper portion of each of the second pixels, and the first connection wirings can electrically connect adjacent second sensing electrodes among the second sensing electrodes.

[0195] In one embodiment, the number of first connection patterns arranged between adjacent plate patterns among the plurality of plate patterns may be less than the number of second connection patterns arranged between the adjacent plate patterns.

[0196] In one embodiment, each of the first connection pattern and the second connection pattern may have a curved shape.

[0197] In one embodiment, the display panel may include a first buffer layer disposed on the pattern layer, a first semiconductor layer disposed on the first buffer layer and including a first semiconductor pattern of a first transistor, a first gate insulating layer disposed on the first semiconductor layer, a first conductive layer disposed on the first gate insulating layer and including a first gate electrode of the first transistor, a first insulating layer disposed on the first conductive layer, a second conductive layer disposed on the first insulating layer, a second insulating layer disposed on the second conductive layer, and a third conductive layer disposed on the second insulating layer and including a first source electrode and a first drain electrode of the first transistor.

[0198] In one embodiment, the display panel may further include a second buffer layer disposed on the third conductive layer, a second semiconductor layer disposed on the second buffer layer and including a second semiconductor pattern of a second transistor, a second gate insulating layer disposed on the second semiconductor layer, a fourth conductive layer disposed on the second gate insulating layer and including a second gate electrode of the second transistor, a third insulating layer disposed on the fourth conductive layer, and a fifth conductive layer disposed on the third insulating layer and including a second source electrode and a second drain electrode of the second transistor.

[0199] In one embodiment, the display panel may further include a first planarization layer disposed on the fifth conductive layer, a sixth conductive layer disposed on the first planarization layer, a second planarization layer disposed on the sixth conductive layer, and a seventh conductive layer disposed on the second planarization layer.

[0200] In one embodiment, the seventh conductive layer may be disposed to extend from the first region to the second connection pattern disposed on the second region.

[0201] In one embodiment, the display panel may further include a light emitting element disposed on the seventh conductive layer, and an encapsulating layer disposed on the light emitting element, The encapsulating layer may include a first inorganic encapsulating layer disposed on the light emitting element, a first organic encapsulating layer disposed on the first inorganic encapsulating layer, a second inorganic encapsulating layer disposed on the first organic encapsulating layer, a second organic encapsulating layer disposed on the second inorganic encapsulating layer, and a third inorganic encapsulating layer disposed on the second organic encapsulating layer.

[0202] In one embodiment, the touch sensor may include a third buffer layer disposed on the display panel, a plurality of bridge electrodes disposed on the third buffer layer, a fourth insulating layer disposed on the plurality of bridge electrodes, a plurality of sensing electrodes disposed on the fourth insulating layer, and a protective layer disposed on the plurality of sensing electrodes.

[0203] In one embodiment, the plurality of bridge electrodes includes a first bridge electrode arranged on the first region and a second bridge electrode arranged on the second region, the plurality of sensing electrodes includes the first sensing electrode arranged on the first region and the second sensing electrode arranged on the second region, and in the first region, the first sensing electrode may be electrically connected to the first bridge electrode through a contact hole penetrating the fourth insulating layer, and in the second region, the second sensing electrode may be electrically connected to the second bridge electrode through a contact hole penetrating the fourth insulating layer.

[0204] In one embodiment, a first sensing electrode of the plurality of sensing electrodes arranged on the first region may be arranged to extend from the first region to the second connection pattern arranged on the second region.

[0205] Although the embodiments of the present invention have been described in more detail, the present invention is not necessarily limited to these embodiments, and various modifications can be made within the scope of the technical idea of ​​the present invention. Therefore, the embodiments disclosed in the present invention are for illustration purposes, not for limiting the technical idea of ​​the present invention, and the scope of the technical idea of ​​the present invention is not limited by these embodiments. Therefore, it should be understood that the embodiments described above are illustrative in all respects and not limiting. The scope of protection of the present invention should be interpreted according to the following claims, and all technical ideas within the scope equivalent thereto should be interpreted as being included in the scope of the present invention.

Claims

1. a display panel including a substrate including a first region disposed in a center of the substrate and a second region surrounding the first region, a plurality of first pixels disposed in the first region of the substrate, and a plurality of second pixels disposed in the second region of the substrate; a touch sensor disposed on the display panel, the touch sensor including a plurality of first sensing electrodes disposed in the first region and a plurality of second sensing electrodes disposed in the second region; the first pixels and the second pixels are arranged at different densities; The first and second sensing electrodes are arranged at different densities.

2. The touch display device according to claim 1 , wherein a density of the first pixels in the first region is greater than a density of the second pixels in the second region.

3. The touch display device of claim 2 , wherein a density of the first sensing electrodes in the first region is greater than a density of the second sensing electrodes in the second region.

4. The touch display device of claim 3 , wherein each of the second sensing electrodes is disposed in a corresponding area where each of the second pixels is disposed.

5. The device of claim 4 , wherein the touch sensor further comprises a connection wire connecting adjacent ones of the second sensing electrodes.

6. a pattern layer including an insulating material; 2. The touch display device of claim 1, wherein the pattern layer further includes a plurality of plate patterns arranged on the second region of the substrate, a plurality of first connection patterns arranged on the second region of the substrate, and a plurality of second connection patterns arranged on the second region of the substrate.

7. The plurality of plate patterns are arranged at a distance from each other, the first connection pattern connects a pair of adjacent plate patterns among the plurality of plate patterns, The touch display device according to claim 6 , wherein the second connection pattern connects the pair of adjacent plate patterns among the plurality of plate patterns.

8. further including a plurality of second connection wirings disposed on the second connection pattern; Each of the second pixels is disposed on an upper portion of each of the plurality of plate patterns, The touch display device of claim 6 , wherein the second connection wiring electrically connects a pair of adjacent second pixels among the second pixels.

9. further comprising a plurality of first connection wirings disposed on the first connection pattern; Each of the second sensing electrodes is disposed on an upper portion of each of the second pixels; The touch display device of claim 8 , wherein the first connection wiring electrically connects a pair of the second sensing electrodes adjacent to each other among the second sensing electrodes.

10. The touch display device of claim 7 , wherein a number of the first connection patterns arranged between the adjacent plate patterns among the plurality of plate patterns is less than a number of the second connection patterns arranged between the adjacent plate patterns.

11. The touch display device of claim 6 , wherein each of the first connection pattern and the second connection pattern has a curved shape.

12. The display panel includes: a first buffer layer disposed on the pattern layer; a first semiconductor layer disposed on the first buffer layer and including a first semiconductor pattern of a first transistor; a first gate insulating layer disposed on the first semiconductor layer; a first conductive layer disposed on the first gate insulating layer and including a first gate electrode of the first transistor; a first insulating layer disposed on the first conductive layer; a second conductive layer disposed on the first insulating layer; a second insulating layer disposed on the second conductive layer; The touch display device of claim 6 , further comprising: a third conductive layer disposed on the second insulating layer and having a first source electrode and a first drain electrode of the first transistor.

13. The display panel includes: a second buffer layer disposed on the third conductive layer; a second semiconductor layer disposed on the second buffer layer and including a second semiconductor pattern of a second transistor; a second gate insulating layer disposed on the second semiconductor layer; a fourth conductive layer disposed on the second gate insulating layer and including a second gate electrode of the second transistor; a third insulating layer disposed on the fourth conductive layer; The touch display device as claimed in claim 12 , further comprising: a fifth conductive layer disposed on the third insulating layer, the fifth conductive layer including a second source electrode and a second drain electrode of the second transistor.

14. The display panel includes: a first planarization layer disposed on the fifth conductive layer; a sixth conductive layer disposed on the first planarization layer; a second planarization layer disposed on the sixth conductive layer; The touch display device of claim 13 , further comprising: a seventh conductive layer disposed on the second planarization layer.

15. The touch display device according to claim 14 , wherein the seventh conductive layer is disposed to extend from the first region to the second connection pattern disposed on the second region.

16. The display panel includes: a light emitting element disposed on the seventh conductive layer; and a sealing layer disposed on the light-emitting element; The sealing layer is A first inorganic sealing layer disposed on the light emitting element; a first organic sealing layer disposed on the first inorganic sealing layer; a second inorganic sealing layer disposed on the first organic sealing layer; a second organic sealing layer disposed on the second inorganic sealing layer; The touch display device of claim 14 , further comprising: a third inorganic encapsulation layer disposed on the second organic encapsulation layer.

17. The touch sensor includes: a third buffer layer disposed on the display panel; a plurality of bridge electrodes disposed on the third buffer layer; a fourth insulating layer disposed on the plurality of bridge electrodes; a plurality of sensing electrodes disposed on the fourth insulating layer; The touch display device of claim 6 , further comprising: a protective layer disposed on the plurality of sensing electrodes.

18. the plurality of bridge electrodes include a first bridge electrode disposed on the first region and a second bridge electrode disposed on the second region; 18. The touch display device of claim 17, wherein in the first region, one of the plurality of first sensing electrodes is electrically connected to the first bridge electrode through a first contact hole penetrating the fourth insulating layer, and in the second region, one of the plurality of second sensing electrodes is electrically connected to the second bridge electrode through a second contact hole penetrating the fourth insulating layer.

19. The touch display device of claim 17 , wherein a first sensing electrode of the plurality of sensing electrodes arranged on the first region extends from the first region to the second connection pattern arranged on the second region.

20. a display panel including a first region, a second region corresponding to a curved edge of a display panel surrounding the first region, a plurality of first pixels in the first region of the display panel configured to emit light, and a plurality of second pixels in the second region of the display panel configured to emit light; a touch sensor on the display panel; The touch sensor includes: a plurality of first sensing electrodes disposed in the first region and configured to sense a touch in the first region; a plurality of second sensing electrodes spaced apart from one another in the second region and configured to sense a touch in the second region; and a plurality of connection wirings in the second region, at least one of the plurality of connection wirings electrically connecting a pair of second sensing electrodes between the pair of second sensing electrodes among the plurality of second sensing electrodes.

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