Semiconductor device

Abstract

To provide a transistor using an oxide semiconductor film, which achieves stable electric characteristics.SOLUTION: A semiconductor device comprises: a first oxide semiconductor film which is formed on an oxide film capable of oxygen release by heat application and which can inhibit release of oxygen at least from the oxide film; and a second oxide semiconductor film formed on the first oxide semiconductor film. With this composition of laminated oxide semiconductor films, release of oxygen from the oxide film is inhibited at the time of forming the second oxide semiconductor film, and oxygen is released from the oxide film by a subsequent heat treatment and the oxygen passes the first oxide semiconductor film, and supply of oxygen to the second oxide semiconductor film can be favorably performed. By supplying oxygen to the second oxide semiconductor film, the occurrence of oxygen deficiency is inhibited thereby to achieve stable electric characteristics.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a semiconductor device including an oxide semiconductor.

[0002] In this specification, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to all semiconductor devices, including transistors, electro-optical devices, semiconductor circuits, and electronic equipment. It is located. [Background technology]

[0003] A technology for constructing transistors using a semiconductor thin film formed on a substrate with an insulating surface. The transistor is used in integrated circuits (ICs) and image display devices (display devices). It is widely used in such electronic devices. Silicon-based semiconductor materials are widely known, but oxide semiconductors are also attracting attention as other materials. is.

[0004] For example, indium (In), gallium (Ga), and A transistor using an amorphous oxide semiconductor film containing zinc (Zn) is disclosed (Patent Document 1). (See Patent Document 1). [Prior art documents] [Patent documents]

[0005] [Patent Document 1] JP 2006-165528 A Summary of the Invention [Problem to be solved by the invention]

[0006] A transistor using an oxide semiconductor film is different from a transistor using an amorphous silicon film. It operates faster than a conventional photodiode (also called high field effect mobility) and uses a polycrystalline silicon film. It has the advantage that it is easier to manufacture than conventional transistors.

[0007] However, some problems have been pointed out regarding transistors using oxide semiconductor films. One of these is the instability of the electrical characteristics of transistors. The transistors are subjected to light irradiation and bias-thermal stress tests (also called BT stress tests). The threshold voltage of the transistor shifts to the negative side, and the transistor tends to be normally on. One of the reasons for this is the oxygen vacancy in the oxide semiconductor film. Examples include:

[0008] For example, when the oxide semiconductor film is amorphous, the metal in the oxide semiconductor film The bonding state between atoms and oxygen atoms is not orderly, and oxygen vacancies are easily formed. As a result, the electrical properties (e.g., electrical conductivity) of the oxide semiconductor film may change. In a transistor using such an oxide semiconductor film, This causes fluctuations in the electrical characteristics of the transistor, thereby reducing the reliability of the semiconductor device using the transistor. This will be the case.

[0009] In addition, as one method for reducing oxygen vacancies generated in an oxide semiconductor film, Oxygen is supplied to the oxide semiconductor film from an oxide film or the like formed near the film to fill the oxygen vacancies. However, in the manufacturing process, the oxide is removed by heat treatment, etc. Before the formation of the semiconductor film (in other words, before oxygen is supplied to the oxide semiconductor film), Oxygen is released from an oxide film or the like formed near the film, and oxygen is not supplied to the oxide semiconductor film. However, there is a risk that this will not be carried out adequately.

[0010] In view of the above problem, in one embodiment of the present invention, a transistor including an oxide semiconductor film is An object of the present invention is to provide a transistor with stable electrical characteristics. [Means for solving the problem]

[0011] On the oxide film that can release oxygen by heating, at least the release of oxygen from the oxide film can be suppressed. A first oxide semiconductor film capable of being formed by a method according to the present invention is formed, and a second oxide semiconductor film is formed over the first oxide semiconductor film. By forming such a stacked oxide semiconductor film, the second oxide semiconductor The release of oxygen from the oxide film is suppressed during the formation of the film, and oxygen is released from the oxide film during the subsequent heat treatment. By this, oxygen can be suitably supplied to the second oxide semiconductor film through the first oxide semiconductor film. By supplying oxygen to the second oxide semiconductor film, the generation of oxygen vacancies is suppressed. As a result, the electrical characteristics become stable.

[0012] The first oxide semiconductor film and the second oxide semiconductor film contain at least indium, The first oxide semiconductor film is an oxide film containing gallium and zinc, and the second oxide semiconductor film is an oxide film containing gallium and zinc. The indium content is smaller and the gallium content is larger than that of the second The oxide semiconductor film is formed on a first oxide semiconductor film made of the same material. It is possible to form a film having crystals growing from the interface with the semiconductor film. That is correct.

[0013] One embodiment of the present invention is a semiconductor device including a first oxide semiconductor film and a second oxide semiconductor film formed over the first oxide semiconductor film. a first oxide semiconductor film and a second oxide semiconductor film, is an oxide film containing at least indium, gallium, and zinc, and the first oxide semiconductor The conductive film has a lower indium content than the second oxide semiconductor film and a lower gallium content. This is a semiconductor device with a high incidence rate.

[0014] Another embodiment of the present invention is a semiconductor device including a first oxide semiconductor film formed over an oxide film and a first A second oxide semiconductor film formed over the oxide semiconductor film and a second oxide semiconductor film formed over the second oxide semiconductor film a gate insulating film formed in a region that is in contact with the gate insulating film and overlaps with the second oxide semiconductor film; and a gate electrode formed on the first oxide semiconductor film and the second oxide semiconductor film. A first oxide semiconductor film containing at least indium, gallium, and zinc. The film has a lower indium content and a higher gallium content than the second oxide semiconductor film. It is a semiconductor device with a large

[0015] In this specification, the content indicates the ratio of a component contained in each film. In this case, the first oxide semiconductor film and the second oxide semiconductor film are often referred to as the first oxide semiconductor film and the second oxide semiconductor film.

[0016] Another embodiment of the present invention is a semiconductor device including a first oxide semiconductor film formed over an oxide film and a first A second oxide semiconductor film formed over the oxide semiconductor film and a second oxide semiconductor film formed over the second oxide semiconductor film a gate insulating film formed in a region that is in contact with the gate insulating film and overlaps with the second oxide semiconductor film; a gate electrode formed on the gate electrode; a protective insulating film formed on the gate electrode; an interlayer insulating film formed on the interlayer insulating film and electrically connected to the second oxide semiconductor film; a source electrode and a drain electrode, The semiconductor film is an oxide film containing at least indium, gallium, and zinc. The oxide semiconductor film has a lower indium content than the second oxide semiconductor film and This is a semiconductor device with a high aluminum content.

[0017] Another embodiment of the present invention is a semiconductor device including a first oxide semiconductor film formed over an oxide film and a first A second oxide semiconductor film formed over the oxide semiconductor film and a second oxide semiconductor film formed over the second oxide semiconductor film a gate insulating film formed in a region that is in contact with the gate insulating film and overlaps with the second oxide semiconductor film; a gate electrode formed on the gate electrode; a protective insulating film formed on the gate electrode; a first opening formed in the gate insulating film, the protective insulating film, and the interlayer insulating film; a second oxide semiconductor film filling the first opening and the second opening; a source electrode and a drain electrode electrically connected to each other; and the second oxide semiconductor film is an oxide semiconductor film containing at least indium, gallium, and zinc. The first oxide semiconductor film has a higher indium content than the second oxide semiconductor film. The semiconductor device is small and has a high gallium content.

[0018] Another embodiment of the present invention is a semiconductor device including a first oxide semiconductor film formed over an oxide film and a first A second oxide semiconductor film formed over the oxide semiconductor film and a second oxide semiconductor film formed over the second oxide semiconductor film a gate insulating film formed in a region that is in contact with the gate insulating film and overlaps with the second oxide semiconductor film; A gate electrode formed on the insulating film in a region overlapping the gate electrode, and a channel rectangular In the cross section in the direction of the gate electrode, the sidewall insulating film formed on the side of the insulating film is The second oxide semiconductor film is electrically connected to the sidewall insulating film. A source electrode, a drain electrode, and a semiconductor layer formed on at least the source electrode and the drain electrode. a protective insulating film and an interlayer insulating film, and a first oxide semiconductor film and a second oxide semiconductor film are formed on the first oxide semiconductor film and the second oxide semiconductor film. The semiconductor film is an oxide film containing at least indium, gallium, and zinc. The oxide semiconductor film has a lower indium content than the second oxide semiconductor film and This is a semiconductor device with a high aluminum content.

[0019] Another embodiment of the present invention is a semiconductor device including a first oxide semiconductor film formed over an oxide film and a first A second oxide semiconductor film formed over the oxide semiconductor film and a second oxide semiconductor film formed over the second oxide semiconductor film a gate insulating film formed in a region that is in contact with the gate insulating film and overlaps with the second oxide semiconductor film; A gate electrode formed on the first oxide semiconductor film and a second oxide semiconductor film on one side in a cross section in a channel length direction. a source electrode in contact with the side surface of the second oxide semiconductor film; and a drain electrode in contact with the other side surface of the second oxide semiconductor film. A first conductive film is formed on one side of the gate electrode, and a second conductive film is formed on the other side of the gate electrode. The second conductive film is formed on the side of the first conductive film and the second conductive film. A gate insulating film and a protection film formed on at least the gate electrode, the source electrode, and the drain electrode. a protective insulating film and an interlayer insulating film; a first oxide semiconductor film and a second oxide semiconductor film; The film is an oxide film containing at least indium, gallium, and zinc, and the first oxide The semiconductor film has a lower indium content than the second oxide semiconductor film and a lower gallium content than the second oxide semiconductor film. This is a semiconductor device with a high content.

[0020] In the above-described structure, at least a part of the first conductive film is connected to the source electrode via the gate insulating film. At least a part of the second conductive film is connected to the drain electrode via the gate insulating film. It is preferable that the substrate is formed on the substrate.

[0021] In this manner, by forming the first conductive film and the second conductive film in contact with the gate electrode, The region that overlaps with the source electrode and the drain electrode via the gate insulating film (also called the Lov region) Therefore, it is possible to suppress the decrease in on-current that accompanies miniaturization. do.

[0022] Another embodiment of the present invention is a semiconductor device including a first oxide semiconductor film formed over an oxide film and a first A second oxide semiconductor film formed over the oxide semiconductor film and a second oxide semiconductor film formed over the second oxide semiconductor film a gate insulating film formed on the second oxide semiconductor film and a gate insulating film formed on the second oxide semiconductor film; A gate electrode covering the gate electrode, a protective insulating film formed on the gate electrode, an interlayer insulating film, and a channel In the longitudinal cross section, the interlayer insulating film, the protective insulating film, the gate insulating film, and the second oxide semiconductor a source electrode in contact with a side surface of the second oxide semiconductor film at an opening penetrating the body film; and and a drain electrode. The first oxide semiconductor film and the second oxide semiconductor film are at least Both of the first and second oxide semiconductor films contain indium, gallium, and zinc. The second oxide semiconductor film has a lower indium content and a higher gallium content than the second oxide semiconductor film. It is a semiconductor device.

[0023] In each of the above structures, the source electrode and the drain electrode are polished by chemical mechanical polishing. It is preferable that the substrate has a planarized surface.

[0024] The source electrode and the drain electrode have surfaces planarized by chemical mechanical polishing. The electrode is formed without etching using a resist mask, so the source Even when the width of the drain electrode and the channel length direction is miniaturized, precise processing is possible. It can be done accurately.

[0025] In each of the above structures, the first oxide semiconductor film includes a low-resistance region and a high-resistance region, It is preferable that a high-resistance region be provided at least outside the second oxide semiconductor film.

[0026] The high-resistance region of the first oxide semiconductor film formed outside the second oxide semiconductor film is This acts as an isolation layer between the transistors. This makes it possible to prevent electrical connection between the transistors.

[0027] In each of the above structures, the second oxide semiconductor film includes a channel region and a In the second oxide semiconductor film, a pair of low-resistance regions are preferably in contact with the channel region. By forming a pair of low-resistance regions in contact with each other, a second oxide semiconductor film, a source electrode, The contact resistance between the drain electrode and the gate electrode can be reduced.

[0028] In each of the above structures, the second oxide semiconductor film has high resistance It is preferable that the second oxide semiconductor film includes a high-resistance region on both sides in a channel width direction of the second oxide semiconductor film. By forming the second oxide semiconductor film, generation of a parasitic channel in the second oxide semiconductor film can be suppressed. This can be done.

[0029] In each of the above structures, the first oxide semiconductor film has a gallium content of about 100%. The second oxide has an indium content equal to or greater than the gallium content. It is preferable that the indium content in the compound semiconductor film is greater than the gallium content in the film. When the content of indium in the second oxide semiconductor film is higher than the content of gallium in the film, In this way, the crystallinity of the second oxide semiconductor film can be improved.

[0030] In each of the above structures, the first oxide semiconductor film has a composition ratio of In:Ga:Zn=1:1:1. Alternatively, the second oxide is formed using an oxide having an atomic ratio of In:Ga:Zn=1:3:2. The semiconductor film is formed using oxides with an atomic ratio of In:Ga:Zn=3:1:2. preferable.

[0031] In each of the above structures, the second oxide semiconductor film includes a crystal portion. It is preferable that the direction of the second oxide semiconductor film is parallel to a normal vector of a surface on which the second oxide semiconductor film is formed. Since the oxide semiconductor film includes a crystal part, metal atoms and oxygen atoms in the second oxide semiconductor film The bonding state is ordered, and the occurrence of oxygen vacancies can be suppressed.

[0032] In each of the above structures, the protective insulating film is an aluminum oxide film. The density of the aluminum film is 3.2g / cm 3 It is preferable that the protective insulating film is formed of such a material. By using the aluminum oxide film, hydrogen, moisture, and the like that penetrate into the second oxide semiconductor film can be prevented. A blocking effect can be obtained that does not allow both impurities and oxygen to pass through the membrane. Effect of the Invention

[0033] A transistor using an oxide semiconductor film and having stable electrical characteristics has been proposed. It can be provided. [Brief description of the drawings]

[0034] [Figure 1] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 2] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Diagram 3] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 4] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Diagram 5] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 6] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 7] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 8] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 9] 1A and 1B are a plan view and a cross-sectional view illustrating an example of a manufacturing process of a semiconductor device. [Figure 10] 1A and 1B are a plan view and a cross-sectional view illustrating an example of a manufacturing process of a semiconductor device. [Figure 11] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 12] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 13] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 14] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 15] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 16] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 17] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 18] 1A and 1B are a plan view and a cross-sectional view illustrating one embodiment of a semiconductor device. [Figure 19] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 20]1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 21] 1A to 1C are cross-sectional views illustrating an example of a manufacturing process of a semiconductor device. [Figure 22] 1A to 1C are a cross-sectional view, a plan view, and a circuit diagram illustrating one embodiment of a semiconductor device. [Diagram 23] 1A and 1B are a circuit diagram and a perspective view illustrating one embodiment of a semiconductor device. [Figure 24] 1A and 1B are a cross-sectional view and a plan view illustrating one embodiment of a semiconductor device. [Diagram 25] FIG. 1 is a circuit diagram illustrating one embodiment of a semiconductor device. [Figure 26] FIG. 1 is a block diagram illustrating one embodiment of a semiconductor device. [Figure 27] FIG. 1 is a block diagram illustrating one embodiment of a semiconductor device. [Figure 28] FIG. 1 is a block diagram illustrating one embodiment of a semiconductor device. [Figure 29] 1 is a flowchart showing a process for producing a sputtering target. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0035] Hereinafter, embodiments of the present invention disclosed in this specification will be described in detail with reference to the drawings. However, the present invention is not limited to the following description, and any deviation from the spirit and scope of the present invention is not permitted. It will be easily understood by those skilled in the art that the form and details of the present invention may be modified in various ways. Therefore, the present invention should not be construed as being limited to the description of the following embodiments. .

[0036] In addition, the position, size, range, etc. of each component shown in the drawings are not necessarily shown in order to facilitate understanding. The actual position, size, range, etc. may not be shown. The present invention is not necessarily limited to the position, size, range, etc. disclosed in the drawings, etc.

[0037] In this specification, ordinal numbers such as "first," "second," and "third" refer to the number of components. It should be noted that this is added to avoid confusion and is not intended to limit the number.

[0038] In this specification, the terms "above" and "below" refer to the positional relationship of components "directly above" or "below." For example, the term "gate electrode on a gate insulating film" does not necessarily mean "directly under" the gate insulating film. If the expression "gate electrode" is used, it excludes those that include other components between the gate insulating film and the gate electrode. do not.

[0039] In addition, the terms "electrode" and "wiring" used in this specification and the like refer to these components functionally. This is not intended to be limiting. For example, an "electrode" may be used as a part of a "wire." , and vice versa. Furthermore, the terms "electrode" and "wiring" may be used interchangeably to refer to the plural "electrodes" and "wirings." This also includes cases where the wiring is formed integrally.

[0040] In addition, the functions of "source" and "drain" may differ when using transistors with different polarities. In some cases, such as when the direction of the current changes during circuit operation, the two may be interchanged. Therefore, in this specification and the like, the terms "source" and "drain" are used interchangeably. It is assumed that this is possible.

[0041] In this specification, "electrically connected" means "something that has some kind of electrical effect" This includes cases where the device is connected via a "device having some electrical function." "of" is not subject to any particular restrictions as long as it enables the transmission and reception of electrical signals between connected objects. For example, "something that has an electrical effect" includes electrodes, wiring, and transistors. These devices have various functions such as switching elements, resistor elements, inductors, capacitors, etc. This includes elements such as:

[0042] (Embodiment 1) In this embodiment mode, one mode of a semiconductor device and a manufacturing method of the semiconductor device will be described with reference to FIGS. This will be explained using:

[0043] <Configuration Example 1 of Semiconductor Device> FIG. 1A to FIG. 1C show a top-gate transistor as an example of a semiconductor device. 1A is a plan view, and FIG. 1B is a cross-sectional view of FIG. 1(A) and FIG. 1(C) corresponds to a cross-sectional view taken along line V1-Y1 in FIG. 1(A). In FIG. 1(A), in order to avoid complication, the cross-sectional view is Some of the components of the semiconductor device (eg, gate insulating film 110, etc.) are omitted.

[0044] The semiconductor device shown in FIG. 1A to FIG. 1C includes an oxide film 104 and a semiconductor device formed on the oxide film 104. The first oxide semiconductor film 106 is formed on the first oxide semiconductor film 106. a second oxide semiconductor film 108 and a gate insulating film formed on the second oxide semiconductor film 108 110, and a region in contact with the gate insulating film 110 and overlapping with the second oxide semiconductor film 108. and a gate electrode 112 formed thereon.

[0045] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are at least The first oxide semiconductor film 106 is an oxide film containing indium, gallium, and zinc. The oxide semiconductor film 104 has a higher gallium content than the second oxide semiconductor film 108.

[0046] In addition, the first oxide semiconductor film 106 has a gallium content that is smaller than the indium content. or the gallium content is greater than the indium content. The compound semiconductor film 108 has a higher indium content than gallium content. By increasing the indium content of the second oxide semiconductor film 108, This can improve the crystallinity of the solid film 108.

[0047] In this manner, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 have a composition In addition, the first oxide semiconductor film 106 is different from the second oxide semiconductor film 108 in the formation of the first oxide semiconductor film 106. The oxygen released from the oxide film 104 can be suppressed.

[0048] Here, a structure in which the first oxide semiconductor film 106 is not formed is considered. The semiconductor film 108 is formed directly on the oxide film 104. For example, the second oxide film 104 may be formed on the oxide film 104. When the oxide semiconductor film 108 is heated at 400° C. or the like, the second oxide semiconductor film 108 is formed. As a result, oxygen is released from the oxide film 104 before the second oxide semiconductor film 108 is heated. After the formation, the amount of oxygen released from the oxide film 104 is reduced, and the second oxide semiconductor film 1 In addition, the oxide film 104 becomes a second oxide film. In the case where the material is different from that of the semiconductor film 108, for example, the oxide film 104 is a silicon oxide film. In this case, silicon, which is a constituent element of the oxide film 104, is insufficient in the second oxide semiconductor film 108. There is a concern that the oxide semiconductor film 108 may be contaminated as a pure substance and may be inhibited from crystallizing.

[0049] However, by adopting the structure shown in this embodiment, for example, after the oxide film 104 is formed, The first oxide semiconductor film 106 is formed at a low temperature (for example, from room temperature to 200° C.). The oxide semiconductor film 108 in the second step is heated at a high temperature (for example, 250° C. or higher and 500° C. or lower, preferably By forming the first oxide semiconductor film 106 at a temperature higher than or equal to 300° C. and lower than or equal to 400° C., In addition, oxygen released from the second oxide semiconductor film 104 can be suppressed. Since the second oxide semiconductor film 08 is formed on the first oxide semiconductor film 106 made of the same material, The semiconductor film 108 is free of impurities or contains very little impurities. Therefore, the oxide semiconductor film having a crystal part growing from the interface with the first oxide semiconductor film 106 is formed. It can be a body membrane.

[0050] That is, the first oxide semiconductor film 106 has a thickness of at least 100 nm. During the deposition, oxygen released from the oxide film 104 is suppressed, and the second oxide semiconductor Since the second oxide semiconductor film 108 functions as a base film, the crystallinity of the second oxide semiconductor film 108 can be improved. In addition, oxygen released from the oxide film 104 is transferred to the second oxide semiconductor film 108. After the formation, the oxide semiconductor film 106 is passed through the first oxide semiconductor film 106 and is then released by heat treatment or the like. The semiconductor film 108 can be supplied with the above-mentioned gas.

[0051] In this manner, the structure in which the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked is By forming the second oxide semiconductor film 108 in the above-described manner, generation of oxygen vacancies in the second oxide semiconductor film 108 can be suppressed. This provides an excellent effect of improving the crystallinity of the oxide semiconductor film 108.

[0052] The crystallinity of the second oxide semiconductor film 108 is improved, so that the gold in the second oxide semiconductor film The bonding state between metal atoms and oxygen atoms is ordered, and the occurrence of oxygen vacancies can be suppressed. Even if oxygen vacancies occur, the oxygen vacancies are compensated for by the supply of oxygen from the oxide film 104. It becomes possible to fill.

[0053] Note that in the first oxide semiconductor film 106, a region overlapping with the gate electrode 112 and A high resistance region 106a is formed on the outside of the second oxide semiconductor film 108, and a gate A pair of low resistance regions 106b are formed adjacent to the region where the second electrode 112 overlaps. In addition, in the second oxide semiconductor film 108, a region overlapping with the gate electrode 112 is A channel region 108a is formed adjacent to the region where the gate electrode 112 overlaps. A pair of low resistance regions 108b are formed.

[0054] In addition, the high resistance region 106a formed outside the second oxide semiconductor film 108 is For example, a high-temperature oxide semiconductor film is formed on the outside of the second oxide semiconductor film 108. In the case where the resistance region 106a is not provided, adjacent transistors are electrically connected to each other. This is because there is a risk of

[0055] A protective insulating film 114 is formed on the gate electrode 112. The interlayer insulating film 116 is formed on the first oxide semiconductor film 114. 1, a source electrode 118a electrically connected to the semiconductor substrate 108, and a drain electrode 118b. The source electrode 118a and the drain electrode 118b may be formed of a second oxide. Since the semiconductor layer 108 is in contact with the pair of low resistance regions 108b formed in the semiconductor layer 108, the contact resistance is can be reduced.

[0056] Here, each component that can be used in the semiconductor device of the present invention will be described in detail. The details are described below.

[0057] [Detailed description of the board] There is no significant limitation on the substrate that can be used for the substrate 102, but at least the substrate that can be used for the subsequent heat treatment is For example, barium borosilicate Glass substrates such as glass and aluminoborosilicate glass, ceramic substrates, quartz substrates, surface treatment Substrates such as fiber substrates can be used. Also, single crystal substrates such as silicon and silicon carbide can be used. Semiconductor substrates such as crystalline semiconductor substrates, polycrystalline semiconductor substrates, compound semiconductor substrates such as silicon germanium, SO It is also possible to use an I substrate or the like.

[0058] [Detailed explanation of oxide film] The oxide film 104 has the effect of preventing the diffusion of impurity elements such as hydrogen and moisture from the substrate 102. The silicon oxide film, the silicon nitride oxide film, and the silicon oxide nitride film are selected from the group consisting of silicon oxide, silicon nitride, and silicon nitride. The oxide film 104 may be formed by a single or multiple layer structure. As another effect, the first oxide semiconductor film 106 and the second oxide semiconductor film 107 to be formed later can be formed by the following steps. It is preferable that the oxide film 104 has an effect of supplying oxygen to the oxide semiconductor film 108. When a silicon oxide film is used, a part of the oxygen is removed by heating the oxide film 104. Since the first oxide semiconductor film 106 and the second oxide semiconductor film 107 can be separated from each other, Oxygen was supplied to the first oxide semiconductor film 106 and the second oxide semiconductor film 108. This can compensate for the oxygen deficiency.

[0059] In particular, the presence of oxygen in the oxide film 104 exceeds the stoichiometric composition. For example, the oxide film 104 is preferably SiO 2+α (where α>0) It is preferable to use such a silicon oxide film as the oxide film 104. By using the above, oxygen can be supplied to the first oxide semiconductor film 106 and the second oxide semiconductor film 108. can be supplied.

[0060] [Detailed Description of First Oxide Semiconductor Film] The first oxide semiconductor film 106 is an oxide semiconductor film containing at least indium, gallium, and zinc. It is a gallium arsenide (In-Ga-Zn) oxide film, and In-Ga-Zn oxide (IGZO) can be used. In-Ga-Zn oxides refer to oxides that contain In, Ga, and Zn. Metal elements other than In, Ga, and Zn may be included. For example, In-Sn-Ga -Zn-based oxide, In-Hf-Ga-Zn-based oxide, In-Al-Ga-Zn-based oxide It can be used.

[0061] In addition, the first oxide semiconductor film 106 contains more indium than the second oxide semiconductor film 108. The first oxide semiconductor film 106 has a low content of gallium and a high content of gallium. is when the gallium content in the film is equal to the indium content or the gallium content is The content of indium is larger than that of Ga. In other words, the oxide with the content of In≦Ga is For example, In:Ga:Zn=1:1:1 or In:Ga:Zn=1: It is recommended to use In-Ga-Zn oxide with an atomic ratio of 3:2 or oxides with a similar composition. .

[0062] The first oxide semiconductor film 106 can be formed by a sputtering method, an ALD method, or the like. Atomic Layer Deposition (ALD), vapor deposition, coating, etc. The thickness of the first oxide semiconductor film 106 is greater than 5 nm and less than 200 nm. The thickness of the first oxide semiconductor film 1 is preferably 10 nm or more and 30 nm or less. 06 can be in a single crystal, polycrystalline (also called polycrystal), or amorphous state. .

[0063] [Detailed Description of Second Oxide Semiconductor Film] The second oxide semiconductor film 108 is an oxide semiconductor film containing at least indium, gallium, and zinc. It is a gallium arsenide (In-Ga-Zn) oxide film, and In-Ga-Zn oxide (IGZO) can be used. In-Ga-Zn oxides refer to oxides that contain In, Ga, and Zn. Metal elements other than In, Ga, and Zn may be included. For example, In-Sn-Ga -Zn-based oxide, In-Hf-Ga-Zn-based oxide, In-Al-Ga-Zn-based oxide It can be used.

[0064] The second oxide semiconductor film 108 contains more indium than the first oxide semiconductor film 106. The second oxide semiconductor film 108 has a high content of gallium and a low content of gallium. In the case of gallium, the indium content in the film is greater than the gallium content. It is recommended to use an oxide with a composition of n>Ga. For example, In:Ga:Zn=3:1:2, Or In-Ga-Zn oxide with an atomic ratio of In:Ga:Zn=2:1:3 or its composition It is preferable to use an oxide in the vicinity of the above.

[0065] The second oxide semiconductor film 108 can be formed by a sputtering method or an ALD method. In addition, the thickness of the second oxide semiconductor film 108 can be determined by a deposition method, a deposition method, a coating method, or the like. is greater than 5 nm and less than 200 nm, preferably greater than 10 nm and less than 30 nm. The second oxide semiconductor film 108 may be single crystal or polycrystalline (also referred to as polycrystalline). It is preferable that the structure has crystallinity, such as microcrystallinity.

[0066] The second oxide semiconductor film 108 is a CAAC-OS (C Axis Aligned Oxide Semiconductor) d) Crystalline Oxide Semiconductor film The CAAC-OS film is not completely single crystalline, nor completely amorphous. The AC-OS film is an oxide semiconductor film having a crystalline-amorphous mixed phase structure in which a crystalline portion is included in an amorphous phase. The crystal part is to be small enough to fit within a cube with one side less than 100 nm. In addition, transmission electron microscopes (TEMs) The observation image by a microscope shows that the amorphous and crystalline parts in the CAAC-OS film are The boundary between the grains and the grain boundaries is not clear. Therefore, the grain boundary-induced defects in the CAAC-OS film cannot be confirmed. The decrease in electron transfer caused by the reaction is suppressed.

[0067] The crystal parts in the CAAC-OS film have c-axes that are normal vectors to the surface on which the CAAC-OS film is formed. The three are aligned parallel to the normal vector of the torus or surface and perpendicular to the ab plane. It has a square or hexagonal atomic arrangement, and the metal atoms are arranged in layers or in a layered fashion when viewed perpendicular to the c-axis. In the crystal structure, metal atoms and oxygen atoms are arranged in layers. The direction of the a and b axes may be different. In this specification, when it is simply described as being vertical, The range of 85° to 95° is also included. The range of 5° or more and 5° or less is also included.

[0068] In the CAAC-OS film, the distribution of the crystal parts may not be uniform. In the process of forming the AC-OS film, when crystals are grown from the surface side of the oxide semiconductor film, The proportion of crystalline parts may be high near the surface. By adding an impurity, the crystalline portion may become amorphous in the region where the impurity is added. .

[0069] The c-axis of the crystal part in the CAAC-OS film is the normal vector of the surface on which the CAAC-OS film is formed. The shape of the CAAC-OS film (the shape of the film) is Depending on the cross-sectional shape of the mating surface or the cross-sectional shape of the surface, they may face in different directions. The direction of the c-axis of the crystal part is the normal vector of the surface on which the CAAC-OS film is formed. The direction of the crystal is parallel to the normal vector of the crystal or the surface. Alternatively, it is formed by carrying out a crystallization treatment such as a heat treatment after the film formation.

[0070] Transistors using CAAC-OS films can be used as transistors when irradiated with visible or ultraviolet light. The fluctuation in the electrical characteristics is small. Also, the fluctuation and variation in the threshold value can be suppressed. Therefore, the transistor is highly reliable.

[0071] In addition, in an oxide semiconductor having a crystal part or crystallinity, defects in the bulk are further reduced. Furthermore, the flatness of the surface of the oxide semiconductor film having a crystal part or crystallinity can be improved. By this, the transistor using the oxide semiconductor can be formed of an oxide semiconductor in an amorphous state. The field-effect mobility of the oxide semiconductor film can be higher than that of a transistor using a semiconductor. In order to improve the flatness of the surface, it is preferable to form an oxide semiconductor on a flat surface. Specifically, the average surface roughness (Ra) is 0.15 nm or less, preferably 0.1 nm or less. It is preferable to form it on a surface.

[0072] In addition, Ra is the arithmetic mean roughness defined in JIS B0601 that can be applied to surfaces. This is a three-dimensional extension of the method, which is based on the principle of averaging the absolute value of the deviation from the reference surface to the specified surface. This can be expressed as the "value obtained by dividing the total number of bits by the number of bits" and is defined by the following formula:

[0073]

number

[0074] Here, the specified surface is the surface to be measured for roughness, and has coordinates (x1, y1, f(x1, y1)),(x1,y2,f(x1,y2)),(x2,y1,f(x2,y1)),( The specified surface is the xy plane, and the rectangular area is represented by four points, x2, y2, f(x2, y2), The area of ​​the rectangle projected onto the surface is S0, and the height of the reference surface (the average height of the specified surface) is Z0. a is taken with an atomic force microscope (AFM). It is measurable.

[0075] In addition, when a CAAC-OS film is used as the second oxide semiconductor film 108, the CA There are three methods for forming an AC-OS film. The first method is to set the film formation temperature at 200°C. By forming the oxide semiconductor film at a temperature of 450° C. or higher, The c-axis of the crystal is aligned parallel to the normal vector of the surface on which it is formed or the normal vector of the surface. The second method is to form a crystal part by depositing a thin oxide semiconductor film and then By performing heat treatment at a temperature higher than or equal to 00° C. and lower than or equal to 700° C., the c-axis of the crystal part included in the oxide semiconductor film is The crystals are aligned in a direction parallel to the normal vector of the surface on which they are formed or in a direction parallel to the normal vector of the surface. The third method is to form a thin oxide semiconductor film on the first layer and then heat it at 200° C. or higher. Heat treatment at 700°C or less is performed, and then a second oxide semiconductor film is formed. The c-axis of the crystal part included in the semiconductor film is the normal vector of the surface on which it is formed or the normal vector of the surface. This is a method for forming crystals aligned in a direction parallel to the crystal grains.

[0076] In addition, the second oxide semiconductor film was formed by heating the substrate 102. It is possible to reduce the concentration of impurities such as hydrogen and water contained in the 108. In addition, the second oxide semiconductor film 108 is preferably made of Al. The film may be formed by the D method, the vapor deposition method, the coating method, or the like.

[0077] Note that the second oxide semiconductor film 108 may be formed using an oxide semiconductor film having crystallinity other than a CAAC-OS film. When a compound semiconductor film (single crystal or microcrystal) is formed, the film formation temperature is not particularly limited. .

[0078] The second oxide semiconductor film 108 has an energy gap of 2.8 eV to 3.2 eV. V, which is larger than the energy gap of silicon, 1.1 eV. The minority carrier density of the nitride semiconductor film 108 is 1×10 -9 / cm3 The true value of silicon carrier density of 1×10 11 / cm 3 is extremely small compared to

[0079] The majority carriers (electrons) of the second oxide semiconductor film 108 flow from the source of the transistor. In addition, since the channel formation region can be completely depleted, The off-state current of the second oxide semiconductor film 108 can be made extremely small. The off-state current of the transistor using this material is 10 yA / μm or less at room temperature and 85°C to 95°C. Even at 20°C, the resistance is extremely small, at less than 1yA / μm.

[0080] In this specification, the off-state current is the drain current in the case of an n-channel transistor. When the potential of the source electrode is set higher than that of the gate electrode, When the potential of the gate electrode is 0 V or less, the potential of the source electrode and the drain electrode This refers to the current that flows between the drain and the insulator in a p-channel transistor. With the potential of the source electrode at a lower potential than the source and gate electrodes, When the potential of the gate electrode is 0V or higher, the source and drain electrodes This refers to the current that flows between

[0081] In addition, the transistor including the second oxide semiconductor film 108 has a smaller S value than the ideal Moreover, the transistor has high reliability.

[0082] [Detailed explanation of gate insulating film] The gate insulating film 110 may be a silicon oxide film, a gallium oxide film, or an aluminum oxide film. , a silicon nitride film, a silicon oxynitride film, an aluminum oxynitride film, or a silicon nitride oxide film. The gate insulating film 110 is made of a material such as a silicon film. It is preferable that the contact portion contains oxygen. At least a stoichiometric amount of oxygen is preferably present, e.g., in the gate insulating layer. When a silicon oxide film is used as the insulating film 110, SiO 2+α (where α>0) By using this silicon oxide film as the gate insulating film 110, Oxygen can be supplied to the second oxide semiconductor film 108, and the electrical characteristics can be improved. can.

[0083] The gate insulating film 110 may be formed of hafnium oxide, yttrium oxide, hafnium Silicate (HfSi x O y x>0, y>0), nitrogen-doped hafnium silicate (HfSiO x N y (x>0, y>0)), hafnium aluminate (HfAl x O y (x>0, y>0)), high-k materials such as lanthanum oxide can be used. By using such a material, the gate leakage current can be reduced. The layer 0 may have a single layer structure or a laminated structure.

[0084] The thickness of the gate insulating film 110 can be set to, for example, 1 nm or more and 500 nm or less. The method for forming the gate insulating film 110 is not particularly limited. For example, sputtering The deposition method, MBE method, PE-CVD method, pulsed laser deposition method, ALD method, etc. can be used appropriately. can.

[0085] [Detailed description of gate electrode] The gate electrode 112 may be made of, for example, molybdenum, titanium, tantalum, tungsten, Metallic materials such as aluminum, copper, neodymium, and scandium, or alloy materials containing these The gate electrode 112 can be made of a conductive metal oxide. Conductive metal oxides include indium oxide (In2O3) and tin oxide. (SnO2), zinc oxide (ZnO), indium tin oxide (In2O3-SnO2, I TO), indium zinc oxide (In2O3-ZnO), or Use of these metal oxide materials containing silicon or silicon oxide The gate electrode 112 can be formed of a single layer or a stacked layer using the above materials. The method of formation is not particularly limited, and may be a deposition method, a PE-CVD method, a sputtering method, or the like. Various film formation methods such as a deposition method, a spin coating method, etc. can be used.

[0086] [Detailed explanation of protective insulating film] The protective insulating film 114 is preferably an inorganic insulating film. Silicon oxide nitride film, aluminum oxide film, aluminum oxide nitride film, gallium oxide film, oxide A single layer or a stacked layer of an oxide insulating film such as a hafnium oxide film may be used. On the oxide insulating film, a silicon nitride film, a silicon nitride oxide film, an aluminum nitride film, a nitride oxide film, A single layer or a multilayer of a nitride insulating film such as an aluminum nitride film may be further formed. For example, a silicon oxide film and an oxide film are formed in this order from the gate electrode 112 side by sputtering. In addition, the protective insulating film 114 can be formed by laminating an aluminum film. Examples of the method include, but are not limited to, sputtering, MBE, PE-CVD, and pulse laser. A deposition method, an ALD method, or the like can be used as appropriate.

[0087] In addition, it is preferable to provide a highly dense inorganic insulating film as the protective insulating film 114. For example, the aluminum oxide film can be formed by a sputtering method. The film is made of high density aluminum (film density 3.2g / cm 3 More than 3.6 g / cm, preferably 3.6 g / cm 3 (The above) As a result, impurities such as hydrogen and moisture that enter the second oxide semiconductor film 108 and This provides a blocking effect that prevents both oxygen and water from passing through the membrane. Therefore, the aluminum oxide film is a second oxide semiconductor film during and after the formation process. The mixing of impurities such as hydrogen and moisture into the second oxide semiconductor film 108, which are factors that affect the quality of the film 108, The second oxide semiconductor film 108 is prevented from being absorbed and released. It functions as a protective film. The film density was measured using the Rutherford backscattering method (RBS). Ford Backscattering Spectrometry and X-ray reflectivity It can be measured by a measurement method (XRR: X-Ray Reflection).

[0088] [Detailed explanation of interlayer insulating film] The interlayer insulating film 116 is preferably an inorganic insulating film. Silicon oxide nitride film, silicon nitride film, silicon oxynitride film are used as a single layer or in a laminated form. The method for forming the interlayer insulating film 116 is not particularly limited. For example, sputtering The deposition method, MBE method, PE-CVD method, pulsed laser deposition method, ALD method, etc. can be used appropriately. can.

[0089] [Detailed description of source and drain electrodes] The source electrode 118a and the drain electrode 118b are made of, for example, aluminum, quartz, or the like. Metal film containing an element selected from chromium, copper, tantalum, titanium, molybdenum, and tungsten or a metal nitride film containing the above-mentioned elements (titanium nitride film, molybdenum nitride film, nitrogen nitride film, etc.) Also, under a metal film such as aluminum or copper, The side or top or both are made of high melting point metals such as titanium, molybdenum, or tungsten. Metal films, or their metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film, etc.) The source electrode 118a and the drain electrode 118b may be laminated. The conductive film used for 18b may be formed of a conductive metal oxide. Examples include indium oxide (In2O3), tin oxide (SnO2), zinc oxide (ZnO), and indium oxide (InO3). Indium tin oxide (In2O3-SnO2, abbreviated as ITO), indium zinc oxide The material used for the source and drain electrodes is In2O3-ZnO. The conductive film can be formed as a single layer or a multilayer using the above-mentioned materials. There is no particular limitation, and the deposition method, PE-CVD method, sputtering method, spin coating method, etc. A seed deposition method can be used.

[0090] Details of the other components will be described later in the manufacturing method 1 of the semiconductor device. This will be explained with reference to Figures 2 and 3.

[0091] <Method 1 for manufacturing semiconductor device> Hereinafter, a method for manufacturing the semiconductor device shown in FIG. 1 according to this embodiment will be described with reference to FIGS. An example of the above will be described.

[0092] First, a substrate 102 is prepared. Next, an oxide film 104 and a first oxide semiconductor are formed on the substrate 102. A film 106 and a second oxide semiconductor film 108 are formed (see FIG. 2A).

[0093] Furthermore, before the oxide film 104 is formed, the substrate 102 may be subjected to a plasma treatment or the like. For example, the plasma treatment may be a reverse plasma treatment in which argon gas is introduced to generate plasma. In the reverse sputtering, the substrate 10 is sputtered in an argon atmosphere. A voltage is applied to the second side using an RF power source to generate plasma near the substrate 102 to modify the surface. In place of the argon atmosphere, nitrogen, helium, oxygen, etc. may be used. When reverse sputtering is performed, powdery substances (particles) adhering to the surface of the substrate 102 are , also called garbage) can be removed.

[0094] The second oxide semiconductor film 108 can be formed by etching the oxide semiconductor film 102 using a dry etching method. Conductive film etching is performed. BCl3, Cl2, O2, etc. are used as etching gas. To improve the etching rate, a high-density plasma source such as ECR or ICP is used. A dry etching apparatus can be used. In the process, the second oxide semiconductor film 106 is formed so as not to be processed into an island shape. The etching conditions for the conductive film 108 can be appropriately selected by the practitioner. The semiconductor film 108 preferably has a taper at an angle of 20° to 50° at its edge.

[0095] Note that the oxide film 104, the first oxide semiconductor film 106, and the second oxide semiconductor film 108 It is preferable to form the first oxide semiconductor film continuously without exposing it to the air. It is preferable to form the oxide semiconductor film 106 and the second oxide semiconductor film 108 in succession. As shown in FIG. 1, the oxide film 104, the first oxide semiconductor film 106, and the second oxide semiconductor film 108 are By continuously forming the film without exposing it to the air, moisture and hydrogen contained in the air can be eliminated. Therefore, it is possible to suppress the intrusion of impurity elements into each interface.

[0096] In addition, in the deposition process of the first oxide semiconductor film 106 and the second oxide semiconductor film 108, In this case, hydrogen or water is added to the first oxide semiconductor film 106 and the second oxide semiconductor film 108. For example, the first oxide semiconductor film 106 and the second oxide semiconductor film 107 are preferably not contained as much as possible. As a pretreatment for the deposition of the oxide semiconductor film 108, The substrate 102 on which the oxide film 104 is formed is preheated, and the substrate 102 and the oxide film 104 are absorbed. It is preferable to desorb and exhaust impurities such as adsorbed hydrogen and moisture. The temperature is set to a temperature at which no or only a small amount of oxygen is released from the oxide film 104. In addition, the formation of the first oxide semiconductor film 106 and the second oxide semiconductor film 108 is preferably During the deposition, it is preferable to perform the deposition in a deposition chamber from which residual moisture has been evacuated. More preferably, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are Using a multi-chamber sputtering device with multiple deposition chambers, It is preferable to form the film in this manner.

[0097] In order to remove moisture from the preheating chamber and the film forming chamber, an adsorption type vacuum pump, e.g. For example, it is preferable to use a cryopump, an ion pump, or a titanium sublimation pump. The exhaust means may be a turbo pump with a cold trap added. The preheating chamber and the film-forming chamber are evacuated using a cryopump, and are filled with hydrogen atoms, water ( Compounds containing hydrogen atoms (and more preferably compounds containing carbon atoms) such as HO are exhausted. Therefore, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 The concentration of impurities such as hydrogen and moisture can be reduced.

[0098] In this embodiment, the first oxide semiconductor film 106 is made of an oxide semiconductor film having an atomic ratio of In:Ga. A metal oxide target having a composition of Zn=1:1:1 was used to form the second oxide semiconductor film 108. A metal oxide target with an atomic ratio of In:Ga:Zn=3:1:2 was used for sputtering. The first oxide semiconductor film 106 and the second oxide semiconductor film 107 are formed by a deposition method. The targets that can be used for the film 108 are limited in material and composition of these targets. In addition, the first oxide semiconductor film 106 and the second oxide semiconductor film The target that can be used in the laser 108 is a target having crystallinity such as a single crystal or a polycrystal. By using a target having crystallinity, the thin film formed is also crystalline. In particular, the thin film formed tends to have crystals oriented along the c-axis.

[0099] Here, the oxide semiconductor has a crystal region in which the c-axis is parallel to the normal vector of the upper surface. A method for producing a sputtering target will be described (see FIG. 29).

[0100] First, the raw material of the sputtering target is weighed (step S101).

[0101] Here, InO is used as the raw material for the sputtering target. X Raw materials (raw materials containing In ), GaO Y Raw materials (including Ga) and ZnO Z Prepare raw materials (containing Zn) Note that X, Y, and Z are any positive numbers. For example, X is 1.5, Y is 1.5, and Z is 1. Of course, the above raw materials are only examples, and appropriate raw materials may be used to obtain the desired compound. For example, GaO Y Instead of raw materials, MO Y Raw materials may also be used. M may be Sn, Hf or Al, or M may be a lanthanide, La, C e, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Er, Tm, Yb or Lu In this embodiment, an example using three kinds of raw materials is shown, but the present invention is not limited to this. For example, this embodiment may be applied to the case where four or more kinds of raw materials are used.

[0102] Next, InO X Raw material, GaO Y Raw materials and ZnO Z The ingredients are mixed in a specified ratio.

[0103] The predetermined ratio is, for example, InO X Raw material, GaO Y Raw materials and ZnO Z The raw materials are :2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3, 1:1:2, 3:1:4 Or the molar ratio is 3:1:2. By using a mixed material with such a ratio, The sputtering process is carried out using an oxide semiconductor having a crystal region in which the c-axis is parallel to the normal vector of the upper surface. This makes it easier to obtain targets for targeting.

[0104] More specifically, In-Ga having a composition of In:Ga:Zn=1:1:1 [atomic ratio] To prepare a-Zn oxide sputtering target, use In2O3:Ga2O3 Weigh out each raw material so that the molar ratio of ZnO is 1:1:2.

[0105] In addition, GaO Y Instead of raw materials, MO Y When using the raw material, InO X Raw materials, MO Y raw material and ZnOZ raw material is 2:2:1, 8:4:3, 3:1:1, 1:1:1, 4:2:3 , the molar ratio may be 1:1:2, 3:1:4 or 3:1:2.

[0106] First, a method for producing a sputtering target using a wet method will be described. After weighing the raw materials for the ring target, the raw materials are crushed and mixed in a ball mill or the like to obtain compound powder. The compound powder is then mixed with ion-exchanged water, organic additives, etc. to prepare a slurry. is created (step S111).

[0107] The slurry is then poured into a mold lined with a moisture-permeable filter to remove the moisture. The mold may be made of metal or oxide and has a rectangular or round top surface. The mold may have a structure in which one or more holes are provided at the bottom. By providing several filters, the water in the slurry can be removed quickly. Resin, cloth, etc. may be used.

[0108] The water in the slurry is removed through holes in the bottom of the mold into which the slurry is poured. The slurry from which the water has been removed by the reduced pressure drainage is then Allow to air dry. This will remove the moisture from the slurry, which will then be molded to the shape of the inside of the mold. (Step S113).

[0109] Next, the obtained compact is fired at 1400° C. in an oxygen (O2) atmosphere (step S 114) In this manner, a sputtering target can be obtained using the wet method.

[0110] Next, a method for producing a sputtering target using a dry method will be described. After weighing the raw materials for the ring target, the raw materials are crushed and mixed in a ball mill to obtain compound powder. It is produced (step S121).

[0111] The obtained compound powder is spread in a mold and pressed with a press device to form a powder of the compound. The powder is molded to obtain a compact (step S122).

[0112] The obtained compact is placed in a heating device such as an electric furnace and heated at 1400°C in an oxygen (O2) atmosphere. In this embodiment, steps S122 and S123 are performed. A method in which the molding process and the baking process are separate, such as S123, is called the cold press method. In contrast to the cold press method, the hot press method is a method in which the molding and baking processes are carried out simultaneously. The topless method is described below.

[0113] First, the above-mentioned steps up to step S121 are carried out. The obtained compound powder is spread in a mold. The mold was heated at 1000°C in an argon (Ar) atmosphere, and the carbide in the mold was The compound powder is pressed by a press device. In this way, the compound powder is pressed while being fired. In this way, the compound powder can be molded to obtain a molded body (step S125). In this manner, a sputtering target can be obtained by the dry method.

[0114] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are formed using a rare gas ( Typically, under an argon atmosphere, oxygen atmosphere, or a mixture of rare gas and oxygen atmosphere. The film can be formed by a sputtering method.

[0115] The temperature at which the first oxide semiconductor film 106 is formed is preferably from room temperature to 200° C. The deposition temperature of the second oxide semiconductor film 108 is preferably 250° C. or higher and 50° C. or lower. The temperature is preferably 0° C. or lower, and more preferably 300° C. or higher and 400° C. or lower.

[0116] In this manner, the first oxide semiconductor film 106 is formed at a low temperature (room temperature or higher and 200° C. or lower). The oxide semiconductor film 108 in step 2 is formed at a high temperature (250° C. or higher and 500° C. or lower). The oxygen released from the film 104 is suppressed, and the crystallinity of the second oxide semiconductor film 108 is improved. It can be done.

[0117] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 were formed immediately after deposition. In this case, it is preferable to make the mixture in a supersaturated state with more oxygen than in the stoichiometric composition. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are formed by a sputtering method. When forming a film, it is preferable to form the film under conditions in which the proportion of oxygen in the film forming gas is high, and particularly It is preferable to form the film in an oxygen atmosphere (100% oxygen gas). For example, the first oxide The semiconductor film 106 and the second oxide semiconductor film 108 are made of an In-Ga-Zn oxide ( IGZO) was used, and the deposition gas was made under conditions where the proportion of oxygen in the deposition gas was high (especially in an atmosphere of 100% oxygen gas). When the film is formed in a vacuum atmosphere, the release of Zn from the film is suppressed even if the film formation temperature is 300°C or higher. do.

[0118] The first oxide semiconductor film 106 was formed using the above-mentioned metal oxide target. In such a case, the composition of the target may differ from the composition of the thin film formed on the substrate. For example, when a metal oxide target with an atomic ratio of In:Ga:Zn=1:1:1 is used, The composition of the first oxide semiconductor film 106, which is a thin film, is In:G The atomic ratio of a:Zn may be 1:1:0.6-0.8. This is because the first oxidation During the formation of the oxide semiconductor film 106 and the second oxide semiconductor film 108, ZnO is sublimated. Or, the sputtering rates of the In2O3, Ga2O3, and ZnO components are different. It is believed that this is the case.

[0119] Therefore, when it is desired to form a thin film of a desired composition, a metal oxide target is first prepared. For example, the composition of the first oxide semiconductor film 106, which is a thin film, needs to be adjusted. In the case where the atomic ratio is In:Ga:Zn=1:1:1, the metal oxide ter The composition of the target should be In:Ga:Zn=1:1:1.5 [atomic ratio]. In other words, the ZnO content of the metal oxide target may be increased in advance. The composition of the thin film is not limited to the above values ​​and can be adjusted appropriately depending on the film formation conditions and the composition of the thin film to be formed. In addition, by increasing the ZnO content of the metal oxide target, This is preferable because it improves the crystallinity of the resulting thin film. The second oxide semiconductor film 108 is similarly described. In order to form a thin film of a desired composition, the composition of the metal oxide target is adjusted. You may do so.

[0120] The relative density of the metal oxide target is 90% or more and 100% or less, preferably 95% By using a metal oxide target with a high relative density, The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are dense films. It is possible.

[0121] In addition, when the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are formed, The sputtering gas used is free of impurities such as hydrogen, water, hydroxyl, or hydrides. It is preferred to use high purity purge gases.

[0122] After the second oxide semiconductor film 108 is formed, the second oxide semiconductor film 108 is Heat treatment may be performed. The temperature of the heat treatment is 300° C. or higher and 700° C. or lower, or By performing the heat treatment, excess water is removed from the second oxide semiconductor film 108. In addition, the heat treatment can remove hydrogen (including water and hydroxyl groups) from the surface of the substrate. In this case, it is sometimes referred to as dehydration treatment (dehydrogenation treatment).

[0123] However, when the dehydration process is performed, there is a possibility that oxygen may be released from the oxide film 104 at the same time. Therefore, the temperature of the dehydration treatment is set so that excess hydrogen (water or The temperature is set to a temperature at which the oxide film 104 can be prevented from being desorbed of oxygen. In addition, oxygen is released from the oxide film 104 by the dehydrogenation treatment. However, since the first oxide semiconductor film 106 is formed, the oxide film 104 is not Therefore, the desorption of oxygen from the catalyst can be suppressed, and the dehydrogenation treatment can be carried out effectively.

[0124] The heat treatment is carried out, for example, by placing the workpiece in an electric furnace using a resistance heating element and heating the workpiece in a nitrogen atmosphere. The treatment can be performed under the conditions of air, 450° C., and 1 hour. During this time, the second oxide semiconductor film 10 8 should not be exposed to the air and should be prevented from being contaminated with water or hydrogen.

[0125] The heat treatment device is not limited to an electric furnace, and may be a device that uses heat conduction from a medium such as a heated gas or heat A device that heats the workpiece by radiation may be used. For example, a GRTA (Gas Reactor Atomic (GRTA) apid Thermal Anneal) equipment, LRTA (Lamp Rapid T RTA (Rapid Thermal Anneal) equipment, etc. al) equipment can be used. The LRTA equipment can be a halogen lamp, a metal halide lamp, lamp, xenon arc lamp, carbon arc lamp, high pressure sodium lamp, high pressure mercury lamp This is a device that heats the workpiece by radiating light (electromagnetic waves) emitted from a lamp or other light source. The GRTA device is a device that performs heat treatment using high-temperature gas. An inert gas that does not react with the workpiece during heat treatment, such as a rare gas such as argon or nitrogen. The body is used.

[0126] For example, the heat treatment may be performed by placing the workpiece in a heated inert gas atmosphere for several minutes. After the heating, the workpiece may be taken out of the inert gas atmosphere and subjected to GRTA treatment. GRTA processing allows high-temperature heat treatment in a short time. The present invention can be applied even under temperature conditions exceeding 100°C. During the treatment, inert gas is used instead of oxygen. It is also possible to switch to a gas containing

[0127] The inert gas atmosphere is nitrogen or a rare gas (helium, neon, argon It is preferable to use an atmosphere that contains, as its main component, hydrogen, water, etc. For example, nitrogen and rare gases such as helium, neon, and argon introduced into a heat treatment device. The purity of is 6N (99.9999%) or more, preferably 7N (99.99999%) or more. (That is, the impurity concentration is 1 ppm or less, preferably 0.1 ppm or less).

[0128] In addition, when the above-described dehydration treatment (dehydrogenation treatment) is performed, the second oxide semiconductor film 108 is formed. At the same time, oxygen, the main component of the oxide, may be desorbed and reduced. In the semiconductor film 108, oxygen vacancies exist at the locations where oxygen is desorbed, and the oxygen vacancies cause As a result, donor levels occur that cause fluctuations in the electrical characteristics of the transistor. When the treatment (dehydrogenation treatment) is performed, oxygen is supplied into the second oxide semiconductor film 108. By supplying oxygen into the second oxide semiconductor film 108, Oxygen vacancies in the second oxide semiconductor film 108 can be filled.

[0129] As an example of a method for filling the oxygen vacancies in the second oxide semiconductor film 108, After the semiconductor film 108 is subjected to a dehydration treatment (dehydrogenation treatment), the semiconductor film 108 is subjected to a high-purity oxygen treatment in the same furnace. Gas, high purity nitrous oxide gas, or ultra dry air (CRDS (cavity ring down laser) When measured using a dew point meter that uses the laser spectroscopy method, the moisture content is 20 ppm (-10 ppm in terms of dew point). 55°C), preferably 1 ppm or less, more preferably 10 ppb or less) It is preferable that the oxygen gas or nitrous oxide gas does not contain water, hydrogen, etc. Alternatively, the purity of the oxygen gas or nitrous oxide gas introduced into the heat treatment device is 6N (99. 9999%) or more, preferably 7N (99.99999%) or more (i.e., oxygen gas or The impurity concentration in the nitrous oxide gas is kept at 1 ppm or less, preferably 0.1 ppm or less. is preferred.

[0130] As an example of a method for supplying oxygen to the second oxide semiconductor film 108, The compound semiconductor film 108 is provided with oxygen (at least any of oxygen radicals, oxygen atoms, and oxygen ions). By adding oxygen to the second oxide semiconductor film 108, oxygen is supplied to the second oxide semiconductor film 108. The methods of addition include ion implantation, ion doping, and plasma immersion ion implantation. Plantation methods, plasma treatment, etc. are used.

[0131] As an example of a method for supplying oxygen to the second oxide semiconductor film 108, 4, or by heating the gate insulating film 110 to be formed later, a part of the oxygen is removed. The second oxide semiconductor film 108 is supplied with oxygen by isolating the first oxide semiconductor film 108 from the first oxide semiconductor film 108. The oxygen released from the oxide film 104 passes through the first oxide semiconductor film 106 and is converted into the second oxide semiconductor film 107. It is preferable to supply oxygen to the organic semiconductor film 108 .

[0132] As described above, after the second oxide semiconductor film 108 is formed, a dehydration treatment (dehydrogenation The second oxide semiconductor film 108 is subjected to a treatment to remove hydrogen or moisture, and impurities are extremely removed. The hydrogen is then dehydrated (dehydrogenated) to reduce the amount of hydrogen. The oxygen thus collected is added to the second oxide semiconductor film 108, or oxygen is supplied to the second oxide semiconductor film 108. It is preferable to compensate for the oxygen deficiency in the conductive film 108. Supplying oxygen to the oxide semiconductor film 108 may be referred to as oxygen supplying treatment. When the oxygen content of the second oxide semiconductor film 108 is higher than that of the stoichiometric composition, a peroxide is used. This may be referred to as "synthesis treatment."

[0133] In the above, the second oxide semiconductor film 108 is processed into an island shape and then subjected to dehydration treatment (dehydration The configurations of performing the oxygen addition treatment and the nitrogen addition treatment have been described. Before the second oxide semiconductor film 108 is processed into an island shape, This treatment may be performed. In addition, after the formation of the interlayer insulating film 116, which is formed later, a heat treatment may be performed. The oxide film 104 or the gate insulating film 110 is then transferred to the second oxide semiconductor film 108. Oxygen may be provided.

[0134] In this manner, the second oxide semiconductor film 108 is dehydrated by the dehydration treatment (dehydrogenation treatment). The oxygen deficiency is compensated for by oxygen addition treatment, resulting in i-type ( The oxide semiconductor film can be an intrinsic or almost i-type oxide semiconductor film. In the semiconductor film, the number of carriers originating from donors is extremely small (close to zero), and the carriers The concentration is 1×10 14 / cm 3 Less than 1 x 10 12 / cm 3 Less than or equal to 1×10 11 / cm 3 is less than.

[0135] In addition, the second oxide semiconductor film 108 contains almost no impurities such as copper, aluminum, or chlorine. It is desirable to use highly purified materials that do not contain any fluorine or other impurities. These impurities are mixed into the second oxide semiconductor film 108 or are mixed into the second oxide semiconductor film 109. It is preferable to select a process that does not cause adhesion to the surface of the 08. When the impurity adheres to the surface of the second oxide semiconductor film 108, it is necessary to use an acid such as oxalic acid or dilute hydrofluoric acid. A second oxide layer is formed by exposing the material to a sintered body or by plasma treatment (e.g., N2O plasma treatment). It is preferable to remove impurities on the surface of the second oxide semiconductor film 108. The copper concentration of the semiconductor film 108 is 1×10 18 atoms / cm 3 Less than or equal to 1×10 1 7 atoms / cm 3 The aluminum concentration of the second oxide semiconductor film 108 is as follows. is 1×10 18 atoms / cm 3 The salt of the second oxide semiconductor film 108 is as follows. The concentration of the element is 2×10 18 atoms / cm 3 The following applies.

[0136] In addition, impurities such as hydrogen are sufficiently removed from the second oxide semiconductor film 108. , Highly purified by supplying sufficient oxygen to make it supersaturated with oxygen. Specifically, the hydrogen concentration in the second oxide semiconductor film 108 is preferably 5×10 19 atoms / cm 3 Less than 5×10 18 atoms / cm 3 More hopes below Preferably 5 x 10 17 atoms / cm 3The second oxide semiconductor The hydrogen concentration of the film 108 was measured by secondary ion mass spectrometry (SIMS). Mass Spectrometry) is used to measure the amount of oxygen that is present. In order to make the second oxide semiconductor film 108 supersaturated with oxygen, It is preferable to provide an insulating film (such as SiOx) containing excess oxygen in contact with the insulating film.

[0137] For insulating films containing excess oxygen, the film formation conditions in the PE-CVD method or sputtering method should be adjusted appropriately. A SiOx film or a silicon oxynitride film that contains a lot of oxygen is used. If you want to include a lot of excess oxygen in the insulating film, you can use ion implantation, ion doping, or plasma. Oxygen is added to the insulating film by plasma treatment.

[0138] In addition, the hydrogen concentration of the insulating film containing excess oxygen is 7.2×10 20 atoms / cm 3 End In this case, the variation in the initial characteristics of the transistor increases, and the electrical characteristics of the transistor deteriorate. The increase in the L-length dependence of the β-acetylglucosamine content and the large degradation in the BT stress test were due to the excess acid. The hydrogen concentration in the insulating film containing hydrogen is 7.2×10 20 atoms / cm 3 Less than. The hydrogen concentration in the second oxide semiconductor film 108 is 5×10 19 atoms / cm 3 Below, and The hydrogen concentration in the insulating film containing excess oxygen is 7.2×10 20 atoms / cm 3 Less than It is preferable that

[0139] Further, a second oxide semiconductor film 108 is wrapped around the insulating film containing excess oxygen. In order to prevent the second oxide semiconductor film 108 from releasing oxygen, a blocking film (Al It is preferable to provide a filter such as Ox.

[0140] The second oxide semiconductor film 108 is surrounded by an insulating film containing excess oxygen or a blocking film. By this, the second oxide semiconductor film 108 has a composition that is almost the same as the stoichiometric composition. The oxygen concentration can be in a stoichiometric state or in a supersaturated state with more oxygen than in the stoichiometric composition.

[0141] Next, a gate insulating film is formed on the first oxide semiconductor film 106 and the second oxide semiconductor film 108. A film 110 and a conductive film 111 are formed (see FIG. 2B).

[0142] Next, a resist mask is formed over the conductive film 111 by a photolithography process. After etching is performed to form the gate electrode 112, the resist mask is removed ( See Figure 2(C).

[0143] A resist mask for forming the gate electrode 112 is formed by an ink-jet method. If the resist mask is formed by the inkjet method, a photomask is not required. Therefore, the manufacturing cost can be reduced. The gate electrode 112 is etched by dry etching. Either wet etching or dipping may be used, or both may be used.

[0144] Next, a resist mask 132 is formed on the gate insulating film 110 and the gate electrode 112. (See Figure 2(D)).

[0145] Next, the resist mask 132 is selectively exposed and developed by a photolithography process. Then, a resist mask 132a is formed by performing an image forming process. The first oxide semiconductor film 106 and the second oxide semiconductor film 107 are formed by using the mask 132a as a mask. A dopant 142 is introduced into the film 108. The introduction of the dopant 142 causes the first oxide The semiconductor film 106 has a high resistance region 106a and a region adjacent to the region where the gate electrode 112 overlaps. A pair of low-resistance regions 106b are formed in the second oxide semiconductor film 108. A pair of low resistance regions 108a and 108b are adjacent to the region where the gate electrode 112 overlaps. b is formed (see FIG. 3(A)).

[0146] The dopant 142 is added to the first oxide semiconductor film 106 and the second oxide semiconductor film 108. The dopant 142 is an impurity that changes the electrical conductivity of the semiconductor. are nitrogen (N), phosphorus (P), arsenic (As), and antimony (Sb), and boron (B) , Aluminum (Al), Argon (Ar), Helium (He), Neon (Ne), In In, fluorine (F), chlorine (Cl), titanium (Ti), and zinc (Zn). One or more selected from the above can be used.

[0147] The dopant 142 is implanted through other films (for example, the gate insulating film 110). The fluorine-containing compound is then introduced into the first oxide semiconductor film 106 and the second oxide semiconductor film 108. The dopant 142 can be introduced by ion implantation, ion doping, A plasma immersion ion implantation method or the like can be used. For this purpose, it is preferable to use a single ion of the dopant 142 or an ion of a fluoride or chloride. I wish.

[0148] The dopant 142 introduction process is carried out by controlling the implantation conditions such as the acceleration voltage and the dose amount, and the amount of the ion beam passing through the dopant 142. The thickness of the film can be appropriately set and controlled. The phosphorus ions are implanted by ion implantation using a dopant 142. The amount is 1×10 13 ions / cm 2 5×10 or more 16 ions / cm 2 The following should suffice: .

[0149] The concentration of the dopant 142 in the low resistance region 108b is 5×10 18 / cm 3 1 more ×10 22 / cm 3 It is preferable that:

[0150] Furthermore, the dopant 142 may be introduced while the substrate 102 is being heated.

[0151] Note that the first oxide semiconductor film 106 and the second oxide semiconductor film 108 were doped with dopant 1. The process of introducing 42 may be carried out multiple times, and multiple types of dopants may be used.

[0152] After the dopant 142 is introduced, a heat treatment may be performed. The heating conditions are as follows: At a temperature of 300°C to 700°C, preferably 300°C to 450°C, for 1 hour in an oxygen atmosphere. It is preferable to carry out the process under atmospheric pressure. It is also possible to carry out the process under a nitrogen atmosphere, reduced pressure, or in the air (ultra-dry air). A heat treatment may be carried out.

[0153] The second oxide semiconductor film 108 may be a crystalline oxide semiconductor film or a CAAC-OS film. In this case, the introduction of the dopant 142 may cause a part of the film to become amorphous. By performing heat treatment after the introduction of the dopant 142, the second oxide semiconductor film 108 The crystallinity of the film can be restored.

[0154] Next, the resist mask 132a is removed, and the gate insulating film 110 and the gate electrode 112 are left. A protective insulating film 114 and an interlayer insulating film 116 are formed thereon (see FIG. 3B).

[0155] Next, a resist mask is formed on the interlayer insulating film 116 by a photolithography process. The gate insulating film 110, the protective insulating film 114, and the interlayer insulating film 116 are selectively etched. The second oxide semiconductor film 108 (more specifically, After forming an opening reaching the low resistance region 108b formed in the semiconductor substrate 101, the resist mask is removed. (See Figure 3(C)).

[0156] Next, a conductive film is formed in the opening, and then the conductive film is formed by a photolithography process. A resist mask is formed on the film and selectively etched to form a source electrode 118a and The drain electrode 118b is formed (see FIG. 3(D)).

[0157] In this embodiment, as shown in FIG. 3(D), in a cross section in the channel length direction, In this case, the distance between the gate electrode 112 and the opening in which the source electrode 118a is formed and the gate The distance between the electrode 112 and the opening in which the drain electrode 118b is formed is different. This makes it possible to suppress the off-current.

[0158] Through the above steps, the semiconductor device shown in FIG. 1 can be manufactured.

[0159] As shown in this embodiment, the technical idea of ​​the present invention is to form a first oxide film on an oxide film. a first oxide semiconductor film and a second oxide semiconductor film formed on the first oxide semiconductor film. By forming the second oxide semiconductor film, the oxide semiconductor film is not released at least during the formation of the second oxide semiconductor film. The first oxide semiconductor film is used as a base film for the second oxide semiconductor film. In order to make the second oxide semiconductor film function as a second oxide semiconductor film, the crystallinity of the second oxide semiconductor film can be improved. The crystallinity of the oxide semiconductor film is improved, so that oxygen vacancies in the second oxide semiconductor film are reduced. The occurrence of such defects is suppressed, making it possible to provide a transistor with stable electrical characteristics.

[0160] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0161] (Embodiment 2) In this embodiment mode, a modification of the semiconductor device shown in Embodiment 1 and a semiconductor device A manufacturing method of the semiconductor device, which is different from the manufacturing method of the semiconductor device described above, will be described with reference to FIGS. In addition, the same reference numerals as those shown in Figs. 1 to 3 are used and the explanation thereof will be repeated. In addition, detailed explanations of the same parts will also be omitted.

[0162] <Configuration Example 2 of Semiconductor Device> FIG. 4A to FIG. 4C show a top-gate transistor as an example of a semiconductor device. 4A is a plan view, and FIG. 4B is a cross-sectional view of FIG. 4(A) and FIG. 4(C) corresponds to a cross-sectional view taken along line V2-Y2 in FIG. In FIG. 4(A), in order to avoid complication, Some of the components of the semiconductor device (eg, gate insulating film 110, etc.) are omitted.

[0163] The semiconductor device shown in FIG. 4A to FIG. 4C includes an oxide film 104 and a The first oxide semiconductor film 106 is formed on the first oxide semiconductor film 106. a second oxide semiconductor film 108 and a gate insulating film formed on the second oxide semiconductor film 108 110, and a region in contact with the gate insulating film 110 and overlapping with the second oxide semiconductor film 108. and a gate electrode 112 formed thereon.

[0164] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are at least The first oxide semiconductor film 106 is an oxide film containing indium, gallium, and zinc. The oxide semiconductor film 104 has a higher gallium content than the second oxide semiconductor film 108.

[0165] In addition, the first oxide semiconductor film 106 has a gallium content that is smaller than the indium content. or the gallium content is greater than the indium content, and the second oxide semiconductor The conductive film 108 has a higher indium content than gallium content. By increasing the indium content of the oxide semiconductor film 108, The crystallinity of 08 can be improved.

[0166] In this manner, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 have a composition In addition, the first oxide semiconductor film 106 is different from the second oxide semiconductor film 108 in the formation of the first oxide semiconductor film 106. The oxygen released from the oxide film 104 can be suppressed.

[0167] The second oxide semiconductor film 108 is made of the same material as the first oxide semiconductor film 106. Since the first oxide semiconductor film 106 is formed on the first oxide semiconductor film 107, the first oxide semiconductor film 106 has a crystal part that grows from the interface with the first oxide semiconductor film 106. An oxide semiconductor film can be used.

[0168] That is, the first oxide semiconductor film 106 has a thickness of at least 100 nm. During the deposition, oxygen released from the oxide film 104 is suppressed, and the second oxide semiconductor Since the second oxide semiconductor film 108 functions as a base film, the crystallinity of the second oxide semiconductor film 108 can be improved. In addition, oxygen released from the oxide film 104 is transferred to the second oxide semiconductor film 108. After the formation, the oxide semiconductor film 106 is passed through the first oxide semiconductor film 106 and is then released by heat treatment or the like. The semiconductor film 108 can be supplied with the above-mentioned gas.

[0169] In this manner, the structure in which the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked is By forming the second oxide semiconductor film 108 in the above-described manner, generation of oxygen vacancies in the second oxide semiconductor film 108 can be suppressed. This provides an excellent effect of improving the crystallinity of the oxide semiconductor film 108.

[0170] Note that in the first oxide semiconductor film 106, a region overlapping with the gate electrode 112 and A high resistance region 106a is formed on the outside of the second oxide semiconductor film 108, and a gate A pair of low resistance regions 106b are formed adjacent to the region where the second electrode 112 overlaps. In addition, in the second oxide semiconductor film 108, a region overlapping with the gate electrode 112 is A channel region 108a is formed adjacent to the region where the gate electrode 112 overlaps. A pair of low resistance regions 108b are formed.

[0171] In addition, the high resistance region 106a formed outside the second oxide semiconductor film 108 is For example, a high resistance insulating film is formed on the outside of the second oxide semiconductor film 108. In the case where the resistor region 106a is not provided, adjacent transistors are electrically connected to each other. This is because there is a risk that

[0172] A protective insulating film 114 is formed on the gate electrode 112. The interlayer insulating film 116 formed on the gate insulating film 110, the protective insulating film 114, and the interlayer insulating film The first opening 151a and the second opening 151b of the semiconductor substrate 116 are filled with a second oxide semiconductor. a source electrode 118a and a drain electrode 118b electrically connected to the conductor film 108; A wiring 119a electrically connected to the source electrode 118a and a wiring 119b electrically connected to the drain electrode 118b The source electrode 118a may include a wiring 119b that is electrically connected to the source electrode 118a. The drain electrode 118b is a pair of low resistance regions formed in the second oxide semiconductor film 108. Since it is in contact with the region 108b, the contact resistance can be reduced.

[0173] The structure of the semiconductor device shown in this embodiment includes a gate insulating film 110, a protective insulating film 114, and A source electrode 118a filled in the first opening 151a of the interlayer insulating film 116 and a gate The second opening 151b of the insulating film 110, the protective insulating film 114, and the interlayer insulating film 116 is filled with The drain electrode 118b is electrically connected to the source electrode 118a and the drain electrode 118b. In the embodiment, the wiring 119a and the wiring 119b are formed so as to be electrically connected to each other. This differs from the structure of the semiconductor device described in embodiment 1.

[0174] In addition, the semiconductor device shown in this embodiment mode can be manufactured by a method for manufacturing a semiconductor device described later. However, the openings filled with the source electrode 118a and the drain electrode 118b (first openings) The first opening 151a and the second opening 151b are formed in two separate steps. The drain electrode 118a and the drain electrode 118b are formed by dividing the conductive film 118 by CMP processing. Therefore, the source electrode 118a and the drain electrode 118b are formed by photolithography. There is no need to use a roughing process, and there is no effect on the accuracy of the exposure machine or the alignment of the photomask. It is possible to form the source electrode 118a and the drain electrode 118b without any problem. Therefore, the semiconductor device described in this embodiment mode is one of the structures suitable for miniaturization. By adopting such a structure, the source side contact region or the drain side contact region and the gate The distance between the gate electrode 112 and the substrate 111 can be reduced to, for example, 0.05 μm or more and 0.1 μm or less. Therefore, the resistance between the source and drain can be reduced, and the semiconductor device A structure that can improve the electrical characteristics of a device (for example, the on-current characteristics of a transistor) It is.

[0175] Note that the details of each component that can be used in the semiconductor device described in this embodiment will be Since the configuration can be the same as that shown in the first embodiment, the description thereof will be omitted. The configurations not used in form 1 are described below.

[0176] [Detailed wiring explanation] The wiring 119a and the wiring 119b may be made of, for example, aluminum, chromium, copper, or tin. a metal film containing an element selected from the group consisting of aluminum, titanium, molybdenum, and tungsten, or Metal nitride films containing the above elements (titanium nitride film, molybdenum nitride film, tungsten nitride film) In addition, the upper or lower side of a metal film such as aluminum or copper can be used. One or both of the electrodes are covered with a high melting point metal film such as titanium, molybdenum, or tungsten, or These metal nitride films (titanium nitride film, molybdenum nitride film, tungsten nitride film) are laminated. The conductive film used for the wiring 119a and the wiring 119b may be a conductive film. The conductive metal oxide may be indium oxide (In2 O3), tin oxide (SnO2), zinc oxide (ZnO), indium tin oxide (In2O 3-SnO2, abbreviated as ITO), and indium zinc oxide (In2O3-ZnO) are used. The conductive film used for the wiring 119a and the wiring 119b can be formed using the above materials. The method of formation is not particularly limited, and may be a deposition method, a P Various film formation methods such as E-CVD, sputtering, and spin coating can be used. Cut.

[0177] The details of the other components will be described in the manufacturing method 2 of the semiconductor device described later. This will be explained with reference to Figures 5 and 6.

[0178] <Method 2 for manufacturing semiconductor device> Hereinafter, a method for manufacturing the semiconductor device shown in FIG. 4 according to this embodiment will be described with reference to FIGS. An example of the above will be described.

[0179] First, the manufacturing method shown in Embodiment 1 is taken into consideration to manufacture the device up to the state shown in FIG. The cross-sectional view shown in FIG. 5(A) is the same as the cross-sectional view shown in FIG. be.

[0180] Next, a resist mask is formed on the interlayer insulating film 116 by a photolithography process. The gate insulating film 110, the protective insulating film 114, and the interlayer insulating film 116 are selectively etched. The first oxide semiconductor film 108 (more specifically, the low-resistance region 108b) is An opening 151a is formed, and the resist mask is removed (see FIG. 5B).

[0181] In addition, the exposure in the above photolithography process uses ultra-violet light with a short wavelength of several nm to several tens of nm. It is preferable to use extreme ultraviolet light. The exposure by this method has high resolution and a large depth of focus. Therefore, it is possible to form fine patterns. If a sufficiently fine pattern can be formed, other methods such as the inkjet method can be used. The resist mask may be formed by other methods. The material does not need to be photosensitive.

[0182] Next, a resist mask is formed on the first opening 151a and the interlayer insulating film 116, and a gate The insulating film 110, the protective insulating film 114, and the interlayer insulating film 116 are selectively etched. The second oxide semiconductor film 108 (specifically, the low-resistance region 108b) is The opening 151b is formed, and the resist mask is removed (see FIG. 5(C)). The gate electrode 11 is formed on the gate insulating film 110, the protective insulating film 114, and the interlayer insulating film 116. A pair of openings are formed on either side of 2.

[0183] Next, an interlayer insulating film is formed so as to fill the first opening 151a and the second opening 151b. A conductive film 118 is formed over the film 116 (see FIG. 5D).

[0184] Next, a semiconductor device is formed on the interlayer insulating film 116 (at least in the region overlapping the gate electrode 112). The conductive film 118 is then subjected to CMP (Chemical Mechanical Polishing) to remove the conductive film 118. Chemical Mechanical Polishing (Chemical Mechanical Polishing) is used. , a source electrode 118a filled in the first opening 151a and the second opening 151b; And the drain electrode 118b is formed (see FIG. 6(A)).

[0185] In this embodiment, the conductive film 118 is exposed to the surface of the interlayer insulating film 116. A source electrode 118a and a drain electrode 118b are formed by performing a CMP process. Depending on the conditions of the CMP process, the surface of the protective insulating film 114 may also be polished.

[0186] Here, CMP processing is a process for flattening the surface of a workpiece by a combination of chemical and mechanical actions. More specifically, a polishing cloth is attached to the polishing stage, and the workpiece and the polishing While supplying slurry (abrasive) between the cloth and the polishing stage, the polishing stage and the workpiece are rotated or The surface of the workpiece is oscillated to cause a chemical reaction between the slurry and the surface of the workpiece and abrasive polishing. This is a method of polishing the surface of a workpiece by the mechanical abrasive action between the cloth and the workpiece.

[0187] The CMP process may be performed once or multiple times. When performing CMP processing, first polishing with a high polishing rate is performed, followed by finishing polishing with a low polishing rate. It is preferable to perform the above-mentioned polishing. As a result, the flatness of the surfaces of the source electrode 118a, the drain electrode 118b, and the interlayer insulating film 116 is improved. It can be further improved.

[0188] In this embodiment, the conductive film 118 is removed by CMP. However, other polishing methods (polishing) may be used. Alternatively, a polishing process such as a CMP process and an etching process may be used. It is also possible to combine a process such as dry etching or wet etching, and a plasma process. For example, after CMP processing, dry etching processing and plasma processing (reverse sputtering, etc.) The flatness of the treated surface may be improved by performing the polishing process, etching process, plasma When the processes are performed in combination, the order of the processes is not particularly limited. It may be appropriately set according to the unevenness of the surface.

[0189] As described above, the source electrode 118a and the drain electrode 118b are formed on the interlayer insulating film 11. 6, the protective insulating film 114, and the opening (first opening 15) provided in the gate insulating film 110. 1a and the second opening 151b. a region (source side contact region) where the electrode 118a and the second oxide semiconductor film 108 are in contact with each other; , the distance to the gate electrode 112 (L in FIG. 6(A) SG ) is the first opening 151a It is determined by the width of the end and the gate electrode 112. Similarly, the width of the drain electrode 118b and the The region where the oxide semiconductor film 108 of the second electrode 11 contacts the gate electrode 11 (the drain side contact region) 2 (L in Figure 6(A) DG ) indicates the edge of the second opening 151b and the gate electrode 112 and the width is determined by the

[0190] A first opening 151a for providing a source electrode 118a and a drain electrode 118b are formed. When the second opening 151b for providing the first opening is formed in a single process, The minimum processing dimension of the width in the channel length direction of 151a and the second opening 151b is determined by the shape of the mask. Therefore, the first opening 151a and the second opening 151b are limited by the resolution limit of the exposure device used for the formation of the first opening 151a. It is difficult to sufficiently reduce the distance between the source side contact 151b and the opening 151b. The distance (L SG and L DG ) is difficult to miniaturize.

[0191] However, in the manufacturing method shown in this embodiment, the first opening 151a and the second opening Since the opening 151b is formed using two masks, it is not dependent on the resolution limit of the exposure device. Therefore, the position of the opening can be freely set. Or the distance between the drain side contact region and the gate electrode 112 (L SG or L DG ) can be reduced to, for example, 0.05 μm or more and 0.1 μm or less. SG and L D G By reducing the size of the device, the resistance between the source and drain can be reduced, which improves the efficiency of semiconductor devices. The electrical characteristics of the device (for example, the on-current characteristics of a transistor) can be improved.

[0192] In addition, the interlayer insulating film 11 is formed to form the source electrode 118a and the drain electrode 118b. In the step of removing the conductive film 118 on the substrate 6, an etching process using a resist mask is performed. Since no gate insulating film is used, the width of the source electrode 118a and the drain electrode 118b in the channel length direction is Even in the case of miniaturization, precise processing can be performed accurately. In the manufacturing process, fine structures with little variation in shape and characteristics are manufactured with a high yield. It is possible.

[0193] Next, a conductive film is formed on the interlayer insulating film 116, the source electrode 118a, and the drain electrode 118b. Then, a film 119 is formed (see FIG. 6(B)).

[0194] Next, a resist mask is formed on the conductive film 119 by a photolithography process. A wiring 119a electrically connected to the source electrode 118a and a wiring 119b electrically connected to the drain electrode 118b Then, a wiring 119b connected to the wiring 119 is formed (see FIG. 6C).

[0195] Through the above steps, the semiconductor device shown in FIG. 4 can be manufactured.

[0196] As shown in this embodiment, the technical idea of ​​the present invention is to form a first oxide film on an oxide film. a first oxide semiconductor film and a second oxide semiconductor film formed on the first oxide semiconductor film. By forming the second oxide semiconductor film, the oxide semiconductor film is not released at least during the formation of the second oxide semiconductor film. The first oxide semiconductor film is used as a base film for the second oxide semiconductor film. In order to make the second oxide semiconductor film function as a second oxide semiconductor film, the crystallinity of the second oxide semiconductor film can be improved. The crystallinity of the oxide semiconductor film is improved, so that oxygen vacancies in the second oxide semiconductor film are reduced. The occurrence of such defects is suppressed, making it possible to provide a transistor with stable electrical characteristics.

[0197] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0198] (Embodiment 3) In this embodiment, a modified example of the semiconductor device shown in the first embodiment and the second embodiment, and Regarding a manufacturing method of a semiconductor device which is different from the manufacturing methods of the semiconductor device described in Embodiment Mode 1 and Embodiment Mode 2, The following description will be given with reference to Figs. 7 to 12. Note that the reference numerals shown in Figs. 1 to 6 are the same as those in Figs. , similar reference numerals are used and repeated explanations are omitted.

[0199] <Configuration Example 3 of Semiconductor Device> 7A to 7C show a top-gate transistor as an example of a semiconductor device. 7A and 7B show a plan view and a cross-sectional view of the sta. 7(A) and FIG. 7(C) corresponds to a cross-sectional view taken along line V3-Y3 in FIG. In FIG. 7(A), in order to avoid complication, Some of the components of the semiconductor device (eg, gate insulating film 110, etc.) are omitted.

[0200] The semiconductor device shown in FIG. 7A to FIG. 7C includes an oxide film 104 and a The first oxide semiconductor film 106 is formed on the first oxide semiconductor film 106. a second oxide semiconductor film 108 and a gate insulating film formed on the second oxide semiconductor film 108 110, and a region in contact with the gate insulating film 110 and overlapping with the second oxide semiconductor film 108. and a gate electrode 112 formed thereon.

[0201] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are at least The first oxide semiconductor film 106 is an oxide film containing indium, gallium, and zinc. The oxide semiconductor film 104 has a higher gallium content than the second oxide semiconductor film 108.

[0202] In addition, the first oxide semiconductor film 106 has a gallium content that is smaller than the indium content. or the gallium content is greater than the indium content, and the second oxide semiconductor The conductive film 108 has a higher indium content than gallium content. By increasing the indium content of the oxide semiconductor film 108, The crystallinity of 08 can be improved.

[0203] In this manner, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 have a composition In addition, the first oxide semiconductor film 106 is different from the second oxide semiconductor film 108 in the formation of the first oxide semiconductor film 106. The oxygen released from the oxide film 104 can be suppressed.

[0204] The second oxide semiconductor film 108 is made of the same material as the first oxide semiconductor film 106. Since the first oxide semiconductor film 106 is formed on the first oxide semiconductor film 107, the first oxide semiconductor film 106 has a crystal part that grows from the interface with the first oxide semiconductor film 106. An oxide semiconductor film can be used.

[0205] That is, the first oxide semiconductor film 106 has a thickness of at least 100 nm. During the deposition, oxygen released from the oxide film 104 is suppressed, and the second oxide semiconductor Since the second oxide semiconductor film 108 functions as a base film, the crystallinity of the second oxide semiconductor film 108 can be improved. In addition, oxygen released from the oxide film 104 is transferred to the second oxide semiconductor film 108. After the formation, the oxide semiconductor film 106 is passed through the first oxide semiconductor film 106 and is then released by heat treatment or the like. The semiconductor film 108 can be supplied with the above-mentioned gas.

[0206] In this manner, the structure in which the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked is By forming the second oxide semiconductor film 108 in the above-described manner, generation of oxygen vacancies in the second oxide semiconductor film 108 can be suppressed. This provides an excellent effect of improving the crystallinity of the oxide semiconductor film 108.

[0207] Note that in the first oxide semiconductor film 106, a region overlapping with the gate electrode 112 and A high resistance region 106a is formed on the outside of the second oxide semiconductor film 108, and a gate A pair of low resistance regions 106b are formed adjacent to the region where the second electrode 112 overlaps. In addition, in the second oxide semiconductor film 108, a region overlapping with the gate electrode 112 is A channel region 108a is formed adjacent to the region where the gate electrode 112 overlaps. A pair of low resistance regions 108b are formed.

[0208] In addition, the high resistance region 106a formed outside the second oxide semiconductor film 108 is For example, a high resistance insulating film is formed on the outside of the second oxide semiconductor film 108. In the case where the resistor region 106a is not provided, adjacent transistors are electrically connected to each other. This is because there is a risk that

[0209] In addition, the insulating film 113 formed in the region where the gate electrode 112 overlaps and the In the cross section, the side walls formed on the side surfaces of the gate electrode 112 and the insulating film 113 are a second oxide semiconductor A source electrode 118a and a drain electrode 118b are electrically connected to the film 108, and A protective insulating film 114 formed on at least the source electrode 118a and the drain electrode 118b , an interlayer insulating film 116, an insulating film 120 formed on the interlayer insulating film 116, and an insulating film 1 20, the source electrode 11 through an opening provided in the interlayer insulating film 116 and the protective insulating film 114. 8a, and a wiring 119a and a wiring 119b electrically connected to the drain electrode 118b. The source electrode 118a and the drain electrode 118b may include Since the pair of low-resistance regions 108b formed in the second oxide semiconductor film 108 are in contact with each other, , the contact resistance can be reduced.

[0210] The structure of the semiconductor device shown in this embodiment is a gate electrode 112 having an insulating film 113 on the gate electrode 112. A sidewall insulating film 115 is provided on the side surface of the electrode 112. A source electrode 118a and a drain electrode 118b are formed in contact with the first insulating layer 115. The structure of the semiconductor device according to the first embodiment differs from that according to the first embodiment in that the semiconductor device according to the first embodiment has a film 120. .

[0211] In addition, in the semiconductor device described in this embodiment, the source electrode 118a and the drain electrode 11 A conductive film used as 8b is formed on the insulating film 113 and the sidewall insulating film 115. After that, the conductive film is subjected to a planarization process (which can also be called a polishing process) to remove a part of the conductive film. By this, a source electrode 118a and a drain electrode 118b are formed. The source electrode 118a and the drain electrode 118b are formed using a photolithography process. This eliminates the need for a source electrode 11, and is not affected by the accuracy of the exposure machine or the misalignment of the photomask. Therefore, in this embodiment, the drain electrode 118a and the drain electrode 118b can be formed. The semiconductor device shown has a structure suitable for miniaturization.

[0212] Note that the details of each component that can be used in the semiconductor device described in this embodiment will be Since the configuration can be the same as that shown in the first and second embodiments, the description thereof will be omitted. The configurations that are not used in the first and second embodiments will be described below.

[0213] [Detailed Description of Insulating Film and Sidewall Insulating Film] The insulating film 113, the sidewall insulating film 115, and the insulating film 120 are inorganic insulating films. It is preferable to use a silicon oxide film, a silicon oxynitride film, a silicon nitride film, a nitride film, etc. A single layer or a stacked layer of a silicon oxide film may be used. The method for forming the insulating film 115 and the insulating film 120 is not particularly limited. For example, the insulating film 115 and the insulating film 120 may be formed by sputtering. The ring method, MBE method, PE-CVD method, pulsed laser deposition method, ALD method, etc. can be used appropriately. This can be done.

[0214] The details of the other components will be described in the manufacturing method 3 of the semiconductor device described later. This will be explained with reference to FIGS.

[0215] <Method 3 for manufacturing semiconductor device> Hereinafter, a method for manufacturing the semiconductor device shown in FIG. 7 according to this embodiment will be described with reference to FIGS. An example of the above will be described.

[0216] First, the manufacturing method shown in Embodiment 1 is taken into consideration to manufacture the device up to the state shown in FIG. The cross section shown in FIG. 8(A) is the same as the cross section shown in FIG. 2(B). .

[0217] Next, the insulating film 113a is formed over the conductive film 111 (see FIG. 8B).

[0218] Next, a resist mask is formed on the insulating film 113a by a photolithography process. The insulating film 113a and the conductive film 111 are selectively etched to remove the insulating film 113 and the gate electrode 114. Then, a contact electrode 112 is formed (see FIG. 8(C)).

[0219] Next, a resist mask 134 is formed on the gate insulating film 110 and the insulating film 113 ( See Figure 8(D).

[0220] Next, the resist mask 134 is selectively exposed and developed by a photolithography process. An image is then formed to form a resist mask 134a or a resist mask 134b. , a gate electrode 112, an insulating film 113, and a resist mask (resist mask 134a, The first oxide semiconductor film 106 and the second oxide semiconductor film 107 are formed by using the resist mask 134b as a mask. The dopant 142 is introduced into the oxide semiconductor film 108. By introducing the dopant 142, In the first oxide semiconductor film 106, the high-resistance region 106a and the gate electrode 112 overlap with each other. A pair of low-resistance regions 106b are formed adjacent to the second oxide semiconductor film 108. The channel region 108a and the gate electrode 112 are adjacent to each other in the region where the channel region 108a and the gate electrode 112 overlap each other. A resistive region 108b is formed (see FIG. 9(B) and FIG. 10(B)).

[0221] In this embodiment, a dopant 142 is introduced to form the low-resistance region 106b. In order to clearly show the position where the low resistance region 108b is formed, in FIGS. The description will be given with reference to cross-sectional views and plan views.

[0222] 9(A) is a plan view, and FIG. 9(B) is a cross-sectional view taken along line X3-Y3 in FIG. 9(A). 9(C) corresponds to a cross-sectional view taken along line V3-W3 in FIG. In FIG. 9A, in order to avoid complication, only a part of the components of the semiconductor device (for example, For example, the gate insulating film 110 is omitted. 10(B) corresponds to a cross-sectional view taken along the line X3-Y3 in FIG. 10(A), and FIG. 10(C) corresponds to a cross-sectional view taken along the line X3-Y3 in FIG. , corresponds to a cross-sectional view taken along line V3-W3 in FIG. 10(A). In order to avoid complication, only a part of the components of the semiconductor device (for example, the gate insulating film 11 0, etc.) are omitted.

[0223] 9 and 10 show the positions where the low resistance regions 106b and 108b are formed. Two methods for fabricating the device will be described. The method shown in FIG. 9 and the method shown in FIG. Both of the methods shown are aspects of the present invention.

[0224] The differences between the manufacturing methods shown in FIG. 9 and FIG. 10 will be described below.

[0225] In the manufacturing method shown in FIG. 9, the resist mask 134a is formed on the second oxide semiconductor film 1 08 (see Figures 9(A) to 9(C)).

[0226] On the other hand, in the manufacturing method shown in FIG. 10, the resist mask 134b is a second oxide semiconductor. It is formed on the inner side in the long side direction of the conductive film 108 (see FIGS. 10(A) to 10(C)).

[0227] In the manufacturing method shown in FIG. 9, the entire surface other than the channel region 108a becomes the low resistance region 108b. In order to achieve this, the contact regions of the source electrode 118a and the drain electrode 118b to be formed later are On the other hand, in the manufacturing method shown in FIG. The long side direction of the semiconductor substrate 8 is made to have a higher resistance than the low resistance region 108b, similar to the channel region 108a. A parasitic channel (parasitic transistor) that may be formed in the long side direction of the second oxide semiconductor film 108 is It is possible to suppress the formation of staphylococci (also known as staphylococci).

[0228] As described above, the shapes of the resist masks 134a and 134b are changed. By doing so, a semiconductor device having different effects can be manufactured.

[0229] Next, a resist mask (resist mask 134a or resist mask 134b) is Then, an insulating film 115a is formed on the gate insulating film 110 and the insulating film 113 (FIG. 11). (See (A)).

[0230] Next, the insulating film 115a is etched to form the sidewall insulating film 115. The sidewall insulating film 115 is formed by performing a highly anisotropic etching process on the insulating film 115a. By performing this process, the film can be formed in a self-aligned manner. In addition, the etching gas used in the dry etching method is Examples of the fluoroalkyl groups include trifluoromethane, octafluorocyclobutane, and tetrafluoro. Examples of etching gases include gases containing fluorine such as methane. Dry etching is a method of applying a high frequency voltage to a substrate, using reactive ion etching. It is preferable to use a reactive ion etching method (RIE method). After the sidewall insulating film 115 is formed, the gate electrode 112, the insulating film 113, and the side The gate insulating film 110 is processed using the gate wall insulating film 115 as a mask, and a first oxide semiconductor The oxide semiconductor film 106 and the second oxide semiconductor film 108 are exposed (see FIG. 11B). When the sidewall insulating film 115 is formed, the gate insulating film 110 may be processed.

[0231] In this embodiment, in the process immediately after the formation of the gate electrode 112 and the insulating film 113, In this case, the gate electrode 112, the insulating film 113, and the resist mask (resist mask 134a or a resist mask 134b) is used as a mask to cover the first oxide semiconductor film 106 and The dopant 142 is introduced into the second oxide semiconductor film 108. After the formation of 115, the gate electrode 112, the insulating film 113, the sidewall insulating film 115, and The first oxide semiconductor film 106 and the second oxide semiconductor film 107 are formed by using a resist mask as a mask. Dopants 142 may be introduced into the insulating film 108. This provides a sidewall insulating layer. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 overlap with the insulating film 115. The region may be included in the high resistance region.

[0232] Next, the first oxide semiconductor film 106, the second oxide semiconductor film 108, the insulating film 113, and A conductive film is formed so as to cover the sidewall insulating film 115, and the conductive film is subjected to photolithography. A roughening step and an etching step are performed to form a conductive film 118 (see FIG. 11C). .

[0233] Next, the insulating film 114a and the insulating film 114b are formed over the first oxide semiconductor film 106 and the conductive film 118. A film 116a is formed (see FIG. 11(D)).

[0234] Next, a conductive layer is formed on the insulating film 113 (at least in the region overlapping the gate electrode 112). The insulating film 114a, the insulating film 116a, and the conductive film 118 are removed. Then, the insulating film 114a, the insulating film 116a, and the conductive film 118 are separated by performing CMP processing. The protective insulating film 114, the interlayer insulating film 116, the source electrode 118a, and the drain electrode 118b are formed in a state in which the gate electrode 112 is sandwiched therebetween (see FIG. 12(A)).

[0235] In FIG. 12A, the surfaces of the source electrode 118a and the drain electrode 118b, The surfaces of the insulating film 113 and the interlayer insulating film 116 are on the same plane. The surfaces of the source electrode 118a and the drain electrode 118b, the insulating film 113, and the interlayer When the insulating film 116 is polished, the source electrode 118a and the drain electrode 118b are When the polishing speed (or polishing rate) of the film 113 and the interlayer insulating film 116 is different, The surfaces of the source electrode 118a and the drain electrode 118b are connected to the insulating film 113 or the interlayer insulating film. The surface of the film 116 may have different heights and steps. For example, the source electrode 118a, And when the surface of the drain electrode 118b is lower than the surface of the insulating film 113 (is concave), Depending on the CMP processing conditions, the sidewall insulating film 115 may also be polished. It is possible.

[0236] The CMP process here is the same as the CMP process for the conductive film 118 described in the second embodiment. The contents of P processing can be taken into consideration.

[0237] Next, the protective insulating film 114, the interlayer insulating film 116, the source electrode 118a, and the drain electrode An insulating film 120 is formed on 118b (see FIG. 12(B)).

[0238] Next, a resist mask is formed on the insulating film 120 by a photolithography process. The insulating film 114, the interlayer insulating film 116, and the insulating film 120 are selectively etched to form a saw. Openings reaching the source electrode 118a and the drain electrode 118b are formed, and a resist mask is then applied. After that, a conductive film is formed to cover the opening, and a photolithography process is performed. Then, a resist mask is formed on the conductive film, and the conductive film is selectively etched to form wiring 1. Then, the wiring 119a and the wiring 119b are formed (see FIG. 12C).

[0239] Through the above steps, the semiconductor device shown in FIG. 7 can be manufactured.

[0240] As shown in this embodiment, the technical idea of ​​the present invention is to form a first oxide film on an oxide film. a first oxide semiconductor film and a second oxide semiconductor film formed on the first oxide semiconductor film. By forming the second oxide semiconductor film, the oxide semiconductor film is not released at least during the formation of the second oxide semiconductor film. The first oxide semiconductor film is used as a base film for the second oxide semiconductor film. Since the second oxide semiconductor film functions as a second oxide semiconductor film, the crystallinity of the second oxide semiconductor film can be improved. The crystallinity of the second oxide semiconductor film is improved, so that the occurrence of oxygen vacancies in the second oxide semiconductor film is suppressed. This suppresses defects and provides a transistor with stable electrical characteristics.

[0241] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0242] (Embodiment 4) In this embodiment mode, modifications of the semiconductor device described in any one of Embodiments 1 to 3 and A manufacturing method of a semiconductor device different from the manufacturing methods described in any of the embodiments 1 to 3 The following description will be given with reference to Figs. 13 to 17. Note that the reference numerals shown in Figs. , similar reference numerals are used and repeated explanations are omitted.

[0243] <Configuration Example 4 of Semiconductor Device> 13A to 13C show a top-gate transistor as an example of a semiconductor device. 13A is a plan view, and FIG. 13B is a cross-sectional view of a transistor. FIG. 13(C) corresponds to a cross-sectional view taken along line X4-Y4 in FIG. 13(A), and FIG. 13(C) corresponds to a cross-sectional view taken along line X4-Y4 in FIG. It should be noted that in FIG. 13(A), the cross-sectional view is not necessarily drawn in order to avoid complication. In order to avoid this, some of the components of the semiconductor device (such as the gate insulating film 110) are omitted. is doing.

[0244] The semiconductor device shown in FIG. 13A to FIG. 13C includes an oxide film 104 and a A first oxide semiconductor film 106 formed on the first oxide semiconductor film 106 and a second oxide semiconductor film 107 formed on the first oxide semiconductor film 106 are shown in FIG. A second oxide semiconductor film 108 and a gate insulating film 109 formed on the second oxide semiconductor film 108 are formed. A region of the insulating film 110 that is in contact with the gate insulating film 110 and overlaps with the second oxide semiconductor film 108 and a gate electrode 112 formed on the semiconductor substrate 110.

[0245] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are at least The first oxide semiconductor film 106 is an oxide film containing indium, gallium, and zinc. The oxide semiconductor film 104 has a higher gallium content than the second oxide semiconductor film 108.

[0246] In addition, the first oxide semiconductor film 106 has a gallium content that is smaller than the indium content. or the gallium content is greater than the indium content, and the second oxide semiconductor The conductive film 108 has a higher indium content than gallium content. By increasing the indium content of the oxide semiconductor film 108, The crystallinity of 08 can be improved.

[0247] In this manner, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 have a composition In addition, the first oxide semiconductor film 106 is different from the second oxide semiconductor film 108 in the formation of the first oxide semiconductor film 106. The oxygen released from the oxide film 104 can be suppressed.

[0248] The second oxide semiconductor film 108 is made of the same material as the first oxide semiconductor film 106. Since the first oxide semiconductor film 106 is formed on the first oxide semiconductor film 107, the first oxide semiconductor film 106 has a crystal part that grows from the interface with the first oxide semiconductor film 106. An oxide semiconductor film can be used.

[0249] That is, the first oxide semiconductor film 106 has a thickness of at least 100 nm. During the deposition, oxygen released from the oxide film 104 is suppressed, and the second oxide semiconductor Since the second oxide semiconductor film 108 functions as a base film, the crystallinity of the second oxide semiconductor film 108 can be improved. In addition, oxygen released from the oxide film 104 is transferred to the second oxide semiconductor film 108. After the formation, the oxide semiconductor film 106 is passed through the first oxide semiconductor film 106 and is then released by heat treatment or the like. The semiconductor film 108 can be supplied with the above-mentioned gas.

[0250] In this manner, the structure in which the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked is By forming the second oxide semiconductor film 108 in the above-described manner, generation of oxygen vacancies in the second oxide semiconductor film 108 can be suppressed. This provides an excellent effect of improving the crystallinity of the oxide semiconductor film 108.

[0251] Note that in the first oxide semiconductor film 106, a region overlapping with the gate electrode 112 and A high resistance region 106a is formed on the outside of the second oxide semiconductor film 108, and a gate A pair of low resistance regions 106b are formed adjacent to the region where the second electrode 112 overlaps. In addition, in the second oxide semiconductor film 108, a region overlapping with the gate electrode 112 is A channel region 108a is formed adjacent to the region where the gate electrode 112 overlaps. A pair of low resistance regions 108b are formed.

[0252] In addition, the high resistance region 106a formed outside the second oxide semiconductor film 108 is For example, a high resistance insulating film is formed on the outside of the second oxide semiconductor film 108. In the case where the resistor region 106a is not provided, adjacent transistors are electrically connected to each other. This is because there is a risk that

[0253] In addition, in the cross section in the channel length direction, A source electrode 118a is in contact with the other side of the gate electrode 118, a drain electrode 118b is in contact with the other side of the gate electrode 118, and a gate electrode 118c is in contact with the other side of the gate electrode 118. The first conductive film 121a formed on one side of the gate electrode 112 and the other side of the gate electrode 112 The second conductive film 121b, the first conductive film 121a, and the second conductive film 121 The sidewall insulating film 115 formed on the side surface of the first oxide semiconductor film 106 and the second oxide semiconductor film 107 are A source electrode 118a, a drain electrode 118b, a sidewall insulating film 115, and a gate electrode A protective insulating film 114 formed on the electrode 112 and an interlayer insulating film formed on the protective insulating film 114 The film 116 is electrically connected to a source electrode 118a and a drain electrode 118b. The source electrode 1 may include a wiring 119a and a wiring 119b. The drain electrode 118a and the drain electrode 118b are a pair of electrodes formed in the second oxide semiconductor film 108. Since it is in contact with the low resistance region 108b, the contact resistance can be reduced.

[0254] The structure of the semiconductor device shown in this embodiment is such that a first conductive film is formed on both sides of a gate electrode 112. 121a, the second conductive film 121b, and the sidewall insulating film 115 are formed. In addition, in a cross section of the second oxide semiconductor film 108 in the channel length direction, A source electrode 118a is formed in contact with the other side of the semiconductor substrate 110, and a drain electrode 118b is formed in contact with the other side of the semiconductor substrate 110. In this respect, the structure of the semiconductor device according to the present embodiment differs from that of the first embodiment.

[0255] In the semiconductor device shown in this embodiment, a gate electrode 112 is formed on one side of the gate electrode 112. At least a part of the first conductive film 121a is in contact with the source electrode 11 via the gate insulating film 110. 8a and the second conductive film 121b formed on the other side of the gate electrode 112. At least a part of the gate insulating film 110 is formed on the drain electrode 118b. In this manner, the gate electrode 112 (more specifically, the gate electrode 112, the first conductive film A part of the second conductive film 121a and a part of the second conductive film 121b are connected to the source electrode 110 via the gate insulating film 110. By providing a region overlapping with the drain electrode 118a and the drain electrode 118b (also called a Lov region), Therefore, the semiconductor device described in this embodiment mode is suitable for miniaturization and can be further miniaturized. This is one of the structures suitable for suppressing the decrease in on-state current that accompanies this.

[0256] Note that the details of each component that can be used in the semiconductor device described in this embodiment will be Since the configurations can be the same as those shown in the first to third embodiments, the description thereof will be omitted. The configurations that are not used in the first to third embodiments will be described below.

[0257] [Detailed Description of First Conductive Film and Second Conductive Film] The first conductive film 121a and the second conductive film 121b may be any film as long as they are conductive. For example, metal films such as tungsten and titanium, or films containing impurity elements such as phosphorus and boron Alternatively, a polycrystalline silicon film or the like may be formed on the gate electrode 112. A silicon film is formed, and a conductive film is formed by etching in contact with the gate electrode 112. Impurity elements such as phosphorus and boron are introduced into the conductive film by doping, and heat treatment is performed. The first conductive film 121a and the second conductive film 121b may have conductivity.

[0258] Details of the other components will be described in the manufacturing method 4 of the semiconductor device described later. This will be explained with reference to FIGS.

[0259] <Method 4 for manufacturing semiconductor device> 14 to 17, a method for fabricating the semiconductor device shown in FIG. 13 according to this embodiment will be described below. An example of the method will now be described.

[0260] First, the manufacturing method shown in Embodiment 1 is taken into consideration to manufacture the device up to the state shown in FIG. The cross section shown in FIG. 14A is the same as that of the semiconductor device shown in FIG. This is a modification, and only the area of ​​the second oxide semiconductor film 108 is different.

[0261] Next, a conductive film is formed over the first oxide semiconductor film 106 and the second oxide semiconductor film 108. A resist mask is formed on the conductive film by a photolithography process. A conductive film 118 is formed by selective etching (see FIG. 14B).

[0262] Next, the conductive film 118 is subjected to CMP treatment so that the second oxide semiconductor film 108 is exposed. Then, a part of the conductive film 118 is removed. The conductive film 118 in the region overlapping with the source electrode 118a and the drain electrode 11 8b is formed (see FIG. 14(C)).

[0263] The CMP process here is the same as the CMP process for the conductive film 118 described in the second embodiment. The contents of P processing can be taken into consideration.

[0264] Next, the first oxide semiconductor film 106, the second oxide semiconductor film 108, and the source electrode 118 A gate insulating film 110 and a conductive film 111 are formed on the drain electrode 118a and the drain electrode 118b. See Figure 14(D).

[0265] Next, a resist mask is formed over the conductive film 111 by a photolithography process. The film 111 is selectively etched to form a gate electrode 112 (see FIG. 15(A)). ).

[0266] Next, a resist mask 136 is formed on the gate insulating film 110 and the gate electrode 112. (See FIG. 15(B)).

[0267] Next, the resist mask 136 is selectively exposed and developed by a photolithography process. Then, a resist mask 136a is formed by performing an image forming process. The first oxide semiconductor film 106 and the second oxide semiconductor film 107 are formed by using the mask 136a as a mask. A dopant 142 is introduced into the film 108. The introduction of the dopant 142 causes the first oxide The semiconductor film 106 has a high resistance region 106a and a region adjacent to the region where the gate electrode 112 overlaps. A pair of low-resistance regions 106b are formed in the second oxide semiconductor film 108. A pair of low resistance regions 108a and 108b are adjacent to the region where the gate electrode 112 overlaps. b is formed (see FIG. 15(C)).

[0268] In this embodiment, the source electrode 118a and the drain electrode 118b are connected to each other. The dopant 142 is introduced into the first oxide semiconductor film 106, forming a low-resistance region 106. The structure in which the source electrode 118a and The first oxide semiconductor film 106 in the region where the drain electrode 118b overlaps the first oxide semiconductor film 106 forms a high resistance region 10 It may have the same impurity concentration as 6a.

[0269] Next, the resist mask 136a is removed, and the gate insulating film 110 and the gate electrode 112 are left. A conductive film 121 is formed thereon (see FIG. 15D).

[0270] Next, the insulating film 115a is formed over the conductive film 121 (see FIG. 16A).

[0271] Next, the insulating film 115a is etched to form the sidewall insulating film 115. The sidewall insulating film 115 is formed by performing a highly anisotropic etching process on the insulating film 115a. By performing this process, the film can be formed in a self-aligned manner. In addition, the etching gas used in the dry etching method is Examples of the fluoroalkyl groups include trifluoromethane, octafluorocyclobutane, and tetrafluoro. Examples of etching gases include gases containing fluorine such as methane. Dry etching is a method of applying a high frequency voltage to a substrate, using reactive ion etching. It is preferable to use a reactive ion etching method (RIE method). After the sidewall insulating film 115 is formed, the gate electrode 112 and the sidewall insulating film The conductive film 121 and the gate insulating film 110 are processed by using the film 115 as a mask, and the first The oxide semiconductor film 106, the source electrode 118a, and the drain electrode 118b are exposed ( (See FIG. 16B). Note that when the sidewall insulating film 115 is formed, the conductive film 121 and The gate insulating film 110 may be processed. In this embodiment, the conductive film 121 is the first The conductive film 121a and the second conductive film 121b are separated, and the gate insulating film 110 is partially removed. As a result, parts of the surfaces of the source electrode 118a and the drain electrode 118b are exposed.

[0272] Next, the first oxide semiconductor film 106, the gate electrode 112, and the sidewall insulating film 115 , a first conductive film 121a, a second conductive film 121b, a source electrode 118a, and a drain electrode A protective insulating film 114 and an interlayer insulating film 116 are formed to cover the electrode 118b (FIG. 16( See C).

[0273] Next, a resist mask is formed on the interlayer insulating film 116 by a photolithography process. The protective insulating film 114 and the interlayer insulating film 116 are selectively etched to form the source electrode 11 8a and an opening reaching the drain electrode 118b is formed, and the resist mask is removed ( See Figure 16(D).

[0274] Next, a conductive film 119 is formed on the interlayer insulating film 116 so as to fill the opening. See Figure 17(A).

[0275] Next, a resist mask is formed over the conductive film 119 by a photolithography process. The film 119 is selectively etched to form wiring 119a and wiring 119b (FIG. 1 7(B)).

[0276] Through the above steps, the semiconductor device shown in FIG. 13 can be manufactured.

[0277] As shown in this embodiment, the technical idea of ​​the present invention is to form a first oxide film on an oxide film. a first oxide semiconductor film and a second oxide semiconductor film formed on the first oxide semiconductor film. By forming the second oxide semiconductor film, the oxide semiconductor film is not released at least during the formation of the second oxide semiconductor film. The first oxide semiconductor film is used as a base film for the second oxide semiconductor film. Since the second oxide semiconductor film functions as a second oxide semiconductor film, the crystallinity of the second oxide semiconductor film can be improved. The crystallinity of the second oxide semiconductor film is improved, so that the occurrence of oxygen vacancies in the second oxide semiconductor film is suppressed. This suppresses defects and provides a transistor with stable electrical characteristics.

[0278] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0279] (Embodiment 5) In this embodiment, modifications of the semiconductor device shown in any of the first to fourth embodiments, A manufacturing method of a semiconductor device different from the manufacturing methods described in any of the embodiments 1 to 4 The following description will be given with reference to Figs. 18 to 21. Note that the reference numerals shown in Figs. 1 to 17 are the same as those in Figs. , similar reference numerals are used and repeated explanations are omitted.

[0280] <Configuration Example 5 of Semiconductor Device> 18A to 18C show a top-gate transistor as an example of a semiconductor device. 18A is a plan view, and FIG. 18B is a cross-sectional view of a transistor. FIG. 18(C) corresponds to a cross-sectional view taken along line X5-Y5 in FIG. 18(A), and FIG. 18(C) corresponds to a cross-sectional view taken along line X5-Y5 in FIG. It should be noted that in FIG. 18(A), the cross-sectional view is not necessarily drawn in order to avoid complication. In order to avoid this, some of the components of the semiconductor device (such as the gate insulating film 110) are omitted. is doing.

[0281] The semiconductor device shown in FIG. 18A to FIG. 18C includes an oxide film 104 and a A first oxide semiconductor film 106 formed on the first oxide semiconductor film 106 and a second oxide semiconductor film 107 formed on the first oxide semiconductor film 106 are shown in FIG. A second oxide semiconductor film 108 and a gate insulating film 109 formed on the second oxide semiconductor film 108 are formed. A region of the insulating film 110 that is in contact with the gate insulating film 110 and overlaps with the second oxide semiconductor film 108 and a gate electrode 112 formed on the semiconductor substrate 110.

[0282] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are at least The first oxide semiconductor film 106 is an oxide film containing indium, gallium, and zinc. The oxide semiconductor film 104 has a higher gallium content than the second oxide semiconductor film 108.

[0283] In addition, the first oxide semiconductor film 106 has a gallium content that is smaller than the indium content. or the gallium content is greater than the indium content, and the second oxide semiconductor The conductive film 108 has a higher indium content than gallium content. By increasing the indium content of the oxide semiconductor film 108, The crystallinity of 08 can be improved.

[0284] In this manner, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 have a composition In addition, the first oxide semiconductor film 106 is different from the second oxide semiconductor film 108 in the formation of the first oxide semiconductor film 106. The oxygen released from the oxide film 104 can be suppressed.

[0285] The second oxide semiconductor film 108 is made of the same material as the first oxide semiconductor film 106. Since the first oxide semiconductor film 106 is formed on the first oxide semiconductor film 107, the first oxide semiconductor film 106 has a crystal part that grows from the interface with the first oxide semiconductor film 106. An oxide semiconductor film can be used.

[0286] That is, the first oxide semiconductor film 106 has a thickness of at least 100 nm. During the deposition, oxygen released from the oxide film 104 is suppressed, and the second oxide semiconductor Since the second oxide semiconductor film 108 functions as a base film, the crystallinity of the second oxide semiconductor film 108 can be improved. In addition, oxygen released from the oxide film 104 is transferred to the second oxide semiconductor film 108. After the formation, the oxide semiconductor film 106 is passed through the first oxide semiconductor film 106 and is then released by heat treatment or the like. The semiconductor film 108 can be supplied with the above-mentioned gas.

[0287] In this manner, the structure in which the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked is By forming the second oxide semiconductor film 108 in the above-described manner, generation of oxygen vacancies in the second oxide semiconductor film 108 can be suppressed. This provides an excellent effect of improving the crystallinity of the oxide semiconductor film 108.

[0288] Note that in the first oxide semiconductor film 106, a region overlapping with the gate electrode 112 and A high resistance region 106a is formed on the outside of the second oxide semiconductor film 108, and a gate A pair of low resistance regions 106b are formed adjacent to the region where the second electrode 112 overlaps. In addition, in the second oxide semiconductor film 108, a region overlapping with the gate electrode 112 is A channel region 108a is formed adjacent to the region where the gate electrode 112 overlaps. A pair of low resistance regions 108b are formed.

[0289] In addition, the high resistance region 106a formed outside the second oxide semiconductor film 108 is For example, a high resistance insulating film is formed on the outside of the second oxide semiconductor film 108. In the case where the resistor region 106a is not provided, adjacent transistors are electrically connected to each other. This is because there is a risk that

[0290] A protective insulating film 114 is formed on the gate electrode 112. The interlayer insulating film 116 and the protection film 116 are formed in a cross section in the channel length direction. An opening penetrating the insulating film 114, the gate insulating film 110, and the second oxide semiconductor film 108 In the second oxide semiconductor film 108, a source electrode 118a and a drain electrode A drain electrode 118b, a wiring 119a electrically connected to the source electrode 118a, and a drain The wiring 119b may be electrically connected to the electrode 118b. The source electrode 118a and the drain electrode 118b are formed in the second oxide semiconductor film 108. Since the low-resistance regions 108a and 108b are in contact with each other, the contact resistance can be reduced.

[0291] The structure of the semiconductor device shown in this embodiment includes a gate insulating film 110, a protective insulating film 114, a layer The source electrode 11 filled in the opening of the interlayer insulating film 116 and the second oxide semiconductor film 108. 8a and drain electrode 118b, and the source electrode 118a and drain electrode 118b In the embodiment, the electrically connected wiring 119a and wiring 119b are formed. This is different from the structure of the semiconductor device described in the first embodiment.

[0292] In addition, the structure of the semiconductor device described in this embodiment has a shape of the second oxide semiconductor film 108 and A gate insulating film covering the upper surface and side surfaces of the channel region 108a of the second oxide semiconductor film 108 is formed. The shapes of the film 110 and the gate electrode 112 are also the same as those of the semiconductor device shown in the first embodiment. The structure is different.

[0293] Note that in the semiconductor device described in this embodiment, the second oxide semiconductor film 108 (more specifically, A channel is formed on the top and side surfaces of the channel region 108a.

[0294] As described above, in the semiconductor device described in this embodiment, the second oxide semiconductor film 108 is formed to be thick. The second oxide semiconductor film 108 is formed in a plate shape so as to cover the top and side surfaces of the second oxide semiconductor film 108. A gate insulating film 110 is formed on the insulating film 110, and a gate electrode 112 is formed thereon. The channel width is the width of the second oxide semiconductor film 108 (more specifically, the channel region 108a). Since the width of the top surface of the second oxide semiconductor film 108 is the sum of the length of the top surface and the side surface of the second oxide semiconductor film 108, The effective channel width can be increased without increasing the channel width. By doing so, it is possible to suppress the decrease in the on-state current of the transistor and the variation in the electrical characteristics. Cut.

[0295] Note that the details of each component that can be used in the semiconductor device described in this embodiment will be Since the configurations can be the same as those shown in the first to fourth embodiments, the description thereof will be omitted. The configurations that are not used in the first to fourth embodiments will be described below.

[0296] [Detailed Description of Second Oxide Semiconductor Film] The second oxide semiconductor film 108 can have the same structure as that described in Embodiment 1. The second oxide film shown in this embodiment differs from the first embodiment only in its thickness. The thickness of the nitride semiconductor film 108 is set to be greater than 5 nm and less than or equal to 500 nm, and preferably to be less than or equal to 100 nm. The thickness is from 1 nm to 300 nm.

[0297] Details of the other components will be described in the manufacturing method 5 of the semiconductor device described later. This will be explained with reference to FIGS.

[0298] <Method 5 for manufacturing semiconductor device> 19 to 21, the manufacturing method of the semiconductor device shown in FIG. 18 according to the present embodiment will be described below. An example of the method will now be described.

[0299] First, the manufacturing method shown in Embodiment 1 is taken into consideration to manufacture the device up to the state shown in FIG. The cross section shown in FIG. 19A is a cross section of the semiconductor device shown in FIG. This is a modification, and only the thickness of the second oxide semiconductor film 108 is different.

[0300] Next, a gate insulating film is formed on the first oxide semiconductor film 106 and the second oxide semiconductor film 108. A film 110 and a conductive film 111 are formed (see FIG. 19B).

[0301] Next, a resist mask is formed over the conductive film 111 by a photolithography process. The film 111 is selectively etched to form a gate electrode 112 (see FIG. 19(C)). ).

[0302] Next, a resist mask 138 is formed on the gate insulating film 110 and the gate electrode 112. (See FIG. 19(D)).

[0303] Next, the resist mask 138 is selectively exposed and developed by a photolithography process. Then, a resist mask 138a is formed by performing an image forming process. The first oxide semiconductor film 106 and the second oxide semiconductor film 107 are formed by using the mask 138a as a mask. A dopant 142 is introduced into the film 108. The introduction of the dopant 142 causes the first oxide The semiconductor film 106 has a high resistance region 106a and a region adjacent to the region where the gate electrode 112 overlaps. A pair of low-resistance regions 106b are formed in the second oxide semiconductor film 108. A pair of low resistance regions 108a and 108b are adjacent to the region where the gate electrode 112 overlaps. b is formed (see FIG. 20(A)).

[0304] In this embodiment, the first oxide semiconductor film 108 is A dopant 142 is introduced into the semiconductor film 106 to form a low resistance region 106b. However, the present invention is not limited to this. The first oxide semiconductor film 106 may have an impurity concentration similar to that of the high-resistance region 106a. .

[0305] Next, the resist mask 138a is removed, and the gate insulating film 110 and the gate electrode 112 are left. A protective insulating film 114 and an interlayer insulating film 116 are formed thereon (see FIG. 20B).

[0306] Next, a resist mask is formed on the interlayer insulating film 116 by a photolithography process. The interlayer insulating film 116, the protective insulating film 114, and the second oxide semiconductor film 108 are selectively etched. An opening 153a reaching the first oxide semiconductor film 106 is formed by etching. The mask is removed (see FIG. 20(C)).

[0307] Next, a resist film is formed on the opening 153a and the interlayer insulating film 116 by a photolithography process. A stop mask is formed, and the interlayer insulating film 116, the protective insulating film 114, and the second oxide semiconductor film 108 is selectively etched to form an opening 153 that reaches the first oxide semiconductor film 106. b is formed and the resist mask is removed (see FIG. 20(D)). A pair of openings are formed on either side of the pole 112 and the channel region 108a.

[0308] In this embodiment, the openings 153a and 153b are formed by the first oxide film. However, the present invention is not limited to this. For example, the oxide film 10 It may be formed to reach 4.

[0309] In addition, in the manufacturing method described in this embodiment, similar to the manufacturing method described in Embodiment 2, In order to form the openings 153a and 153b using two masks, It is possible to freely set the position of the aperture without depending on the resolution limit. The distance between the gate electrode 112 and the source side contact region or the drain side contact region is, for example, For example, the source contact area can be reduced to 0.05 μm or more and 0.1 μm or less. By reducing the distance between the gate electrode 112 and the drain side contact region or the drain side contact region, Since the resistance between the source and drain can be reduced, the electrical characteristics of the semiconductor device (e.g. , the on-state current characteristics of the transistor) can be improved.

[0310] Next, a film is formed on the interlayer insulating film 116 so as to fill the openings 153a and 153b. A conductive film 118 is formed (see FIG. 21A).

[0311] Next, a semiconductor device is formed on the interlayer insulating film 116 (at least in the region overlapping the gate electrode 112). The conductive film 118 is subjected to a CMP process to remove the conductive film 118, forming an opening. The source electrode 118a and the drain electrode 118b are filled in the opening 153a and the opening 153b, respectively. 18b is formed (see FIG. 21(B)).

[0312] In this embodiment, the source electrode 118a and the drain electrode 118b are The contact region with the second oxide semiconductor film 108 is the interlayer insulating film 116, the protective insulating film 114, the gate insulating film 116, and the In an opening penetrating the gate insulating film 110 and the second oxide semiconductor film 108, 1A is a side view of the oxide semiconductor film 108.

[0313] Next, a conductive film is formed on the interlayer insulating film 116, the source electrode 118a, and the drain electrode 118b. A resist mask is formed on the conductive film by a photolithography process, and a sole A wiring 119a electrically connected to the source electrode 118a and a wiring 119b electrically connected to the drain electrode 118b Then, a wiring 119b connected to the wiring 119 is formed (see FIG. 21C).

[0314] Through the above steps, the semiconductor device shown in FIG. 18 can be manufactured.

[0315] As shown in this embodiment, the technical idea of ​​the present invention is to form a first oxide film on an oxide film. a first oxide semiconductor film and a second oxide semiconductor film formed on the first oxide semiconductor film. By forming the second oxide semiconductor film, the oxide semiconductor film is not released at least during the formation of the second oxide semiconductor film. The first oxide semiconductor film is used as a base film for the second oxide semiconductor film. Since the second oxide semiconductor film functions as a second oxide semiconductor film, the crystallinity of the second oxide semiconductor film can be improved. The crystallinity of the second oxide semiconductor film is improved, so that the occurrence of oxygen vacancies in the second oxide semiconductor film is suppressed. This suppresses defects and provides a transistor with stable electrical characteristics.

[0316] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0317] (Embodiment 6) In this embodiment mode, the semiconductor device shown in this specification is used, and An example of a configuration that can retain memory contents and has no limit on the number of times it can be written is shown below with the aid of a drawing. He explains.

[0318] FIG. 22 shows an example of a structure of a semiconductor device. FIG. 22A shows a cross-sectional view of the semiconductor device. FIG. 22B shows a plan view of the semiconductor device, and FIG. 22C shows a circuit diagram of the semiconductor device. Here, Figure 22(A) shows the cross sections taken along lines C1-C2 and D1-D2 in Figure 22(B). is equivalent to.

[0319] The semiconductor device shown in FIG. 22(A) and FIG. 22(B) uses a first semiconductor material in the lower part. The transistor 260 is made of a second semiconductor material and the transistor 300 is made of a second semiconductor material. As the transistor 300 using the second semiconductor material, In this embodiment, the structure of the semiconductor device shown in FIG. Although not shown, the same reference numerals as those used in the first, second, fourth and fifth embodiments are used. The structure of a semiconductor device can also be applied.

[0320] Here, the first semiconductor material and the second semiconductor material are materials having different forbidden band widths. For example, the first semiconductor material is preferably a semiconductor material other than an oxide semiconductor (crystalline silicon, The second semiconductor material can be an oxide semiconductor. As for other materials, for example, transistors using crystalline silicon are easy to operate at high speed. On the other hand, a transistor using an oxide semiconductor can retain charge for a long time due to its characteristics. It is noh.

[0321] Note that the above transistors are all n-channel transistors. However, it goes without saying that p-channel transistors can also be used.

[0322] The transistor 260 in FIG. 22(A) is made of a semiconductor material (e.g., crystalline silicon). A channel forming region 216 is provided in a substrate 200 including a channel forming region 216 The impurity region 220 is provided so as to sandwich the intermetallic compound region 210. A gate insulating film 208 is provided on the channel forming region 216. and a gate electrode 210 provided on the film 208. There are cases where the source electrode and the drain electrode are not provided, but for convenience, this is also referred to as the transistor. In this case, in order to explain the connection relationship of the transistor, In addition, the source region and drain region are sometimes referred to as the source electrode and drain electrode. That is, in this specification, the term "source electrode" may include the source region.

[0323] An element isolation insulating film 206 is provided on the substrate 200 so as to surround the transistor 260. An insulating film 228 and an oxide film 230 are provided to cover the transistor 260. In order to achieve high integration, the transistor 260 shown in FIG. It is preferable that the transistor 2 does not have a sidewall insulating film. When the characteristics of 60 are important, a sidewall insulating film is provided on the side of the gate electrode 210. Alternatively, the impurity region 220 may include regions having different impurity concentrations.

[0324] The transistor 260 using a crystalline silicon substrate can operate at high speed. By using the transistor as a read transistor, information can be read. The process can be performed at high speed. An insulating film and an oxide film are formed to cover the transistor 260. As a process before forming the transistor 300 and the capacitor 264, the insulating film and The oxide film is subjected to CMP processing to form a planarized insulating film 228 and an oxide film 230. The top surface of the gate electrode 210 is exposed.

[0325] The insulating film 228 is typically a silicon oxide film, a silicon oxynitride film, or an aluminum oxide film. film, aluminum oxynitride film, silicon nitride film, aluminum nitride film, silicon nitride oxide film An inorganic insulating film such as an aluminum oxide film or an aluminum nitride film can be used. 0 uses oxide films such as silicon oxide film, silicon oxynitride film, and silicon nitride oxide film. The insulating film 228 and the oxide film 230 can be formed by plasma CVD or sputtering. The film can be formed by using a coating method or the like.

[0326] The insulating film 228 is made of a material such as a polyimide resin, an acrylic resin, or a benzocyclobutene resin. In addition to the above organic materials, low dielectric constant materials (lo When using organic materials, the spin coating method, printing method, etc. can be used. Alternatively, the insulating film 228 may be formed by a wet method such as.

[0327] In this embodiment, a silicon nitride film is used as the insulating film 228, and the oxide film 23 A silicon oxide film is used as 0.

[0328] A first oxide film is formed on the oxide film 230 that has been sufficiently planarized by a polishing process (e.g., a CMP process). The semiconductor film 106 and the second oxide semiconductor film 108 are formed. The average surface roughness is preferably 0.15 nm or less.

[0329] The transistor 300 shown in FIG. 22A includes an oxide semiconductor in a channel formation region. Here, the second oxide semiconductor film 10 included in the transistor 300 is It is preferable that the oxide semiconductor 8 is highly purified. As a result, the transistor 300 has excellent off characteristics.

[0330] Since the off-state current of the transistor 300 is small, the transistor 300 can be used for a long period of time. It is possible to retain the stored contents. In other words, no refresh operation is required. This makes it possible to realize a semiconductor memory device with extremely low frequency of refresh operations. Therefore, power consumption can be sufficiently reduced.

[0331] An insulating film 302 and an insulating film 304 are provided over the transistor 300 as a single layer or a stacked layer. In this embodiment, the insulating film 302 and the insulating film 304 are formed of a transistor A laminate of a silicon oxide film and an aluminum oxide film is used from the 300 side. The aluminum film is then formed at a high density (for example, a film density of 3.2 g / cm 3 More than 3.6 g / cm, preferably 3.6 g / cm 3 or more), the transistor 300 can have stable electrical characteristics. This is preferable.

[0332] Also, a source electrode 118a of the transistor 300 is connected through an insulating film 302. A conductive film 306 is provided in a region overlapping with the wiring 119a. The insulating film 302 and the conductive film 306 form a capacitance element 364. The source electrode 118a of the transistor 300 functions as one electrode of the capacitance element 364. The conductive film 306 functions as the other electrode of the capacitor element 364. Alternatively, the capacitor 364 may not be provided. , may be provided above the transistor 300.

[0333] An insulating film 304 is provided over the transistor 300 and the capacitor 364. On the insulating film 304, a transistor 300 and wiring for connecting other transistors are provided. The wiring 308 is formed on the insulating film 302, the insulating film 304, etc. The insulating layer 114 is formed to fill the opening and is electrically connected to the drain electrode 118b.

[0334] In addition, in FIG. 22(A) and FIG. 22(B), a transistor 260 and a transistor The transistor 300 is provided so as to overlap at least a part of the transistor 260. The second oxide semiconductor film 108 is formed so that the source region or the drain region overlaps with the second oxide semiconductor film 108. In addition, the transistor 300 and the capacitor 364 are preferably provided. For example, the capacitance element 3 The conductive film 306 of 64 at least partially overlaps the gate electrode 210 of the transistor 260. By adopting such a planar layout, the occupation area of ​​the semiconductor device is reduced. Since the required area can be reduced, high integration can be achieved.

[0335] Next, an example of a circuit configuration corresponding to FIG. 22(A) and FIG. 22(B) is shown in FIG. 22(C). vinegar.

[0336] In FIG. 22C, the first wiring (1st Line) and the source of the transistor 260 The second wiring (2nd Li ne) and the other of the source electrode or the drain electrode of the transistor 260 are electrically connected. Also, the third wiring (3rd Line) and the source voltage of the transistor 300 are connected to each other. The fourth line is electrically connected to either the first line or the drain electrode. The gate electrode of the transistor 300 is electrically connected to the The gate electrode of the transistor 260 and the source electrode or drain electrode of the transistor 300 are connected to each other. The other end is electrically connected to one of the electrodes of the capacitor 364 and is connected to a fifth wiring (5th Line ) is electrically connected to the other electrode of the capacitor 364.

[0337] In the semiconductor device shown in FIG. 22C, the potential of the gate electrode of the transistor 260 can be held. By taking advantage of this feature, it is possible to write, store, and read information as follows: do.

[0338] The writing and retention of information will be explained. First, the potential of the fourth wiring is This sets the transistor 300 to an on-state potential, thereby turning the transistor 300 on. The potential of the third wiring is applied to the gate electrode of the transistor 260 and the capacitor 364. That is, a predetermined charge is applied to the gate electrode of the transistor 260 ( Write). Here, charges that give two different potential levels (hereinafter, low-level charges, Then, either the high level charge or the low level charge is applied to the fourth wiring. The potential is set to a potential at which the transistor 300 is turned off, so that the transistor 300 is turned off. By setting the transistor 260 in this state, the charge applied to the gate electrode of the transistor 260 is held ( retention).

[0339] Since the off-state current of the transistor 300 is extremely small, the gate electrode of the transistor 260 The charge is retained for a long time.

[0340] Next, the reading of information will be described. When a predetermined potential (constant potential) is applied to the first wiring, In this state, when an appropriate potential (read potential) is applied to the fifth wiring, the gate of the transistor 260 Depending on the amount of charge held in the transistor electrode, the second wiring has a different potential. If the transistor 260 is an n-channel type, a high level is applied to the gate electrode of the transistor 260. Apparent threshold V for a given chargeth_H The gate of transistor 260 The apparent threshold voltage V when a low-level charge is applied to the th_L Lower Here, the apparent threshold voltage is the voltage at which the transistor 260 is in the "on state." Therefore, the potential of the fifth wiring is defined as the potential of the fifth wiring required to make the fifth wiring V rank th_H and V th_L By setting the potential V0 between For example, in writing, the high level voltage When a load is applied, the potential of the fifth wire is V0 (>V th_H ) Then, Tiger When a low level charge is applied, the first transistor 260 is in the "on state." The potential of the wire 5 is V0( <V th_L ) transistor 260 is in the "off state" Therefore, the stored information can be read out by checking the potential of the second wiring. It is possible.

[0341] When memory cells are arranged in an array, it is possible to read only the information in a desired memory cell. In this way, if the information is not read out, the state of the gate electrode The potential at which transistor 260 is in the "off state" regardless of th_H Alternatively, the potential of the gate electrode may be changed regardless of the state of the gate electrode. The potential at which the transistor 260 is in the "on" state, i.e., V th_L Higher potential should be applied to the fifth wire.

[0342] In the semiconductor device described in this embodiment, an off-state current is generated by using an oxide semiconductor in a channel formation region. By using transistors with extremely low current, memory contents can be retained for an extremely long period of time. In other words, the refresh operation is unnecessary or the refresh operation is unnecessary. Since it is possible to reduce the frequency of operation extremely, power consumption can be reduced significantly. In addition, it is possible to operate the device without power supply (although it is preferable that the potential is fixed). Even if there is a problem, it is possible to retain the stored contents for a long period of time.

[0343] In addition, the semiconductor device described in this embodiment does not require a high voltage to write data. There is no problem with element degradation. For example, unlike conventional non-volatile memory, This eliminates the need to inject electrons into the floating gate or extract electrons from the floating gate. In other words, the problem of deterioration of the gate insulating layer does not occur at all. In a physical device, there is no limit to the number of times data can be rewritten, which is a problem with conventional non-volatile memory. This will dramatically improve reliability. Furthermore, the on and off states of transistors will determine the information Since the data is written in a single bit, high speed operation can be easily achieved.

[0344] The transistor 300 includes a first oxide semiconductor film 106 formed over an oxide film 230, A second oxide semiconductor film 108 formed on the first oxide semiconductor film 106 and a second oxide A gate insulating film 110 is formed on the semiconductor film 108, and a first insulating film 110 is formed on the semiconductor film 108. and a gate electrode 112 formed in a region overlapping with the oxide semiconductor film 108 of the second gate electrode. do.

[0345] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are at least The first oxide semiconductor film 106 is an oxide film containing indium, gallium, and zinc. The oxide semiconductor film 104 has a higher gallium content than the second oxide semiconductor film 108.

[0346] In addition, the first oxide semiconductor film 106 has a gallium content that is smaller than the indium content. or the gallium content is greater than the indium content, and the second oxide semiconductor The conductive film 108 has a higher indium content than gallium content. In addition, the indium content of the second oxide semiconductor film 108 is increased. This can improve the crystallinity of the compound semiconductor film 108.

[0347] In this manner, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 have a composition In addition, the first oxide semiconductor film 106 is different from the second oxide semiconductor film 108 in the formation of the first oxide semiconductor film 106. The oxygen released from the oxide film 104 can be suppressed.

[0348] The second oxide semiconductor film 108 is made of the same material as the first oxide semiconductor film 106. Since the first oxide semiconductor film 106 is formed on the first oxide semiconductor film 107, the first oxide semiconductor film 106 has a crystal part that grows from the interface with the first oxide semiconductor film 106. An oxide semiconductor film can be used.

[0349] That is, the first oxide semiconductor film 106 has a thickness of at least 100 nm. During the deposition, oxygen released from the oxide film 104 is suppressed, and the second oxide semiconductor Since the second oxide semiconductor film 108 functions as a base film, the crystallinity of the second oxide semiconductor film 108 can be improved. In addition, oxygen released from the oxide film 104 is transferred to the second oxide semiconductor film 108. After the formation, the oxide semiconductor film 106 is passed through the first oxide semiconductor film 106 and is then released by heat treatment or the like. The semiconductor film 108 can be supplied with the above-mentioned gas.

[0350] In this manner, the structure in which the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked is By forming the second oxide semiconductor film 108 in the above-described manner, generation of oxygen vacancies in the second oxide semiconductor film 108 can be suppressed. This provides an excellent effect of improving the crystallinity of the oxide semiconductor film 108.

[0351] As shown in this embodiment, the technical idea of ​​the present invention is to form a first oxide film on an oxide film. a first oxide semiconductor film and a second oxide semiconductor film formed on the first oxide semiconductor film. By forming the second oxide semiconductor film, the oxide semiconductor film is not released at least during the formation of the second oxide semiconductor film. The first oxide semiconductor film is used as a base film for the second oxide semiconductor film. Since the second oxide semiconductor film functions as a second oxide semiconductor film, the crystallinity of the second oxide semiconductor film can be improved. The crystallinity of the second oxide semiconductor film is improved, so that the occurrence of oxygen vacancies in the second oxide semiconductor film is suppressed. This suppresses defects and provides a transistor with stable electrical characteristics.

[0352] The configurations, methods, etc. described in this embodiment may be different from the configurations, methods, etc. described in other embodiments. They can be used in appropriate combination.

[0353] (Embodiment 7) In this embodiment mode, the semiconductor device described in any of the embodiments 1 to 5 is used. It is possible to retain memory contents even when power is not supplied, and there is no limit to the number of times it can be written. Regarding the configuration different from that shown in the sixth embodiment, FIG. 23 and FIG. 24 show The explanation will be given using:

[0354] FIG. 23A shows an example of a circuit configuration of a semiconductor device, and FIG. 23B shows an example of a circuit configuration of the semiconductor device. First, the semiconductor device shown in FIG. 23A will be described, followed by The semiconductor device shown in FIG. 23B will be described below.

[0355] In the semiconductor device shown in FIG. 23A, the bit line BL and the source of the transistor 300 The word line WL and the drain electrode of the transistor 300 are electrically connected. The gate electrode is electrically connected to the source electrode or drain electrode of the transistor 300. The pole and a first terminal of the capacitive element 354 are electrically connected to each other.

[0356] The transistor 300 including an oxide semiconductor has an extremely low off-state current. For this reason, when the transistor 300 is turned off, the first The potential of the terminal 1 (or the charge stored in the capacitance element 354) is kept constant for an extremely long period of time. It is possible to hold it in place.

[0357] Next, data is written to the semiconductor device (memory cell 350) shown in FIG. The case where holding is performed will be described.

[0358] First, the potential of the word line WL is set to a potential at which the transistor 300 is turned on. This causes the potential of the bit line BL to change to the potential of the capacitance element 354. Then, the potential of the word line WL is applied to the first terminal of the transistor By setting the potential at which the transistor 300 is turned off, The potential of the first terminal of the capacitance element 354 is held (retained).

[0359] Since the off-state current of the transistor 300 is extremely small, the voltage of the first terminal of the capacitor 354 The potential (or the charge stored in the capacitance element) can be held for a long period of time.

[0360] Next, the reading of information will be described. When the transistor 300 is turned on, The bit line BL in the free state and the capacitance element 354 are electrically connected, and the bit line BL and the capacitance element 354 As a result, the potential of the bit line BL changes. The amount of change in potential is determined by the potential of the first terminal of the capacitance element 354 (or the potential stored in the capacitance element 354). It takes on different values ​​depending on the charge applied.

[0361] For example, the potential of the first terminal of the capacitance element 354 is V, the capacitance of the capacitance element 354 is C, The capacitance component of the line BL (hereinafter also referred to as the bit line capacitance) is CB. If the potential of the bit line BL is VB0, the potential of the bit line BL after the charge is redistributed is , (CB*VB0+C*V) / (CB+C). Therefore, the state of memory cell 350 is Then, when the potential of the first terminal of the capacitance element 354 has two states of V1 and V0 (V1>V0), Then, when the potential V1 is held, the potential of the bit line BL (=(CB*VB0+C*V 1) / (CB+C)) is the potential of the bit line BL when the potential V0 is maintained (=(CB *VB0+C*V0) / (CB+C)).

[0362] Then, by comparing the potential of the bit line BL with a predetermined potential, information can be read out. Cut.

[0363] As described above, in the semiconductor device shown in FIG. 23A, the off-state current of the transistor 300 is extremely small. Since the capacitance is small, the charge stored in the capacitance element 354 can be held for a long time. In other words, the refresh operation becomes unnecessary or the refresh operation can be performed in a short period of time. Since the frequency can be made extremely low, power consumption can be reduced sufficiently. In addition, even if there is no power supply, the memory contents can be retained for a long period of time. It is.

[0364] Next, the semiconductor device shown in FIG.

[0365] The semiconductor device shown in FIG. 23B has the memory shown in FIG. 23A as a memory circuit in the upper portion. The memory cell array 351a includes a plurality of cells 350, and the memory cell array 351b includes a plurality of cells 350. In addition, in the lower part, a memory cell array 351a and a memory cell array 351b are operated. The peripheral circuit 353 includes a memory cell array 351. a, and the memory cell array 351b.

[0366] By using the configuration shown in FIG. 23B, the peripheral circuit 353 is connected to the memory cell array 35 1a and directly under the memory cell array 351b, the semiconductor device can be made compact. It is possible to achieve this.

[0367] The transistors provided in the peripheral circuit 353 are made of a different semiconductor material than the transistor 300. It is more preferable to use a material such as silicon, germanium, or silicon germanium. , silicon carbide, gallium arsenide, etc., and a single crystal semiconductor is used. It is preferable to use an organic semiconductor material. The transistor is capable of sufficiently high speed operation. It is possible to realize various circuits (logic circuits, driver circuits, etc.) that require high speed operation. be.

[0368] In the semiconductor device shown in FIG. 23B, a memory cell array 351a and a memory cell In the above embodiment, the memory cell array 351b and the memory cell array 351c are stacked. The number of memory cell arrays is not limited to this. A structure in which three or more memory cell arrays are stacked is also possible. It may also be possible to do so.

[0369] Next, a specific configuration of the memory cell 350 shown in FIG. 23(A) will be described with reference to FIG. 24. Provide an explanation.

[0370] 24 shows an example of the configuration of a memory cell 350. FIG. 24(A) shows the configuration of the memory cell 350. FIG. 24(B) shows a cross-sectional view of the memory cell 350, and FIG. 24(B) shows a plan view of the memory cell 350. 24(A) corresponds to the cross sections taken along lines F1-F2 and G1-G2 in FIG. 24(B).

[0371] The transistor 300 illustrated in FIG. 24A and FIG. 24B is the same as that described in Embodiment 3 or The configuration may be the same as that shown in the sixth embodiment. However, it may be the same as that shown in the other embodiments. The transistor may have the structure shown in FIG.

[0372] The transistor 300 includes a first oxide semiconductor film 106 formed over an oxide film 274, A second oxide semiconductor film 108 formed on the first oxide semiconductor film 106 and a second oxide A gate insulating film 110 is formed on the semiconductor film 108, and a first insulating film 110 is formed on the semiconductor film 108. and a gate electrode 112 formed in a region overlapping with the oxide semiconductor film 108 of the second gate electrode. do.

[0373] The first oxide semiconductor film 106 and the second oxide semiconductor film 108 are at least The first oxide semiconductor film 106 is an oxide film containing indium, gallium, and zinc. The oxide semiconductor film 104 has a higher gallium content than the second oxide semiconductor film 108.

[0374] In addition, the first oxide semiconductor film 106 has a gallium content that is smaller than the indium content. or the gallium content is greater than the indium content, and the second oxide semiconductor The conductive film 108 has a higher indium content than gallium content. In addition, the indium content of the second oxide semiconductor film 108 is increased. This can improve the crystallinity of the compound semiconductor film 108.

[0375] In this manner, the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked. The first oxide semiconductor film 106 and the second oxide semiconductor film 108 have a composition In addition, the first oxide semiconductor film 106 is different from the second oxide semiconductor film 108 in the formation of the first oxide semiconductor film 106. The oxygen released from the oxide film 104 can be suppressed.

[0376] The second oxide semiconductor film 108 is made of the same material as the first oxide semiconductor film 106. Since the first oxide semiconductor film 106 is formed on the first oxide semiconductor film 107, the first oxide semiconductor film 106 has a crystal part that grows from the interface with the first oxide semiconductor film 106. An oxide semiconductor film can be used.

[0377] That is, the first oxide semiconductor film 106 has a thickness of at least 100 nm. During the deposition, oxygen released from the oxide film 104 is suppressed, and the second oxide semiconductor Since the second oxide semiconductor film 108 functions as a base film, the crystallinity of the second oxide semiconductor film 108 can be improved. In addition, oxygen released from the oxide film 104 is transferred to the second oxide semiconductor film 108. After the formation, the oxide semiconductor film 106 is passed through the first oxide semiconductor film 106 and is then released by heat treatment or the like. The semiconductor film 108 can be supplied with the above-mentioned gas.

[0378] In this manner, the structure in which the first oxide semiconductor film 106 and the second oxide semiconductor film 108 are stacked is By forming the second oxide semiconductor film 108 in the above-described manner, generation of oxygen vacancies in the second oxide semiconductor film 108 can be suppressed. This provides an excellent effect of improving the crystallinity of the oxide semiconductor film 108.

[0379] Note that in the first oxide semiconductor film 106, a region overlapping with the gate electrode 112 and A high resistance region 106a is formed on the outside of the second oxide semiconductor film 108, and a gate A pair of low resistance regions 106b are formed adjacent to the region where the second electrode 112 overlaps. In addition, in the second oxide semiconductor film 108, a region overlapping with the gate electrode 112 is A channel region 108a is formed adjacent to the region where the gate electrode 112 overlaps. A pair of low resistance regions 108b are formed.

[0380] In addition, the high resistance region 106a formed outside the second oxide semiconductor film 108 is For example, a high resistance insulating film is formed on the outside of the second oxide semiconductor film 108. In the case where the resistor region 106a is not provided, adjacent transistors are electrically connected to each other. This is because there is a risk that

[0381] In addition, the insulating film 113 provided in the region where the gate electrode 112 overlaps and the gate electrode 11 2, a sidewall insulating film 115 formed on the side wall of the insulating film 113, and a second oxide A source electrode 118a and a drain electrode 118b electrically connected to the semiconductor film 108; , an insulating film 120 formed on the interlayer insulating film 116; the insulating film 120, the interlayer insulating film 116, The source electrode 118a and the drain electrode 118b are exposed through openings provided in the protective insulating film 114. The wiring 119a and the wiring 119b may be electrically connected to the wiring 18b. The source electrode 118a and the drain electrode 118b are formed of the second oxide semiconductor film 1. Since the pair of low resistance regions 108b formed on the substrate 108 are in contact with each other, the contact resistance can be reduced. can be done.

[0382] In addition, an insulating film 258 is formed on the transistor 300. In the region overlapping with the wiring 119a connected to the source electrode 118a of the transistor 300, A conductive film 262 is provided on the wiring 119a. The wiring 119a, the insulating film 258, and the conductive film 262 are In other words, the source voltage of the transistor 300 is The electrode 118a functions as one electrode of the capacitor 354, and the conductive film 262 functions as one electrode of the capacitor 354. It serves as the other electrode of 54.

[0383] In addition, an insulating film 256 is formed over the transistor 300 and the capacitor 354. A layer is provided on the insulating film 256 to connect to the adjacent memory cell. The wiring 272 is provided on the insulating film 256, the insulating film 258, etc. The drain electrode 118b of the transistor 300 is connected to the opening and the wiring 119b. However, the wiring 272 and the drain electrode 118b are directly connected to each other. The wiring 272 corresponds to the bit line BL in the circuit diagram in FIG.

[0384] In FIG. 24(A) and FIG. 24(B), the drain electrode 118 of the transistor 300 b can also function as the source electrode of a transistor included in an adjacent memory cell. can.

[0385] In this way, by adopting the planar layout shown in FIG. Since the occupied area can be reduced, high integration can be achieved.

[0386] As described above, the memory cells formed in multiple layers are transistors using oxide semiconductors. A transistor using an oxide semiconductor has a low off-state current, Therefore, by using this, it is possible to retain memory contents for a long period of time. This allows the frequency of refresh operations to be reduced significantly, resulting in a sufficiently low power consumption. It can be reduced.

[0387] In this way, transistors using materials other than oxide semiconductors (in other words, transistors that can operate at a sufficiently high speed) A peripheral circuit using a transistor that can operate) and a transistor using an oxide semiconductor ( In a broader sense, it is a semiconductor device that is equipped with a memory circuit using a transistor with a sufficiently small off-state current. By doing so, it is possible to realize a semiconductor device having unprecedented features. By forming the circuit and the memory circuit in a stacked structure, the integration of the semiconductor device can be achieved.

[0388] As described above, a semiconductor device that realizes miniaturization and high integration and is endowed with excellent electrical characteristics is It is possible to provide a semiconductor device and a method for manufacturing the semiconductor device.

[0389] As shown in this embodiment, the technical idea of ​​the present invention is to form a first oxide film on an oxide film. a first oxide semiconductor film and a second oxide semiconductor film formed on the first oxide semiconductor film. By forming the second oxide semiconductor film, the oxide semiconductor film is not released at least during the formation of the second oxide semiconductor film. The first oxide semiconductor film is used as a base film for the second oxide semiconductor film. Since the second oxide semiconductor film functions as a second oxide semiconductor film, the crystallinity of the second oxide semiconductor film can be improved. The crystallinity of the second oxide semiconductor film is improved, so that the occurrence of oxygen vacancies in the second oxide semiconductor film is suppressed. This suppresses defects and provides a transistor with stable electrical characteristics.

[0390] This embodiment can be implemented in appropriate combination with the configurations described in other embodiments. It is Noh.

[0391] (Embodiment 8) In this embodiment mode, the semiconductor device described in the above embodiment mode is applied to a mobile phone, a smartphone, An example of application to a portable device such as an electronic book will be described with reference to FIGS.

[0392] In mobile devices such as mobile phones, smartphones, and e-books, image data is temporarily stored. SRAM or DRAM is used for memory. The reason is that flash memory has a slow response time and is not suitable for image processing. On the other hand, when SRAM or DRAM is used for temporary storage of image data, the following characteristics are observed: be.

[0393] In a normal SRAM, one memory cell has a transistor 801 as shown in FIG. The 6 transistors, 806, are connected to the X decoder 807 and the Y decoder 808. The transistor 803 and the transistor 805 are driven by a transistor 808. The transistor 804 and the transistor 806 form an inverter, enabling high-speed operation. The drawback is that each memory cell is made up of six transistors, resulting in a large cell area. When the minimum dimension of the design rule is F, the area of ​​the SRAM memory cell is usually 1 00~150F 2 For this reason, SRAM has the lowest cost per bit among all types of memory. is also expensive.

[0394] On the other hand, in the DRAM, the memory cell is made up of transistors 811 as shown in FIG. , and a storage capacitor 812, which is connected to an X decoder 813 and a Y decoder 814. Each cell is composed of one transistor and one capacitance, and has a small area. The memory cell area of ​​a DRAM is usually 10F 2 However, DRAM is always refreshed. It requires flashing and consumes power even if it is not being rewritten.

[0395] However, the memory cell area of ​​the semiconductor device described in the above embodiment is 10F 2 Before and after Therefore, the memory cell area is reduced and frequent refresh is not required. This makes it possible to reduce power consumption.

[0396] Next, a block diagram of a portable device is shown in FIG. 26. The portable device shown in FIG. 26 includes an RF circuit 901. , analog baseband circuit 902, digital baseband circuit 903, battery 90 4, power supply circuit 905, application processor 906, flash memory 910, Display controller 911, memory circuit 912, display 913, touch sensor 919, a voice circuit 917, a keyboard 918, etc. 3 is composed of a display unit 914, a source driver 915, and a gate driver 916. The application processor 906 includes a CPU 907, a DSP 908, and an IF 909. Generally, the memory circuit 912 is composed of an SRAM or a DRAM. By employing the semiconductor device described in the above embodiment, writing and It is possible to store data for a long period of time and to reduce power consumption. can.

[0397] Next, in FIG. 27, the semiconductor device described in the previous embodiment is added to the memory circuit 950 of the display. The memory circuit 950 shown in FIG. , a switch 954, a switch 955, and a memory controller 951. The memory circuit receives image data (input image data) from a signal line, 952 and data stored in the memory 953 (stored image data) are read and controlled. A display controller 956 that performs the above and a signal from the display controller 956 A display 957 for displaying the image is connected.

[0398] First, certain image data is generated by an application processor (not shown). The input image data A is input to the memory 952 via the switch 954. The image data stored in the memory 952 (stored image data A) is 955 and a display controller 956 to a display 957. and displayed.

[0399] If there is no change in the input image data A, the stored image data A is usually at about 30 to 60 Hz. A display controller 956 periodically outputs a signal from the memory 952 via a switch 955. is read out.

[0400] Next, for example, when the user rewrites the screen (i.e., the input image data If there is a change in A, the application processor receives the new image data (input image data The input image data B is stored in the memory 953 via the switch 954. During this time, the stored image data A is periodically read from the memory 952 via the switch 955. When the new image data (stored image data B) is completely stored in the memory 953, From the next frame of the display 957, the stored image data B is read out, and the switch 9 55, and a display controller 956 displays the stored image data on a display 957. Data B is sent and displayed. This readout is followed by the next new image data being sent to the memory. This will continue until it is stored in memory 952.

[0401] In this way, the memory 952 and the memory 953 alternately write image data and The display 957 is displayed by reading out the data. The memory 952 and the memory 953 are not limited to being separate memories, but may be divided into one memory. The semiconductor device described in the above embodiment may be used as the memory 952 and the memory 9 By adopting 53, it is possible to write and read information at high speed and to store data for a long period of time. It is possible to maintain the operation time and reduce power consumption sufficiently.

[0402] Next, a block diagram of an electronic book is shown in Fig. 28. Fig. 28 shows a battery 1001, a power supply circuit 1002, microprocessor 1003, flash memory 1004, audio circuit 1005 , keyboard 1006, memory circuit 1007, touch panel 1008, display 10 09, and a display controller 1010.

[0403] Here, the semiconductor device described in the previous embodiment is used for the memory circuit 1007 in FIG. The role of the memory circuit 1007 is to temporarily store the contents of the book. An example of a feature is when a user uses the highlight feature. When reading an e-book, you may want to mark a specific part. The highlight function is called the highlight function, and it can be used to change the display color, underline, highlight text, etc. The aim is to differentiate the text from its surroundings by making it bolder or by changing the font style. This is a function that stores and retains the information specified by the user. The data may be copied to the flash memory 1004. By employing the semiconductor device described in the above embodiment, writing and reading of information can be performed. It is possible to store data at high speed for a long period of time, and to reduce power consumption sufficiently.

[0404] As described above, the portable device shown in this embodiment includes the semiconductor device according to the above embodiment. This allows for high speed writing and reading of information and long-term memory retention. This realizes a portable device that is capable of reducing power consumption.

[0405] The structures, methods, etc. described in this embodiment may be combined as appropriate with the structures, methods, etc. described in other embodiments. They can be used in combination. [Explanation of symbols]

[0406] 102 Substrate 104 Oxide film 106 First oxide semiconductor film 106a High resistance area 106b Low resistance region 108 Second oxide semiconductor film 108a Channel Region 108b Low resistance region 110 Gate insulating film 111 Conductive film 112 Gate electrode 113 Insulating film 113a Insulating film 114 Protective insulating film 114a Insulating film 115 Sidewall insulating film 115a Insulating film 116 Interlayer insulating film 116a Insulating film 118 Conductive Film 118a Source electrode 118b Drain electrode 119 Conductive Film 119a Wiring 119b Wiring 120 Insulating film 121 Conductive Film 121a First conductive film 121b Second conductive film 132 Resist mask 132a Resist mask 134 Resist Mask 134a Resist mask 134b Resist mask 136 Resist Mask 136a Resist mask 138 Resist Mask 138a Resist mask 142 Dopant 151a First opening 151b Second opening 153a opening 153b opening 200 boards 206 Element isolation insulating film 208 Gate insulating film 210 Gate electrode 216 Channel formation region 220 Impurity region 224 Intermetallic compound area 228 Insulating Film 230 Oxide Film 256 Insulating film 258 Insulating Film 260 Transistors 262 Conductive Film 264 Capacitive element 272 Wiring 274 Oxide Film 300 Transistors 302 Insulating film 304 Insulating film 306 Conductive Film 308 Wiring 350 memory cells 351a Memory cell array 351b Memory cell array 353 Peripheral Circuits 354 Capacitive element 364 Capacitive element 801 Transistors 802 Transistor 803 Transistor 804 Transistor 805 Transistor 806 Transistor 807 X Decoder 808 Y Decoder 811 Transistor 812 holding capacity 813X Decoder 814 Y decoder 901 RF circuit 902 Analog Baseband Circuit 903 Digital Baseband Circuit 904 Battery 905 Power supply circuit 906 Application Processor 907 CPU 908 DSP 909 IF 910 Flash Memory 911 Display Controller 912 Memory Circuit 913 Display 914 Display section 915 Source Driver 916 Gate Driver 917 Voice Circuit 918 Keyboard 919 Touch Sensor 950 Memory Circuit 951 Memory Controller 952 Memory 953 Memory 954 Switch 955 Switch 956 Display Controller 957 Display 1001 Battery 1002 Power supply circuit 1003 Microprocessor 1004 Flash Memory 1005 Audio Circuit 1006 Keyboard 1007 Memory Circuit 1008 Touch Panel 1009 Display 1010 Display Controller

Claims

[Claim 1] a first oxide semiconductor film formed on an oxide film; a second oxide semiconductor film formed on the first oxide semiconductor film; a gate insulating film formed on the second oxide semiconductor film; a gate electrode formed in a region in contact with the gate insulating film and overlapping with the second oxide semiconductor film, the first oxide semiconductor film and the second oxide semiconductor film are oxide films containing at least indium, gallium, and zinc; The first oxide semiconductor film has a lower indium content and a higher gallium content than the second oxide semiconductor film.

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