Photoelectric conversion device, apparatus, and signal processing method

Abstract

To provide a photoelectric conversion device that has improved image quality.SOLUTION: A photoelectric conversion device of the present disclosure has: a plurality of pixels that is arranged in an array shape and has scan areas sequentially scanned in a predetermined direction; a plurality of signal lines that extends in a column direction and is provided respectively on pixel columns; and a scan circuit that scans the plurality of pixels. The scan circuit performs, in a scan period for scanning the scan areas, scanning of connecting two or more pixels, of the plurality of pixels, which are arranged on two or more, a predetermined number of pixel columns, in parallel to any one of the plurality of signal lines. In a first period included in the scan period, the scan circuit performs reading of a group of a first number of first pixel columns in the scan area. In a second period for performing the first or last scanning in the scan period, the scan circuit performs, in parallel, reading of a group of a second number of second pixel columns smaller than the first number of pixel columns, and reading of a group of a third number of third pixel columns smaller than the first number of pixel columns, in the scan area.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present disclosure relates to a photoelectric conversion device, an apparatus, and a signal processing method. [Background technology]

[0002] In imaging devices such as digital cameras equipped with a CMOS image sensor, which is an XY address type imaging element, there is a technology in which multiple signal lines are arranged for one pixel column and signals are read out in parallel in order to read out signals from the pixel section at high speed.

[0003] Patent Document 1 discloses a solid-state imaging device in which, when reading out data from pixels using some of multiple signal lines, the signal lines not used for reading out data are always fixed at a constant voltage, thereby reducing the difference in voltage state between the signal lines. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] International Publication No. 2015 / 151793 Summary of the Invention [Problem to be solved by the invention]

[0005] Patent Document 1 does not disclose a case where the number of pixel rows read in parallel is less than the number of signal lines used for readout when reading out the end address of the scanning area. In such a case, the signal lines that do not output pixel signals become floating. The change in the number of floating signal lines causes the voltage level of the signal lines that read out signals from the pixels to fluctuate, resulting in a problem of degradation in image quality. [Means for solving the problem]

[0006] One aspect of the present disclosure is a photoelectric conversion device comprising: a plurality of pixels arranged in an array and having a scanning area that is scanned sequentially in a predetermined direction; a plurality of signal lines extending in a column direction and provided in each pixel column; and a scanning circuit that scans the plurality of pixels, wherein the scanning circuit scans two or more pixels arranged in a predetermined number of pixel rows, two or more, of the plurality of pixels in parallel to connect them to any of the plurality of signal lines during a scanning period in which the scanning area is scanned; and the scanning circuit reads out a first group of pixel rows having a first number of rows in the scanning area during a first period included in the scanning period, and during a second period in which the first or last scan of the scanning period is performed, reads out a second group of pixel rows having a second number of rows less than the first number of rows in the scanning area in parallel, and reads out a third group of pixel rows having a third number of rows less than the first number of rows in the scanning area in parallel. Effect of the Invention

[0007] According to at least one embodiment of the present disclosure, a photoelectric conversion device with improved image quality can be provided. [Brief description of the drawings]

[0008] [Figure 1] 1 is a block diagram showing an example of the configuration of a solid-state imaging device according to a first embodiment. [Diagram 2] FIG. 2 is a diagram illustrating an example of the configuration of a pixel according to the first embodiment. [Diagram 3] FIG. 2 is a diagram illustrating an example of the configuration of a pixel according to the first embodiment. [Figure 4] 2 is a schematic diagram showing an example of the configuration of a vertical scanning section and a pixel section according to the first embodiment. FIG. [Diagram 5] 2 is a schematic diagram showing an example of the configuration of a pixel region and a horizontal transfer section according to the first embodiment; [Figure 6] 4 is a timing chart showing an operation example according to the first embodiment. [Figure 7] FIG. 2 is a flowchart illustrating a process flow according to the first embodiment. [Figure 8]FIG. 2 is a block diagram showing an example of a hardware configuration according to the first embodiment. [Figure 9] FIG. 2 is a flowchart illustrating a process flow according to the first embodiment. [Figure 10] FIG. 11 is a diagram illustrating an example of the configuration of a pixel according to a second embodiment. [Figure 11] FIG. 11 is a diagram illustrating an example of the configuration of a pixel according to a second embodiment. [Figure 12] 13 is a schematic diagram showing an example of the configuration of a pixel region and a horizontal transfer unit according to a second embodiment. FIG. [Figure 13] 10 is a timing chart showing an operation example according to the second embodiment. [Figure 14] FIG. 13 is a schematic diagram showing a configuration of a device according to a third embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] In the following embodiments, a solid-state imaging device will be mainly described as an example of a photoelectric conversion device. However, each embodiment is not limited to a solid-state imaging device, and can be applied to other examples of photoelectric conversion devices. For example, a distance measuring device (a device for measuring distance using focus detection or TOF (Time Of Flight)) or a photometric device (a device for measuring the amount of incident light) may be used.

[0010] Furthermore, the disclosure of this specification includes the complement of the concepts described in this specification. In other words, if this specification contains a statement that "A is greater than B," even if the statement that "A is not greater than B" is omitted, this specification can be said to disclose that "A is not greater than B." This is because when a statement that "A is greater than B" is made, it is assumed that the case in which "A is not greater than B" is taken into consideration.

[0011] (First embodiment) FIG. 1 is a block diagram showing an example of the configuration of a solid-state imaging device according to the present embodiment.

[0012] The solid-state imaging device 1 is controlled by a CPU 101. The CPU 101 may be provided inside the solid-state imaging device 1, or may be provided inside an imaging system in which the solid-state imaging device 1 is mounted, that is, outside the solid-state imaging device 1.

[0013] The control unit 102 receives control signals such as a sync signal and setting signals such as an operation mode from the CPU 101 , and outputs control signals to the vertical scanning unit 103 and the horizontal transfer unit 107 .

[0014] The vertical scanning unit 103 receives a control signal from the control unit 102 and performs a read operation of the pixel unit 104. The read operation refers to an operation in which the vertical scanning unit 103 scans some or all of the pixel rows of the pixel unit 104 in a predetermined direction and sequentially outputs a signal based on the charge accumulated in the photoelectric conversion element in each pixel of the pixel unit 104. Hereinafter, the region where the read operation is performed is referred to as a scanning region.

[0015] The pixel section 104 has pixels arranged in an array, and includes a first pixel region 105 and a second pixel region 106. The first pixel region 105 includes a plurality of unit pixels P(1,1) to P(m,n) arranged in a plurality of rows and a plurality of columns, with n rows and m columns. Here, the row direction refers to the horizontal direction in the drawing, and the column direction refers to the vertical direction in the drawing. The subscripts in parentheses of the unit pixels P(m,n) indicate the column number and row number, respectively. The row number of the first row is the first row, and the column number of the first column is the first column.

[0016] Each of the unit pixels P includes a photoelectric conversion unit made of a photoelectric conversion element such as a photodiode, and outputs a pixel signal according to the amount of incident light. In addition to effective pixels that output pixel signals according to the amount of incident light, the first pixel region 105 may also include optical black pixels whose photoelectric conversion units are shielded from light, dummy pixels that do not output signals, and the like.

[0017] The second pixel region 106 includes a plurality of NULL pixels Q(1,n+1) to Q(m,n+k) in k rows and m columns, and are arranged in different rows from the columns in which the plurality of unit pixels P constituting the first pixel region 105 are arranged. Each of the plurality of NULL pixels Q does not include a photoelectric conversion unit, and outputs a pixel signal of a predetermined value according to a given voltage.

[0018] It should be noted that the number of rows and the number of columns of the pixels P arranged in the first pixel region 105 and the pixels Q arranged in the second pixel region 106 are not particularly limited.

[0019] The horizontal transfer unit 107 receives a control signal from the control unit 102 and transfers the signal read out from the pixel unit 104 to a signal output unit 108 .

[0020] The signal output unit 108 includes an output circuit such as a digital processing unit, a parallel-serial conversion circuit, and an LVDS (Low Voltage Differential Signaling) circuit. The signal output unit 108 digitally processes the signal transferred from the horizontal transfer unit 107, and outputs the signal as serial data to the outside of the solid-state imaging device 1.

[0021] FIG. 2 is a diagram showing an example of the configuration of a pixel P arranged in the first pixel region 105. As shown in FIG.

[0022] 2, pixel P(m,n) represents a pixel arranged in n rows and m columns of pixel unit 104. Pixel P includes a photodiode (hereinafter, abbreviated as "PD"), a floating diffusion (hereinafter, abbreviated as "FD"), a transfer transistor M1, a reset transistor M2, an amplification transistor M3, and a selection transistor M4.

[0023] The PD is a photoelectric conversion element that performs photoelectric conversion and generates and accumulates electric charges corresponding to incident light. The transfer transistor M1 transfers electric charges from the PD to the FD, which is the input node of the amplification transistor M3. The FD holds the electric charges transferred via the transfer transistor M1. The reset transistor M2 resets the voltage of the FD to a predetermined voltage. A signal based on the electric potential of the FD, which varies according to the transferred electric charges, is amplified by the amplification transistor M3. The amplified signal is output to one of the two vertical signal lines cm_vl1 or cm_vl2 in the m-th column via the selection transistor M4.

[0024] The drains of the reset transistor M2 and the amplifying transistor M3 are electrically connected to a pixel power supply VCC. The source of the amplifying transistor M3 is electrically connected to a current source (not shown) via the selection transistor M4 and the signal line cm_vl1 or cm_vl2, and operates as a source follower circuit. That is, the amplifying transistor M3 can output a signal according to the potential of the FD connected to the gate terminal. The signal lines cm_vl1 and 2 through which signals are output from the pixels are also called vertical signal lines.

[0025] Each transistor included in the unit pixel P may be configured as an N-channel transistor or a P-channel transistor.

[0026] The signal PTX(n) is a signal that controls the transfer transistor M1 in the nth row and is input to the gate of the transfer transistor. The signal PRES(n) is a signal that controls the reset transistor M2 in the nth row and is input to the gate of the reset transistor. The signal PSEL(n) is a signal that controls the selection transistor M4 in the nth row and is input to the gate of the selection transistor. Each transistor is in a conductive state when the signal input to the gate is at a high level and in a non-conductive state when the signal input to the gate is at a low level.

[0027] When reading out a pixel P, N (noise) data is read out first, and then S (signal) data is read out. After the reset of the FD is released, the charge of the FD is read out via the amplification transistor M3 by controlling the gate voltage of the selection transistor M4. After the N data is read out, the charge of the PD is transferred to the FD by the transfer transistor M1, and the charge of the FD at that time is read out via the amplification transistor M3 by controlling the gate voltage of the selection transistor M4. By performing correlated double sampling processing (S data - N data) on the data of the pixel P, the reset noise of the FD can be removed.

[0028] FIG. 3 is a diagram showing an example of the configuration of the NULL pixel Q arranged in the second pixel region 106. As shown in FIG.

[0029] The NULL pixel Q includes a floating diffusion (hereinafter, referred to as "FDn"), a reset transistor M5, an amplification transistor M6, and a selection transistor M7. The NULL pixel Q differs from the unit pixel P in that the NULL pixel Q does not include a PD and a transfer transistor M1. Otherwise, the NULL pixel Q has the same configuration as the unit pixel P.

[0030] The reset transistor M5 resets the voltage of FDn to a predetermined voltage. The amplification transistor M6 outputs a signal based on the potential of FDn, which varies according to the transferred charge, to one of the two signal lines cm_vl1 or cm_vl2 in the m-th column via the selection transistor M7.

[0031] The drains of the reset transistor M5 and the amplifier transistor M6 are electrically connected to the pixel power supply VCC. The source of the amplifier transistor M6 is electrically connected to a current source (not shown) via the selection transistor M7 and the signal line cm_vl1 or cm_vl2, and operates as a source follower circuit. That is, the amplifier transistor M6 can output a signal according to the potential of FDn connected to the gate terminal.

[0032] Each transistor included in the NULL pixel Q may be configured as an N-channel transistor or may be configured as a P-channel transistor.

[0033] A signal PRES(n) is a signal that controls the reset transistor M5 in the nth row and is input to the gate of the reset transistor M. A signal PSEL(n) is a signal that controls the selection transistor M7 in the nth row and is input to the gate of the selection transistor M.

[0034] As described above, the reset transistor M5, the amplification transistor M6, and the selection transistor M7 of the NULL pixel Q have the same configurations as the reset transistor M2, the amplification transistor M3, and the selection transistor M4 of the unit pixel P. Therefore, an N signal obtained by excluding the effects of the photoelectric conversion element PD and the transfer transistor M1 from the N signal of the unit pixel P is read out from the NULL pixel Q.

[0035] FIG. 4 is a schematic diagram showing an example of the configuration of a vertical scanning section and a pixel section according to the present embodiment.

[0036] The vertical scanning unit 103 outputs signals PTX, PRES, and PSEL. The signals PTX(s), PRES(s), and PSEL(s) (s:1 to n) are input to pixels P(m,s) (s:1 to n) arranged in the s-th row of the first pixel region 105.

[0037] Similarly, signals PRES(s) and PSEL(s) (s: n+1 to n+k) are input to NULL pixels Q(m,s) (s: n+1 to n+k) arranged in the sth row of the second pixel region 106.

[0038] This makes it possible to perform a read operation of the pixels P in the 1st to nth rows and a read operation of the NULL pixels Q in the (n+1)th to (n+k)th rows.

[0039] FIG. 5 is a schematic diagram showing an example of the configuration of a pixel region and a horizontal transfer section according to the present embodiment.

[0040] A plurality of signal lines 502 are provided for each column of pixels in the pixel unit 104. The signal lines 502 extend in the column direction. The first pixel region 105 has pixels P in each column. The signal lines 502 are connected to the pixels P in each column. The second pixel region 106 has NULL pixels Q in each column. The signal lines 502 are connected to the NULL pixels Q in each column.

[0041] That is, each of the pixels of the pixel section 104 is connected via a selection transistor to one of the signal lines 502 arranged in each pixel column at a predetermined row interval.

[0042] The selection transistor M4 provided in the pixel P(r,s) in the rth column and the sth row (r:1 to m, s:1 to n) is connected to the signal line 502 by the signal line sel(s)_cr. Also, the selection transistor M7 provided in the NULL pixel Q(r,s) in the rth column and the sth row (r:1 to m, s:n+1 to n+k) is connected to the signal line 502 by the signal line sel(s)_cr. The signal line 502 is connected to a constant current source (not shown). Also, the signal line 502 is connected to the horizontal transfer unit 107.

[0043] In the following description of this embodiment, an example in which two signal lines 502 are arranged for each column will be described, but the number of signal lines 502 per column is not limited to this. In Fig. 5, the two signal lines 502 connected to the pixels in the first column are represented as c1_vl1 and c1_vl2. Similarly, the two signal lines 502 connected to the pixels in the rth column are represented as cr_vl1 and cr_vl2.

[0044] The unit pixels P, the signal lines sel(s)_cr, and the signal lines cr_vl1 and cr_vl2 in each row of the first pixel region 105 are connected as follows.

[0045] The pixel P(r,1) in the first row is connected to the signal line cr_vl1 via the signal line sel(1)_cr. The pixel P(r,2) in the second row is connected to the signal line cr_vl2 via the signal line sel(2)_cr. Similarly, the pixels P in the odd rows are connected to the signal line cr_vl1 via the signal line sel(1)_cr, and the pixels P in the even rows are connected to the signal line cr_vl2 via the signal line sel(2)_cr. This connection is just one example, and the connections may be made at any period as necessary.

[0046] The NULL pixels Q in each row of the second pixel region 106 are all connected to the signal line cr_vl2 by the signal line sel(s)_cr. This connection is just one example, and it is not necessary that all the NULL pixels Q in each row are connected to the signal line cr_vl2, and it is sufficient that each row is connected to either the signal line cr_vl1 or cr_vl2.

[0047] FIG. 6 is a timing chart showing an example of the operation of the solid-state imaging device according to this embodiment.

[0048] In this embodiment, image data is acquired by scanning from the first row to the nth row (n: a natural number equal to or greater than 1) in the first vertical scan.

[0049] At time T1, a read operation is started. From time T1 to time T1-1, the charges of the PD are read out from the pixels P arranged in the first and second rows. At that time, the vertical scanning unit controls PTX(s), PRES(s), and PSEL(s) (s: 1 to 2) to perform a read operation from the selection transistor M4 of the pixel P, and the read signal from each pixel is read out via sel(s)_r (s: 1 to 2, r: 1 to m), with the pixel signal of the first row being read out from the signal line cr_vl1 and the pixel signal of the second row being read out from the signal line cr_vl2.

[0050] Next, from time T1-1 to time T1-2, the PD charges of the pixels P in the third and fourth rows are read out from two signal lines arranged in each column. At this time, the vertical scanning unit controls PTX(s), PRES(s), and PSEL(s) (s: 3 to 4) to perform a read operation from the selection transistor M4 of the pixel P, and the read signal from each pixel is read out from the signal line cr_vl1 for the pixel signal in the third row and the signal line cr_vl2 for the pixel signal in the fourth row via sel(s)_r (s: 3 to 4, r: 1 to m). After that, until time T1-3, the read operation is performed by sequentially scanning two rows at a time in synchronization with the horizontal synchronization signal HD.

[0051] From time T1-3 to time T1-4, pixel signals from pixel P in the nth row and NULL pixel in the n+2th row are read out from two signal lines, respectively. At this time, the vertical scanning unit controls PTX(s), PRES(s), and PSEL(s) (s: n, n+2) to perform a read operation from the selection transistor M4 of pixel P and the selection transistor M7 of NULL pixel Q, and the read signal from each pixel is read out via sel(s)_r (s: n, n+2, r: 1 to m), with the pixel signal in the nth row being read out from the signal line cr_vl1 and the pixel signal in the n+2th row being read out from the signal line cr_vl2.

[0052] That is, the vertical scanning unit 103 performs the following: During a certain period (first period) of the scanning period, it reads out a first group of pixel rows having a certain number of rows (first number of rows) in the scanning area. Also, during the final scanning period (second period), it reads out a second group of pixel rows having a number of rows (second number of rows) less than the first number of rows in the scanning area, and reads out a third group of pixel rows having a number of rows (third number of rows) less than the first number of rows in the scanning area, in parallel.

[0053] As will be described later in another embodiment, the second period may be a period in which the first scan of the scanning period is performed. Also, the third pixel row group may be selected from the first pixel region 105.

[0054] In addition, in this embodiment, the NULL pixels Q are read from the n+2th row, but they may be read from the n+1th row. That is, as in this embodiment, a pixel row may be present between the second pixel row group and the third pixel row group, or no pixel row may be present between the second pixel row group and the third pixel row group.

[0055] If the NULL pixel signal in the (n+2)th row is not read out at the same time as the pixel signal in the nth row, the signal line cr_vl2 will become floating, causing the voltage level of the vertical line cr_vl1 used for readout to fluctuate, which will affect the pixel signal in the nth pixel.

[0056] According to the configuration disclosed in this embodiment, in a case where the readout periods of a predetermined number of pixel rows overlap, it is possible to read out all pixels in a scanning area while preventing signal lines from floating.

[0057] Fig. 7 is a timing chart showing an example of the operation of the solid-state imaging device according to this embodiment. The difference from the timing chart of Fig. 6 is that when scanning each row to perform a readout operation, all rows are read out one by one in Fig. 6, whereas the readout operation is performed by scanning every third row in Fig. 7.

[0058] At time T1, a readout operation starts. From time T1 to time T1-1, the charges of the PDs of the pixels P in the first and fourth rows are read out. The pixel signals of the first row are read out from the signal line cr_vl1, and the pixel signals of the fourth row are read out from the signal line cr_vl2.

[0059] Next, from time T1-1 to time T1-2, the charges of the PDs of the pixels P in the 7th and 10th rows are read out from the two signal lines arranged in each column. The pixel signal in the 7th row is read out from the signal line cr_vl1, and the pixel signal in the 10th row is read out from the signal line cr_vl2.

[0060] After that, until time T1-3, the operation of reading out every third row is performed sequentially in units of two rows for each horizontal synchronization signal HD.

[0061] From time T1-3 to time T1-4, pixel signals from pixel P in the n-2th row and NULL pixel Q in the n+2th row are read out from two signal lines. The pixel signal from the n-2th row is read out from signal line cr_vl1, and the pixel signal from the n+2th row is read out from signal line cr_vl2.

[0062] In the example shown in Fig. 7, the NULL pixels Q are read from the n+2th row, but they may be read from the n+1th row. Also, the additional pixels to be read do not necessarily have to be NULL pixels Q, and may be read from unit pixels P not used for readout. Even if done as in Fig. 7, as in the example of Fig. 6, by reading additional NULL pixels when reading the last row of the scanning area, it is possible to perform reading without floating the signal lines.

[0063] Fig. 8 is a timing chart showing an example of the operation of the solid-state imaging device according to this embodiment. The difference from the timing chart in Fig. 6 is that when scanning each row to perform a readout operation, all rows are read out one by one in the example of Fig. 6, whereas pixels are read out in units of 4 pixels per 10 rows for every 1HD of horizontal synchronization signal in the example of Fig. 8. Also, of the 4 pixels that are read out simultaneously, 2 pixels are read out using one signal line, and the remaining 2 pixels are read out using the other signal line.

[0064] At time T1, the readout operation begins. From time T1 to time T1-1, the charges of the PDs of the pixels P in the 1st, 3rd, 6th, and 8th rows are read out. The pixel signals of the 1st and 3rd rows are read out from the signal line cr_vl1, and the pixel signals of the 6th and 8th rows are read out from the signal line cr_vl2.

[0065] After that, until time T1-3, the operation of reading out 4 pixels per 10 rows is performed sequentially in synchronization with the horizontal synchronization signal HD.

[0066] Between time T1-3 and time T1-4, pixel signals from pixels P in the (n-2)th and nth rows and NULL pixels in the (n+1)th and n+2th rows are read out from two signal lines.

[0067] Pixel signals from the (n-2)th and nth rows are read out from a signal line cr_vl1, and pixel signals from the (n+1)th and n+2nd rows are read out from a signal line cr_vl2.

[0068] In this embodiment, the NULL pixels Q are read from the n+1th and n+2th rows, but only one of the rows may be used. By reading out the NULL pixels from two rows, the n+1th and n+2th rows, the number of pixels connected to cr_vl1 and cr_vl2 is made uniform, which has the effect of reducing the level difference between the signal lines cr_vl1 and cr_vl2.

[0069] Moreover, the additional pixel to be read out does not necessarily have to be the NULL pixel Q, and may be read out from a unit pixel P not used for reading out as long as it is connected to the signal line cr_vl2.

[0070] Even with the arrangement shown in FIG. 8, similar to the example shown in FIG. 6, when reading out the final row of the scanning area, additional NULL pixels can be read out so that the vertical lines do not become floating.

[0071] Fig. 9 is a timing chart showing an example of the operation of the solid-state imaging device according to this embodiment. The difference from the example shown in Fig. 6 is the timing for avoiding the signal line from floating when reading out the upper and lower ends of the scanning area.

[0072] In the example of Fig. 6, a signal line that becomes floating near the last row of the readout of the scanning area is connected to the output of a NULL pixel for readout. In contrast, in the example of Fig. 9, the NULL pixel and the unit pixel P of the scanning area are read out simultaneously at the start of readout, thereby preventing the signal line from floating.

[0073] At time T1, the readout operation begins. From time T1 to time T1-1, pixel P in the 1st row and NULL pixel Q in the n+1th row are read out. The pixel signal in the 1st row is read out from signal line cr_vl1, and the pixel signal in the n+1th row is read out from signal line cr_vl2. The NULL pixel in the n+1th row read out at this time may be the NULL pixel in the n+2th row.

[0074] Next, from time T1-1 to time T1-2, the charges of the PDs of the pixels P in the second and third rows are read out from two signal lines arranged in each column. The pixel signals in the second row are read out from the signal line cr_vl2, and the pixel signals in the third row are read out from the signal line cr_vl1.

[0075] After that, until time T1-4, in synchronization with the horizontal sync signal HD, two rows are scanned at a time to perform a sequential readout operation.

[0076] As in the example of FIG. 9, even if NULL pixels are read out when reading out the first row, reading can be performed without causing the signal lines to become floating, similar to the example of FIG.

[0077] In the present embodiment, the embodiment in which each of the plurality of unit pixels P includes a selection transistor has been described, but the present invention is not limited to this embodiment. For example, the voltage for resetting the FD is made different between the pixels in the non-selected row and the pixels in the selected row. In the pixels in the non-selected row, the reset voltage of the FD is applied so that the gate-source voltage of the amplification transistor is smaller than the threshold voltage of the amplification transistor. On the other hand, in the pixels in the selected row, the reset voltage of the FD is applied so that the gate-source voltage of the amplification transistor is larger than the threshold voltage of the amplification transistor. In this way, even in a configuration in which no selection transistor is provided and the amplification transistor is directly connected to the signal line, the selected and non-selected states of the plurality of unit pixels P can be changed. Even in the unit pixel P having this configuration, the present embodiment and the embodiments shown below can be applied.

[0078] Second embodiment The second embodiment will be described focusing on the differences from the first embodiment. In this embodiment, each unit pixel P constituting the first pixel region 105 has two photoelectric conversion elements and two selection transistors connecting FDs and signal lines. Four signal lines 502 are arranged for each column. Furthermore, the vertical scanning circuit and driving method are different.

[0079] 10 illustrates an example of the configuration of a unit pixel P arranged in the first pixel region 105 according to this embodiment. The unit pixel P includes two photoelectric conversion elements PD1 and PD2, charge transfer means M1 and M8, a floating diffusion portion FD, a reset means M2, a signal amplification means M3, and row selection means M4 and M9.

[0080] The photoelectric conversion elements PD1 and PD2 each have a photoelectric conversion element such as a photodiode that generates an electric charge according to the amount of light incident thereon. In addition, the charge transfer means M1 and M8 are connected between the photoelectric conversion elements PD1 and PD2, respectively, and the FD.

[0081] The photoelectric conversion element PD1 in the mth column is a Gr pixel equipped with a green color filter. The photoelectric conversion element PD2 in the mth column is an R pixel equipped with a red color filter. The photoelectric conversion element PD1 in the (m+1)th column is a B pixel equipped with a blue color filter, and the photoelectric conversion element PD2 is a Gb pixel equipped with a green color filter (not shown). That is, the mth column and the nth row of the (m+1)th column form a Bayer array. This configuration is an example, and it is not necessarily required to have a color filter, and a configuration without a color filter may be used depending on the application.

[0082] 11 is a diagram showing an example of the configuration of a NULL pixel Q arranged in the second pixel region 106. The difference from the NULL pixel Q described in the first embodiment is that the NULL pixel Q has two selection transistors, but this is not an essential configuration, and the NULL pixel Q may have a configuration having one selection transistor, as in the first embodiment.

[0083] 12 is a schematic diagram showing an example of the configuration of a pixel region and a horizontal transfer unit according to this embodiment. The difference from the configuration described in the first embodiment is that four signal lines 502 are arranged in each column across the first pixel regions 105 and 106.

[0084] The connection between the pixel signal sel1(s)_cr and the signal lines cr_vl#(#:1-4) of each row of the first pixel region 105 is different from that of the first embodiment in that the connection between sel1(s)_cr and the signal lines cr_vl#(#:1-2) is made every four rows instead of every two rows. Also, in this embodiment, the signal lines are connected to cr_vl1, cr_vl2, cr_vl3, and cr_vl4 in row order, but this is not necessarily required and they may be connected in any order as necessary.

[0085] The signal lines sel2(s)_cr and signal lines cr_vl# (#: 1 to 4) in each row of the first pixel region 105 are connected in a cycle of 8 rows.

[0086] That is, pixel P(r,1) in the first row is connected to signal line cr_vl1 via signal line sel2(1)_r. Pixel P(r,2) in the second row is connected to signal line cr_vl1 via signal line sel2(2)_r. Pixel P(r,3) in the third row is connected to signal line cr_vl2 via signal line sel2(3)_r. Pixel P(r,4) in the fourth row is connected to signal line cr_vl2 via signal line sel2(4)_r.

[0087] Furthermore, pixel P(r,5) in the fifth row is connected to signal line cr_vl3 via signal sel2(5)_r. Pixel P(r,6) in the sixth row is connected to signal line cr_vl3 via signal line sel2(6)_r. Pixel P(r,7) in the seventh row is connected to signal line cr_vl4 via signal sel2(7)_r. Pixel P(r,8) in the eighth row is connected to signal line cr_vl4 via signal line sel2(8)_r.

[0088] Similarly, the ninth row and onwards to the nth row are connected to the signal lines in a cycle of 8 rows. This connection is one example, and the rows may be connected in any cycle as required.

[0089] In the first embodiment, of the two signal lines 502, a NULL pixel is connected to the signal line cr_vl2 that may become floating when reading out pixels at the edge of the scanning area. On the other hand, in the present embodiment, of the four signal lines, a NULL pixel is connected to all four signal lines in each column from cr_vl1 to cr_vl4 that may become floating.

[0090] That is, the pixel Q(r,n+1) in the n+1th row is connected to the signal line cr_vl1 via the signal lines sel1(n+1)_r and sel2(n+1)_r, and the pixel Q(r,n+2) in the n+2th row is connected to the signal line cr_vl2 via the signal lines sel1(n+2)_r and sel2(n+2)_r.

[0091] The pixel Q(r,n+3) in the (n+3)th row is connected to the signal line cr_vl3 via the signal lines sel1(n+3)_r and sel2(n+3)_r. The pixel Q(r,n+4) in the (n+4)th row is connected to the signal line cr_vl4 via the signal lines sel1(n+4)_r and sel2(n+4)_r.

[0092] Similarly, from the n+4th row onwards to the n+kth row, the signal lines are connected in a cycle of 8 rows. This connection is one example, and it is not necessarily required to connect in a cycle of 8 rows, and the signal lines may be connected in any cycle as necessary.

[0093] Furthermore, it is not necessary to connect NULL pixels to all four signal lines in each column from cr_vl1 to cr_vl4, as long as the signal lines that may become floating when read out are connected to NULL pixels.

[0094] 13 is a timing chart showing an example of the operation of the solid-state imaging device according to this embodiment. The difference from the first embodiment is that readout is performed using all four signal lines arranged in each column of the scanning area.

[0095] At time T1, a read operation is started, and an operation of reading out 4 pixels per 12 rows for each Bayer color for every 1 HD from time T1 to time T1-2 is sequentially performed in synchronization with the horizontal synchronization signal HD.

[0096] From time T1-2 to time T1-3, pixel signals from pixels P in the n-10th, n-8th, n-3th, and n-1th rows, and NULL pixels Q in the n+3th, n+4th, n+7th, and n+8th rows are read out from four signal lines, respectively.

[0097] That is, pixel signals in the (n-10)th and (n-8)th rows are read out from signal line cr_vl1, pixel signals in the (n-3)th and (n-1)th rows are read out from signal line cr_vl3, pixel signals in the (n+3)th and (n+4)th rows are read out from signal line cr_vl2, and pixel signals in the (n+7)th and (n+8)th rows are read out from signal line cr_vl4.

[0098] In this embodiment, the NULL pixels Q are read out from four rows, the n+3th, n+4th, n+7th, and n+8th rows, but it is sufficient that at least one NULL pixel is connected to each of the signal lines cr_vl2 and cr_vl4. By reading out two rows of NULL pixels from each signal line, it is possible to equalize the number of pixels connected to each signal line in each column from cr_vl1 to cr_vl4, which has the effect of reducing the level difference between the signals of the signal lines cr_vl1 to cr_vl4.

[0099] Furthermore, the additional pixels to be read out do not necessarily have to be NULL pixels Q, and may be read out from valid pixels not used for reading out as long as they are connected to the signal lines cr_vl2 and cr_vl4.

[0100] In addition, in this embodiment, an example is described in which the selection transistors M9 and M10 are always used to read out each pixel P and NULL pixel Q from the FD during one vertical synchronization signal (VD) period, but this is not necessarily required. That is, the selection transistor used for each HD may be M4 or M9 for a pixel P, and M7 or M10 for a NULL pixel Q, and this may be changed as appropriate by switching the control of the vertical scanning unit 103 according to the thinned-out rows for vertical readout.

[0101] In this embodiment, similarly to the first embodiment, by additionally reading out NULL pixels, it is possible to perform reading without floating the signal lines.

[0102] (Third embodiment) The third embodiment is applicable to both the first and second embodiments. Fig. 14(a) is a schematic diagram for explaining an apparatus 9191 equipped with a semiconductor device 930 of this embodiment. The semiconductor device 930 can be the photoelectric conversion device of each of the above-mentioned embodiments.

[0103] An apparatus 9191 including a semiconductor device 930 will be described in detail. As described above, the semiconductor device 930 can include a package 920 that houses the semiconductor device 910, in addition to the semiconductor device 910 having the semiconductor layer 902. The package 920 can include a base to which the semiconductor device 910 is fixed, and a lid such as glass that faces the semiconductor device 910. The package 920 can further include a bonding member such as a bonding wire or a bump that connects a terminal provided on the base and a terminal provided on the semiconductor device 910.

[0104] The device 9191 can include at least one of an optical device 940, a control device 950, a processing device 960, a display device 970, a storage device 980, and a mechanical device 990. The optical device 940 corresponds to the semiconductor device 930. The optical device 940 is, for example, a lens, a shutter, or a mirror. The control device 950 controls the semiconductor device 930. The control device 950 is, for example, a semiconductor device such as an ASIC.

[0105] The processing device 960 processes the signal output from the semiconductor device 930. The processing device 960 is a semiconductor device such as a CPU or ASIC for configuring an AFE (analog front end) or a DFE (digital front end). The display device 970 is an EL display device or a liquid crystal display device that displays information (images) obtained by the semiconductor device 930. The storage device 980 is a magnetic device or a semiconductor device that stores information (images) obtained by the semiconductor device 930. The storage device 980 is a volatile memory such as an SRAM or a DRAM, or a non-volatile memory such as a flash memory or a hard disk drive.

[0106] The mechanical device 990 has a moving part or a propulsion part such as a motor or an engine. In the device 9191, the signal output from the semiconductor device 930 is displayed on the display device 970, or transmitted to the outside by a communication device (not shown) included in the device 9191. For this purpose, the device 9191 preferably further includes a memory device 980 and a processing device 960 in addition to the memory circuit and arithmetic circuit included in the semiconductor device 930. The mechanical device 990 may be controlled based on the signal output from the semiconductor device 930.

[0107] The device 9191 is also suitable for electronic devices such as information terminals (e.g., smartphones and wearable devices) with a photographing function and cameras (e.g., interchangeable lens cameras, compact cameras, video cameras, and surveillance cameras). The mechanical device 990 in the camera can drive components of the optical device 940 for zooming, focusing, and shutter operation. Alternatively, the mechanical device 990 in the camera can move the semiconductor device 930 for vibration isolation operation.

[0108] The device 9191 may be transportation equipment such as a vehicle, a ship, or an aircraft. The mechanical device 990 in the transportation equipment may be used as a moving device. The device 9191 as a transportation equipment is suitable for transporting the semiconductor device 930 or for assisting and / or automating driving (piloting) by using a photographing function. The processing device 960 for assisting and / or automating driving (piloting) can perform processing for operating the mechanical device 990 as a moving device based on information obtained by the semiconductor device 930. Alternatively, the device 9191 may be a medical device such as an endoscope, a measuring device such as a distance measuring sensor, an analytical device such as an electron microscope, an office machine such as a copier, or an industrial device such as a robot.

[0109] According to the above-described embodiment, it is possible to obtain good pixel characteristics. Therefore, the value of the semiconductor device can be increased. In this case, increasing the value corresponds to at least one of adding functions, improving performance, improving characteristics, improving reliability, improving manufacturing yield, reducing environmental load, reducing costs, reducing size, and reducing weight.

[0110] Therefore, if the semiconductor device 930 according to this embodiment is used in the equipment 9191, the value of the equipment can be improved. For example, by mounting the semiconductor device 930 on a transport equipment, excellent performance can be obtained when photographing the outside of the transport equipment or measuring the external environment. Therefore, in manufacturing and selling the transport equipment, it is advantageous to decide to mount the semiconductor device according to this embodiment on the transport equipment in order to improve the performance of the transport equipment itself. In particular, the semiconductor device 930 is suitable for transport equipment that performs driving assistance and / or automatic driving of the transport equipment using information obtained by the semiconductor device.

[0111] The photoelectric conversion system and the moving object of this embodiment will be described with reference to FIGS.

[0112] Fig. 14(b) shows an example of a photoelectric conversion system related to an in-vehicle camera. The photoelectric conversion system 8000 has a photoelectric conversion device 80. The photoelectric conversion device 80 is the photoelectric conversion device (imaging device) described in any of the above embodiments. The photoelectric conversion system 8000 has an image processing unit 801 that performs image processing on a plurality of image data acquired by the photoelectric conversion device 80, and a parallax acquisition unit 802 that calculates parallax (phase difference of parallax images) from the plurality of image data acquired by the photoelectric conversion system 8000.

[0113] The photoelectric conversion system 8000 also includes a distance acquisition unit 803 that calculates the distance to the object based on the calculated parallax, and a collision determination unit 804 that determines whether or not there is a possibility of collision based on the calculated distance. Here, the parallax acquisition unit 802 and the distance acquisition unit 803 are examples of distance information acquisition means that acquire information on the distance to the object. That is, the distance information is information on the parallax, the defocus amount, the distance to the object, and the like. The collision determination unit 804 may determine the possibility of collision using any of these pieces of distance information.

[0114] The distance information acquisition means may be realized by dedicated hardware, a software module, a field programmable gate array (FPGA), an application specific integrated circuit (ASIC), or a combination of these.

[0115] The photoelectric conversion system 8000 is connected to a vehicle information acquisition device 810 and can acquire vehicle information such as vehicle speed, yaw rate, steering angle, etc. The photoelectric conversion system 8000 is also connected to a control ECU 820, which is a control device that outputs a control signal for generating a braking force for the vehicle based on the determination result of the collision determination unit 804. The photoelectric conversion system 8000 is also connected to an alarm device 830 that issues an alarm to the driver based on the determination result of the collision determination unit 804.

[0116] For example, when the collision probability is high as a result of the judgment by the collision judgment unit 804, the control ECU 820 performs vehicle control to avoid the collision and reduce damage by applying the brakes, releasing the accelerator, suppressing the engine output, etc. The warning device 830 warns the user by sounding a warning, displaying warning information on the screen of a car navigation system, etc., applying vibrations to the seat belt or steering wheel, etc.

[0117] In this embodiment, the surroundings of the vehicle, for example, the front or rear, are imaged by the photoelectric conversion system 8000. Fig. 14(c) shows the photoelectric conversion system when imaging the area in front of the vehicle (imaging range 850). The vehicle information acquisition device 810 sends an instruction to the photoelectric conversion system 8000 or the photoelectric conversion device 80. With this configuration, the accuracy of distance measurement can be further improved.

[0118] Although the above describes an example of control to prevent collision with other vehicles, the present invention can also be applied to control of automatic driving by following other vehicles, control of automatic driving to prevent deviation from lanes, etc. Furthermore, the photoelectric conversion system is not limited to vehicles such as the vehicle itself, but can be applied to moving bodies (moving devices) such as ships, aircraft, and industrial robots. In addition, the present invention can be applied not only to moving bodies, but also to a wide range of devices that use object recognition, such as intelligent transport systems (ITS).

[0119] (Other embodiments) It should be noted that the above-mentioned embodiments are merely examples of the implementation of the present disclosure, and the technical scope of the present disclosure should not be interpreted as being limited by these. In other words, the present disclosure can be implemented in various forms without departing from its technical concept or main features. For example, combinations of the elements of the above-mentioned embodiments are also within the scope of the present disclosure.

[0120] In addition, each of the embodiments described above can be appropriately modified without departing from the scope of the technical concept. The disclosure of this specification includes not only what is described in this specification, but also all matters that can be understood from this specification and the drawings attached to this specification.

[0121] The disclosure of this embodiment includes the following configurations and methods.

[0122] (Configuration 1) A plurality of pixels arranged in an array and having scanning areas that are sequentially scanned in a predetermined direction; A plurality of signal lines extending in a column direction and provided for each pixel column; a scanning circuit for scanning the plurality of pixels; the scanning circuit performs scanning to connect two or more pixels arranged in a predetermined number of pixel rows, which is two or more rows, among the plurality of pixels to any of the plurality of signal lines in a scanning period in which the scanning region is scanned; The scanning circuit includes: reading out a first group of pixel rows having a first number of rows in the scanning region during a first period included in the scanning period; In a second period in which the first or last scan of the scanning period is performed, a second pixel row group having a second number of rows less than the first number of rows in the scanning region and a third pixel row group having a third number of rows less than the first number of rows are read out in parallel. A photoelectric conversion device comprising:

[0123] (Configuration 2) The plurality of pixels include a first pixel region including a first pixel having a photoelectric conversion element and outputting a signal corresponding to incident light, and a second pixel region including a second pixel outputting a signal indicating a predetermined value. 2. The photoelectric conversion device according to claim 1,

[0124] (Configuration 3) 3. The photoelectric conversion device according to configuration 2, wherein the scanning region is included in the first pixel region.

[0125] (Configuration 4) 3. The photoelectric conversion device according to configuration 2, wherein the third pixel row group is included in the first pixel region.

[0126] (Configuration 5) 3. The photoelectric conversion device according to configuration 2, wherein the third pixel row group is included in the second pixel region.

[0127] (Configuration 6) The first pixel further includes a floating diffusion, The floating diffusion has a plurality of the photoelectric conversion elements connected thereto. 6. The photoelectric conversion device according to any one of configurations 2 to 5, characterized in that:

[0128] (Configuration 7) 7. The photoelectric conversion device according to any one of configurations 1 to 6, wherein a pixel row exists between the second pixel row group and the third pixel row group.

[0129] (Configuration 8) 8. The photoelectric conversion device according to any one of configurations 1 to 7, wherein the number of the pixels connected to each of the plurality of signal lines is equal.

[0130] (Configuration 9) Each of the plurality of pixels has a selection transistor; The photoelectric conversion device according to any one of configurations 1 to 8, characterized in that the scanning by the scanning circuit is a scanning that connects the selection transistors of the two or more pixels arranged in the predetermined number of pixel rows in parallel to any one of the multiple signal lines.

[0131] (Configuration 10) An apparatus including the photoelectric conversion device according to any one of configurations 1 to 9, an optical device corresponding to the photoelectric conversion device; A control device for controlling the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device.

[0132] (Method 1) A signal processing method for a photoelectric conversion device including a plurality of pixels arranged in an array and having a scanning area that is sequentially scanned in a predetermined direction, a plurality of signal lines extending in a column direction and provided in each pixel column, and a scanning circuit that scans the plurality of pixels, wherein during a scanning period in which the scanning area is scanned, scanning is performed to connect two or more pixels arranged in a predetermined number of pixel rows, which number is two or more, of the plurality of pixels in parallel to any of the plurality of signal lines, reading out a first group of pixel rows having a first number of rows in the scanning region during a first period of scanning the scanning region; and in a second period which is the first or last scan of the scanning period, reading out a second group of pixel rows having a second number of rows less than the first number of rows in the scanning region in parallel with reading out a third group of pixel rows having a third number of rows less than the first number of rows in the scanning region. 23. A signal processing method comprising: [Explanation of symbols]

[0133] 103 Vertical scanning section 104 Pixel section 502 Signal Line M4, M7 selection transistors

Claims

1. A plurality of pixels arranged in an array and having scanning areas that are sequentially scanned in a predetermined direction; A plurality of signal lines extending in a column direction and provided for each pixel column; a scanning circuit for scanning the plurality of pixels; the scanning circuit performs scanning to connect two or more pixels arranged in a predetermined number of pixel rows, which is two or more rows, among the plurality of pixels to any of the plurality of signal lines in a scanning period in which the scanning region is scanned; The scanning circuit includes: reading out a first group of pixel rows having a first number of rows in the scanning region during a first period included in the scanning period; In a second period in which the first or last scan of the scanning period is performed, reading out a second group of pixel rows having a second number of rows less than the first number of rows in the scanning region and reading out a third group of pixel rows having a third number of rows less than the first number of rows in the scanning region in parallel. A photoelectric conversion device comprising:

2. The plurality of pixels include a first pixel region including a first pixel having a photoelectric conversion element and outputting a signal corresponding to incident light, and a second pixel region including a second pixel outputting a signal indicating a predetermined value.

2. The photoelectric conversion device according to claim 1 .

3. The photoelectric conversion device according to claim 2 , wherein the scanning region is included in the first pixel region.

4. The photoelectric conversion device according to claim 2 , wherein the third pixel row group is included in the first pixel region.

5. The photoelectric conversion device according to claim 2 , wherein the third pixel row group is included in the second pixel region.

6. The first pixel further includes a floating diffusion, The floating diffusion has a plurality of the photoelectric conversion elements connected thereto.

3. The photoelectric conversion device according to claim 2 .

7. The photoelectric conversion device according to claim 1 , wherein a pixel row exists between the second pixel row group and the third pixel row group.

8. 2 . The photoelectric conversion device according to claim 1 , wherein the number of the pixels connected to each of the plurality of signal lines is equal.

9. Each of the plurality of pixels has a selection transistor; 2. The photoelectric conversion device according to claim 1, characterized in that the scanning by the scanning circuit is a scanning that connects the selection transistors of the two or more pixels arranged in the specified number of pixel rows in parallel to any one of the plurality of signal lines.

10. An apparatus comprising the photoelectric conversion device according to any one of claims 1 to 9, an optical device corresponding to the photoelectric conversion device; A control device for controlling the photoelectric conversion device; a processing device that processes a signal output from the photoelectric conversion device; a display device that displays information obtained by the photoelectric conversion device; a storage device that stores information obtained by the photoelectric conversion device; and and a mechanical device that operates based on information obtained by the photoelectric conversion device.

11. A signal processing method for a photoelectric conversion device including a plurality of pixels arranged in an array and having a scanning area that is sequentially scanned in a predetermined direction, a plurality of signal lines extending in a column direction and provided in each pixel column, and a scanning circuit that scans the plurality of pixels, wherein during a scanning period in which the scanning area is scanned, scanning is performed to connect two or more pixels arranged in a predetermined number of pixel rows, which number is two or more, of the plurality of pixels in parallel to any of the plurality of signal lines, reading out a first group of pixel rows having a first number of rows in the scanning region during a first period of scanning the scanning region; and in a second period which is the first or last scan of the scanning period, reading out a second group of pixel rows having a second number of rows less than the first number of rows in the scanning region in parallel with reading out a third group of pixel rows having a third number of rows less than the first number of rows in the scanning region. A signal processing method comprising:

Images