Vehicle control device and vehicle control method

Abstract

To provide a vehicle control device and a vehicle control method which are capable of suppressing power consumption.SOLUTION: A vehicle control device, which controls a vehicle having a first power supply mode and a second power supply mode, comprises: a first processing device which activates when switching to the first power supply mode occurs and a second processing device which activates when switching to the second power supply mode occurs. The first processing device is mounted with a first virtual machine which activates in the first power supply mode, and the second processing device is mounted with a second virtual machine which activates in the second power supply mode.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a vehicle control device and a vehicle control method. [Background technology]

[0002] Conventionally, a technology has been proposed relating to a virtual machine that realizes the functions of a control device that controls a vehicle by virtualizing and implementing the control device. For example, Patent Document 1 discloses a technology that realizes the operation of a plurality of control devices by a single processor by implementing a plurality of virtual machines in the single processor (see, for example, Patent Document 1). In this technology, starting the processor starts all of the plurality of virtual machines implemented in the processor. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Special Publication No. 2012-522320 Summary of the Invention [Problem to be solved by the invention]

[0004] However, in the conventional technology, because all of the virtual machines are started by starting the processor, some virtual machines may be started even if they do not need to be started. As a result, there is a risk that unnecessary virtual machines will be started, resulting in unnecessary power consumption.

[0005] The present application has been made in consideration of the above, and has an object to provide a vehicle control device and a vehicle control method that can reduce power consumption. [Means for solving the problem]

[0006] A vehicle control device according to the present application is a vehicle control device for controlling a vehicle having a first power mode and a second power mode, and includes a first processing device that starts up when the vehicle enters the first power mode, and a second processing device that starts up when the vehicle enters the second power mode. A first virtual machine that starts up in the first power mode is implemented in the first processing device, and a second virtual machine that starts up in the second power mode is implemented in the second processing device. Effect of the Invention

[0007] According to one aspect of the embodiment, an effect is achieved in that power consumption can be reduced. [Brief description of the drawings]

[0008] [Figure 1] FIG. 1 is a diagram for explaining the configuration and operation of a vehicle control device according to a first embodiment. [Diagram 2] FIG. 2 is a diagram showing a time-division control process performed by the processor. [Diagram 3] FIG. 3 is a flowchart illustrating an example of a startup process executed by the controller according to the first embodiment. [Figure 4] FIG. 4 is a flowchart showing an example of a termination process executed by the HV1 of the controller according to the first embodiment. [Diagram 5] FIG. 5 is a flowchart showing an example of a termination process executed by the HV2 (or HV3) of the controller according to the first embodiment. [Figure 6] FIG. 6 is a flowchart illustrating an example of a termination process executed by the VM of the controller according to the first embodiment. [Figure 7] FIG. 7 is a diagram for explaining the configuration and operation of the vehicle control device according to the second embodiment. [Figure 8] FIG. 8 is a flowchart illustrating an example of a startup process executed by the controller according to the second embodiment. [Figure 9]FIG. 9 is a flowchart showing an example of a termination process executed by the HV2 of the controller according to the second embodiment. [Figure 10] FIG. 10 is a flowchart showing an example of a termination process executed by the HV3 of the controller according to the second embodiment. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0009] Hereinafter, an embodiment of a vehicle control device and a vehicle control method will be described in detail with reference to the accompanying drawings. Note that the present invention is not limited to the embodiment described below. In the following, it is assumed that the vehicle control device according to the embodiment is mounted on a vehicle.

[0010] 1 is a diagram for explaining the configuration and operation of a vehicle control device 1 according to the first embodiment. As shown in FIG. 1, the vehicle control device 1 according to the first embodiment includes a controller 2.

[0011] The controller 2 includes a microcomputer having a central processing unit (CPU), a read only memory (ROM), a random access memory (RAM), etc., and various circuits. The controller 2 may be configured with hardware such as an application specific integrated circuit (ASIC) or a field programmable gate array (FPGA).

[0012] The controller 2 controls the operation of the vehicle control device 1 by the CPU executing a program stored in the ROM using the RAM as a working area. The controller 2 controls a first processing device 21, a second processing device 22, and a third processing device 23. The first processing device 21 to the third processing device 23 are each configured as a different processor.

[0013] Each of the first processing device 21 to the third processing device 23 is implemented with a plurality of virtual machines that virtualize control devices (e.g., ECU: Electronic Control Unit) that control the vehicle. Specifically, the virtual machine is software that simulates the operation of the control device. Each virtual machine is created by logically dividing the resources (CPU, memory, etc.) of the controller 2 for each function of the control device. For example, each virtual machine performs processing in sequence in a time-sharing manner, which will be described later with reference to FIG. 2. In this way, by implementing a plurality of virtual machines in the controller 2, the operation of a plurality of control devices can be reproduced by a single controller 2.

[0014] In the present disclosure, the start conditions of the virtual machines are different between the first processing device 21 to the third processing device 23. Furthermore, each of the first processing device 21 to the third processing device 23 collectively implements a plurality of virtual machines having the same start conditions.

[0015] In the example shown in Fig. 1, the first processing device 21 is implemented with HV1, which is a hypervisor, and VM11 and VM12, which are virtual machines. VM11 and VM12 are virtual machines whose startup condition is the input of a power supply signal (hereinafter referred to as BAT power supply) supplied from a battery of a vehicle. Specifically, VM11 is a virtual machine that performs body control that controls lighting, doors, windows, mirrors, wipers, etc. VM12 is a virtual machine that performs CGW (Central Gateway) control that controls communication with the outside.

[0016] The HV1 is software that manages the VMs 11 and 12. Specifically, the HV1 performs power control for supplying BAT power to the VMs 11 and 12 to start them up, and operation control for controlling the operations of the VMs 11 and 12.

[0017] The second processing device 22 is implemented with HV2, which is a hypervisor, and VM21 and VM22, which are virtual machines. VM21 and VM22 are virtual machines whose startup condition is the input of a power signal (hereinafter referred to as ACC power) supplied from an accessory power source of the vehicle. Specifically, VM21 is a virtual machine that performs meter control to control meters of the vehicle. VM22 is a virtual machine that performs navigation control to control a navigation device of the vehicle.

[0018] The HV2 is software that manages the VMs 21 and 22. Specifically, the HV2 performs power control for supplying ACC power to the VMs 21 and 22 to start them up, and operation control for controlling the operations of the VMs 21 and 22.

[0019] The third processing device 23 is implemented with HV3, which is a hypervisor, and VM31 and VM32, which are virtual machines. VM31 and VM32 are virtual machines whose startup condition is the input of a power signal (hereinafter referred to as IG power) supplied from the ignition power supply of the vehicle. Specifically, VM31 is a virtual machine that performs EV (Electric Vehicle) control such as control of the driving motor of the vehicle. VM32 is a virtual machine that performs chassis control that controls the suspension, steering, brakes, etc. of the vehicle.

[0020] The HV3 is software that manages the VMs 31 and 32. Specifically, the HV3 performs power control for supplying IG power to the VMs 31 and 32 to start them up, and operation control for controlling the operations of the VMs 31 and 32.

[0021] It is not necessary to implement all virtual machines with the same startup conditions in one processing device, but it is sufficient that the startup conditions of the virtual machines implemented in one processing device are the same. For example, VM21 and VM22 may not be implemented in one second processing device 22, but may be implemented in multiple second processing devices 22.

[0022] In addition, in this disclosure, an example is described in which the input of power supply signals (BAT power supply, ACC power supply, and IG power supply) is used as a startup condition, but the startup condition is not limited to a power supply signal and may be the input of other signals, such as the input of a control signal related to vehicle control.

[0023] <Startup process> Next, the startup process executed by the vehicle control device 1 will be described. In Fig. 1, the power supplies are input in the order of BAT power supply → ACC power supply → IG power supply. As shown in Fig. 1, power supply signals of the BAT power supply, ACC power supply, IG power supply, etc. are input only to the HV1. Furthermore, the vehicle control device 1 supplies a clock signal only to the HV1 when the controller 2 is started.

[0024] When a BAT signal is input to the HV1, the controller 2 transitions the power state to a battery power state (first power mode) and starts the first processing device 21. After starting the first processing device 21, the HV1 supplies the input BAT power to the VM11 and VM12 to start the VM11 and VM12. Then, after starting the VM11 and VM12, the HV1 controls the VM11 and VM12 in a time-division manner according to a clock signal. That is, when the BAT power is input, the controller 2 starts only the first processing device 21 in which the VM11 and VM12 that satisfy the start-up condition are implemented by the BAT power, and does not start the second processing device 22 and the third processing device 23.

[0025] Next, when the vehicle power switch state is operated to ACC after starting the first processing device 21, the controller 2 inputs the ACC power supply to the HV1, and the power supply state transitions to the ACC power supply state (second power supply mode). When transitioning to the ACC power supply state, the HV1 sets a register that supplies a clock signal to the HV2, and starts the second processing device 22 by supplying the ACC power supply. After starting the second processing device 22, the HV2 supplies the ACC power supply to the VM21 and VM22 to start the VM21 and VM22. Then, after starting the VM21 and VM22, the HV2 controls the VM21 and VM22 in a time-division manner according to the clock signal. That is, when the ACC power supply is input, the HV1 of the controller 2 starts the second processing device 22 in which the VM21 and VM22 that satisfy the start-up condition are implemented by the ACC power supply, and does not start the third processing device 23.

[0026] Next, when the vehicle power switch state is operated to IG after starting the second processing device 22, the controller 2 inputs IG power to the HV1, and the power state transitions to the IG power state (third power mode). When transitioning to the IG power state, the HV1 sets a register that supplies a clock signal to the HV3, and starts the third processing device 23 by supplying IG power. After starting the third processing device 23, the HV3 supplies IG power to VM31 and VM32 to start VM31 and VM32. Then, after starting VM31 and VM32, the HV3 controls VM31 and VM32 in a time-division manner according to the clock signal. When the IG power is input, the HV1 of the controller 2 starts the third processing device 23 in which VM31 and VM32 that satisfy the start-up condition are implemented by the IG power.

[0027] That is, in the first embodiment, the controller 2 inputs all power signals to the first processing device 21 that has been started up in advance. Then, the first processing device 21 identifies a processing device (the second processing device 22 or the third processing device 23) that implements a virtual machine that satisfies the start-up condition based on the input power signals, and inputs a power signal to the identified processing device to start it up.

[0028] In this way, the vehicle control device 1 according to the first embodiment identifies a processing device on which a virtual machine that satisfies the startup condition is implemented, and starts only the identified processing device, thereby preventing the startup of a processing device on which a virtual machine that does not satisfy the startup condition is implemented. This allows only virtual machines that need to be started to be started, and prevents virtual machines that do not need to be started to be started, thereby preventing unnecessary power consumption caused by starting unnecessary virtual machines. In other words, the vehicle control device 1 according to the first embodiment can reduce power consumption.

[0029] <Termination process> Next, a description will be given of the termination process executed by the vehicle control device 1. When the power supply signal corresponding to each of the first processor 21 to the third processor 23 is no longer input to the HV1 (when the power supply signal is turned off), the first processor 21 to the third processor 23 stop operation in accordance with an instruction from the HV1 (started state → stopped state).

[0030] Specifically, when the IG power supply is no longer input, the HV1 notifies the HV3 of a termination request. When the HV3 receives a termination request from the HV1, the HV3 notifies the VM31 and VM32 implemented in the third processing device 23 of the termination request. When the VM31 and VM32 receive a termination request from the HV3, they perform termination processing. The termination processing is, for example, processing to terminate control and storage processing of various data (learning values, etc.) obtained by control.

[0031] When the termination process is completed, VM31 and VM32 notify HV3 of a completion notification. When HV3 receives a completion notification from all virtual machines (VM31 and VM32) implemented in the third processing device 23, it notifies HV1 of the completion notification. When HV1 receives a completion notification from HV3, it sets a register to stop supplying a clock signal to HV3. This completes the termination process of HV3.

[0032] Next, when the ACC power supply is no longer input, HV1 notifies HV2 of a termination request. When HV2 receives a termination request from HV1, it notifies VM21 and VM22 implemented in the second processing device 22 of the termination request. When VM21 and VM22 receive a termination request from HV2, they perform termination processing. The termination processing is, for example, processing to terminate control and storage processing of various data (learning values, etc.) obtained by control.

[0033] When the termination process is completed, VM21 and VM22 notify HV2 of a completion notification. When HV2 receives a completion notification from all virtual machines (VM21 and VM22) implemented in the second processing device 22, it notifies HV1 of the completion notification. When HV1 receives a completion notification from HV2, it sets a register to stop supplying a clock signal to HV2. This completes the termination process of HV2.

[0034] Next, when the BAT power supply is no longer input, the HV1 notifies the VM11 and VM12 mounted on the first processing device 21 of a termination request. When the VM11 and VM12 receive the termination request from the HV1, they perform termination processing. The termination processing is, for example, processing to terminate control and storage processing of various data (learning values, etc.) obtained by control.

[0035] When the termination process is completed, VM 11 and VM 12 notify HV 1 of the completion. This completes the termination process of HV 1.

[0036] Next, the time-sharing control performed by the first processing device 21 to the third processing device 23 will be described with reference to Fig. 2. Fig. 2 is a diagram showing the time-sharing control process performed by the processing devices. In Fig. 2, "HVa" and "HVb" are active hypervisors among HV1 to 3. Furthermore, "VMa" and "VMb" are active virtual machines. Furthermore, it is assumed that "HVa", "VMa" and "VMb" are implemented in the same processing device.

[0037] As shown in FIG. 2, in the processing device, "HVa", "VMa" and "VMb" perform processing in order according to time within a system cycle. For example, "HVa" performs processing of power control for starting "VMa" and "VMb" and processing of generating control instructions for controlling the operation of "VMa" and "VMb" (other processing) in a time-sharing manner. After the time allocated to "HVa" is over, "VMa" performs processing. Specifically, "VMa" performs operations within the time allocated to "VMa" according to the control instructions generated by "HVa". After the time allocated to "VMa" is over, "VMb" performs processing. Specifically, "VMb" performs operations within the time allocated to "VMb" according to the control instructions generated by "HVa". Then, by performing idle processing after the time allocated to "VMb" is over, processing for one cycle in the system cycle of the processing device is completed. Then, after the idle processing is completed, other processing devices start processing in the next system cycle. In this way, "HVa", "VMa" and "VMb" perform processes in a time-sharing manner, so that one controller 2 can realize the operation of a plurality of control devices (virtual machines).

[0038] Next, the processing executed by the controller 2 according to the first embodiment will be described with reference to Figs. 3 to 6. Fig. 3 is a flowchart showing an example of a startup processing executed by the controller 2 according to the first embodiment. Fig. 4 is a flowchart showing an example of a termination processing executed by the HV1 of the controller 2 according to the first embodiment. Fig. 5 is a flowchart showing an example of a termination processing executed by the HV2 (or HV3) of the controller 2 according to the first embodiment. Fig. 6 is a flowchart showing an example of a termination processing executed by the VM of the controller 2 according to the first embodiment.

[0039] First, the start-up process will be described with reference to Fig. 3. As shown in Fig. 3, the controller 2 receives BAT power from the vehicle battery to the HV1 of the first processing device 21 (step S101), and starts up the HV1 (step S102).

[0040] Next, the HV1 inputs BAT power to the VM11 and VM12 of the first processing device 21 to start up the VM11 and VM12 (step S103).

[0041] Next, the HV1 determines whether or not there is an ACC power input (step S104). If there is an ACC power input (step S104: Yes), the HV1 transmits the ACC power to the HV2 of the second processing device 22 (step S105) and starts up the HV2 (step S106). If there is no ACC power input (step S104: No), the HV1 repeatedly executes step S104 until there is an ACC power input.

[0042] Next, the HV2 inputs ACC power to the VM21 and VM22 of the second processing device 22 to start up the VM21 and VM22 (step S107).

[0043] Next, the HV1 determines whether or not there is an IG power input (step S108). If there is an IG power input (step S108: Yes), the HV1 transmits the IG power to the HV3 of the third processing device 23 (step S109) and starts up the HV3 (step S110). If there is no IG power input (step S108: No), the HV1 repeatedly executes step S108 until there is an IG power input.

[0044] Next, the HV3 inputs IG power to the VMs 31 and 32 of the third processor 23 to start up the VMs 31 and 32 (step S111), and ends the process.

[0045] Next, the termination process executed by the HV1 will be described with reference to Fig. 4. Note that Fig. 4 describes the termination process of the second processing device 22. As shown in Fig. 4, the HV1 determines whether the ACC power supply has been turned off (step S201).

[0046] When the ACC power supply is turned off (step S201: Yes), the HV1 notifies the HV2 of a termination request (step S202). Next, the HV1 determines whether or not the HV2 has notified the HV2 of the completion of the termination process (step S203). If the ACC power supply is not turned off (step S201: No), the HV1 repeatedly executes step S201 until the ACC power supply is turned off.

[0047] If the HV1 receives a completion notification of the termination process from the HV2 (step S203: Yes), the HV1 stops the clock supply to the HV2 (step S204) and ends the process. If the HV1 does not receive a completion notification of the termination process from the HV2 (step S203: No), the HV1 repeats step S203 until the completion notification is received.

[0048] Next, the termination process executed by the HV2 (or HV3) will be described with reference to Fig. 5. Note that the HV2 will be described as an example in Fig. 5. As shown in Fig. 5, the HV2 receives the supply of ACC power and performs control processes for the VM21 and VM22 (step S301).

[0049] Next, HV2 judges whether or not there is a termination request from HV1 (step S302). If there is a termination request from HV1 (step S302: Yes), HV2 transmits the termination request to VM21 and VM22 of the second processing device 22 (step S303). If there is no termination request from HV1 (step S302: No), HV2 returns to step S301.

[0050] Next, HV2 judges whether or not there is a termination process completion notification from VM21 and VM22 (step S304). If there is a termination process completion notification from VM21 and VM22 (step S304: Yes), HV2 transmits a completion notification to HV1 (step S305) and ends the process. Note that if there is no termination process completion notification from VM21 and VM22 (step S304: No), HV2 repeats step S304.

[0051] Next, the termination process executed by the VM will be described with reference to Fig. 6. As shown in Fig. 6, the VM receives a power signal (BAT power, ACC power, or IG power) and performs control process (step S401).

[0052] Next, the VM determines whether or not a termination request has been received from the HV (step S402). If a termination request has been received from the HV (step S402: Yes), the VM executes termination processing (step S403). If a termination request has not been received from the HV (step S402: No), the VM returns to step S401.

[0053] Next, after the termination process is completed, the VM transmits a completion notification to the HV (step S404), and ends the process.

[0054] Next, a second embodiment will be described with reference to Fig. 7. Fig. 7 is a diagram for explaining the configuration and operation of a vehicle control device 1 according to a second embodiment. The second embodiment differs from the above-described first embodiment in that a power supply signal is also input to HV2 and HV3.

[0055] Specifically, the ACC power supply and the IG power supply, which are power supply signals, are input to each of HV1 to HV3, and the BAT signal is input only to HV1.

[0056] <Startup process> The start-up process in the second embodiment will be described below. Note that the start-up of the first processing device 21 is similar to that in the first embodiment, and therefore the description thereof will be omitted.

[0057] When starting the second processing device 22, the controller 2 receives an input determination result indicating whether or not the ACC power is input from the started HV1. That is, the HV1 of the started first processing device 21 determines whether or not the input power signal is the ACC power that satisfies the start-up condition of the unstarted second processing device 22, and outputs the determination result to the controller 2. When the ACC power is input, the controller 2 instructs the HV1 to start the HV2. When the start-up instruction is received, the HV1 sets a register that supplies a clock signal to the HV2, and starts the second processing device 22 by supplying the ACC power. After starting the second processing device 22, the HV2 supplies the ACC power to the VM21 and VM22 to start the VM21 and VM22.

[0058] Next, when starting the third processor 23, the controller 2 receives the input judgment result of the IG power from the started HV1 and HV2. That is, the started HV1 of the first processor 21 and the started HV2 of the second processor 22 judge whether the input power signal is an IG power that satisfies the start-up condition of the unstarted third processor 23, and output the judgment result to the controller 2. When the judgment result of each of the HV1 and HV2 shows that the IG power is input to each of the HV1 and HV2, the controller 2 instructs the HV1 to start the HV3. When the start-up instruction is received, the HV1 sets a register that supplies a clock signal to the HV3 and supplies the IG power to start the third processor 23. After starting the third processor 23, the HV3 supplies the IG power to the VM31 and VM32 to start the VM31 and VM32. It should be noted that the controller 2 starts up the HV3 when IG power is input to both the HV1 and the HV2, but this is not limited thereto, and the controller 2 may be configured to start up the HV3 when IG power is input to either the HV1 or the HV2.

[0059] In this way, the controller 2 can input a power supply signal to each of the multiple processing devices that are started and perform a startup determination for the unstarted processing devices, so that even if any of the multiple processing devices that are started is abnormal, the controller 2 can perform a startup determination for the unstarted processing devices.

[0060] Furthermore, the controller 2 can stabilize the accuracy of the start-up determination by starting up a processing device only when it is determined that a power supply signal that satisfies the start-up condition has been input to all of a plurality of started processing devices.

[0061] <Termination process> The following describes the termination process in the second embodiment. Note that the termination of the first processing device 21 is the same as in the first embodiment, so the description will be omitted.

[0062] When the third processing device 23 is to be shut down, the controller 2 receives the IG power input determination result from each of HV1 to HV3. If the result of the input determination shows that IG power has not been input to any of HV1 to HV3, the controller 2 instructs HV1 to shut down HV3. Note that the controller 2 may instruct HV1 to shut down HV3 if IG power has not been input to a majority of HVs (i.e., two HVs) among HV1 to HV3. When the HV1 receives the termination instruction, it notifies HV3 of a termination request. When the HV3 receives the termination request from HV1, it notifies VM31 and VM32 implemented in the third processing device 23 of the termination request. When the VM31 and VM32 receive the termination request from HV3, they perform a termination process.

[0063] When the termination process is completed, VM31 and VM32 notify HV3 of a completion notification. When HV3 receives a completion notification from all virtual machines (VM31 and VM32) implemented in the third processing device 23, it notifies HV1 of the completion notification. When HV1 receives a completion notification from HV3, it sets a register to stop supplying a clock signal to HV3. This completes the termination process of HV3.

[0064] Next, when shutting down the second processing device 22, the controller 2 receives the input determination result of the ACC power from HV1 and HV2. If the input determination result shows that ACC power is not input to HV1 and HV2, the controller 2 instructs HV1 to shut down HV2. When the HV1 receives the termination instruction, it notifies HV2 of a termination request. When HV2 receives the termination request from HV1, it notifies VM21 and VM22 implemented in the second processing device 22 of the termination request. When VM21 and VM22 receive the termination request from HV2, they perform termination processing.

[0065] When the termination process is completed, VM21 and VM22 notify HV2 of a completion notification. When HV2 receives a completion notification from all virtual machines (VM21 and VM22) implemented in the second processing device 22, it notifies HV1 of the completion notification. When HV1 receives a completion notification from HV2, it sets a register to stop supplying a clock signal to HV2. This completes the termination process of HV2.

[0066] Next, processing executed by the controller 2 according to the second embodiment will be described with reference to Figs. 8 to 10. Fig. 8 is a flowchart showing an example of startup processing executed by the controller 2 according to the second embodiment. Fig. 9 is a flowchart showing an example of termination processing executed by the HV2 of the controller 2 according to the second embodiment. Fig. 10 is a flowchart showing an example of termination processing executed by the HV3 of the controller 2 according to the second embodiment.

[0067] First, the start-up process according to the second embodiment will be described with reference to Fig. 8. Fig. 8 takes the start-up process of the third processing device 23 as an example. As shown in Fig. 8, the controller 2 acquires the input determination result of the IG power source from each processing device (the first processing device 21 and the second processing device 22) (step S501).

[0068] Next, the controller 2 judges whether or not there is an IG power input to HV1 and HV2 based on the input judgment result (step S502). If there is an IG power input to HV1 and HV2 (step S502: Yes), the controller 2 starts up HV3 by supplying a clock from HV1 to HV3 (step S503). If there is no IG power input to HV1 and HV2 (step S502: No), the controller 2 returns to step S501.

[0069] Next, the HV3 inputs IG power to the VMs 31 and 32 to start up the VMs 31 and 32 (step S504), and ends the process.

[0070] Next, the termination process executed by the HV 2 will be described with reference to Fig. 9. As shown in Fig. 9, the controller 2 acquires the input determination result of the ACC power supply from each processing device (the first processing device 21 and the second processing device 22) (step S601).

[0071] Next, the controller 2 judges whether the ACC power has been turned off in the HV1 and HV2 based on the input judgment result (step S602). If the ACC power has been turned off in the HV1 and HV2 (step S602: Yes), the controller 2 transmits a termination request from the HV1 to the HV2 (step S603). If the ACC power has not been turned off in the HV1 and HV2 (step S602: No), the controller 2 returns to step S601.

[0072] Next, the HV1 judges whether or not a completion notice of the termination process has been received from the HV2 (step S604).

[0073] If the HV1 receives a completion notification of the termination process from the HV2 (step S604: Yes), the HV1 stops the clock supply to the HV2 (step S605) and ends the process. If the HV1 does not receive a completion notification of the termination process from the HV2 (step S604: No), the HV1 repeats step S604 until the completion notification is received.

[0074] Next, the termination process executed by the HV 3 will be described with reference to Fig. 10. As shown in Fig. 10, the controller 2 acquires the input determination result of the IG power source from each processing device (the first processing device 21 to the third processing device 23) (step S701).

[0075] Next, the controller 2 judges whether the IG power supply has been turned off in HV1 to HV3 based on the input judgment result (step S702). If the IG power supply has been turned off in HV1 to HV3 (step S702: Yes), the controller 2 transmits a termination request from HV1 to HV3 (step S703). If the IG power supply has not been turned off in HV1 to HV3 (step S702: No), the controller 2 returns to step S701.

[0076] Next, the HV1 judges whether or not a completion notice of the termination process has been received from the HV3 (step S704).

[0077] If the HV1 receives a completion notification of the termination process from the HV3 (step S704: Yes), the HV1 stops the clock supply to the HV3 (step S705) and ends the process. If the HV1 does not receive a completion notification of the termination process from the HV3 (step S704: No), the HV1 repeats step S704 until the completion notification is received.

[0078] As described above, the vehicle control device 1 according to the embodiment is a vehicle control device 1 that controls a vehicle having a first power supply mode and a second power supply mode, and includes a first processing device that starts up when the vehicle enters the first power supply mode, and a second processing device that starts up when the vehicle enters the second power supply mode. A first virtual machine that starts up in the first power supply mode is implemented in the first processing device, and a second virtual machine that starts up in the second power supply mode is implemented in the second processing device.

[0079] This allows the vehicle control device 1 to start only the processing device in which a virtual machine that satisfies the start-up condition is implemented, and not to start the processing device in which a virtual machine that does not satisfy the start-up condition is implemented. As a result, only the virtual machines that need to be started are started, and virtual machines that do not need to be started are not started, so that it is possible to avoid unnecessary power consumption caused by starting unnecessary virtual machines. In other words, it is possible to reduce power consumption.

[0080] Further advantages and modifications may readily occur to those skilled in the art. Thus, the invention in its broader aspects is not limited to the specific details and representative embodiments shown and described above. Accordingly, various modifications may be made without departing from the spirit or scope of the general inventive concept as defined by the appended claims and equivalents thereof. [Explanation of symbols]

[0081] 1 Vehicle control device 2. Controller 21 First processing device 22 Second processing device 23 Third processing device

Claims

1. A vehicle control device that controls a vehicle having a first power supply mode and a second power supply mode, a first processing device that is activated when the first power supply mode is entered; a second processing device that is activated when the second power supply mode is entered; A first virtual machine that runs in a first power mode is implemented in the first processing device; A second virtual machine that runs in a second power mode is implemented in the second processing device. Vehicle control device.

2. The first virtual machine and the second virtual machine are each implemented in a plurality of instances. The vehicle control device according to claim 1.

3. inputting a power supply signal corresponding to each of the first power supply mode and the second power supply mode to start up the corresponding processing device; The vehicle control device according to claim 1 or 2.

4. inputting the power supply signal corresponding to the second power supply mode into the first processing device which has been started up in advance; The first processing device includes: Inputting the power supply signal to the second processing device The vehicle control device according to claim 3.

5. The first and second processing devices include: A hypervisor that controls the startup of the first and second virtual machines is implemented in each of the first and second virtual machines; transmitting the power signal from the hypervisor implemented in the first processing device to the hypervisor implemented in the second processing device; The hypervisor implemented in the second processing device, The power supply signal is input to the second virtual machine to start up the second virtual machine. The vehicle control device according to claim 4.

6. inputting the power supply signal to each of the first and second processing devices; The first and second processing devices include: It is determined whether the input power supply signal is a power supply signal corresponding to the first or second power supply mode, and based on the determination result, it is determined whether or not to start up the processing device that has not yet been started up. The vehicle control device according to claim 3.

7. a third processing device that is activated when the third power supply mode is entered; a third virtual machine that runs in a third power mode is implemented in the third processing device; When it is determined that the input power supply signal corresponds to the third power supply mode in all of the first and second processing devices that are activated, the third processing device is activated. The vehicle control device according to claim 6.

8. The first and second power modes include: the first power supply mode and the second power supply mode are either an IG power supply state in which power is supplied to an IG system device, an ACC power supply state in which power is supplied to an ACC system device, or a battery power supply state in which power is supplied to a battery system device, and the first power supply mode and the second power supply mode are different power supply states; The vehicle control device according to claim 1.

9. A vehicle control method executed by a vehicle control device that controls a vehicle having a first power supply mode and a second power supply mode, comprising: booting up the first processing device when in the first power supply mode; booting up the second processing device when in the second power supply mode; A first virtual machine that runs in a first power mode is implemented in the first processing device; A second virtual machine that runs in a second power mode is implemented in the second processing device. A vehicle control method.

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