Semiconductor device

Abstract

To provide a semiconductor device with less variation in characteristic.SOLUTION: An oxide is formed, a first insulator is formed on the oxide, a second insulator is formed on the first insulator, a third insulator is formed on the second insulator, a conductor is formed on the third insulator, and a heating process is performed. The heating process is performed in an atmosphere containing nitrogen. By the heating process, hydrogen included in the first insulator moves to the second insulator and is absorbed therein.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One aspect of the present invention relates to a method for producing a metal oxide. Another embodiment of the present invention relates to a semiconductor device, a transistor, and an electronic device. Another embodiment of the present invention relates to a semiconductor wafer and a method for manufacturing a module. Regarding.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, storage device, semiconductor circuit, imaging device, electronic device etc. may be said to have a semiconductor device.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. One aspect of the present invention relates to an object, a method, or a manufacturing method. , process, machine, manufacture, or composition of matter (-) [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, memories, etc. are mainly semiconductor devices. The CPU is a semiconductor integrated circuit (IC) made by processing a semiconductor wafer and making it into a chip. A semiconductor element having at least a transistor and a memory, and having electrodes formed thereon as connection terminals. It is a collection of.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, e.g. They are mounted on wiring boards and used as components in a variety of electronic devices.

[0006] In addition, a transistor is formed using a semiconductor thin film formed on a substrate having an insulating surface. This technology is attracting attention. The transistor is used in integrated circuits (ICs), image display devices (simply display It is widely used in electronic devices such as transistors. Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used for this purpose, but other materials include Oxide semiconductors are attracting attention.

[0007] In addition, a transistor including an oxide semiconductor has a very low leakage current in a non-conducting state. For example, Patent Document 1 describes a transistor using an oxide semiconductor. Low-power CPUs that utilize the low leakage current characteristics of semiconductor memory have been disclosed. For example, Patent Document 2 discloses a transistor using an oxide semiconductor that has a low leakage current. By utilizing this characteristic, memory devices that can retain memory contents for long periods of time are being developed. It has been disclosed.

[0008] In recent years, with the trend towards smaller and lighter electronic devices, there is a demand for even higher density integrated circuits. There is also a demand for improved productivity in the manufacture of semiconductor devices including integrated circuits. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2012-257187 A [Patent Document 2] JP 2011-151383 A Summary of the Invention [Problem to be solved by the invention]

[0010] One embodiment of the present invention provides a semiconductor device in which variation in electrical characteristics of transistors is reduced. Another object of one embodiment of the present invention is to provide a semiconductor device with high reliability. Another object of one embodiment of the present invention is to provide a semiconductor having favorable electrical characteristics. Another object of the present invention is to provide a semiconductor device having a large on-state current. Another object of the present invention is to provide a semiconductor device. Another object of the present invention is to provide a semiconductor device that can be highly integrated. An object of one embodiment is to provide a semiconductor device with low power consumption.

[0011] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0012] In one embodiment of the present invention, an oxide is formed, a first insulator is formed on the oxide, and the first insulator is formed. A second insulator is deposited on the substrate, a third insulator is deposited on the second insulator, and a second insulating layer is deposited on the third insulating layer. A conductor is formed on the substrate and a heat treatment is performed in an atmosphere containing nitrogen. By carrying out the above, hydrogen contained in the first insulator is transferred to and absorbed in the second insulator. A method for manufacturing a semiconductor device.

[0013] In the above, the heat treatment is performed at a temperature in the range of 300° C. to 550° C. The treatment time is preferably in the range of 0.5 to 2 hours.

[0014] In the above, the first insulator is a gallium oxide containing silicon, oxygen and nitrogen by a CVD method. The first insulator is deposited using a hafnium-containing gold nanowire. The second insulator is deposited using an ALD method. It is preferable that the metal oxide is a metal oxide.

[0015] In the above, the oxide is formed into a film by a sputtering method, and indium, gallium and zinc. Effect of the Invention

[0016] According to one embodiment of the present invention, a semiconductor device having less variation in electrical characteristics of transistors is provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to one embodiment of the present invention, a semiconductor device having a large on-state current can be provided. Alternatively, according to one embodiment of the present invention, a semiconductor device capable of miniaturization or high integration can be provided. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided. A body device can be provided.

[0017] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these are described in the specification. The above will become apparent from the description, drawings, claims, etc. From the above description, it is possible to extract other effects. [Brief description of the drawings]

[0018] [Figure 1] 1A to 1C are cross-sectional views illustrating a method for manufacturing a capacitor according to one embodiment of the present invention. [Diagram 2] 2A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 2B to 2D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Diagram 3] 3A and 3B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 4] Figure 4(A) is a diagram explaining the classification of IGZO crystal structures. Figure 4(B) is a diagram explaining the XRD spectrum of a CAAC-IGZO film. Figure 4(C) is a diagram explaining the ultrafine electron beam diffraction pattern of a CAAC-IGZO film. [Diagram 5] 5A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 5B to 5D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 6] 6A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 6B to 6D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 7] 7A is a top view of a semiconductor device according to one embodiment of the present invention, and FIGS. 7B to 7D are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Figure 8] 8A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 8B to 8D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 9A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 9B to 9D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10]10A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 10B to 10D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 11A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 11B to 11D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12] 12A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 12B to 12D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 13] 13A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 13B to 13D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 14] 14A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 14B to 14D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 15] 15A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 15B to 15D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 16] 16A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 16B to 16D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 17] 17A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 17B to 17D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 18] 18A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 18B to 18D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 19]19A is a top view illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention, and FIGS. 19B to 19D are cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 20] FIG. 1 is a top view illustrating a microwave processing device according to one embodiment of the present invention. [Figure 21] FIG. 1 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 22] FIG. 1 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Diagram 23] FIG. 1 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 24] Fig. 24A is a plan view of a semiconductor device according to one embodiment of the present invention, Fig. 24B and Fig. 24C are cross-sectional views of the semiconductor device according to one embodiment of the present invention. [Diagram 25] FIG. 25 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 26] FIG. 26 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 27] FIG. 27 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 28] 28(A) and 28(B) are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 29] FIG. 29 is a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Diagram 30] 30A is a block diagram illustrating a configuration example of a storage device according to one embodiment of the present invention, and FIG 30B is a perspective view illustrating a configuration example of a storage device according to one embodiment of the present invention. [Diagram 31] 31A to 31H are circuit diagrams illustrating configuration examples of a memory device according to one embodiment of the present invention. [Diagram 32] 32A and 32B are schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Diagram 33] 33(A) and 33(B) are diagrams illustrating an example of an electronic component. [Diagram 34] 34(A) to 34(E) are schematic diagrams of a memory device according to one embodiment of the present invention. [Diagram 35] 35A to 35H are diagrams illustrating electronic devices according to one embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0019] Hereinafter, the embodiments will be described with reference to the drawings. It is understood that the present invention can be practiced in many different ways without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiment modes.

[0020] Also, in the drawings, the size, layer thickness, or area are exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in schematic form, and are not limited to the shapes or values ​​shown in the drawings. For example, In the actual manufacturing process, layers, resist masks, etc. are damaged by etching or other processes. However, in order to make it easier to understand, this is not reflected in the diagram. In the drawings, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. In addition, when referring to similar functions, In such cases, the hatch patterns may be the same and no particular reference numbers may be used.

[0021] In addition, the invention is easily understood, particularly in top views (also called "plan views") and perspective views. In order to simplify the description, some of the components may be omitted. The above information may be omitted.

[0022] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second "the" or "third" can be used as appropriate. The ordinal numbers described herein may not coincide with the ordinal numbers used to identify an aspect of the present invention. There are cases where this is the case.

[0023] In addition, in this specification, the terms "above" and "below" that indicate an arrangement are used to refer to the relationship between components. The positional relationship is used for convenience in describing the drawings. The relationship changes accordingly depending on the direction in which each configuration is depicted. The terms are not limited to those described above, and may be rephrased appropriately depending on the situation.

[0024] For example, in the present specification, it is explicitly stated that X and Y are connected. The cases are when X and Y are electrically connected and when X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification, etc. Therefore, the connection relationship is limited to a specific one, for example, the connection relationship shown in the figure or text. Connections other than those shown in the drawings or text are also disclosed in the drawings or text. Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, etc.). , conductive film, layer, etc.).

[0025] In this specification, a transistor includes a gate, a drain, and a source. The drain terminal is a diode that has at least three terminals. Between the drain region or drain electrode and the source (source terminal, source region or source electrode) The channel forming region is formed in the channel. A current can be passed between the source and drain via the channel forming region. In this specification and the like, the channel formation region refers to a region through which current mainly flows.

[0026] Also, when using transistors with different polarity for source or drain functions, Or, when the direction of the current changes during circuit operation, the two may be interchanged. Therefore, in this specification and the like, the terms source and drain are used interchangeably. It may be possible.

[0027] Note that the channel length is, for example, the length of a semiconductor (or transistor) in a top view of a transistor. When the transistor is on, the gate electrode overlaps with the semiconductor (the part through which current flows). A source (source region or source electrode) in a region where the source is formed or a channel forming region This refers to the distance between the drain (drain region or drain electrode) and the transistor. In a transistor, the channel length does not necessarily have the same value in all regions. The channel length of the transistor may not be determined to a single value. In the above, the channel length is defined as any one value, maximum value, minimum value or is the average value.

[0028] The channel width is, for example, the width of the semiconductor (or transistor) in a top view of the transistor. The area where the gate electrode overlaps with the semiconductor (the part where current flows in the semiconductor when the transistor is on). In the channel forming region, the channel is formed in a direction perpendicular to the channel length direction. The length of the formation region. Note that in one transistor, the channel width is the entire region. In other words, the channel width of a transistor does not always take the same value. Therefore, in this specification, the channel width is determined based on the channel forming region. The value may be any one of the values, the maximum value, the minimum value or the average value.

[0029] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the transistor is The channel width shown in a top view of the star (hereinafter also referred to as the "apparent channel width") For example, if the gate electrode covers the side of the semiconductor, the effective When the channel width becomes larger than the apparent channel width and its effect cannot be ignored For example, in a transistor that is very small and has a gate electrode that covers the side of the semiconductor, The proportion of the channel formation region formed on the side may become large. In that case, the apparent The effective channel width is larger than the above channel width.

[0030] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, Channel width is difficult to measure accurately.

[0031] In this specification, when the term "channel width" is used, it refers to the apparent channel width. In this specification, when the term "channel width" is used, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, etc. The channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.

[0032] The impurities in a semiconductor are, for example, substances other than the main components that make up the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. For example, This can cause problems such as an increase in the density of defect levels in the semiconductor and a decrease in crystallinity. When the body is an oxide semiconductor, the impurities that change the properties of the semiconductor include, for example, the first Group elements, Group 2 elements, Group 13 elements, Group 14 elements, Group 15 elements, main components of oxide semiconductors transition metals other than uranium, such as hydrogen, lithium, sodium, silicon, and boron , phosphorus, carbon, nitrogen, etc. Water can also act as an impurity. For example, impurities can cause oxygen vacancies (V O :oxygen vacan In some cases, a cy (also called

[0033] In this specification and the like, silicon oxynitride refers to a material having a composition containing more oxygen than nitrogen. Silicon nitride oxide is a material that contains more oxygen than silicon. It has a high nitrogen content.

[0034] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." In addition, the term "conductor" can be replaced with "conductive film" or "conductive layer." In addition, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0035] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10 degrees or more and 10 degrees or less. Therefore, it includes the case where the angle is between -5 degrees and 5 degrees. In addition, "approximately parallel" refers to a state in which two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. "Perpendicular" refers to a state where two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it includes the case where the angle is between 85 degrees and 95 degrees. "Perpendicular" refers to two straight lines that form an angle between 60 degrees and 120 degrees.

[0036] In this specification, the term "metal oxide" refers to metals in a broad sense. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used for the semiconductor layer of a transistor, Such a metal oxide may be called an oxide semiconductor. In this case, the transistor may be referred to as a transistor having a metal oxide or an oxide semiconductor. can be done.

[0037] In this specification and the like, normally off means that no potential is applied to the gate, or When a ground potential is applied to the gate, the drain current per 1 μm of channel width flows through the transistor. The input current is 1×10 -20 A or less, 1×10 at 85℃ -18 Below A , or 1×10 at 125°C -16 This means that it is A or lower.

[0038] (Embodiment 1) In this embodiment, a transistor according to one embodiment of the present invention will be described with reference to FIGS. An example of a semiconductor device having a transistor 200 and a manufacturing method thereof will be described.

[0039] <Example of semiconductor device configuration> The structure of a semiconductor device including a transistor 200 will be described with reference to FIG. 2A to 2D are top views and cross-sectional views of a semiconductor device including a transistor 200. FIG. 2A is a top view of the semiconductor device. 2B is a cross-sectional view of the semiconductor device taken along line A1-A2 of FIG. 1 is a cross-sectional view of a portion indicated by a dashed line, and is also a cross-sectional view of a transistor 200 in the channel length direction. FIG. 2(C) is a cross-sectional view of the portion indicated by the dashed line A3-A4 in FIG. 2(A), FIG. 2(D) is a cross-sectional view of the transistor 200 in the channel width direction. 2(A) is a cross-sectional view of the portion indicated by the dashed line A5-A6 in FIG. Some elements have been omitted for clarity of the illustration.

[0040] The semiconductor device according to one embodiment of the present invention includes an insulator 212 on a substrate (not shown), an insulator 214 on the top, a transistor 200 on the insulator 214, and a an insulator 280, an insulator 282 on the insulator 280, and an insulator 283 on the insulator 282; Insulator 274 on insulator 283 and insulator 28 on insulator 283 and on insulator 274 5. The insulator 212, the insulator 214, the insulator 216, the insulator 280, the insulator 2 82, the insulator 283, the insulator 285, and the insulator 274 function as interlayer films. A conductor 240 (conductor 240) electrically connected to the transistor 200 and functioning as a plug The conductor 240 functions as a plug. An insulator 241 (insulator 241a and insulator 241b) is provided in contact with the side surface. In addition, on the insulator 285 and the conductor 240, wiring is provided to electrically connect to the conductor 240. A conductor 246 (conductor 246a and conductor 246b) is provided that functions as a conductor. The insulator 283 is a part of the upper surface of the insulator 214, a side surface of the insulator 216, and the insulator 222. , a side of the insulator 275, a side of the insulator 280, and a side of the insulator 282, contact with the top surface.

[0041] In contact with the inner walls of the openings of the insulators 280, 282, 283, and 285 An insulator 241a is provided on the side of the insulator 241a, and a conductor 240a is provided in contact with the side of the insulator 241a. In addition, the openings of the insulators 280, 282, 283, and 285 An insulator 241b is provided in contact with the inner wall of the conductor 240. b is provided. In addition, the insulator 241 is a first insulator provided in contact with the inner wall of the opening. The conductor 240 is provided with a second insulator on the inner side. In the example shown in FIG. 1, a first conductor is provided in contact with the side surface of the insulator 241, and a second conductor is provided on the inner side. Here, the height of the upper surface of the conductor 240 and the overlap with the conductor 246 are The height of the upper surface of the insulator 285 in the region can be made to be approximately the same.

[0042] In the transistor 200, the first insulator of the insulator 241 and the second insulator of the insulator 241 Although the configuration in which two conductors are stacked is shown, the present invention is not limited to this. For example, the insulator 241 may be provided as a single layer or a laminated structure of three or more layers. In addition, in the transistor 200, the first conductor of the conductor 240 and the second conductor of the conductor 240 Although the second conductor is laminated, the present invention is not limited to this. For example, the conductor 240 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, the layers may be distinguished by giving ordinal numbers in the order of formation.

[0043] [Transistor 200] As shown in FIGS. 2A to 2D, the transistor 200 includes an insulator 214. The edge 216 and the insulator 214 and / or the insulator 216 are disposed so as to be embedded therein. The conductor 205 (conductor 205a and conductor 205b) and the insulator 216 are disposed on the insulator 216. An insulator 222 on the conductor 205, an insulator 224 on the insulator 222, and an insulator 224 on the insulator 224. The oxide 230a, the oxide 230b on the oxide 230a, and the conductor 2 on the oxide 230b. 42a, an insulator 271a on the conductor 242a, and a conductor 242b on the oxide 230b. , an insulator 271b on the conductor 242b, an insulator 252 on the oxide 230b, and an insulator 2 52, an insulator 250 on the insulator 250, and an insulator 254 on the insulator 254. Conductor 260 (conductor 260a and conductor 260b) overlapping a portion of oxide 230b and an insulator 222, an insulator 224, an oxide 230a, an oxide 230b, a conductor 242a, The conductor 242b, the insulator 271a, and the insulator 275 disposed on the insulator 271b. Here, as shown in FIG. 2B and FIG. 2C, the insulator 252 has an insulating The top surface of the body 222, the side surface of the insulator 224, the side surface of the oxide 230a, the side surface of the oxide 230b, and and the top surface, the side surface of the conductor 242, the side surface of the insulator 271, the side surface of the insulator 275, the insulator 28 The upper surface of the conductor 260 is in contact with the side surface of the conductor 260 and the lower surface of the insulator 250. 54, the top of insulator 250, the top of insulator 252, and the top of insulator 280. The insulator 282 is disposed so that the surface and the height are approximately the same. At least one of the upper surfaces of each of the body 252, the insulator 250, the insulator 254, and the insulator 280 is It also comes into contact with some.

[0044] In the following description, the oxide 230a and the oxide 230b are collectively referred to as the oxide 230. In addition, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. In addition, the insulator 271a and the insulator 271b may be collectively referred to as the insulator 271. do.

[0045] Insulator 280 and insulator 275 are provided with openings that reach down to oxide 230b. Insulator 252, insulator 250, insulator 254, and conductor 260 are disposed within the opening. In addition, in the channel length direction of the transistor 200, the insulators 271a and A conductor 260 is provided between the insulator 271b and the conductor 242a and between the insulator 271b and the conductor 242b. , insulator 252, insulator 250, and insulator 254 are provided. Insulator 254 is , has a region in contact with the side surface of the conductor 260 and a region in contact with the bottom surface of the conductor 260.

[0046] The oxide 230 is made up of an oxide 230a disposed on the insulator 224 and an oxide 230b. and an oxide layer 230b disposed on the oxide layer 230b. By having the oxide 230a, the oxide 230a can be removed from the structure formed below the oxide 230a. This can suppress the diffusion of impurities into 30b.

[0047] In the transistor 200, the oxide 230 is divided into an oxide 230a and an oxide 23 0b are stacked, the present invention is not limited to this. For example, a single layer of oxide 230b or a laminated structure of three or more layers may be provided. Alternatively, each of the oxide 230a and the oxide 230b may have a layered structure.

[0048] The conductor 260 functions as a first gate (also called a top gate) electrode. 205 functions as a second gate (also called a back gate) electrode. 252, insulator 250 and insulator 254 function as a first gate insulator. 222 and insulator 224 function as a second gate insulator. The conductor 242a may be called a gate insulating layer or a gate insulating film. The conductor 242b functions as either the source or the drain. Also, at least a part of the region of the oxide 230 that overlaps with the conductor 260 functions as the other. The portion functions as a channel forming region.

[0049] Here, an enlarged view of the vicinity of the channel formation region in FIG. 2(B) is shown in FIG. 3(A). By supplying oxygen to the object 230b, the area between the conductor 242a and the conductor 242b is filled with oxygen. Therefore, as shown in FIG. 3(A), the oxide 230b is a channel forming region. A region 230bc which functions as a channel forming region of the transistor 200, and a region 230bc and regions 230ba and 230c functioning as a source region or a drain region. and a region 230bb. The region 230bc is at least partially connected to the conductor 260. In other words, the region 230bc is between the conductor 242a and the conductor 242b. The region 230ba is provided so as to overlap the conductor 242a. The region 230bb overlaps the conductor 242b.

[0050] The region 230bc functioning as a channel forming region is a region 230b and a region 230c. Compared to bb, it has fewer oxygen vacancies and a lower impurity concentration, resulting in a high resistance with a low carrier concentration. Thus, region 230bc is said to be type i (true) or substantially type i. It is possible.

[0051] In addition, the region 230ba and the region 230 bb has many oxygen vacancies or high concentrations of impurities such as hydrogen, nitrogen, and metal elements. The region 230ba and the region 230b are regions in which the carrier concentration is increased and the resistance is reduced. 230bb is a low-resistance n-type region with a higher carrier concentration than 230bc. be.

[0052] Here, the carrier concentration of the region 230bc functioning as a channel forming region is 1×10 18 cm -3 It is preferable that the value is less than 1×10 17 cm -3 Less than is preferable. 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 More preferably, it is less than 1×10 12 cm -3 It is even more preferable that it is less than Regarding the lower limit of the carrier concentration of the region 230bc functioning as a channel forming region, There is no particular limitation on the number of -9 cm -3 It can be said that:

[0053] In addition, between the region 230bc and the region 230ba or between the region 230bb, a carrier concentration is equal to or lower than the carrier concentration of the region 230ba and the region 230bb. A region having a carrier concentration equal to or higher than that of the region 230bc is formed. That is, the area may be the area 230bc and the area 230ba or the area 230bb. The hydrogen concentration in the region 230ba and the region 230c functions as a junction region. The hydrogen concentration is equal to or lower than that of 30bb and equal to that of region 230bc. In addition, the junction region may have oxygen vacancies in the region 230 The oxygen deficiency in ba and area 230bb is equal to or less than that in area 230bc The oxygen deficiency may be equal to or greater than that of the

[0054] In FIG. 3A, the regions 230ba, 230bb, and 230bc are oxides. However, the present invention is not limited to this example. For example, each of the above regions may be formed with not only oxide 230b but also oxide 230a. Good too.

[0055] In addition, it may be difficult to clearly detect the boundaries between the regions of the oxide 230. The concentrations of metal elements, hydrogen, nitrogen, and other impurity elements detected in each region are The change is not limited to a stepwise change for each region, but may be continuous within each region. The closer to the channel formation region, the more the metal elements, hydrogen, nitrogen, etc. It is sufficient that the concentration of the impurity element is reduced.

[0056] The transistor 200 includes an oxide 230 (oxide 230a, and oxide 230b) are provided with a metal oxide functioning as a semiconductor (hereinafter, also referred to as an oxide semiconductor). It is preferable to use .

[0057] In addition, the metal oxide that functions as a semiconductor has a band gap of 2 eV or more, preferably It is preferable to use gold with a band gap of 2.5 eV or more. By using a metal oxide, the off-state current of a transistor can be reduced.

[0058] The oxide 230 may be, for example, In-M-Zn having indium, element M, and zinc. Oxides (element M is aluminum, gallium, yttrium, tin, copper, vanadium, beryllium, etc.) Sodium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lambda tantalum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium It is preferable to use a metal oxide such as one or more selected from the group consisting of fluorine, ... As 230, In-Ga oxide, In-Zn oxide, or indium oxide may be used. .

[0059] Here, the atomic ratio of In to element M in the metal oxide used for the oxide 230b is is greater than the atomic ratio of In to element M in the metal oxide used for the oxide 230a. It is preferable that the thickness is large.

[0060] In this way, by disposing the oxide 230a under the oxide 230b, the oxide 230a Diffusion of impurities and oxygen into oxide 230b from structures formed below This can suppress dispersion.

[0061] In addition, the oxide 230a and the oxide 230b have a common element other than oxygen (main component By using the oxide 230a and the oxide 230b as the oxide 230a, the defect state density at the interface between the oxide 230a and the oxide 230b is reduced. The defect state density at the interface between the oxide 230a and the oxide 230b can be reduced. Therefore, the effect of interface scattering on carrier conduction is small, resulting in a high on-current. is obtained.

[0062] The oxide 230b is preferably crystalline. AAC-OS(c-axis aligned crystalline oxide It is preferable to use a semiconductor.

[0063] CAAC-OS has a highly crystalline and dense structure and is free of impurities and defects (e.g. For example, oxygen deficiency (V O In particular, after the formation of the metal oxide, the Heat treatment at a temperature where metal oxides do not become polycrystallized (for example, 400°C to 600°C) By doing so, it is possible to give the CAAC-OS a more highly crystalline and dense structure. In this way, by increasing the density of the CAAC-OS, the impurities in the CAAC-OS can be reduced. Alternatively, the diffusion of oxygen can be further reduced.

[0064] On the other hand, it is difficult to confirm clear grain boundaries in CAAC-OS. Therefore, the decrease in electron mobility due to the CAAC-OS is unlikely to occur. Metal oxides have stable physical properties. Therefore, metal oxides with CAAC-OS have Heat resistant and highly reliable.

[0065] In a transistor using an oxide semiconductor, a region in which a channel is formed in the oxide semiconductor The presence of impurities and oxygen vacancies can cause electrical characteristics to fluctuate and reduce reliability. In addition, hydrogen atoms near the oxygen vacancies are replaced by hydrogen atoms in the oxygen vacancies (hereafter referred to as V O Call it H. ) and generate electrons that act as carriers. If there are oxygen vacancies in the region where the channel is formed in the semiconductor, the transistor will not function properly. Mari-on characteristic (a channel exists even when no voltage is applied to the gate electrode, forming a transistor Therefore, a channel is formed in the oxide semiconductor. In the region, impurities, oxygen vacancies, and V O It is preferable that H is reduced as much as possible. In other words, the carrier concentration in the region in which the channel is formed in the oxide semiconductor is reduced. Preferably, the material is i-type (intrinsic) or substantially i-type.

[0066] In contrast, oxygen that is released by heating (hereafter referred to as excess oxygen) is present near the oxide semiconductor. By providing an insulator containing the oxide semiconductor, and then performing heat treatment, the insulator is converted into an oxide semiconductor. It supplies oxygen to the body and prevents oxygen deficiency and V O However, the source area H can be reduced. If an excessive amount of oxygen is supplied to the drain or gate region, the on-current of the transistor 200 will This may cause a decrease in the field effect mobility or a decrease in the source region. The amount of oxygen supplied to the drain region varies across the substrate surface, resulting in a transistor having a This will result in variations in the characteristics of the semiconductor device.

[0067] Therefore, in the oxide semiconductor, the region 230bc functioning as a channel formation region is The carrier concentration is reduced and is preferably i-type or substantially i-type, but the source region The regions 230ba and 230bb functioning as a drain region or a carrier It is preferable that the concentration is high and that the oxide semiconductor region 230bc is an n-type. Deficiency, and V O H, and an excessive amount of oxygen is present in the regions 230ba and 230bb. is preferably not provided.

[0068] Therefore, in this embodiment, the conductor 242a and the conductor 242b are formed on the oxide 230b. With the above structure, microwave treatment is performed in an atmosphere containing oxygen, and oxygen vacancies in the region 230bc are , and V O Here, microwave processing is, for example, This refers to a process that uses equipment with a power source that generates high-density plasma.

[0069] By performing microwave processing in an oxygen-containing atmosphere, microwaves or high-frequency waves such as RF The oxygen gas can be turned into plasma using the oxygen plasma. Alternatively, microwaves or high frequencies such as RF can be irradiated onto the area 230bc. Due to the effects of Zuma, microwaves, etc., the V OH is split off and hydrogen H is placed in region 2 Removed from 30bc, oxygen-deficient V O can be supplemented with oxygen. In bc, "V O H→H+V O " occurs, and the hydrogen concentration in region 230bc Therefore, the oxygen vacancies in the region 230bc and the V O Reduce H, The carrier concentration can be reduced.

[0070] In addition, when microwave processing is performed in an atmosphere containing oxygen, high frequency waves such as microwaves or RF The action of the waves, oxygen plasma, etc. is shielded by the conductors 242a and 242b, and the area 230ba and 230bb. Furthermore, the action of the oxygen plasma is 230b, and an insulator 271 and an insulator 230b are provided covering the conductor 242. 80, the area 230 can be reduced during microwave processing. ba and area 230bb, V O H reduction and no excessive oxygen supply occurs This makes it possible to prevent a decrease in the carrier concentration.

[0071] After the insulating film that will become the insulator 252 or the insulating film that will become the insulator 250 is formed, It is preferable to perform microwave treatment in an atmosphere containing oxygen. 2, or by performing microwave treatment in an atmosphere containing oxygen through an insulator 250, In addition, the insulator 252 can be efficiently injected into the region 230bc. 42 and the surface of the region 230bc. Therefore, the injection of more oxygen than necessary into the conductive material 242 can be suppressed, and the oxidation of the side surface of the conductive material 242 can be suppressed. In addition, oxidation of the side surface of the conductor 242 is suppressed during the formation of the insulating film that becomes the insulator 250. This can be done.

[0072] The oxygen injected into the region 230bc may be an oxygen atom, an oxygen molecule, or an oxygen radical (O Radicals are atoms or molecules with unpaired electrons, or ions. The oxygen injected into the region 230bc may be one or more of the above-mentioned forms. In particular, oxygen radicals are preferable. Since the film quality of the body 250 can be improved, the reliability of the transistor 200 is improved. .

[0073] In this manner, oxygen vacancies and V are selectively formed in the oxide semiconductor region 230bc. O H It is possible to remove the pores so that the region 230bc is i-type or substantially i-type. The regions 230ba and 230bb functioning as source and drain regions are provided with excess This suppresses the supply of oxygen and maintains the n-type. The variation in the electrical characteristics of the transistor 200 is suppressed within the substrate surface. It is possible to suppress the above.

[0074] By adopting the above-mentioned configuration, a semiconductor device with less variation in transistor characteristics is provided. It is also possible to provide a semiconductor device with good reliability. A semiconductor device having good electrical characteristics can be provided.

[0075] As shown in FIG. 2C, in a cross-sectional view of the transistor 200 in the channel width direction, In addition, the oxide 230b may have a curved surface between the side surface and the top surface of the oxide 230b. That is, the end of the side surface and the end of the top surface may be curved (hereinafter, also referred to as rounded). .).

[0076] The radius of curvature of the curved surface is greater than 0 nm, and the oxide 2 in the region overlapping with the conductor 242 is 30b or less than half the length of the region not having the curved surface. Specifically, the radius of curvature of the curved surface is greater than 0 nm and less than or equal to 20 nm. , preferably 1 nm or more and 15 nm or less, and more preferably 2 nm or more and 10 nm or less. By forming the insulator 252, the insulator 250, the insulator 254, and the conductor 252, 250, and the conductor 254 are formed in the shape described above. This can improve the coverage of the conductor 260 with the oxide 230b.

[0077] The oxide 230 preferably has a layered structure of multiple oxide layers with different chemical compositions. Specifically, in the metal oxide used for the oxide 230a, the metal element that is the main component The atomic ratio of the element M to be used in the oxide 230b is 1 / 1000th of that of the main component, gold, in the metal oxide used in the oxide 230b. It is preferable that the atomic ratio of element M to the group element is larger than that of element M. In the metal oxide used, the atomic ratio of element M to In is It is preferable that the atomic ratio of element M to In in the metal oxide is larger than that of element In. In the metal oxide used for the oxide 230b, the atomic ratio of In to the element M is In the metal oxide used in 230a, the atomic ratio of In to element M is greater than that preferable.

[0078] In addition, the oxide 230b is preferably an oxide having crystallinity, such as CAAC-OS. Crystalline oxides such as CAAC-OS are free of impurities and defects (oxygen vacancies, etc.). Therefore, the source electrode or drain electrode is not easily damaged and has a dense structure with high crystallinity. This can suppress the extraction of oxygen from the oxide 230b by the in-electrode. Therefore, even if a heat treatment is performed, the removal of oxygen from the oxide 230b can be reduced. The transistor 200 is designed to withstand high temperatures (so-called thermal budget) during the manufacturing process. It is stable.

[0079] Here, at the junction between the oxide 230a and the oxide 230b, the conduction band minimum is gradually In other words, the conduction band edge at the junction between the oxide 230a and the oxide 230b changes as follows: In other words, the acid is continuously changed or continuously joined. The defect level density of the mixed layer formed at the interface between the oxide 230a and the oxide 230b is reduced. good.

[0080] Specifically, the oxide 230a and the oxide 230b have a common element other than oxygen as a main component. By using the oxide 2, it is possible to form a mixed layer having a low defect level density. When 30b is an In-M-Zn oxide, the oxide 230a is an In-M-Zn oxide, M-Zn oxide, oxide of element M, In-Zn oxide, indium oxide, etc. can be used. good.

[0081] Specifically, the oxide 230a is In:M:Zn=1:3:4 [atomic ratio] or or a composition close to that, or In:M:Zn=1:1:0.5 [atomic ratio] or close to that A metal oxide having a composition close to the above may be used. 1:1:1 [atomic ratio] or a composition close to that, In:M:Zn=1:1:2 [atomic ratio ratio] or a composition close to that, or In:M:Zn=4:2:3 [atomic ratio] or A metal oxide having a composition close to the desired atomic ratio can be used. The range includes ±30%. As the element M, it is preferable to use gallium.

[0082] When a metal oxide film is formed by a sputtering method, the above atomic ratio is The atomic ratio of the metal oxide is not limited to the atomic ratio of the sputtering target used for forming the metal oxide film. It may also be the atomic ratio of the dots.

[0083] As shown in FIG. 2C, the oxide 230 is in contact with the upper surface and the side surface of the oxide 230. By providing an insulator 252 made of aluminum or the like, the oxide 230 is insulated. Indium contained in the oxide 230 may be unevenly distributed at and near the interface of the substrate 252. As a result, the surface area of ​​the oxide 230 has an atomic ratio close to that of indium oxide, The atomic ratio of In-Zn oxide is close to that of In-Zn oxide. The increase in the atomic ratio of indium near the surface of b increases the field effect of the transistor 200. As a result, the mobility can be improved.

[0084] By configuring the oxide 230a and the oxide 230b as described above, the oxide 230a and the oxide Therefore, the defect state density at the interface with the oxide 230b can be reduced. The effect of disturbances on carrier conduction is reduced, and the transistor 200 has a large on-current and and high frequency characteristics can be obtained.

[0085] Insulator 212, insulator 214, insulator 271, insulator 275, insulator 282, insulator 2 At least one of the insulating layer 283 and the insulating layer 285 is provided so that impurities such as water and hydrogen can be absorbed from the substrate side. Alternatively, a barrier that suppresses diffusion of the semiconductor material from above the transistor 200 into the transistor 200 It is preferable that the insulating film functions as an insulating film. At least one of the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator 285 The other is hydrogen atom, hydrogen molecule, water molecule, nitrogen atom, nitrogen molecule, and nitrogen oxide molecule (NO, N O, NO2, etc.), and has the function of suppressing the diffusion of impurities such as copper atoms (the above impurities are It is preferable to use an insulating material that is difficult to pass through. It has the function of suppressing the diffusion of at least one of the elementary molecules (oxygen is less likely to permeate). It is preferable to use an insulating material.

[0086] In this specification, a barrier insulating film refers to an insulating film having a barrier property. In this specification, the term "barrier property" refers to a function of suppressing the diffusion of a corresponding substance (i.e., low permeability). Alternatively, the corresponding substance is captured and fixed (also called gettering). (c) Function.

[0087] Insulator 212, insulator 214, insulator 271, insulator 275, insulator 282, insulator 2 83, and the insulator 285 is a material that suppresses the diffusion of impurities such as water and hydrogen, and oxygen. It is preferable to use an insulator having a function of providing a heat-resistant insulating film. For example, aluminum oxide, magnesium oxide, etc. Sium, Hafnium oxide, Gallium oxide, Indium gallium zinc oxide, Silicon nitride For example, the insulator 212 and the insulator 213 may be made of silicon oxynitride or silicon nitride. 75, and as the insulator 283, silicon nitride or the like, which has a higher hydrogen barrier property, is used. In addition, for example, the insulator 214, the insulator 271, the insulator 282, and the insulator The insulator 285 is made of aluminum oxide or It is preferable to use magnesium oxide, etc., which can remove impurities such as water and hydrogen. The insulator 212 and the insulator 214 are diffused from the substrate side to the transistor 200 side. Alternatively, impurities such as water and hydrogen can be prevented from entering the outside of the insulator 285. In this way, the diffusion of the semiconductor layer 200 from the interlayer insulating film disposed on the semiconductor layer 200 side to the transistor 200 side is suppressed. Alternatively, oxygen contained in the insulator 224 etc. may be mixed with the insulator 212 and the insulator 214 to the substrate side. The oxygen contained in the insulating layer 282 and the like diffuses above the transistor 200 through the insulating layer 282 and the like. In this way, the transistor 200 can be prevented from being affected by impurities such as water and hydrogen. , and insulators 212, 214, and 271 each having a function of suppressing oxygen diffusion. , the insulator 275, the insulator 282, the insulator 283, and the insulator 285 surround the insulator 275. It is preferable that

[0088] Here, the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, The insulator 283 and the insulator 285 are made of an oxide having an amorphous structure. For example, AlO x (x is any number greater than 0), or MgO y (y is 0 It is preferable to use a metal oxide such as a metal oxide having a thickness of 100 nm or more. In metal oxides having the structure, oxygen atoms have dangling bonds, and the dangling bonds In some cases, the ring bonds have the property of capturing or fixing hydrogen. A metal oxide having a phase structure is used as a component of the transistor 200 or By providing the transistor 200 therearound, hydrogen contained in the transistor 200 or the The transistor 200 can capture or fix hydrogen present around the transistor 200. It is preferable to capture or fix hydrogen contained in the channel forming region of the sta 200. A metal oxide having an amorphous structure is used as a component of the transistor 200, and By providing the transistor 200 therearound, the transistor 200 can be made to have good characteristics and high reliability. The semiconductor device can be manufactured using the semiconductor device.

[0089] In addition, the insulator 212, the insulator 214, the insulator 271, the insulator 275, the insulator 282, The insulator 283 and the insulator 285 are preferably amorphous. A polycrystalline region may be formed. 271, insulator 275, insulator 282, insulator 283, and insulator 285 are amorphous. A multi-layer structure in which a layer having an absorptive structure and a layer having a polycrystalline structure are laminated may be used. It may also be a laminated structure in which a layer of a polycrystalline structure is formed on a layer of an amorphous structure.

[0090] Insulator 212, insulator 214, insulator 271, insulator 275, insulator 282, insulator 2 The insulating film 83 and the insulator 285 may be formed by, for example, a sputtering method. The sputtering method does not require the use of hydrogen-containing molecules in the deposition gas, so the insulator 212 The edge 214, the insulator 271, the insulator 275, the insulator 282, the insulator 283, and the insulator The hydrogen concentration in the film can be reduced. It is not a method of deposition, but rather a method of chemical vapor deposition (CVD). ition method, molecular beam epitaxy (MBE) taxy method, Pulsed Laser Deposition (PLD) ion) method, Atomic Layer Deposition (ALD) Methods such as the above may be used as appropriate.

[0091] It is also preferable to reduce the resistivity of the insulators 212, 275, and 283. For example, the resistivity of the insulator 212, the insulator 275, and the insulator 283 may be 1×10 13 By setting the resistance to Ωcm, the processing using plasma, etc. in the semiconductor device manufacturing process can be performed. In the embodiment, the insulator 212, the insulator 275, and the insulator 283 are 242, conductor 260, or conductor 246. The resistivity of the insulator 212, the insulator 275, and the insulator 283 is preferably 1×10 10 Ωcm or more 1×10 15 Ωcm or less.

[0092] In addition, the insulators 216, 274, 280, and 285 are insulators 2 It is preferable that the dielectric constant of the interlayer film is lower than that of 14. By using a material with a low dielectric constant as the interlayer film, For example, the insulator 216, the insulator 274, the insulator 276, the insulator 278, the insulator 279, the insulator 271, the insulator 272, the insulator 273, the insulator 274, the insulator 275, the insulator 276, the insulator 277, the insulator 278, the insulator 27 The insulating layer 280 and the insulating layer 285 are made of silicon oxide, silicon oxynitride, or fluorine. Silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen For example, silicon oxide having voids may be used appropriately.

[0093] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. The conductor 205 is preferably embedded in an opening formed in the insulator 216. In addition, a portion of the conductor 205 may be embedded in the insulator 214.

[0094] The conductor 205 includes a conductor 205a and a conductor 205b. The conductor 205b is provided in contact with the bottom surface and the side wall of the opening. The conductive body 205b is provided so as to be embedded in the recess formed in the conductive body 205b. approximately coincides with the height of the upper surface of the conductor 205a and the height of the upper surface of the insulator 216.

[0095] Here, the conductor 205a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, an oxide, It has the function of suppressing the diffusion of impurities such as nitrogen molecules (N2O, NO, NO2, etc.) and copper atoms. It is preferable to use a conductive material that can absorb oxygen (e.g., oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material having a function of suppressing the diffusion of at least one of the above.

[0096] By using a conductive material having a function of reducing hydrogen diffusion for the conductor 205a, Impurities such as hydrogen contained in the conductor 205b are absorbed into the oxide 23 via the insulator 224 and the like. In addition, the conductor 205a has a function of suppressing the diffusion of oxygen. By using a conductive material having the above-mentioned function, the conductor 205b is oxidized and the conductivity is reduced. The conductive material having the function of suppressing the diffusion of oxygen is as follows: For example, titanium, titanium nitride, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. Therefore, it is preferable to use the above-mentioned conductive material alone as the conductor 205a. For example, the conductor 205a may be made of titanium nitride.

[0097] The conductor 205b is a conductive material mainly composed of tungsten, copper, or aluminum. For example, the conductor 205b may be made of tungsten. stomach.

[0098] Conductor 205 may function as a second gate electrode. The potential applied to the conductor 260 is changed independently of the potential applied to the conductor 260. This makes it possible to control the threshold voltage (Vth) of the transistor 200. By applying a negative potential to the conductor 205, the Vth of the transistor 200 is increased. Therefore, it is possible to reduce the off-current. When the potential applied to the conductor 260 is 0 V, the drain current is larger when the potential is applied to the conductor 260 than when the potential is not applied. The in-current can be reduced.

[0099] The electrical resistivity of the conductor 205 is set in consideration of the potential applied to the conductor 205. The thickness of the conductor 205 is set according to the electrical resistivity. The thickness of the conductive film 6 is approximately the same as that of the conductive film 205. It is preferable to make the thickness of the conductor 205 and the insulator 216 thin. By thinning the insulator 216, the absolute amount of impurities such as hydrogen contained in the insulator 216 can be reduced. This can reduce the diffusion of the impurities into the oxide 230.

[0100] As shown in FIG. 2A, the conductor 205 is a conductor 242a of the oxide 230 and It is preferable that the area is larger than the area that does not overlap with the conductor 242b. As shown in Fig. 2C, the conductor 205 is formed by dividing the channel width of the oxide 230a and the oxide 230b. It is preferable that the oxide extends in the region outside the end in the direction. On the outer side of the side surface of the channel width direction of the conductor 230, the conductor 205 and the conductor 260 are It is preferable that the first gate electrode and the second gate electrode are overlapped with each other via an insulator. The electric field of the conductor 260 acting as the first electrode and the electric field of the conductor 22 acting as the second gate electrode are The electric field of 05 can electrically surround the channel forming region of oxide 230. In this specification, the electric field of the first gate and the second gate forms a channel. The structure of a transistor that electrically surrounds a region is called a surrounded channel. This is called the (S-channel) structure.

[0101] In this specification, a transistor having an S-channel structure is a transistor having a pair of gates. The electric field of one and the other of the transistor electrodes electrically surrounds the channel forming region. The S-channel structure disclosed in this specification is a fin type structure. The S-channel structure is different from the planar structure. In other words, the transistor is less susceptible to short channel effects. It is possible.

[0102] As shown in FIG. 2C, the conductor 205 is extended to function as a wiring. However, the present invention is not limited to this, and a conductive material that functions as a wiring may be provided under the conductive material 205. In addition, the conductor 205 does not necessarily have to be provided for each transistor. For example, the conductor 205 may be shared by multiple transistors. Good too.

[0103] In the transistor 200, the conductor 205 includes a conductor 205a and a conductor 20 5b are stacked, the present invention is not limited to this. For example, the conductor 205 may be provided as a single layer or a laminated structure of three or more layers.

[0104] Insulator 222 and insulator 224 function as gate insulators.

[0105] The insulator 222 suppresses the diffusion of hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). In addition, the insulator 222 preferably has a function of suppressing oxygen (for example, oxygen atom, It is preferable that the material has a function of suppressing the diffusion of at least one of oxygen molecules. For example, The insulator 222 inhibits the diffusion of hydrogen and / or oxygen more than the insulator 224. It is preferable that the function be

[0106] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is preferable to use an insulator containing an oxide. Examples of the insulator include aluminum oxide and hafnium oxide. The oxides containing hafnium (hafnium aluminate) and aluminum are used. Alternatively, oxides containing hafnium and zirconium, such as hafnium, It is preferable to use tungsten zirconium oxide. When the oxide 230 is formed, the insulator 222 is formed by discharging oxygen from the oxide 230 to the substrate side and A layer for suppressing the diffusion of impurities such as hydrogen from the periphery of the transistor 200 to the oxide 230 is provided. Therefore, by providing the insulator 222, impurities such as hydrogen can be prevented from entering the transistor 2. 00, and suppresses the generation of oxygen vacancies in the oxide 230. In addition, the conductor 205 reacts with the oxygen contained in the insulator 224 and the oxide 230. This can suppress the occurrence of

[0107] Alternatively, the insulator may be, for example, aluminum oxide, bismuth oxide, or germanium oxide. , niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, oxide Zirconium may be added. Alternatively, these insulators may be nitrided. The insulator 222 may be silicon oxide, silicon oxynitride, or silicon nitride. may be used in a laminated form.

[0108] The insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, So-called high-k materials such as zirconium oxide and hafnium zirconium oxide The insulator containing the insulating material may be used in a single layer or a multilayer structure. As this progresses, problems such as leakage current may occur due to the thinning of the gate insulator. By using a high-k material as the insulator that functions as a thermal insulator, Therefore, the gate potential during transistor operation can be reduced. Lead zirconate titanate (PZT), strontium titanate (SrTiO3), (Ba, In some cases, materials with high dielectric constants such as Sr)TiO3(BST) can be used.

[0109] The insulator 224 in contact with the oxide 230 is, for example, silicon oxide, silicon oxynitride, etc. can be used appropriately.

[0110] In addition, during the manufacturing process of the transistor 200, the surface of the oxide 230 is exposed. The heat treatment is preferably performed at a temperature of, for example, 100° C. or higher and 600° C. or lower. More preferably, the heat treatment is performed at a temperature of 350° C. or higher and 550° C. or lower. Or in an inert gas atmosphere, or oxidizing gas is 10 ppm or more, 1% or more, or For example, the heat treatment is preferably carried out in an oxygen atmosphere. This supplies oxygen to the oxide 230, eliminating the oxygen vacancy (V O ) can be reduced. The heat treatment may be carried out under reduced pressure. Alternatively, the heat treatment may be carried out under nitrogen gas or nitrogen gas. After heat treatment in an active gas atmosphere, oxidizing gas was added at 10p to replace the oxygen that was removed. pm or more, 1% or more, or 10% or more. Alternatively, After heat treatment in an atmosphere containing 10 ppm or more, 1% or more, or 10% or more, Alternatively, the heat treatment may be performed in a nitrogen gas or inert gas atmosphere.

[0111] In addition, by performing an oxygen addition process on the oxide 230, oxygen vacancies in the oxide 230 can be filled by the supply of oxygen. In other words, the oxygen that is released into the tissue repairs the damaged tissue. O +O→null” reaction. Furthermore, the supplied oxygen reacts with the hydrogen remaining in the oxide 230. This allows the hydrogen to be removed as H2O (dehydration). Hydrogen remaining in the sample 230 recombines with the oxygen vacancies to form V O Inhibits the formation of H It is possible.

[0112] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, and may be made of different materials. The insulator 224 may be formed in an island shape by overlapping with the oxide 230a. In this case, the insulator 275 is in contact with the side surface of the insulator 224 and the top surface of the insulator 222. .

[0113] Conductor 242a and conductor 242b are provided in contact with the top surface of oxide 230b. Conductor 242a and conductor 242b are the source electrode or serves as the drain electrode.

[0114] The conductor 242 (conductor 242a and conductor 242b) may be, for example, tantalum. Nitrides containing titanium, nitrides containing molybdenum, nitrides containing tungsten Nitrides containing tantalum and aluminum, nitrides containing titanium and aluminum In one embodiment of the present invention, a nitride containing tantalum is particularly Also, for example, ruthenium oxide, ruthenium nitride, strontium and ruthenium Alternatively, oxides containing lanthanum, oxides containing lanthanum and nickel, etc. may be used. , because it is a conductive material that is resistant to oxidation, or a material that maintains its conductivity even when it absorbs oxygen. ,preferable.

[0115] In addition, hydrogen contained in the oxide 230b etc. is transferred to the conductor 242a or the conductor 242b. In particular, the conductor 242a and the conductor 242b may be made of nitrogen containing tantalum. By using the conductor, hydrogen contained in the oxide 230b etc. is converted into the conductor 242a or the conductor The diffused hydrogen is easily diffused into the conductor 242a or the conductor 242b. In other words, hydrogen contained in the oxide 230b and the like can bond with nitrogen, which is a conductor. It may be absorbed by 242a or conductor 242b.

[0116] In addition, no curved surface is formed between the side surface of the conductor 242 and the upper surface of the conductor 242. It is preferable that the conductor 242 does not have a curved surface. In this way, the cross-sectional area of ​​the conductor 242 in the cross section in the channel width direction can be increased. This increases the conductivity of the conductor 242 and increases the on-state current of the transistor 200. It can be made easier.

[0117] The insulator 271a is provided in contact with the upper surface of the conductor 242a, and the insulator 271b is The insulator 271 is provided in contact with the upper surface of the conductor 242b. Therefore, the insulator 271 preferably functions as a barrier insulating film to prevent oxygen from entering the It is preferable that the insulator 271 has a function of suppressing diffusion. For example, the insulator 271 has a function of suppressing diffusion. It is preferable that the insulator 271 has a function of suppressing the diffusion of oxygen. An insulator such as aluminum oxide or magnesium oxide may be used.

[0118] The insulator 275 includes the insulator 224, the oxide 230a, the oxide 230b, the conductor 242, and The insulator 275 is provided to cover the insulator 271 and to capture hydrogen. In that case, the insulator 275 is preferably silicon nitride. or metal oxides having an amorphous structure, such as aluminum oxide or It is preferable that the insulator 275 contains an insulator such as magnesium. A laminated film of aluminum oxide and silicon nitride on the aluminum oxide may be used.

[0119] By providing the insulators 271 and 275 as described above, the barrier property against oxygen is improved. The conductor 242 can be encapsulated in an insulator having the following properties: It is possible to prevent oxygen contained in the insulator 280 from diffusing into the conductor 242. Therefore, the conductor 242 is directly heated by the oxygen contained in the insulator 224 and the insulator 280. It is possible to suppress the increase in resistivity due to oxidation and the decrease in on-current.

[0120] The insulator 252 functions as a part of the gate insulator. It is preferable to use a barrier insulating film for the insulator 252. The insulator 252 may be made of aluminum or It is preferable to use an insulator containing oxides of one or both of hafnium and arsenic. , aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium (hafnium oxide, ha ... hafnium aluminate), oxides containing hafnium and silicon (hafnium silicate) In this embodiment, the insulator 252 may be aluminum oxide. In this case, the insulator 252 contains at least oxygen and aluminum. It becomes an insulator.

[0121] As shown in FIG. 2C, the insulator 252 is formed on the top and side surfaces of the oxide 230b, 230 a , the side of insulator 224 , and the top surface of insulator 222 . That is, the oxide 230a, the oxide 230b, and the insulator 224 overlapping the conductor 260 The region is covered with an insulator 252 in the cross section in the channel width direction. When a process is performed, oxygen is released from the oxide 230a and the oxide 230b. The oxide can be blocked by the insulator 252, which has a barrier property against the oxide. The formation of oxygen vacancies (Vo) in the oxide 230a and the oxide 230b can be reduced. As a result, oxygen vacancies (Vo) and V O Reduce H As a result, the electrical characteristics of the transistor 200 can be improved, and the reliability can be improved. It is possible to do so.

[0122] Conversely, even if the insulators 280 and 250 contain an excessive amount of oxygen, , and suppressing the excessive supply of the oxygen to the oxide 230a and the oxide 230b. Therefore, the area 230ba and the area 230bb are overlapped through the area 230bc. This causes a decrease in the on-state current of the transistor 200 or a decrease in the field effect mobility. This can suppress rubbing.

[0123] As shown in FIG. 2B, the insulator 252 includes a conductor 242, an insulator 271, and an insulator. The conductor 275 and the insulator 280 are provided in contact with each other on their respective sides. The side surface of the electrode 42 is oxidized, and the formation of an oxide film on the side surface can be reduced. This may cause a decrease in the on-state current or a decrease in the field effect mobility of the transistor 200. can be suppressed.

[0124] In addition, the insulator 252, together with the insulator 254, the insulator 250, and the conductor 260, The transistor 200 must be provided in an opening formed in the insulator 280 or the like. In order to achieve this, it is preferable that the insulator 252 has a thin film thickness. 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, more preferably In this case, the insulator 252 is at least partially In addition, the thickness of the insulator 252 is preferably insulated. It is preferable that the thickness of the insulator 252 is thinner than that of the insulator 250. In this case, the insulator 252 is at least partially In the above, it is sufficient that the insulating layer 250 has a region having a thickness thinner than that of the insulator 250.

[0125] In order to form the insulator 252 into a thin film as described above, the ALD method is used. In the ALD method, the reaction between the precursor and the reactant is carried out only with thermal energy. Thermal ALD method, PE using plasma-excited reactants ALD (Plasma Enhanced ALD) method and others. In the PEALD method, The use of plasma may be preferable because it allows deposition at a lower temperature.

[0126] The ALD method utilizes the self-regulating nature of atoms to deposit atoms one layer at a time. This allows for extremely thin film deposition, film deposition on structures with high aspect ratios, and no pinholes. It is possible to form a film with few defects, excellent coating properties, and low temperature film formation. Therefore, the insulator 252 is formed on the side of the opening formed in the insulator 280, etc. The thin film can be formed with good adhesion as described above.

[0127] Note that some precursors used in the ALD method contain carbon. The film formed by this method has less impurities such as carbon compared to films formed by other film formation methods. The amount of impurities was determined by secondary ion mass spectrometry (SIMS:Se condary ion mass spectrometry), X-ray photoelectron spectroscopy ( XPS: X-ray Photoelectron Spectroscopy, Auger Electron Spectroscopy (AES) This can be done using py).

[0128] The insulator 250 functions as a part of the gate insulator. The insulator 250 is preferably disposed in contact with the upper surface of the insulating layer 250. Silicon oxide nitride, silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon Silicon oxide with no doping, silicon oxide with carbon and nitrogen doping, silicon oxide with vacancies, etc. In particular, silicon oxide and silicon oxynitride are stable against heat. In this case, the insulator 250 contains at least oxygen and silicon. It becomes an insulator.

[0129] The insulator 250, like the insulator 224, has an impurity concentration of water, hydrogen, etc. in the insulator 250. It is preferable that the thickness of the insulator 250 is 1 nm or more and 20 nm or less. It is preferable that the thickness is 0.5 nm or more and 15.0 nm or less, and more preferable that the thickness is 0.5 nm or more and 15.0 nm or less. The insulator 250 may have a region with the above-mentioned thickness in at least a portion. .

[0130] Although the insulator 250 is formed as a single layer in the configurations shown in FIGS. 2A to 2D, However, the present invention is not limited to this, and a laminated structure of two or more layers may be used. For example, Thus, the insulator 250 is formed of two layers, an insulator 250a and an insulator 250b on the insulator 250a. A laminated structure of the above may also be used.

[0131] As shown in FIG. 3B, when the insulator 250 has a two-layer laminated structure, the lower insulator 2 The upper layer 50a is made of an insulator that easily transmits oxygen, and the upper layer 250b is made of an insulator that easily transmits oxygen. It is preferable to form the insulating layer using an insulating material that has a function of suppressing diffusion. This suppresses the oxygen contained in the insulator 250a from diffusing into the conductor 260. In other words, the amount of oxygen supplied to the oxide 230 can be prevented from decreasing. In addition, oxidation of the conductor 260 due to oxygen contained in the insulator 250a can be suppressed. For example, the insulator 250a is made of the material that can be used for the insulator 250 described above. The insulator 250b includes oxides of one or both of aluminum and hafnium. It is preferable to use an insulator. Examples of the insulator include aluminum oxide, hafnium oxide, and aluminum. Hafnium and hafnium-containing oxides (hafnium aluminate), hafnium and silicon An oxide containing silicon (hafnium silicate) or the like can be used. In the present embodiment, hafnium oxide is used as the insulator 250b. In this case, the insulator 250b is The insulator 250b contains at least oxygen and hafnium. The thickness is 0.5 nm or more and 5.0 nm or less, preferably 1.0 nm or more and 5.0 nm or less, more preferably 1.0 nm or more and 5.0 nm or less. More preferably, the thickness is set to be 1.0 nm or more and 3.0 nm or less. In this case, the insulator 250b is It is sufficient that at least a portion of the film has a thickness as described above.

[0132] When silicon oxide or silicon oxynitride is used for the insulator 250a, The body 250b may be made of an insulating material, such as a high-k material having a high dielectric constant. The insulating material is made of a laminated structure of the insulating material 250a and the insulating material 250b, so that the insulating material is stable against heat. Therefore, the physical properties of the gate insulator can be improved. It is possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator. Therefore, the withstand voltage of the insulator 250 can be increased.

[0133] The insulator 254 functions as a part of the gate insulator. It is preferable to use a barrier insulating film against hydrogen contained in the conductor 260. It is possible to prevent impurities such as ZnO from diffusing into the insulator 250 and the oxide 230b. The insulator 254 may be any insulator that can be used for the insulator 283 described above. For example, the insulator 254 may be a silicon nitride film formed by the PEALD method. In this case, the insulator 254 is an insulator containing at least nitrogen and silicon.

[0134] The insulator 254 may further have a barrier property against oxygen. The oxygen contained in the insulator 250 can be prevented from diffusing into the conductor 260.

[0135] In addition, the insulator 254, together with the insulator 252, the insulator 250, and the conductor 260, The transistor 200 must be provided in an opening formed in the insulator 280 or the like. In order to achieve this, it is preferable that the insulator 254 has a thin film thickness. 0.1 nm or more and 5.0 nm or less, preferably 0.5 nm or more and 3.0 nm or less, more preferably In this case, the insulator 254 is at least partially In addition, the thickness of the insulator 254 is preferably It is preferable that the thickness of the insulator 254 is thinner than that of the insulator 250. In this case, the insulator 254 is at least partially In the above, it is sufficient that the insulating layer 250 has a region having a thickness thinner than that of the insulator 250.

[0136] Conductor 260 serves as a first gate electrode of transistor 200. 0 has a conductor 260a and a conductor 260b disposed on the conductor 260a. For example, it is preferable that the conductor 260a is arranged so as to wrap around the bottom and sides of the conductor 260b. As shown in FIG. 2(B) and FIG. 2(C), the conductive The upper surface of the body 260 is generally flush with the upper surface of the insulator 250. In FIG. 2(C), the conductor 260 is shown as a two-layer structure of conductor 260a and conductor 260b. However, it may have a single layer structure or a laminated structure of three or more layers.

[0137] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. It is preferable to use a conductive material that has a function of suppressing the diffusion of impurities such as copper atoms. Or, the function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) It is preferable to use a conductive material having the above-mentioned properties.

[0138] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can suppress the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include titanium and nitride. It is preferable to use titanium, tantalum, tantalum nitride, ruthenium, ruthenium oxide, etc. It is nice.

[0139] In addition, since the conductor 260 also functions as wiring, a conductor with high conductivity should be used. For example, the conductor 260b is preferably made of tungsten, copper, or aluminum. The conductor 260b may have a laminated structure. For example, a laminated structure of titanium or titanium nitride and the above conductive material may be used.

[0140] In addition, in the transistor 200, the conductor 260 is formed in the insulator 280, etc. The conductor 260 is formed in a self-aligned manner to fill the opening. Thus, the conductor 260 is aligned in the region between the conductors 242a and 242b. It can be positioned reliably without any

[0141] As shown in FIG. 2C, the transistor 200 has an insulating layer in the channel width direction. The conductor 260 and the oxide 230b of the conductor 260 when the bottom surface of the body 222 is taken as the reference. The height of the bottom surface of the non-overlapping region is preferably lower than the height of the bottom surface of the oxide 230b. A conductor 260 functioning as a gate electrode is connected to an oxide 230 via an insulator 250 or the like. By covering the side and top surfaces of the channel formation region of the conductor 260, The oxide 230b can be easily applied to the entire channel forming region. 00 on-current and improve the frequency characteristics. The oxide 230a and the oxide 230b overlap the conductor 260 when the oxide 230a and the oxide 230b overlap the conductor 260. The difference between the height of the bottom surface of the conductor 260 in the non-contact region and the height of the bottom surface of the oxide 230b is 0 nm or more and 100 nm or less, preferably 3 nm or more and 50 nm or less, more preferably , 5nm or more and 20nm or less.

[0142] The insulator 280 is provided on the insulator 275, and the insulator 250 and the conductor 260 are provided. An opening is formed in the area where the insulating material 280 is to be removed. The upper surface of the insulating material 280 is planarized. Good too.

[0143] The insulator 280 that functions as an interlayer film preferably has a low dielectric constant. By using the material as an interlayer film, the parasitic capacitance between wirings can be reduced. It is preferable that the insulating layer 200 is made of the same material as the insulating layer 216. Silicon and silicon oxynitride are preferred because they are thermally stable. In particular, silicon oxide Materials such as silicon oxynitride, silicon oxide with vacancies, etc., have oxygen that is released by heating. This is preferable because it is possible to easily form a region including the above.

[0144] The insulator 280 has a reduced concentration of impurities such as water and hydrogen. For example, the insulator 280 may be made of silicon, such as silicon oxide or silicon oxynitride. An oxide containing such a material may be used as appropriate.

[0145] The insulator 282 prevents impurities such as water and hydrogen from diffusing into the insulator 280 from above. It is preferable that the insulating film functions as a barrier insulating film to trap impurities such as hydrogen. In addition, the insulator 282 is preferably a barrier insulating film that suppresses the permeation of oxygen. The insulator 282 is preferably a metal oxide having an amorphous structure. For example, an insulator such as aluminum oxide may be used. In this case, the insulator 282 is The insulator 212 and the insulator 28 are formed of at least oxygen and aluminum. In the region between the electrodes 3, the insulator 280 is in contact with the electrode 280 and has the function of capturing impurities such as hydrogen. By providing the insulator 282, impurities such as hydrogen contained in the insulator 280 can be captured. In particular, the amount of hydrogen in the region can be kept constant. By using aluminum oxide with an amorphous structure, hydrogen can be absorbed more effectively. This is preferable because it may be possible to capture or fix the material. This allows the material to have good characteristics and reliability. Thus, a high performance transistor 200 and a semiconductor device can be manufactured.

[0146] The insulator 283 prevents impurities such as water and hydrogen from diffusing into the insulator 280 from above. The insulator 283 functions as a barrier insulating film. The conductor 283 is a silicon-containing nitride such as silicon nitride or silicon oxynitride. For example, a film formed by a sputtering method is preferably used as the insulator 283. Silicon nitride may be used. The insulator 283 is formed by sputtering, In addition, a silicon nitride film having high thermal conductivity can be formed as the insulator 283. On top of the silicon nitride film formed by the etching method, a film is further formed by the PEALD method or the CVD method. A silicon nitride layer may be laminated on the insulating layer.

[0147] The conductors 240a and 240b are mainly made of tungsten, copper, or aluminum. It is preferable to use a conductive material having the following components: 0b may have a laminated structure.

[0148] In addition, when the conductor 240 has a laminated structure, the insulator 285, the insulator 283, the insulator 28 2, an insulator 280, an insulator 275, and a first conductor disposed near the insulator 271 For this purpose, it is preferable to use a conductive material that has a function of suppressing the permeation of impurities such as water and hydrogen. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, ruthenium oxide, It is preferable to use tungsten or the like. In addition, it is preferable to use tungsten or the like that has the function of suppressing the permeation of impurities such as water and hydrogen. The conductive material having the above structure may be used in a single layer or a multilayer structure. Impurities such as water and hydrogen are converted into oxides through the conductors 240a and 240b. It is possible to suppress contamination of 230.

[0149] The insulator 241a and the insulator 241b may be, for example, the insulator 275. For example, the insulators 241a and 241b may be made of a barrier insulating film having the following properties: An insulator such as silicon nitride, aluminum oxide, or silicon nitride oxide may be used. The insulator 241a and the insulator 241b are connected to the insulator 283, the insulator 282, and the insulator 271. Since the insulator 280 is provided in contact with the conductor 270, impurities such as water and hydrogen contained in the insulator 280 can be easily absorbed by the conductor 270. 240a and the conductor 240b, the oxide 230 can be prevented from being mixed therein. In particular, silicon nitride is suitable because it has high blocking properties against hydrogen. Prevents oxygen contained in the insulating material 280 from being absorbed by the conductors 240a and 240b. It is possible.

[0150] When the insulator 241a and the insulator 241b are formed into a laminated structure as shown in FIG. A first insulator such as insulator 280 contacts the inner wall of the opening, and a second insulator on the inside thereof. It is preferable to use a combination of a barrier insulating film against oxygen and a barrier insulating film against hydrogen. I wish.

[0151] For example, the first insulator is aluminum oxide formed by the ALD method, and the second The insulator may be silicon nitride formed by the PEALD method. By doing so, oxidation of the conductor 240 is suppressed, and further, hydrogen is prevented from being mixed into the conductor 240. can be reduced.

[0152] In addition, the conductive material 240a and the conductive material 240b are in contact with each other and function as wiring. Conductor 246 (conductor 246a and conductor 246b) may be arranged. 46 shall be made of conductive materials mainly composed of tungsten, copper, or aluminum. The conductor may also have a laminated structure, for example, titanium or nitride. The conductive material may be a laminate of titanium and the conductive material. The insulating film 14 may be formed so as to be embedded in the opening.

[0153] <Materials for semiconductor devices> The following describes constituent materials that can be used in the semiconductor device.

[0154] <<Substrate>> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or A conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, and silicon substrates. Fire substrate, stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), resin substrate Semiconductor substrates are made of, for example, silicon or germanium. Semiconductor substrates, or silicon carbide, silicon germanium, gallium arsenide, indium phosphide Compound semiconductor substrates made of gallium oxide, zinc oxide, and gallium oxide are also available. A semiconductor substrate having an insulating region inside the semiconductor substrate, for example, SOI (Silicon on Insulator) Conductive substrates include graphite substrates and metal substrates. , alloy substrates, conductive resin substrates, etc. Also, substrates with metal nitrides, metal oxides, etc. Furthermore, there are substrates in which a conductor or semiconductor is provided on an insulating substrate. Substrate, substrate with conductor or insulator provided on semiconductor substrate, substrate with semiconductor or insulator provided on conductive substrate There are also substrates with elements on them. The elements provided on the substrate may include a capacitance element, a resistance element, a switch element, a light-emitting element, and the like. These include elements such as memory elements.

[0155] <<Insulators>> Insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. These include metal oxide nitrides, metal oxynitrides, and metal oxynitrides.

[0156] For example, as transistors become smaller and more highly integrated, the gate insulator becomes thinner. This can cause problems such as leakage current. By using high-k materials, the voltage required for transistor operation can be reduced while maintaining the physical thickness. On the other hand, it is possible to use a material with a low relative dielectric constant for the insulator that functions as the interlayer film. This reduces the parasitic capacitance between the wirings. The material should be selected accordingly.

[0157] Insulators with high relative dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. Oxides containing aluminum, aluminum and hafnium, and oxides containing aluminum and hafnium oxide nitride having silicon and hafnium, oxide having silicon and hafnium Examples of suitable materials include oxynitrides with hafnium, or nitrides with silicon and hafnium.

[0158] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, Silicon oxide doped with carbon and nitrogen, silicon oxide with voids, or resin, etc. be.

[0159] In addition, transistors using metal oxides suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of stabilizing the electrical characteristics of the transistor, Insulators that have the function of suppressing the permeation of impurities such as hydrogen and oxygen include: For example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, Phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum Insulators containing tantalum, neodymium, hafnium, or tantalum are used in single or multilayer configurations. Specifically, an insulating material that has a function of suppressing the permeation of impurities such as hydrogen and oxygen is used. As bodies, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, oxide Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, Metal oxides such as tantalum nitride, aluminum nitride, silicon oxynitride, silicon nitride, etc. Metal nitrides of the following metals can be used.

[0160] In addition, the insulator that functions as the gate insulator has a region that contains oxygen that is desorbed by heating. For example, it is preferable that the insulating material has a region containing oxygen that is desorbed by heating. By forming a structure in which silicon oxide or silicon oxynitride is in contact with the oxide 230, The oxygen deficiency of 230 can be compensated for.

[0161] <<Conductors>> Conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, zirconium, beryllium, indium, ruthenium, iridium, strontium Metal elements selected from aluminum, lanthanum, etc., or alloys containing the above-mentioned metal elements It is preferable to use an alloy or the like that combines the above-mentioned metal elements. For example, tantalum nitride titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel. Tantalum, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitride, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium Oxides containing lanthanum and nickel are conductive materials that are difficult to oxidize or absorb oxygen. It is preferable because it is a material that maintains its conductivity even if it is oxidized. In addition, it does not contain impurity elements such as phosphorus. Highly conductive semiconductors, such as polycrystalline silicon, nickel silicide, etc. Silicide may also be used.

[0162] In addition, a plurality of conductive layers made of the above materials may be laminated. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated material that combines the above-mentioned material containing a metal element and a conductive material containing nitrogen is In addition, the above-mentioned metal element-containing material, the conductive material containing oxygen, and the nitrogen A laminated structure in which the conductive material containing the element is combined with the conductive material containing the element may be used.

[0163] In the case where an oxide is used for the channel formation region of a transistor, The conductor that functions as a conductive material is a material containing the above-mentioned metal element and a conductive material containing oxygen. In this case, it is preferable to use a laminate structure in which an oxygen-containing conductive material is used as the It is preferable to provide the conductive material containing oxygen on the channel forming region side. This makes it easier for oxygen released from the conductive material to be supplied to the channel formation region.

[0164] In particular, the metal oxide in which the channel is formed is a conductor that functions as a gate electrode. It is preferable to use a conductive material containing oxygen and a metal element contained in the metal. Conductive materials containing metal elements and nitrogen may also be used, such as titanium nitride and tantalum nitride. In addition, a conductive material containing nitrogen such as indium tin oxide or tungsten oxide may be used. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide Indium tin oxide containing nitrogen may also be used. Mugallium zinc oxide may be used. By using such a material, the channel is formed In some cases, hydrogen can be captured from the metal oxide that is insulated from the outer In some cases, it may be possible to capture hydrogen that is mixed in from the surroundings, etc.

[0165] <<Metal oxides>> The oxide 230 is a metal oxide (oxide semiconductor) that functions as a semiconductor. The following describes metal oxides that can be used as the oxide 230 according to the present invention. do.

[0166] The metal oxide preferably contains at least indium or zinc. In addition to these, aluminum, gallium, and zinc are preferably included. It is preferable that the alloy contains boron, titanium, iron, nickel, etc. Nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, halide One selected from among fluorine, tantalum, tungsten, magnesium, cobalt, etc. Or multiple types may be included.

[0167] Here, the metal oxide is an In-M-Zn oxide having indium, element M and zinc. The element M can be aluminum, gallium, yttrium, or The element M is tin. Other elements that can be used for M include boron, titanium, iron, and nickel. Ru, Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium However, the elements M and tungsten are also called tantalum, magnesium, and cobalt. In some cases, a combination of two or more of the above elements may be used.

[0168] In this specification, metal oxides containing nitrogen are also referred to as metal oxides. Metal oxides containing nitrogen are also called metal oxynitrides (MEs). It may also be called tal oxynitride.

[0169] <Classification of crystal structures> First, classification of crystal structures in oxide semiconductors will be described with reference to FIG. FIG. 4A shows a structure of an oxide semiconductor, typically IGZO (containing In, Ga, and Zn). FIG. 1 is a diagram for explaining the classification of crystal structures of metal oxides.

[0170] As shown in FIG. 4(A), oxide semiconductors are roughly divided into “amorphous” and “non-morphous” types. "Crystalline" and "Crystal" In addition, "Amorphous" is classified as completely amo rphous. Also, in "Crystalline", CAAC (c- axis-aligned crystalline), nc(nanocrystal line), and CAC (cloud-aligned composite). The classification of "Crystalline" includes single crystal, p Oly crystals and completely amorphous are excluded. In addition, "Crystal" includes single crystal and poly crystal. rystal is included.

[0171] The structures in the bold frames in Figure 4(A) are classified into two types: "Amorphous" and "C It is an intermediate state between "crystal" and "new cryst" and is considered to be a new boundary region. In other words, this structure belongs to the energetic What are the unstable "Amorphous" and "Crystal"? This can be rephrased as a completely different structure.

[0172] The crystal structure of the film or substrate was determined by X-ray diffraction (XRD). The crystallinity can be evaluated using the crystallinity spectrum. CAAC-IGZO films classified as "Grazing-Incidence The XRD spectrum obtained by the GIXD measurement is shown in FIG. It is also called the thin film method or the Seemann-Bohlin method. Hereafter, the GIX method shown in Figure 4(B) will be The XRD spectrum obtained by the D measurement is simply referred to as the XRD spectrum. The composition of the CAAC-IGZO film shown in Fig. 1 is approximately In:Ga:Zn=4:2:3 [atomic ratio]. The thickness of the CAAC-IGZO film shown in FIG. 4(B) is 500 nm.

[0173] As shown in Figure 4(B), the XRD spectrum of the CAAC-IGZO film shows clear crystalline Specifically, the XRD spectrum of the CAAC-IGZO film shows a peak indicating In the case of the Cr-Si alloy, a peak indicating the c-axis orientation is detected near 2θ=31°. As shown in the figure, the peak intensity at 2θ = 31° is asymmetrical around the angle at which the peak intensity was detected. be.

[0174] The crystal structure of the film or substrate was also analyzed by nano-beam electron diffraction (NBED). Diffraction patterns observed by electron diffraction (ultra-small The diffraction pattern of the CAAC-IGZO film can be evaluated by the electron beam diffraction pattern. The folding pattern is shown in FIG. 4(C). FIG. 4(C) shows the case where the electron beam is incident parallel to the substrate. The diffraction pattern observed by NBED is shown in Fig. 4(C). The composition of the GZO film is approximately In:Ga:Zn=4:2:3 [atomic ratio]. In the electron diffraction method, electron diffraction is performed with a probe diameter of 1 nm.

[0175] As shown in Figure 4(C), the diffraction pattern of the CAAC-IGZO film shows a c-axis orientation. Multiple spots are observed.

[0176] <<Structure of oxide semiconductor>> Note that oxide semiconductors may be classified differently from those shown in FIG. 4A in terms of their crystal structures. For example, oxide semiconductors include single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As a non-single crystal oxide semiconductor, for example, the above-mentioned CAAC-O In addition, non-single-crystal oxide semiconductors include polycrystalline oxide semiconductors, pseudo-single-crystal oxide semiconductors, and nc-OS. Amorphous-like oxide semiconductor (a-like OS) e semiconductor), amorphous oxide semiconductor, etc.

[0177] Here, the details of CAAC-OS, nc-OS, and a-like OS mentioned above are , and provide an explanation.

[0178] [CAAC-OS] CAAC-OS has multiple crystalline regions, and the multiple crystalline regions have c-axes oriented in a specific direction. The specific direction is the thickness direction of the CAAC-OS film. , in the normal direction to the surface on which the CAAC-OS film is formed, or in the normal direction to the surface of the CAAC-OS film. A crystalline region is a region in which the atomic arrangement has periodicity. When considered as a child arrangement, a crystalline region is also a region with a uniform lattice arrangement. The OS has a region in which multiple crystal regions are connected in the ab-plane direction, and this region is strained. The distortion may occur when the lattice arrangement is distorted in a region where multiple crystal regions are connected. The area where the orientation of the lattice array changes between an area with one lattice array and an area with a different lattice array. In other words, the CAAC-OS has a c-axis orientation and no clear orientation in the ab-plane direction. It is an oxide semiconductor that has no

[0179] Each of the multiple crystalline regions is made up of one or more minute crystals (maximum diameter 10 When a crystalline region is made up of a single tiny crystal, the crystal size is less than 1 nm. The maximum diameter of the crystalline region is less than 10 nm. When such a crystal region is formed, the size of the crystal region may be approximately several tens of nm.

[0180] In-M-Zn oxide (where element M is aluminum, gallium, yttrium, or sulphur) CAAC-OS is one or more types selected from the group consisting of aluminum, titanium, etc. A layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the In layer) and a layer containing element M, zinc (Zn), and oxygen (hereinafter referred to as the In layer) are A layered crystal structure (also called a layered structure) is formed by stacking a layer having an element (hereinafter, an (M,Zn) layer) and a layer having an element having an element (hereinafter, an (M,Zn) layer). Indium and element M are mutually substitutable. The (M,Zn) layer may contain indium. The In layer contains the element M. The In layer may contain Zn. The layered structure may be, for example, In high-resolution TEM images, this is observed as a lattice image.

[0181] For example, when the structure of the CAAC-OS film is analyzed using an XRD device, the θ / 2θ shift In the out-of-plane XRD measurement using a can, two peaks indicating the c-axis orientation were observed. The peak position indicating the c-axis orientation (value of 2θ) is detected at or near θ=31°. ) may vary depending on the type and composition of the metal elements that make up the CAAC-OS.

[0182] For example, in the electron diffraction pattern of the CAAC-OS film, multiple bright spots (spots) Note that one spot and another spot are the electron beams that have passed through the sample. The spot (also called the direct spot) is the center of symmetry, and the points are observed at positions symmetrical to each other. can be.

[0183] When the crystalline region is observed from the specific direction, the lattice arrangement in the crystalline region is a hexagonal lattice. However, the unit cell is not necessarily a regular hexagon, and may be a non-regular hexagon. The above distortion may have a lattice arrangement such as a pentagon or heptagon. -In the OS, clear grain boundaries were confirmed even in the vicinity of the distortion. In other words, the formation of grain boundaries is suppressed by the distortion of the lattice arrangement. This is because the arrangement of oxygen atoms in the CAAC-OS is dense in the ab-plane direction. The metal atoms are replaced by other metals, and the bond distance between the atoms changes. This is believed to be because distortion can be tolerated.

[0184] The crystal structure in which clear grain boundaries are observed is called polycrystal. The grain boundaries act as recombination centers, trapping carriers and forming transistor structures. It is highly likely that this will cause a decrease in on-state current and a decrease in field effect mobility. CAAC-OS, which has no visible grain boundaries, has a crystal structure suitable for the semiconductor layer of a transistor. CAAC-OS is one of the crystalline oxides that contain Zn. For example, In-Zn oxide and In-Ga-Zn oxide are In oxides. This is preferable since it can suppress the generation of grain boundaries more effectively than oxides.

[0185] CAAC-OS is an oxide semiconductor with high crystallinity and no clear grain boundaries. Therefore, the CAAC-OS is less susceptible to the decrease in electron mobility caused by grain boundaries. In addition, the crystallinity of an oxide semiconductor may be reduced by the incorporation of impurities or the generation of defects. Therefore, CAAC-OS is an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, the physical properties of the oxide semiconductor having the CAAC-OS are stable. Therefore, oxide semiconductors having CAAC-OS are resistant to heat and highly reliable. AAC-OS is stable even under high temperatures (so-called thermal budget) during the manufacturing process. Therefore, using CAAC-OS for OS transistors increases the flexibility of the manufacturing process. It will be possible to expand the range.

[0186] [nc-OS] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and In other words, the nc-OS has a periodic atomic arrangement in the region of 3 nm or less. The size of the minute crystals is, for example, 1 nm or more and 10 nm or less. Since the size of the crystals is between 1 nm and 3 nm, these very small crystals are also called nanocrystals. In the case of nc-OS, the crystal orientation of different nanocrystals is not regular. Therefore, depending on the analysis method, the nc-OS may be a-like In some cases, it may be difficult to distinguish between an OS and an amorphous oxide semiconductor. For example, On the other hand, when structural analysis is performed using an XRD device, out-of- In the plane XRD measurement, no peaks indicating crystallinity were detected. In contrast, electron beams with a probe diameter larger than that of nanocrystals (e.g., 50 nm or more) are used. When performing ray diffraction (also called selected area electron diffraction), a diffraction pattern like a halo pattern appears. On the other hand, the size of the nanocrystals in the nc-OS film is close to or smaller than that of the nanocrystals. Electron beam diffraction (nano-beam diffraction) using an electron beam with a small probe diameter (e.g., 1 nm to 30 nm) When electron beam diffraction is performed, a ring-shaped area is observed around the direct spot. In some cases, an electron diffraction pattern is obtained in which multiple spots are observed within a single electron beam.

[0187] [a-like OS] The a-like OS is an oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. A-like OS is a semiconductor. It has voids or low density regions. The OS has lower crystallinity than the nc-OS and CAAC-OS. The OS has a higher hydrogen concentration in the film than the nc-OS and CAAC-OS.

[0188] <<Oxide semiconductor structure>> Next, the details of the above-mentioned CAC-OS will be explained. Concerning formation.

[0189] [CAC-OS] CAC-OS is a type of metal oxide in which the elements constituting the metal oxide are 0.5 nm to 10 nm in diameter. Preferably, the material is unevenly distributed in a size range of 1 nm to 3 nm or less, or in the vicinity thereof. In the following, it is assumed that one or more metal elements are unevenly distributed in the metal oxide. The region having the metal element has a size of 0.5 nm to 10 nm, preferably 1 nm to 3 nm. A state where the mixture is smaller than m or close to that size is called a mosaic or patch pattern. .

[0190] Furthermore, CAC-OS is a material that is separated into a first region and a second region. The first region has a structure in which the first region is distributed throughout the film (hereinafter, also referred to as a cloud-like structure). ) In other words, the CAC-OS is a mixture of the first and second regions. It is a composite metal oxide having a structure in which

[0191] Here, the I ratio for the metal elements constituting the CAC-OS in the In-Ga-Zn oxide is The atomic ratios of n, Ga, and Zn are defined as [In], [Ga], and [Zn], respectively. For example, in the CAC-OS of In-Ga-Zn oxide, the first region is a region where [In] is larger than [In] in the composition of the CAC-OS film. The second region is a region where [Ga] is larger than [Ga] in the composition of the CAC-OS film. Or, for example, the first region has [In] that is greater than the [In] in the second region. The first region has a larger Ga than the second region, and the second region has a smaller Ga than the first region. In addition, the second region has a larger [Ga] than the first region and a smaller [I [n] is smaller than [In] in the first region.

[0192] Specifically, the first region is mainly composed of indium oxide, indium zinc oxide, etc. The second region is a region that is a portion of the gallium oxide, gallium zinc oxide, etc. In other words, the first region is called a region in which In is the main component. The second region can be rephrased as a region containing Ga as the main component. It is possible.

[0193] In addition, there are cases where a clear boundary between the first region and the second region cannot be observed. .

[0194] For example, in the case of CAC-OS of In-Ga-Zn oxide, Optical method (EDX:Energy Dispersive X-ray spectrosc) The EDX mapping obtained using the opy revealed that the region containing In as the main component (the first region) The structure has a structure in which a first region (a region mainly made of Ga) and a region mainly made of Ga (a second region) are unevenly distributed and mixed. It can be confirmed that.

[0195] When the CAC-OS is used in a transistor, the conductivity due to the first region and the conductivity due to the second region are different. The insulating properties due to the region of the gate insulating film act complementary to each other to provide a switching function (On In other words, CAC-OS and has a conductive function in a part of the material and an insulating function in a part of the material, and By separating the conductive function from the insulating function, Therefore, by using CAC-OS in transistors, This allows for a high on-state current (I on ), high field-effect mobility (μ), and good switching It is possible to realize a switching operation.

[0196] The oxide semiconductor has various structures and has different characteristics. The oxide semiconductors in Two or more of AC-OS, nc-OS, and CAAC-OS may be included.

[0197] <Transistor Having Oxide Semiconductor> Next, the case where the oxide semiconductor is used for a transistor will be described.

[0198] By using the oxide semiconductor for a transistor, a transistor with high field-effect mobility can be obtained. In addition, a highly reliable transistor can be realized.

[0199] An oxide semiconductor with a low carrier concentration is used for the channel formation region of a transistor. For example, the carrier concentration of a channel formation region of an oxide semiconductor is preferably 1×10 17c m -3 Less than or equal to 1×10 15 cm -3 Less than 1×10, more preferably 13 cm -3 Less than or equal to 1×10 11 cm -3 Less than 1×10, more preferably 10 c m -3 Less than 1 x 10 -9 cm -3 The above is the case. In the case of decreasing the concentration, the impurity concentration in the oxide semiconductor film is decreased, and the defect state density In this specification and the like, a low impurity concentration and a low defect level density are An oxide semiconductor having a low carrier concentration is referred to as a high-purity intrinsic oxide semiconductor or a substantially high-purity intrinsic oxide semiconductor. This may be referred to as a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor.

[0200] In addition, a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low density of defect states. Therefore, the trap level density may be low.

[0201] In addition, the time required for the charge trapped in the trap level of the oxide semiconductor to disappear is Therefore, the trap level density is high. A transistor in which a channel formation region is formed in an oxide semiconductor has unstable electrical characteristics. There may be cases where this occurs.

[0202] Therefore, in order to stabilize the electrical characteristics of a transistor, the impurity concentration in the oxide semiconductor In order to reduce the impurity concentration in the oxide semiconductor, It is preferable to reduce the impurity concentration in the adjacent film. These include alkali metals, alkaline earth metals, iron, nickel, silicon, etc.

[0203] <Impurities> Here, the influence of each impurity in an oxide semiconductor will be described.

[0204] When an oxide semiconductor contains silicon or carbon, which is one of the Group 14 elements, Defect states are formed in the oxide semiconductor. The concentration of silicon and carbon in the region near the interface with the channel formation region of the oxide semiconductor The concentration of silicon or carbon in the The concentration obtained by ion mass spectrometry was 2×10 18 atoms / cm 3 Less than or equal to 2×10 17 atoms / cm 3 The following applies.

[0205] In addition, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect level is formed. Therefore, when alkali metals or alkaline earth metals are included, Transistors using oxide semiconductors, which are widely used in semiconductor manufacturing, tend to be normally on. Therefore, the alkali metal or alkali metal in the channel formation region of the oxide semiconductor obtained by SIMS The concentration of alkaline earth metals is increased by 1×10 18 atoms / cm 3 Less than or equal to 2×10 1 6 atoms / cm 3 To the following:

[0206] In addition, when nitrogen is contained in an oxide semiconductor, electrons that serve as carriers are generated, and As a result, the nitrogen-containing oxide semiconductor is easily converted to n-type. The transistor used for the oxide semiconductor tends to be normally on. In addition, when nitrogen is contained, trap states may be formed. Therefore, the electrical properties of the oxide semiconductor obtained by SIMS may become unstable. The nitrogen concentration in the channel formation region is set to 5×10 19 atoms / cm 3 Less than, preferably 5×10 18 atoms / cm 3 Less than or equal to 1×10 18 atoms / cm 3 Less than 5×10, more preferably 17 atoms / cm 3 To the following:

[0207] In addition, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the carrier, In some cases, hydrogen atoms are formed by bonding with oxygen atoms that bond with metal atoms. Therefore, it is necessary to use an oxide semiconductor that contains hydrogen. Therefore, the transistors that use the oxide semiconductor tend to be normally-on. It is preferable that the hydrogen in the hole formation region is reduced as much as possible. In the channel formation region of the oxide semiconductor, the hydrogen concentration obtained by SIMS is 1×1 0 20 atoms / cm 3 Less than 5 x 10 19 atoms / cm 3 Less than, More than Preferably 1 x 10 19 atoms / cm 3less than 5×10 18 ato ms / cm 3 less than 1×10 18 atoms / cm 3 Make it less than.

[0208] By using an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor, This makes it possible to impart stable electrical characteristics.

[0209] <<Other semiconductor materials>> The semiconductor materials that can be used for the oxide 230 are not limited to the above-mentioned metal oxides. As the compound 230, a semiconductor material having a band gap (a semiconductor that is not a zero-gap semiconductor) is used. For example, semiconductors of single elements such as silicon, gallium arsenide, etc. Compound semiconductors and layered materials (also called atomic layer materials, two-dimensional materials, etc.) that function as semiconductors It is preferable to use a layered material that functions as a semiconductor. is preferably used for the semiconductor material.

[0210] In this specification, the term "layered material" refers to a group of materials having a layered crystal structure. The layered crystal structure is a structure in which layers formed by covalent or ionic bonds are They are stacked through bonds that are weaker than covalent or ionic bonds, such as Lewars forces. Layered materials have high electrical conductivity within the unit layer, that is, two-dimensional electrical conduction. The material functions as a semiconductor and has high two-dimensional electrical conductivity in the channel formation region. By using the same for the above, a transistor with large on-state current can be provided.

[0211] Layered materials include graphene, silicene, and chalcogenides. is a compound that contains chalcogen. Chalcogen is also a general term for elements in group 16. These include oxygen, sulfur, selenium, tellurium, polonium, and livermorium. Examples of chalcogenides include transition metal chalcogenides and group 13 chalcogenides. .

[0212] The oxide 230 may be, for example, a transition metal chalcogenide that functions as a semiconductor. Specific examples of transition metal chalcogenides that can be used as the oxide 230 include: The following are molybdenum sulfide (typically MoS2) and molybdenum selenide (typically MoS e2), molybdenum telluride (typically MoTe2), tungsten sulfide (typically W S2), tungsten selenide (typically WSe2), tungsten telluride (typically is WTe2), hafnium sulfide (typically HfS2), hafnium selenide (typically HfSe2), zirconium sulfide (represented by ZrS2), zirconium selenide (represented by Representative examples include ZrSe2).

[0213] <Method for manufacturing semiconductor device> Next, a manufacturing method of a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. The following will explain this with reference to FIGS. 8(A) to 19(D).

[0214] (A) of each figure shows a top view. Also, (B) of each figure shows the A1-A 2 is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. 2, taken along a channel length direction of the transistor 200. Also, (C) of each figure is a cross-sectional view of the A3-A4 dashed line shown in (A) of each figure. 1 is a cross-sectional view corresponding to the portion, and is also a cross-sectional view in the channel width direction of transistor 200. Also, (D) of each figure is a cross-sectional view of the portion indicated by the dashed line A5-A6 in (A) of each figure. In addition, in the top view of each figure (A), some elements have been omitted to make the figure clearer.

[0215] In the following, an insulating material for forming an insulator and a conductive material for forming a conductor are The semiconductor materials used to form semiconductors are deposited by sputtering, CVD, MBE, etc. The film can be formed by appropriately using a deposition method, a PLD method, an ALD method, or the like.

[0216] The sputtering method uses RF sputtering, which uses a high-frequency power source as the sputtering power source. the ring method, the DC sputtering method using a direct current power source, and the method using a pulsed current applied to the electrode. There is a pulsed DC sputtering method that changes the pressure. RF sputtering is mainly used for insulating films. The DC sputtering method is mainly used to deposit conductive metal films. In addition, the pulsed DC sputtering method is mainly used to deposit oxides, nitrides, carbides, etc. It is used when depositing a compound film using the reactive sputtering method.

[0217] The CVD method is divided into two types: plasma CVD (PECVD), which uses plasma, and heat CVD, which uses heat. Thermal CVD (TCVD) is a method that uses a thin film of silicon, while Photo CVD (Photo CVD) is a method that uses light. Furthermore, depending on the source gas used, it can be classified into metal CVD (MCVD) and other methods. :Metal CVD) method, metal organic CVD (MOCVD) method These methods can be divided into two categories:

[0218] The plasma CVD method can produce high-quality films at relatively low temperatures. This is a film formation method that can reduce plasma damage to the workpiece because it does not use a plasma. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device ) may become charged up by receiving an electric charge from the plasma. When accumulated electric charges destroy wiring, electrodes, elements, etc., contained in a semiconductor device. On the other hand, in the case of thermal CVD, which does not use plasma, such plasma damage occurs. Since the thermal CVD method does not require any heat treatment, the yield of the semiconductor device can be increased. Since no plasma damage occurs in the film, a film with few defects can be obtained.

[0219] In addition, the ALD method uses only thermal energy to react with the precursor and reactant. Thermal ALD method, which uses plasma-excited reactants The EALD method, for example, can be used.

[0220] The CVD and ALD methods use sputtering, which is the process in which particles emitted from a target are deposited. Therefore, it is less affected by the shape of the workpiece and has good step coverage. In particular, the ALD method has excellent step coverage and excellent thickness uniformity. Therefore, it is suitable for covering the surface of an opening with a high aspect ratio. However, the ALD method has a relatively slow deposition rate, and therefore is faster than other deposition methods such as CVD, which have a faster deposition rate. In some cases, it may be preferable to use the method in combination with

[0221] In addition, the CVD method allows the deposition of a film of any composition by adjusting the flow rate ratio of the source gases. For example, in the CVD method, the flow rate ratio of the source gases can be changed while the film is being formed. By changing the flow rate ratio of the source gases, a film with a continuously changing composition can be formed. When forming a film from a single chamber, the time required for transportation or pressure adjustment is reduced compared to when forming a film using multiple film formation chambers. Therefore, the time required for film formation can be shortened. In some cases, the productivity of the device can be increased.

[0222] In addition, in the ALD method, different types of precursors are introduced simultaneously, or different types of precursors are introduced simultaneously. By controlling the number of cycles of several precursors, a film of any composition can be formed. It is possible.

[0223] First, a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate (FIG. 8( See FIGS. 8A to 8D. The insulator 212 is formed by a sputtering method. It is preferable to use a sputtering method that does not require the use of hydrogen-containing molecules in the deposition gas. By doing so, the hydrogen concentration in the insulator 212 can be reduced. The film is not limited to the sputtering method, but can be formed by CVD, MBE, PLD, AL, etc. Method D, etc. may also be used as appropriate.

[0224] In this embodiment, a silicon target is used as the insulator 212 in an atmosphere containing nitrogen gas. A silicon nitride film is formed by pulse DC sputtering using the above method. By using the ring method, generation of particles due to arcing on the target surface is suppressed. This allows for a more uniform film thickness distribution. By using high-frequency voltage, the rise and fall of the discharge can be made steeper. This allows power to be supplied to the electrodes more efficiently, improving the sputtering rate and film quality. It is possible.

[0225] By using an insulator like silicon nitride that is difficult for impurities such as water and hydrogen to penetrate, In addition, the diffusion of impurities such as water and hydrogen contained in the layer below the insulator 212 can be suppressed. In addition, the insulator 212 is made of an insulator that is difficult for copper to penetrate, such as silicon nitride. Therefore, a metal that easily diffuses, such as copper, is used for the conductor in the layer (not shown) below the insulator 212. Even if the metal is present, it is possible to suppress the metal from diffusing upward through the insulator 212.

[0226] Next, the insulator 214 is deposited over the insulator 212 (see FIGS. 8(A) to 8(D)). The insulator 214 is preferably formed by sputtering. By using a sputtering method that does not require the use of molecules containing hydrogen, the water in the insulator 214 can be However, the deposition of the insulator 214 is not limited to the sputtering method. However, a CVD method, an MBE method, a PLD method, an ALD method, or the like may be used as appropriate. .

[0227] In this embodiment, the insulator 214 is an aluminum target in an atmosphere containing oxygen gas. Using a sputter, an aluminum oxide film is formed by pulse DC sputtering. By using the sputtering method, the film thickness distribution is made more uniform, and the sputtering rate and film thickness are Here, RF (Radio Frequency) power is applied to the board. Depending on the magnitude of the RF power applied to the substrate, the layer below the insulator 214 may be The amount of oxygen injected into the target can be controlled. The RF power is 0 W / cm 2 That's it, part 1. 86W / cm 2 In other words, the RF power used to form the insulator 214 The amount of oxygen injected can be varied to suit the characteristics of the transistor. The amount of oxygen injected is suitable for improving the reliability of the capacitor. Hz or higher is preferable. Typically, it is 13.56MHz. The higher the RF frequency, the better the base frequency. This can reduce damage to the plate.

[0228] As the insulator 214, an amorphous structure having high hydrogen capture and hydrogen fixation functions It is preferable to use a metal oxide having an insulating property, for example, aluminum oxide. The hydrogen contained in the oxide 230 is captured or fixed, and the hydrogen is diffused into the oxide 230. In particular, the insulator 214 is made of aluminum oxide having an amorphous structure. By using aluminum oxide with amorphous structure, hydrogen can be absorbed more effectively. This is preferred because it may be possible to capture or fix the In this way, a highly functional transistor 200 and a semiconductor device can be manufactured.

[0229] Next, the insulator 216 is deposited on the insulator 214. The deposition of the insulator 216 is carried out by sputtering. It is preferable to use a spalling method, which does not require the use of hydrogen-containing molecules in the deposition gas. By using the threshing method, the hydrogen concentration in the insulator 216 can be reduced. The deposition of the insulator 216 is not limited to the sputtering method, but may be performed by a CVD method, an MB method, or the like. The E method, the PLD method, the ALD method, etc. may be used as appropriate.

[0230] In this embodiment, a silicon target is used as the insulator 216 in an atmosphere containing oxygen gas. A silicon oxide film is formed by pulse DC sputtering using the above method. By using the ring method, the film thickness distribution is made more uniform, and the sputtering rate and film quality are improved. It is possible.

[0231] The insulators 212, 214, and 216 are continuous and not exposed to the atmosphere. For example, a multi-chamber type film forming apparatus may be used. This reduces hydrogen in the insulators 212, 214, and 216. Furthermore, the incorporation of hydrogen into the film between each film formation step can be reduced. .

[0232] Next, an opening is formed in the insulator 216 so as to reach the insulator 214. The opening may be, for example, a groove or This also includes slits. The area where an opening is formed may also be referred to as an opening. The openings may be formed by wet etching, but it is more preferable to use dry etching. Insulator 214 is preferably formed by etching insulator 216. It is preferable to select an insulator that functions as an etching stopper film when etching. For example, In the case where silicon oxide or silicon oxynitride is used for the insulator 216 forming the groove, the insulating The insulator 214 may be made of silicon nitride, aluminum oxide, or hafnium oxide.

[0233] The dry etching equipment is a capacitively coupled plasma (CCP) device with parallel plate electrodes. : Capacitively Coupled Plasma (CAP) etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency voltage may be applied to one of the parallel plate type electrodes. A configuration in which a plurality of different high-frequency voltages are applied to the electrodes may be used. Alternatively, a high-frequency voltage of the same frequency may be applied to each of the parallel plate electrodes. Alternatively, a high-density plasma source may be provided. A dry etching apparatus having a high density plasma source can be used. The plasma processing device is, for example, an inductively coupled plasma (ICP) type. A plasma etching apparatus or the like can be used.

[0234] After the opening is formed, a conductive film that becomes the conductor 205a is formed. The film preferably contains a conductor having a function of suppressing oxygen permeation. For example, nitride tungsten nitride, titanium nitride, etc. can be used. Conductors that suppress the absorption of tantalum, tungsten, titanium, molybdenum, and aluminum The conductor 20 may be a laminated film of aluminum, copper, or a molybdenum-tungsten alloy. The conductive film 5a is formed by sputtering, CVD, MBE, PLD, or ALD. This can be done using the method.

[0235] In this embodiment, a titanium nitride film is formed as the conductive film that becomes the conductor 205a. By using such a metal nitride as the lower layer of the conductor 205b, the insulator 216 and the like can be used. In this way, the conductor 205b can be prevented from being oxidized. Even if a metal that easily diffuses, such as copper, is used, the metal is prevented from diffusing out of the conductor 205a. It can be prevented.

[0236] Next, a conductive film that becomes the conductor 205b is formed. , Tantalum, Tungsten, Titanium, Molybdenum, Aluminum, Copper, Molybdenum Tungsten The conductive film can be formed by plating or sputtering. The deposition method can be performed by using a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, a tungsten film is formed as the conductive film that becomes the conductor 205b.

[0237] Next, a CMP process is performed to form a conductive film that will become the conductor 205a and a conductive film that will become the conductor 205b. Then, a part of the conductive film is removed to expose the insulator 216 (see FIGS. 8A to 8D). As a result, the conductor 205a and the conductor 205b remain only in the opening. The CMP process may remove portions of the insulator 216 .

[0238] Next, the insulator 222 is formed on the insulator 216 and the conductor 205 (FIG. 9(A)). (See FIG. 9(D).) The insulator 222 is made of either aluminum or hafnium. In this case, it is preferable to form an insulator containing oxides of both aluminum and hafnium. Insulators containing one or both oxides include aluminum oxide, hafnium oxide, and aluminum Hafnium and oxides containing hafnium (hafnium aluminate) can be used. It is preferable to use hafnium zirconium oxide. Insulators containing oxides of tungsten and / or hafnium are highly resistant to oxygen, hydrogen, and water. The insulator 222 has a barrier property against hydrogen and water. The hydrogen and water contained in the structure provided around the transistor 200 are insulated 222 to the inside of the transistor 200, and the oxide 230 in The generation of oxygen vacancies can be suppressed.

[0239] The insulator 222 is formed by sputtering, CVD, MBE, PLD, or ALD. In this embodiment, the insulator 222 is formed by the ALD method. A hafnium oxide film is then formed.

[0240] Subsequently, it is preferable to carry out a heat treatment. The heat treatment is preferably carried out at a temperature of 250° C. or more and 650° C. or less. The temperature is preferably 300° C. or higher and 500° C. or lower, and more preferably 320° C. or higher and 450° C. or lower. The heat treatment is carried out in an atmosphere of nitrogen gas or an inert gas, or in an atmosphere of an oxidizing gas for 10 min. ppm or more, 1% or more, or 10% or more. For example, nitrogen gas and oxygen When performing heat treatment in a mixed gas atmosphere, oxygen gas should be about 20%. The heat treatment may be carried out under reduced pressure or in an atmosphere of nitrogen gas or an inert gas. After heat treatment in an atmosphere, oxidizing gas is added at 10 ppm or more and 1 % or more, or 10% or more.

[0241] In addition, it is preferable that the gas used in the heat treatment is highly purified. The moisture content of the gas used in the heat treatment is 1 ppb or less, preferably 0.1 ppb or less. The concentration of the purified gas is preferably 0.05 ppb or less. By carrying out this treatment, it is possible to prevent moisture and the like from being taken into the insulator 222 as much as possible. can.

[0242] In this embodiment, the heat treatment is performed by annealing the insulator 222 with a mixture of nitrogen gas and oxygen gas. The flow rate ratio is 4slm:1slm, and the treatment is carried out at 400°C for 1 hour. By this process, impurities such as water and hydrogen contained in the insulator 222 can be removed. In addition, when an oxide containing hafnium is used as the insulator 222, the heat treatment In addition, the heat treatment may cause a part of the insulator 224 to crystallize. It can also be performed at a timing such as after the film is formed.

[0243] Next, an insulating film 224A is formed over the insulator 222 (see FIGS. 9A to 9D). The insulating film 224A can be formed by sputtering, CVD, MBE, PLD, or AL. In this embodiment, the insulating film 224A is formed by sputtering. The deposition gas does not contain hydrogen molecules. By using a sputtering method, which is more preferable, the hydrogen concentration in the insulating film 224A can be reduced. Since the insulating film 224A will be in contact with the oxide 230a in a later step, It is preferable that the degree of the light is reduced.

[0244] Next, an oxide film 230A and an oxide film 230B are formed in this order on the insulating film 224A (FIG. 9( 9(A) to 9(D). The oxide film 230A and the oxide film 230B are formed in an air environment. It is preferable to form the film continuously without exposing it to the atmosphere. 230A and the oxide film 230B are prevented from being contaminated by impurities or moisture from the atmospheric environment. This can prevent the oxide film 230A from being damaged, and the vicinity of the interface between the oxide film 230A and the oxide film 230B can be kept clean. do.

[0245] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MBE, etc. The oxide film 230A and the oxide film 230B can be formed by a deposition method, a PLD method, an ALD method, or the like. The deposition of 30B is achieved by using the ALD method, which allows for high aspect ratio trenches or openings. This is preferable because a film with a uniform thickness can be formed even if the PEALD method is used. By using the above-mentioned method, the oxide film 230A and the oxide film 230B can be formed at a lower temperature than in the thermal ALD method. In this embodiment, the oxide film 230A and the oxide film 230B are preferably The film is formed by sputtering.

[0246] For example, the oxide film 230A and the oxide film 230B are formed by a sputtering method. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the oxide film to be formed is reduced. In addition, when the oxide film is formed by sputtering, In the present invention, the above-mentioned In-M-Zn oxide target or the like can be used.

[0247] In particular, when the oxide film 230A is formed, a part of the oxygen contained in the sputtering gas becomes an insulator. Therefore, the oxygen contained in the sputtering gas may be The ratio is 70% or more, preferably 80% or more, and more preferably 100%.

[0248] In addition, when the oxide film 230B is formed by a sputtering method, the oxide film 230B is formed by sputtering. The ratio of oxygen to be added is set to more than 30% and not more than 100%, preferably 70% or more and not more than 100%. When the oxide semiconductor is formed in the above-mentioned manner, an oxygen-excess oxide semiconductor is formed. The transistor used in the channel formation region has relatively high reliability. In one embodiment, the oxide film 230B is formed by a sputtering method. The ratio of oxygen contained in the sputtering gas is 1% or more and 30% or less, preferably 5% or more and 20% or less. When the concentration is 0% or less, an oxygen-deficient oxide semiconductor is formed. Transistors that use semiconductors in the channel formation region have a relatively high field effect mobility. In addition, by forming the film while heating the substrate, the crystallinity of the oxide film is improved. It is possible to do so.

[0249] In this embodiment, the oxide film 230A is formed by sputtering In:Ga: The film is formed using an oxide target with an atomic ratio of Zn=1:3:4. 0B is prepared by sputtering In:Ga:Zn=4:2:4.1 [atomic ratio] ] oxide target, In:Ga:Zn=1:1:1 [atomic ratio] oxide target Alternatively, the film is formed using an oxide target with an atomic ratio of In:Ga:Zn=1:1:2. By appropriately selecting the film formation conditions and atomic ratio of each oxide film, a and oxide 230b may be formed in accordance with the desired characteristics.

[0250] In addition, the insulating film 224A, the oxide film 230A, and the oxide film 230B are exposed to the atmosphere. It is preferable to form the film by a sputtering method rather than a multi-chamber method. A film forming apparatus may be used. This allows the insulating film 224A, the oxide film 230A, and the oxide film For 230B, it is possible to reduce hydrogen contamination in the film between each film formation process. .

[0251] Next, it is preferable to carry out a heat treatment. The temperature of the heat treatment is, for example, about 500° C. It is preferable to set the heating temperature of the substrate to 500° C. and perform the heating before the temperature reaches 500° C., for example. For example, when heated to about 400° C., the oxide film 230A, the oxide film 230B and the insulating film 224 Hydrogen in the oxide film 230A is transferred to and absorbed in the insulator 222. It can also be said that hydrogen in the oxide film 230B and the insulating film 224A diffuses into the insulator 222.

[0252] When the heating temperature of the substrate exceeds 400° C. and reaches 500° C., the hydrogen in the insulator 222 In other words, hydrogen in the insulator 222 is absorbed into the insulator 214. It can also be said that it spreads to 4.

[0253] That is, the hydrogen contained in the oxide film 230A, the oxide film 230B, and the insulating film 224A is By the heat treatment, the oxide film 230A, the oxide film 230B, and the insulating film 224A are The hydrogen migrates or diffuses away from the oxide layer. Since it can be used as a channel formation region of a transistor, the reliability of the transistor is improved. This is preferable because it increases the

[0254] The heat treatment is carried out in an atmosphere of nitrogen gas or an inert gas, or in an atmosphere of oxidizing gas at 10 ppm. For example, nitrogen gas and oxygen gas are used in an atmosphere containing more than pm, 1% or more, or 10% or more. When performing heat treatment in a mixed atmosphere of oxygen and nitrogen, the oxygen gas content should be about 20%. The treatment may be carried out under reduced pressure, or the heat treatment may be carried out under a nitrogen or inert gas atmosphere. After heat treatment in an atmosphere, oxidizing gas is added at 10 ppm or more and 1% to replenish the oxygen that has been removed. The heat treatment may be carried out in an atmosphere containing 10% or more of SiO 2 .

[0255] In addition, it is preferable that the gas used in the heat treatment is highly purified. The moisture content of the gas used in the heat treatment is 1 ppb or less, preferably 0.1 ppb or less. The concentration of the purified gas is preferably 0.05 ppb or less. By performing the treatment, moisture and the like are taken into the oxide film 230A and the oxide film 230B. This can be prevented as much as possible.

[0256] Next, a conductive film 242A is formed on the oxide film 230B (see FIGS. 9A to 9D). The conductive film 242A is formed by sputtering, CVD, MBE, PLD, or AL. For example, the conductive film 242A can be formed by sputtering. Before the conductive film 242A is formed, a heat treatment is performed. The heat treatment may be carried out under reduced pressure and without exposure to the atmosphere. By carrying out such a process, the surface of the oxide film 230B may be formed. The moisture and hydrogen adsorbed on the surface are removed, and the oxide film 230A and the oxide film 230 The water and hydrogen concentrations in B can be reduced. The heat treatment temperature is 100°C. The temperature for the heat treatment is preferably 200° C. or more and 400° C. or less in this embodiment mode.

[0257] Next, an insulating film 271A is formed on the conductive film 242A (see FIGS. 9A to 9D). The insulating film 271A can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or the like. The insulating film 271A has a function of suppressing oxygen permeation. For example, the insulating film 271A may be a sputtering insulating film. A film of aluminum oxide or silicon nitride may be formed by a coating method.

[0258] The conductive film 242A and the insulating film 271A are formed by sputtering without being exposed to the atmosphere. It is preferable to form the film by the ring method. For example, a multi-chamber film forming apparatus is used. This can reduce hydrogen in the conductive film 242A and the insulating film 271A. Furthermore, it is possible to reduce the inclusion of hydrogen in the film between each film formation step. In addition, when a hard mask is provided on the insulating film 271A, the film that becomes the hard mask is also exposed to the atmosphere. The films may be formed continuously without being exposed to heat.

[0259] Next, the insulating film 224A, the oxide film 230A, and the oxide film 230B are formed by lithography. , the conductive film 242A, and the insulating film 271A are processed into an island shape, and the insulator 224, the oxide 23 0a, oxide 230b, conductive layer 242B, and insulating layer 271B are formed (FIG. 10(A) 10(D). Here, the insulator 224, the oxide 230a, and the oxide 230b are , the conductive layer 242B and the insulating layer 271B are arranged so as to at least partially overlap the conductor 205. The above processing can be performed by using a dry etching method or a wet etching method. Dry etching is suitable for fine processing. A, the oxide film 230A, the oxide film 230B, the conductive film 242A, and the insulating film 271A are processed. Each may be processed under different conditions.

[0260] In the lithography method, first, the resist is exposed through a mask. The resist mask is formed by removing or leaving the resist-removed area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, etc. For example, KrF excimer laser light, ArF excimer laser light, etc. can be used to process the material into the desired shape. Laser beams such as sigma laser and EUV (Extreme Ultraviolet) light are used. A resist mask can be formed by exposing the resist to light. A liquid immersion technique may be used in which the gap is filled with liquid (e.g., water) and the exposure is performed. Alternatively, an electron beam or an ion beam may be used. When a ion beam is used, the mask is not required. Such as dry etching, wet etching, dry etching, etc. After the treatment, wet etching is performed, or after the wet etching, dry etching is performed. This can be removed by performing a chipping process.

[0261] Furthermore, a hard mask made of an insulating material or a conductive material may be used under the resist mask. When a hard mask is used, an insulating film or a thin film that is a hard mask material is formed on the conductive film 242A. In the first embodiment, a conductive film is formed, a resist mask is formed thereon, and a hard mask material is etched. By doing so, a hard mask having a desired shape can be formed. Chipping can be done after removing the resist mask or with the resist mask left on. In the latter case, the resist mask may disappear during etching. After etching the film 242A, the hard mask may be removed by etching. If the hard mask material does not affect the post-process or can be used in the post-process, In this embodiment, the insulating layer 271B is a hard mask. It is used as a ku.

[0262] Here, since the insulating layer 271B functions as a mask for the conductive layer 242B, As shown in FIG. 10D, the conductive layer 242B does not have a curved surface between the side surface and the top surface. As a result, the conductors 242a and 242b shown in FIGS. 2(B) and 2(D) The end where the side surface and the top surface of the conductor 242 intersect is angular. As a result, the cross-sectional area of ​​the conductor 242 is larger than when the end portion has a curved surface. This reduces the resistance of the conductor 242, thereby reducing the on-current of the transistor 200. can be made larger.

[0263] As shown in FIG. 10B to FIG. 10D, the insulator 224, the oxide 230a, The oxide 230b, the conductive layer 242B, and the insulating layer 271B have tapered cross sections. In this specification and the like, a tapered shape refers to a shape in which at least one of the side surfaces of the structure is tapered. This refers to a shape in which the part is inclined with respect to the substrate surface. For example, The angle between the substrate and the surface of the substrate (hereinafter sometimes referred to as the taper angle) is less than 90°. The insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulator The edge layer 271B may have a taper angle of, for example, 60° or more and less than 90°. By forming the cross section in a tapered shape in this way, the insulator 275 Thus, defects such as voids can be reduced.

[0264] However, the above is not limited to the above, and the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 2 42B and the side of the insulating layer 271B are substantially perpendicular to the upper surface of the insulator 222. By adopting such a configuration, when providing a plurality of transistors 200, This makes it possible to reduce the area and increase density.

[0265] In addition, by-products generated in the etching process include the insulator 224, the oxide 230a, and the acid. In some cases, the oxide 230b, the conductive layer 242B, and the insulating layer 271B are formed in layers on their side surfaces. In this case, the layered by-products are the insulator 224, the oxide 230a, and the oxide 230b. b, the conductive layer 242B, and the insulating layer 271B are formed between the insulator 275. Therefore, the layer of by-product formed on the upper surface of the insulator 222 can be removed. is preferred.

[0266] Next, the insulator 224, the oxide 230a, the oxide 230b, the conductive layer 242B, and the insulating An insulator 275 is deposited to cover the layer 271B (see FIGS. 11(A) to 11(D)). Here, the insulator 275 is in close contact with the top surface of the insulator 222 and the side surface of the insulator 224. The insulator 275 is preferably formed by a sputtering method, a CVD method, an MBE method, or a PLD method. The insulator 275 has a function of suppressing oxygen permeation. For example, the insulator 275 may be a sputtering insulating film. The aluminum oxide film is then deposited by the PEALD method. By forming the insulator 275 in such a layered structure, insulators such as water and hydrogen can be prevented from being damaged. The ability to inhibit diffusion of purity and oxygen may be improved.

[0267] In this manner, the oxide 230a, the oxide 230b, and the conductive layer 242B are oxidized with oxygen. It can be covered with an insulator 275 and an insulating layer 271B, which has the function of suppressing diffusion. This allows the insulator 224, the oxide 230a, the oxide 230b, and It is possible to reduce the direct diffusion of oxygen from the insulator 280 to the conductive layer 242B. .

[0268] Next, an insulating film that will become the insulator 280 is formed on the insulator 275. The insulating film is formed as follows: This can be done using methods such as sputtering, CVD, MBE, PLD, and ALD. For example, a silicon oxide film can be formed as the insulating film by using a sputtering method. An insulating film to be the insulator 280 is formed by a sputtering method in an atmosphere containing oxygen. By this, the insulator 280 containing excess oxygen can be formed. By using a sputtering method that does not require the use of molecules containing hydrogen, the water in the insulator 280 The concentration of oxygen can be reduced. Note that a heat treatment may be performed before the insulating film is formed. The heat treatment is performed under reduced pressure, and the insulating film is continuously formed without exposure to the atmosphere. By carrying out such a treatment, water adsorbed on the surface of the insulator 275 can be removed. The oxide 230a, the oxide 230b, and the insulator 224 are then removed. The heat treatment can reduce the moisture concentration and hydrogen concentration in the above-mentioned heating process. Processing conditions can be used.

[0269] Next, the insulating film that will become the insulator 280 is subjected to CMP processing to obtain the insulator 280 having a flat upper surface. (See FIG. 11A to FIG. 11D). Note that, for example, Then, a silicon nitride film is formed by a sputtering method, and the silicon nitride is caused to reach the insulator 280. The CMP process may be performed until the above-mentioned.

[0270] Next, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and the conductive layer 24 A part of conductor 2B is processed to form an opening that reaches oxide 230b. It is preferable that the opening is formed so as to overlap with the insulator 271a. 12A, the insulator 271b, the conductor 242a, and the conductor 242b are formed. See Figure 12(D). ).

[0271] Here, as shown in FIG. 12(B) and FIG. 12(C), the insulator 280, the insulator 275 In some cases, the side surfaces of the insulator 271 and the conductor 242 may be tapered. The taper angle of the edge 280 may be greater than the taper angle of the conductor 242. Although not shown in FIGS. 12A to 12C, when the opening is formed, oxidation is performed. The top portion of object 230b may be removed.

[0272] In addition, a part of the insulator 280, a part of the insulator 275, a part of the insulating layer 271B, and the conductive The layer 242B is partially processed by dry etching or wet etching. Dry etching is suitable for microfabrication. For example, a part of the insulator 280 may be dry etched. Then, a part of the insulator 275 and a part of the insulating layer 271B are processed by wet etching. Alternatively, the conductive layer 242B may be processed by a bonding method and a part of the conductive layer 242B may be processed by a dry etching method.

[0273] Here, the side of the oxide 230a, the top and side of the oxide 230b, and the side of the conductor 242 The adhesion of impurities to the surface of the insulating material 280, the side surface of the insulating material 280, etc., or the diffusion of the impurities into these surfaces A step of removing such impurities may be carried out. Etching can result in damaged areas on the surface of oxide 230b. The impurities may be removed from the insulator 280, the insulator 275, the insulating layer 271B, etc. and a component contained in the conductive layer 242B; and an apparatus used in forming the opening. Components contained in the materials used in the product, and components contained in the gas or liquid used in etching Examples of impurities include hafnium, aluminum, etc. These include nium, silicon, tantalum, fluorine, and chlorine.

[0274] In particular, impurities such as aluminum or silicon may cause the oxide 230b to be depleted from the CAAC-O Therefore, aluminum or silicon, which inhibits CAAC-OS formation, It is preferable that the impurity elements that are harmful to the oxide 230 are reduced or removed. The concentration of aluminum atoms in and around b should be 5.0 atomic % or less. Preferably, the content is 2.0 atomic % or less, more preferably 1.5 atomic % or less, and more preferably 1.0 atomic % or less. More preferably, it is less than 0.3 atomic %.

[0275] In addition, impurities such as aluminum and silicon inhibit the formation of CAAC-OS. , pseudo-amorphous oxide semiconductor (a-like OS) The region of the metal oxide that has become a non-CAAC region is called the non-CAAC region. In the non-CAAC region, the crystal structure is less dense, so V O H Therefore, the oxide 230 is formed in a large amount, and the transistor tends to be normally on. It is preferred that the non-CAACylated region of b is reduced or eliminated.

[0276] In contrast, it is preferable that the oxide 230b has a layered CAAC structure. In addition, it is preferable that the oxide 230b has a CAAC structure up to the bottom end of the drain. In the transistor 200, the conductor 242a or the conductor 242b and its neighboring That is, the area near the bottom end of the conductor 242a (conductor 242b) functions as a drain. It is preferable that the oxide 230b has a CAAC structure. The damaged area of ​​oxide 230b is removed even at the drain edge, which significantly affects the CA By having an AC structure, it is possible to further suppress fluctuations in the electrical characteristics of the transistor 200. In addition, the reliability of the transistor 200 can be improved.

[0277] In order to remove impurities that have adhered to the surface of the oxide 230b during the above etching process, The cleaning method is wet cleaning (wet etching) using a cleaning solution. (It can also be called "treatment"), plasma treatment using plasma, cleaning by heat treatment, etc. The above cleaning steps may be combined as appropriate. The part may be deep.

[0278] For wet cleaning, ammonia water, oxalic acid, phosphoric acid, hydrofluoric acid, etc. are mixed with carbonated water. Alternatively, the cleaning treatment may be carried out using an aqueous solution diluted with pure water, pure water, carbonated water, or the like. Alternatively, ultrasonic cleaning may be performed using an aqueous solution of these, pure water, or carbonated water. These cleaning methods may be combined as appropriate.

[0279] In this specification, an aqueous solution of hydrofluoric acid diluted with pure water is called diluted hydrofluoric acid. In addition, an aqueous solution of ammonia diluted with pure water is sometimes called diluted ammonia water. The concentration and temperature of the aqueous solution depend on the impurities to be removed and the structure of the semiconductor device to be cleaned. Therefore, it is advisable to adjust the ammonia concentration appropriately. The concentration of dilute hydrofluoric acid is preferably 0.1% or more and 0.5% or less. The hydrogen fluoride concentration is 0.01 ppm or more and 100 ppm or less, preferably 0.1 ppm or more and 10 It is sufficient to keep it below ppm.

[0280] For ultrasonic cleaning, a frequency of 200 kHz or more, preferably 900 kHz or more, should be used. By using this frequency, damage to the oxide 230b, etc. can be reduced. It can be reduced.

[0281] The above cleaning process may be carried out multiple times, and the cleaning solution may be changed for each cleaning process. For example, the first cleaning process may be a process using diluted hydrofluoric acid or diluted aqueous ammonia. A first cleaning treatment may be performed, and a second cleaning treatment may be performed using pure water or carbonated water.

[0282] In the present embodiment, the cleaning process is performed by wet cleaning using diluted ammonia water. By carrying out the cleaning process, the oxide 230a, the oxide 230b, etc., are removed by removing the oxide particles. In addition, the oxide 230b can be made more crystalline by removing impurities diffused therein. It can be done.

[0283] After the etching or cleaning, a heat treatment may be performed. The heating temperature may be from 350° C. to 400° C., preferably from 350° C. to 400° C. The atmosphere is nitrogen gas or inert gas, or oxidizing gas is 10 ppm or more, 1% For example, heat treatment should be performed in an oxygen atmosphere. This is preferable. Oxygen is supplied to the oxide 230a and the oxide 230b, Missing V O In addition, by performing such a heat treatment, the oxide 23 The crystallinity of 0b can be improved. The heat treatment may be performed under reduced pressure. Or, after heat treatment in an oxygen atmosphere, heat treatment is continued in a nitrogen atmosphere without exposure to the air. may be carried out.

[0284] Next, the insulating film 252A is formed (see FIGS. 13(A) to 13(D)). 2A is formed using methods such as sputtering, CVD, MBE, PLD, and ALD. It is preferable that the insulating film 252A is formed by using the ALD method. Therefore, it is preferable to form the insulating film 252A with a small thickness, so that the variation in the thickness is small. In contrast, the ALD method requires the use of a precursor and a reactant (e.g. This is a method of forming a film by alternately introducing a gas such as an oxidizing agent, and the number of times this cycle is repeated determines the This allows for precise film thickness control. As shown in FIG. 13B and FIG. 13C, the insulating film 252A is formed of an insulator 280 or the like. It is necessary to form a film with good coverage on the bottom and side surfaces of the opening to be formed. It is preferable that the upper and side surfaces of the conductive body 241 and the side surfaces of the conductive body 242 are coated with a film having good coverage. At the bottom and sides of the aperture, layers of atoms can be deposited one by one, resulting in an insulating The border film 252A can be formed with good coverage over the opening.

[0285] In addition, when the insulating film 252A is formed by the ALD method, ozone (O3), acid, etc. are used as an oxidizing agent. Ozone (O2), water (H2O), etc. can be used. Ozone (O3) does not contain hydrogen. By using oxygen (O2) as an oxidizing agent, hydrogen diffusion into the oxide 230b is reduced. It is possible.

[0286] In this embodiment, the insulating film 252A is formed by forming aluminum oxide by a thermal ALD method. do.

[0287] Next, it is preferable to perform microwave treatment in an atmosphere containing oxygen (FIGS. 13A to 13C). 13(D)). Here, microwave processing refers to, for example, the use of microwaves to heat high-density plastics. This refers to a process using a device with a power source that generates noise. Microwaves refer to electromagnetic waves with frequencies between 300 MHz and 300 GHz. This shall be done.

[0288] The dotted lines shown in Figs. 13(B) to 13(D) indicate high-frequency oxygen plasma such as microwaves and RF. Microwave treatment is a process that uses microwaves to It is preferable to use a microwave processing apparatus having a power source that generates high density plasma. Here, the frequency of the microwave processing device is 300 MHz or more and 300 GHz or less, preferably The frequency should be between 2.4GHz and 2.5GHz, for example, 2.45GHz. By using plasma, high density oxygen radicals can be generated. The power of the power source that applies microwaves to the microwave processing device is 1000W or more and 10000W or less. Preferably, the power is 2000 W or more and 5000 W or less. A power source for applying RF to the substrate side may be provided. Also, by applying RF to the substrate side, The oxygen ions generated by the plasma can be efficiently guided into the oxide 230b. Cut.

[0289] The microwave treatment is preferably carried out under reduced pressure, and the pressure is from 10 Pa to 1 The treatment temperature is preferably 300 Pa or more and 700 Pa or less. The temperature is 750° C. or less, preferably 500° C. or less, for example, about 400° C. After the oxygen plasma treatment, a heat treatment may be performed without exposing the substrate to the outside air. For example, the temperature is set to 100° C. or higher and 750° C. or lower, preferably 300° C. or higher and 500° C. or lower. stomach.

[0290] Moreover, for example, the microwave treatment may be performed using oxygen gas and argon gas. Here, the oxygen flow rate ratio (O2 / (O2+Ar)) is greater than 0% and can be up to 100%. Preferably, the oxygen flow ratio (O2 / (O2+Ar)) is greater than 0% and less than 50%. More preferably, the oxygen flow ratio (O2 / (O2+Ar)) should be 10% or less. More preferably, the oxygen flow rate ratio (O2 / (O2+Ar)) is 40% or less. In this way, the amount of oxygen in the microwave oven should be 10% or more and 30% or less. By carrying out the treatment, the carrier concentration in the region 230bc can be reduced. By preventing excessive amounts of oxygen from being introduced into the chamber during microwave processing Therefore, it is possible to prevent the carrier concentration in the regions 230ba and 230bb from being excessively decreased. can.

[0291] As shown in FIG. 13B to FIG. 13D, the microwave treatment is performed in an atmosphere containing oxygen. By using microwaves or high frequencies such as RF, oxygen gas is turned into plasma, and the oxygen A plasma is applied to the region of oxide 230b between conductor 242a and conductor 242b. At this time, microwaves or high-frequency waves such as RF can be irradiated to the region 230bc. That is, the area 230bc shown in FIG. High frequency oxygen plasma, etc. can be used. By using the V in the area 230bc O Splitting H and removing hydrogen H from region 230bc That is, in the area 230bc, "V O H→H+V O " , V included in the area 230bc O Therefore, in the region 230bc, Oxygen vacancies in, and V O H can be reduced, lowering the carrier concentration. The oxygen vacancies formed in the region 230bc are filled with oxygen radicals generated by the oxygen plasma. By supplying oxygen contained in the insulator 250, the oxygen vacancy in the region 230bc is further reduced. and the carrier concentration can be reduced.

[0292] On the other hand, the conductor 242a is disposed on the region 230ba and the region 230bb shown in FIG. and a conductor 242b are provided. Here, the conductor 242 is heated in an atmosphere containing oxygen. When performing microwave processing, the action of microwaves, high frequency waves such as RF, oxygen plasma, etc. For this reason, the conductor 242 is preferably a shielding film that can withstand frequencies of 300 MHz or more. Ability to block electromagnetic waves of 300 GHz or less, for example, 2.4 GHz to 2.5 GHz It is preferred that the compound has the formula:

[0293] As shown in FIG. 13B to FIG. 13D, the conductor 242a and the conductor 242b , microwaves, or RF, etc., so these The effect does not extend to the regions 230ba and 230bb. In the area 230ba and the area 230bb, V O Reduction of H and excessive amounts of acid Since no element supply occurs, a decrease in carrier concentration can be prevented.

[0294] In addition, the conductive material 242a and the conductive material 242b are in contact with each other on their side surfaces to provide a barrier against oxygen. In this way, the conductor 2 is insulated by microwave processing. This can prevent an oxide film from being formed on the side surfaces of the conductive material 42a and the conductive material 242b.

[0295] In this manner, oxygen vacancies and V O H can be removed to make the region 230bc i-type or substantially i-type. The regions 230ba and 230bb function as source and drain regions. This suppresses the supply of unnecessary oxygen and maintains the n-type structure. The variation in the electrical characteristics of the transistor 200 is suppressed, and the electrical characteristics of the transistor 200 are prevented from varying within the substrate surface. It is possible to suppress adhesion.

[0296] In addition, in the microwave treatment, the electromagnetic interaction between the microwave and the molecules in the oxide 230b occurs. In some cases, the thermal energy is transferred directly to the oxide 230b. The oxide 230b may be heated by the gas. This is sometimes called annealing. By performing microwave processing in an atmosphere that contains oxygen, In some cases, the same effect as annealing can be obtained. In addition, when the oxide 230b contains hydrogen, In this case, the thermal energy is transferred to the hydrogen in the oxide 230b, and the activated hydrogen is It is believed that it is released from the oxide 230b.

[0297] Next, an insulating film 250A is formed (see FIGS. 14(A) to 14(D)). Before the film formation of A, a heat treatment may be performed. The heat treatment is performed under reduced pressure and exposed to the atmosphere. The insulating film 250A may be formed in succession without the above-mentioned heat treatment. By carrying out such a treatment, the insulating film 252A is The moisture and hydrogen adsorbed on the surface are removed, and the oxide 230a and the oxide The water concentration and hydrogen concentration in the SiO 230b can be reduced. The temperature is preferably 00°C or higher and 400°C or lower.

[0298] The insulating film 250A is formed by a sputtering method, a CVD method, a PECVD method, an MBE method, or a PLD method. The insulating film 250A can be formed by using an ALD method or the like. It is preferable to form the film by a film forming method using a gas in which the insulating layer is reduced or removed. The hydrogen concentration in the film 250A can be reduced. The insulating film 250A can be formed into a thin film in a later process. Since the oxide 230b faces the insulator 250a via the thick insulator 252, It is preferable that the hydrogen concentration is reduced to such an extent ...

[0299] In this embodiment, the insulating film 250A is formed of silicon oxynitride by the PECVD method. To film.

[0300] When the insulator 250 has a two-layer laminated structure as shown in FIG. 3B, the insulating film 250A After the formation of the insulating film, the insulating film that will become the insulator 250b may be formed. The deposition of the film is performed using methods such as sputtering, CVD, MBE, PLD, and ALD. The insulating film that becomes the insulator 250b has a function of suppressing the diffusion of oxygen. It is preferable to form the insulating material 250 by using such a structure. It is possible to suppress the diffusion of oxygen contained in a into the conductor 260. In addition, the amount of oxygen supplied to the insulator 230 can be prevented from decreasing. The oxidation of the conductor 260 due to oxygen can be suppressed. The film can be formed using a material similar to that of the insulator 222. For example, the insulator 250b The insulating film can be formed by depositing hafnium oxide using a thermal ALD method.

[0301] After the insulating film 250A is formed, a microwave treatment may be performed (see FIGS. 14(A) to 14(C)). The microwave treatment is performed after the formation of the insulating film 252A. Also, the microwave treatment performed after the formation of the insulating film 252A may be omitted. Alternatively, a microwave treatment may be performed after the insulating film 250A is formed. When forming an insulating film to be 250b, a microwave treatment may be performed after the film is formed. The microwave treatment may be performed under the same conditions as those for the microwave treatment performed after the formation of the insulating film 252A. In addition, the microwave treatment performed after the formation of the insulating film 252A or the insulating film 250A was not performed. Alternatively, microwave treatment may be performed after the formation of the insulating film that becomes the insulator 250b.

[0302] In addition, after the insulating film 252A and the insulating film 250A are formed, the insulating film that becomes the insulator 250b is After the deposition of the film, a heat treatment may be performed while maintaining the reduced pressure after each microwave treatment. By performing such a process, the insulating film 252A, the insulating film 250A, and the insulator 250 b, the oxide 230b, and the oxide 230a. In addition, some of the hydrogen can be absorbed by the conductor 242 (the conductor 242a and the conductor 2 42b) may be gettered. Or, if the reduced pressure is maintained after microwave treatment, The step of carrying out the heat treatment may be repeated several times while keeping the substrate in the same state. By performing this, the insulating film 252A, the insulating film 250A, and the insulating film that will become the insulator 250b are Hydrogen in the oxide 230b and the oxide 230a can be removed more efficiently. The heat treatment temperature is preferably 300° C. or more and 500° C. or less. The microwave treatment, i.e., microwave annealing, may also serve as the heat treatment. If the oxide 230b etc. is sufficiently heated by wave annealing, the heat treatment can be omitted. Good too.

[0303] In addition, microwave processing is performed to remove the insulating film 252A, the insulating film 250A, and the insulator 250. By improving the quality of the insulating film, the diffusion of hydrogen, water, impurities, etc. can be suppressed. Therefore, a post-process such as forming a conductive film to become the conductor 260 or a post-process such as a heat treatment can be performed. According to this theory, hydrogen, water, impurities, etc. are absorbed into the oxide 230b and the oxide 230c through the insulator 252. It is possible to suppress diffusion to 0a, etc.

[0304] Next, an insulating film 254A is formed (see FIGS. 15(A) to 15(D)). The deposition of 4A is done by sputtering, CVD, MBE, PLD, ALD, etc. The insulating film 254A can be formed by the ALD method, similarly to the insulating film 252A. By forming the insulating film 254A by the ALD method, the insulating film 254A can be formed to a thin thickness. In the present embodiment, the insulating film 254A is formed of silicon nitride. The film of con is formed using the PEALD method.

[0305] Next, a conductive film that will become the conductor 260a and a conductive film that will become the conductor 260b are formed in this order. The conductive film that becomes the conductor 260a and the conductive film that becomes the conductor 260b are formed by sputtering. The deposition method can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In the embodiment, a titanium nitride film is formed as a conductive film to be the conductor 260a by using an ALD method, A tungsten film is formed by CVD as a conductive film that becomes the conductor 260b.

[0306] Next, the insulating film 252A, the insulating film 250A, the insulating film 254A, and the conductive The conductive film that becomes the conductor 260a and the conductive film that becomes the conductor 260b are exposed through the insulator 280. By polishing to a thickness of 0.1 mm, the insulator 252, the insulator 250, the insulator 254, and the conductor 260 (conductor 260a and conductor 260b) are formed (FIGS. 16(A) to 16(C)). (D). This allows the insulator 252 to cover the opening that reaches the oxide 230b. The conductor 260 is disposed on the upper surface of the insulator 252 and the insulator 250. The opening is disposed so as to be filled therein.

[0307] Next, a heat treatment may be performed under the same conditions as the above heat treatment. The heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. for 1 hour. In addition, the moisture concentration and hydrogen concentration in the insulator 280 can be reduced. After the heat treatment, the insulator 282 may be formed continuously without exposure to the air.

[0308] Next, an insulating layer is formed on the insulator 252, on the insulator 250, on the conductor 260, and on the insulator 280. An insulator 282 is formed (see FIG. 16(A) to FIG. 16(D)). The insulator 282 is formed by This can be done using methods such as sputtering, CVD, MBE, PLD, and ALD. The insulator 282 is preferably formed by sputtering. By using the sputtering method, which does not require the use of hydrogen-containing molecules in the gas, The hydrogen concentration in the fuel cell can be reduced.

[0309] In this embodiment, the insulator 282 is an aluminum target in an atmosphere containing oxygen gas. Using a sputter, an aluminum oxide film is formed by pulse DC sputtering. By using the sputtering method, the film thickness distribution is made more uniform, and the sputtering rate and film thickness are Quality can be improved.

[0310] In addition, the insulator 282 is formed in an atmosphere containing oxygen by sputtering. In this way, oxygen can be added to the insulator 280 while it is being formed. In this case, the insulator 28 can be made to contain excess oxygen while the substrate is heated. It is preferable to deposit 2.

[0311] Next, an etching mask is formed on the insulator 282 by lithography, and the insulator a portion of the insulator 282, a portion of the insulator 280, a portion of the insulator 275, a portion of the insulator 222, and A part of the insulator 216 is processed until the upper surface of the insulator 214 is exposed (FIGS. 17(A) to 17(C)). (See FIG. 17(C).) This processing may be performed by wet etching, but dry etching is also preferred. The use of a chip is preferred for fine processing.

[0312] Next, a heat treatment may be performed. The heat treatment is performed at a temperature of 250° C. or higher and 650° C. or lower, preferably 3 The heat treatment may be performed at a temperature of 50° C. to 600° C. In addition, the heat treatment may be performed after the oxide film 230B is formed. The temperature of the heat treatment is preferably lower than that of the heat treatment to be performed. By this heat treatment, part of the oxygen added to the insulator 280 is The portion diffuses into the oxide 230 through the insulator 250, etc.

[0313] In addition, by performing the heat treatment, the insulators 282, 280, 275, and The insulating body 222 and the insulating body 216 are processed to form an insulating body 280. The oxygen contained in the body 280 and the hydrogen bonded to the oxygen can be released to the outside. The hydrogen that combines with oxygen is released as water. , unwanted oxygen, and hydrogen can be reduced.

[0314] Furthermore, in the region of the oxide 230 overlapping the conductor 260, the upper surface and An insulator 252 is provided in contact with the side surface of the substrate 21. The insulator 252 has a barrier property against oxygen. Since the oxide 230 has a high oxygen content, it is possible to reduce the diffusion of excessive oxygen into the oxide 230. This prevents an excessive amount of oxygen from being supplied to the area 230bc and its vicinity. As a result, the side surface of the conductor 242 is oxidized by the excess oxygen. While suppressing the oxidation of the oxygen vacancies and V formed in the region 230bc, O Low H This can improve the electrical characteristics of the transistor 200 and increase its reliability. It can be done.

[0315] On the other hand, when the transistors 200 are densely integrated, one transistor 200 In this case, the volume of the insulator 280 may become excessively small relative to the volume of the insulator 280. In this case, the amount of oxygen diffusing into the oxide 230 is significantly smaller. When the oxide 230 is heated in contact with an oxide insulator (such as the insulator 250), the oxide However, there is a risk that oxygen constituting the compound 230 will be released. In the transistor 200, the oxide 230 is formed in a region where the oxide 230 overlaps with the conductor 260. An insulator 252 is provided in contact with the top and side surfaces of the semiconductor device 0. The insulator 252 is resistant to oxygen. Since the oxide 230 has a barrier property to prevent oxygen from being desorbed from the oxide 230 during the heat treatment, This can reduce the oxygen vacancies and V O H can be reduced. This improves the electrical characteristics of the transistor 200 and increases its reliability. can be improved.

[0316] As described above, in the semiconductor device according to the present embodiment, oxygen from the insulator 280 The transistor has good electrical properties and good reliability regardless of whether the supply of Therefore, the electrical characteristics of the transistor 200 can be determined within the substrate surface. It is possible to provide a semiconductor device in which variations are suppressed.

[0317] Next, the insulator 283 is formed on the insulator 282 (see FIGS. 18(A) to 18(D)). The insulator 283 can be formed by sputtering, CVD, MBE, PLD, or other methods. The insulator 283 can be formed by sputtering or ALD. It is preferable to use hydrogen-containing molecules in the deposition gas. By using the heating method, the hydrogen concentration in the insulator 283 can be reduced. The body 283 may be multi-layered. For example, silicon nitride may be formed by sputtering. A silicon nitride film may be formed on the silicon nitride by using an ALD method. By encasing the transistor 200 in the highly conductive insulators 283 and 214, This can prevent moisture and hydrogen from entering through the insulating layer.

[0318] Next, the insulator 274 is formed on the insulator 283. The insulator 274 is formed by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, a silicon oxide film is formed as the insulator 274 by the CVD method. .

[0319] Next, the insulator 274 is polished by CMP until the insulator 283 is exposed. The upper surface of the insulator 274 is planarized (see FIGS. 18(A) to 18(D)). The CMP process may remove a portion of the top surface of the insulator 283.

[0320] Next, an insulator 285 is formed on the insulator 274 and on the insulator 283 (FIG. 19( 19A) to 19D. The insulator 285 can be formed by a sputtering method, a CVD method, or the like. The formation of the insulator 285 can be performed by using the MBE method, the PLD method, the ALD method, or the like. The film is preferably formed by sputtering. By using a sputtering method that does not require a high-temperature process, the hydrogen concentration in the insulator 285 can be reduced. This can be done.

[0321] In this embodiment, the insulator 285 is made of silicon oxide formed by sputtering. To film.

[0322] Next, the insulator 271, the insulator 275, the insulator 280, the insulator 282, the insulator 283, and An opening is formed in the insulator 285 reaching the conductor 242 (FIGS. 19(A) and 19(B)). (See FIG. 1B.) The opening can be formed by using a lithography method. In 9(A), the shape of the opening is circular when viewed from above, but this is not limited to this. For example, the opening may be substantially circular, such as an ellipse, or may be multi-sided, such as a square, when viewed from above. The shape may be a polygon such as a square or a rectangle with rounded corners.

[0323] Next, an insulating film that will become the insulator 241 is formed, and the insulating film is anisotropically etched to form the insulator (See FIG. 19(B)). The insulating film that becomes the insulator 241 is formed by a spa This can be done using techniques such as CVD, MBE, PLD, or ALD. The insulating film that becomes the insulator 241 is an insulating film that has a function of suppressing oxygen permeation. For example, it is preferable to form an aluminum oxide film by the ALD method. It is preferable to form a silicon nitride film on the silicon nitride using the PEALD method. This is preferred because it has high blocking properties against hydrogen.

[0324] The anisotropic etching of the insulating film that becomes the insulator 241 may be, for example, dry etching. By providing an insulator 241 on the side wall of the opening, oxygen from the outside can be prevented. This suppresses the permeation of the conductor 240a and the conductor 240b to be formed next, thereby preventing oxidation. In addition, the conductor 240a and the conductor 240b may be formed of a material such as an insulator 280. This can prevent impurities such as water and hydrogen from diffusing.

[0325] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. The conductive film that becomes the conductor 240b has a function of suppressing the permeation of impurities such as water and hydrogen. It is preferable to use a laminated structure containing a conductor such as tantalum nitride or titanium nitride. The conductor 24 may be a laminate of tungsten, molybdenum, copper, etc. The conductive film that becomes 0 is formed by sputtering, CVD, MBE, PLD or AL. This can be done using Method D or the like.

[0326] Next, a CMP process is performed to remove the conductive film that will become the conductor 240a and the conductor 240b. A portion of the insulating film 285 is removed to expose the upper surface of the insulating film 285. As a result, the conductive film remains only in the opening. By virtue of the presence of the conductive material 240a and the conductive material 240b, the upper surfaces of which are flat, can be formed. (See FIG. 19(A) to FIG. 19(D).) Note that the insulator 285 A portion of the top surface of the

[0327] Next, a conductive film that will become the conductor 246 is formed. This can be done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. can.

[0328] Next, the conductive film that will become the conductor 246 is processed by lithography to form the conductor 240a. The conductor 246a contacts the upper surface of the conductor 240b, and the conductor 246b contacts the upper surface of the conductor 240b. At this time, the conductor 246a and the conductor 246b do not overlap with the insulator 285. A portion of the insulation 285 in the narrow area may be removed.

[0329] As a result, a semiconductor device including the transistor 200 shown in FIGS. As shown in FIG. 8(A) to FIG. 19(D), The transistor 200 can be manufactured by using the method for manufacturing a semiconductor device.

[0330] <Microwave processing equipment> A microwave processing apparatus that can be used in the method for manufacturing the semiconductor device will be described below. I will explain this in more detail.

[0331] First, let us consider the configuration of a manufacturing device that minimizes the inclusion of impurities during the manufacture of semiconductor devices. 0 to 23 will be used to explain.

[0332] FIG. 20 is a schematic top view of a single-wafer multi-chamber manufacturing apparatus 2700. The manufacturing apparatus 2700 includes a cassette port 2761 for accommodating substrates and a substrate alignment device. and an atmosphere-side substrate supply chamber 2701 having an alignment port 2762 for performing the alignment. The substrate is transported from the substrate supply chamber 2701 to the atmospheric substrate transport chamber 2702, which transports the substrate. A load lock chamber in which the pressure inside the chamber is switched from atmospheric pressure to reduced pressure or from reduced pressure to atmospheric pressure. 2703a, the substrate is removed, and the pressure in the chamber is reduced to atmospheric pressure, or atmospheric pressure to atmospheric pressure. The unload lock chamber 2703b is switched to a reduced pressure state, and the transfer chamber 2703 is used for transferring substrates in a vacuum. 704, chamber 2706a, chamber 2706b, and chamber 2706c. , and chamber 2706d.

[0333] The atmospheric substrate transfer chamber 2702 is provided with a load lock chamber 2703a and an unload lock chamber 2703b. The load lock chamber 2703a and the unload lock chamber 2703b are connected to each other. 3b is connected to a transfer chamber 2704, which is connected to a chamber 2706a, a chamber Bar 2706b connects chamber 2706c and chamber 2706d.

[0334] A gate valve GV is provided at the connection between the chambers, and the atmosphere side substrate supply chamber 270 Each chamber can be independently maintained in a vacuum state, except for the atmospheric side substrate transfer chamber 2702. In addition, a transfer robot 2763a is provided in the atmospheric substrate transfer chamber 2702. The transfer chamber 2704 is provided with a transfer robot 2763b. and the transfer robot 2763b can transfer the substrate within the manufacturing apparatus 2700. do.

[0335] The back pressure (total pressure) of the transfer chamber 2704 and each chamber is, for example, 1×10 -4 Pa or less , preferably 3 x 10 -5 Pa or less, more preferably 1×10 -5 Pa or less. In addition, the mass-to-charge ratio (m / z) of the gas molecules ( The partial pressure of the atom is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, More preferably 3×10 -6 The pressure in the transfer chamber 2704 and each chamber is set to 0.1 Pa or less. The partial pressure of a gas molecule (atom) with m / z of 28 is, for example, 3 × 10 -5 Pa or less, preferred Or 1×10 -5 Pa or less, more preferably 3×10 -6 Pa or less. The partial pressure of gas molecules (atoms) with m / z of 44 in the delivery chamber 2704 and each chamber is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, more preferably 3×1 0 -6 Pa or less.

[0336] The total pressure and partial pressure in the transfer chamber 2704 and each chamber were measured using a mass spectrometer. For example, a quadrupole mass spectrometer (Q-mass spectrometer) manufactured by ULVAC, Inc. s.) Qulee CGM-051 can be used.

[0337] In addition, the transfer chamber 2704 and each chamber are constructed to have little external or internal leakage. For example, the leak rate of the transfer chamber 2704 and each chamber is , 3×10 -6 Pa·m 3 / s or less, preferably 1×10 -6 Pa·m 3 / s or less For example, the leak rate of a gas molecule (atom) with m / z of 18 is 1×10 -7 P a·m 3 / s or less, preferably 3×10 -8 Pa·m 3 / s or less. For example, The leak rate of a gas molecule (atom) with m / z of 28 is 1×10 -5 Pa·m 3 / s or less , preferably 1 x 10 -6 Pa·m 3 For example, if the m / z is 44, The leak rate of gas molecules (atoms) is 3×10 -6 Pa·m 3 / s or less, preferably 1× 10 -6 Pa·m 3 / s or less.

[0338] The leak rate was calculated from the total and partial pressures measured using the mass spectrometer mentioned above. The leak rate depends on the external leak and the internal leak. The problem is that gas enters from outside the vacuum system due to a small hole or poor sealing. Leaks occur due to leakage from partitions such as valves in the vacuum system or gas released from internal components. In order to keep the leak rate below the above values, the external and internal leaks are It is necessary to take measures from both sides.

[0339] For example, the opening and closing parts of the transfer chamber 2704 and each chamber are sealed with metal gaskets. Metal gaskets should be coated with iron fluoride, aluminum oxide, or chromium oxide. Metal gaskets have a higher adhesion than O-rings. In addition, the use of iron fluoride, aluminum oxide, chromium oxide, etc. By using a metal passivation coating, impurities released from the metal gasket are eliminated. This suppresses gas release and reduces internal leakage.

[0340] In addition, the components constituting the manufacturing equipment 2700 are made of aluminum, which emits less gas containing impurities. The alloys used are aluminum, chromium, titanium, zirconium, nickel, or vanadium. The metals with low outgassing rates, including the above-mentioned impurities, are covered with alloys containing iron, chromium, and nickel. Alloys containing iron, chromium and nickel are strong and heat resistant. In order to reduce the surface area, the surface irregularities of the component are polished. By reducing the amount of gas released, it is possible to reduce the amount of gas released.

[0341] Alternatively, the components of the manufacturing apparatus 2700 may be made of iron fluoride, aluminum oxide, chromium oxide, etc. The material may be coated with, for example,

[0342] It is preferable that the members of the manufacturing apparatus 2700 are made of metal as much as possible, for example, quartz. When installing a viewing window made of ferric fluoride, the surface is treated with iron fluoride to suppress gas emission. It is advisable to coat it thinly with aluminum oxide or chromium oxide.

[0343] The adsorbed substances present in the transfer chamber 2704 and each chamber are adsorbed to the inner walls, etc. Although it does not affect the pressure in the transfer chamber 2704 and each chamber, This causes gas emission when the chamber is evacuated. Therefore, the leak rate is proportional to the pumping speed. Although there is no relation between the temperature and the temperature of the gas, a pump with high exhaust capacity is used to exhaust the gas into the transfer chamber 2704 and each chamber. It is important to remove as much of the adsorbed matter as possible and evacuate the gas in advance. To promote desorption of adsorbed substances, the transfer chamber 2704 and each chamber may be baked. Baking can increase the desorption rate of adsorbed substances by about 10 times. The heating may be performed at a temperature of 100° C. or higher and 450° C. or lower. In addition, if the adsorbed substances are removed while being introduced into each chamber, it is difficult to remove them by simply evacuating. The desorption rate of water and other substances can be further increased. Heating to the same temperature as King's can further increase the desorption rate of the adsorbed substances. Here, it is preferable to use a rare gas as the inert gas.

[0344] Alternatively, an inert gas such as a heated rare gas or oxygen may be introduced into the transfer chamber 27. The pressure in the transfer chamber 2704 and each chamber is increased, and after a certain period of time, the transfer chamber 2704 and each chamber are It is preferable to evacuate the chamber. The adsorbed substances in the transport chamber 2704 and each chamber can be desorbed. This process reduces impurities present in the bar. This process should be repeated at least 2 times and no more than 30 times. It is effective to repeat the process 5 to 15 times. An inert gas having a temperature of 40°C or higher and 400°C or lower, preferably 50°C or higher and 200°C or lower. By introducing oxygen, the pressure in the transfer chamber 2704 and each chamber is kept below 0.1 Pa. 10 kPa or less, preferably 1 Pa or more and 1 kPa or less, and more preferably 5 Pa or more and 1 kPa or less. The pressure should be kept at 1 to 300 minutes, preferably 5 to 120 minutes. After that, the transfer chamber 2704 and each chamber are heated for 5 minutes or more and 300 minutes or more. The air is evacuated for a period of time preferably from 10 minutes to 120 minutes.

[0345] Next, the chamber 2706b and the chamber 2706c are shown in a cross-sectional view in FIG. This will be explained using a formula diagram.

[0346] The chambers 2706b and 2706c are used to apply microwaves to the object to be treated. The chambers 2706b and 2706c are chambers in which processing can be performed. The only difference between the 2706c and the 2706c is the atmosphere in which the microwave treatment is carried out. Since these are common to both, they will be explained together below.

[0347] Chamber 2706b and chamber 2706c are connected to a slot antenna plate 2808. The device has a dielectric plate 2809, a substrate holder 2812, and an exhaust port 2819. Outside the chambers 2706b and 2706c, a gas supply source 2801 and A valve 2802, a high frequency generator 2803, a waveguide 2804, and a mode converter 2805. , a gas pipe 2806, a waveguide 2807, a matching box 2815, and a high frequency power supply 2816, a vacuum pump 2817, and a valve 2818 are provided.

[0348] The high frequency generator 2803 is connected to the mode converter 2805 via the waveguide 2804. The mode converter 2805 is connected to a slot antenna plate 2808 via a waveguide 2807. The slot antenna plate 2808 is disposed in contact with the dielectric plate 2809. The gas supply source 2801 is connected to a mode converter 2805 via a valve 2802. Then, the gas passes through the mode converter 2805, the waveguide 2807, and the dielectric plate 2809. Pipe 2806 delivers gas to chamber 2706b and chamber 2706c. The vacuum pump 2817 also supplies the chuck with air via a valve 2818 and an exhaust port 2819. It has a function of exhausting gas from the member 2706b and the chamber 2706c. The high frequency power supply 2816 is connected to the substrate holder 2812 via a matching box 2815. Connected.

[0349] The substrate holder 2812 has a function of holding the substrate 2811. For example, The device has the function of electrostatically or mechanically chucking the object. It also has a heating mechanism 2813 inside, It has a function of heating the substrate 2811 .

[0350] The vacuum pump 2817 may be, for example, a dry pump, a mechanical booster pump, Ion pump, titanium sublimation pump, cryopump or turbomolecular pump In addition to the vacuum pump 2817, a cryotrap can be used. Cryopumps and cryotraps can be used to efficiently pump out water. This is particularly preferred.

[0351] The heating mechanism 2813 may be, for example, a heating mechanism that uses a resistance heating element or the like. Alternatively, heat can be transferred by conduction or radiation from a medium such as a heated gas, For example, a GRTA (Gas Rapid Therma l Annealing) or LRTA (Lamp Rapid Thermal Annealing) RTA (Rapid Thermal Annealing) The GRTA uses high-temperature gas for heat treatment. Inert gas is used.

[0352] The gas supply source 2801 is connected to a refiner via a mass flow controller. The gas used has a dew point of -80°C or less, preferably -100°C or less. For example, oxygen gas, nitrogen gas, and rare gas (such as argon gas) are preferably used. Just use it.

[0353] The dielectric plate 2809 may be made of, for example, silicon oxide (quartz), aluminum oxide (aluminum The dielectric plate 28 may be made of, for example, yttrium oxide (yttria). A separate protective layer may be formed on the surface of the substrate 09. The protective layer may be made of magnesium oxide. Sium, titanium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, Silicon oxide, aluminum oxide, yttrium oxide, etc. may be used. 2809 is exposed to a particularly high-density region of the high-density plasma 2810 described later. Therefore, a protective layer can be provided to mitigate damage. It is possible to suppress the increase in

[0354] The high frequency generator 2803 can be used for frequencies in the range of 0.3 GHz to 3.0 GHz, for example, 0.7 GHz. Generates microwaves from z to 1.1 GHz or from 2.2 GHz to 2.8 GHz The microwave generated by the high frequency generator 2803 is guided through the waveguide 2804. The mode converter 2805 converts the TE mode into The microwaves are converted into TEM mode and then propagated through the waveguide 280. 7 to the slot antenna plate 2808. The slot antenna plate 2808 has a plurality of The microwave passes through the slots and the dielectric plate 2809. Then, an electric field is generated below the dielectric plate 2809, generating a high-density plasma 2810. The high density plasma 2810 can be generated by supplying gas from a gas supply source 2801. There are ions and radicals depending on the gas species. For example, oxygen radicals are present. do.

[0355] At this time, the substrate 2811 is exposed to ions and radicals generated in the high-density plasma 2810. The film on the substrate 2811 can be modified by the high frequency power source 2816. In some cases, it may be preferable to apply a bias to the substrate 2811 side using a high frequency power source 28. 16 includes RF (Radio Frequency) signals with frequencies such as 13.56 MHz and 27.12 MHz. By applying a bias to the substrate, Ions in the high-density plasma 2810 can reach the depths of an opening in a film or the like on a substrate 2811 efficiently. It can be achieved.

[0356] For example, in chamber 2706b or chamber 2706c, gas supply 2801 By introducing oxygen from the plasma, oxygen radical treatment using high density plasma 2810 can be performed. can.

[0357] Next, the chamber 2706a and the chamber 2706d are shown in a cross-sectional view in FIG. This will be explained using a formula diagram.

[0358] The chambers 2706a and 2706d are, for example, a chamber for irradiating an object to be treated with electromagnetic waves. It is possible to perform a firing in the chamber. The only difference between this and 706d is the type of electromagnetic waves. The rest of the configuration is the same. Because there are many parts, we will explain them together below.

[0359] Chamber 2706a and chamber 2706d may each include one or more lamps 2820. , a substrate holder 2825, a gas inlet 2823, and an exhaust port 2830. , outside chamber 2706a and chamber 2706d, a gas supply source 2821 , a valve 2822, a vacuum pump 2828, and a valve 2829 are provided.

[0360] The gas supply source 2821 is connected to a gas inlet 2823 via a valve 2822 . The vacuum pump 2828 is connected to an exhaust port 2830 via a valve 2829. 2820 is disposed opposite to a substrate holder 2825. The substrate holder 2825 is The substrate holder 2825 has a function of holding the substrate 2824. The substrate holder 2825 also has a heating mechanism therein. 2826 and has a function of heating the substrate 2824.

[0361] The lamp 2820 has a function of emitting electromagnetic waves such as visible light or ultraviolet light. For example, a light source having a wavelength of 10 nm or more and 2500 nm or less, or 500 nm or less Emits electromagnetic waves with a peak between 2000 nm and 40 nm and 340 nm. It is sufficient to use a light source having such a function.

[0362] For example, the lamp 2820 may be a halogen lamp, a metal halide lamp, a xenon Arc lamps, carbon arc lamps, high pressure sodium lamps, high pressure mercury lamps, etc. A light source of this type may be used.

[0363] For example, the electromagnetic waves emitted from the lamp 2820 may be partially or completely transmitted to the substrate 2824. The film on the substrate 2824 can be modified by being absorbed into the substrate. For example, The substrate 2824 can be heated while the When carried out, defects can be efficiently generated or reduced, or impurities can be efficiently removed.

[0364] Alternatively, for example, the substrate holder 2825 may be heated by electromagnetic waves emitted from the lamp 2820. The substrate 2824 may be heated by heating the substrate holder 2825. The heat mechanism 2826 may not be present.

[0365] For the vacuum pump 2828, please refer to the description of the vacuum pump 2817. The mechanism 2826 is described with reference to the description of the heating mechanism 2813. Please refer to the description of the gas supply source 2801.

[0366] The microwave processing device that can be used in this embodiment is not limited to the above. The microwave processing device 2900 shown in FIG. , quartz tube 2901, exhaust port 2819, gas supply source 2801, valve 2802, high frequency generation 2803, a waveguide 2804, a gas pipe 2806, a vacuum pump 2817, and a valve 28 18. The microwave processing device 2900 also includes a quartz tube 2901 and a plurality of substrates. A substrate holder 2 holds 2811 (2811_1 to 2811_n, n is an integer of 2 or more). The microwave processing device 2900 also has a heating element 902 on the outside of the quartz tube 2901. The device may include a means 2903.

[0367] The microwave generated by the high frequency generator 2803 is guided through the waveguide 2804 to the quartz tube 2805. The vacuum pump 2817 is operated via a valve 2818. It is connected to an exhaust port 2819 through a pipe, and the pressure inside the quartz tube 2901 can be adjusted. The gas supply source 2801 is connected to a gas pipe 2806 via a valve 2802. A desired gas can be introduced into the quartz tube 2901. The substrate 2811 in the quartz tube 2901 can be heated to a desired temperature. The gas supplied from the gas supply source 2801 may be heated by a heating means 2903. The microwave processing device 2900 performs a heat treatment and a microwave The processing can be performed simultaneously. Also, after the substrate 2811 is heated, the microwave processing can be performed. After the microwave treatment is performed on the substrate 2811, a heat treatment can be performed. This can be done.

[0368] The substrates 2811_1 to 2811_n are all used to form semiconductor devices or memory devices. The substrates may be processed, or some of the substrates may be dummy substrates. 1, and the substrate 2811_n are dummy substrates, and the substrates 2811_2 to 2811_n are The substrate 2811_1 may be a processing substrate. 1_n-1 and the substrate 2811_n are dummy substrates, and the substrates 2811_3 to 11_n-2 may be used as a processing substrate. By using a dummy substrate, microwave processing or During the heat treatment or heating process, multiple substrates are uniformly treated, and the variation between substrates can be reduced. For example, the high frequency generator 2803 and the processing unit closest to the waveguide 2804 are preferably By placing a dummy substrate on the substrate, the substrate is prevented from being directly exposed to microwaves. This is preferable because it can be controlled.

[0369] By using the above manufacturing equipment, it is possible to suppress the inclusion of impurities in the processed object while improving the film quality. This makes it possible.

[0370] <Modifications of the semiconductor device> Hereinafter, one example of a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. An example will be described.

[0371] Each figure (A) shows a top view of the semiconductor device. Each figure (B) shows the A1 shown in each figure (A). FIG. 2 is a cross-sectional view corresponding to the portion indicated by the dashed line in FIG. FIG. 2 is a cross-sectional view corresponding to the portion indicated by the dashed line A3-A4 in FIG. FIG. 1 is a cross-sectional view corresponding to the portion indicated by the dashed line A5-A6 in FIG. In the figure, some elements have been omitted for clarity.

[0372] In the semiconductor device shown in each of FIGS. (A) to (D), The structures constituting the semiconductor device and having the same functions are denoted by the same reference numerals. In the section, the materials constituting the semiconductor device are explained in detail in <Examples of the configuration of the semiconductor device>. The above materials can be used.

[0373] <Modification 1 of the semiconductor device> The semiconductor device shown in FIG. 5A to FIG. 5D is a semiconductor device shown in FIG. The semiconductor device shown in FIG. 5(A) to FIG. 5(D) is a modified example of the semiconductor device shown in FIG. This semiconductor device is different from the semiconductor device shown in FIG. 2D in that an insulator 282 is not provided. Therefore, in the semiconductor device shown in FIG. 5(A) to FIG. 5(D), the insulator 283 is 0, the top surface of insulator 280, the top of insulator 254, the top of insulator 250, and It contacts the top of the insulator 252 .

[0374] For example, the oxide 230 may be sufficiently treated by a microwave treatment as shown in FIG. 13 or FIG. If sufficient oxygen can be supplied, the insulator 282 is provided to add oxygen to the insulator 280. In this case, the region 230bc can be substantially i-shaped. As shown in FIGS. 5A to 5D, the semiconductor device can be manufactured without providing the insulator 282. This simplifies the manufacturing process of the device and improves productivity.

[0375] <Modification 2 of Semiconductor Device> The semiconductor device shown in FIG. 6A to FIG. 6D is a semiconductor device shown in FIG. The semiconductor device shown in FIG. 6(A) to FIG. 6(D) is a modified example of the semiconductor device shown in FIG. The semiconductor device shown in FIG. 2(D) is an oxide 243 (oxide 243a, oxide 243b The oxide 243a is different from the oxide 230b in that the conductor 242a is provided. and oxide 243b is provided between oxide 230b and conductor 242b. Here, the oxide 243a is connected to the upper surface of the oxide 230b and the lower surface of the conductor 242a. In addition, the oxide 243b is preferably formed on the upper surface of the oxide 230b and the conductor 230b. It is preferable that it contacts the lower surface of 42b.

[0376] The oxide 243 preferably has a function of suppressing oxygen permeation. By disposing an oxide 243 having a function of suppressing oxygen permeation between the conductor 242 that functions as a source electrode or a drain electrode and the oxide 230b, the electrical resistance between the conductor 242 and the oxide 230b is preferably reduced. With such a configuration, the electrical characteristics, field-effect mobility, and reliability of the transistor 2 00 may be improved. Also, as the oxide 243, a metal oxide containing an element M may be used. In particular, as the element M, aluminum, gallium, yttrium, or tin may be used. Also, it is preferable that the oxide 2

[0377] 43 has a higher concentration of the element M than the oxide 230b. Also, as the oxide 243, gallium oxide may be used. Also, as the oxide 243, a metal oxide such as an In-M-Zn oxide may be used. Specifically, in the metal oxide used for the oxide, the atomic ratio of the element M to In is preferably larger than the atomic ratio of the element M to In in the metal oxide used for the oxide 230b. Also, the film thickness of the oxide 243 is preferably 0.5 nm or more and 5 nm or less, more preferably 1 nm or more and 3 nm or less, and even more preferably 1 nm or more and 2 nm or less. Also, the oxide 243 preferably has crystallinity. When the oxide 243 has crystallinity, the release of oxygen in the oxide 230 can be preferably suppressed. For example, if the oxide 243 has a crystal structure such as a hexagonal crystal, the release of oxygen in the oxide 230 may be suppressed.

[0378] <Modified Example 3 of Semiconductor Device> The semiconductor device shown in FIGS. 7(A) to 7(D) is the same as the semiconductor device shown in FIGS. 2(A) to 2(D).​​​​​​ The semiconductor device shown in FIG. 7(A) to FIG. 7(D) is a modified example of the semiconductor device shown in FIG. The semiconductor device shown in FIG. 2D is different from the semiconductor device shown in FIG. 2D in that the insulator 283 is in contact with a part of the upper surface of the insulator 212. Therefore, the transistor 200 has an insulator 283, and disposed within a region sealed with the insulator 212. The present invention can suppress hydrogen contained outside the sealed region from being mixed into the sealed region. In addition, in the transistor 200 shown in FIGS. Although the configuration in which the insulating layer 282 and the insulator 283 are provided as a single layer is shown, the present invention is not limited to this. For example, the insulator 212 and the insulator 283 may each be formed in two or more layers. Alternatively, the second insulating layer 14 may be provided as a laminated structure on the first insulating layer 14 .

[0379] <Applications of semiconductor devices> An example of a semiconductor device according to one embodiment of the present invention will be described below with reference to FIG. .

[0380] FIG. 24A shows a top view of the semiconductor device 500. The x-axis in FIG. 24A represents the The axis is parallel to the channel length direction of the transistor 200, and the y-axis is perpendicular to the x-axis. FIG. 24(B) is a cross-section corresponding to the portion indicated by the dashed line A1-A2 in FIG. 24(A). FIG. 24(C) is a plan view and a cross-sectional view of the transistor 200 in the channel length direction. FIG. 25 is a cross-sectional view corresponding to the portion indicated by the dashed line A3-A4 in FIG. 24(A), and shows an opening region 24(A) is a cross-sectional view of 400 and its vicinity. Some elements have been omitted for this reason.

[0381] In the semiconductor device shown in FIG. 24(A) to FIG. 24(C), The structures constituting the semiconductor device shown in Example 1 and having the same functions are denoted by the same reference numerals. In this section, the materials constituting the semiconductor device are described in detail in <Examples of the semiconductor device configuration>. The materials described in detail above can be used.

[0382] The semiconductor device 500 shown in FIG. 24(A) to FIG. 24(C) is This is a modified example of the semiconductor device shown in FIG. 24(A) to FIG. 24(C). 2. 00 is different from FIG. 2 in that an opening region 400 is formed in the insulator 282 and the insulator 280. 2A to 2D. In addition, the semiconductor device 200 is The fact that the sealing portion 265 is formed so as to surround the semiconductor device shown in FIGS. Different from the body apparatus.

[0383] The semiconductor device 500 includes a plurality of transistors 200 arranged in a matrix. It has a plurality of opening regions 400. It also functions as the gate electrode of the transistor 200. A plurality of conductors 260 are provided extending in the y-axis direction. The oxide 230 and the conductor 260 are formed in a region that does not overlap with the oxide 230 and the conductor 260. The transistor 200, the plurality of conductors 260, and the plurality of opening regions 400 are surrounded by a The sealing portion 265 is formed. Note that the transistor 200, the conductor 260, and the opening The number, arrangement, and size of the regions 400 are not limited to the structure shown in FIG. 24, and may be any other structure. This can be set appropriately in accordance with the design of the body device 500.

[0384] As shown in FIG. 24(B) and FIG. 24(C), the sealing portion 265 is a sealing portion for sealing a plurality of transistors. 200, insulator 216, insulator 222, insulator 275, insulator 280, and insulator 28 In other words, the insulator 283 is provided to surround the insulator 216. The insulating member 275 is provided to cover the edge member 222, the insulator 280, and the insulator 282. In addition, in the sealing portion 265, the insulator 283 is in contact with the upper surface of the insulator 214. In the sealing portion 265, an insulator 274 is provided between the insulators 283 and 285. The upper surface of the insulator 274 is approximately flush with the uppermost surface of the insulator 283. Body 274 may be an insulator similar to insulator 280 .

[0385] By adopting such a structure, the plurality of transistors 200 are connected to the insulator 283 and the insulator 2 14 and insulator 212. Here, insulator 283, insulator 214 and one or more of the insulators 212 function as a barrier insulating film against hydrogen. This is preferable. As a result, hydrogen contained outside the region of the sealing portion 265 is It is possible to suppress the incorporation of the fluorine-containing compound into the liquid.

[0386] As shown in FIG. 24C, in the opening region 400, the insulator 282 has an opening. In addition, in the opening region 400, the insulator 280 overlaps the opening of the insulator 282, The depth of the groove of the insulator 280 is at most 100 mm. It is sufficient to expose the insulator 280. For example, the insulator 280 may be removed by about 1 / 4 to 1 / 2 of the maximum thickness. It is enough to set it to degrees.

[0387] As shown in FIG. 24C, the insulator 283 is disposed inside the opening region 400. The opening area 282 contacts the side of the insulator 280, the side of the insulator 280, and the top surface of the insulator 280. In the region 400, a part of the insulator 274 is formed so as to fill the recess formed in the insulator 283. At this time, the upper surface of the insulator 274 formed in the opening region 400 and , the height of the top surface of the insulator 283 may be approximately the same.

[0388] Such an opening region 400 is formed, and the insulator 280 is exposed through the opening of the insulator 282. In this state, a heat treatment is performed to supply oxygen to the oxide 230 while the insulator 2 A portion of the oxygen contained in 80 can be diffused outward from the open region 400. The channel-shaped insulator 280 containing oxygen that is desorbed by heating is converted into the channel-shaped insulator 280 in the oxide semiconductor layer. The area that functions as the growth area and its vicinity must be supplied with sufficient oxygen and an excess amount of oxygen must be avoided. It is possible to prevent the element from being supplied.

[0389] At this time, hydrogen contained in the insulator 280 is combined with oxygen, and the hydrogen is passed through the opening region 400. The hydrogen that has combined with oxygen is released as water. The hydrogen contained in the insulator 280 is reduced, and the hydrogen contained in the insulator 280 is converted into the oxide 230. This can reduce contamination.

[0390] In addition, in FIG. 24(A), the shape of the opening region 400 in a top view is substantially rectangular. However, the present invention is not limited to this. For example, when viewed from above in the opening region 400, The shape can be rectangular, oval, circular, diamond or any combination of these. In addition, the area and the arrangement interval of the opening regions 400 are set to be smaller than that of the semiconductor device including the transistor 200. For example, the density of the transistor 200 can be set appropriately according to the design of the device. In the region where the distance is small, the area of ​​the opening region 400 is increased, or the arrangement interval of the opening region 400 is In addition, for example, in an area where the density of the transistors 200 is high, the opening area This can be achieved by narrowing the area of ​​400 or widening the intervals between the open regions.

[0391] According to one embodiment of the present invention, a novel transistor can be provided. According to one embodiment of the present invention, a semiconductor device having less variation in transistor characteristics can be provided. According to another embodiment of the present invention, a semiconductor device having favorable electrical characteristics is provided. According to one embodiment of the present invention, a semiconductor device with high reliability can be provided. According to one embodiment of the present invention, a semiconductor device having a large on-state current can be provided. According to another embodiment of the present invention, a semiconductor device having high field-effect mobility is provided. According to one embodiment of the present invention, a semiconductor device having favorable frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be manufactured. According to one embodiment of the present invention, a semiconductor device with low power consumption can be provided. can be provided.

[0392] At least a part of the configurations, methods, etc. shown in the present embodiment will be described in this specification. The present invention can be implemented in appropriate combination with other embodiments and examples described above.

[0393] (Embodiment 2) In this embodiment, a semiconductor device according to one embodiment of the present invention will be described with reference to FIGS. A method for making the body device is described.

[0394] As shown in FIG. 1A, an oxide film 230 is formed on a substrate or an undercoat film (not shown). The oxide film 230 can be formed by sputtering, CVD, MBE, PLD, or AL. The oxide 230 can be formed by the ALD method. A film with a uniform thickness can be formed even in grooves or openings with a large aspect ratio. In addition, the PEALD method allows oxidation to be performed at a lower temperature than the thermal ALD method. In this embodiment, the oxide 230 can be formed. The film is formed by sputtering.

[0395] For example, when the oxide 230 is formed by a sputtering method, the sputtering gas The sputtering gas used is oxygen or a mixture of oxygen and a rare gas. By increasing the ratio of oxygen in the oxide film, the amount of excess oxygen in the oxide film can be increased. In addition, when the above oxide film is formed by a sputtering method, the above In-M-Zn oxide A nitride target or the like can be used.

[0396] Next, the insulator 250 is formed. The insulator 250 is formed by a sputtering method or a CVD method. The insulator 250 can be formed by using an MBE method, a PLD method, an ALD method, or the like. For example, the insulator 250a and the insulator 250b on the insulator 250a may be laminated. In this embodiment, the insulator 250a may be a CV The insulator 250b is a silicon oxide nitride film formed by the D method. The insulator 250b is made of hafnium oxide with reduced hydrogen concentration. It is preferable that

[0397] Next, as shown in FIG. 1B, an insulator 254 is formed on the insulator 250b. The deposition of 250 is done by sputtering, CVD, MBE, PLD, ALD, etc. In this embodiment, the insulator 254 is formed by the ALD method. Silicon nitride is used.

[0398] Next, a conductor 260 is formed on the insulator 254. The conductor 260 is formed by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. The conductor 205 may have a laminated structure. For example, the conductor 260a and the conductor 2 In this embodiment, the conductive layer 260a is formed on the conductive layer 260b. Titanium nitride is used for 60a, and tungsten is used for conductor 260b.

[0399] Next, it is preferable to perform a heat treatment. The heat treatment is performed in a nitrogen atmosphere at a treatment temperature of 30 The temperature range is 0°C to 550°C, and the heat treatment time is 0.5 hours to 2 hours. In this embodiment, the heat treatment is performed in a nitrogen atmosphere at a treatment temperature of 400° C. The session will last for one hour.

[0400] By performing a heat treatment, hydrogen in the insulator 250a moves into and is absorbed in the insulator 250b. In other words, hydrogen in the insulator 250a diffuses into the insulator 250b.

[0401] In addition, hydrogen contained in the insulator 250a moves or diffuses into the insulator 250b. In order to reduce the hydrogen concentration in the insulating film (the insulator 250a in this example) in contact with the oxide 230, As described in the first embodiment, the oxide 230 may be a high-purity intrinsic or substantially high-purity oxide. Therefore, hydrogen is removed from the insulating film in contact with the oxide 230. By removing the above, a semiconductor device with good reliability and / or a semiconductor device with little variation can be provided. It can be provided.

[0402] At least a part of the configurations, methods, etc. shown in the present embodiment will be described in this specification. The present invention can be implemented in appropriate combination with other embodiments and examples described above.

[0403] (Embodiment 3) In this embodiment mode, one mode of a semiconductor device will be described with reference to FIGS.

[0404] [Storage device 1] An example of a semiconductor device (memory device) according to one embodiment of the present invention is illustrated in FIG. In the semiconductor device, the transistor 200 is provided above the transistor 300, and the capacitance element The transistor 100 is provided above the transistor 300 and the transistor 200. In this case, the transistor 200 described in the previous embodiment is used as the transistor 200. This can be done.

[0405] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This makes it possible to retain the memory contents for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently.

[0406] In the semiconductor device shown in FIG. 25, a wiring 1001 is electrically connected to the source of a transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the first gate of the transistor 200. 006 is electrically connected to the second gate of the transistor 200. The gate of the transistor 300 and the other of the source and drain of the transistor 200 are connected to a capacitor. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. It is electrically connected to the other.

[0407] In addition, the memory device shown in FIG. 25 has a memory cell array arranged in a matrix. It can be configured.

[0408] <Transistor 300> The transistor 300 is provided on a substrate 311 and includes a conductor 316 that functions as a gate. 3, an insulator 315 serving as a gate insulator, and a semiconductor region 31 3, and a low resistance region 314a serving as a source region or a drain region, and The transistor 300 may be a p-channel or an n-channel Any type is acceptable.

[0409] Here, the transistor 300 shown in FIG. 25 has a semiconductor region 313 ( A part of the substrate 311 has a convex shape. The side and top surfaces of the semiconductor region 313 are insulated. The conductor 316 is provided so as to cover the edge 315. Materials for adjusting the work function may be used. Since it uses a protruding part, it is also called a FIN type transistor. In addition, the insulating layer may have an insulating material that functions as a mask for forming the protrusions. Here, a case where a protrusion is formed by processing a part of a semiconductor substrate is shown, but a SOI substrate is also processed. A semiconductor film having a convex shape may be formed by the above-mentioned method.

[0410] Note that the transistor 300 shown in FIG. 25 is just an example, and the present invention is not limited to this structure. Appropriate transistors may be used depending on the configuration or driving method.

[0411] <Capacitive element 100> The capacitor 100 is provided above the transistor 200. a conductor 110 serving as the first electrode, a conductor 120 serving as the second electrode, and The insulator 130 functions as a dielectric. It is preferable to use an insulator that can be used as the insulator 283 shown in the embodiment.

[0412] Also, for example, the conductor 112 provided on the conductor 246 and the conductor 110 are formed at the same time. Note that the conductor 112 can be used for the capacitor 100, the transistor 200, and has a function as a plug or wiring that is electrically connected to the transistor 300 .

[0413] In FIG. 25, the conductor 112 and the conductor 110 are shown to have a single-layer structure. However, the present invention is not limited to this, and may be a laminated structure of two or more layers. For example, Conductors that have barrier properties between weak conductors and those with high electrical conductivity have good adhesion to conductors with high electrical conductivity. may form a highly conductive material.

[0414] The insulator 130 may be, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, nitrogen Aluminum oxide, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium The conductive layer may be formed as a laminate or a single layer.

[0415] For example, the insulator 130 may be made of a material with high dielectric strength, such as silicon oxynitride, or a material with high dielectric strength. It is preferable to use a laminated structure with a high-k material. The element 100 has a high dielectric constant (high-k) insulator, so that it can ensure sufficient capacitance. By using an insulator having a large dielectric strength, the dielectric strength is improved, and the electrostatic breakdown of the capacitance element 100 is prevented. This can suppress the destruction.

[0416] In addition, oxide is an insulator for high dielectric constant (high-k) materials (materials with a high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxide, Oxynitride with Aluminum and Hafnium, Silicon and Hafnium an oxide having silicon and hafnium, an oxide nitride having silicon and hafnium, or an oxide nitride having silicon and hafnium Nitrides containing fluorine.

[0417] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and oxynitride. Silicon oxide, silicon nitride, silicon nitride, silicon oxide doped with fluorine, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, vacancy-containing silicon oxide Examples include concrete or resin.

[0418] <Wiring layer> Between each structure, a wiring layer is provided in which an interlayer film, wiring, plugs, etc. are provided. Also, a plurality of wiring layers may be provided according to the design. Conductors that function as wiring or wiring may be grouped together and given the same symbol. In addition, in the present specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, when a part of the conductor functions as a wiring, or when the conductor In some cases, some parts also function as plugs.

[0419] For example, an insulator 320, an insulator 322, and an insulator 323 are provided on the transistor 300 as an interlayer film. The edge member 324 and the insulator 326 are laminated in this order. The insulators 322, 324, and 326 are connected to the capacitive element 100 or the transistor. A conductor 328 and a conductor 330 are embedded in the conductive layer 200. The conductor 328 and the conductor 330 function as plugs or wiring.

[0420] In addition, the insulator that functions as an interlayer film acts as a flattening film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be chemically mechanically polished ( The surface may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like.

[0421] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In the insulating layer 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or a wiring.

[0422] Similarly, the insulators 210, 212, 214, and 216 are each provided with a conductive The conductive body 218 and the conductive body (conductive body 205) constituting the transistor 200 are embedded. Note that the conductor 218 is electrically connected to the capacitor 100 or the transistor 300. The conductor 120 and the insulator 130 function as a plug or wiring for connecting the conductor 120 and the insulator 130. On top of 130 is an insulator 150 .

[0423] Here, like the insulator 241 shown in the above embodiment, the conductor 240 functions as a plug. An insulator 217 is provided in contact with the side surface of the insulator 18. The insulator 217 is made of the insulator 210 and the insulator 212, insulator 214, and insulator 216 are provided in contact with the inner walls of the openings formed therein. That is, the insulator 217 is made up of the conductor 218, the insulator 210, the insulator 212, and the insulator The conductor 205 is provided between the conductor 214 and the insulator 216. Since the insulator 217 can be formed in parallel with the conductor 205, the insulator 217 is in contact with the side of the conductor 205. Sometimes it may be formed.

[0424] The insulator 217 may be, for example, silicon nitride, aluminum oxide, or silicon nitride oxide. The insulator 217 may be an insulator such as silicon. Since the insulating member 210 or the insulating member 222 is provided in contact with the insulating member 214 and the insulating member 222, Impurities such as water or hydrogen from 16, etc., are mixed into the oxide 230 through the conductor 218. In particular, silicon nitride has a high blocking effect against hydrogen. In addition, oxygen contained in the insulator 210 or the insulator 216 is preferably contained in the conductor 218. can prevent it from being absorbed into the

[0425] Insulator 217 can be formed in a manner similar to insulator 241. For example, PEA Silicon nitride is deposited using the LD method, and the conductor 356 is reached using anisotropic etching. It is sufficient to form an opening through which the

[0426] Insulators that can be used as the interlayer film include oxides, nitrides, and oxides having insulating properties. These include metal nitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0427] For example, by using a material with a low relative dielectric constant for the insulator that functions as an interlayer film, Therefore, depending on the function of the insulator, the material It is recommended to select:

[0428] For example, the insulators 150, 210, 352, and 354 have relatively low resistance. It is preferable to have an insulator with a low dielectric constant. For example, the insulator may be fluorinated. Silicon oxide, silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen, It is preferable that the insulating material has silicon oxide or resin having voids. Silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, fluorine-added Silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen It is preferable that the insulating layer has a laminated structure of silicon oxide having pores or holes and a resin. Silicon and silicon oxynitride are thermally stable, so by combining them with resin, As a result, it is possible to obtain a laminated structure that is thermally stable and has a low relative dielectric constant. Polyester, polyolefin, polyamide (nylon, aramid, etc.), polyimide, Polycarbonate or acrylic.

[0429] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Therefore, the insulators 214, 212, and 350 can be filled with hydrogen and the like. An insulator having a function of suppressing the permeation of impurities and oxygen may be used.

[0430] Examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, the following insulators have the function of suppressing the permeation of impurities such as hydrogen and oxygen: Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide tungsten oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tungsten oxide Metal oxides such as talc, silicon oxide nitride, silicon nitride, etc. can be used. .

[0431] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Sodium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium Materials containing one or more metal elements selected from the group consisting of ruthenium and lithium can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as arsenic, A silicide such as nickel silicide may also be used.

[0432] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., may be a metal material, an alloy material, a metal nitride material, or the like formed from the above-mentioned materials. Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. It is preferable to use a high melting point material such as tungsten or molybdenum that is also conductive. It is preferable to use tungsten. Alternatively, low resistance conductive materials such as aluminum and copper may be used. It is preferable to form the wiring from a low-resistance conductive material. can be done.

[0433] <Wiring or plug of layer provided with oxide semiconductor> When an oxide semiconductor is used for the transistor 200, excess An insulator having an oxygen region may be provided. In this case, the insulator having the excess oxygen region and an insulator having a barrier property is provided between the conductor and the insulator having the excess oxygen region. It is preferable to provide such a function.

[0434] For example, in FIG. 25, insulator 224 and insulator 280 have excess oxygen, and conductor 2 40, an insulator 241 may be provided between the insulator 241 and the insulator 222 and the insulator 240. 82 and the insulator 283 are provided in contact with each other, The star 200 can be structured to be sealed with an insulator having barrier properties.

[0435] In other words, by providing the insulator 241, the excess of the insulators 224 and 280 It is possible to suppress the absorption of oxygen into the conductor 240. By having the above, hydrogen, which is an impurity, diffuses into the transistor 200 through the conductor 240. This can suppress the occurrence of

[0436] The insulator 241 is made of a material that suppresses the diffusion of impurities such as water or hydrogen, and oxygen. For example, silicon nitride, silicon oxide nitride, It is preferable to use aluminum oxide or hafnium oxide. In particular, silicon nitride is Magnesium oxide is preferred because it has a high blocking ability against hydrogen. Nesium, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, acid Metal oxides such as lanthanum oxide, neodymium oxide, or tantalum oxide can be used. do.

[0437] As described in the above embodiment, the transistor 200 includes the insulator 212 and the insulator Alternatively, the insulating member 214, the insulating member 282, and the insulating member 283 may be sealed. By this configuration, hydrogen contained in the insulators 274 and 150 is absorbed in the insulators 280 and the like. This can reduce contamination of the

[0438] Here, the insulator 283 and the insulator 282 are connected to the conductor 240, the insulator 214 and the The conductor 218 penetrates the insulator 212, but as described above, the insulator 241 is in contact with the conductor 218. 40, and an insulator 217 is provided in contact with a conductor 218. 212, insulator 214, insulator 216, and insulator 218 are connected via conductor 240 and conductor 218. In this way, hydrogen that gets mixed into the inside of the insulating body 283 can be reduced. The insulators 212, 214, 282, 283, and 241 are The transistor 200 is sealed with an insulator 217, and impurities such as hydrogen contained in the insulator 274 are removed. It is possible to reduce contamination from the outside.

[0439] <Dicing line> In the following, a large-area substrate is divided into individual semiconductor elements to produce multiple semiconductor devices. Dicing lines (scribe lines, dividing lines) are provided when extracting chips. The following describes the method of cutting the wire. First, grooves (dicing lines) for dividing the semiconductor elements are formed on the substrate, and then the dicing In some cases, the substrate is cut at a grinding line and divided (divided) into a plurality of semiconductor devices.

[0440] Here, for example, as shown in FIG. 25, the area where the insulator 283 and the insulator 214 contact each other It is preferable to design the dicing line so that the dicing line overlaps the dicing line. In the vicinity of the region that will become the dicing line provided on the outer edge of the memory cell having the data buffer 200, The insulators 282, 280, 275, 224, and 222 are An opening is provided in the insulator 216 .

[0441] That is, the insulator 282, the insulator 280, the insulator 275, the insulator 224, the insulator 222, In addition, the insulator 214 and the insulator 283 are in contact with each other at the opening provided in the insulator 216 .

[0442] Also, for example, the insulator 282, the insulator 280, the insulator 275, the insulator 224, the insulator 2 An opening may be provided in the insulating material 22, the insulating material 216, and the insulating material 214. As a result, the insulators 282, 280, 275, 224, 222, Insulator 212 and insulator 283 are connected to each other through an opening in edge 216 and insulator 214. At this time, the insulator 212 and the insulator 283 are formed using the same material and the same method. The insulator 212 and the insulator 283 may be formed of the same material and by the same method. For example, it is preferable to use silicon nitride.

[0443] With this structure, the insulators 212, 214, 282, and 283 , which can encapsulate the transistor 200. At least one of the insulating material 282 and the insulating material 283 has a function of suppressing the diffusion of oxygen, hydrogen, and water. Therefore, the substrate is divided into circuit regions each having a semiconductor element as shown in this embodiment mode. By dividing the substrate into multiple chips, hydrogen or other impurities can be easily absorbed from the side of the divided substrate. This can prevent impurities such as water from entering and diffusing into the transistor 200.

[0444] In addition, this structure prevents excess oxygen in the insulator 280 and the insulator 224 from diffusing to the outside. Therefore, the excess oxygen in the insulator 280 and the insulator 224 can be prevented from The oxide is then efficiently applied to the transistor 200, forming the channel therein. The oxygen vacancies in the oxide in which the channel of the transistor 200 is formed are reduced by the use of the nitrogen atom. This allows the oxide in which the channel in the transistor 200 is formed to be formed. The oxide semiconductor can have a low density of defect states and stable characteristics. The fluctuation of the electrical characteristics of the transistor 200 can be suppressed and the reliability can be improved. do.

[0445] In the memory device shown in FIG. 25, the shape of the capacitor element 100 is a planar type. The storage device shown in the embodiment is not limited to this. For example, as shown in FIG. Alternatively, the shape of the capacitive element 100 may be a cylinder. The configuration below the edge 150 is similar to that of the semiconductor device shown in FIG.

[0446] The capacitance element 100 shown in FIG. 26 includes an insulator 150 on an insulator 130 and a An insulator 142 and a conductor disposed within an opening formed in the insulator 150 and the insulator 142. A conductor 115, an insulator 145 on the conductor 115 and the insulator 142, and a The semiconductor device has a conductor 125 and an insulator 152 on the conductor 125 and the insulator 145. The conductor 115 and the insulator 142 are inserted into the openings formed in the insulator 150 and the insulator 142. 5, and at least a portion of the conductor 125 is disposed thereon.

[0447] The conductor 115 functions as a lower electrode of the capacitor 100, and the conductor 125 functions as a lower electrode of the capacitor 100. 0, and insulator 145 serves as a dielectric for capacitive element 100. In the openings of the insulator 150 and the insulator 142, the capacitance element 100 is provided with a bottom surface, The upper and lower electrodes are also opposed to each other on the side with a dielectric material between them. The capacitance per area can be increased. In this way, the capacitance of the capacitance element 100 can be increased. By increasing the capacitance per unit area, miniaturization or high integration of semiconductor devices can be achieved. can be promoted.

[0448] The insulator 152 may be made of any insulator that can be used for the insulator 280. The edge 142 acts as an etch stop when forming the opening in the insulator 150. It is preferable to use an insulator that can be used for the insulator 214.

[0449] The shape of the openings formed in the insulator 150 and the insulator 142 when viewed from above is rectangular. Alternatively, the shape may be a polygon other than a rectangle, or the corners of the polygon may be rounded. Here, when viewed from above, the opening may be in a circular shape including an ellipse. It is preferable that the overlapping area between the gate and the transistor 200 is large. As a result, the area occupied by the semiconductor device having the capacitor element 100 and the transistor 200 can be reduced. This can be done.

[0450] The conductor 115 is disposed in contact with an opening formed in the insulator 142 and the insulator 150. It is preferable that the upper surface of the conductor 115 is approximately flush with the upper surface of the insulator 142. The lower surface of the conductor 115 contacts the conductor 110 through the opening of the insulator 130. The film 15 is preferably formed by ALD or CVD. For example, Any conductor that can be used for 205 may be used.

[0451] The insulator 145 is disposed to cover the conductor 115 and the insulator 142. For example, It is preferable to form the insulator 145 by using an ALD method or a CVD method. 45 is, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, Zirconium oxide, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, Aluminum nitride, hafnium oxide, hafnium oxynitride, hafnium oxynitride, hafnium nitride For example, the insulator 1 may be made of fluorine or the like, and may be formed as a laminate or a single layer. 45, zirconium oxide, aluminum oxide, zirconium oxide are layered in this order. An insulating film having such a structure can be used.

[0452] The insulator 145 is made of a material with high dielectric strength, such as silicon oxide nitride, or a material with high dielectric strength. It is preferable to use high-k materials. Alternatively, materials with high dielectric strength and high A stack of dielectric (high-k) materials may also be used.

[0453] In addition, oxide is an insulator for high dielectric constant (high-k) materials (materials with a high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxide, Oxynitride with Aluminum and Hafnium, Silicon and Hafnium oxides having silicon and hafnium; oxide nitrides having silicon and hafnium; By using such high-k materials, the insulator 1 Even if the insulator 45 is made thick, the capacitance of the capacitance element 100 can be sufficiently secured. By making the thickness of the conductor 115 and the conductor 125 thicker, the leakage current occurring between the conductor 115 and the conductor 125 is suppressed. It is possible.

[0454] On the other hand, materials with high dielectric strength include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, silicon nitride, silicon oxide with fluorine, silicon oxide with carbon, Examples include silicon oxide doped with carbon and nitrogen, silicon oxide having voids, and resin. For example, silicon nitride (SiN x ), using the PEALD method Silicon oxide (SiO x ), and silicon nitride (S iN x Alternatively, an insulating film having a structure in which zirconium oxide, The insulating film is made by laminating silicon oxide and zirconium oxide in that order using the ALD method. By using such an insulator with high dielectric strength, This improves the capacitance and suppresses electrostatic damage to the capacitance element 100.

[0455] The conductor 125 is disposed so as to fill the openings formed in the insulators 142 and 150. The conductor 125 is connected to the wiring 10 via the conductor 140 and the conductor 153. The conductor 125 is formed by using the ALD method or the CVD method. For example, a conductive material that can be used for the conductive material 205 may be used. stomach.

[0456] The conductor 153 is provided on an insulator 154 and is covered with an insulator 156. The conductor 153 may be made of any conductor that can be used for the conductor 112. The insulator 156 may be an insulator that can be used for the insulator 152. 53 is in contact with the upper surface of the conductor 140, and It serves as a terminal of transistor 300 .

[0457] [Storage device 2] An example of a semiconductor device (memory device) according to one embodiment of the present invention is illustrated in FIG.

[0458] <Memory device configuration example> FIG. 27 is a cross-sectional view of a semiconductor device having a memory device 290. The memory device 290 includes, in addition to the transistor 200 shown in FIGS. 27 is a cross-sectional view of the transistor 200 in the channel length direction. is equivalent to.

[0459] The capacitance device 292 is made up of a conductor 242b and an insulator 27 disposed on the conductor 242b. 1b, the upper surface of the insulator 271b, the side surface of the insulator 271b, and the side surface of the conductor 242b. The capacitor 270 has an insulator 275 and a conductor 294 on the insulator 275. The capacitance device 292 is a MIM (Metal-Insulator-Metal) capacitance. One of the pair of electrodes of the capacitance device 292, that is, the conductor 24 2b can also serve as the source electrode of the transistor. The dielectric layer includes a protective layer, i.e., an insulator 271, and an insulating layer, which are provided for the transistor. Therefore, in the manufacturing process of the capacitance device 292, Since part of the manufacturing process of the transistor can be used for the semiconductor device, the semiconductor device can be manufactured with high productivity. In addition, one of the pair of electrodes of the capacitance device 292, that is, a conductive The capacitor 242b also serves as the source electrode of the transistor. It is possible to reduce the area in which the vice is arranged.

[0460] For the conductor 294, for example, a material that can be used for the conductor 242 is used. That's good.

[0461] <Modifications of memory device> In the following, the above-mentioned memory device will be described with reference to Figs. 28(A), 28(B) and 29. A transistor 200 according to one embodiment of the present invention, which is different from that shown in the configuration example of the transistor An example of a semiconductor device having a capacitor device 292 will be described. In the semiconductor device shown in FIG. 28B and FIG. 29, The semiconductor device shown in the Device Configuration Example (see FIG. 27) has the same structure and function as the semiconductor device shown in the Device Configuration Example (see FIG. 27). In this section, the transistor 200 and the capacitor The materials constituting the quantum device 292 are the same as those in the previous embodiment and the memory device configuration. The materials described in detail in Example can be used. In FIG. 29 and other figures, the memory device shown in FIG. 27 is used as the memory device. However, this is not limited to this.

[0462] <<Memory Device Variation 1>> In the following, a transistor 200a, a transistor 200b, and a capacitor according to one embodiment of the present invention will be described. As an example of a semiconductor device 600 having a capacitance device 292a and a capacitance device 292b, This will be explained with reference to FIG.

[0463] FIG. 28A shows a transistor 200a, a transistor 200b, and a capacitance device 292. 6A and 6B are cross-sectional views in the channel length direction of a semiconductor device 600 having a capacitance device 292b. Here, the capacitive device 292a is a conductor 242a and an insulator on the conductor 242a. 271a, the upper surface of the insulator 271a, the side surface of the insulator 271a, and the side surface of the conductor 242a The capacitor 272 has an insulator 275 in contact with the capacitor 272 and a conductor 294a on the insulator 275. The vice 292b includes a conductor 242b, an insulator 271b on the conductor 242b, and an insulator 271b. The insulator 271b contacts the upper surface of the insulator 271b, the side surface of the insulator 271b, and the side surface of the conductor 242b. 5 and conductor 294b on insulator 275.

[0464] As shown in FIG. 28A, the semiconductor device 600 has a symmetrical axis along the dashed line A3-A4. The source electrode or drain electrode of the transistor 200a is One of the electrodes and one of the source electrode and drain electrode of the transistor 200b is connected to the conductor 242. In addition, an insulator 271c is provided on the conductor 242c. In addition, a conductor 246 that functions as a wiring, a transistor 200a, and a transistor The conductor 240 also functions as a plug for connection to the connector 200b. In this way, two transistors, two capacitance devices, and connections between wiring and plugs are By adopting the above-mentioned configuration, it is possible to provide a semiconductor device that can be miniaturized or highly integrated. do.

[0465] The transistor 200a, the transistor 200b, the capacitance device 292a, and the capacitance device The configuration and effects of each of the devices 292b are shown in FIG. The configuration example can be referred to.

[0466] <<Memory Device Modification 2>> In the above, the transistor 200a and the transistor 20 0b, the capacitance device 292a, and the capacitance device 292b are given. The semiconductor device is not limited to this. For example, as shown in FIG. The device 600 and a semiconductor device having a similar configuration to the semiconductor device 600 are connected via a capacitance section. In this specification, the transistor 200a and the transistor 20 0b, the capacitance device 292a, and the semiconductor device having the capacitance device 292b are called a cell. The transistor 200a, the transistor 200b, the capacitance device 292a and the capacitance The configuration of the quantum device 292b is the same as that of the transistor 200a and the transistor 20 0b, the description of the capacitance device 292a and the capacitance device 292b can be taken into consideration. Cut.

[0467] FIG. 28B shows a transistor 200a, a transistor 200b, and a capacitance device 292. a, and a semiconductor device 600 having a capacitance device 292b, and a semiconductor device 600 similar to the semiconductor device 600 FIG. 1 is a cross-sectional view in which cells having the above configuration are connected via a capacitance portion.

[0468] As shown in FIG. 28B, one of the capacitance devices 292b included in the semiconductor device 600 is The conductor 294b functioning as an electrode is a semiconductor device having a similar configuration to the semiconductor device 600. The electrode also serves as one of the electrodes of the capacitance device of the device 601. However, the semiconductor device 600 has a conductive layer that functions as one electrode of the capacitance device 292a. The body 294a is adjacent to the left side of the semiconductor device 600, that is, in the A1 direction in FIG. The electrode also serves as one of the electrodes of the capacitance device of the semiconductor device 601. The cell on the A2 side in FIG. 28(B) has a similar configuration. In other words, a cell array (also called a memory device layer) can be constructed. By configuring the cell array, the distance between adjacent cells can be reduced, This allows the projection area of ​​the filter array to be reduced, enabling high integration. By arranging the cell array configuration shown in Fig. 1 in a matrix, a matrix cell array is obtained. It is possible to construct the above.

[0469] As described above, in the configuration shown in this embodiment, the transistor 200a and the transistor 20 0b, capacitance device 292a and capacitance device 292b are formed to form the The area can be reduced, and the miniaturization or high integration of a semiconductor device having a cell array can be achieved. do.

[0470] The cell array may be configured not only in a plane but also in a stacked structure. As shown in FIG. 29, a plurality of cell arrays ( By stacking the cell arrays 610_1 to 610_n, The cells can be integrated and arranged without increasing the occupied area. A ray can be constructed.

[0471] At least a part of the configurations, methods, etc. shown in the present embodiment will be described in this specification. The present invention can be implemented in appropriate combination with other embodiments and examples described above.

[0472] (Embodiment 4) In this embodiment, Figs. 30(A), 30(B) and 31(A) to 31(H) A transistor using an oxide as a semiconductor (hereinafter, referred to as an OS transistor) according to one embodiment of the present invention is manufactured by using the above. ) and a storage device to which a capacitive element is applied (hereinafter, O The OS memory device is at least as large as The memory device has a capacitance element and an OS transistor that controls the charging and discharging of the capacitance element. Since the off-state current of the transistor is extremely small, the OS memory device has excellent retention characteristics. It can function as a non-volatile memory.

[0473] <Storage device configuration example> FIG. 30A shows an example of the configuration of an OS memory device. The memory device 1400 includes a peripheral circuit 1 411, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 142 0, column circuitry 1430, output circuitry 1440, and control logic circuitry 1460. do.

[0474] The column circuits 1430 include, for example, column decoders, precharge circuits, sense amplifiers, write The precharge circuit has a function of precharging the wiring. The amplifier has a function of amplifying the data signal read from the memory cell. The lines are wirings connected to memory cells in the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal RDA TA to the outside of the memory device 1400. It has a decoder, a word line driver circuit, etc., and can select a row to be accessed.

[0475] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 11, and the high power supply voltage (VIL) for the memory cell array 1470. The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The data signal WDATA is input to the write circuit. do.

[0476] The control logic circuit 1460 receives control signals (CE, WE, R E) to generate control signals for the row decoder and column decoder. The control signal WE is a write enable signal, and the control signal R E is a read enable signal. The signal is not limited to this, and other control signals may be input as necessary.

[0477] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the recell MC, the number of memory cells MC in one row, etc.

[0478] In FIG. 30A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. Although an example of forming the insulating film on a surface has been shown, the present embodiment is not limited to this. For example, as shown in FIG. 30B, the memory cell array 1411 is provided on a part of the peripheral circuit 1411. 70 may be provided so as to overlap the memory cell array 1470. For example, In this way, a sense amplifier may be provided.

[0479] FIG. 31(A) to FIG. 31(H) show memory cell configurations that can be applied to the above-mentioned memory cell MC. An example will be described.

[0480] [DOSRAM] 31(A) to 31(C) show examples of circuit configurations of memory cells in a DRAM. In the literature, DRAM using a memory cell with one OS transistor and one capacitor element is called DO SRAM(Dynamic Oxide Semiconductor Random The memory cell 14 shown in FIG. 71 includes a transistor M1 and a capacitance element CA. The transistor M1 is It has a gate (sometimes called a top gate) and a back gate.

[0481] A first terminal of the transistor M1 is connected to a first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring LL.

[0482] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. LL functions as a wiring for applying a predetermined potential to the second terminal of the capacitance element CA. When writing and reading data, the line LL is at ground potential or low level potential. The wiring BGL may be used for applying a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, the transistor M The threshold voltage of 1 can be increased or decreased.

[0483] Here, the memory cell 1471 shown in FIG. 31A corresponds to the memory device shown in FIG. That is, the transistor M1 corresponds to the transistor 200, and the capacitive element CA corresponds to the capacitive device It is compatible with 292.

[0484] In addition, the memory cell MC is not limited to the memory cell 1471, and the circuit configuration may be changed. For example, the memory cell MC can be a memory cell 1472 shown in FIG. In addition, the back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell 14 shown in FIG. As shown in FIG. 73, a transistor having a single gate structure, i.e., a transistor without a back gate, The memory cell may be configured with a resistor M1.

[0485] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. By using an OS transistor as the transistor M1, This makes it possible to make the leakage current of the transistor M1 very small. The transistor M1 allows the data to be retained for a long time, reducing the frequency of refreshing the memory cells. In addition, the refresh operation of the memory cells can be eliminated. In addition, since the leakage current is very small, the memory cells 1471 and 147 2. The memory cell 1473 can hold multi-value data or analog data. do.

[0486] In addition, in the DOSRAM, as described above, By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0487] [NOSRAM] FIG. 31D to FIG. 31G show a gain cell type memory having two transistors and one capacitance element. The circuit configuration of the memory cell 1474 shown in FIG. The transistor M2 has a capacitance element CB. The present specification, etc. In the present invention, a gain cell type memory cell using an OS transistor is provided as the transistor M2. The storage device that It is sometimes called a RAM.

[0488] A first terminal of the transistor M2 is connected to a first terminal of the capacitance element CB, and the transistor M The second terminal of the transistor M2 is connected to the wiring WBL, and the gate of the transistor M3 is connected to the wiring WOL. The back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the transistor M1 is connected to the wiring CAL. The first terminal of the transistor M2 is connected to the wiring R BL, the second terminal of the transistor M3 is connected to the line SL, and the second terminal of the transistor M The gate of 3 is connected to a first terminal of the capacitance element CB.

[0489] The wiring WBL functions as a write bit line, and the wiring RBL functions as a read bit line. The wiring WOL functions as a word line. The wiring CAL is connected to the second It functions as a wiring for applying a specific potential to the terminal. When reading out the data, it is preferable to apply a high level potential to the wiring CAL. During data retention, it is preferable to apply a low level potential to the wiring CAL. The wiring BGL functions as a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, the threshold voltage of the transistor M2 The voltage can be increased or decreased.

[0490] Here, the memory cell 1474 shown in FIG. 31(D) is the same as the memory device shown in FIGS. That is, the transistor M2 corresponds to the transistor 200, and the capacitance element CB corresponds to The capacitor 100 is connected to the transistor M3, the transistor M4 is connected to the transistor 300, and the wiring WBL is connected to the wiring 100. 3, the wiring WOL is connected to the wiring 1004, the wiring BGL is connected to the wiring 1006, and the wiring CAL is connected to the wiring 1 005, the wiring RBL corresponds to the wiring 1002, and the wiring SL corresponds to the wiring 1001.

[0491] In addition, the memory cell MC is not limited to the memory cell 1474, and the circuit configuration may be appropriately changed. For example, the memory cell MC can be the memory cell 1475 shown in FIG. In this way, the back gate of the transistor M2 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell shown in FIG. Like the 1476, it has a single-gate transistor, i.e. no back gate. The memory cell may be configured with a transistor M2. For example, the memory cell MC As shown in FIG. 31G, a memory cell 1477 is formed by connecting a wiring WBL and a wiring RBL in a single line. The wiring BIL may be integrated.

[0492] When the semiconductor device described in the above embodiment is used for the memory cell 1474 or the like, The transistor 200 is used as M2, and the transistor 300 is used as M3. The capacitance element CB can be a capacitance element 100. By using an OS transistor, the leakage current of transistor M2 is made very small. This allows the written data to be stored for a long time by the transistor M2. Since the memory cells can be maintained at a constant level, the frequency of refreshing the memory cells can be reduced. In addition, the refresh operation of the memory cells can be eliminated. Since the memory cell 1474 is always small, it is possible to store multi-value data or analog data. The same can be said for memory cells 1475 to 1477.

[0493] The transistor M3 is a transistor having silicon in the channel formation region (hereinafter The conductivity type of the Si transistor may be The Si transistor may be an n-channel type or a p-channel type. In some cases, the field effect mobility is higher than that of the read transistor. A Si transistor may be used as the transistor M3 that functions as the By using a Si transistor for transistor M3, a transistor Since the memory cell can be provided with a transistor M2, the area occupied by the memory cell can be reduced, and the memory device can be made more efficient. Integration can be achieved.

[0494] The transistor M3 may be an OS transistor. When an OS transistor is used for the transistor M3, the memory cell array 1470 is The circuit can be constructed using only transistors.

[0495] FIG. 31(H) shows an example of a gain cell type memory cell having three transistors and one capacitance element. The memory cell 1478 shown in FIG. 6, and a capacitor element CC. The capacitor element CC is provided as appropriate. is electrically connected to the wiring BIL, wiring RWL, wiring WWL, wiring BGL, and wiring GNDL. The wiring GNDL is a wiring that applies a low level potential. The wiring 478 may be electrically connected to the wiring RBL and the wiring WBL instead of the wiring BIL.

[0496] The transistor M4 is an OS transistor having a back gate. The back gate and gate of the transistor M4 are electrically connected to the wiring BGL. Alternatively, the transistor M4 may have a back gate. It's not necessary.

[0497] The transistors M5 and M6 are n-channel Si transistors. Alternatively, the transistors M4 to M5 may be p-channel Si transistors. The transistor M6 may be an OS transistor. In this case, the memory cell array 1470 is configured as an n-type transistor. The circuit can be constructed using only transistors.

[0498] When the semiconductor device described in the above embodiment is used for the memory cell 1478, the transistor M The transistor M4 is a transistor 200, and the transistors M5 and M6 are transistors The transistor 300 can be used as the capacitance element CC, and the capacitance element 100 can be used as the capacitance element CC. By using an OS transistor as transistor M4, the leakage current of transistor M4 is The flow can be very small.

[0499] The configurations of the peripheral circuit 1411, the memory cell array 1470, and the like shown in this embodiment are However, the above is not limited to the above. The arrangement or functions of road elements, etc. may be changed, deleted, or added as necessary. A storage device according to one embodiment of the present invention has high operation speed and can retain data for a long period of time.

[0500] The configuration, method, etc. described in this embodiment may be used in combination with other configurations, methods, etc. described in this embodiment. The present invention can be used in appropriate combination with the configurations, methods, and the like shown in the embodiment modes.

[0501] (Embodiment 5) In this embodiment, the semiconductor device of the present invention will be described with reference to FIG. 32(A) and FIG. 32(B). An example of a mounted chip 1200 is shown. The chip 1200 includes multiple circuits (systems). In this way, the technology of integrating multiple circuits (systems) onto a single chip is sometimes called a system on chip (SoC).

[0502] As shown in FIG. 32A, the chip 1200 includes a CPU 1211, a GPU 1212, and a or a plurality of analog arithmetic units 1213, one or a plurality of memory controllers 1214, or a plurality of interfaces 1215, one or a plurality of network circuits 1216, etc. Yes.

[0503] The chip 1200 is provided with bumps (not shown), and as shown in FIG. The first surface of the package substrate 1201 is connected to the first surface of the package substrate 1201. A plurality of bumps 1202 are provided on the back surface of the surface, and are connected to a motherboard 1203. do.

[0504] The motherboard 1203 is provided with storage devices such as a DRAM 1221 and a flash memory 1222. For example, the DRAM 1221 may be provided with a DOSR as shown in the previous embodiment. For example, the flash memory 1222 may be The NOSRAM shown in FIG.

[0505] The CPU 1211 preferably has multiple CPU cores. It is preferable that the CPU 1211 and the GPU 1 have multiple GPU cores. Each of the CP 212 may have a memory for temporarily storing data. A memory common to U1211 and GPU1212 is provided on chip 1200. The memory may be the above-mentioned NOSRAM or DOSRAM. The GPU1212 is also suitable for parallel calculation of a large amount of data, and is ideal for image processing or multiplication. The GPU 1212 is an image processor using the oxide semiconductor of the present invention. By providing a logic circuit or a multiply-and-accumulate circuit, image processing and multiply-and-accumulate operations can be performed with low power consumption. It becomes possible to execute.

[0506] In addition, the CPU 1211 and GPU 1212 are integrated on the same chip, The wiring between the CPU1211 and the GPU1212 can be shortened, and the Data transfer from the CPU 1211 to the GPU 1212, memory of the CPU 1211 and the GPU 1212 After data transfer between GPU1212 and calculation in GPU1212, the data is transferred from GPU1212 to CPU12. The calculation results can be transferred to 11 at high speed.

[0507] The analog calculation unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital The analog calculation unit 1213 has one or both of a digital / analog conversion circuit and a digital / analog conversion circuit. The multiply-and-accumulate circuit may be provided in the

[0508] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. and a circuit that functions as an interface with the flash memory 1222.

[0509] The interface 1215 includes a display device, a speaker, a microphone, a camera, a The controller has an interface circuit for connecting to external devices such as a Such interfaces include computers, mobile phones, keyboards, and game controllers. USB (Universal Serial Bus), HDMI (registered trademark) High-Definition Multimedia Interface) There can be.

[0510] The network circuit 1216 is a LAN (Local Area Network) or the like. It may also have a circuit for network security. stomach.

[0511] The above circuits (systems) can be formed in the chip 1200 in the same manufacturing process. Therefore, even if the number of circuits required for the chip 1200 increases, the manufacturing process can be increased. This eliminates the need for a soldering process, and the chip 1200 can be produced at low cost.

[0512] A package substrate 1201 on which a chip 1200 having a GPU 1212 is mounted, a DRA The motherboard 1203 on which the M1221 and the flash memory 1222 are provided is It can be referred to as a PU module 1204 .

[0513] The GPU module 1204 includes a chip 1200 using SoC technology. Its size can be reduced. Also, its excellent image processing capabilities make it a smart device. Phones, tablet devices, laptop PCs, portable (portable) game consoles, etc. It is suitable for use in portable electronic devices. Deep Neural Networks (DNNs), Convolutional Neural Networks (CNN), Recurrent Neural Network (RNN), Autoencoder, Deep Boltzmann It can implement techniques such as deep belief networks (DBNs) and deep learning machines (DBMs). Therefore, the chip 1200 is an AI chip, or the GPU module 1204 is an AI system module. It can be used as a module.

[0514] At least a part of the configurations, methods, etc. shown in the present embodiment will be described in this specification. The present invention can be implemented in appropriate combination with other embodiments and examples described above.

[0515] (Embodiment 6) This embodiment mode relates to an electronic component and an electronic device in which the memory device or the like shown in the above embodiment mode is incorporated. An example of a child device is shown.

[0516] <Electronic components> First, an example of an electronic component incorporating a memory device 720 is shown in FIG. 33(A) and FIG. 33(B). ) will be used for the explanation.

[0517] FIG. 33A shows an electronic component 700 and a substrate on which the electronic component 700 is mounted (a substrate 70 33(A) shows an electronic component 700 having a memory device in a mold 711. 33A is partially omitted in order to show the inside of the electronic component 700. The electronic component 700 has lands 712 on the outside of the mold 711. 712 is electrically connected to an electrode pad 713, and the electrode pad 713 is connected to a memory device 720. The electronic component 700 is electrically connected to a printed circuit board 7 02. Multiple such electronic components are combined and each is mounted on a printed circuit board. By electrically connecting the components on 702, a mounting board 704 is completed.

[0518] The memory device 720 includes a driver circuit layer 721 and a memory circuit layer 722 .

[0519] FIG. 33B shows a perspective view of the electronic component 730. The electronic component 730 is a SiP (System in Package) em in package) or MCM (Multi Chip Module) This is an example. The electronic component 730 is mounted on a package substrate 732 (printed circuit board). A semiconductor device 735 and a plurality of memory cells are provided on the interposer 731. An apparatus 720 is provided.

[0520] In the electronic component 730, the storage device 720 is a high bandwidth memory (HBM). The semiconductor device 735 is used as a C Integrated circuits (semiconductor devices) such as PUs, GPUs, and FPGAs can be used.

[0521] The package substrate 732 may be a ceramic substrate, a plastic substrate, a glass epoxy substrate, or the like. The interposer 731 may be a silicon interposer, a resin interposer, or the like. A tarposer or the like can be used.

[0522] The interposer 731 has a plurality of wirings and electrically connects a plurality of integrated circuits having different terminal pitches. The wiring has a function of electrically connecting the wiring. The wiring is provided in a single layer or in multiple layers. The interposer 731 supports the integrated circuit provided on the interposer 731 on the package substrate 7 The interposer has a function of electrically connecting to the electrode provided on the interposer. The interposer is sometimes called a "rewiring board" or "intermediate board." 1, a through electrode is provided, and the integrated circuit and the package substrate 732 are electrically connected by the through electrode. In addition, in silicon interposers, TSV ( Through Silicon Via can also be used.

[0523] It is preferable to use a silicon interposer as the interposer 731. Since there is no need to provide active elements in the interposer, it can be manufactured at a lower cost than an integrated circuit. On the other hand, the wiring of the silicon interposer is formed by the semiconductor process. This makes it easy to form fine wiring that is difficult to achieve with a resin interposer.

[0524] In HBM, a large number of wirings must be connected to achieve a wide memory bandwidth. For this reason, the interposer that mounts HBM requires fine, high-density wiring. Therefore, it is recommended to use a silicon interposer for mounting the HBM. is preferred.

[0525] In addition, in SiP and MCM using silicon interposers, the integrated circuit and the interposer The reliability is less likely to decrease due to the difference in the expansion coefficient between the silicon interposers. The surface of the silicon interposer is highly flat, so the integrated circuit mounted on the silicon interposer and the silicon Connection failures between interposers are unlikely to occur. In particular, it is possible to mount multiple integrated circuits on an interposer. In a 2.5D package (2.5-dimensional mounting) where the devices are arranged side by side, the silicon interposer It is preferable to use the

[0526] A heat sink (heat dissipation plate) may be provided on top of the electronic component 730. When providing an interposer 731, it is preferable to align the height of the integrated circuits provided on the interposer 731. For example, in the electronic component 730 shown in this embodiment, a memory device 720 and a semiconductor device 73 It is preferable to align the height of the 5.

[0527] In order to mount the electronic component 730 on another substrate, electrodes 733 are provided on the bottom of the package substrate 732. In FIG. 33B, an example in which the electrode 733 is formed using a solder ball is shown. By providing solder balls in a matrix on the bottom of the package substrate 732, a BGA (B In addition, the electrode 733 can be connected to a conductive pin. The bottom of the package substrate 732 may be provided with conductive pins in a matrix. This allows for pin grid array (PGA) implementation.

[0528] The electronic component 730 is not limited to BGA and PGA, and may be mounted on other substrates using various mounting methods. For example, SPGA (Staggered Pin Grid Arrangement) ray), LGA (Land Grid Array), QFP (Quad Flat Package), QFJ(Quad Flat J-leaded package) or QFN (Quad Flat Non-leaded package) A mounting method can be used.

[0529] The configuration, method, etc. described in this embodiment may be used in combination with other configurations, methods, etc. described in this embodiment. The present invention can be used in appropriate combination with the configurations, methods, and the like shown in the embodiment modes.

[0530] (Embodiment 7) In this embodiment mode, an application example of a memory device using the semiconductor device described in the above embodiment will be described. The semiconductor device described in the above embodiment is used in, for example, various electronic devices (e.g., Terminals, computers, smartphones, e-book readers, digital cameras (including video cameras) The present invention can be applied to storage devices such as video recorders, video recorders, and navigation systems. Here, computers include tablet computers, notebook computers, desktop computers, etc. This includes desktop computers as well as large computers such as server systems. Alternatively, the semiconductor device described in the above embodiment may be used as a memory card (for example, an SD card). Various removable drives such as USB memory and SSD (Solid State Drive) The present invention is applied to a removable storage device. For example, the semiconductor device described in the above embodiment may be a packaged semiconductor device. These are processed into memory chips and used in various storage devices and removable memory. can be.

[0531] FIG. 34A is a schematic diagram of a USB memory. The USB memory 1100 has a housing 1101. 1102, a USB connector 1103, and a substrate 1104. 4 is housed in a housing 1101. For example, the substrate 1104 includes a memory chip 110 5, a controller chip 1106 is attached. The semiconductor device shown in the embodiment can be incorporated in the semiconductor device.

[0532] FIG. 34(B) is a schematic diagram of the external appearance of an SD card, and FIG. 34(C) is a schematic diagram of the inside of an SD card. The SD card 1110 includes a housing 1111, a connector 1112, and a base. The substrate 1113 is housed in a housing 1111. For example, the substrate 11 13 has a memory chip 1114 and a controller chip 1115 attached thereto. By providing a memory chip 1114 on the back side of the substrate 1113, The capacity can be increased. In addition, a wireless chip having a wireless communication function is provided on the substrate 1113. This allows the host device and the SD card 1110 to wirelessly communicate with each other. This allows data to be read from and written to the memory chip 1114. The semiconductor device described in the above embodiment can be incorporated into such a semiconductor device.

[0533] FIG. 34(D) is a schematic diagram of the external appearance of the SSD, and FIG. 34(E) is a schematic diagram of the internal structure of the SSD. The SSD 1150 includes a housing 1151, a connector 1152, and a substrate 1153. The substrate 1153 is housed in the housing 1151. For example, the substrate 1153 has a The memory chip 1154, memory chip 1155, and controller chip 1156 are installed. The memory chip 1155 is a working memory for the controller chip 1156. For example, a DOSRAM chip may be used. By providing the memory chip 115, the capacity of the SSD 1150 can be increased. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 4 or the like.

[0534] At least a part of the configurations, methods, etc. shown in the present embodiment will be described in this specification. The present invention can be implemented in appropriate combination with other embodiments and examples described above.

[0535] (Embodiment 8) A semiconductor device according to one aspect of the present invention is a processor such as a CPU or a GPU, or a chip. 35A to 35H show a CPU according to one embodiment of the present invention. Specific examples of electronic devices equipped with processors or chips such as GPUs are given below.

[0536] <Electronic equipment and systems> The GPU or chip according to one embodiment of the present invention can be mounted in various electronic devices. Examples of electronic devices include television sets, desktop or notebook computers, etc. Monitors for information terminals, digital signage (Digital Signage) In addition to electronic devices with relatively large screens, such as billboards, large game machines such as pachinko machines, , digital cameras, digital video cameras, digital photo frames, e-book readers Examples of such devices include mobile phones, portable game consoles, portable information terminals, and audio playback devices. In addition, by providing an electronic device with a GPU or chip according to one embodiment of the present invention, It can be equipped with artificial intelligence.

[0537] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images, information, etc. on the display unit. And if a secondary battery is included, the antenna may be used for contactless power transmission.

[0538] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Numbers, distance, light, liquids, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared rays) It may have.

[0539] The electronic device according to one embodiment of the present invention can have various functions. Functions for displaying still images, videos, text images, etc. on the display, touch panel function, calendar Functions such as displaying date or time, running various software (programs) a function to read out a program or data recorded on a recording medium; The electronic device may have the following functions: Figure 35 (A) to Figure 35 (H) show example...

Claims

[Claim 1] An oxide film is formed, depositing a first insulator on the oxide; depositing a second insulator on the first insulator; depositing a third insulator on the second insulator; forming a conductor on the third insulator; Heat treatment is carried out, The heat treatment is carried out in an atmosphere containing nitrogen, By carrying out the heat treatment, A method for manufacturing a semiconductor device, wherein hydrogen contained in the first insulator is moved to and absorbed by the second insulator.

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