Recording device

Abstract

To generate a driving signal which is scarcely distorted, without needing large power-supply voltages.SOLUTION: A recording device, which performs recording on a recording medium while discharging liquid using a piezoelectric element, comprises amplifying means that amplifies at least either of voltages or currents which have an input waveform to supply the either to the piezoelectric element. The amplifying means has switch means for supplying power-supply voltages for output of the amplifying means and charged means that is charged with the power-supply voltages. The switch means is turned on by at least either of voltages and currents supplied from the charged means.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a recording apparatus. [Background technology]

[0002] A recording device that performs recording by discharging liquid or the like has a system in which the liquid or the like is discharged using a piezoelectric element. In this system, an electrical contact is provided for each piezoelectric element, and an integrated circuit is connected to the electrical contact. A drive signal for driving the piezoelectric element is generated from the integrated circuit (drive signal generation circuit), and the liquid or the like is discharged by driving the piezoelectric element with the drive signal. Patent Document 1 discloses a current interruption element that protects a current amplifier circuit that amplifies the drive signal from a short circuit when such a drive signal is short-circuited.

[0003] The drive signal generation circuit is a so-called amplifier circuit that amplifies the voltage and current of an analog signal supplied to the non-inverting input terminal of an operational amplifier. Specifically, the drive signal generation circuit is composed of an npn transistor connected in a Darlington configuration on the high side, a pnp transistor connected in a Darlington configuration on the low side, and an operational amplifier. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] JP 2015-120307 A Summary of the Invention [Problem to be solved by the invention]

[0005] However, the waveform of the drive signal generated by the drive signal generating circuit may become dull. This is caused, for example, by a lack of current to the transistor. It is possible to avoid dulling of the drive waveform by using a large power supply voltage, but in that case, there is a risk of new problems occurring, such as large power loss and large heat generation in the circuit.

[0006] In view of the above problems, an object of the present invention is to generate a drive signal that is less distorted without requiring a large power supply voltage. [Means for solving the problem]

[0007] In order to solve the above problems, the present invention provides a recording device that uses a piezoelectric element to eject liquid and record on a recording medium, the recording device having an amplifier means that amplifies at least one of the voltage or current of an input waveform and supplies it to the piezoelectric element, the amplifier means having a switch means for supplying a power supply voltage to the output of the amplifier means, and a charged means that is charged by the power supply voltage, and the switch means is turned on by at least one of the voltage or current supplied from the charged means. Effect of the Invention

[0008] According to the present invention, a drive signal with little distortion can be generated without requiring a large power supply voltage. [Brief description of the drawings]

[0009] [Figure 1] FIG. 4 is a diagram showing an amplifier circuit that generates an ink ejection signal. [Diagram 2] Drive signal and capacitor voltage waveform. [Diagram 3] FIG. 11 is a diagram illustrating a third example of an amplifier circuit that generates an ink ejection signal. [Figure 4] FIG. 1 is a diagram illustrating the overall configuration of an inkjet recording apparatus. [Diagram 5] FIG. 2 is an explanatory diagram of an inkjet recording head. [Figure 6] FIG. 2 is an explanatory diagram of an inkjet recording head. [Figure 7] FIG. 2 is an explanatory diagram of an inkjet recording head. [Figure 8] FIG. 2 is an explanatory diagram of an inkjet recording head. [Figure 9] 4A and 4B are explanatory diagrams of a method for driving a piezoelectric element and a drive signal for the piezoelectric element. [Figure 10] FIG. 2 is a diagram illustrating the electrical configuration of the inkjet printing apparatus. [Figure 11] FIG. [Figure 12] 5A and 5B are diagrams for explaining the configuration and operation of a drive signal selection unit. [Figure 13] FIG. 1 is a diagram showing serial communication 1. [Figure 14] FIG. 11 is a timing chart of a drive signal selection unit. [Figure 15] FIG. 4 is a diagram illustrating a first example of an amplifier circuit that generates an ink ejection signal. [Figure 16] The voltage waveform of the op-amp output and the drive signal. [Figure 17] FIG. 4 is a diagram illustrating a residual vibration voltage. [Figure 18] FIG. 1 is a diagram of a residual vibration voltage detection circuit. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0010] Hereinafter, an embodiment of the present invention will be described in detail. In the drawings, reference numeral 100 denotes a head unit, 101 denotes an inkjet recording head, 102 denotes a scanner unit, 103 denotes a line scanner, 104 denotes a conveying roller, 105 denotes a roll paper, 106 denotes a housing, and 200 denotes a piezoelectric element substrate. In addition, reference numeral 200a denotes a first terminal, 200b denotes a second terminal, 605 denotes a power supply voltage, 606 denotes a power supply voltage, 201 denotes a drive element selection section, 202 denotes a flexible electric wiring board, 203 denotes a selection section side terminal, 204 denotes a head substrate connection section, and 205 denotes a capacitor mounting section. In addition, reference numeral 206 denotes a head substrate, 207 denotes a signal connection section, 208 denotes a drive signal connection section, 209 denotes a chip unit, and 210 denotes a conventional flexible electric wiring board. Also, in the figure, reference numeral 211 denotes a conventional first drive signal line, 212 denotes a conventional second drive signal line, 213 denotes a conventional third drive signal line, 214 denotes a conventional fourth drive signal line, 215 denotes a conventional fifth drive signal line, and 216 denotes a conventional sixth drive signal line. Also, reference numeral 217 denotes a conventional seventh drive signal line, 218 denotes a conventional eighth drive signal line, 219 denotes a conventional drive signal return current line, 300 denotes an upper electrode, 301 denotes a piezoelectric element, 302 denotes a lower electrode, 303 denotes a voltage difference, 304 denotes a pressure difference, and 305 denotes ink. Also, reference numeral 400 denotes a control controller, 401 denotes a host PC, 402 denotes a receiving I / F, 403 denotes a ROM, 404 denotes a RAM, 405 denotes a motor / sensor control unit, 406 denotes an image processing unit, 407 denotes a recording control unit, and 408 denotes a drive signal control unit. In the figure, reference numeral 409 denotes a drive signal selection information transmission section, 411 denotes a drive signal generation section, 413 denotes a recording head, 421 denotes an image processing input section, 422 denotes an image generation section, 423 denotes an output stage correction processing section, 424 denotes a quantization processing section, and 425 denotes a landing position deviation correction processing section. In the figure, reference numeral 426 denotes an image processing output section, 503 denotes a nozzle section, 506 denotes a serial-parallel conversion section, 507 denotes a data latch section, 508 denotes a setting register section, 509 denotes a decoder section, 510 denotes a group of switches, and 511 denotes a residual vibration detection circuit.Also, in the figure, reference numeral 512 denotes a digital-analog conversion unit, 513 denotes a drive signal generation circuit, 601 denotes a transistor, 602 denotes a transistor, 603 denotes a transistor, 604 denotes a transistor, 607 denotes an operational amplifier, 608 denotes an analog signal, and 610 denotes a drive signal. Also, reference numeral 630 denotes a drive signal generation circuit, 631 denotes a capacitor, 632 denotes a diode, 633 denotes a diode, 634 denotes a capacitor, 635 denotes a diode, 636 denotes a diode, and 637 denotes a high-side bootstrap circuit. Also, reference numeral 638 denotes a low-side bootstrap circuit, 640 denotes a drive signal generation circuit, 641 denotes a transistor, 642 denotes a diode, 643 denotes a transistor, 644 denotes a diode, and 645 denotes a high-side protection circuit. Also, reference numeral 646 denotes a low-side protection circuit, 651 denotes a resistor, 652 denotes a resistor, 653 denotes a resistor, and 654 denotes a resistor.

[0011] (First embodiment) (Overall configuration of the recording device) FIG. 4 is a side cross-sectional view showing the configuration of a recording device that uses a full-line inkjet recording head to record on a roll-shaped recording medium such as roll paper, as an example of a recording device. A full-line inkjet recording head (hereinafter simply referred to as an "inkjet recording head") is a recording head having a recording width greater than or equal to the width of the roll paper. As shown in FIG. 4, this recording device generally comprises a housing 106, a head unit 100, first to fourth inkjet recording heads 101 corresponding to four colors, for example, CMYK, a scanner unit 102, a line scanner 103, and a transport roller 104. Then, roll paper 105 used as a recording medium is nipped by a pair of transport rollers 104 and transported in the direction of the arrow, and is sequentially recorded directly under each of the first to fourth inkjet recording heads 101.

[0012] (Configuration of Inkjet Recording Head) A method is known for ejecting ink from the nozzles of the inkjet recording head 101 by generating pressure in a pressure chamber using a piezoelectric element as an ejection energy generating element, and ejecting liquid in the pressure chamber from a nozzle formed at one end of the pressure chamber using that pressure. In this type of inkjet recording head 101, each piezoelectric element has an electrical contact and is connected to an integrated circuit that generates a drive signal, and ejection is performed by driving the piezoelectric element with the drive signal.

[0013] 5 is a schematic diagram of a unit combining a piezoelectric element substrate 200, a drive signal selection section 201, and a flexible electrical wiring substrate 202. The piezoelectric element substrate 200 has a first terminal 200a and a second terminal 200b, which are electrically connected to terminals (not shown) provided on the drive element selection section 201 mounted on the flexible electrical wiring substrate 202. The flexible electrical wiring substrate 202 has a selection section side terminal 203, which is electrically connected to a wiring substrate side terminal (not shown) provided on the drive element selection section 201.

[0014] The flexible electrical wiring board 202 includes a capacitor area 205 for mounting a power supply bypass capacitor for the drive element selection section 201, and a head substrate connection section 204 for connecting to a head substrate (not shown).

[0015] 6 is a schematic diagram of an inkjet print head 101. One head is made up of four units. The units and the head are electrically connected by a connection section 204. A head substrate 206 is provided with a signal connection section 207 and a drive signal connection section 208 which are connected to the printing apparatus main body.

[0016] 7 shows the first layer wiring of a conventional flexible electrical wiring board 201. The first drive signal wiring 211, the third drive signal wiring 213, the fifth drive signal wiring 215, and the seventh drive signal wiring 217 all have the same wiring width. Drive signal return current wiring 219 is arranged on the opposite side of the first drive signal wiring 211 to the third drive signal wiring 213, and on the opposite side of the seventh drive signal wiring 217 to the fifth drive signal wiring 215.

[0017] 8 shows the wiring of the second layer of a conventional flexible electrical wiring board 210. The second drive signal wiring 212, the fourth drive signal wiring 214, the sixth drive signal wiring 216, and the eighth drive signal wiring 218 all have approximately the same wiring width. A drive signal return current wiring 219 is arranged on the opposite side of the second drive signal wiring 212 to the fourth drive signal wiring 214, and on the opposite side of the eighth drive signal wiring 218 to the sixth drive signal wiring 216.

[0018] (Description of the method for driving the piezoelectric element and the driving signal for the piezoelectric element) We will now explain the method of driving the piezoelectric element 301 and the drive signal applied to the piezoelectric element 301. There are three steps to drive the piezoelectric element 301, as follows. These will be explained in order.

[0019] Step 0: In the initial state, the pressure chamber 304 is filled with ink 305, a high voltage is applied between the upper electrode 300 and the lower electrode 302 of the piezoelectric element 301 from the voltage source 303, and the pressure chamber 304 is contracted.

[0020] Step 1: The pressure chamber 304 is expanded by reducing the voltage of the voltage source 303, and ink 305 is drawn in. At this time, a sine-wave-shaped pressure wave is generated in the pressure chamber 304 by the piezoelectric element 301.

[0021] Step 2: By increasing the voltage of the voltage source 303 in synchronization with the pressure wave generated in step 1 above, the pressure chamber 304 is contracted and ink 305 is ejected.

[0022] Step 3: After the above two steps, the mechanical vibration continues in the piezoelectric element 301. In order to cancel this mechanical vibration and stop the piezoelectric element 301, the voltage of the voltage source 303 is increased again.

[0023] The above steps 0 to 3 constitute one ejection operation, and the above series of voltage changes of the voltage source 303 constitutes the waveform of the drive signal to be applied to the piezoelectric element 301.

[0024] (Electrical configuration of the inkjet recording device) The electrical configuration of the inkjet recording device will be described. FIG. 10 is a block diagram of the electrical configuration of the inkjet recording device. The Host PC 401 transmits print instructions and print data to the control controller 400. The control controller 400 controls the inkjet recording device and includes a reception I / F 402 that communicates with the Host PC 401, a CPU 410, and a ROM 403 that stores a program that operates the CPU 410. The control controller 400 further includes a RAM 404 that executes programs and temporarily stores various data, and a motor and sensor control unit 405 that controls a motor and sensor in the inkjet recording device. The control controller 400 further includes an image processing unit 406 that performs image processing on the print data sent from the Host PC 401 through the reception I / F 402, and a recording control unit 407 that controls the recording head based on the data processed by the image processing unit 406. The image processing unit 506 generates raster image data that can be printed using the print data received from the Host PC 401, converts it into image data for each ink color such as CMYK that can be processed by the recording control unit 407, and outputs it.

[0025] The recording control unit 407 is made up of a drive signal control unit 408 and a drive signal selection information transmission unit 409. The drive signal control unit 408 transmits a control signal for generating a drive signal to a drive signal generation unit 411. The drive signal selection information transmission unit 409 transmits drive signal selection information to the drive signal selection unit 201 through serial communication 1.

[0026] The drive signal generation unit 411 outputs a plurality of drive signals to the drive signal selection unit 201 based on the control signal transmitted from the drive signal control unit 408 .

[0027] The drive signal selection unit 201 selects a plurality of drive signals input from the drive signal generation unit 411 based on the drive signal selection information transmitted from the drive signal selection information transmission unit 409, and inputs the selected drive signal to the piezoelectric element 301 corresponding to the nozzle in the recording head unit. When a voltage of a drive signal waveform is applied to the electrodes of the piezoelectric element 301, the piezoelectric element 301 between the electrodes is displaced, and the resulting ejection energy is used to eject ink from the nozzle.

[0028] Serial communication 1 between the drive signal selection information transmission unit 409 and the drive signal selection unit 201 is composed of a clk signal, a data signal, and a latch signal. Information is transmitted on the data signal in synchronization with the clk, and information is transmitted in units of latch signals.

[0029] Serial communication 2 between drive signal selection information transmission unit 409 and drive signal selection unit 201 is used to perform settings inside drive signal selection unit 512. A communication protocol such as the widely known SPI (Serial Peripheral Interface) is used, but the communication method is not limited to this.

[0030] The recording head 513 is composed of nozzles having a mechanism for ejecting ink and piezoelectric elements 301 corresponding to the nozzles, and ejects ink by inputting a drive signal to the piezoelectric elements 301 corresponding to the nozzles. The recording head 413 here is assumed to be composed of 128 nozzles and the piezoelectric elements 301 corresponding to the nozzles. Note that the number of nozzles does not directly affect the content of this application.

[0031] FIG. 11 is a diagram showing details of the processing contents of the image processing unit 406 in FIG.

[0032] The image processing input unit 421 takes in print data and outputs it to the image generation unit 422. The image generation unit 422 uses the print data to convert it into CMYK data with a resolution that can be recorded by the recording head and outputs it. The output gradation correction processing unit 423 performs correction processing corresponding to the output characteristics of the ink. The quantization processing unit 424 performs processing to convert 8-bit to 16-bit gradation data into gradations that can be expressed by the nozzles of the recording head. Generally, the data is converted into N values ​​using an error diffusion method or a dither method, and the gradations are converted into image data of 1 bit to 4 bits. The landing position deviation correction processing unit 425 shifts the data in pixel units so as to correct the landing position deviation for each nozzle in units of the image resolution. The image processing output unit 426 performs processing to output the results of image processing.

[0033] (Description of the drive signal selection unit) The drive signal selection unit 201 will be described with reference to Fig. 12. Data transmitted from the drive signal selection information transmission unit 409 through serial communication 1 (clk / data / latch) is received by a serial-parallel conversion unit 506, and is held in a data latch 507 starting from the input timing of the latch signal. The held drive signal selection information is input to a decoder 509.

[0034] The drive signal generation unit 411 is composed of a plurality of digital-to-analog conversion units 512 and a plurality of drive signal generation circuits 513. The digital-to-analog conversion units 512 receive a control signal from the drive signal control unit 408. The drive signal generation circuit 513 receives an output analog signal from the digital-to-analog conversion units and generates a drive signal.

[0035] The generated drive signal is input to a switch group (switch means) 510 in the drive signal selection unit 201. The switch group 510 is made up of a plurality of switches SWx-y (x corresponds to the nozzle number, and y corresponds to the drive signal number), and selects a drive signal from a plurality of drive signals based on the decoded information of the decoder 509 to drive the piezoelectric element 301 corresponding to the nozzle. Here, the print head 503 is assumed to consist of 128 nozzles and the piezoelectric elements 301 corresponding to the nozzles, and there are as many decoders 509 and switch groups 510 as there are nozzles.

[0036] (Serial communication 1 explanation) 13 shows the contents of serial communication 1 output from drive signal selection information transmission unit 409. The data signal is transmitted in synchronization with the clk signal, and the latch signal indicates the end of one transmission.

[0037] The data signal does not have to be one line, and the number can be increased in balance with the clk frequency to keep up with the ink ejection frequency. In this explanation, it is assumed that communication is performed so that one column's worth of data, that is, (number of nozzles x drive signal selection information) of data can be sent between latch signals. For example, if there are four types of drive signals and the number of nozzles is 128, 128 x 2 bits (4 selections) of data is sent. Note that if there is a residual vibration detection switch, which will be explained later, then 4 types + 1 residual vibration detection = 5 states, so 128 x 3 bits (5 state selections) of data is sent.

[0038] (Timing chart for drive signal selection section) Fig. 14(a) shows the relationship between the data and drive signals in serial communication 1. Drive signal selection information for one column (for all nozzles) is transferred between latch signals, and the received data is held in the data latch 507 in Fig. 12, starting from the latch signal. Based on the held data, four input drive signals are selected for each nozzle and applied to the piezoelectric element 301 corresponding to the nozzle. Drive signals that can achieve the desired ink droplet state, such as large ink droplet size, small ink droplet size, or no ink droplet ejection, are assigned to the four drive signal generation circuits 513 for use.

[0039] (Explanation of the residual vibration detection circuit) Of the switches SWx-y included in the switch group 510 in FIG. 12, switches SWx-0 to SWx-n are used to apply drive signals to the piezoelectric elements 301 corresponding to the nozzles.

[0040] On the other hand, SWx-z are switches for supplying a residual vibration voltage generated in the piezoelectric element 301 due to the residual vibration after the piezoelectric element 301 is driven to a residual vibration detection circuit 511.

[0041] As shown in Fig. 17, a drive signal is applied to the piezoelectric element 301 to drive the piezoelectric element 301 (section st1). After that, the piezoelectric element 301 is disconnected from the drive signal. Then, an oscillating voltage like Amp-in in Fig. 17 appears in the piezoelectric element 301. This is the mechanical vibration remaining in the piezoelectric element 301 that has been converted into a voltage by the piezoelectric effect, and is called a residual oscillating voltage (section st2).

[0042] By detecting and analyzing the residual vibration voltage, it is possible to detect an abnormality in each nozzle.

[0043] The residual vibration detection circuit 511 in FIG. 12 will be described in detail with reference to FIG.

[0044] The residual vibration voltage Amp-in is supplied to the non-inverting input terminal V+ of the operational amplifier OPAz via SWx_z and a capacitor Ca. The V+ terminal of OPAz is connected to a bias voltage Vbias via a resistor Rm. Meanwhile, the inverting input terminal V- of OPAz is connected to Vbias via a resistor Rb. Furthermore, the V- terminal of OPAz is connected to the output terminal of OPAz via a resistor Ra.

[0045] In the above circuit, the residual vibration voltage Amp-in is amplified to become the residual vibration detection voltage Vz. The residual vibration detection voltage Vz is expressed by the following (1).

[0046]

number

[0047] The residual vibration detection voltage Vz is sent to the outside of the residual vibration detection circuit 511. Thereafter, the residual vibration detection voltage Vz is converted into a digital signal by an analog-to-digital conversion device (not shown) and analyzed by a logical operation element (not shown).

[0048] (Description of a conventional drive signal generating circuit) 15 shows a conventional drive signal generating circuit 513 that generates a drive signal. The drive signal generating circuit 513 is a so-called amplifier circuit, and amplifies the voltage and current of an analog signal 608 supplied to a non-inverting input terminal of an operational amplifier 607.

[0049] The drive signal generating circuit 513 is composed of Darlington-connected transistors 601 and 602 on the high side, Darlington-connected transistors 603 and 604 on the low side, and an operational amplifier 607. The transistors 601 and 602 are npn transistors, and the transistors 603 and 604 are pnp transistors.

[0050] The base terminals of the transistors 602 and 604 are connected to the output terminal of an operational amplifier 607 via diodes, and the emitter terminals of the transistors 601 and 603 are connected to the piezoelectric element 301 via switches SWx-n (not shown).

[0051] In the above configuration, when an analog signal 608 is input to the drive signal generating circuit 513, the voltage of the analog signal 608 is amplified in the operational amplifier 607. Next, the current is amplified by the transistors 601 and 602 and the transistors 603 and 604. The piezoelectric element 301 is driven by the drive signal 610, the voltage and current of which have been amplified, to eject ink.

[0052] 16 shows the output voltage Vop of the operational amplifier 607 and the waveform of the drive signal 610 (Vout) as shown in (a) and (b). When the output voltage Vop of the operational amplifier 607 approaches the positive power supply voltage +Vcc, as shown in the shaded area in FIG. 16, the waveform of the drive signal 610 (Vout) becomes dull. The reason for this will be explained.

[0053] A base current ib1 of the transistor 602 flows through the route: positive power supply voltage +Vcc → resistor R1 → base terminal to emitter terminal of the transistor 602 → base terminal to emitter terminal of the transistor 601 → drive signal 610 (Vout). At this time, the base current ib1 is roughly expressed by the formula (2).

[0054]

number

[0055] Therefore, when the output voltage Vop of the operational amplifier 607 approaches the positive power supply voltage +Vcc, ib1 becomes small, which causes a shortage of collector current of the transistor 602, a shortage of base current of the transistor 601, and a shortage of collector current of the transistor 601. In other words, the output current becomes insufficient, and the waveform of the drive signal 610 (Vout) becomes dull.

[0056] For the same reason, when the output voltage Vop of the operational amplifier 607 approaches the negative power supply voltage −Vcc as in the cross-hatched region in FIG. 16, the waveform of the drive signal 610 (Vout) becomes dull.

[0057] The above are more detailed issues regarding the drive signal generating circuit 513 described in the background art.

[0058] (Drive signal generating circuit in the first embodiment) Fig. 1 shows a drive signal generating circuit 630 in the first embodiment. A feature of this embodiment is that bootstrap circuits 637 and 638 are added to the conventional drive signal generating circuit 513 shown in Fig. 15. In summary, when the drive signal 610 (Vout) approaches the positive power supply voltage +Vcc, the bootstrap circuit 637 supplies a base current ib3 of the transistor 602. When the drive signal 610 (Vout) approaches the negative power supply voltage -Vcc, the bootstrap circuit 638 supplies a base current ib4 of the transistor 604.

[0059] Details will be described below. The bootstrap circuit 637 is composed of diodes 632 and 633, and a capacitor 631. The positive power supply voltage +Vcc is supplied to the capacitor 631 via the diode 632. Therefore, as shown at times t1 to t2 in FIG. 2, when the drive signal 610 (Vout) is 0 [V], the positive power supply voltage +Vcc is charged to the capacitor 631. When the drive signal 610 (Vout) rises after time t2, the terminal voltage Va of the capacitor 631 becomes a voltage higher than the positive power supply voltage +Vcc as shown in FIG. 2. Therefore, the base current ib3 of the transistor 602 flows from the terminal voltage Va of the capacitor 631 → the diode 633 → the resistor R1 → the base terminal to the emitter terminal of the transistor 602. After that, it flows in the order of the base terminal to the emitter terminal of the transistor 601 → the drive signal 610 (Vout). At this time, the base current ib3 of the transistor 602 is roughly expressed by the formula (3).

[0060]

number

[0061] Therefore, even if the output voltage Vop of the operational amplifier 607 approaches the positive power supply voltage +Vcc, the base current ib3 of the transistor 602 does not become small, and the waveform of the drive signal 610 (Vout) does not become dull.

[0062] Similarly, the bootstrap circuit 638 is composed of diodes 635 and 636, and a capacitor 634. The negative power supply voltage -Vcc is supplied to the capacitor 634 via the diode 635. Therefore, as shown at times t5 to t6 in FIG. 2, when the drive signal 610 (Vout) is at a maximum value Vout-pk, the capacitor 634 is charged with a voltage equal to the sum of Vout-pk and the negative power supply voltage -Vcc. After time t6, when the drive signal 610 (Vout) drops, the terminal voltage Vb of the capacitor 634 becomes lower than the negative power supply voltage -Vcc as shown in FIG. 2. Therefore, the base current ib4 of the transistor 604 flows from the drive signal 610 (Vout) → the emitter terminal to the base terminal of the transistor 603 → the emitter terminal to the base terminal of the transistor 604. After that, it flows in the order of the resistor R2 → the diode 636 → the terminal voltage Vb of the capacitor 634. At this time, the base current ib4 of the transistor 604 is roughly expressed by the formula (4).

[0063]

number

[0064] Therefore, even if the output voltage Vop of the operational amplifier 607 approaches the negative power supply voltage -Vcc, the base current ib4 of the transistor 604 does not become small, and the waveform of the drive signal 610 (Vout) does not become dull.

[0065] Second embodiment The second embodiment will be described with reference to Fig. 3. Note that the same components as those in the first embodiment are given the same reference numerals and the description thereof will be omitted.

[0066] The drive signal generating circuit 640 in Fig. 3 is obtained by adding protection circuits 645 and 646 to the drive signal generating circuit 630 in Fig. 1. The configuration of the protection circuit on the high side will be described. The collector side of a transistor 641 is connected to the base side of an input side transistor 602 via a diode 642.

[0067] The base of a transistor 641 is connected to the emitter of the output-side transistor 601 via a resistor 651 , and the emitter side of the transistor 641 is connected to the emitter via a resistor 652 .

[0068] Similarly, on the low side, the collector of a transistor 643 is connected to the base of an input transistor 604 via a diode 644. The base of the transistor 643 is connected to the emitter of the output transistor 603 via a resistor 653, and the emitter of the transistor 643 is connected to the emitter via a resistor 654.

[0069] If an excessive current flows through output-side transistor 601 due to a failure of piezoelectric element 301 or the like, an excessive current flows through resistor 652, causing an abnormal base-emitter voltage of transistor 641 to be generated across the resistor, turning transistor 641 on. Then, the current that had been flowing through the base of transistor 602 flows through transistor 641, turning transistor 602 off and output-side transistor 601 off. This makes it possible to prevent an excessive current from continuously flowing. The low-side operation is similar.

[0070] The present invention includes the following configurations.

[0071] (Configuration 1) A recording apparatus that uses a piezoelectric element to eject liquid and record on a recording medium, an amplifier for amplifying at least one of the voltage and current of the input waveform and supplying the amplified voltage and current to the piezoelectric element; the amplifying means has a switch means for supplying a power supply voltage to an output of the amplifying means, and a charged means that is charged by the power supply voltage; 2. A recording apparatus according to claim 1, wherein said switch means is turned on by at least one of a voltage and a current supplied from said charged means.

[0072] (Configuration 2) the amplifying means is supplied with a first power supply voltage and a second power supply voltage; the amplifying means comprises first switch means for supplying the first power supply voltage to an output of the amplifying means, second switch means for supplying the second power supply voltage to an output of the amplifying means, first charged means charged by the first power supply voltage, and second charged means charged by the second power supply voltage; the first switch means is turned on by at least one of a voltage and a current supplied from the first charged means, 2. The recording apparatus according to configuration 1, wherein the second switch means is turned on by at least one of a voltage and a current supplied from the second charged means.

[0073] (Configuration 3) the switch means, the first switch means and the second switch means are transistors; the charged means, the first charged means and the second charged means are capacitors; 3. The recording apparatus according to configuration 2, wherein the charge stored in the capacitor is used as a base current for the transistor to turn on the transistor.

[0074] (Configuration 4) 4. The recording device according to configuration 3, wherein the transistor is a Darlington transistor.

[0075] (Configuration 5) a current detection means for detecting a current flowing through the switch means, the first switch means, the second switch means, and the transistor; The recording device according to configuration 3, further comprising a bypass means for bypassing, when the current value detected by the current detection means reaches a predetermined value, the charge stored in the charged means, the first charged means, the second charged means, and the capacitor so as not to be supplied to the switch means, the first switch means, the second switch means, and the transistor. [Explanation of symbols]

[0076] 105 Roll paper (recording medium) 301 Piezoelectric element 510 Switching means 605 Power supply voltage 606 Power supply voltage

Claims

1. A recording apparatus that uses a piezoelectric element to eject liquid and record on a recording medium, an amplifier for amplifying at least one of the voltage and current of the input waveform and supplying the amplified voltage and current to the piezoelectric element; the amplifying means has a switch means for supplying a power supply voltage to an output of the amplifying means, and a charged means that is charged by the power supply voltage; The recording apparatus according to claim 1, wherein said switch means is turned on by at least one of a voltage and a current supplied from said charged means.

2. The amplifying means is supplied with a first power supply voltage and a second power supply voltage, the amplifying means comprises first switch means for supplying the first power supply voltage to an output of the amplifying means, second switch means for supplying the second power supply voltage to an output of the amplifying means, first charged means charged by the first power supply voltage, and second charged means charged by the second power supply voltage; the first switch means is turned on by at least one of a voltage and a current supplied from the first charged means, 2. The recording apparatus according to claim 1, wherein said second switch means is turned on by at least one of a voltage and a current supplied from said second charged means.

3. the switch means, the first switch means and the second switch means are transistors; the charged means, the first charged means and the second charged means are capacitors; 3. The recording apparatus according to claim 2, wherein the charge stored in the capacitor is used as a base current for the transistor to turn on the transistor.

4. 4. The recording apparatus according to claim 3, wherein the transistor is a Darlington transistor.

5. a current detection means for detecting a current flowing through the switch means, the first switch means, the second switch means, and the transistor; 4. The recording device according to claim 3, further comprising a bypass means for bypassing the charge stored in the charged means, the first charged means, the second charged means and the capacitor so that the charge is not supplied to the switch means, the first switch means, the second switch means and the transistor when the current value detected by the current detection means reaches a predetermined value.

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