Printed circuit board

Abstract

To provide a printed circuit board capable of reducing voltage drop (IR drop) and power loss.SOLUTION: The present invention relates to a printed circuit board including a substrate having a first through portion, a magnetic layer at least partially disposed within the first through portion and having a second through portion, an electronic component at least partially disposed within the second through portion, a first wiring pattern disposed on an upper surface of the magnetic layer, a second wiring pattern disposed on a lower surface of the magnetic layer, and a first through via at least partially surrounded by the magnetic layer and including a first via pattern connecting the first and second wiring patterns to each other.SELECTED DRAWING: Figure 3

Description

[Technical field]

[0001] The present invention relates to printed circuit boards. [Background technology]

[0002] Recently, in order to slim down semiconductor chips and increase power efficiency, there is a demand for embedding various passive elements such as capacitors and inductors inside package substrates. Meanwhile, in the case of inductors, there is a demand for improving inductance compared to existing chip components by changing the material and structure. Summary of the Invention [Problem to be solved by the invention]

[0003] One of several objects of the present invention is to provide a printed circuit board capable of reducing voltage drop (IR drop) and power loss.

[0004] Another of several objects of the present invention is to provide a printed circuit board capable of improving inductance.

[0005] Yet another of several objects of the present invention is to provide a printed circuit board that can realize slimming and integration. [Means for solving the problem]

[0006] One of the solutions provided by the present invention is to place a magnetic layer in a first through-hole of a substrate, form an inductor such as an MCI (Magnetic Composite Inductor) in the magnetic layer, and place and embed an electronic component such as a VR (Voltage Regulator) together with the inductor in a second through-hole of the magnetic layer.

[0007] For example, one example of a printed circuit board may include a substrate having a first through portion, a magnetic layer having a second through portion and at least a portion of which is disposed within the first through portion, an electronic component having at least a portion of which is disposed within the second through portion, a first wiring pattern disposed on an upper surface of the magnetic layer, a second wiring pattern disposed on a lower surface of the magnetic layer, and a first through via, at least a portion of which is surrounded by the magnetic layer and includes a first via pattern connecting the first and second wiring patterns to each other.

[0008] For example, one example of a printed circuit board may include a substrate having a first through portion, a magnetic layer at least partially disposed within the first through portion and in contact with the substrate, the magnetic layer having a second through portion and a plurality of through holes, a voltage regulator at least partially disposed within the second through portion, an insulating layer covering at least a portion of the substrate, the magnetic layer and the voltage regulator, and filling at least a portion of the second through portion and the plurality of through holes, a first wiring pattern layer disposed on an upper surface of the insulating layer, a second wiring pattern layer disposed on a lower surface of the insulating layer, and a plurality of via patterns each penetrating the insulating layer within the plurality of through holes. Effect of the Invention

[0009] Among other advantages, the present invention provides a printed circuit board that can reduce voltage drop and power loss.

[0010] Another advantage of the present invention, among the various advantages, is that it provides a printed circuit board capable of improving inductance.

[0011] Among the various effects of the present invention, still another effect is that it is possible to provide a printed circuit board that can realize slimming and integration. [Brief description of the drawings]

[0012] [Figure 1]FIG. 1 is a block diagram illustrating a schematic example of an electronic device system. [Diagram 2] FIG. 1 is a perspective view illustrating an example of an electronic device. [Diagram 3] FIG. 1 is a cross-sectional view illustrating an example of a printed circuit board. [Figure 4] FIG. 4 is a plan view illustrating a cross section taken along line II' in FIG. [Diagram 5] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 6] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 7] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 8] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 9] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 10] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 11] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 12] 4A to 4C are cross-sectional views illustrating steps in a manufacturing process of the printed circuit board of FIG. 3. [Figure 13] FIG. 11 is a cross-sectional view illustrating another example of a printed circuit board. [Figure 14] FIG. 2 is a cross-sectional view illustrating an example of a coil portion. [Figure 15] 1A to 1C are plan views each showing a schematic example of a coil portion. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0013] The present invention will now be described with reference to the accompanying drawings, in which the shapes and sizes of elements may be exaggerated or reduced for clarity.

[0014] electronic equipment FIG. 1 is a block diagram illustrating an example of an electronic device system.

[0015] Referring to the drawing, an electronic device 1000 accommodates a main board 1010. Chip-related components 1020, network-related components 1030, and other components 1040 are physically and / or electrically connected to the main board 1010. These are also connected to other electronic components described below to form various signal lines 1090.

[0016] The chip-related components 1020 include, but are not limited to, memory chips such as volatile memory (e.g., DRAM), non-volatile memory (e.g., ROM), and flash memory; application processor chips such as central processors (e.g., CPU), graphic processors (e.g., GPU), digital signal processors, encryption processors, microprocessors, and microcontrollers; and logic chips such as analog-to-digital converters and ASICs (application-specific ICs). Needless to say, the chip-related components 1020 may include other types of chip-related electronic components. Needless to say, these chip-related components 1020 may be combined with each other. The chip-related components 1020 may be in the form of a package including the above-mentioned chips and electronic components.

[0017] The network-related components 1030 may include, but are not limited to, any other wireless and wired protocols designated as Wi-Fi (e.g., IEEE 802.11 family), WiMAX (e.g., IEEE 802.16 family), IEEE 802.20, LTE (long term evolution), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPS, GPRS, CDMA, TDMA, DECT, Bluetooth, 3G, 4G, 5G, and beyond, as well as any of a number of other different wireless or wired standards and protocols. It should be understood that the network-related components 1030 may also be combined with the chip-related components 1020 and with each other.

[0018] The other components 1040 include high-frequency inductors, ferrite inductors, power inductors, ferrite beads, LTCC (low temperature co-firing ceramics), EMI (electromagnetic interference) filters, MLCC (multi-layer ceramic capacitors), etc. However, the other components 1040 are not limited to these, and may also include passive elements in the form of chip components used for various other different applications. It goes without saying that the other components 1040 may be combined with the chip-related components 1020 and / or the network-related components 1030.

[0019] Depending on the type of electronic device 1000, the electronic device 1000 may include other electronic components that may or may not be physically and / or electrically coupled to the main board 1010. Examples of other electronic components include, but are not limited to, a camera module 1050, an antenna module 1060, a display 1070, and a battery 1080. The other electronic components may include, but are not limited to, an audio codec, a video codec, a power amplifier, a compass, an accelerometer, a gyroscope, a speaker, a mass storage device (e.g., a hard disk drive), a compact disk (CD), a digital versatile disk (DVD), and the like. Needless to say, other electronic components used for various purposes may be included depending on the type of electronic device 1000.

[0020] The electronic device 1000 may be a smart phone, a personal digital assistant, a digital video camera, a digital still camera, a network system, a computer, a monitor, a tablet, a laptop, a netbook, a television, a video game, a smart watch, an automotive, etc. However, the electronic device 1000 is not limited to these, and may be any other electronic device that processes data.

[0021] FIG. 2 is a perspective view that illustrates an example of an electronic device.

[0022] Referring to the drawings, the electronic device may be, for example, a smartphone 1100. A motherboard 1110 is housed inside the smartphone 1100, and various components 1120 are physically and / or electrically connected to the motherboard 1110. In addition, other components such as a camera module 1130 and / or a speaker 1140 that may or may not be physically and / or electrically connected to the motherboard 1110 are housed inside the smartphone 1100. Some of the components 1120 may be the above-mentioned chip-related components, for example, a component package 1121, but are not limited thereto. The component package 1121 may be in the form of a printed circuit board on which electronic components including active components and / or passive components are surface-mounted. Alternatively, the component package 1121 may be in the form of a printed circuit board in which active components and / or passive components are built-in. Meanwhile, it goes without saying that the electronic device is not necessarily limited to the smartphone 1100, and may be other electronic devices as described above.

[0023] Printed Circuit Board FIG. 3 is a cross-sectional view that shows a schematic example of a printed circuit board, and FIG. 4 is a plan view that shows a schematic cross-section taken along line II' in FIG.

[0024] 1, a printed circuit board 100A according to an example includes a substrate 111, a first through portion H1 penetrating between an upper surface and a lower surface of the substrate 111, a magnetic layer 150 disposed in the first through portion H1, a second through portion H2 penetrating between an upper surface and a lower surface of the magnetic layer 150, an electronic component 140 at least a portion of which is disposed within the second through portion H2, a first through hole h1 penetrating between an upper surface and a lower surface of the magnetic layer 150, and a second through hole h1 disposed on the substrate 111 to cover the magnetic layer 150 and the electronic component 140 and to cover the second through portion H2 and the first through hole h1. The first insulating layer 112 may include a first through hole h2 that penetrates between the upper and lower surfaces of the first insulating layer 112 in the first through hole h1, a first wiring pattern B1 disposed on the upper surface of the magnetic layer 150, a second wiring pattern B2 disposed on the lower surface of the magnetic layer 150, and a first through via 131 that is at least partially disposed in the second through hole h2 and at least partially surrounded by the magnetic layer 150 and includes a first via pattern M1 that connects the first and second wiring patterns B1 and B2 to each other. An inductor may be disposed on the substrate 111 through the magnetic layer 150 and the first through via 131 that includes the first and second wiring patterns B1 and B2 and the first via pattern M1 that are connected to each other in a form that surrounds at least a portion of the magnetic layer 150. A first insulating layer 112 may be disposed between the first and second wiring patterns B1 and B2 and the upper and lower surfaces of the magnetic layer 150, respectively. The first via pattern M1 may be disposed on a wall surface of the second through hole h2, and the first through via 131 may include a first filler R1 filling at least a portion of the space between the first via patterns M1 in the second through hole h2. The second through hole h2 may be filled with the first via pattern M1 without the first filler R1.

[0025] In this way, the printed circuit board 100A according to an example may have a magnetic layer 150 disposed in the first through-hole H1 of the board 111 corresponding to the core layer, and a first through-hole via 131 formed in the magnetic layer 150 to form an inductor surrounding the magnetic layer 150. Also, an electronic component 140 may be disposed in the second through-hole H2 of the magnetic layer 150, and a structure in which the electronic component 140 is embedded together with the inductor may be formed. In this case, the distance between the electronic component 140 and the inductor may be minimized, and the spatial arrangement in the board 111 may be made more efficient. Also, the voltage drop and power loss may be reduced, and the inductance may be improved. Also, slimming and integration may be realized. Meanwhile, the first and second through holes h1 and h2 may be formed in a plurality of pieces, and therefore the first through-hole via 131 may be a plurality of pieces. For example, the inductor may include a plurality of first via patterns M1 and a plurality of first and second wiring patterns B1 and B2. For example, the inductor may include one or more coil parts in which a plurality of first and second wiring patterns B1, B2 and a plurality of first via patterns M1 are alternately connected to each other. In this case, the coil parts may be arranged to surround the electronic component 140 on a plane. Therefore, the above-mentioned effects can be more effectively achieved. Furthermore, since the magnetic layer 150 is arranged in the first penetration part H1 of the substrate 111 and covered with the first insulating layer 112, the metal oxide contained in the magnetic layer 150 does not appear on the surface, and therefore, the magnetic layer 150 can be prevented from being dissolved in an acid solution.

[0026] Meanwhile, the printed circuit board 100A according to an example may further include a third through hole h3 penetrating between the upper and lower surfaces of the substrate 111 and at least a portion of which is filled with the first insulating layer 112, a fourth through hole h4 penetrating between the upper and lower surfaces of the first insulating layer 112 in the third through hole h3, a first wiring layer 121 disposed on the upper surface of the first insulating layer 112 and including a first wiring pattern B1, a second wiring layer 122 disposed on the lower surface of the first insulating layer 112 and including a second wiring pattern B2, and a second through via 132 including a second via pattern M2 at least a portion of which is disposed in the fourth through hole h4 and at least a portion of which is surrounded by the substrate 111 and connects the first and second wiring layers 121 and 122 to each other. The second via pattern M2 may be disposed on a wall surface of the fourth through hole h4, and the through via 132 may include a second filler R2 filling at least a portion of the space between the second via patterns M2 in the fourth through hole h4. If necessary, the third through hole h3 may be omitted, and the fourth through hole h4 may directly penetrate the substrate 111 without the third through hole h3. If necessary, the fourth through hole h4 may be filled with the second via pattern M2 without the second filling material R2. In this manner, the first and second wiring layers 121 and 122 are disposed on the upper and lower surfaces of the first insulating layer 112, and various wiring designs may be possible. In addition, the second through via 132 may be formed at the same time as the first through via 131, thereby simplifying the process and reducing costs and time.

[0027] In addition, the printed circuit board 100A according to an example may include a first via layer 133 including a first connection via penetrating the upper side of the first insulating layer 112 and connecting the first wiring layer 121 to the first connection pad P1 of the electronic component 140, and a second via layer 134 including a second connection via penetrating the lower side of the first insulating layer 112 and connecting the second wiring layer 122 to the back surface of the electronic component 140, for example, a second connection pad P2 disposed on the back surface of the electronic component 140. In this way, the electronic component 140 may be electrically connected to the above-mentioned inductor through the first via layer 133 and the first wiring layer 121. In addition, the electronic component 140 may have an excellent heat dissipation effect through the second via layer 134 and the second wiring layer 122.

[0028] Meanwhile, the printed circuit board 100A according to one example includes a second insulating layer 113 disposed on the upper surface of the first insulating layer 112, a third insulating layer 114 disposed on the lower surface of the first insulating layer 112, a third wiring layer 123 disposed on the upper surface of the second insulating layer 113, a fourth wiring layer 124 disposed on the lower surface of the third insulating layer 114, a third via layer 135 including a third connection via that penetrates the second insulating layer 113 and connects the first and third wiring layers 121 and 123 to each other, and a third insulating layer 114 and connecting the second and fourth wiring layers 122, 124 to each other, a first resist layer 115 disposed on the upper surface of the second insulating layer 113 and having a first opening 115h exposing at least a part of the third wiring layer 123, and a second resist layer 116 disposed on the lower surface of the third insulating layer 114 and having a second opening 116h exposing at least a part of the fourth wiring layer 124. In this way, the package substrate may have the form of a multilayer package substrate realized by a build-up process.

[0029] The components of the printed circuit board 100A according to an example will be described in more detail below with reference to the drawings.

[0030] The substrate 111 may be a core layer. For example, it may include an organic core layer, a glass core layer, a metal core layer, a silicon core layer, or a ceramic core layer. The organic core layer may include an organic insulating material. The organic insulating material may include a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material including an inorganic filler, an organic filler, and / or a glass fiber (glass fiber, glass cloth, glass fabric) together with a resin. For example, the organic insulating material may be a non-photosensitive insulating material such as copper clad laminate (CCL), Ajinomoto build-up film (ABF), prepreg (PPG), etc., but is not limited thereto, and other polymeric materials may be used. The glass core layer may include glass. For example, the glass may include pure silicon dioxide (about 100% SiO2), soda-lime glass, borosilicate glass, alumino-silicate glass, etc. Alternative glass materials, such as, but not limited to, fluorine glass, phosphate glass, chalcogenide glass, etc., may also be used as the material of the glass layer. Other additives may also be included to form glass with specific physical properties. Such additives may include calcium carbonate (e.g., lime) and sodium carbonate (e.g., soda), as well as magnesium, calcium, manganese, aluminum, lead, boron, iron, chromium, potassium, sulfur, and antimony, and carbonates and / or oxides of such elements and other elements. Glass may be distinguished from glass fibers, as described above. The metal core layer may include a metal. The metal may include, but is not limited to, copper (Cu), Invar, etc. The silicon core layer may include pure silicon (Si). If necessary, the silicon core layer may include an oxide layer formed on silicon (Si). It may also include a nitride layer formed on the oxide layer. The oxide layer may include a silicon oxide film, and the nitride layer may include a silicon nitride film, but is not limited to these.The ceramic core layer may include a ceramic material, such as, but not limited to, alumina (Al2O3), aluminum nitride (AlN), silicon carbide (SiC), silicon nitride (Si3N4), and the like.

[0031] The first to third insulating layers 112, 113, and 114 may contain an organic insulating material. As described above, the organic insulating material may contain a thermosetting resin such as an epoxy resin, a thermoplastic resin such as a polyimide, or a material containing an inorganic filler, an organic filler, and / or glass fiber (glass fiber, glass cloth, glass fabric) together with a resin. For example, the organic insulating material may be a non-photosensitive insulating material such as CCL (Copper Clad Laminate), ABF (Ajinomoto Build-up Film), or PPG (Prepreg), but is not limited thereto, and other polymer materials may be used. The first to third insulating layers 112, 113, and 114 may contain the same or different organic insulating materials. Each of the first to third insulating layers 112, 113, and 114 may be composed of a plurality of layers as necessary.

[0032] The first and second resist layers 115 and 116 may include, but are not limited to, a liquid or film type solder resist, and may include other organic insulating materials such as ABF. The first and second resist layers 115 and 116 may have first and second openings 115h and 116h, respectively. The first and second openings 115h and 116h may each be a plurality of openings. The first and second openings 115h and 116h may be formed by solder mask defined (SMD) and / or non-solder mask defined (NSMD). The first and second openings 115h and 116h may expose the third and fourth wiring layers 123 and 124, respectively, and a surface treatment layer may be disposed on the surface of the exposed pattern. The surface treatment layer may be formed by electrolytic gold plating, electroless gold plating, OSP (Organic Solderability Preservative) or electroless tin plating, electroless silver plating, electroless nickel plating / substitution gold plating, DIG (Direct Immersion Gold) plating, HASL (Hot Air Solder Leveling), etc., but is not limited thereto.

[0033] Each of the first to fourth wiring layers 121, 122, 123, and 124 may include a metal material. The metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal material may include copper (Cu), but is not limited thereto. Each of the first to fourth wiring layers 121, 122, 123, and 124 may perform various functions according to the design. For example, the first to fourth wiring layers 121, 122, 123, and 124 may include a signal pattern, a power pattern, a ground pattern, and the like. Each of these patterns may have various forms, such as a line, a plane, and a pad. Each of the first to fourth wiring layers 121, 122, 123, and 124 may include a seed layer and a plating layer formed on the seed layer. The seed layer may be an electroless plating layer (or chemical copper) and / or a sputtering layer, and the plating layer may be an electrolytic plating layer (or electrolytic copper), but is not limited thereto.

[0034] The first and second wiring patterns B1, B2 and the first and second via patterns M1, M2 may include a metal material. As described above, the metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or alloys thereof. Preferably, the metal material may include copper (Cu), but is not limited thereto. The second via pattern M2 may perform various functions according to the design. For example, the second via pattern may include a signal via pattern, a power via pattern, a ground via pattern, and the like. The first and second wiring patterns B1, B2 and the first and second via patterns M1, M2 may include a seed layer and a plating layer formed on the seed layer, respectively. The seed layer may be an electroless plating layer (or chemical copper) and / or a sputtering layer, and the plating layer may be an electrolytic plating layer (or electrolytic copper), but is not limited thereto.

[0035] The first and second fillers R1 and R2 may include a plugging material. The plugging material may include an insulating ink including an insulating resin such as epoxy. However, the plugging material is not limited thereto and may include a conductive ink as necessary. The first and second fillers R1 and R2 may be formed through the same process, and therefore may include the same material, but is not limited thereto.

[0036] The first and second through holes h1, h2 may each be formed in a plurality of numbers. For example, on a plane, in each of the first through holes h1, a second through hole h2 having a smaller diameter than the first through hole h1 may be formed. Therefore, the first through vias 131 may be a plurality of numbers. For example, the inductor may include a plurality of first via patterns M1. The first wiring pattern B1 and the second wiring pattern B2 connected to the plurality of first via patterns M1 may also be a plurality of numbers. The plurality of first and second wiring patterns B1, B2 may be included in the first and second wiring pattern layers, respectively. The first and second wiring pattern layers may be included in the first and second wiring layers 121, 122, respectively. The third and fourth through holes h3, h4 may each be formed in a plurality of numbers. For example, on a plane, in each of the third through holes h3, a fourth through hole h4 having a smaller diameter than the third through hole h3 may be formed. Therefore, the second through vias 132 may also be a plurality of numbers. If necessary, the third through hole h3 may be omitted, and only the fourth through hole h4 may be formed.

[0037] Each of the first to fourth via layers 133, 134, 135, and 136 may include a metal material. As described above, the metal material may include copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti), and / or an alloy thereof. Preferably, the metal material may include copper (Cu), but is not limited thereto. Each of the first to fourth via layers 133, 134, 135, and 136 may include a filled via that fills a via hole, but may also include a conformal via that is disposed along the wall surface of the via hole. The first to fourth via layers 133, 134, 135, and 136 may perform various functions according to the design. For example, they may include a ground via, a power via, a signal via, and the like. The first and second via layers 133 and 134 may include a first and a second connection via having a tapered shape in opposite directions to each other. The third and fourth via layers 135 and 136 may include third and fourth connection vias having tapered shapes in opposite directions. Each of the first to fourth via layers 133, 134, 135, and 136 may include an electroless plating layer (or chemical copper) and an electrolytic plating layer (or electrolytic copper). A sputtering layer may be included instead of the electroless plating layer (or chemical copper), or both may be included.

[0038] The electronic component 140 may be a chip-type electronic component. For example, the electronic component 140 may be in the form of a semiconductor chip, and more specifically, may be an integrated circuit (IC) die in which hundreds to millions of elements are integrated in one chip. The integrated circuit die may be formed based on an active wafer, and in this case, silicon (Si), germanium (Ge), gallium arsenide (GaAs), etc. may be used as a base material for each body. Various circuits may be formed in the body. A first connection pad P1 for connecting to an external circuit, for example, a signal, an electric, a ground, etc., may be formed on the front surface of the body, and the first connection pad P1 may include a conductive material such as aluminum (Al) or copper (Cu). If necessary, a second connection pad P2 made of a conductive material for connecting to a ground or a power may also be formed on the back surface of the body. Such an electronic component 140 may include a circuit for adjusting a voltage. For example, the electronic component 140 may include a voltage regulator. If necessary, there may be a plurality of electronic components 140, and the plurality of electronic components 140 may be disposed together in the second through-hole H2, or a plurality of second through-holes H2 may be formed and an electronic component 140 may be disposed in each of them.

[0039] The magnetic layer 150 may include a magnetic material. The magnetic material may include, for example, a ferrite-based material, a permalloy-based material, etc. For example, the magnetic material may include, but is not limited to, Ni-based ferrite, Ni-Zn-based ferrite, Ni-Zn-Cu-based ferrite, Fe-Si-Al (Sendust), Ni-Mo-Fe (MPP: Molypermalloy Powder Core), Ni-Fe (High Flux Core), etc., and may include other known ferrite-based materials, permalloy-based materials, etc. In addition, various types of magnetic materials including other magnetic powders may be used. Such a magnetic material may be a paste or composition type that fills the first through-hole H1, and may then be hardened to become the magnetic layer 150. Therefore, the magnetic layer 150 may be in contact with the wall surface of the first through-hole H1. For example, the magnetic layer 150 may be in contact with the substrate 111.

[0040] 5 to 12 are cross-sectional views each showing a process for roughly illustrating an example of a method for manufacturing the printed circuit board of FIG.

[0041] 5, a first through-hole H1 is formed in the substrate 111. Also, a third through-hole h3 is formed in the substrate 111. The first through-hole H1 and the third through-hole h3 can be formed by various methods such as laser drilling, mechanical drilling, chemical etching, and a blasting process depending on the material of the substrate 111. Meanwhile, the third through-hole h3 can be omitted as necessary. For example, the third through-hole h3 does not have to be formed.

[0042] Referring to FIG. 6, the first through hole H1 is filled with a magnetic paste or a magnetic composition, which is then cured to form the magnetic layer 150. As shown in FIG.

[0043] 7, a second through portion H2 is formed in the magnetic layer 150. Also, a first through hole h1 is formed in the magnetic layer 150. The second through portion H2 and the first through hole h1 can be formed by a mechanical drill or the like.

[0044] 8, the electronic component 140 is disposed in the second penetration portion H2. The electronic component 140 may be disposed using a tape 210.

[0045] 9, the first insulating layer 112 is formed. For example, the first insulating layer 112 can be laminated by a lamination process such as PPG or ABF to cover at least a portion of each of the substrate 111, the magnetic layer 150, and the electronic component 140, and can fill at least a portion of each of the second through-hole H2 and the first and third through-holes h1 and h3. Thereafter, the laminate can be cut into unit sizes in a trimming process as necessary.

[0046] Referring to FIG. 10, second and fourth through holes h2, h4 are formed in the first and third through holes h1, h3, respectively. The second and fourth through holes h2, h4 can be formed by a mechanical drill or the like. In addition, the first and second via holes 133V, 134V for forming the first and second via layers 133, 134 are formed in the first insulating layer 112 by laser processing or the like. Meanwhile, the fourth through hole h4 can be formed without the third through hole h3, if necessary. For example, the fourth through hole h4 may directly penetrate the substrate 111 without the third through hole h3.

[0047] Referring to Figure 11, first and second via patterns M1, M2, first and second filler materials R1, R2, first and second wiring patterns B1, B2, first and second wiring layers 121, 122, and first and second via layers 133, 134 are formed by a plating process and a plugging process, etc. For example, a plating layer is formed on the upper and lower surfaces of the first insulating layer 112 and the wall surfaces of the second and fourth through holes h2, h4 in a plating process, then the second and fourth through holes h2, h4 are filled with a plugging material in a plugging process, then the plating layer and the plugging material on the upper and lower surfaces of the first insulating layer 112 are removed in a planarization process, and then a plating layer is formed again on the upper and lower surfaces of the first insulating layer 112 in a plating process to form the first and second through vias 131, 132, the first and second wiring layers 121, 122, and the first and second via layers 133, 134. Meanwhile, in the plating process, a plating layer patterned according to the design can be formed using a dry film exposure and development process. In addition, the planarization process can make the upper and lower surfaces of the first insulating layer 112 substantially coplanar, and rough interlayer boundaries can be generated between the plating layers.

[0048] 12, the second and third insulating layers 113, 114, the third and fourth wiring layers 123, 124, and the third and fourth via layers 135, 136 are formed in the required number of layers by a build-up process or the like, and then the first and second resist layers 115, 116 are formed. Also, the first and second openings 115h, 116h are formed in the first and second resist layers 115, 116, respectively. Meanwhile, the second and third insulating layers 113, 114 can be formed by the above-mentioned lamination process, the third and fourth wiring layers 123, 124 and the third and fourth via layers 135, 136 can be formed by the above-mentioned plating process, and the first and second resist layers 115, 116 can be formed by a lamination process or a coating process of a liquid material, or the like.

[0049] The printed circuit board 100A according to the above-mentioned another example can be manufactured through a series of processes, and other explanations may be substantially the same as those described above.

[0050] FIG. 13 is a cross-sectional view that illustrates another example of a printed circuit board.

[0051] Referring to the drawings, the printed circuit board 100B according to another example may further include a semiconductor chip 160 disposed on the first resist layer 115 in the printed circuit board 100A according to the above example. Also, the printed circuit board 100B may further include a plurality of electrical connection metals 170 disposed on the second resist layer 116. The semiconductor chip 160 may be mounted via a connection member 165 or the like. For example, the semiconductor chip 160 may be connected to the third wiring layer 123 via a connection member 165 or the like. The semiconductor chip 160 may be electrically connected to at least a portion of each of the first to fourth wiring layers 121, 122, 123, 124, the first and second through vias 131, 132, and the first to fourth via layers 133, 134, 135, 136, and thus may be electrically connected to the inductor and electronic component 140.

[0052] The semiconductor chip 160 may include an integrated circuit (IC) die in which hundreds to millions of elements are integrated in one chip. In this case, the integrated circuit may be, for example, a logic chip such as a central processor (e.g., CPU), a graphic processor (e.g., GPU), a field programmable gate array (FPGA), a digital signal processor, an encryption processor, a microprocessor, a microcontroller, an application processor (e.g., AP), an analog-to-digital converter, or an application-specific IC (ASIC), but is not limited thereto. Needless to say, the integrated circuit may be a memory chip such as a volatile memory (e.g., DRAM), a non-volatile memory (e.g., ROM), a flash memory, or a High Bandwidth Memory (HBM), or a power management IC (PMIC). The semiconductor chip 160 may be formed based on an active wafer, and in this case, silicon (Si), germanium (Ge), gallium arsenide (GaAs), or the like may be used as a base material forming each main body. Various circuits may be formed in the main body. The body may have connection pads formed thereon, and the connection pads may include a conductive material such as aluminum (Al) or copper (Cu). The semiconductor chip 160 may be a bare die, in which case metal bumps may be disposed on the connection pads. The semiconductor chip 160 may be a packaged die, in which case a redistribution layer may be further formed on the connection pads, and metal bumps may be disposed on the redistribution layer.

[0053] The connecting member 165 can mount the semiconductor chip 160 on a package substrate or the like. The connecting member 165 may be formed of a low melting point metal, for example, solder such as tin (Sn)-aluminum (Al)-copper (Cu), but this is merely an example and the material is not particularly limited thereto. The connecting member 165 may be a ball, a pin, or the like. The connecting member 165 may be formed in a multi-layer or single layer. When formed in a multi-layer, it may include copper pillars and solder, and when formed in a single layer, it may include tin-silver solder, but is also not limited thereto. There may be a plurality of connecting members 165, and the number of connecting members is not particularly limited.

[0054] The electrical connection metal 170 can connect the printed circuit board 100B to a main board of an electronic device or other boards. The electrical connection metal 170 may also be formed of a low melting point metal, for example, solder, but this is only an example and the material is not particularly limited thereto. The electrical connection metal 170 may also be a ball, a pin, etc. The electrical connection metal 170 may also be formed in a multi-layer or single layer. When formed in a multi-layer, it may include copper pillars and solder, and when formed in a single layer, it may include tin-silver solder or copper, but is also not limited thereto. The electrical connection metal 170 may also be a plurality of pieces, and the number of pieces is not particularly limited.

[0055] The other description may be substantially the same as that of the printed circuit board 100A according to the above-mentioned example. Meanwhile, the printed circuit board 100B according to another example may be manufactured by further mounting the semiconductor chip 160 on the upper side using the connecting member 165 in the manufacturing process of the printed circuit board 100A according to the above-mentioned example, and further forming the electrical connecting metal 170 on the lower side, but a detailed description thereof will be omitted.

[0056] FIG. 14 is a cross-sectional view that illustrates an example of a coil portion.

[0057] Referring to the drawings, the inductor included in the above-mentioned printed circuit boards 100A and 100B may include one or more coil parts C, and the coil part C may have a form in which a plurality of first and second wiring patterns B1, B2 and a plurality of first via patterns M1 formed in the main body 180 are alternately connected to each other. For example, the coil part C may have a coil structure in which a required number of second wiring patterns B2, first via patterns M1, first wiring patterns B1, first via patterns M1, second wiring patterns B2, first via patterns M1, first wiring patterns B1, first via patterns M1, etc. are connected on a cross section and alternately repeated up and down. Meanwhile, the main body 180 may include the above-mentioned magnetic layer 150 and the first insulating layer 112. Also, each through hole in which the first via patterns M1 are formed may be filled with a first filler R1. In this manner, the coil unit C may have a structure in which the number of coils surrounding the magnetic layer 150 is maximized, for example, a daisy chain shape that can maximize inductance. Other explanations may be substantially the same as those described for the printed circuit boards 100A and 100B described above, and therefore repeated explanations will be omitted.

[0058] FIG. 15 is a plan view illustrating various examples of the coil portion.

[0059] Referring to the drawings, the coil unit C may have various shapes on a plane. For example, as shown in A, it may include a plurality of coils C1 and C2 arranged in parallel in a line. The plurality of coils C1 and C2 may be arranged at a distance from each other. Other wiring may be arranged between the plurality of coils C1 and C2. Alternatively, as shown in B, it may include a coil C3 arranged in a line, bent from the right, and arranged in a line again. Alternatively, as shown in C, it may include a coil C4 arranged to be repeatedly bent up and down. Alternatively, as shown in D, it may include a coil C5 arranged repeatedly in a shape inclined in one direction. Alternatively, as shown in E, it may include a coil C6 arranged repeatedly in a shape inclined in one direction, bent from the right, and arranged repeatedly in a shape inclined in the opposite direction. Alternatively, as shown in F, it may include a coil C7 arranged repeatedly in an X-shape. In this way, the coil unit C including the coils C1, C2, C3, C4, C5, C6, and C7 of various shapes may be applied to the above-mentioned printed circuit boards 100A and 100B, and may be repeatedly arranged to surround the electronic component 140 in the above-mentioned shapes, for example. However, the shape of the coil unit is not limited to the above-mentioned example. Other explanations may be substantially the same as those described for the above-mentioned printed circuit boards 100A and 100B and the cross-sectional shape of the coil unit C, so duplicate explanations will be omitted.

[0060] In the present invention, the expression "cover" can include not only the case of covering entirely, but also the case of covering at least a part, and can also include not only the case of covering directly, but also the case of covering indirectly. The expression "fill" can include not only the case of filling completely, but also the case of filling at least a part, and can also include the case of filling almost entirely. For example, it can include the case where there are some gaps or voids. The expression "surround" can include not only the case of surrounding completely, but also the case of surrounding a part and the case of surrounding almost entirely. The expression "expose" can include not only the case of exposing completely, but also the case of exposing a part, and "exposure" can mean exposing from embedding the structure. For example, "the opening exposes the pad" can mean exposing the pad from the resist layer, and a surface treatment layer or the like can be further disposed on the exposed pad.

[0061] In the present invention, "disposed in a through-hole or a penetrating portion" includes not only a case where an object is completely disposed in the through-hole or a penetrating portion, but also a case where the object partially protrudes upward or downward on a cross section. For example, if the object is disposed in the through-hole or a penetrating portion on a plane, it can be judged in a broader sense.

[0062] In the present invention, "substantially" can be determined by taking into account process errors, positional deviations, measurement errors, and the like that occur in the manufacturing process. For example, "substantially perpendicular" can include not only a completely perpendicular case, but also a nearly perpendicular case. Furthermore, "substantially coplanar" can include not only a completely coplanar case, but also a nearly coplanar case.

[0063] In the present invention, the term "same insulating material" refers not only to completely identical insulating materials, but also to insulating materials of the same type. Thus, although the compositions of the insulating materials are substantially the same, the specific composition ratios thereof may differ slightly.

[0064] In the present invention, the term "on a cross section" may refer to the cross-sectional shape of an object cut vertically or the cross-sectional shape of an object when viewed from the side, and the term "on a plane" may refer to the planar shape of an object cut horizontally or the planar shape of an object when viewed from the top or bottom.

[0065] In the present invention, for convenience, terms such as "lower side, lower part, lower surface" are used to mean a downward direction based on a cross section of a drawing, and terms such as "upper side, upper part, upper surface" are used to mean the opposite direction. However, these are merely definitions of directions for convenience of explanation, and the scope of the claims is not particularly limited by such directional descriptions, and the concepts of up / down can be changed at any time.

[0066] In the present invention, "connected" is a concept including not only direct connection but also indirect connection via an adhesive layer or the like. Also, "electrically connected" is a concept including both physical connection and no connection. Furthermore, expressions such as "first, second" are used to distinguish one component from another component, and do not limit the order and / or importance of the components. In some cases, the first component may be named the second component, and similarly, the second component may be named the first component, within the scope of the right.

[0067] The term "one example" used in the present invention does not mean the same embodiment, but is provided to emphasize and describe unique features that are different from each other. However, the above-mentioned one example does not exclude that it is realized in combination with the features of another example. For example, even if the matter described in a specific example is not described in another example, it can be understood as a description related to the other example, unless there is a description in the other example that is opposite or contradictory to the matter.

[0068] The terms used in the present invention are merely used to describe an example and are not intended to limit the present invention. In this case, a singular expression includes a plural expression unless the context clearly indicates otherwise. [Explanation of symbols]

[0069] 1000:Electronic equipment 1010: Main board 1020: Chip related parts 1030: Network related parts 1040:Other parts 1050: Camera 1060:Antenna 1070:Display 1080: Battery 1090: Signal line 1100: Smartphone 1110: Motherboard 1120: Parts 1121: Parts package 1130: Camera module 1140: Speaker 100A, 100B: Printed circuit board 111: Substrate 112, 113, 114: insulating layer 115, 116: resist layer 121, 122, 123, 124: Wiring layer 131, 132: Through via 133, 134, 135, 136: via layers 133V, 134V: Via holes 140: Electronic parts 150: Magnetic layer 160: Semiconductor chips 165: Connecting member 170: Electrically Connected Metals 210: Tape C: Coil section c1, c2, c3, c4, c5, c6, c7: coil B1, B2: Wiring pattern M1, M2: Via patterns R1, R2: Filler material H1, H2: Penetration part h1, h2, h3, h4: Through hole P1, P2: Connection pads

Claims

1. A substrate having a first penetrating portion; a magnetic layer having a second through portion and at least a portion of the magnetic layer being disposed within the first through portion; an electronic component at least a portion of which is disposed within the second penetration portion; a first wiring pattern disposed on an upper surface of the magnetic layer; a second wiring pattern disposed on the lower surface of the magnetic layer; a first through via, at least a portion of which is surrounded by the magnetic layer, and which includes a first via pattern connecting the first wiring pattern and the second wiring pattern to each other.

2. The printed circuit board of claim 1 , wherein the electronic component comprises a voltage regulator.

3. The printed circuit board according to claim 1 , further comprising a first insulating layer covering at least a portion of the substrate, the magnetic layer and the electronic component, and filling at least a portion of the second penetration portion.

4. The magnetic layer further has a first through hole, the first insulating layer fills at least a portion of the first through hole; the first insulating layer has a second through hole within the first through hole; the first through via is at least partially disposed within the second through hole; The printed circuit board of claim 3 , wherein the first through via is spaced apart from the magnetic layer.

5. the first via pattern is disposed on a wall surface of the second through hole, The printed circuit board of claim 4 , wherein the first through via further comprises a first filler material filling at least a portion of a space between the first via patterns in the second through hole.

6. a first wiring layer disposed on an upper surface of the first insulating layer; a second wiring layer disposed on a lower surface of the first insulating layer, the first insulating layer is disposed between the first wiring pattern and an upper surface and a lower surface of the magnetic layer, and 4. The printed circuit board according to claim 3, wherein the first wiring layer and the second wiring layer include the first wiring pattern and the second wiring pattern, respectively.

7. The printed circuit board of claim 6 , further comprising a second through via, at least a portion of which is surrounded by the substrate and which includes a second via pattern connecting at least a portion of each of the first wiring layer and the second wiring layer to each other.

8. The substrate further has a third through hole, the first insulating layer fills at least a portion of the third through hole; the first insulating layer has a fourth through hole within the third through hole; the second through via is at least partially disposed within the fourth through hole; The printed circuit board of claim 7 , wherein the second through via is spaced apart from the substrate.

9. the second via pattern is disposed on a wall surface of the fourth through hole, The printed circuit board of claim 8 , wherein the second through via further comprises a second filler material filling at least a portion of a space between the second via patterns in the fourth through hole.

10. a first via layer including a first connection via penetrating an upper side of the first insulating layer and connecting the first wiring layer and the electronic component to each other; The printed circuit board according to claim 6 , wherein the electronic component and the first via pattern are connected to each other through a path passing through the first connection via and the first wiring layer.

11. a second via layer including a second connection via that penetrates through a lower side of the first insulating layer and connects the second wiring layer and the electronic component to each other; the second connection via is connected to a back surface of the electronic component; The printed circuit board of claim 10 , wherein the first connection via and the second connection via have tapered shapes in opposite directions.

12. a second insulating layer disposed on an upper surface of the first insulating layer; a third insulating layer disposed on a lower surface of the first insulating layer; a third wiring layer disposed on an upper surface of the second insulating layer; a fourth wiring layer disposed on a lower surface of the third insulating layer; a third via layer including a third connection via penetrating the second insulating layer and connecting the first wiring layer and the third wiring layer to each other; a fourth via layer including a fourth connection via penetrating the third insulating layer and connecting the second wiring layer and the fourth wiring layer to each other, The printed circuit board of claim 6 , wherein the third connection via and the fourth connection via have tapered shapes in opposite directions.

13. a first resist layer disposed on an upper surface of the second insulating layer and having a first opening exposing at least a portion of the third wiring layer; The printed circuit board according to claim 12 , further comprising: a second resist layer disposed on a lower surface of the third insulating layer and having a second opening that exposes at least a portion of the fourth wiring layer.

14. The printed circuit board according to claim 1 , wherein the magnetic layer is in contact with a wall surface of the first through portion.

15. The printed circuit board of claim 1 , wherein the substrate comprises an organic core layer, a glass core layer, a metal core layer, a silicon core layer, or a ceramic core layer.

16. The printed circuit board according to claim 1 , wherein the first wiring pattern, the second wiring pattern and the first via pattern are connected to each other in a form surrounding at least a portion of the magnetic layer, and an inductor is disposed on the board.

17. A substrate having a first penetrating portion; a magnetic layer having at least a portion disposed within the first through portion and in contact with the substrate, the magnetic layer having a second through portion and a plurality of through holes; a voltage regulator at least partially disposed within the second penetration; an insulating layer covering at least a portion of each of the substrate, the magnetic layer, and the voltage regulator and filling at least a portion of each of the second through portion and the plurality of through holes; a first wiring pattern layer disposed on an upper surface of the insulating layer; a second wiring pattern layer disposed on the lower surface of the insulating layer; and a plurality of via patterns each penetrating the insulating layer within the plurality of through holes.

18. the first wiring pattern layer includes a plurality of first wiring patterns; the second wiring pattern layer includes a plurality of second wiring patterns; The printed circuit board of claim 17 , further comprising one or more coil sections in which the first wiring patterns, the second wiring patterns and the via patterns are alternately connected to each other.

19. The printed circuit board of claim 18 , wherein the one or more coil portions surround the periphery of the voltage regulator in a plane.

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