Semiconductor device

Abstract

To provide a semiconductor device with excellent electric characteristics.SOLUTION: A transistor 200 includes an insulator 216 on an insulator 214, a conductor 205 embedded in the insulator 216, an insulator 222 on the insulator 216 and the conductor 205, an insulator 224 thereon, an oxide 230a thereon, an oxide 230b thereon, an oxide 243a and an oxide 243b thereon, conductors 242a and 242b on the oxides 243a and 243b, insulators 272a and 272b on the conductors 242a and 242b, an oxide 230c on the oxide 230b, an insulator 250 thereon, and a conductor 260 existing thereon and overlapping with the oxide 230c. The oxide 230c is in contact with each of side surfaces of the oxides 243a and 243b and side surfaces of the conductors 242a and 242b. In an insulator 274 and an insulator 280 on the transistor 200, regions 241a and 241b with higher nitrogen concentration than the other regions are formed near an interface with the conductors 240a and 240b.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] One embodiment of the present invention relates to a semiconductor device and a manufacturing method of the semiconductor device. One aspect of the invention relates to a semiconductor wafer, a module, and an electronic device.

[0002] In this specification and the like, a semiconductor device refers to a device that can function by utilizing semiconductor characteristics. This refers to semiconductor devices in general, including semiconductor elements such as transistors, semiconductor circuits, arithmetic units, and memory devices. The device is one aspect of a semiconductor device. device, lighting device, electro-optical device, power storage device, memory device, semiconductor circuit, imaging device, and There are cases where the child devices and the like can be said to have semiconductor devices.

[0003] Note that one embodiment of the present invention is not limited to the above technical fields. An aspect of the present invention relates to an article, a method, or a manufacturing method. is a process, machine, manufacture, or composition of matter. This concerns the issue of the [Background technology]

[0004] In recent years, the development of semiconductor devices has progressed, and LSIs, CPUs, and memories are mainly used. A CPU is a semiconductor integrated circuit (at least transistors and It is an assembly of semiconductor elements having a memory and on which electrodes that serve as connection terminals are formed.

[0005] Semiconductor circuits (IC chips) such as LSI, CPU, and memory are mounted on circuit boards, such as printed circuit boards. They are mounted on printed wiring boards and used as components in a variety of electronic devices.

[0006] In addition, a transistor is formed using a semiconductor thin film formed on a substrate having an insulating surface. This technology is attracting attention. The transistor is used in integrated circuits (ICs) and image display devices (simply called displays). It is widely used in electronic devices such as transistors. Silicon-based semiconductor materials are widely known as semiconductor thin films that can be used for this purpose, but other materials include Oxide semiconductors are attracting attention.

[0007] In addition, a transistor including an oxide semiconductor has a very low leakage current in a non-conducting state. For example, the leakage current of a transistor using an oxide semiconductor is known to be small. A low-power CPU that utilizes this characteristic has been disclosed (see Patent Document 1). In addition, for example, the leakage current of a transistor using an oxide semiconductor is low. The application of this technology has led to the disclosure of a storage device that can retain stored contents for a long period of time. (See Patent Document 2.)

[0008] In recent years, with the trend towards smaller and lighter electronic devices, there is a demand for even higher density integrated circuits. There is also a demand for improved productivity in the manufacture of semiconductor devices including integrated circuits. [Prior art documents] [Patent documents]

[0009] [Patent Document 1] JP 2012-257187 A [Patent Document 2] JP 2011-151383 A Summary of the Invention [Problem to be solved by the invention]

[0010] An object of one embodiment of the present invention is to provide a semiconductor device having favorable electrical characteristics. Another embodiment of the present invention provides a semiconductor device having normally-off electrical characteristics. Another object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object of one embodiment of the present invention is to provide a semiconductor having a large on-state current. Another object of the present invention is to provide a semiconductor device having high frequency characteristics. Another object of the present invention is to provide a semiconductor device having a micro Another object of the present invention is to provide a semiconductor device that can be easily fabricated or highly integrated. An object of one embodiment of the present invention is to provide a semiconductor device with high productivity.

[0011] One embodiment of the present invention is to provide a semiconductor device capable of retaining data for a long period of time. One object of one embodiment of the present invention is to provide a semiconductor device in which data can be written at a high speed. One object of one embodiment of the present invention is to provide a semiconductor device having high design freedom. One object of one embodiment of the present invention is to provide a semiconductor device capable of reducing power consumption. One object of the present invention is to provide a novel semiconductor device. is one of the challenges.

[0012] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter will be self-evident from the description, drawings, claims, etc. Other issues can be extracted from the drawings, claims, etc. [Means for solving the problem]

[0013] One aspect of the present invention is a semiconductor device comprising a first oxide, a first conductor and a second conductor on the first oxide. a first insulator on the first conductor, a second insulator on the second conductor, and the first insulator a third insulator on the first conductor and the second insulator, and a first oxide on the first conductor and the second conductor. a second oxide disposed between the first and second insulators; a fourth insulator on the second oxide; a third conductor on the top, a top surface of the third insulator, a top surface of the second oxide, and a top surface of the fourth insulator; and a fifth insulator in contact with an upper surface of the third conductor; and a fourth conductor embedded in an opening formed in the fifth insulator and in contact with the first conductor; A second conductor is embedded in an opening formed in the second insulator, the third insulator, and the fifth insulator. the third insulator has a fifth conductor in contact with the fourth conductor, and and a region having a higher nitrogen concentration than other regions of the third insulator near the interface with the fifth conductor. It is a semiconductor device.

[0014] In the above, the first conductor has a first conductor near the interface with the fourth conductor. The second conductor has a region having a higher nitrogen concentration than other regions, and the second conductor has a region near the interface with the fifth conductor. Preferably, the second conductor has a region having a higher nitrogen concentration than other regions.

[0015] Another aspect of the present invention is a semiconductor device comprising a first insulator, a first conductor on the first insulator, and a first conductor. a second insulator on the conductive body, a first oxide on the second insulator, and a second conductor on the first oxide. a third conductor, a third insulator on the second conductor, and a fourth insulator on the third conductor. a fifth insulator on the third insulator and the fourth insulator; and a first oxide on the first oxide. a second oxide disposed between the second conductor and the third conductor; and a sixth insulator on the second oxide. a fourth conductor on the edge, a sixth insulator, a top surface of the fifth insulator, and a top surface of the second oxide; a seventh insulator in contact with an upper surface of the sixth insulator and an upper surface of the fourth conductor; the top and side surfaces of the body, the side surfaces of the fifth insulator, the side surfaces of the second insulator, and the first insulator An eighth insulator in contact with the top surface, a third insulator, a fifth insulator, a seventh insulator, and a third insulator. a fifth conductor embedded in an opening formed in the insulator of the eighth embodiment and in contact with the second conductor; The openings formed in the fourth insulator, the fifth insulator, the seventh insulator, and the eighth insulator are filled with a sixth conductor embedded in the fifth insulator and in contact with the third conductor; and a fifth insulator a fifth conductor near the interface with the fifth conductor, a sixth conductor near the interface with the sixth insulator, and an eighth insulator near the interface with the fifth conductor, The present invention relates to a semiconductor device having an insulator having a region with a higher nitrogen concentration than other regions.

[0016] In the above, the second conductor has a second conductor near the interface with the fifth conductor. The third conductor has a region having a higher nitrogen concentration than other regions, and the third conductor has a region near the interface with the sixth conductor. Preferably, the third conductor has a region having a higher nitrogen concentration than other regions.

[0017] Another embodiment of the present invention is a semiconductor device including first to fifth conductors, first to fifth insulators, and first and A method for manufacturing a semiconductor device having a first oxide and a second oxide on a substrate, forming a first conductive layer on the first oxide and a first insulator layer on the first conductive layer; A third insulator is formed on the first insulator layer, and an opening is formed in the third insulator so as to reach the first insulator layer. forming an opening and removing the first conductive layer and the first insulating layer in a region overlapping the opening; , a first conductor, a second conductor, a first insulator, and a second insulator are formed, a first oxide film is formed between the first conductor and the second conductor so as to be in contact with the first oxide; A first insulating film is formed on the oxide film, a first conductive film is formed on the first insulating film, and a first A part of the oxide film, a part of the first insulating film, and a part of the first conductive film are disposed on a third insulator. The surface is then stripped away until the surface is exposed to form a second oxide, a fourth insulator, and a third conductor. , a third insulator, a second oxide, a fourth insulator, and a third conductor, and a fifth insulator. A first insulator, a third insulator, and a fifth insulator are formed on the first conductor. and forming an opening through which the second conductive layer is formed, and the second insulator, the third insulator, and the fifth insulator are provided with a second conductive layer. An opening is formed to reach the first conductive material, and microwave processing is performed in a nitrogen-containing atmosphere. forming a fourth conductor so as to be embedded in the opening reaching the second conductor; The fifth conductor is formed so as to be embedded in the semiconductor device.

[0018] In the above, the microwave treatment is preferably carried out under reduced pressure.

[0019] One embodiment of the present invention is a semiconductor device including first and second conductors, first to seventh insulators, and first and A method for manufacturing a semiconductor device having a first oxide, comprising: forming a first insulator on a substrate; forming a first conductor on the first insulator, and depositing a second insulator on the first conductor; A third insulator is deposited on the second insulator, a first oxide is formed on the third insulator, and a first oxide is formed on the third insulator. A fourth insulator is formed on the first oxide, and a first opening is formed in the fourth insulator so as to reach the first oxide. a first oxide and a fourth insulator in the first opening; A first oxide film is formed, a first insulating film is formed on the first oxide film, and a first insulating film is formed on the first insulating film. A first conductive film is formed, and a part of the first oxide film, a part of the first insulating film, and a part of the first conductive film are formed. A portion is removed until the top surface of the fourth insulator is exposed, and the second oxide, the fifth insulator, and and a second conductor, and a fourth insulator, a second oxide, a fifth insulator, and a second A sixth insulator is formed in contact with the conductor, and a part of the sixth insulator, a part of the fourth insulator, and a part of the third insulator are formed. A part of the third insulator and a part of the second insulator are removed to form a second insulator that reaches the first insulator. An opening is formed, and the sixth insulator, the fourth insulator, the third insulator, and the second insulator are covered. Then, a seventh insulator is formed in contact with the first insulator at the second opening, and a third insulator, a fourth insulator, The insulator and the first insulating film are formed using a gas having molecules containing silicon atoms. Molecules containing silicon atoms have 3 or less hydrogen atoms per silicon atom. A method for manufacturing a semiconductor device.

[0020] In the above, after the second opening is formed, a microwave treatment is performed in an atmosphere containing nitrogen. It is preferable that:

[0021] In the above, it is preferable that the molecule containing a silicon atom does not contain a hydrogen atom. In the above, the gas having molecules containing silicon atoms does not contain hydrogen atoms. , is preferred.

[0022] In the above, the first insulator and the seventh insulator are more likely to absorb hydrogen than the fourth insulator. It is preferable that the material is difficult to penetrate.

[0023] In the above, the fourth insulator is formed by using a PECVD method or an APCVD method. In the above, the first insulating film is preferably formed by PEALD. It is preferred that the deposition is carried out using a thermal ALD process. Effect of the Invention

[0024] According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to another embodiment of the present invention, a semiconductor device having normally-off electrical characteristics is provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device having a large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device having high frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device having high productivity can be provided. An apparatus can be provided.

[0025] Alternatively, a semiconductor device capable of retaining data for a long period of time can be provided. Alternatively, a semiconductor device with a high data writing speed can be provided. It is possible to provide a semiconductor device having a high degree of freedom. It is possible to provide a semiconductor device. Alternatively, it is possible to provide a novel semiconductor device. .

[0026] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have all of these effects. Effects other than these are described in the specification. The above will become apparent from the description, drawings, claims, etc. From the above description, it is possible to extract other effects. [Brief description of the drawings]

[0027] [Figure 1] 1A, 1B, 1C, and 1D are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Diagram 2] 2A, 2B, 2C, and 2D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Diagram 3] 3A, 3B, 3C, and 3D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 4] 4A, 4B, 4C, and 4D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Diagram 5] 5A, 5B, 5C, and 5D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 6] 6A, 6B, 6C, and 6D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 7] 7A, 7B, 7C, and 7D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 8] 8A, 8B, 8C, and 8D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 9] 9A, 9B, 9C, and 9D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 10] 10A, 10B, 10C, and 10D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 11] 11A, 11B, 11C, and 11D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 12]12A, 12B, 12C, and 12D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 13] 13A, 13B, 13C, and 13D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 14] 14A, 14B, 14C, and 14D are top views and cross-sectional views illustrating a method for manufacturing a semiconductor device according to one embodiment of the present invention. [Figure 15] FIG. 15 is a top view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 16] FIG. 16 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 17] FIG. 17 is a cross-sectional view illustrating a microwave processing apparatus according to one embodiment of the present invention. [Figure 18] 18A, 18B, 18C, and 18D are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 19] 19A, 19B, 19C, and 19D are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 20] 20A, 20B, 20C, and 20D are a top view and a cross-sectional view of a semiconductor device according to one embodiment of the present invention. [Figure 21] 21A and 21B are cross-sectional views of a semiconductor device according to one embodiment of the present invention. [Figure 22] FIG. 22 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Diagram 23] FIG. 23 is a cross-sectional view illustrating a configuration of a memory device according to one embodiment of the present invention. [Figure 24] 24A and 24B are block diagrams illustrating configuration examples of a memory device according to one embodiment of the present invention. [Diagram 25] 25A, 25B, 25C, 25D, 25E, 25F, 25G, and 25H are circuit diagrams illustrating configuration examples of a memory device according to one embodiment of the present invention. [Figure 26]26A and 26B are schematic diagrams of a semiconductor device according to one embodiment of the present invention. [Figure 27] 27A, 27B, 27C, 27D, and 27E are schematic diagrams of a memory device according to one embodiment of the present invention. [Figure 28] 28A, 28B, 28C, 28D, 28E1, 28E2, and 28F are diagrams showing electronic devices according to one embodiment of the present invention. [Figure 29] FIG. 29 is a schematic diagram showing the structure of a sample according to an embodiment of the present invention. [Diagram 30] 30A, 30B, and 30C are diagrams showing STEM images of a sample according to an embodiment of the present invention. [Diagram 31] FIG. 31 is a diagram showing the results of EDX analysis of a sample according to an embodiment of the present invention. [Diagram 32] 32A, 32B, and 32C are diagrams showing the results of SIMS analysis of a sample according to an embodiment of the present invention. [Diagram 33] 33A and 33B are diagrams showing the resistivity of a sample according to an embodiment of the present invention. [Diagram 34] 34A and 34B are diagrams showing the results of SIMS analysis of a sample according to an embodiment of the present invention. [Diagram 35] FIG. 35 is a schematic diagram showing the structure of a sample according to an embodiment of the present invention. [Diagram 36] FIG. 36 is a diagram showing the results of SIMS analysis of a sample according to an embodiment of the present invention. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0028] Hereinafter, the embodiments will be described with reference to the drawings. It is understood that the present invention can be practiced in many different ways without departing from the spirit and scope of the present invention. It will be readily understood by those skilled in the art that various changes in form and details may be made. Therefore, the present invention should not be construed as being limited to the description of the following embodiment modes.

[0029] In the drawings, the size, layer thickness, or area may be exaggerated for clarity. Therefore, the drawings are not necessarily limited to the scale. The examples are shown in schematic form, and are not limited to the shapes or values ​​shown in the drawings. For example, In the actual manufacturing process, layers and resist masks are damaged by etching and other processes. However, in order to make it easier to understand, this is not reflected in the diagram. In the drawings, the same parts or parts having similar functions are designated by the same reference numerals in different drawings. In addition, when referring to similar functions, In such cases, the hatch patterns may be the same and no particular reference numbers may be used.

[0030] In addition, in particular in top views (also called "plan views") and perspective views, etc., the invention is easily understood. In order to simplify the illustration, some of the components may be omitted. may be omitted.

[0031] In addition, in this specification, ordinal numbers such as 1st, 2nd, etc. are used for convenience. It does not indicate the order of processes or stacking. For example, "first" may be changed to "second "the" or "third" can be used as appropriate. The ordinal numbers described herein may not coincide with the ordinal numbers used to identify an aspect of the present invention. There are cases where this is the case.

[0032] In addition, in this specification, the terms "above" and "below" that indicate an arrangement are used to refer to the relationship between components. The positional relationship is used for convenience in describing the drawings. The relationship changes accordingly depending on the direction in which each configuration is depicted. The terms are not limited to those described above, and may be rephrased appropriately depending on the situation.

[0033] For example, in the present specification, it is explicitly stated that X and Y are connected. The cases are when X and Y are electrically connected and when X and Y are functionally connected. The case where X and Y are directly connected and the case where X and Y are directly connected are disclosed in the present specification, etc. Therefore, the connection relationship is limited to a specific one, for example, the connection relationship shown in the figure or text. Connections other than those shown in the drawings or text are also disclosed in the drawings or text. It shall be so.

[0034] Here, X and Y are objects (e.g., devices, elements, circuits, wiring, electrodes, terminals, conductive films, layer, etc.).

[0035] In addition, the functions of the source and drain may differ depending on whether transistors of different polarities are used or the circuit In operation, when the direction of the current changes, the positions may be reversed. In the specification, the terms source and drain may be used interchangeably. do.

[0036] In this specification and the like, depending on the structure of the transistor, the channel may not actually be formed. The channel width in the region where the semiconductor device is to be formed (channel formation region) (hereinafter referred to as the "effective channel width") The channel width shown in a top view of a transistor (hereinafter referred to as the apparent channel width) is For example, if the gate covers the side of the semiconductor, , the effective channel width becomes larger than the apparent channel width, and the effect of this becomes negligible. For example, in a miniature transistor where the gate covers the side of the semiconductor, There are cases where the proportion of the channel formation region formed on the side of the semiconductor increases. In that case, , the effective channel width is larger than the apparent channel width.

[0037] In such cases, it may be difficult to estimate the effective channel width through actual measurements. For example, to estimate the effective channel width from the design value, the shape of the semiconductor must be known. Therefore, if the shape of the semiconductor is not known accurately, Channel width is difficult to measure accurately.

[0038] In this specification, when the term "channel width" is used, it refers to the apparent channel width. In this specification, when the term "channel width" is used, it means an effective channel The channel length, channel width, effective channel width, apparent channel width, etc. The channel width and other parameters can be determined by analyzing cross-sectional TEM images, etc. can.

[0039] The impurities in a semiconductor are, for example, substances other than the main components that make up the semiconductor. Elements with a concentration of less than 0.1 atomic percent can be considered impurities. For example, The DOS (Density of States) of the semiconductor increases and the crystallinity decreases. When the semiconductor is an oxide semiconductor, the semiconductor properties may be deteriorated. The impurities to be changed include, for example, Group 1 elements, Group 2 elements, Group 13 elements, Group 14 elements, These include elements, Group 15 elements, and transition metals other than the main components of oxide semiconductors, for example: Hydrogen, lithium, sodium, silicon, boron, phosphorus, carbon, nitrogen, etc. Oxides In the case of a semiconductor, water may also function as an impurity. In some cases, oxygen vacancies may be formed due to the inclusion of impurities. In this case, impurities that change the properties of a semiconductor include, for example, oxygen and Group 1 elements excluding hydrogen. , Group 2 elements, Group 13 elements, Group 15 elements, etc.

[0040] In this specification and the like, silicon oxynitride refers to a material having a composition containing more oxygen than nitrogen. Silicon nitride oxide is a material that contains more oxygen than silicon. It has a high nitrogen content.

[0041] In addition, in this specification, the term "insulator" may be replaced with "insulating film" or "insulating layer." In addition, the term "conductor" can be replaced with "conductive film" or "conductive layer." In addition, the term "semiconductor" can be replaced with "semiconductor film" or "semiconductor layer." can.

[0042] In addition, in this specification, "parallel" means that two straight lines are at an angle of -10 degrees or more and 10 degrees or less. Therefore, it includes the case where the angle is between -5 degrees and 5 degrees. "Almost parallel" means that the two straight lines are arranged at an angle of -30 degrees or more and 30 degrees or less. "Perpendicular" means that two straight lines are arranged at an angle of 80 degrees or more and 100 degrees or less. Therefore, it includes the case where the angle is between 85 degrees and 95 degrees. " refers to a state in which two straight lines are arranged at an angle of 60 degrees or more and 120 degrees or less.

[0043] In this specification, the term "barrier film" refers to a film that prevents impurities such as water and hydrogen from passing through, and oxygen. If the barrier film is conductive, it is called a conductive barrier. It is sometimes called the a membrane.

[0044] In this specification, the term "metal oxide" refers to metals in a broad sense. Metal oxides are oxide insulators and oxide conductors (including transparent oxide conductors). ), oxide semiconductor (also called oxide semiconductor or simply OS) For example, when a metal oxide is used in the semiconductor layer of a transistor, the Metal oxides are sometimes called oxide semiconductors. In the case of a transistor, a transistor having an oxide or an oxide semiconductor is used. In other words:

[0045] In this specification and the like, normally off means that no potential is applied to the gate, or The current per 1 μm of channel width that flows through a transistor when a ground potential is applied to the gate At room temperature, -20 A or less, 1×10 at 85℃ -18 A or below, or 1×10 at 125℃ -16 This means that it is A or lower.

[0046] (Embodiment 1) An example of a semiconductor device including a transistor 200 according to one embodiment of the present invention will be described below. The method for producing the same will be described.

[0047] <Example of semiconductor device configuration> 1A, 1B, 1C, and 1D show a transistor 200 according to one embodiment of the present invention. 1A and 1B are a top view and a cross-sectional view of a transistor 200 and its surroundings.

[0048] FIG. 1A is a top view of a semiconductor device having a transistor 200. 1B is a cross-sectional view of the semiconductor device shown in FIG. 1A along line A1-A2. 1 is a cross-sectional view of a portion indicated by a dashed line in FIG. 1, and is a cross-sectional view of a transistor 200 in a channel length direction. FIG. 1C is a cross-sectional view of the area indicated by the dashed line A3-A4 in FIG. 1A. FIG. 1D is a cross-sectional view of the transistor 200 in the channel width direction. 1A is a cross-sectional view of a portion indicated by a dashed line in FIG. 1A. Some elements have been omitted for the sake of brevity.

[0049] The semiconductor device according to one embodiment of the present invention includes an insulator 212 on a substrate (not shown), an insulator 214 on the top, a transistor 200 on the insulator 214, and a an insulator 280, an insulator 282 on the insulator 280, and an insulator 283 on the insulator 282; and an insulator 274 on an insulator 283. 0, the insulator 282, the insulator 283, and the insulator 274 function as interlayer films. A conductor 240 (conductor 24) electrically connected to the transistor 200 and functioning as a plug 0a, and conductor 240b. Also, on the insulator 274, and on the conductor 240 On the top of the conductor 240, a conductor 246 (conductor 24 6a, and conductor 246b).

[0050] The conductor 240 has a first conductor provided thereon and a second conductor provided thereon. Here, the height of the upper surface of the conductor 240 and the height of the upper surface of the insulator 274 are approximately the same. In the transistor 200, the first conductor of the conductor 240 and the conductor 24 However, the present invention is not limited to this. For example, the conductor 240 may be provided as a single layer or a laminated structure of three or more layers. When the structure has a laminated structure, the layers may be distinguished by giving an ordinal number in the order of formation. .

[0051] As shown in FIG. 1, the transistor 200 in this embodiment has a It is preferable that the upper surface and the side surface are covered with an insulator 283. In the structure in which the insulator 283 and the insulator 212 are in contact with each other outside the transistor 200, It is preferable that the transistor 200 is sealed with the insulator 283 and the insulator 212. stomach.

[0052] [Transistor 200] As shown in FIG. 1, the transistor 200 includes an insulator 216 on an insulator 214 and an insulator The conductors 205 (conductor 205a and conductor 205b) are disposed so as to be embedded in the conductor 216. 05b), on the insulator 216, and on the conductor 205, on the insulator 222, The insulator 224, the oxide 230a on the insulator 224, and the oxide 230a on the oxide 23 0b, oxide 243a on oxide 230b, and oxide 243b on oxide 243a conductor 242a on oxide 243b; conductor 242b on oxide 243b; and insulator on conductor 242a. 272a, insulator 272b on conductor 242b, and oxide 230c on oxide 230b. and an insulator 250 on the oxide 230c. and a layer 252 on the insulator 250 that overlaps the oxide 230c. The conductive material 260 (conductive material 260a and conductive material 260b) is also oxidized. The object 230c includes a side surface of the oxide 243a, a side surface of the oxide 243b, a side surface of the conductor 242a, and The conductor 260 is in contact with the side surfaces of the conductor 260a and the conductor 242b. The conductor 260a is disposed so as to surround the bottom and sides of the conductor 260b. Here, as shown in FIG. 1B, the upper surface of the conductor 260 is aligned with the upper surface of the insulator 250. The insulator 282 is disposed so as to be substantially flush with the upper surface of the conductor 26. 0, insulator 250, oxide 230c, and insulator 280.

[0053] In the following, the oxide 243a and the oxide 243b are collectively referred to as the oxide 243. In addition, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. In addition, the conductor 242a and the conductor 242b may be collectively referred to as the conductor 242. In addition, the insulator 272a and the insulator 272b may be collectively referred to as the insulator 272.

[0054] In transistor 200, conductor 260 serves as the gate of the transistor. The conductor 242a and the conductor 242b serve as a source electrode and a drain electrode, respectively. The transistor 200 has a conductor 260 that functions as a gate and an insulator 280. The conductor 260 is formed in a self-aligned manner so as to fill the opening formed by the above. By forming the conductive material 242 in this manner, the conductive material 242 is formed in the region between the conductive material 242a and the conductive material 242b. 60 can be reliably positioned without alignment.

[0055] In addition, the insulators 212, 214, 222, and 272 (hereinafter, the insulator 27 2a and insulator 272b may be collectively referred to as insulator 272. At least one of the insulators 282 and 283 is made of hydrogen (e.g., hydrogen atoms, hydrogen molecules, etc.). It is preferable that the insulator 212 has a function of suppressing the diffusion of water molecules. and the insulator 283 is hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.) or It is preferable that the insulator 212 and the insulator 214 have a high function of suppressing the diffusion of water molecules. At least one of the insulators 222, 272, 282, and 283 is Has a function of suppressing the diffusion of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.) For example, the insulator 212, the insulator 214, the insulator 222, the insulator 272, At least one of the insulators 282 and 283 is more resistant to oxygen and water than the insulator 224. It is preferable that one or both of the insulating materials have low permeability. At least one of the body 222, the insulator 272, the insulator 282, and the insulator 283 is an insulator. It is preferable that the permeability of the insulator to oxygen and / or hydrogen is lower than 250. 12, insulator 214, insulator 222, insulator 272, insulator 282, and insulator 283 At least one of the insulating layers 280 is less permeable to oxygen and / or hydrogen than the insulating layer 280. It is preferable.

[0056] Insulator 212, insulator 214, insulator 222, insulator 272, insulator 282, and insulator The insulator 283 may be, for example, aluminum oxide, hafnium oxide, gallium oxide, indium oxide, or the like. Diode gallium zinc oxide, silicon nitride, or silicon oxynitride may be used. In particular, the insulators 212 and 283 are preferably made of nitrogen, which has a higher hydrogen barrier property. It is preferable to use silicon oxide or silicon oxynitride.

[0057] In addition, as shown in FIG. 1, insulator 214 , insulator 216, insulator 222, insulator 224, insulator 280, and insulator 282 are The insulator 283 covers the insulator. 283 denotes the top and side surfaces of the insulator 282, the side surface of the insulator 280, and the side surface of the insulator 224. the surface of the insulator 222, the side of the insulator 216, the side of the insulator 214, and the insulator 2 12. As a result, the insulator 214, the insulator 212, and the oxide 230 are in contact with each other. 6, insulator 222, insulator 224, insulator 280, and insulator 282 are insulator 283. and is isolated from the outside by an insulator 212.

[0058] The oxide 230 is formed by a oxide 230a on the insulator 224 and an oxide 230b on the oxide 230a. and a metal oxide 230b disposed on the oxide 230b and at least a portion of the metal oxide 230b is disposed on the upper surface of the oxide 230b. and a contact oxide 230c. Here, the side of the oxide 230c is preferably Oxide 243a, oxide 243b, conductor 242a, conductor 242b, insulator 272a, It is preferable that the insulator 272b and the insulator 280 are provided in contact with each other.

[0059] In the transistor 200, the oxide 23 is formed in the channel formation region and in the vicinity thereof. 1 shows a structure in which three layers of oxide 230a, oxide 230b, and oxide 230c are laminated. However, the present invention is not limited to this. For example, a single layer of oxide 230b, oxide 23 a two-layer structure of oxide 230b and oxide 230a, a two-layer structure of oxide 230b and oxide 230c, or For example, the oxide 230c may have a two-layer structure. In this case, a four-layer laminate structure may be provided.

[0060] The transistor 200 includes an oxide 230 (oxide 230a, oxide The oxide 230c is provided with a metal oxide (hereinafter For example, a semiconductor that functions as an oxide semiconductor is preferably used. The metal oxide has an energy gap of 2 eV or more, preferably 2.5 eV or more. In this way, it is preferable to use a metal oxide having a large energy gap. As a result, the leakage current (off-state current) of the transistor 200 in the non-conducting state is extremely small. By using such a transistor, a semiconductor device with low power consumption can be manufactured. We can provide it.

[0061] For example, the oxide 230 may be an In-M-Zn oxide (wherein the element M is aluminum or gallium). Sodium, Yttrium, Tin, Copper, Vanadium, Beryllium, Boron, Titanium, Iron, Nickel , Germanium, Zirconium, Molybdenum, Lanthanum, Cerium, Neodymium, Hafnium One or more selected from aluminum, tantalum, tungsten, magnesium, etc. In particular, the element M may be an oxide of a metal such as aluminum, gallium, yttrium, or the like. In addition, the oxide 230 may be In-M oxide, In-Z oxide, or In-Zr oxide. Alternatively, M-Zn oxide or M-Zn oxide may be used.

[0062] The oxide 230 is made up of an oxide 230a, an oxide 230b on the oxide 230a, and an oxide 230b on the oxide 230a. The oxide 230c is located on the oxide 230b. The oxide 230a is located under the oxide 230b. As a result, impurities from the structure formed below the oxide 230a are transferred to the oxide 230b. The diffusion can be suppressed. In addition, by having the oxide 230c on the oxide 230b, Diffusion of impurities from structures formed above oxide 230c into oxide 230b can be suppressed.

[0063] The oxide 230 has a layered structure made of oxides having different atomic ratios of metal atoms. Specifically, in the metal oxide used for the oxide 230a, the constituent elements The atomic ratio of element M in the oxide 230b is the atomic ratio of element M in the metal oxide in the constituent elements. It is preferable that the atomic ratio of the metal oxide used for the oxide 230a is larger than that of the element M. In the metal oxide used for the oxide 230b, the atomic ratio of element M to In is It is preferable that the atomic ratio of element M to In is larger than that of element In. In the metal oxide used, the atomic ratio of In to the element M is It is preferable that the atomic ratio of In is larger than that of the element M in the metal oxide. The oxide 230c is a metal oxide that can be used for the oxide 230a or the oxide 230b. The object can be used.

[0064] Specifically, the oxide 230a is In:Ga:Zn=1:3:4 [atomic ratio], Alternatively, a metal oxide having an atomic ratio of 1:1:0.5 may be used. In:Ga:Zn=4:2:3 [atomic ratio] or 1:1:1 [atomic ratio] gold The oxide 230c may be a metal oxide having a composition of In:Ga:Zn=1:3:4. [atomic ratio], Ga:Zn=2:1 [atomic ratio], or Ga:Zn=2:5 [atomic ratio] In addition, a specific example of the oxide 230c having a laminated structure is as follows: The atomic ratios are In:Ga:Zn=4:2:3 and In:Ga:Zn=1:3:4. [Atomic ratio] Ga:Zn=2:1 [Atomic ratio] and In:Ga:Zn=4 Zn:Ga=2:3 [atomic ratio], Ga:Zn=2:5 [atomic ratio], and In:Ga: Zn=4:2:3 [atomic ratio] laminated structure, gallium oxide and In:Ga:Zn=4: Examples include a layered structure with an atomic ratio of 2:3.

[0065] In addition, the oxide 230b preferably has crystallinity. -OS(c-axis aligned crystalline oxide sem It is preferable to use a crystalline material such as CAAC-OS. Oxides have few impurities and defects (such as oxygen vacancies), high crystallinity, and a dense structure. Therefore, the source electrode or drain electrode is capable of drawing oxygen from the oxide 230b. This can prevent the oxide 230b from being removed by heat treatment. Since the pull-out of the semiconductor material can be reduced, the transistor 200 can be manufactured with high It is stable with respect to temperature (so-called thermal budget).

[0066] In addition, the energy of the conduction band minimum of the oxide 230a and the oxide 230c is It is preferable that the energy of the oxide is higher than the minimum energy of the conduction band of 0b. The electron affinity of the oxide 230a and the oxide 230c is smaller than the electron affinity of the oxide 230b. It is preferable that

[0067] Here, the electron affinity or the energy level Ec at the bottom of the conduction band is the vacuum level and the valence band The ionization potential Ip, which is the difference between the edge energy Ev and the energy gap Eg The ionization potential Ip can be calculated, for example, by ultraviolet photoelectron spectroscopy. (UPS:Ultraviolet Photoelectron Spectrosc The energy gap Eg can be measured, for example, by spectroscopy. It can be measured using an ellipsometer.

[0068] In addition, at the junctions of the oxides 230a, 230b, and 230c, The energy level of the lower band edge changes gradually. The energy level of the conduction band minimum at the junction of the oxide 230c and the oxide 230b is continuous. In order to achieve this, the oxide 2 At the interface between oxide 30a and oxide 230b, and at the interface between oxide 230b and oxide 230c, In this case, the defect level density of the mixed layer formed by the above-mentioned method is preferably reduced.

[0069] The main path of the carriers is the oxide 230b. By configuring the oxide 230a and the oxide 230b as described above, the interface between the oxide 230a and the oxide 230b and the oxide The defect state density at the interface between the oxide 230b and the oxide 230c can be reduced. Therefore, the effect of interface scattering on carrier conduction is reduced, and the transistor 200 has a high ohmic contact. It is possible to obtain high input current and high frequency characteristics.

[0070] The oxide 230 (for example, the oxide 230b) is made of an oxide semiconductor having a low carrier concentration. In the case of lowering the carrier concentration of the oxide semiconductor, It is sufficient to lower the impurity concentration in the conductor and to lower the defect level density. A low impurity concentration and a low defect level density are called high purity intrinsic or substantially high purity intrinsic. Examples of impurities in an oxide semiconductor include hydrogen, nitrogen, an alkali metal, an alkali metal, and an alkali metal. These include lithium-earth metals, iron, nickel, and silicon.

[0071] In particular, hydrogen contained in oxide semiconductors reacts with oxygen that bonds with metal atoms to form water. Therefore, oxygen vacancies (V O :Oxygen vacancy) In addition, there are defects in which hydrogen is inserted into oxygen vacancies (hereafter referred to as V O Sometimes called H. ) can act as a donor, producing electrons as carriers. Some of them may combine with oxygen, which bonds with metal atoms, to generate electrons that act as carriers. Therefore, a transistor using an oxide semiconductor containing a large amount of hydrogen is a normally-on transistor. In addition, hydrogen in the oxide semiconductor is easily moved by stress such as heat and electric field. Therefore, if an oxide semiconductor contains a large amount of hydrogen, the reliability of a transistor decreases. There is also a risk.

[0072] V O H can function as a donor in oxide semiconductors. Therefore, in the case of oxide semiconductors, it is difficult to evaluate the donor concentration, but In this specification, the parameters of the oxide semiconductor are evaluated based on the carrier concentration. As the data, the carrier concentration assuming the absence of an applied electric field is used instead of the donor concentration. In other words, the "carrier concentration" described in this specification may be called the "donor concentration." In some cases, it may be possible to replace it.

[0073] From the above, when an oxide semiconductor is used for the oxide 230, V in the oxide 230 O H It is preferable to reduce the amount of the fluorine as much as possible to obtain a high-purity pure or substantially high-purity pure product. , V O In order to obtain an oxide semiconductor with sufficiently reduced H, it is necessary to reduce moisture, hydrogen, etc. in the oxide semiconductor. Removing impurities (sometimes referred to as dehydration or dehydrogenation treatment) and It is important to supply oxygen to the food to compensate for the oxygen deficiency (sometimes referred to as oxygen addition treatment). It is essential. O The oxide semiconductor with sufficiently reduced impurities such as H is used as the channel of the transistor. By using it in the hole formation region, stable electrical characteristics can be imparted.

[0074] However, even if an oxide semiconductor is formed so as to reduce the hydrogen concentration, There is a risk of hydrogen being absorbed from the conductor 240 which is in contact with the via. A functional conductor is embedded in an opening formed in insulator 274 and insulator 280. Here, the insulators 274 and 280 function as an interlayer film. It is an insulating film that contains silicon, such as silicon oxide or silicon oxynitride. When forming such insulators 274 and 280, S iH 4 Silicon hydrides such as SiH are often used as the source gas. 4 Hydrogen such as The source gas containing silicon dioxide is decomposed during film formation, and highly reactive hydrogen (e.g., hydrogen A large amount of radicals, etc., is generated, and a large amount of hydrogen is added to the formed insulators 274 and 280. There is a risk of large amounts of hydrogen being trapped in the insulators 274 and 280. A part of the conductor functions as a via due to heat treatment or the like during the manufacturing process of the transistor 200. The hydrogen may diffuse to the oxide 230 via the conductor 240. In this way, hydrogen in the oxide semiconductor may diffuse through the conductor 240. The concentration may become high.

[0075] In contrast, in the transistor 200 described in this embodiment, the insulator 274 and the insulator In the body 280, in the vicinity of the interface with the conductor 240a and in the vicinity of the interface with the conductor 240b, By forming the region 241 having a higher nitrogen concentration than other regions, the insulator 274 and the insulator 2 This reduces the ingress of hydrogen from 80 into the conductor 240.

[0076] In this embodiment, as shown in FIG. 1, the region 241 is formed by dividing the region 241 into two regions, ie, a region 241 surrounded by an insulator 280 and a conductor 280. 40a and the conductor 240b in the insulator 280. and a region 241b formed in the vicinity of the interface between the conductor 240a and the insulator 274. A region 241c formed near the interface with the conductor 240b may be described separately. In addition, as shown in FIG. 1, when the region 241c is formed near the upper surface of the insulator 274, There is.

[0077] Region 241 may be, for example, 1 nm or more thick in insulator 274 and insulator 280. It is preferable that the film thickness is 1.5 nm or more, and more preferable that the film thickness is 1.5 nm or more. Also, the region 241 is, for example, 50 nm or less in the insulator 274 and the insulator 280. , or a thickness of 20 nm or less, or a thickness of 10 nm or less.

[0078] Region 241 is a region having a higher nitrogen concentration than other regions of insulator 274 and insulator 280. The regions 241a and 241b are thicker than at least some of the other regions of the insulator 280. The region 241c has a higher nitrogen concentration than the other regions of the insulator 274. The nitrogen concentration in region 241 is higher than that in other regions of insulator 274 and insulator 280. The oxygen concentration may be lower than in the normal range.

[0079] The region 241 does not include the conductor 240, and includes the insulators 272, 280, and 290. With the openings formed in the insulator 274 and the insulator 82, the insulator 283, and the insulator 274, The surface of the insulator 274 and the insulator 280 can be formed by solid-phase nitriding. Solid-phase nitridation of the insulator 280 can be achieved by plasma treatment in a nitrogen-containing atmosphere. Hereinafter, such a treatment may be referred to as a nitrogen plasma treatment. In the plasma treatment, nitrogen gas is converted into plasma using microwaves or high frequencies such as RF. Nitrogen plasma is applied to the insulator 280 and the insulator 274 in the vicinity of their surfaces to cause solid-phase nitridation. It is possible.

[0080] The nitrogen plasma treatment is carried out by using an electric field that generates high-density plasma using, for example, microwaves. It is preferable to use a device having a microwave source. Hereinafter, the plasma treatment using microwaves will be referred to as microwave. This is called microwave processing, and is a device with a power source that generates high-density plasma using microwaves. It is sometimes called a microwave processing device. Microwave processing devices also apply RF to the substrate side. The present invention may have a power supply for performing the above-mentioned process. In addition, by applying RF to the substrate side, high density nitrogen radicals can be generated. ions generated by the high-density plasma are efficiently transported through the insulators 274 and 28. In addition, microwave treatment in a nitrogen-containing atmosphere can be carried out under reduced pressure. The pressure is preferably 400 Pa or less, more preferably 200 Pa or less, and even more preferably 60 The nitrogen flow rate (N 2 / N 2 +Ar) is preferably 50% or less, and more preferably 10% to 30%. The treatment temperature may be, for example, about 400° C. This is not limited to the substrate temperature during processing, but includes the set temperature of the processing apparatus.

[0081] The above-mentioned region 241 is a region containing hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). The region 241 has a function of suppressing the diffusion of, for example, the insulator 274 or the insulator 28. It is preferable that the hydrogen permeability is lower than 0. The insulating material 274 and the insulating material 280 are formed between the insulating material 274 and the insulating material 280. It is possible to reduce the amount of hydrogen contained in the body 280 that is mixed into the conductor 240. The amount of hydrogen that diffuses from the conductor 240 to the conductor 242 and the oxide 230 can be reduced. It is preferable that the region 241 also has a function of suppressing the diffusion of oxygen.

[0082] In this way, a region 241 is provided between the insulator 280 and the insulator 274 and the conductor 240. This can reduce the hydrogen concentration in the oxide 230. For example, Secondary Ion Mass Spectrometry (SIMS) The hydrogen concentration obtained by the rometry is 1×10 20 atoms / cm 3 Less than, good Preferably 1×10 19 atoms / cm 3 less than 5×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 Can be less than The oxide 230, in which impurities such as hydrogen are sufficiently reduced, is formed on the channel of the transistor 200. By using it in the formation region, it is possible to make it a normally-off characteristic, and it has stable electrical characteristics. At the same time, reliability can be improved.

[0083] In addition, when an oxide semiconductor is used for the oxide 230, a region that functions as a channel formation region The carrier concentration of oxide semiconductors in the region is 1×10 18 cm -3 It is preferable that 1×10 17 cm -3 More preferably, it is less than 1×10 16 cm -3 is less than More preferably, 1×10 13 cm -3 More preferably, it is less than 1×1 0 12 cm -3 It is more preferable that the thickness of the channel forming region is less than 100 nm. The lower limit of the carrier concentration of the oxide semiconductor in the region is not particularly limited. For example, 1×10 -9 cm -3 It can be said that:

[0084] In addition, when forming the region 241, the insulators 272, 280, 282, and The body 283 and the insulator 274 have an opening that reaches the conductor 242a and an opening that reaches the conductor 242b. With the opening formed, the nitrogen plasma treatment is performed. Conductor 24a is formed near the interface with conductor 240a (near the surface of conductor 242a when formed). A region 244a having a higher nitrogen concentration than other regions of the conductor 242b is formed, and the conductor 2 40b (near the surface of the conductor 242b when formed), In the following description, the region 244a and the region 244b are referred to as regions having a higher nitrogen concentration than the region 244a. Region 244b may be collectively referred to as region 244.

[0085] When a metal nitride, such as tantalum nitride, is used as the conductor 242, the region 244 Preferably, the area has approximately the same resistivity as other areas of the conductor 242. For example, It is preferred that the resistivity of region 244 be no more than 130% of the resistivity of other regions of conductor 242. Thus, the region 244 is a conductive material that functions as a source electrode or a drain electrode. Therefore, the nitrogen plasma treatment does not significantly impede the conductivity of the region 242. Even if the conductive material 242 is formed, there is no need to perform any special post-treatment on the conductive material 242. By providing a region 244 having a higher nitrogen concentration than other regions, the conductor 240 is In some cases, it may be possible to further reduce the amount of hydrogen that diffuses into the

[0086] In addition, insulators 280, 224, and 216, the insulators 283 and Near the interface, the nitrogen concentration is higher than in other regions of insulator 280, insulator 224, and insulator 216. A region 245 having a high electrical conductivity may be formed. The region 245 may be formed by forming a region of the insulator 242 as shown in FIG. 80, insulator 224, and insulator 216. Region 245 is formed on the side of region 24 The region 245 as described above preferably has a configuration similar to that of the hydrogen (e.g., hydrogen The region 245 has a function of suppressing the diffusion of at least one of atoms, hydrogen molecules, etc. For example, it has a lower hydrogen permeability than insulator 280, insulator 224, and insulator 216. It is preferable that the region 245 is formed by nitrogen plasma treatment in the same manner as the region 241. Therefore, the configuration of the region 245 and the details of the method for forming the region 241 can be The description can be taken into consideration.

[0087] Such regions 245 are insulators 280, 224, and insulators 216 and 227. 83, hydrogen contained in the insulator 274 is transferred to the insulator 280, etc. Therefore, the diffusion from the insulator 280 to the oxide 230 can be reduced. The amount of hydrogen that is released can be further reduced.

[0088] Before depositing the insulator 283, the sides of the insulator 280, the insulator 224, and the insulator 216 are By forming the region 245 on the surface, a large amount of water can be used in the chamber to form the insulator 283. Even if a CVD method or the like is used to generate hydrogen, the hydrogen is not absorbed by the insulator 280, the insulator 224, and the Therefore, the insulator 283 can be formed without mixing with C. Since a film forming method with good step coverage such as the VD method can be used, the insulator 283 can be formed by insulating It is possible to form a film on the step of the edge 280 without forming a step or a pinhole. As a result, the transistor 200 can be sealed with the insulator 283 and the insulator 212. can be done.

[0089] The conductor 240 penetrates the insulator 283, but as described above, the region 241 is the conductor. Since the conductor 240 is provided in contact with the insulator 283, the conductor 240 is interposed between the insulator 283 and the insulator 283. In this way, the insulator 283, the insulator 212, and the The transistor 200 is more securely sealed in the region 241, and the water contained in the insulator 274, etc. This can reduce the intrusion of impurities such as silicon from outside the insulator 283.

[0090] In addition, a source gas containing no hydrogen atoms or containing only a small amount of hydrogen atoms is used to form a layer. Interlayer insulating films (insulator 216, insulator 274, insulator 280, etc.), and gate insulating films (insulator By forming insulating films (insulator 224, insulator 250, etc.), the hydrogen concentration in these insulating films In this case, hydrogen entering a channel formation region of the oxide semiconductor may be reduced.

[0091] In the deposition of the insulating film, the deposition gas is mainly a gas having molecules containing silicon atoms. In order to reduce the hydrogen contained in the insulating film, the following is used: It is preferable that the number of hydrogen atoms contained is small, and the molecule containing the silicon atom contains hydrogen atoms. Of course, it is preferable that the gas used for film formation is not a gas having molecules containing silicon atoms. The gas preferably contains a small amount of hydrogen atoms, and more preferably contains no hydrogen atoms. I wish.

[0092] The above silicon-containing molecules are called Six -R y For example, the functional group R is The isocyanate group (-N=C=O), the cyanate group (-OC≡N), the cyano group (- C≡N), diazo group (=N 2 ), azide group (-N 3 ), nitroso group (-NO), and Toro group (-NO 2 ) can be used. For example, 1≦x≦3, 1≦ The following formula should be satisfied: y≦8. Examples of molecules that contain silicon atoms include tetraisopropyl ether. Socyanate silane, tetracyanate silane, tetracyanosilane, hexaisocyanate The silicone isocyanate silane, octaisocyanate silane, etc. can be used. Although a molecule in which the same type of functional group is bonded to an atom is illustrated, the present embodiment is not limited to this. However, it is also possible to have a structure in which different types of functional groups are bonded to silicon atoms.

[0093] In addition, for example, a halogen (Cl, Br, I, or F) is used as the functional group R. For example, 1≦x≦2 and 1≦y≦6 may be satisfied. Examples of molecules containing tetrachlorosilane (SiCl 4 ), Hexachlorodisil Si 2 Cl 6 Although an example of using chlorine as a functional group has been shown, other functional groups besides chlorine can be used. In addition, halogens such as bromine, iodine, and fluorine may be used as functional groups. The atoms may be configured to have different types of halogens bonded thereto.

[0094] The composition of the insulator 216, the insulator 274, the insulator 280, the insulator 224, and the insulator 250 The film is formed by chemical vapor deposition (CVD) using a gas having molecules containing silicon atoms as described above. D: Chemical Vapor Deposition (CVA) method. Since the VD method has a relatively high film deposition rate, the insulator 280, the insulator 274, and This is suitable for forming the insulator 216 .

[0095] As a CVD method, plasma CVD (PECVD: Plasma ECVD) is a method that uses plasma. enhanced CVD method, or thermal CVD (TCVD) It is preferable to use the thermal CVD method. When using the thermal CVD method, the film is formed under atmospheric pressure. Now Atmospheric Pressure CVD (APCVD) method Alternatively, low pressure CVD (LPCVD: Low Pressure) may be used, which performs film formation under reduced pressure lower than atmospheric pressure. The low pressure CVD method may also be used.

[0096] The insulators 216, 274, 280, and 224 are formed by a CVD method. When forming the insulator 250, it is preferable to use an oxidizing agent. 2 , O 3 , NO, NO 2 , N 2 O, N 2 O 3 , N 2 O 4 , N 2 O 5 , CO, CO 2 , etc. It is preferable to use a gas that does not contain atomic elements.

[0097] Also, the insulators 216, 274, 280, 224, and 25 The deposition of 0 is performed by the ALD (Atomic Layer Deposition) method. In the ALD method, a first source gas for the reaction (hereinafter referred to as a precursor) is ) and a second raw material gas (hereinafter referred to as a reactant or metal precursor). (also called reactant or nonmetallic precursor) are introduced alternately into the chamber. The introduction of these source gases is repeated to form a film.

[0098] The ALD method uses a self-regulating atomic property to form a film by switching the source gas. Therefore, the ALD method is suitable for the deposition of ultra-thin films. , deposition on structures with high aspect ratios, deposition with few defects such as pinholes, and coating properties Therefore, the ALD method can form a film having excellent properties. This is suitable for forming the edge body 224.

[0099] The ALD method uses thermal A, which reacts precursors and reactants using only thermal energy. The LD (Thermal ALD) method may be used, or a plasma-excited reactant may be used. Alternatively, a plasma enhanced ALD (PEALD) method using the above method may be used.

[0100] When the ALD method is used, a gas having a molecule containing a silicon atom is used as a precursor. The oxidizing agent may be used as a reactant. The amount of hydrogen trapped in insulator 274, insulator 280, insulator 224, and insulator 250 can be significantly reduced.

[0101] In the above, an example was shown in which the molecule containing silicon atoms does not contain hydrogen atoms. However, the present embodiment is not limited to this. In the above-mentioned molecule containing silicon atoms, A part of the functional group bonded to the silicon atom may be replaced with a hydrogen atom. The hydrogen atoms contained in the above silicon-containing molecules are called silane (SiH 4 ) less In other words, the above-mentioned silicon atom-containing molecule preferably has three atoms per silicon atom. It is preferable that the molecule has a hydrogen atom less than or equal to the silicon atom. It is more preferred if the gas has 3 or less hydrogen atoms per silicon atom.

[0102] As described above, insulator 21 is formed by the film forming method using a gas in which hydrogen atoms are reduced or removed. 6. At least one of the insulators 274, 280, 224, and 250 By forming the insulating film, the amount of hydrogen contained in the insulating film can be reduced. The insulating layer 230 is formed in the area sealed by the insulator 283 and the insulator 212. The edge 216, the insulator 224, the insulator 280, and the insulator 250 are deposited by the deposition method described above. This reduces the hydrogen concentration in the sealed area and prevents hydrogen from entering from the outside. , it is more preferable because it can be reduced by insulator 283, insulator 212, and region 241.

[0103] The transistor 200 also includes an insulator 282 and a 250 is in direct contact with the insulating material 250. The oxygen contained in the insulator 280 is less likely to be absorbed by the conductor 260. The contained oxygen is efficiently transferred to oxide 230a and oxide 230b via oxide 230c. Since the oxygen vacancies in the oxide 230a and the oxide 230b can be eliminated, This can reduce the electrical characteristics and reliability of the transistor 200. It is possible to prevent impurities such as hydrogen contained in the insulator 280 from being mixed into the insulator 250. Therefore, the hydrogen concentration in the insulator 250 and the oxide 230 can be further reduced. Therefore, adverse effects on the electrical characteristics and reliability of the transistor 200 can be suppressed. The insulator 282 may be silicon nitride, silicon oxynitride, aluminum oxide, or Alternatively, hafnium oxide can be used.

[0104] As a result, the fluctuation of electrical characteristics is suppressed, the electrical characteristics are stable, and reliability is improved. Alternatively, a semiconductor device having normally-off electrical characteristics can be provided. Alternatively, a semiconductor device having a transistor with a large on-state current can be provided. A semiconductor device having a transistor with high frequency characteristics can be provided. Alternatively, a semiconductor device having a transistor with low off-state current can be provided. It is possible to provide a semiconductor device.

[0105] The following describes in detail the configuration of a semiconductor device including a transistor 200 according to one embodiment of the present invention. This article explains:

[0106] The conductor 205 is disposed so as to overlap the oxide 230 and the conductor 260. The conductor 205 is preferably embedded in the insulators 214 and 216. stomach.

[0107] Here, the conductor 260 functions as a first gate (also called a top gate) electrode. The conductor 205 may be used as a second gate (also called a bottom gate) electrode. In this case, the potential applied to the conductor 205 may be changed to the potential applied to the conductor 260. The Vth of the transistor 200 is controlled by changing it independently of the potential of the transistor 200. In particular, applying a negative potential to the conductor 205 can turn on the transistor It is possible to increase the Vth of 200 to be greater than 0 V and reduce the off-current. When a negative potential is applied to the conductor 205, the electric potential applied to the conductor 260 is larger than when no negative potential is applied. The drain current can be reduced when the applied potential is 0V.

[0108] As shown in FIG. 1A, the conductor 205 is a conductor 242a of the oxide 230 and a conductor It is preferable that the area is larger than the area that does not overlap with the conductive material 242b. As shown in FIG. 1, the conductor 205 is formed in an area outside the end of the oxide 230 that intersects with the channel width direction. In other words, it is preferable that the oxide 230 extends in the channel width direction. At the outside of the side surface, the conductor 205 and the conductor 260 overlap with each other via an insulator. Alternatively, it is preferable that the conductor 205 is provided large. 5. In the plasma processing in the manufacturing process after the formation, local charging (charging However, one aspect of the present invention is not limited to this. The conductor 205 is located at least between the conductor 242a and the conductor 242b. It is sufficient to overlap with the oxide 230 .

[0109] In addition, with the bottom surface of the insulator 224 as a reference, the oxide 230a and the oxide 230b and the conductor The height of the bottom surface of the conductor 260 in the region where the conductor 260 does not overlap the oxide 230b is It is preferable that the oxide 230b is disposed at a position lower than the height of the bottom surface of the The height of the bottom surface of the conductor 260 in the region where the conductor 260 does not overlap with the oxide 230 The difference between the height of the bottom surface of b and m or less, and more preferably, from 5 nm to 20 nm.

[0110] In this manner, the conductor 260 functioning as a gate is disposed between the oxide 230 of the channel forming region. The side and top surfaces of b are covered via an oxide 230c and an insulator 250. This makes it easier for the electric field of the conductor 260 to act on the entire oxide 230b in the channel formation region. As a result, the on-state current of the transistor 200 can be increased, and the frequency characteristics can be improved. In this specification, the electric field of the first gate and the second gate causes a channel shape The structure of a transistor that electrically surrounds a region is called a surrounded channel. This is called the l (S-channel) structure.

[0111] The conductor 205a has a conductive property that suppresses the permeation of impurities such as water or hydrogen and oxygen. For example, titanium, titanium nitride, tantalum, or tantalum nitride may be used. The conductor 205b may be made of tungsten, copper, or aluminum. It is preferable to use a conductive material having a thickness of 100 μm and a thickness of 100 μm. A multi-layer structure having more than one layer may also be used.

[0112] Here, the oxide semiconductor, the insulator or conductor located under the oxide semiconductor, and the oxide The insulating or conductive material on the upper layer of the oxide semiconductor is separated into different layers without being exposed to the atmosphere. By successively depositing the seeds, the concentration of impurities (especially hydrogen and water) is reduced, resulting in a substantially high-purity This is preferable because a highly intrinsic oxide semiconductor film can be formed.

[0113] Insulator 212, insulator 214, insulator 222, insulator 272, insulator 282, and insulator At least one of the insulators 283 is a substrate that is formed by a substrate side or a substrate surface. It is preferable that the insulating film functions as a barrier insulating film that prevents foreign matter from entering the transistor 200. Therefore, the insulators 212, 214, 222, 272, and At least one of the body 282 and the insulator 283 is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen Atoms, nitrogen molecules, and nitrogen oxide molecules (N 2 O, NO, NO 2 ), diffusion of impurities such as copper atoms It is preferable to use an insulating material that has a function of suppressing diffusion (i.e., the impurities are unlikely to penetrate). Alternatively, the diffusion of oxygen (for example, at least one of oxygen atoms, oxygen molecules, etc.) is suppressed. It is preferable to use an insulating material that has the function of preventing oxygen from permeating therethrough (the insulating material is less permeable to the oxygen).

[0114] For example, the insulator 212 and the insulator 283 may be made of silicon nitride or silicon oxynitride. The insulators 214, 222, 272, and 282 are made of a material such as a capacitor. It is preferable to use aluminum oxide or hafnium oxide. Impurities such as water or hydrogen are absorbed from the substrate side through the insulators 212 and 214. It is possible to suppress diffusion to the transistor 200 side. The oxygen contained in the insulating layer 212 is prevented from diffusing to the substrate side through the insulating layer 214. In addition, impurities such as water or hydrogen can be prevented from entering the insulators 272, 282, The insulator 274 and the like disposed above the insulator 283 are connected to the transistor 20 In this way, the transistor 200 can be prevented from diffusing into the 0 side. The insulator 212 has a function of suppressing the diffusion of impurities such as hydrogen and oxygen, and the insulator 2 14, a structure surrounded by an insulator 222, an insulator 272, an insulator 282, and an insulator 283 It is preferable to set the above.

[0115] It may also be preferable to reduce the resistivity of the insulator 212 and the insulator 283. For example, the resistivity of the insulator 212 and the insulator 283 is set to approximately 1×10 13 Ωcm In the process of manufacturing a semiconductor device using plasma or the like, the insulator 212 and and the insulator 283 prevent the conductor 205, the conductor 242, or the conductor 260 from being charged up. The resistivity of the insulator 212 and the insulator 283 may be preferably Or 1×10 10 Ωcm or more 1×10 15 Ωcm or less.

[0116] Also, the insulators 216, 280, and 274 have a higher dielectric strength than the insulator 214. By using a material with a low dielectric constant as the interlayer film, the parasitic For example, the capacitance of the insulator 216, the insulator 280, and the insulator 27 can be reduced. 4. Silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, fluorine silicon oxide doped with , silicon oxide doped with carbon, silicon oxide doped with carbon and nitrogen Silicon or silicon oxide having voids may be used appropriately.

[0117] The insulator 222 and the insulator 224 function as gate insulators.

[0118] Here, it is preferable that the insulator 224 in contact with the oxide 230 is heated to release oxygen. In this specification, the oxygen released by heating may be referred to as excess oxygen. The insulator 224 may be made of silicon oxide or silicon oxynitride as appropriate. By providing an insulator containing the oxide 230 in contact with the oxide 230, oxygen vacancies in the oxide 230 are reduced. Therefore, the reliability of the transistor 200 can be improved.

[0119] Specifically, the insulator 224 is made of an oxide material from which some oxygen is released when heated. It is preferable that the oxides which desorb oxygen by heating are those which are determined by thermal desorption spectrometry (TDS). Thermal Desorption Spectroscopy (TDS) analysis revealed that oxygen The amount of molecules desorbed is 1.0×10 18 molecules / cm 3 More than 1.0x, preferably 10 19 molecules / cm 3 More preferably, 2.0×10 19 mole cules / cm 3 or more than 3.0×10 20 molecules / cm 3 That's all. The surface temperature of the film during the TDS analysis was 100°C or higher. A temperature range of 700° C. or lower, or 100° C. to 400° C. is preferred.

[0120] The insulator 222 prevents impurities such as water or hydrogen from entering the transistor 200 from the substrate side. For example, the insulator 222 is preferably a barrier insulating film that suppresses the Preferably, the insulator 222 has a lower hydrogen permeability than the insulator 224. 3, the insulator 224 and the oxide 230 are surrounded, and water or Impurities such as hydrogen can be prevented from entering the transistor 200 .

[0121] Further, the insulator 222 is made of oxygen (e.g., at least one of oxygen atoms, oxygen molecules, etc.). It is preferable that the material has a function of suppressing diffusion (i.e., the oxygen is less likely to permeate). For example, Preferably, the body 222 has a lower oxygen permeability than the insulator 224. The oxide 230 has a function of suppressing the diffusion of impurities and oxygen contained in the insulator 2. This is preferable because it can reduce diffusion below 22. This can suppress reaction with the body 224 and the oxygen contained in the oxide 230.

[0122] The insulator 222 is made of one or both of aluminum and hafnium, which are insulating materials. It is recommended to use an insulator containing oxide. Insulators containing oxides include aluminum oxide, hafnium oxide, aluminum and hafnium oxide, and It is preferable to use an oxide containing hafnium (hafnium aluminate). When the insulator 222 is formed using such a material, the insulator 222 is oxidized by the oxide 230. The emission of hydrogen and the incorporation of impurities such as hydrogen into the oxide 230 from the periphery of the transistor 200 are prevented. It acts as a suppressing layer.

[0123] Alternatively, for example, aluminum oxide, bismuth oxide, germanium oxide, etc. may be added to these insulators. tungsten oxide, yttrium oxide, Zirconium oxide may be added, or these insulators may be nitrided. Silicon oxide, silicon oxynitride or silicon nitride may be laminated on the insulator. .

[0124] The insulator 222 may be, for example, aluminum oxide, hafnium oxide, tantalum oxide, Zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrT iO 3 ) or (Ba,Sr)TiO 3 (BST) and other so-called high-k materials. As miniaturization and high integration of transistors progresses, If the gate insulator is made thinner, problems such as leakage current may occur. By using a high-k material as the insulator, the physical thickness can be maintained while This makes it possible to reduce the gate potential during transistor operation.

[0125] The insulator 222 and the insulator 224 may have a laminated structure of two or more layers. In this case, the laminated structure is not limited to the same material, and may be made of different materials. good.

[0126] Also, the oxide 230b and the conductor 242 functioning as a source electrode or a drain electrode are (conductor 242a and conductor 242b) and oxide 243 (oxide 243a and The conductor 242 and the oxide 230 may be arranged in such a manner that they are not in contact with each other. Therefore, the conductor 242 can be prevented from absorbing oxygen from the oxide 230. By preventing the oxidation of the conductor 242, the decrease in the conductivity of the conductor 242 can be suppressed. Therefore, it is preferable that the oxide 243 has a function of suppressing the oxidation of the conductor 242. I wish.

[0127] Therefore, it is preferable that the oxide 243 has a function of suppressing the permeation of oxygen. The oxygen is prevented from passing between the conductor 242, which functions as an electrode or a drain electrode, and the oxide 230b. By disposing the oxide 243 having the function of suppressing the electric field, the conductor 242 and the oxide 230b This is preferable because it reduces the electrical resistance between the transistor and the The electrical characteristics and reliability of the transistor 200 can be improved.

[0128] The oxide 243 may be a metal oxide having an element M. In particular, the element M is Aluminum, gallium, yttrium, or tin may be used. Oxide 243 is It is preferable that the concentration of element M is higher than that of oxide 230b. Gallium may also be used. In addition, the oxide 243 may be a metal oxide such as In-M-Zn oxide. Specifically, in the metal oxide used for the oxide 243, The atomic ratio of the element M to In in the metal oxide used for the oxide 230b is The atomic ratio of the oxide 243 is preferably larger than that of the element M. The thickness of the oxide 243 is preferably 0.5 nm or less. The thickness is preferably at most 5 nm, and more preferably at least 1 nm and at most 3 nm. It is preferable that the oxide 243 has crystallinity. When the oxide 243 has crystallinity, the oxide 23 The release of oxygen from the oxide 243 can be effectively suppressed. In the case of a crystalline structure such as a crystalline structure, the release of oxygen in the oxide 230 may be suppressed.

[0129] The oxide 243 is not necessarily provided. In that case, the conductor 242 (conductor 2 When the oxide 230 comes into contact with the conductor 242a and the conductor 242b, the oxide in the oxide 230 The hydrogen may diffuse into the conductor 242, causing the conductor 242 to oxidize. As a result, the conductivity of the conductor 242 is likely to decrease. The conductor 242 absorbs the oxygen in the oxide 230. This can be rephrased.

[0130] In addition, oxygen in the oxide 230 is converted into conductor 242 (conductor 242a and conductor 242b ) between the conductor 242a and the oxide 230b and between the conductor 242b A foreign layer may be formed between the conductor 242 and the oxide 230b. Since the layer also contains a large amount of oxygen, it is presumed that the layer has insulating properties. The three-layer structure of the oxide 230b, the hetero layer, and the oxide 230b is a three-layer structure consisting of a metal, an insulator, and a semiconductor. It can be considered as a MIS (Metal-Insulator-Semiconductor) structure. In some cases, this is called a diode junction structure, or a MIS structure. be.

[0131] The above-mentioned different layer is not limited to being formed between the conductor 242 and the oxide 230b. For example, a different layer may be formed between the conductor 242 and the oxide 230c, or between the conductor 242 and the oxide 230c. 42 and oxide 230b, and between conductor 242 and oxide 230c. There are cases.

[0132] On the oxide 243, a conductor 242 ( The conductor 242 has a thickness of, for example, , 1 nm or more and 50 nm or less, preferably 2 nm or more and 25 nm or less.

[0133] The conductor 242 may be aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, etc. Ru, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, Magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium A metal element selected from rontium and lanthanum, or an alloy containing the above metal elements Alternatively, it is preferable to use an alloy of the above-mentioned metal elements. For example, titanium nitride tantalum, titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel. Tantalum oxide, titanium nitride, titanium and aluminum nitride, tantalum and aluminum Nitrides containing ruthenium, ruthenium oxide, ruthenium nitride, and oxides containing strontium and ruthenium. The oxides containing lanthanum and nickel are conductive materials that are difficult to oxidize or absorb oxygen. This is preferable because it is a material that maintains its conductivity even when absorbed.

[0134] The insulator 272 is provided in contact with the upper surface of the conductor 242 and functions as a barrier layer. With this configuration, the conductor 242 can effectively suppress the overcurrent of the insulator 280. Absorption of excess oxygen can be suppressed. In addition, by suppressing oxidation of the conductor 242, It is possible to suppress an increase in the contact resistance between the transistor 200 and the wiring. This can provide the transistor 200 with good electrical characteristics and reliability.

[0135] Therefore, it is preferable that the insulator 272 has a function of suppressing the diffusion of oxygen. For example, Preferably, the insulator 272 has a function of suppressing oxygen diffusion more effectively than the insulator 280. The insulator 272 may be, for example, aluminum or hafnium. It is preferable to form an insulator containing oxide. Also, as the insulator 272, for example, aluminum nitride is used. An insulator containing minium may be used.

[0136] In addition, in FIG. 1B, FIG. 1C, and FIG. 1D, the insulator 272 is in contact only with the upper surface of the conductor 242. However, the present embodiment is not limited to this. For example, the insulator 272 may be a conductor. The top and side surfaces of oxide 242, the side surfaces of oxide 243, the side surfaces of oxide 230b, and oxide 2 It may be configured so as to be in contact with the side surface of 30a.

[0137] The insulator 250 functions as a gate insulator. The insulator 250 is formed on the oxide 230c. The insulator 250 is preferably disposed in contact with the surface. , silicon oxynitride, silicon nitride, silicon oxide doped with fluorine, and oxide doped with carbon. Silicon oxide doped with carbon and nitrogen, and silicon oxide with vacancies were used. In particular, silicon oxide and silicon oxynitride are stable against heat. This is preferable.

[0138] Like the insulator 224, the insulator 250 is made of an insulator that releases oxygen when heated. It is preferable to form the insulating material 250 as an insulating material from which oxygen is released by heating. By providing it in contact with the upper surface of the oxide 230c, the channel forming region of the oxide 230b In addition, the insulator 250 can effectively supply oxygen to the insulator 224. It is preferable that the concentration of impurities such as water or hydrogen is reduced. , preferably 1 nm or more and 20 nm or less.

[0139] A metal oxide may be provided between the insulator 250 and the conductor 260. The material preferably suppresses oxygen diffusion from the insulator 250 to the conductor 260. By providing a metal oxide that suppresses the diffusion of oxygen from the insulator 250 to the conductor 260, the diffusion of oxygen from the insulator 250 to the conductor 260 can be suppressed. In other words, the decrease in the amount of oxygen supplied to the oxide 230 can be suppressed. In addition, oxidation of the conductor 260 due to oxygen in the insulator 250 can be suppressed.

[0140] The metal oxide may also function as a part of the gate insulator. Therefore, when silicon oxide or silicon oxynitride is used for the insulator 250, the metal oxide It is preferable to use a metal oxide, which is a high-k material with a high relative dielectric constant, as the oxide. By making the base insulator have a laminated structure of the insulator 250 and the metal oxide, the base insulator is stable against heat. Therefore, the physical properties of the gate insulator can be improved. It is possible to reduce the gate potential applied during transistor operation while maintaining the film thickness. In addition, it is possible to reduce the equivalent oxide thickness (EOT) of the insulator that functions as the gate insulator. do.

[0141] Specifically, hafnium, aluminum, gallium, yttrium, zirconium, tantalum, tin, titanium, tantalum, nickel, germanium, magnesium, etc. The metal oxide may contain one or more metals selected from the following: Aluminum oxide, an insulator containing oxides of either or both of aluminum and hafnium Aluminum, hafnium oxide, oxides containing aluminum and hafnium (hafnium oxide) It is preferable to use a material such as a laminate.

[0142] Alternatively, the metal oxide may function as a part of the gate. In the above, it is preferable to provide a conductive material containing oxygen on the channel formation region side. By providing the conductive material on the channel formation region side, oxygen released from the conductive material forms a channel. This makes it easier for the area to be supplied.

[0143] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate. It is preferable to use a conductive material containing the metal element and oxygen. Conductive materials containing silicon and nitrogen may also be used. Indium tin oxide, tungsten oxide, etc. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide containing tungsten, indium tin oxide containing titanium oxide, indium zinc oxide Indium tin oxide doped with silicon may also be used. The use of such a material allows the channel to be formed. In some cases, hydrogen can be captured from the metal oxide that is formed. It may be possible to capture hydrogen that is mixed in through insulators, etc.

[0144] Although the conductor 260 is shown as having a two-layer structure in FIG. 1, it may have a single layer structure or a structure having three or more layers. The above laminated structure may also be used.

[0145] The conductor 260a is a hydrogen atom, a hydrogen molecule, a water molecule, a nitrogen atom, a nitrogen molecule, or a nitrogen oxide molecule. (N 2 O, NO, NO 2 ), conductive materials that suppress the diffusion of impurities such as copper atoms It is preferable to use a material containing a small amount of oxygen (e.g., oxygen atoms, oxygen molecules, etc.). It is preferable to use a conductive material having a function of suppressing the diffusion of at least one of the above-mentioned elements.

[0146] In addition, the conductor 260a has a function of suppressing the diffusion of oxygen, so that the insulator 250 The oxygen contained therein can suppress the conductor 260b from being oxidized and the conductivity from decreasing. Examples of conductive materials that have the function of suppressing oxygen diffusion include tantalum, nitride, and the like. It is preferable to use tantalum chloride, ruthenium, ruthenium oxide, or the like.

[0147] The conductor 260b is a conductive material mainly composed of tungsten, copper, or aluminum. In addition, since the conductor 260 also functions as wiring, It is preferable to use a highly conductive material, such as tungsten, copper, or aluminum. The conductive material 260b may be a laminated material. For example, it may be a laminated structure of titanium or titanium nitride and the above conductive material. stomach.

[0148] The insulator 280 may be, for example, silicon oxide, silicon oxynitride, silicon oxynitride, or fluorine. Silicon oxide doped with nitrogen, silicon oxide doped with carbon, and oxide doped with carbon and nitrogen. It is preferable that the silicon oxide has a void. By using silicon-based oxide as the insulator 280, the above-mentioned nitridation plasma treatment can be performed. This makes it possible to easily form the solid-phase nitrided regions 241 and 245. Silicon oxide and silicon oxynitride are particularly preferred because they are thermally stable. Materials such as silicon nitride, silicon oxynitride, and silicon oxide with voids can be decomposed by heating. This is preferable because it is possible to easily form an oxygen-containing region that is isolated from the insulator 280. The above-mentioned materials may be laminated, for example, an oxide film formed by sputtering. A structure in which a silicon oxynitride film formed by a CVD method is laminated on the silicon. Silicon nitride may be further laminated on top of it.

[0149] It is preferable that the concentration of impurities such as water or hydrogen in the insulator 280 is reduced. In addition, the top surface of the insulator 280 may be planarized.

[0150] In addition, in FIG. 1B, FIG. 1C, and FIG. 1D, insulator 280 near the interface with insulator 283 In the embodiment, the region 245 is formed, but the present invention is not limited to this. For example, In the case where the hydrogen atmosphere is not excessively high during the deposition of the insulator 283, the insulator 280 Alternatively, the region 245 may not be formed in the insulator 224 and the insulator 216. Similarly, the region 245 may not be formed. In this case, the region 245 is not formed. Instead, the insulators 216, 222, 224, 280, and The insulating film having a high hydrogen barrier property similar to the insulator 272 is formed by covering the insulator 282. As such an insulating film having a high hydrogen barrier property, for example, a silicon nitride film or In the case of using a silicon nitride oxide film, the above-mentioned hydrogen atoms are If the reduced or removed gas is used to form a film using the PEALD or PECVD method, When using the PEALD method, nitrogen gas is converted into plasma as a reactant. Nitrogen radicals that can be used for this purpose may be used.

[0151] The insulators 282 and 283 are provided to prevent impurities such as water or hydrogen from entering the insulator 2 from above. It is preferable that the insulating film functions as a barrier insulating film that suppresses the inclusion of the insulating material 80. The insulating film 282 and the insulator 283 function as a barrier insulating film that suppresses oxygen permeation. The insulators 282 and 283 are preferably made of, for example, aluminum oxide or nitride. An insulator such as silicon or silicon nitride oxide may be used. For example, the insulator 282 Aluminum oxide, which has a high barrier property against oxygen, is used as the insulating material 283. Silicon nitride or silicon nitride oxide, which has high barrier properties against oxygen, may be used.

[0152] In addition, it is preferable to provide an insulator 274 functioning as an interlayer film on the insulator 283. The insulator 274, like the insulator 224, has a low impurity concentration such as water or hydrogen in the film. is preferably reduced.

[0153] The conductors 240a and 240b are mainly made of tungsten, copper, or aluminum. It is preferable to use a conductive material having the above-mentioned components. 1A, the conductor 240a and the conductor 240b may have a laminated structure. Although the conductor 24 has a circular shape in top view, the shape is not limited to this. The conductor 240a and the conductor 240b are generally circular, such as an ellipse, or polygonal, such as a rectangle, when viewed from above. The shape may be a polygon such as a rectangle with rounded corners.

[0154] In addition, when the conductor 240 has a laminated structure, the conductor in contact with the region 241 is preferably water or It is possible to use a conductive material that has the function of suppressing the permeation of impurities such as hydrogen and oxygen. For example, tantalum, tantalum nitride, titanium, titanium nitride, ruthenium, or Ruthenium oxide is preferably used. In addition, impurities such as water or hydrogen, and The conductive material having the function of suppressing oxygen permeation may be used in a single layer or a multilayer structure. By using the conductive material, impurities such as water or hydrogen that diffuse from the insulator 280, etc. The substances are prevented from being mixed into the oxide 230 through the conductors 240a and 240b. In addition, the oxygen added to the insulator 280 can reduce the amount of oxygen in the conductor 240a and the conductor 240b. In addition, the region 241 can prevent the barrier against oxygen. Since the conductor 240a and the conductor 240b have a high ionic strength, the conductor 240a and the conductor 240b are less likely to absorb oxygen. It is possible.

[0155] In addition, the conductive material 240a and the conductive material 240b are in contact with each other to function as wiring. Conductor 246 (conductor 246a and conductor 246b) may be arranged. 46 shall be made of conductive materials mainly composed of tungsten, copper, or aluminum. The conductor may also have a laminated structure, for example titanium or titanium nitride. The conductive material may be a laminate of an insulating material and the conductive material. It may be configured to be implanted in the mouth.

[0156] <Materials for semiconductor devices> The following describes constituent materials that can be used in the semiconductor device.

[0157] <Substrate> The substrate on which the transistor 200 is formed may be, for example, an insulating substrate, a semiconductor substrate, or A conductive substrate may be used. Examples of insulating substrates include glass substrates, quartz substrates, and silicon substrates. Fire substrate, stabilized zirconia substrate (yttria stabilized zirconia substrate, etc.), resin substrate Semiconductor substrates are made of materials such as silicon and germanium. Semiconductor substrates made of silicon carbide, silicon germanium, gallium arsenide, phosphide, Compound semiconductor substrates made of indium, zinc oxide, and gallium oxide are also available. The semiconductor substrate having an insulating region therein, for example, SOI (Silicon on Insulator) Conductive substrates include graphite substrates and metal Substrates with metal nitrides, metal alloy substrates, conductive resin substrates, etc. Furthermore, a conductor or semiconductor is provided on an insulating substrate. a substrate having a conductor or insulator provided on a semiconductor substrate; a substrate having a conductor or insulator provided on a conductive substrate; The substrate may be a substrate on which an insulator is provided. The elements provided on the substrate include a capacitance element, a resistance element, a switch element, a light emitting element, and a These include optical elements and memory elements.

[0158] <Insulator> Insulators include oxides, nitrides, oxynitrides, nitride oxides, and metal oxides that have insulating properties. These include metal oxide nitrides, metal oxynitrides, and metal oxynitrides.

[0159] For example, as transistors become smaller and more highly integrated, the gate insulator becomes thinner. This can cause problems such as leakage current. By using high-k materials, the voltage required for transistor operation can be reduced while maintaining the same physical thickness. On the other hand, it is possible to use a material with a low relative dielectric constant for the insulator that functions as the interlayer film. This reduces the parasitic capacitance between the wirings. The material should be selected accordingly.

[0160] Insulators with high relative dielectric constants include gallium oxide, hafnium oxide, and zirconium oxide. Oxides containing aluminum, aluminum and hafnium, and oxides containing aluminum and hafnium oxide-nitride having silicon and hafnium; oxide-nitride having silicon and hafnium; Examples of suitable materials include oxynitrides with hafnium, or nitrides with silicon and hafnium.

[0161] Insulators with low dielectric constants include silicon oxide, silicon oxynitride, and silicon nitride oxide. Silicon, fluorine doped silicon oxide, carbon doped silicon oxide, carbon and nitrogen Examples of the silicon oxide include silicon oxide with added ions, silicon oxide having voids, and resin.

[0162] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the As an insulator that has the function of suppressing the permeation of impurities such as hydrogen and oxygen, , for example, boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon , phosphorus, chlorine, argon, gallium, germanium, yttrium, zirconium, lanthanum Insulators containing tungsten, neodymium, hafnium, or tantalum are used in single or multilayer configurations. Specifically, the insulating material has a function of suppressing the permeation of impurities such as hydrogen and oxygen. As an insulator, aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, Yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide, or metal oxides such as tantalum oxide, aluminum nitride, titanium aluminum nitride, Metal nitrides such as titanium oxide, silicon oxynitride, or silicon nitride can be used. .

[0163] In addition, the insulator that functions as the gate insulator has a region that contains oxygen that is desorbed by heating. For example, it is preferable that the insulating material has a region containing oxygen that is desorbed by heating. By forming a structure in which silicon oxide or silicon oxynitride is in contact with the oxide 230, The oxygen deficiency of 230 can be compensated for.

[0164] <Conductor> Conductive materials include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, and titanium. Tantalum, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium Sium, zirconium, beryllium, indium, ruthenium, iridium, strontium Metal elements selected from aluminum, lanthanum, etc., or alloys containing the above-mentioned metal elements It is preferable to use an alloy or the like that combines the above-mentioned metal elements. For example, tantalum nitride titanium nitride, tungsten, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitrides, ruthenium oxide, ruthenium nitride, strontium and ruthenium It is preferable to use an oxide containing lanthanum and nickel. Tantalum, titanium nitride, nitrides containing titanium and aluminum, tantalum and aluminum Ruthenium nitride, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium Oxides containing lanthanum and nickel are conductive materials that are difficult to oxidize or absorb oxygen. It is preferable because it is a material that maintains its conductivity even if it is oxidized. In addition, it does not contain impurity elements such as phosphorus. Highly conductive semiconductors, such as polycrystalline silicon, nickel silicide, etc. Silicide may also be used.

[0165] In addition, a plurality of conductive layers made of the above materials may be laminated. A laminated structure in which a material containing a metal element and a conductive material containing oxygen are combined may be used. In addition, a laminated material that combines the above-mentioned material containing a metal element and a conductive material containing nitrogen is In addition, the above-mentioned metal element-containing material, the conductive material containing oxygen, and the nitrogen A laminated structure in which the conductive material containing the element is combined with the conductive material containing the element may be used.

[0166] In the case where an oxide is used for the channel formation region of a transistor, The functional conductor combines the above-mentioned material containing the metal element with a conductive material containing oxygen. In this case, it is preferable to use a laminate structure in which an oxygen-containing conductive material is used as a channel. It is preferable to provide the conductive material containing oxygen on the channel formation region side. Thus, oxygen released from the conductive material is easily supplied to the channel formation region.

[0167] In particular, the metal oxide in which the channel is formed is used as a conductor that functions as a gate. It is preferable to use a conductive material containing the metal element and oxygen. Conductive materials containing silicon and nitrogen may also be used, such as titanium nitride and tantalum nitride. In addition, a conductive material containing nitrogen such as indium tin oxide or tungsten oxide may be used. Indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, titanium oxide Indium oxide, titanium oxide, indium tin oxide, indium zinc oxide, Silicon-doped indium tin oxide may also be used. The use of such a material may be used to form a channel. In some cases, the metal oxides surrounding the outer insulator can trap hydrogen. In some cases, it may be possible to capture hydrogen that is mixed in from sources such as

[0168] <Metal oxide> As the oxide 230, it is preferable to use a metal oxide that functions as an oxide semiconductor. Metal oxides applicable to the oxide 230 according to the present invention will be described below.

[0169] The metal oxide preferably contains at least indium or zinc. In addition to these, aluminum, gallium, and zinc are preferably included. It is preferable that the alloy contains boron, titanium, iron, or the like. , nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium , hafnium, tantalum, tungsten, magnesium, or Or multiple types may be included.

[0170] Here, the metal oxide is an In-M-Zn oxide having indium, element M and zinc. The element M can be aluminum, gallium, yttrium, or The element M can be tin, etc. Other elements that can be used for M include boron, titanium, iron, and nickel. Nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium, halide Examples include fluorine, tantalum, tungsten, and magnesium. However, the element M is: In some cases, combinations of the aforementioned elements may be used.

[0171] In this specification, metal oxides containing nitrogen are also referred to as metal oxides. Metal oxides containing nitrogen are also called metal oxynitrides (MEs). It may also be called tal oxynitride.

[0172] [Metal oxide structures] Oxide semiconductors (metal oxides) are classified into single-crystal oxide semiconductors and other non-single-crystal oxide semiconductors. As non-single crystal oxide semiconductors, for example, CAAC-OS, polycrystalline amorphous oxide semiconductor, nc-OS, pseudo-amorphous oxide semiconductor (a-like OS) phos-like oxide semiconductor), and amorphous oxide semiconductors, etc.

[0173] CAAC-OS has a c-axis orientation and multiple nanocrystals are connected in the ab-plane direction. The nanocrystals are connected together to form a distorted crystal structure. In a region, a lattice arrangement is formed between a region having a uniform lattice arrangement and another region having a uniform lattice arrangement. This refers to the point where the direction of the

[0174] Nanocrystals are basically hexagonal, but are not limited to regular hexagons and may have non-regular hexagonal shapes. In addition, the distortion may have lattice arrangements such as pentagons and heptagons. In addition, in the CAAC-OS, clear grain boundaries (grain bows) were observed even in the vicinity of the strain. It is difficult to confirm the presence of the crystal structure due to the distortion of the lattice arrangement. This is because the CAAC-OS is aligned in the ab-plane direction. In the case of the ferroelectric material, the arrangement of oxygen atoms is not dense, and the bond distance between atoms is reduced by the substitution of metal elements. This is because distortion can be tolerated by changing the

[0175] In addition, the CAAC-OS has a layer containing indium and oxygen (hereinafter, the In layer) and an elemental A layered crystal consisting of layers containing element M, zinc, and oxygen (hereinafter referred to as the (M,Zn) layer). Indium and element M tend to have a layered structure. When the element M in the (M,Zn) layer is replaced with indium, (In,M,Zn ) layer. Also, when the indium in the In layer is replaced with the element M, (In, M) layer.

[0176] CAAC-OS is a highly crystalline metal oxide. Since it is difficult to confirm the grain boundaries, the decrease in electron mobility caused by the grain boundaries is unlikely to occur. In addition, the crystallinity of metal oxides is reduced by the incorporation of impurities and the generation of defects. Therefore, CAAC-OS is designed to prevent impurities and defects (oxygen vacancies (V O :oxygen v CAAC- is a metal oxide with low acancy. Metal oxides with OS have stable physical properties. Therefore, Metal oxides are heat resistant and highly reliable.

[0177] nc-OS is a material that is used in microscopic regions (e.g., regions between 1 nm and 10 nm, especially regions between 1 nm and The atomic arrangement has periodicity in the region of 3 nm or less. There is no regularity in the crystal orientation between the crystals. Therefore, no orientation is observed throughout the film. Therefore, depending on the analysis method, nc-OS may be classified as a-like OS or amorphous oxide semiconductor. Sometimes it is indistinguishable from the body.

[0178] In addition, indium oxide, which is a type of metal oxide containing indium, gallium, and zinc, In the case of IGZO, the nanocrystals mentioned above make it stable. In particular, IGZO tends to have difficulty growing crystals in air. , small crystals (e.g., For example, the nanocrystals mentioned above may be structurally more stable.

[0179] The a-like OS is a metal oxide semiconductor that has a structure between the nc-OS and the amorphous oxide semiconductor. The a-like OS has voids or low density regions. The ke-OS has a lower crystallinity than the nc-OS and CAAC-OS.

[0180] Oxide semiconductors (metal oxides) have a variety of structures, each with different properties. The oxide semiconductor of one embodiment of the present invention can be an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-li The ke-OS, nc-OS, and CAAC-OS may have two or more kinds.

[0181] In the semiconductor device of one embodiment of the present invention, Although there is no particular limitation, it is preferable that the oxide 230 has crystallinity. For example, the oxide 230 is The oxide 230 and the oxide 243 can have a hexagonal crystal structure. By making the compound 243 have the above crystal structure, it is possible to obtain a semiconductor device having high reliability. In addition, the oxide 230a, the oxide 230c, and the oxide 243 can be made to have approximately the same composition. It is possible.

[0182] [impurities] Here, the influence of each impurity in the metal oxide will be described.

[0183] In addition, when alkali metals or alkaline earth metals are contained in metal oxides, defect levels are formed. Therefore, alkali metals or alkaline earth metals may form a carrier. A transistor that uses a metal oxide containing metals in the channel formation region is a normally-on transistor. Therefore, the concentration of alkali metals or alkaline earth metals in the metal oxide Specifically, it is preferable to reduce the amount of alkali metal or alkali metal in the metal oxide. The concentration of earth metals (obtained by SIMS) was 1×10 18 atoms / cm 3 Below Lower, preferably 2 x 10 16 atoms / cm 3 To the following:

[0184] In addition, hydrogen contained in metal oxides reacts with oxygen that bonds with metal atoms to form water. When hydrogen enters the oxygen vacancy, the carrier In some cases, hydrogen atoms are formed by bonding with oxygen atoms that bond with metal atoms. Therefore, it is recommended to use metal oxides that contain hydrogen. Therefore, hydrogen in the metal oxide is likely to be a normally-on transistor. It is preferable that the amount of the ion exchange rate is reduced as much as possible.

[0185] It is preferable to use a thin film with high crystallinity as the metal oxide used as the semiconductor of a transistor. By using the thin film, the stability or reliability of the transistor can be improved. The thin film may be, for example, a thin film of a single crystal metal oxide or a thin film of a polycrystalline metal oxide. However, thin films of single crystal metal oxides or thin films of polycrystalline metal oxides are Formation on a substrate requires high temperature or laser heating steps. This increases the cost of the process and also reduces the throughput.

[0186] <Method for manufacturing semiconductor device> Next, a semiconductor device having a transistor 200 according to the present invention shown in FIG. The manufacturing method will be described with reference to Figs. 2 to 14. In Figs. 2 to 14, A in each figure indicates The top view is shown. Also, B in each figure corresponds to the area indicated by the dashed line A1-A2 in A. 1 is a cross-sectional view of the transistor 200 taken along the channel length direction. FIG. 2 is a cross-sectional view corresponding to a portion indicated by a dashed line A3-A4 in FIG. Also, D in each figure is a cross-sectional view in the channel width direction. In addition, in the top view of each figure, part of the A is cut away for clarity. This omits the element of.

[0187] First, a substrate (not shown) is prepared, and an insulator 212 is formed on the substrate. The deposition of the 12 films was performed by sputtering, chemical vapor deposition (CVD), and Deposition method, Molecular Beam Epitaxy (MBE) eam Epitaxy method, Pulsed Laser Deposition (PLD) Deposition) method or ALD (Atomic Layer Deposit) This can be done using the (ion) method or the like.

[0188] The CVD method is a process that uses plasma (PECVD). Enhanced CVD method, Thermal CVD (TCVD) These methods are classified into two types: the VD method, which uses light, and the Photo CVD method, which uses light. Depending on the source gas, metal CVD (MCVD: Metal CVD) method, metal organic CVD method (MOCVD: Metal Organic CVD) method. Depending on the pressure during film formation, there are two types of CVD: atmospheric pressure CVD (APCVD), which forms films under atmospheric pressure. Heric Pressure CVD method, in which film is formed under reduced pressure below atmospheric pressure CVD (LPCVD: Low Pressure CVD) method.

[0189] The plasma CVD method can produce high-quality films at relatively low temperatures. This is a film formation method that can reduce plasma damage to the workpiece because it does not use a plasma. For example, wiring, electrodes, elements (transistors, capacitors, etc.) included in a semiconductor device ) may become charged up by receiving an electric charge from the plasma. When accumulated electric charges destroy wiring, electrodes, elements, etc., contained in a semiconductor device. On the other hand, in the case of thermal CVD, which does not use plasma, such plasma damage occurs. Since the thermal CVD method does not require any heat treatment, the yield of the semiconductor device can be increased. Since no plasma damage occurs in the film, a film with few defects can be obtained.

[0190] In addition, the ALD method uses only thermal energy to react with the precursor and reactant. Thermal ALD method, which uses plasma-excited reactants The EALD (Plasma Enhanced ALD) method, for example, can be used.

[0191] The ALD method utilizes the self-regulating nature of atoms to deposit atoms one layer at a time. This allows for extremely thin film deposition, film deposition on structures with high aspect ratios, and no pinholes. It is possible to form a film with few defects, excellent coverage, and low temperature. The PEALD method uses plasma, which allows deposition at lower temperatures. In addition, the precursors used in the ALD method do not contain impurities such as carbon. For this reason, films formed by the ALD method are not as good as those formed by other film formation methods. The amount of impurities may be higher than that of the films that have been treated with X-ray annealing. X-ray Photoelectron Spectros (XPS) This can be done using the (copy)

[0192] The CVD and ALD methods are deposition methods in which particles emitted from a target are deposited. It is a film forming method in which a film is formed by a reaction on the surface of the object to be treated. Therefore, this is a film forming method that is not easily affected by the shape of the workpiece and has good step coverage. In addition, the ALD method has excellent step coverage and thickness uniformity, making it ideal for achieving high aspect ratios. However, the ALD method is relatively slow in forming a film. Because the deposition rate is slow, it should be used in combination with other deposition methods such as CVD, which has a faster deposition rate. may be preferred.

[0193] In the CVD and ALD methods, the composition of the resulting film is controlled by the flow rate ratio of the source gases. For example, in the CVD and ALD methods, the flow rate ratio of the source gases can be adjusted to any value. In addition, for example, in the CVD method and the ALD method, the film formation By changing the flow rate ratio of the source gas while heating, a film with a continuously changing composition can be formed. When forming a film while changing the flow rate ratio of the source gas, multiple film forming chambers are used. Compared to forming a film using a vacuum, the time required for film formation is shorter because there is no time required for transportation or pressure adjustment. Therefore, the productivity of the semiconductor device can be improved. There is.

[0194] In this embodiment, the insulator 212 is formed of silicon nitride by CVD. In this way, an insulator that is difficult for copper to penetrate, such as silicon nitride, is used as the insulator 212. Therefore, a metal that easily diffuses, such as copper, is used for the conductor layer (not shown) below the insulator 212. Even if the metal is present, it is possible to suppress the metal from diffusing into the upper layer through the insulator 212. In addition, by using an insulator such as silicon nitride that is difficult for impurities such as water or hydrogen to penetrate, As a result, it is possible to suppress the diffusion of impurities such as water or hydrogen from the layer below the insulator 212. Cut.

[0195] Next, the insulator 214 is deposited on the insulator 212. The deposition of the insulator 214 is carried out by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, aluminum oxide is used as the insulator 214.

[0196] Next, the insulator 216 is deposited on the insulator 214. The deposition of the insulator 216 is carried out by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, silicon oxide or silicon oxynitride is used as the insulator 216. The insulator 216 is formed by the deposition method using the gas in which hydrogen atoms are reduced or removed. This can reduce the hydrogen concentration in the insulator 216. do.

[0197] Next, an opening is formed in the insulator 216 so as to reach the insulator 214. The opening may be, for example, a groove or This also includes slits. The area where an opening is formed may also be referred to as an opening. The openings may be formed by wet etching, but it is more preferable to use dry etching. Insulator 214 is preferably formed by etching insulator 216. It is preferable to select an insulator that functions as an etching stopper film when etching. For example, When a silicon oxide film or a silicon oxynitride film is used for the insulator 216 forming the groove, The insulator 214 is preferably made of a silicon nitride film, an aluminum oxide film, or a hafnium oxide film. stomach.

[0198] After the opening is formed, a conductive film that will become the conductor 205a is formed. The conductive film has a property that prevents oxygen from passing through. It is preferable to include a conductor having a function of suppressing the electric field. For example, tantalum nitride, tantalum Alternatively, tantalum, tungsten, titanium, etc. may be used. It is a laminated film of tungsten, molybdenum, aluminum, copper, and molybdenum tungsten alloy. The conductive film that becomes the conductor 205a can be formed by a sputtering method, a CVD method, an MBE method, or the like. The method can be carried out by using a deposition method, a PLD method, an ALD method, or the like.

[0199] In this embodiment, the conductive film that becomes the conductor 205a has a multi-layer structure. A tantalum nitride film is formed by a deposition method, and titanium nitride is laminated on the tantalum nitride. By using such a metal nitride as the lower layer of the conductor 205b, the conductor 20 Even if a metal that easily diffuses, such as copper, is used as the conductive film that becomes 5b, the metal may be a conductor 205 It can prevent the outward diffusion of a.

[0200] Next, a conductive film that will become the conductor 205b is formed. The conductive film can be formed by a plating method, a sputtering method, or the like. The deposition can be performed by a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, the conductive film that becomes the conductor 205b is made of a low-resistance conductive material such as copper. A film is formed.

[0201] Next, CMP (Chemical Mechanical Polishing) By performing this, a conductive film that becomes the conductor 205a and a conductive film that becomes the conductor 205b are formed. The opening is then removed to expose the insulator 216. As a result, the conductor 205a and the insulator 216 are only present in the opening. Thus, the conductor 205 having a flat upper surface can be formed. Note that the CMP process may remove a part of the insulator 216 (see FIG. 2). reference).

[0202] In the above, the conductor 205 is formed so as to be embedded in the opening of the insulator 216. However, the present embodiment is not limited to this. For example, a conductor 20 on an insulator 214 may be formed. 5, an insulator 216 is formed on the conductor 205, and a CMP process is performed on the insulator 216. This may remove a portion of the insulator 216 and expose the surface of the conductor 205.

[0203] Next, the insulator 222 is formed on the insulator 216 and the conductor 205. As the insulating layer, an insulator containing oxide of one or both of aluminum and hafnium is formed. In addition, the insulator containing oxide of either or both of aluminum and hafnium is As examples, aluminum oxide, hafnium oxide, oxides containing aluminum and hafnium It is preferable to use aluminum and hafnium aluminate. Insulators containing one or both oxides of aluminum provide excellent barrier properties against oxygen, hydrogen, and water. The insulator 222 has a barrier property against hydrogen and water, so that the transistor Hydrogen and water contained in the structure provided around the rotor 200 pass through the insulator 222. The inward diffusion of the transistor 200 is suppressed, and the generation of oxygen vacancies in the oxide 230 is suppressed. can be suppressed.

[0204] The insulator 222 is formed by sputtering, CVD, MBE, PLD, or A. This can be done using the LD method or the like.

[0205] Next, the insulator 224 is deposited on the insulator 222. The deposition of the insulator 224 is carried out by sputtering. The deposition can be performed by using a deposition method, a CVD method, an MBE method, a PLD method, an ALD method, or the like. In this embodiment, silicon oxide or silicon oxynitride is used as the insulator 224. The insulator 224 is formed by the deposition method using a gas in which hydrogen atoms are reduced or removed. This can reduce the hydrogen concentration in the insulator 224. The insulator 224 will be the insulator 224 that contacts the oxide 230a in a later process. It is preferable that the hydrogen concentration is reduced as shown below.

[0206] Subsequently, a heat treatment is preferably performed. The reaction temperature is preferably 300° C. or higher and 500° C. or lower, and more preferably 320° C. or higher and 450° C. or lower. The heat treatment may be performed in a nitrogen or inert gas atmosphere, or in an atmosphere of oxidizing gas at a concentration of 10ppm. m or more, 1% or more, or 10% or more. Heat treatment is also performed under reduced pressure. Alternatively, the heat treatment may be performed in a nitrogen or inert gas atmosphere, followed by To compensate for the lost oxygen, the gas contains 10 ppm or more, 1% or more, or 10% or more of oxidizing gas. The heat treatment may be performed in an atmosphere containing the above-mentioned.

[0207] In this embodiment, the treatment is performed in a nitrogen atmosphere at a temperature of 400° C. for 1 hour, and then the The heat treatment is then performed in an oxygen atmosphere at a temperature of 400°C for one hour. Impurities such as water and hydrogen contained in the body 224 can be removed.

[0208] The heat treatment may be performed after the formation of the insulator 222. Heat treatment conditions can be used.

[0209] Here, in order to form an excess oxygen region in the insulator 224, a plasma containing oxygen is used under reduced pressure. The oxygen-containing plasma treatment may be, for example, a high-density plasma treatment using microwaves. It is preferable to use a device with a power source that generates plasma. Alternatively, an RF or other By using high-density plasma, Oxygen radicals can be generated, and by applying RF to the substrate side, it becomes a high-density plasma. As a result, the generated oxygen radicals can be efficiently guided into the insulator 224. After performing plasma treatment containing an inert gas using this device, In addition, a plasma treatment containing oxygen may be performed. Note that the conditions of the plasma treatment may be appropriately selected. By this, impurities such as water and hydrogen contained in the insulator 224 can be removed. In this case, the heat treatment is not necessary.

[0210] Here, aluminum oxide is formed on the insulator 224 by, for example, a sputtering method. A film may be formed and CMP may be performed until the aluminum oxide reaches the insulator 224. By performing CMP, the surface of the insulator 224 is planarized and smoothed. By placing the aluminum oxide on the insulator 224 and performing CMP, This makes it easier to detect the end point of the MP. Also, a part of the insulator 224 is polished by CMP. However, the thickness of the insulator 224 may become thin. By planarizing and smoothing the surface of the insulator 224, the oxide film to be formed later can be easily formed. In some cases, it may be possible to prevent deterioration of the coverage and to prevent a decrease in the yield of the semiconductor device. On the insulator 224, an aluminum oxide film is formed by sputtering. In this case, oxygen can be added to the insulator 224, which is preferable.

[0211] Next, an oxide film 230A and an oxide film 230B are formed in this order on the insulator 224 (see FIG. 2). It is preferable that the oxide film is formed continuously without exposing it to the air. By forming the oxide film 230A and the oxide film 230B without opening the film, the oxide film 230A and the oxide film 230B are protected from the atmospheric environment. Impurities or moisture can be prevented from adhering to the oxide film 230A and the oxide film 230B. This allows the vicinity of the interface to be kept clean.

[0212] The oxide film 230A and the oxide film 230B are formed by sputtering, CVD, MBE, etc. The deposition can be performed by using a deposition method, a PLD method, an ALD method, or the like.

[0213] For example, the oxide film 230A and the oxide film 230B are formed by a sputtering method. In this case, oxygen or a mixture of oxygen and a rare gas is used as the sputtering gas. By increasing the ratio of oxygen contained in the sputtering gas, the excess oxygen in the oxide film to be formed is reduced. In addition, when the oxide film is formed by sputtering, In this case, the above-mentioned In-M-Zn oxide target can be used.

[0214] In particular, when the oxide film 230A is formed, a part of the oxygen contained in the sputtering gas becomes an insulator. Therefore, the oxide film 230A may be sputtered with the oxide gas 224. The percentage of oxygen contained in the gas should be 70% or more, preferably 80% or more, and more preferably 100%. That's good.

[0215] In addition, when the oxide film 230B is formed by a sputtering method, the oxide film 230B is formed by sputtering. The ratio of oxygen to be added is set to 1% or more and 30% or less, preferably 5% or more and 20% or less. The oxygen-deficient oxide semiconductor is formed in the channel formation region. The transistors used in the above region have a relatively high field effect mobility. By performing the film formation while However, one embodiment of the present invention is not limited to this. The oxide film 230B is formed by a sputtering method. In this case, the ratio of oxygen contained in the sputtering gas is preferably more than 30% and less than 100%. If the film is formed with a concentration of 70% or more and 100% or less, an oxygen-excess oxide semiconductor is formed. A transistor using an oxygen-excess oxide semiconductor for a channel formation region has a relatively high Reliability is gained.

[0216] In this embodiment, the oxide film 230A is formed by sputtering In:Ga: Zn=1:1:0.5[atomic ratio] (2:2:1[atomic ratio]), or 1:3:4[ The oxide film 230B is formed by sputtering a target having a ratio of 1:1 to 1:1. By the annealing method, the atomic ratio of In:Ga:Zn=4:2:4.1 or 1:1:1 The film is formed using a target with a ratio of the number of atoms. By appropriately selecting the ratio, the oxide 230 can be formed to have the desired characteristics.

[0217] Next, a heat treatment may be performed. The heat treatment may be performed under the above-mentioned heat treatment conditions. By the heat treatment, impurities such as water and hydrogen in the oxide film 230A and the oxide film 230B are removed. In this embodiment, the wafer is heated at 400° C. in a nitrogen atmosphere. After one hour of treatment, the sample was treated in an oxygen atmosphere at 400°C for one hour. cormorant.

[0218] Next, an oxide film 243A is formed on the oxide film 230B (see FIG. 2). The film is formed by sputtering, CVD, MBE, PLD, or ALD. The oxide film 243A has an atomic ratio of Ga to In that is equal to or larger than that of the oxide film 230B. In the present embodiment, the atomic ratio of the oxide film 2 is preferably larger than that of the Ga atom to the In atom. 43A is prepared by sputtering with the atomic ratio of In:Ga:Zn=1:3:4. The film is formed using a target of

[0219] Next, a conductive film 242A is formed on the oxide film 243A (see FIG. 2). The film is formed by sputtering, CVD, MBE, PLD, or ALD. It can be done.

[0220] Next, an insulating film 272A is formed on the conductive film 242A (see FIG. 2). The film is formed by sputtering, CVD, MBE, PLD or ALD. The insulating film 272A is an insulating film having a function of suppressing the permeation of oxygen. For example, it is preferable to deposit aluminum oxide by sputtering or ALD. Alternatively, a film of silicon, silicon nitride, silicon oxide, or gallium oxide may be deposited.

[0221] Next, the oxide film 230A, the oxide film 230B, and the oxide film 243A are formed by lithography. The conductive film 242A and the insulating film 272A are processed into islands to form oxide 230a and oxide 2 30b, an oxide layer 243B, a conductive layer 242B, and an insulator layer 272B are formed (FIG. 3). Here, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 24 2B and the insulating layer 272B are formed so as to overlap at least a portion of the conductor 205. In addition, the processing can be performed using a dry etching method or a wet etching method. Dry etching is suitable for microfabrication. The thickness of the edge 224 in the area not overlapping with the oxide 230a may be reduced.

[0222] In the lithography method, first, the resist is exposed through a mask. The resist mask is formed by removing or leaving the resist-removed area using a developer. By etching through the resist mask, a conductor, a semiconductor, an insulator, etc. For example, KrF excimer laser light, ArF excimer laser light, Laser light, EUV (Extreme Ultraviolet) light, etc. are used to A resist mask can be formed by exposing the photoresist to light. A liquid immersion technique may be used in which the substrate is filled with liquid (e.g., water) and exposed to light. Alternatively, an electron beam or an ion beam may be used. In this case, the mask is not necessary. The resist mask can be removed by ashing or the like. Which dry etching process is performed, which wet etching process is performed, and which dry etching process is performed After the treatment, wet etching is performed, or after the treatment, dry etching is performed. It is possible to carry out the filtering process.

[0223] Moreover, instead of the resist mask, a hard mask made of an insulator or a conductor may be used. When a hard mask is used, an insulating film or a conductive film that is a hard mask material is formed on the conductive film 242A. forming a film, forming a resist mask thereon, and etching the hard mask material; A hard mask having a desired shape can be formed by etching the conductive film 242A, etc. This can be done after removing the resist mask, or with the resist mask left on. In the latter case, the resist mask may disappear during etching. The hard mask may be removed by etching after etching such as 2A. If the material of the hard mask does not affect the subsequent process or can be used in the subsequent process, it is not necessarily hard There is no need to remove the mask.

[0224] The dry etching equipment is a capacitively coupled plasma (CCP) device with parallel plate electrodes. : Capacitively Coupled Plasma (CAP) etching equipment is used. The capacitively coupled plasma etching apparatus having parallel plate electrodes can Alternatively, a high frequency power source may be applied to one of the parallel plate type electrodes. A configuration in which a plurality of different high frequency power sources are applied to the electrodes may be used. Alternatively, a parallel plate electrode may be used. Alternatively, a high-density plasma source may be provided. A dry etching apparatus having a high density plasma source can be used. The plasma processing device is, for example, an inductively coupled plasma (ICP) type. A plasma etching apparatus or the like can be used.

[0225] Here, since the insulating layer 272B functions as a mask for the conductive layer 242B, FIG. As shown in FIG. 3D, the conductive layer 242B does not have a curved surface between the side surface and the top surface. The conductors 242a and 242b shown in FIG. 1 have corner-shaped ends where the side surfaces and the top surfaces meet. The end where the side surface and the top surface of the conductor 242 intersect is angular, so that the end forms a curved surface. The cross-sectional area of ​​the conductor 242 is larger than that of the conductor 242 having a conductor hole. Since the resistance is reduced, the on-current of the transistor 200 can be increased.

[0226] In addition, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and The side surface of the insulator layer 272B is preferably approximately perpendicular to the upper surface of the insulator 222. The oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer 242B, and the insulating layer 243B are The side surface of the insulating layer 272B is approximately perpendicular to the upper surface of the insulator 222, so that the plurality of traces are When providing the transistor 200, it is possible to reduce the area and increase the density. The oxide layer 230a, the oxide layer 230b, the oxide layer 243B, the conductive layer 242B, and The angle between the side surface of the insulator layer 272B and the top surface of the insulator 222 may be small. stomach.

[0227] Next, the insulator 224, the oxide 230a, the oxide 230b, the oxide layer 243B, the conductive layer An insulator 280 is deposited on top of 242B and the insulator layer 272B (see FIG. 4). The insulating film that becomes the body 280 can be formed by a sputtering method, a CVD method, an MBE method, a PLD method, or the like. For example, the insulator 280 may be formed by sputtering. A silicon oxide film is formed using the annealing method, and then PEALD or thermal ALD is performed on it. The insulator 280 may be formed by using the above-mentioned hydrogen atom reduction method. Alternatively, it is preferable to form the film by a film forming method using the removed gas. The hydrogen concentration of 280 can be reduced.

[0228] Next, the insulator 280 is subjected to a CMP process to form an insulator 280 with a flat upper surface (FIG. 4). As with the insulator 224, a thin film is formed on the insulator 280 by, for example, a sputtering method. Therefore, aluminum oxide is deposited and the aluminum oxide is allowed to flow until it reaches the insulator 280. CMP may also be performed.

[0229] Next, microwaves or high frequencies such as RF are applied to the insulator 280, the oxide 230b, and the oxide. The irradiated microwave or high frequency such as RF may be irradiated to the insulating material 230a. 280, oxide 230b, and oxide 230a to remove hydrogen therein. In particular, in the oxide 230a and the oxide 230b, the VoH bond is broken. In other words, a reaction occurs O The reaction "H → Vo + H" occurs, and dehydrogenation occurs. At this time, some of the hydrogen generated combines with oxygen to form H 2 O as oxide 23 0 and insulator 280. Also, some of the hydrogen may be removed from conductor 242. In this way, when microwaves or high-frequency waves such as RF are irradiated, By irradiating the insulator 280, the oxide 230b, and the oxide 230a, the hydrogen concentration in the insulator 280 is reduced. It should be noted that irradiation of microwaves or high frequencies such as RF can be performed during the above-mentioned CMP process. This may be done before the procedure.

[0230] In addition, oxygen gas is converted into plasma by microwaves or high frequencies such as RF, and oxygen radiator is used. That is, the insulator 280, the oxide 230b, and the oxide 230a may be formed. The plasma treatment may be carried out in an atmosphere containing oxygen. This is sometimes called oxygen plasma treatment. The oxygen radicals formed also cause the insulator 28 Oxygen can be supplied to the oxide 230a, oxide 230b, and oxide 230c. The insulator 280, the oxide 230b, and the oxide 230a are subjected to a plasma treatment in an atmosphere containing oxygen. When performing the treatment, the oxide 230 is configured so that it is difficult to irradiate microwaves or high frequencies such as RF. It can also be.

[0231] The oxygen plasma treatment is carried out by using an electric field that generates high-density plasma using, for example, microwaves. It is preferable to use a microwave processing device having a microwave source. A power source for applying RF may be provided on the substrate side. By using high density plasma, In addition, by applying RF to the substrate side, high density oxygen radicals can be generated. The oxygen ions generated by the plasma are efficiently transported through the insulator 280 and the oxide 230. The oxygen plasma treatment is preferably carried out under reduced pressure. The pressure is 60 Pa or more, preferably 133 Pa or more, more preferably 200 Pa or more, Preferably, the pressure is 400 Pa or more. 2 / O 2 +Ar) is 50 % or less, preferably 10% to 30%. The treatment temperature is 750°C or more. The oxygen plasma treatment may be performed at a temperature of 500° C. or less, for example, about 400° C. After the heat treatment, the heat treatment may be performed continuously without exposing the substrate to the outside air. The temperature may be 750° C. or less, and preferably 500° C. or less.

[0232] In addition, after the oxygen plasma treatment, the above-mentioned nitrogen plasma treatment was performed continuously without exposure to the outside air. The oxygen plasma treatment and the nitrogen plasma treatment may be performed in the same chamber. The reaction may be performed in a single chamber or in different chambers of a multi-chamber processing device. This allows a solid-phase nitrided region similar to the region 241 to be formed on the surface of the insulator 280. Therefore, hydrogen is newly mixed into the insulator 280 whose hydrogen concentration has been reduced by the oxygen plasma treatment. It is possible to reduce the.

[0233] Next, a portion of the insulator 280, a portion of the insulator layer 272B, the conductive layer 242B, and the oxide A portion of the material layer 243B is processed to form an opening that reaches the oxide 230b (see FIG. 5). The opening is preferably formed so as to overlap the conductor 205. , oxide 243a, oxide 243b, conductor 242a, conductor 242b, insulator 272a , and insulator 272b.

[0234] A portion of the insulator 280, a portion of the insulator layer 272B, the conductive layer 242B, and the oxide layer 2 Part of 43B is processed by dry etching or wet etching. Dry etching is suitable for microfabrication. Each of the insulating layers 280 may be processed under different conditions. For example, a part of the insulating layer 280 may be dry etched. The insulating layer 272B is processed by a wet etching method, and a part of the insulating layer 272B is processed by a wet etching method. B and a part of the conductive layer 242B may be processed by a dry etching method.

[0235] By performing processes such as dry etching, etching gases, etc. The impurities caused by the oxidation are attached to or inside the oxide 230a and the oxide 230b. Impurities can be, for example, fluorine or chlorine.

[0236] In order to remove the above impurities, cleaning is performed. These include wet cleaning using plasma, plasma treatment using plasma, and cleaning by heat treatment. The above cleaning methods may be combined as appropriate.

[0237] Wet cleaning uses oxalic acid, phosphoric acid, ammonia water, or hydrofluoric acid. The cleaning process may be carried out using an aqueous solution diluted with carbonated water or pure water. Alternatively, ultrasonic cleaning using carbonated water may be performed.

[0238] After the etching or cleaning, a heat treatment may be performed. The heating may be performed at a temperature of 100°C or higher and 450°C or lower, more preferably 350°C or higher and 400°C or lower. The heat treatment is carried out in an atmosphere of nitrogen gas or an inert gas, or in an atmosphere of oxidizing gas at 10ppm. For example, the heat treatment is carried out in an atmosphere containing oxygen at least 1%, 10%, or 20%. This is preferably done in air, so that oxygen is provided to the oxide 230a and the oxide 230b. Supply oxygen deficiency V O In addition, the heat treatment can be performed under reduced pressure. Alternatively, after heat treatment in an oxygen atmosphere, it is possible to continuously heat the substrate in a nitrogen atmosphere without exposing it to the air. A heat treatment may be carried out.

[0239] Next, an oxide film 230C is formed (see FIG. 6). The heat treatment may be carried out under reduced pressure and without exposure to air, and the oxidation may be continued. It is preferable to form a film 230C. The heat treatment is preferably performed in an atmosphere containing oxygen. By carrying out such a treatment, it is possible to prevent the adsorption of the oxide 230b on the surface thereof. The moisture and hydrogen contained in the oxide 230a and the oxide 230b are removed. The heat treatment temperature is 100°C or higher and 400°C or lower. ° C. or less, and more preferably 150° C. or more and 350° C. or less. The heat treatment is carried out at a temperature of 200° C. under reduced pressure.

[0240] Here, the oxide film 230C is formed by at least a part of the side surface of the oxide 230a, the oxide 230b, a part of the side surface and a part of the top surface of the oxide 243; a part of the side surface of the conductor 242 , and is provided so as to contact a part of the side surface of the insulator 272 and the side surface of the insulator 280. The conductor 242 is surrounded by the oxide 243, the insulator 272, and the oxide film 230C. This makes it possible to suppress a decrease in the electrical conductivity of the conductor 242 due to oxidation in the subsequent steps. Cut.

[0241] The oxide film 230C is formed by sputtering, CVD, MBE, PLD, or A This can be done by using the LD method or the like. The oxide film 230C is formed by doping In with Ga atoms. It is preferable that the atomic ratio of Ga to In in the oxide film 230B is larger than the atomic ratio of Ga to In in the oxide film 230B. In the present embodiment, the oxide film 230C is formed by sputtering In:Ga:Zn= The film is formed using a target with an atomic ratio of 1:3:4.

[0242] The oxide film 230C may be a laminate. For example, In The film was formed using a target with an atomic ratio of Ga:Zn=4:2:4.1. The film may be formed using a target having an atomic ratio of n:Ga:Zn=1:3:4.

[0243] During the formation of the oxide film 230C, part of the oxygen contained in the sputtering gas is converted into the oxide 230C. a and the oxide 230b. Alternatively, when forming the oxide film 230C, A portion of the oxygen contained in the sputtering gas may be supplied to the insulator 280. Therefore, the ratio of oxygen contained in the sputtering gas for the oxide film 230C is preferably 70% or more. It is preferable that the ratio is 80% or more, and more preferably 100%.

[0244] Next, a heat treatment may be performed. The heat treatment may be performed under reduced pressure and exposed to the atmosphere. The insulating film 250A may be formed in succession without performing the heat treatment. Therefore, the moisture and hydrogen adsorbed on the surface of the oxide film 230C are removed, and the oxide film 230C is further oxidized. The moisture concentration and hydrogen concentration in the oxide 230a, the oxide 230b and the oxide film 230C are reduced. The temperature of the heat treatment is preferably 100° C. or higher and 400° C. or lower. In this embodiment, the heat treatment temperature is 200°C.

[0245] Next, an insulating film 250A is formed on the oxide film 230C (see FIG. 6). The film is formed by using a method such as sputtering, CVD, MBE, PLD, or ALD. In addition, the insulating film 250A may be formed of the above-mentioned gas in which hydrogen atoms have been reduced or removed. It is preferable to form the insulating film 250A by a film forming method using a gas. The insulating film 250A is an insulator that contacts the oxide 230c in a later process. 250, it is preferable that the hydrogen concentration is reduced in this way. After the film 250A is formed, microwaves or high frequency waves such as RF are applied after the insulator 280 is formed. Alternatively, irradiation with oxygen or oxygen plasma treatment may be performed.

[0246] Next, the conductive film 260Aa and the conductive film 260Ab are formed (see FIG. 7). The deposition of 0Aa and the conductive film 260Ab is performed by sputtering, CVD, MBE, or PL For example, it is preferable to use a CVD method. In this embodiment, the conductive film 260Aa is formed by the ALD method, and the CVD method is A conductive film 260Ab is formed using this.

[0247] Next, the oxide film 230C, the insulating film 250A, the conductive film 260Aa, and The oxide 230 is removed by polishing the conductive film 260Ab until the insulator 280 is exposed. c. Forming the insulator 250 and the conductor 260 (the conductor 260a and the conductor 260b). (See Figure 8.)

[0248] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The heat treatment is carried out for 1 hour. The moisture concentration in the insulators 250 and 280 is reduced by the heat treatment. After the heat treatment, the temperature and hydrogen concentration can be reduced. The insulator 282 may be deposited immediately after the above process.

[0249] Next, on the conductor 260, on the oxide 230c, on the insulator 250, and on the insulator 280 , forming an insulator 282. The insulator 282 is formed by a sputtering method, a CVD method, an MB method, etc. The insulator 2 can be formed by a method such as E method, PLD method, or ALD method (see FIG. 9). The insulating film 82 is formed of aluminum oxide by sputtering, for example. It is preferable to form a film of the insulator 282 in an oxygen-containing atmosphere by using a sputtering method. By forming the film, oxygen can be added to the insulator 280 while the film is being formed. It is preferable to deposit the insulator 280 while heating the substrate. By forming an insulator 282 in contact with the upper surface of the semiconductor device 0, the insulator This is preferable because it can prevent the oxygen contained in the conductive material 280 from being absorbed into the conductive material 260. stomach.

[0250] Next, a part of the insulator 282, a part of the insulator 280, a part of the insulator 224, and the insulator 222 A part of the insulating material 216 and a part of the insulating material 214 are processed to form the insulating material 212. 10. The opening is formed so that the transistor 200 is enclosed. Alternatively, the opening may be formed so that the plurality of transistors 200 are surrounded. Therefore, in the opening, a part of the side surface of the insulator 282 and the insulator 2 80, a part of the side of the insulator 224, a part of the side of the insulator 222, and the insulator 21 6 and a portion of the side of insulator 214 are exposed.

[0251] A part of the insulator 282, a part of the insulator 280, a part of the insulator 224, and a part of the insulator 222 The processing of the part of the insulator 216 and the part of the insulator 214 is performed by dry etching, or For this purpose, wet etching can be used. Dry etching is a method for fine processing. The processing may be carried out under different conditions.

[0252] Next, nitrogen plasma treatment is performed to remove the oxides of the insulators 280, 224, and 216. The exposed sides are more nitrogen-rich than other areas of insulator 280, insulator 224, and insulator 216. The nitrogen plasma treatment uses microwaves, Alternatively, nitrogen gas is turned into plasma using high frequency such as RF, and the nitrogen plasma is then applied to In addition, the vicinity of the side surfaces of the insulators 280, 224, and 216 can be subjected to solid phase nitriding. In addition, in nitrogen plasma treatment, a rare gas such as argon is introduced in addition to nitrogen gas. It is preferable that

[0253] The nitrogen plasma treatment may be carried out by, for example, converting nitrogen gas into plasma using microwaves. In the microwave treatment in a nitrogen-containing atmosphere, It is preferable to generate high density plasma using a microwave processing apparatus that can The microwave processing apparatus may have a power source for applying RF to the substrate side. In this case, high density nitrogen radicals can be generated by using high density plasma. In addition, by applying RF to the substrate side, ions generated by high-density plasma are The electrons can be efficiently guided into the insulators 280, 224, and 216. In addition, the microwave treatment in a nitrogen-containing atmosphere is preferably carried out under reduced pressure, and the pressure is preferably set to 400 Pa or less, preferably 200 Pa or less, more preferably 60 Pa or less, and even more preferably 12 Pa or less. In addition, the nitrogen flow rate (N 2 / N 2 +Ar) is 50% or less, preferably The treatment temperature is, for example, about 400°C. Just say it.

[0254] In addition, even if microwaves or high-frequency waves such as RF are irradiated to the insulator 280, The irradiated microwave or high frequency such as RF may damage the insulator 280, the oxide 230b, and oxide 230a, etc., and may be able to remove hydrogen therein. For example, in the oxide 230a and the oxide 230b, a reaction in which the bond of VoH is broken occurs. I woke up, in other words, "V O The reaction "H → Vo + H" occurs, resulting in dehydrogenation. At this time, some of the generated hydrogen combines with oxygen to form H 2 Oxide 230, and Some of the hydrogen may be removed from the insulator 280 and the conductor 242. It may be ringed.

[0255] Although not shown, the insulator 2 is formed by a nitrogen plasma treatment to form the region 245. 14, insulator 222, and the sides of the openings in insulator 282 may also be solid phase nitrided.

[0256] Next, the insulator 282, the insulator 280, the insulator 224, the insulator 222, the insulator 216, and Then, an insulator 283 is formed to cover the insulating layer 214 (see FIG. 11). In addition, the insulator 283 contacts the insulator 212 at the bottom surface of the opening. The upper and side surfaces of the transistor 200 are covered by the insulator 283, and the lower surface is covered by the insulator 212. In this way, the transistor is formed by the insulator 283 and the insulator 212 having high barrier properties. By wrapping the 200, it is possible to prevent moisture and hydrogen from entering from the outside. do.

[0257] The insulator 283 is deposited by sputtering, CVD, MBE, PLD, or A. This can be done by using the LD method or the like. As described above, before the insulator 283 is formed, Forming a region 245 on the side of the edge 280, the insulator 224, and the insulator 216 So, even if a deposition method that generates a large amount of hydrogen in the chamber is used to deposit the insulator 283, , reducing the incorporation of hydrogen into insulators 280, 224, and 216. Therefore, the insulator 283 can be formed by a method having good step coverage such as a PECVD method. Since a membrane method can be used, the insulator 283 can be formed on the step of the insulator 280, etc. Films can be formed without the formation of cuts or pinholes.

[0258] Next, heat treatment may be performed. In this embodiment, heat treatment is performed in a nitrogen atmosphere at a temperature of 400° C. The treatment is carried out for 1 hour. The heat treatment removes the acid added by the formation of the insulator 282. The element is diffused into the insulator 280, and then through the oxide 230c, the oxide 230a, and In this way, the oxide 230 is subjected to oxygen addition treatment. By this, oxygen vacancies in the oxide 230 (oxide 230b) are repaired by oxygen. This can promote the reaction "Vo+O→null". Furthermore, oxide 2 The hydrogen remaining in the reactor 30 reacts with the supplied oxygen, converting the hydrogen into H 2 Removed as O This allows the hydrogen remaining in the oxide 230 to be dehydrated. Recombination to the elementary defect gives V O The formation of H can be suppressed. This may be performed not only after the formation of the insulator 283 but also after the formation of the insulator 282.

[0259] Next, the insulator 274 is deposited on the insulator 283 (see FIG. 12). This is done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. The insulator 274 can also be used to reduce or eliminate the hydrogen atoms described above. It is preferable to form the insulator 274 by a deposition method using a hydrogen gas. It is possible.

[0260] Next, the insulator 274 is subjected to a CMP process to form an insulator 274 with a flat upper surface (FIG. 1 See 2.

[0261] Next, insulator 272a, insulator 280, insulator 282, insulator 283, and insulator 2 74, an opening 255a reaching the conductor 242a is formed, and an insulator 272b, an insulator 280, and an insulator An opening 255b is provided in the body 282, the insulator 283, and the insulator 274, which reaches the conductor 242b. (See FIG. 12.) The opening may be formed by using a lithography method. In addition, in FIG. 12A, the openings 255a and 255b are circular in top view. However, the present invention is not limited to this. For example, the opening 255a and the opening 255b are In the case of a substantially circular shape such as an ellipse, a polygonal shape such as a square, or a polygonal shape such as a square, the corners of the polygon are rounded. The shape may be different.

[0262] Next, a nitrogen plasma treatment is performed to remove the insulator 274 and the exposed upper and lower surfaces of the insulator 280. and on the sides, insulator 274 and insulator 280 have regions 24 having a higher nitrogen concentration than other regions. 1 (see FIG. 13). A region 241a is formed on the inner wall of the opening 255a of the insulator 280. A region 241b is formed on the inner wall of the opening 255b of the insulator 280, and the upper surface of the insulator 274 Regions 241c are formed on the surface, the inner wall of opening 255a, and the inner wall of opening 255b. In plasma processing, nitrogen gas is converted into plasma using microwaves or high frequencies such as RF. The nitrogen plasma is then applied to the exposed upper surfaces of the insulator 274 and the insulator 280. In addition, nitrogen gas can be used in the nitrogen plasma treatment to form a solid-phase nitride around the surface and the sides. It is preferable to introduce a rare gas such as argon in addition to the gas.

[0263] The nitrogen plasma treatment may be carried out by, for example, converting nitrogen gas into plasma using microwaves. In the microwave treatment in a nitrogen-containing atmosphere, It is preferable to generate high density plasma using a microwave processing apparatus that can The microwave processing apparatus may have a power source for applying RF to the substrate side. In this case, high density nitrogen radicals can be generated by using high density plasma. By applying RF to the substrate side, ions generated by high-density plasma are efficiently The insulator 274 and the insulator 280 can be introduced into the insulator 274 and the insulator 280. The microwave treatment is preferably carried out under reduced pressure, with the pressure being 400 Pa or less, preferably It is preferably set to 200 Pa or less, more preferably 60 Pa or less, and even more preferably 12 Pa or less. In addition, the nitrogen flow rate (N 2 / N 2 +Ar) is 50% or less, preferably 10% or more and 30 % or less. The treatment temperature may be, for example, about 400°C.

[0264] The above-mentioned region 241 is a region containing hydrogen (e.g., at least one of hydrogen atoms, hydrogen molecules, etc.). Such a region 241 has a function of suppressing the diffusion of the conductor 240 and the insulator 274. and the insulator 280, the insulating material 274 and the insulating material 280 are formed between the insulating material 274 and the insulator 280. Therefore, the hydrogen from the conductor 240 can be prevented from being mixed into the conductor 240. The amount of hydrogen that diffuses into the conductor 242 and the oxide 230 can be reduced. The oxide 230 in which the impurities are sufficiently reduced is used for the channel formation region of the transistor 200. This allows the device to have normally-off characteristics, resulting in stable electrical characteristics. , the reliability can be improved.

[0265] In addition, during the nitrogen plasma treatment, microwaves or high frequencies such as RF are applied to the insulator 274, The irradiated microwaves or high frequency waves such as RF may be irradiated to the insulating material 280. The wave penetrates the insulator 274, the insulator 280, the oxide 230b, and the oxide 230a, etc. It may be possible to remove the hydrogen from these by

[0266] In addition, in the nitrogen plasma treatment, the conductor 242a is formed on the bottom surface of the opening 255a. The conductor 242b is exposed at the bottom surface of the conductor 242a. A region 244a having a higher nitrogen concentration than other regions of the conductor 242a is formed adjacent to the conductor 242a. A region 244b having a higher nitrogen concentration than other regions of the conductor 242b is formed near the surface of the conductor 242b. Region 244 preferably has approximately the same resistivity as other regions of electrical conductor 242. Therefore, the region 244 is preferably a conductor 2 that functions as a source electrode or a drain electrode. Therefore, the nitrogen plasma treatment does not significantly impede the conductivity of the region 241. No special post-treatment of the conductor 242 is required after formation of the conductor 242 .

[0267] When forming an insulating film corresponding to the region 241 by using a CVD method or the like, Since the insulating film is formed on the bottom of the opening 255a and the opening 255b, However, as shown in this embodiment, a process for removing only the insulating film is required. By using the process, a barrier film is formed only on the side of the opening 255a and the opening 255b. By forming the region 241, an additional removal process is not required, and therefore the production of the semiconductor device is simplified. Productivity can be improved.

[0268] Although not shown, the nitrogen plasma treatment for forming the region 241 causes the region 24 4, as well as insulators 272a, 272b, 282, and 283. The sides of the opening may also be solid phase nitrided.

[0269] Next, a conductive film that will become the conductor 240a and the conductor 240b is formed. The conductive film that becomes the conductor 240b has a function of suppressing the permeation of impurities such as water and hydrogen. It is preferable to use a laminated structure containing a conductor such as tantalum nitride or titanium nitride. The conductor 24 may be a laminate of tungsten, molybdenum, copper, etc. The conductive film that becomes 0 is formed by sputtering, CVD, MBE, PLD or AL. This can be done using Method D or the like.

[0270] Next, a CMP process is performed to remove the conductive film that will become the conductor 240a and the conductor 240b. A portion is removed to expose the top surface of insulator 274 (which may also be referred to as region 241c). As a result, the conductive film remains only in the openings 255a and 255b, so that the upper surface A flat conductor 240a and a flat conductor 240b can be formed (see FIG. 14). By the CMP process, a part of the upper surface of the insulator 274 is removed, and the upper surface of the insulator 274 There are cases where the area 241c formed nearby is also removed at the same time.

[0271] Next, a conductive film that will become the conductor 246 is formed. This can be done using the sputtering method, CVD method, MBE method, PLD method, or ALD method. can.

[0272] Next, the conductive film that will become the conductor 246 is processed by lithography to form the conductor 240a. The conductor 246a contacts the upper surface of the conductor 240b, and the conductor 246b contacts the upper surface of the conductor 240b. (See Figure 1.)

[0273] Through the above steps, a semiconductor device including the transistor 200 shown in FIG. 1 can be manufactured. As shown in FIGS. 2 to 14, the semiconductor device can be manufactured by using the method for manufacturing the semiconductor device described in this embodiment mode. In this manner, the transistor 200 can be manufactured.

[0274] <Microwave processing equipment> A microwave processing apparatus that can be used in the method for manufacturing the semiconductor device will be described below. I will explain this in more detail.

[0275] First, let us look at the configuration of a manufacturing device that minimizes the amount of impurities introduced during the manufacture of semiconductor devices. 5, will be explained with reference to Figs. 16 and 17.

[0276] FIG. 15 is a schematic top view of a single-wafer multi-chamber manufacturing apparatus 2700. The manufacturing apparatus 2700 includes a cassette port 2761 for accommodating substrates and a substrate alignment device. and an atmosphere-side substrate supply chamber 2701 having an alignment port 2762 for performing the alignment. The substrate is transported from the substrate supply chamber 2701 to the atmospheric substrate transport chamber 2702, which transports the substrate. A load lock chamber in which the pressure inside the chamber is switched from atmospheric pressure to reduced pressure or from reduced pressure to atmospheric pressure. 2703a, the substrate is removed, and the pressure in the chamber is reduced to atmospheric pressure, or atmospheric pressure to atmospheric pressure. The unload lock chamber 2703b is switched to a reduced pressure state, and the transfer chamber 2703 is used for transferring substrates in a vacuum. 704, chamber 2706a, chamber 2706b, and chamber 2706c. , and chamber 2706d.

[0277] The atmospheric substrate transfer chamber 2702 is provided with a load lock chamber 2703a and an unload lock chamber 2703b. The load lock chamber 2703a and the unload lock chamber 2703b are connected to each other. 3b is connected to a transfer chamber 2704, which is connected to a chamber 2706a, a chamber Bar 2706b connects chamber 2706c and chamber 2706d.

[0278] A gate valve GV is provided at the connection between the chambers, and the atmosphere side substrate supply chamber 270 Each chamber can be independently maintained in a vacuum state, except for the atmospheric side substrate transfer chamber 2702. In addition, a transfer robot 2763a is provided in the atmospheric substrate transfer chamber 2702. The transfer chamber 2704 is provided with a transfer robot 2763b. and the transfer robot 2763b can transfer the substrate within the manufacturing apparatus 2700. do.

[0279] The back pressure (total pressure) of the transfer chamber 2704 and each chamber is, for example, 1×10 -4 Pa or less , preferably 3 x 10 -5 Pa or less, more preferably 1×10 -5 Pa or less. In addition, the mass-to-charge ratio (m / z) of the gas molecules ( The partial pressure of the atom is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, More preferably 3×10 -6 The pressure in the transfer chamber 2704 and each chamber is set to 0.1 Pa or less. The partial pressure of a gas molecule (atom) with m / z of 28 is, for example, 3 × 10 -5 Pa or less, preferred Or 1×10 -5 Pa or less, more preferably 3×10 -6 Pa or less. The partial pressure of gas molecules (atoms) with m / z of 44 in the delivery chamber 2704 and each chamber is, for example, 3×10 -5 Pa or less, preferably 1×10 -5 Pa or less, more preferably 3×1 0 -6 Pa or less.

[0280] The total pressure and partial pressure in the transfer chamber 2704 and each chamber were measured using a mass spectrometer. For example, a quadrupole mass spectrometer (Q-mass spectrometer) manufactured by ULVAC, Inc. s.) Qulee CGM-051 can be used.

[0281] In addition, the transfer chamber 2704 and each chamber are constructed to have little external or internal leakage. For example, the leak rate of the transfer chamber 2704 and each chamber is , 3×10 -6 Pa·m 3 / s or less, preferably 1×10 -6 Pa·m 3 / s or less For example, the leak rate of a gas molecule (atom) with m / z of 18 is 1×10 -7 P a·m 3 / s or less, preferably 3×10 -8Pa·m 3 / s or less. For example, The leak rate of a gas molecule (atom) with m / z of 28 is 1×10 -5 Pa·m 3 / s or less , preferably 1 x 10 -6 Pa·m 3 For example, if the m / z is 44, The leak rate of gas molecules (atoms) is 3×10 -6 Pa·m 3 / s or less, preferably 1× 10 -6 Pa·m 3 / s or less.

[0282] The leak rate was calculated from the total and partial pressures measured using the mass spectrometer mentioned above. The leak rate depends on the external leak and the internal leak. The problem is that gas enters from outside the vacuum system due to a small hole or a defective seal. Leaks are caused by leakage from partitions such as valves in the vacuum system or gas released from internal components. In order to keep the leak rate below the above values, both external and internal leaks are considered. It is necessary to take measures from

[0283] For example, the opening and closing parts of the transfer chamber 2704 and each chamber are sealed with metal gaskets. Metal gaskets should be coated with iron fluoride, aluminum oxide, or chromium oxide. Metal gaskets have a higher adhesion than O-rings. In addition, the use of iron fluoride, aluminum oxide, chromium oxide, etc. By using a metal passivation coating, impurities released from the metal gasket are eliminated. This suppresses gas release and reduces internal leakage.

[0284] In addition, the components constituting the manufacturing equipment 2700 are made of aluminum, which emits less gas containing impurities. The alloys used are aluminum, chromium, titanium, zirconium, nickel, or vanadium. The above-mentioned members may be used by being coated with an alloy containing iron, chromium, nickel, etc. Aluminum and nickel-containing alloys are strong, heat resistant, and easy to machine. Therefore, if the surface irregularities of the component are reduced by polishing or the like in order to reduce the surface area, Gas emission can be reduced.

[0285] Alternatively, the components of the manufacturing apparatus 2700 may be made of iron fluoride, aluminum oxide, chromium oxide, etc. The material may be coated with, for example,

[0286] It is preferable that the members of the manufacturing apparatus 2700 are made of metal as much as possible, for example, quartz. When installing a viewing window made of ferric fluoride, the surface is treated with iron fluoride to suppress gas emission. It is advisable to coat it thinly with aluminum oxide or chromium oxide.

[0287] The adsorbed substances present in the transfer chamber 2704 and each chamber are adsorbed to the inner walls, etc. Although it does not affect the pressure in the transfer chamber 2704 and each chamber, This causes gas emission when the chamber is evacuated. Therefore, the leak rate is proportional to the pumping speed. Although there is no relation between the temperature and the temperature of the gas, a pump with high exhaust capacity is used to exhaust the gas into the transfer chamber 2704 and each chamber. It is important to remove as much of the adsorbed matter as possible and evacuate the gas in advance. To promote desorption of adsorbed substances, the transfer chamber 2704 and each chamber may be baked. Baking can increase the desorption rate of adsorbed substances by about 10 times. The heating may be performed at a temperature of 100° C. or higher and 450° C. or lower. In addition, if the adsorbed substances are removed while being introduced into each chamber, it is difficult to remove them by simply evacuating. The desorption rate of water and other substances can be further increased. Heating to the same temperature as King's can further increase the desorption rate of the adsorbed substances. Here, it is preferable to use a rare gas as the inert gas.

[0288] Alternatively, an inert gas such as a heated rare gas or oxygen may be introduced into the transfer chamber 27. The pressure in the transfer chamber 2704 and each chamber is increased, and after a certain period of time, the transfer chamber 2704 and each chamber are It is preferable to evacuate the chamber. The adsorbed substances in the transport chamber 2704 and each chamber can be desorbed. This process reduces impurities present in the bar. This process should be repeated at least 2 times and no more than 30 times. It is effective to repeat the process 5 to 15 times. An inert gas having a temperature of 40°C or higher and 400°C or lower, preferably 50°C or higher and 200°C or lower. By introducing oxygen, the pressure in the transfer chamber 2704 and each chamber is kept below 0.1 Pa. 10 kPa or less, preferably 1 Pa or more and 1 kPa or less, and more preferably 5 Pa or more and 1 kPa or less. The pressure should be kept at 1 to 300 minutes, preferably 5 to 120 minutes. After that, the transfer chamber 2704 and each chamber are heated for 5 minutes or more and 300 minutes or more. The air is evacuated for a period of time preferably from 10 minutes to 120 minutes.

[0289] Next, the chamber 2706b and the chamber 2706c are shown in a cross-sectional view in FIG. This will be explained using a formula diagram.

[0290] The chambers 2706b and 2706c are used to apply microwaves to the object to be treated. The chambers 2706b and 2706c are chambers in which processing can be performed. The only difference between the 2706c and the 2706c is the atmosphere in which the microwave treatment is carried out. Since these are common to both, they will be explained together below.

[0291] Chamber 2706b and chamber 2706c are connected to a slot antenna plate 2808. The device has a dielectric plate 2809, a substrate holder 2812, and an exhaust port 2819. Outside the chambers 2706b and 2706c, a gas supply source 2801 and A valve 2802, a high frequency generator 2803, a waveguide 2804, and a mode converter 2805. , a gas pipe 2806, a waveguide 2807, a matching box 2815, and a high frequency power supply 2816, a vacuum pump 2817, and a valve 2818 are provided.

[0292] The high frequency generator 2803 is connected to the mode converter 2805 via the waveguide 2804. The mode converter 2805 is connected to a slot antenna plate 2808 via a waveguide 2807. The slot antenna plate 2808 is disposed in contact with the dielectric plate 2809. The gas supply source 2801 is connected to a mode converter 2805 via a valve 2802. Then, the gas passes through the mode converter 2805, the waveguide 2807, and the dielectric plate 2809. Pipe 2806 delivers gas to chamber 2706b and chamber 2706c. The vacuum pump 2817 also supplies the chamber with air via the valve 281 and the exhaust port 2819. It has a function of exhausting gases and the like from the bar 2706b and the chamber 2706c. The high frequency power supply 2816 is connected to the substrate holder 2812 via a matching box 2815. It continues.

[0293] The substrate holder 2812 has a function of holding the substrate 2811. For example, The device has the function of electrostatically or mechanically chucking the object. It also has a heating mechanism 2813 inside, It has a function of heating the substrate 2811 .

[0294] The vacuum pump 2817 may be, for example, a dry pump, a mechanical booster pump, Ion pump, titanium sublimation pump, cryopump or turbomolecular pump In addition to the vacuum pump 2827, a cryotrap can be used. Cryopumps and cryotraps can be used to efficiently pump out water. This is particularly preferred.

[0295] The heating mechanism 2813 may be, for example, a heating mechanism that uses a resistance heating element or the like. Alternatively, heat can be transferred by conduction or radiation from a medium such as a heated gas, For example, a GRTA (Gas Rapid Therma l Annealing) or LRTA (Lamp Rapid Thermal Annealing) RTA (Rapid Thermal Annealing) The GRTA uses high-temperature gas for heat treatment. Inert gas is used.

[0296] The gas supply source 2801 is connected to a refiner via a mass flow controller. The gas used has a dew point of -80°C or less, preferably -100°C or less. For example, oxygen gas, nitrogen gas, and rare gas (such as argon gas) are preferably used. Just use it.

[0297] The dielectric plate 2809 may be made of, for example, silicon oxide (quartz), aluminum oxide (aluminum The dielectric plate 28 may be made of, for example, yttrium oxide (yttria). A separate protective layer may be formed on the surface of the substrate 09. The protective layer may be made of magnesium oxide. Sium, titanium oxide, chromium oxide, zirconium oxide, hafnium oxide, tantalum oxide, Silicon oxide, aluminum oxide, yttrium oxide, or the like may be used. 2809 is exposed to a particularly high-density region of the high-density plasma 2810 described later. Therefore, a protective layer can be provided to mitigate damage. It is possible to suppress the increase in

[0298] The high frequency generator 2803 can be used for frequencies in the range of 0.3 GHz to 3.0 GHz, for example, 0.7 GHz. Generates microwaves from z to 1.1 GHz or from 2.2 GHz to 2.8 GHz The microwave generated by the high frequency generator 2803 is guided through the waveguide 2804. The mode converter 2805 converts the TE mode into The microwaves are converted into TEM mode and then propagated through the waveguide 280. 7 to the slot antenna plate 2808. The slot antenna plate 2808 has a plurality of The microwave passes through the slots and the dielectric plate 2809. Then, an electric field is generated below the dielectric plate 2809, generating a high-density plasma 2810. The high density plasma 2810 can be generated by supplying gas from a gas supply source 2801. There are ions and radicals depending on the gas species used. For example, oxygen radicals or nitrogen radicals There are also other types of carbamide.

[0299] At this time, the substrate 2811 is exposed to ions and radicals generated in the high-density plasma 2810. The film on the substrate 2811 can be modified by the high frequency power source 2816. In some cases, it may be preferable to apply a bias to the substrate 2811 side using a high frequency power source 28. 16 includes RF (Radio Frequency) signals with frequencies such as 13.56 MHz and 27.12 MHz. By applying a bias to the substrate, Ions in the high-density plasma 2810 can reach the depths of an opening in a film or the like on a substrate 2811 efficiently. It can be achieved.

[0300] For example, in the chamber 2706b, oxygen is introduced from a gas supply source 2801 to obtain a high The oxygen radical treatment was performed using high density plasma 2810, and the gas was Nitrogen radicals were generated using high-density plasma 2810 by introducing nitrogen from a gas supply source 2801. Processing can be performed using the

[0301] Next, the chamber 2706a and the chamber 2706d are shown in a cross-sectional view in FIG. This will be explained using a formula diagram.

[0302] The chambers 2706a and 2706d are, for example, a chamber for irradiating an object to be treated with electromagnetic waves. It is possible to perform a firing in the chamber. The only difference between this and 706d is the type of electromagnetic waves. The rest of the configuration is the same. Because there are many parts, we will explain them together below.

[0303] Chamber 2706a and chamber 2706d may each include one or more lamps 2820. , a substrate holder 2825, a gas inlet 2823, and an exhaust port 2830. , outside chamber 2706a and chamber 2706d, a gas supply source 2821 , a valve 2822, a vacuum pump 2827, and a valve 2829 are provided.

[0304] The gas supply source 2821 is connected to a gas inlet 2823 via a valve 2822 . The vacuum pump 2828 is connected to an exhaust port 2830 via a valve 2829. 2820 is disposed opposite to a substrate holder 2825. The substrate holder 2825 is The substrate holder 2825 has a function of holding the substrate 2824. The substrate holder 2825 also has a heating mechanism therein. 2826 and has a function of heating the substrate 2824.

[0305] The lamp 2820 has a function of emitting electromagnetic waves such as visible light or ultraviolet light. For example, a light source having a wavelength of 10 nm or more and 2500 nm or less, or 500 nm or less Emits electromagnetic waves with a peak between 2000 nm and 40 nm and 340 nm. It is sufficient to use a light source having such a function.

[0306] For example, the lamp 2820 may be a halogen lamp, a metal halide lamp, a xenon Arc lamps, carbon arc lamps, high pressure sodium lamps, high pressure mercury lamps, etc. A light source of this type may be used.

[0307] For example, the electromagnetic waves emitted from the lamp 2820 may be partially or completely transmitted to the substrate 2824. The film on the substrate 2824 can be modified by being absorbed into the substrate. For example, The substrate 2824 can be heated while the When carried out, defects can be efficiently generated or reduced, or impurities can be efficiently removed.

[0308] Alternatively, for example, the substrate holder 2825 may be heated by electromagnetic waves emitted from the lamp 2820. The substrate 2824 may be heated by heating the substrate holder 2825. The heat mechanism 2826 may not be present.

[0309] For the vacuum pump 2827, please refer to the description of the vacuum pump 2817. The mechanism 2826 is described with reference to the description of the heating mechanism 2813. Please refer to the description of the gas supply source 2801.

[0310] By using the above manufacturing equipment, it is possible to suppress the inclusion of impurities in the processed object while improving the film quality. This makes it possible.

[0311] <Modifications of the semiconductor device> In the following, the above-mentioned <Configuration Example of Semiconductor Device> will be described with reference to FIGS. 18 to 21. An example of a semiconductor device including a transistor 200 according to another embodiment of the present invention will be described. In the semiconductor device shown in FIG. 18 to FIG. 21, The same reference numerals are used to designate structures having the same functions as those constituting the semiconductor device shown in FIG. In this section, the constituent materials of the transistor 200 are described in the Semiconductor Device The materials described in detail in the section "Configuration Examples" above can be used.

[0312] <Modification 1 of the semiconductor device> FIG. 18A is a top view of a semiconductor device having a transistor 200. FIG. 18B is a cross-sectional view corresponding to the portion indicated by the dashed line A1-A2 in FIG. 18A. FIG. 18C is a cross-sectional view of the stadia 200 in the channel length direction. 4 is a cross-sectional view of the transistor 200 in the channel width direction. FIG. 18D is a cross-sectional view of the portion indicated by the dashed line A5-A6 in FIG. 18A. In the top view of FIG. 18A, some elements are omitted for clarity. The figure shows the results.

[0313] The transistor 200 shown in FIG. 18 includes an insulator 224, an insulator 280, and an insulator 28. 2 is patterned, and the insulator 283 and the insulator 222 seal them. 1 in that the insulator 283 is , the top and side surfaces of the insulator 282, the side surfaces of the insulator 280, the side surfaces of the insulator 224, The region 245 is in contact with the upper surface of the insulator 224. Thus, the insulators 224, 280, and Insulator 282 is isolated from the outside by insulator 222 and insulator 283 .

[0314] By using such a structure, the insulators 214, 216, and 222 are Since turning is no longer necessary, the process is simplified and the productivity of semiconductor devices is improved. This can be done.

[0315] <Modification 2 of Semiconductor Device> FIG. 19A is a top view of a semiconductor device having a transistor 200. FIG. 19B is a cross-sectional view corresponding to the portion indicated by the dashed line A1-A2 in FIG. 19A. FIG. 19C is a cross-sectional view of the stadia 200 in the channel length direction. 4 is a cross-sectional view of the transistor 200 in the channel width direction. FIG. 19D is a cross-sectional view of the portion indicated by the dashed line A5-A6 in FIG. 19A. 19A is a cross-sectional view of the corresponding part. Note that in the top view of FIG. 19A, some elements are omitted for clarity. The figure shows the results.

[0316] The transistor 200 shown in FIG. 19 includes an insulator 214, an insulator 216, an insulator 222, and an insulator 230. The edge 224, the insulator 280, and the insulator 282 are not patterned. 19 is different from the transistor 200 shown in FIG. Since the border 280, the insulator 224, and the insulator 216 are not patterned, the area 245 is not formed.

[0317] By adopting such a structure, the insulators 214, 216, 222, and 2 24, insulator 280, and insulator 282 are not required to be patterned. This simplifies the manufacturing process and improves the productivity of the semiconductor device.

[0318] Also, instead of the insulator 272a and the insulator 272b, the insulator 224 and the oxide 230 are a, an insulator 272 is provided covering the oxide 230b, the oxide 243, and the conductor 242. The insulator 272 is made of an insulating film similar to the insulators 272a and 272b. It is possible.

[0319] The top and side surfaces of the conductor 242, the side surface of the oxide 243, the side surface of the oxide 230a, and The side of the oxide 230b is covered with the insulator 272. Impurities such as hydrogen and water and oxygen from the surface and the upper surface of the conductor 242 to the conductor 242 The diffusion of the oxide 243 can be suppressed. Since the oxygen of the oxide 230b is blocked by the oxide 243, the conductivity is Therefore, the diffusion of the conductor 242 from the surroundings of the conductor 242 to the conductor 242 is suppressed. Since the diffusion of oxygen can be suppressed, the oxidation of the conductor 242 can be suppressed. In addition, the oxide 230a and the oxide 230b are formed from the side surfaces of the oxide 230a and the oxide 230b. In addition, the diffusion of impurities such as hydrogen and water into oxide 230b can be suppressed.

[0320] <Modification 3 of the semiconductor device> FIG. 20A is a top view of a semiconductor device having a transistor 200. FIG. 20B is a cross-sectional view corresponding to the portion indicated by the dashed line A1-A2 in FIG. FIG. 20C is a cross-sectional view of the stadia 200 in the channel length direction. 4 is a cross-sectional view of the transistor 200 in the channel width direction. FIG. 20D is a cross-sectional view of the portion indicated by the dashed line A5-A6 in FIG. 20A. In the top view of FIG. 20A, some elements are omitted for clarity. The figure shows the results.

[0321] The transistor 200 shown in FIG. 20 includes an insulator 214, an insulator 216, an insulator 222, and an insulator 230. The edge 224 and the insulator 280 are patterned, and the insulator 282 and the insulator 22 2 is structured to seal these, which is different from the transistor 200 shown in FIG. That is, the insulator 282 is disposed between the top and side surfaces of the insulator 280 and the side surface of the insulator 224. , a side surface of the insulator 222, a side surface of the insulator 216, a side surface of the insulator 214, and the insulator 21 2. Here, insulator 283 is formed on insulator 282.

[0322] When manufacturing the transistor 200 shown in FIG. 20, after forming the conductor 260 and the like shown in FIG. 10 is performed without forming the insulator 282, and a part of the insulator 280 and the insulator 224, a portion of the insulator 222, a portion of the insulator 216, and a portion of the insulator 214; Then, an opening is formed that reaches the insulator 212. Further, a nitrogen plasma treatment is performed. The exposed top and side surfaces of insulator 280, the exposed sides of insulator 224, and insulator 216 The exposed sides of the insulator 280, the insulator 224, and the insulator 216 have more nitrogen than other areas. Next, the insulator 280, the insulator 224, and the insulator 222 are formed. , and the insulator 216 and the insulator 214 are covered with an insulator 283. 11 and thereafter.

[0323] By forming the transistor 200 shown in FIG. 20 in this manner, the transistor 200 shown in FIG. Unlike the transistor 200, a region 245 is also formed on the top surface of the insulator 280. 0, etc., insulator 214, insulator 216, insulator 222, insulator 224, and insulator The body 280 is isolated from the outside by the insulators 212, 282 and 283. can be.

[0324] <Modification 4 of the semiconductor device> 21A and 21B, a plurality of transistors 200_1 to 200_ n is enclosed and sealed with an insulator 283 and an insulator 212. 1A and 21B, transistors 200_1 to 200_n are Although they appear to be aligned in the channel length direction, this is not the only possible arrangement. The transistors 200_1 to 200_n may be arranged in the channel width direction. They may be arranged in a matrix or may be arranged without any regularity.

[0325] As shown in FIG. 21A, a plurality of transistors 200_1 to 200_n On the outside, the portion where the insulator 283 and the insulator 212 contact each other (hereinafter referred to as the sealing portion 265) The sealing portion 265 is formed on the plurality of transistors 200_1 to The transistor 200_n is surrounded by the transistor 200_n. The transistors 200_1 to 200_n are surrounded by an insulator 283 and an insulator 212. That is, a plurality of transistors 200_1 to 200_2 can be wrapped around the transistor 200_3. The four sides and the top of the _n are covered with an insulator 283, and the bottom is covered with an insulator 212. In this way, a plurality of transistor groups surrounded by the sealing portion 265 are provided on the substrate. It becomes.

[0326] The sides of the insulators 280, 224, and 216 near the sealing portion 265 are provided with a region A region 245 is formed, and the transistor group surrounded by the sealing portion 265 is also in the region 245. Surrounded.

[0327] In addition, a dicing line (scribe line, dividing line, or The substrate may be divided at the dicing line. Since the semiconductor device is cut, the group of transistors enclosed by the sealing portion 265 can be extracted as one chip. It becomes.

[0328] In addition, in FIG. 21A, a plurality of transistors 200_1 to 200_n are Although an example in which the sealing portion 265 is surrounded by the sealing portion 265 is shown, the present invention is not limited to this. As shown, a plurality of transistors 200_1 to 200_n are sealed in a plurality of sealing portions. In FIG. 21B, a plurality of transistors 200_1 to The capacitor 200_n is surrounded by a sealing portion 265a, and is further surrounded by an outer sealing portion 265b. There are.

[0329] In this manner, the plurality of transistors 200_1 to 200_ By surrounding n, the area where the insulator 283 and the insulator 212 are in contact increases, This can further improve the adhesion between the edge 283 and the insulator 212. Indeed, a plurality of transistors 200_1 to 200_n can be sealed. .

[0330] In this case, even if a dicing line is provided overlapping the sealing portion 265a or the sealing portion 265b, Alternatively, a dicing line may be provided between the sealing portion 265a and the sealing portion 265b.

[0331] According to one embodiment of the present invention, a semiconductor device having favorable electrical characteristics can be provided. According to another embodiment of the present invention, a semiconductor device having normally-off electrical characteristics is provided. According to one embodiment of the present invention, a highly reliable semiconductor device can be provided. According to one embodiment of the present invention, a semiconductor device with large on-state current can be provided. According to one embodiment of the present invention, a semiconductor device having high frequency characteristics can be provided. According to one embodiment of the present invention, a semiconductor device that can be miniaturized or highly integrated can be provided. According to one embodiment of the present invention, a semiconductor device with low off-state current can be provided. According to one embodiment of the present invention, a semiconductor device with reduced power consumption can be provided. According to one embodiment of the present invention, a highly productive semiconductor device can be provided. can be provided.

[0332] (Embodiment 2) In this embodiment, one mode of a semiconductor device will be described with reference to FIGS.

[0333] [Storage device 1] FIG. 22 shows an example of a semiconductor device (memory device) using a capacitor according to one embodiment of the present invention. In the semiconductor device according to one embodiment of the present invention, the transistor 200 is disposed above the transistor 300. The capacitor 100 is disposed above the transistor 300 and the transistor 200. The transistor 200 may be the transistor described in the previous embodiment. Sta 200 can be used.

[0334] The transistor 200 is a transistor in which a channel is formed in a semiconductor layer having an oxide semiconductor. The transistor 200 is used in a memory device because its off-state current is small. This makes it possible to retain the memory contents for a long period of time. Since no refresh operation is required or the frequency of refresh operations is extremely low, Power consumption can be reduced sufficiently.

[0335] In the semiconductor device shown in FIG. 22, a wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the first gate of the transistor 200. 006 is electrically connected to the second gate of the transistor 200. The gate of the transistor 300 and the other of the source and drain of the transistor 200 are connected to a capacitor. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. It is electrically connected to the other.

[0336] In addition, the memory device shown in FIG. 22 has a memory cell array arranged in a matrix. It can be configured.

[0337] <Transistor 300> The transistor 300 is provided on a substrate 311 and includes a conductor 316 that functions as a gate. 3, an insulator 315 serving as a gate insulator, and a semiconductor region 31 3, and a low resistance region 314a serving as a source region or a drain region, and The transistor 300 may be a p-channel or an n-channel Any type is acceptable.

[0338] Here, the transistor 300 shown in FIG. 22 has a semiconductor region 313 ( A part of the substrate 311 has a convex shape. The side and top surfaces of the semiconductor region 313 are insulated. The conductor 316 is provided so as to cover the edge 315. Materials for adjusting the work function may be used. Since it uses a protruding part, it is also called a FIN type transistor. In addition, the insulating layer may have an insulating material that functions as a mask for forming the protrusions. Here, a case where a protrusion is formed by processing a part of a semiconductor substrate is shown, but a SOI substrate is also processed. A semiconductor film having a convex shape may be formed by the above-mentioned method.

[0339] Note that the transistor 300 shown in FIG. 22 is just an example, and the present invention is not limited to this structure. Appropriate transistors may be used depending on the configuration and driving method.

[0340] <Capacitive element 100> The capacitor 100 is provided above the transistor 200. a conductor 110 serving as the first electrode, a conductor 120 serving as the second electrode, and and an insulator 130 that functions as a dielectric.

[0341] Also, for example, the conductor 112 provided on the conductor 246 and the conductor 110 are formed at the same time. Note that the conductor 112 can be used for the capacitor 100, the transistor 200, and has a function as a plug or wiring that is electrically connected to the transistor 300 .

[0342] In FIG. 22, the conductor 112 and the conductor 110 are shown to have a single-layer structure. However, the present invention is not limited to this, and may be a laminated structure of two or more layers. For example, Conductors that have barrier properties between weak conductors and those with high electrical conductivity have good adhesion to conductors with high electrical conductivity. may form a highly conductive material.

[0343] The insulator 130 may be, for example, silicon oxide, silicon oxynitride, or silicon nitride oxide. , silicon nitride, aluminum oxide, aluminum oxide nitride, aluminum oxide nitride, nitrogen Aluminum oxide, hafnium oxide, hafnium oxynitride, hafnium nitride oxide, hafnium The conductive layer may be formed as a laminate or a single layer.

[0344] For example, the insulator 130 may be made of a material with high dielectric strength, such as silicon oxynitride, or a material with high dielectric strength. It is preferable to use a laminated structure with a high-k material. The element 100 has a high dielectric constant (high-k) insulator, so that it can ensure sufficient capacitance. By using an insulator having a large dielectric strength, the dielectric strength is improved, and the electrostatic breakdown of the capacitance element 100 is prevented. This can suppress the destruction.

[0345] In addition, oxide is an insulator for high dielectric constant (high-k) materials (materials with a high relative dielectric constant). Contains gallium, hafnium oxide, zirconium oxide, aluminum and hafnium Oxides, Oxynitrides with Aluminum and Hafnium, Silicon and Hafnium an oxide having silicon and hafnium, an oxide nitride having silicon and hafnium, or an oxide nitride having silicon and hafnium Nitrides containing fluorine.

[0346] On the other hand, materials with high dielectric strength (materials with low dielectric constant) include silicon oxide and oxynitride. Silicon oxide, silicon nitride, silicon nitride, silicon oxide doped with fluorine, carbon Doped silicon oxide, carbon and nitrogen doped silicon oxide, vacancy-containing silicon oxide Examples include concrete or resin.

[0347] <Wiring layer> Between each structure, a wiring layer is provided in which an interlayer film, wiring, plugs, etc. are provided. Also, a plurality of wiring layers may be provided according to the design. Conductors that function as wiring or wiring may be grouped together and given the same symbol. In addition, in the present specification and the like, the wiring and the plug electrically connected to the wiring may be integrated. That is, when a part of the conductor functions as wiring, or when the conductor In some cases, some parts also function as plugs.

[0348] For example, an insulator 320, an insulator 322, and an insulator 323 are provided on the transistor 300 as an interlayer film. The edge member 324 and the insulator 326 are laminated in this order. The insulators 322, 324, and 326 are connected to the capacitive element 100 or the transistor. A conductor 328 and a conductor 330 are embedded in the conductive layer 200. The conductor 328 and the conductor 330 function as plugs or wiring.

[0349] In addition, the insulator that functions as an interlayer film acts as a flattening film that covers the uneven shape underneath. For example, the top surface of the insulator 322 may be chemically mechanically polished ( The surface may be planarized by a planarization process using a chemical mechanical polishing (CMP) method or the like.

[0350] A wiring layer may be provided on the insulator 326 and the conductor 330. For example, in FIG. In the insulating layer 350, an insulator 352, and an insulator 354 are stacked in this order. In addition, a conductor 356 is formed on the insulators 350, 352, and 354. The conductor 356 functions as a plug or a wiring.

[0351] Similarly, the insulators 210, 212, 214, and 216 are each provided with a conductive The conductive body 218 and the conductive body (conductive body 205) constituting the transistor 200 are embedded. Note that the conductor 218 is electrically connected to the capacitor 100 or the transistor 300. The conductor 120 and the insulator 130 function as a plug or wiring for connecting the conductor 120 and the insulator 130. On top of 130 is an insulator 150 .

[0352] Here, region 2 is a region that has been solid-phase nitrided similarly to region 241 shown in the above embodiment. It is preferable that region 217 is formed in contact with the side of conductor 218. Region 217 is an insulator. 210 and in the vicinity of the inner wall of the opening formed in the insulator 216. The region 217 is provided between the conductor 218 and the insulators 210 and 216. In addition, since the conductor 205 can be formed in parallel with the conductor 218, the conductor 2 In some cases, region 217 may be formed adjacent to the side of 05.

[0353] The region 217 is formed near the side of the insulator 210 and the insulator 216. Impurities such as water or hydrogen from 210 or insulator 216 pass through conductor 218. It is possible to suppress the inclusion of the oxide 230. In addition, by forming the region 217, , preventing oxygen contained in the insulator 210 or the insulator 216 from being absorbed into the conductor 218. It is possible.

[0354] Region 217 can be formed in a manner similar to that of region 241. For example, conductor 21 After forming the opening for embedding the insulating layer 218, a nitrogen plasma treatment is performed to form the insulating layer 210 and the insulating layer 211. The side surface of the conductor 218 is then subjected to solid-phase nitriding to form the region 217. If the hydrogen concentration in the insulator 216 is sufficiently reduced, the region 217 is provided. It's not necessary.

[0355] Insulators that can be used as the interlayer film include oxides, nitrides, and oxides having insulating properties. These include metal nitrides, nitride oxides, metal oxides, metal oxynitrides, and metal nitride oxides.

[0356] For example, by using a material with a low relative dielectric constant for the insulator that functions as an interlayer film, Therefore, depending on the function of the insulator, the material It is recommended to select:

[0357] For example, the insulators 150, 210, 352, and 354 have relatively low resistance. It is preferable to have an insulator with a low dielectric constant, for example silicon oxynitride. , silicon nitride, silicon oxide doped with fluorine, silicon oxide doped with carbon, carbon and and silicon oxide with added nitrogen, silicon oxide or resin with voids. Alternatively, the insulator is preferably silicon oxide, silicon oxynitride, or silicon nitride oxide. Silicon nitride, silicon oxide with added fluorine, silicon oxide with added carbon, carbon Lamination of silicon oxide with added hydrogen and nitrogen or silicon oxide with voids and resin It is preferable that the silicon oxide and silicon oxynitride have the structure. Therefore, by combining it with resin, it is possible to create a laminated structure that is thermally stable and has a low dielectric constant. Examples of resins include polyester, polyolefin, polyamide (nylon), etc. Examples include polyimide, polycarbonate, and acrylic.

[0358] In addition, a transistor using an oxide semiconductor can suppress the permeation of impurities such as hydrogen and oxygen. By surrounding the transistor with an insulator that has the function of suppressing the Therefore, the insulators 214, 212, and 350 can be filled with hydrogen and the like. An insulator having a function of suppressing the permeation of impurities and oxygen may be used.

[0359] Examples of insulators that have a function of suppressing the permeation of impurities such as hydrogen and oxygen include: Boron, carbon, nitrogen, oxygen, fluorine, magnesium, aluminum, silicon, phosphorus, salt Argon, Gallium, Germanium, Yttrium, Zirconium, Lanthanum, Neo Insulators containing zinc, hafnium or tantalum may be used in single or multilayer configurations. Specifically, the following insulators have the function of suppressing the permeation of impurities such as hydrogen and oxygen: Aluminum oxide, magnesium oxide, gallium oxide, germanium oxide, yttrium oxide tungsten oxide, zirconium oxide, lanthanum oxide, neodymium oxide, hafnium oxide or tungsten oxide Metal oxides such as talc, silicon oxide nitride, silicon nitride, etc. can be used. .

[0360] Conductors that can be used for wiring and plugs include aluminum, chromium, copper, silver, Gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium Sodium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium Materials containing one or more metal elements selected from the group consisting of ruthenium and lithium can be used. Semiconductors with high electrical conductivity, such as polycrystalline silicon containing impurity elements such as arsenic, A silicide such as nickel silicide may also be used.

[0361] For example, conductor 328, conductor 330, conductor 356, conductor 218, and conductor 1 12, etc., may be a metal material, an alloy material, a metal nitride material, or the like formed from the above-mentioned materials. Conductive materials such as metal oxide materials can be used in a single layer or in a laminated form. It is preferable to use a high melting point material such as tungsten or molybdenum that is also electrically conductive. It is preferable to use tungsten. Alternatively, low resistance conductive materials such as aluminum and copper can be used. It is preferable to form the wiring from a low-resistance conductive material. can be done.

[0362] <Plug of Layer Including Oxide Semiconductor> As shown in the above embodiment, the area is in contact with the side surface of the conductor 240 that functions as a plug. Preferably, region 241 is formed. Region 241 is formed by insulating material 224, insulating material 280, and and is formed near the inner wall of an opening formed in the insulator 274. That is, the region 241 is , provided between the conductor 240 and the insulators 224, 280, and 274. If the upper surface of the insulator 274 is exposed when the region 241 is formed, the insulator A region 241 is also formed near the upper surface of the edge 274 .

[0363] Region 241 is formed near the sides of insulators 224, 280, and 274. Therefore, water or hydrogen may be released from the insulators 224, 280, and 274. This can prevent impurities from entering the oxide 230 through the conductor 240. In addition, by forming the region 241, the insulators 224, 280, and 274 are Therefore, the oxygen contained in the conductor 240 can be prevented from being absorbed by the conductor 240. The amount of hydrogen that diffuses from 0 to the conductor 242 and the oxide 230 can be reduced.

[0364] For example, the region 241 is formed by performing a nitrogen plasma treatment after forming an opening in which the conductor 240 is to be embedded. The side surfaces of the insulators 224, 280, and 274 are then formed by solid-phase nitriding. That's good.

[0365] As in the above embodiment, the transistor 200 is formed of the insulator 283 and the insulator 212. It is preferable that the insulator 216, the insulator 224, and the insulator 280 are sealed. It is preferable that the region 245 is formed near the interface with the insulator 283. are formed between the insulator 280, the insulator 224, and the insulator 216 and the insulator 283. This reduces the amount of hydrogen contained in the insulator 274 that is mixed into the insulator 280 and the like. This can be done.

[0366] Here, the conductor 240 penetrates the insulator 283, and the conductor 218 penetrates the insulator 212. However, as described above, the region 241 is provided in contact with the conductor 240, and the region 217 is provided in contact with the conductor 218. As a result, It is also possible to reduce hydrogen that gets mixed into the inside of the insulator 283 and the insulator 212. In this way, the insulator 283, the insulator 212, the region 241, and the region 217 form a transistor. 200 is sealed more reliably, and impurities such as hydrogen contained in the insulator 274 are sealed in the insulator 283. This can further reduce contamination from the outside.

[0367] Also, the insulators 216, 224, 280, 250, and 27 4 is a film formation method using a gas in which hydrogen atoms are reduced or removed, as shown in the previous embodiment. It is preferable that the insulators 216, 224, and 226 are formed by the method described above. 80, insulator 250, and insulator 274 may have reduced hydrogen concentrations.

[0368] As shown in FIG. 22, the insulator 216, the insulator 224, the insulator 280, and the insulator The body 274 includes a via that connects to the conductor 242, the conductor 240, and the conductor 218. As described above, the insulators 216, 224, and 280 are disposed. By reducing the hydrogen concentration in the insulator 274, the hydrogen is conducted through the conductor 240 and the conductor 218. The amount of hydrogen that diffuses into the dielectric 242 and the oxide 230 can be further reduced.

[0369] In this way, the hydrogen concentration in the silicon-based insulating film in the vicinity of the transistor 200 is reduced, and the hydrogen concentration in the silicon-based insulating film in the vicinity of the transistor 200 is reduced. The hydrogen concentration in the compound 230 can be reduced.

[0370] <Dicing line> In the following, a large-area substrate is divided into individual semiconductor elements to produce multiple semiconductor devices. Dicing lines (scribe lines, dividing lines) are provided when extracting chips. The following describes the method of cutting the wire. First, grooves (dicing lines) for dividing the semiconductor elements are formed on the substrate, and then the dicing In some cases, the substrate is cut at a grinding line and divided (divided) into a plurality of semiconductor devices.

[0371] Here, for example, as shown in FIG. 22, the area where the insulator 283 and the insulator 212 contact each other It is preferable to design the dicing line so that the dicing line overlaps the dicing line. In the vicinity of the region that will become the dicing line provided on the outer edge of the memory cell having the data buffer 200, 2, the insulator 280, the insulator 224, the insulator 222, the insulator 216, and the insulator 214. Provide an opening.

[0372] That is, the insulator 280, the insulator 224, the insulator 222, the insulator 216, and the insulator At an opening provided in the body 214, the insulator 212 and the insulator 283 come into contact with each other. In this case, the insulator 212 and the insulator 283 may be formed using the same material and the same method. The insulators 212 and 283 are provided using the same material and method, thereby improving adhesion. For example, it is preferable to use silicon nitride.

[0373] With this structure, the transistor 200 is surrounded by the insulator 212 and the insulator 283. The insulators 212 and 283 suppress the diffusion of oxygen, hydrogen, and water. Since the semiconductor element shown in this embodiment has a function of controlling the In addition, by dividing the substrate, even if it is processed into multiple chips, the chips can be easily cut from the side of the divided substrate. Therefore, it is possible to prevent impurities such as hydrogen or water from being mixed in and diffusing into the transistor 200. can.

[0374] In addition, this structure prevents excess oxygen in the insulator 280 and the insulator 224 from diffusing to the outside. Therefore, the excess oxygen in the insulator 280 and the insulator 224 can be prevented from The oxide is then efficiently applied to the transistor 200, forming the channel therein. The oxygen vacancies in the oxide in which the channel of the transistor 200 is formed are reduced by the use of the nitrogen atom. This allows the oxide in which the channel in the transistor 200 is formed to be formed. The oxide semiconductor can have a low density of defect states and stable characteristics. The fluctuation of the electrical characteristics of the transistor 200 can be suppressed and the reliability can be improved. do.

[0375] The above is a description of the configuration example. By using this configuration, In a semiconductor device using a transistor, the fluctuation of electrical characteristics is suppressed and the reliability is improved. Alternatively, a transistor including an oxide semiconductor having a large on-state current can be provided. Alternatively, a transistor including an oxide semiconductor and having a low off-state current can be provided. Alternatively, a semiconductor device with reduced power consumption can be provided. do.

[0376] [Storage device 2] An example of a memory device using a semiconductor device according to one embodiment of the present invention is shown in FIG. The memory device shown in FIG. 2 includes the transistor 200, the transistor 300, and the capacitor In addition to the semiconductor device having the capacitor 100 , a transistor 400 is also included.

[0377] The transistor 400 can control the second gate voltage of the transistor 200. For example, the first gate and the second gate of the transistor 400 are connected to the source and the diode. and connect the source of the transistor 400 and the second gate of the transistor 200. In this configuration, when the second gate of the transistor 200 is held at a negative potential, The first gate-source voltage and the second gate-source voltage of the transistor 400 are In the transistor 400, the second gate voltage and the first gate voltage Since the drain current at 0V is very small, the transistors 200 and Even if power is not supplied to the transistor 400, the negative potential of the second gate of the transistor 200 can be maintained for a long time. This allows the transistor 200 and the transistor 400 to be maintained for a certain period of time. A storage device having such a function is capable of retaining stored contents for a long period of time.

[0378] Therefore, in FIG. 23, the wiring 1001 is electrically connected to the source of the transistor 300. The wiring 1002 is electrically connected to the drain of the transistor 300. The wiring 1003 is electrically connected to one of the source and drain of the transistor 200. The wiring 1004 is electrically connected to the gate of the transistor 200, and the wiring 1006 is The back gate of the transistor 300 is electrically connected to the back gate of the transistor 200. The gate and the other of the source and drain of the transistor 200 are connected to the capacitor element 100. The wiring 1005 is electrically connected to one of the electrodes of the capacitor 100. The wiring 1007 is electrically connected to the source of the transistor 400. The wiring 1008 is electrically connected to the gate of the transistor 400. The wiring 1010 is electrically connected to the back gate of the transistor 400. Here, the wiring 1006, the wiring 1007, the wiring 1008, and wiring 1009 are electrically connected.

[0379] The storage device shown in FIG. 23 is arranged in a matrix, similar to the storage device shown in FIG. By doing so, a memory cell array can be configured. 0 can control the second gate voltages of the plurality of transistors 200. In particular, the number of transistors 400 is preferably smaller than the number of transistors 200. 22, the memory device shown in FIG. 23 includes a transistor 200 , and transistor 400 can be encapsulated with insulator 212 and insulator 283 .

[0380] <Transistor 400> Transistor 400 is formed in the same layer as transistor 200 and is fabricated in parallel. The transistor 400 functions as a first gate. Conductor 460 (conductor 460a and conductor 460b) serving as a second gate. A functional conductor 405 (conductor 405a and conductor 405b) and a gate insulating layer The insulator 222 functions as a gate insulator, and the insulator 450 and the oxide 43 having a channel forming region are 0c, a conductor 442a serving as a source, an oxide 443a, an oxide 431a, and and an oxide 431b, a conductor 442b functioning as a drain, an oxide 443b, and an oxide 432a, oxide 432b, and a conductor 440 (conductor 440) that functions as a plug. a, and conductor 440b), and an insulator that functions as a barrier insulating film for conductor 442 472 (insulator 472a and insulator 472b). A portion of the region 241 formed in the insulator 274 functions as a barrier layer for the conductor 440. do.

[0381] In the transistor 400, the conductor 405 is the same layer as the conductor 205. The oxide 431a and oxide 432a are the same layer as the oxide 230a. b, and oxide 432b are the same layer as oxide 230b. Oxide 443 is the same layer as oxide 243. Oxide 4 The oxide 30c is the same layer as the oxide 230c. The insulator 450 is the same layer as the insulator 250. The conductor 460 is in the same layer as the conductor 260. The conductor 440 is in the same layer as the conductor 24. 0. Insulator 472 is the same layer as insulator 272.

[0382] It should be noted that structures formed in the same layer can be formed simultaneously. For example, oxide 4 30c can be formed by processing an oxide film that will become oxide 230c.

[0383] The oxide 430c that functions as the active layer of the transistor 400 is the same as the oxide 230, etc. Similarly, oxygen vacancies are reduced, and impurities such as hydrogen and water are reduced. The threshold voltage of the transistor 400 is set to be greater than 0 V to reduce the off-current and to provide a second gate. The drain current when the first gate voltage and the first gate voltage are 0 V can be made very small. do.

[0384] The configuration, method, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The present invention can be used in appropriate combination with other structures, methods, etc.

[0385] (Embodiment 3) In this embodiment, a semiconductor device using an oxide according to one embodiment of the present invention will be described with reference to FIGS. 24 and 25. Transistors used as conductors (hereinafter sometimes referred to as OS transistors) and capacitive elements This section describes a storage device to which the OS is applied (hereinafter, sometimes referred to as an OS memory device). The OS memory device includes at least a capacitive element and an OS transistor that controls the charging and discharging of the capacitive element. The off-state current of the OS transistor is extremely small, so The memory device has excellent retention characteristics and can function as a non-volatile memory.

[0386] <Storage device configuration example> FIG. 24A shows an example of the configuration of an OS memory device. The memory device 1400 includes a peripheral circuit 141. 1, and a memory cell array 1470. The peripheral circuit 1411 includes a row circuit 1420, It includes a column circuit 1430, an output circuit 1440, and a control logic circuit 1460.

[0387] The column circuits 1430 include, for example, column decoders, precharge circuits, sense amplifiers, and write The precharge circuit has a function of precharging the wiring. The sense amplifier has a function of amplifying the data signal read from the memory cell. The above wiring is connected to the memory cells of the memory cell array 1470. The amplified data signal is output via an output circuit 1440 as a data signal. RDATA is output to the outside of the memory device 1400. For example, the memory device may have a row decoder, a word line driver circuit, etc., and may select a row to be accessed. do.

[0388] The storage device 1400 is supplied with a low power supply voltage (VSS) from the outside as a power supply voltage, and a peripheral circuit 14 11, and the high power supply voltage (VIL) for the memory cell array 1470. The storage device 1400 also receives control signals (CE, WE, RE), address signals, and The address signal ADDR and the data signal WDATA are input from the outside. The decoder and column decoder are input to the data decoder, and WDATA is input to the write circuit.

[0389] The control logic circuit 1460 processes input signals (CE, WE, RE) from the outside. It processes the row decoder and column decoder control signals and generates the row decoder and column decoder control signals. CE is the chip enable signal. where WE is a write enable signal and RE is a read enable signal. The signals processed by the control logic circuit 1460 are not limited to these. Instead, other control signals may be input as necessary.

[0390] The memory cell array 1470 includes a plurality of memory cells MC arranged in a matrix and a plurality of The wiring connecting the memory cell array 1470 and the row circuit 1420 is The number of lines is determined by the configuration of the memory cells MC, the number of memory cells MC in one row, etc. The number of wirings connecting the memory cell array 1470 and the column circuit 1430 is It is determined by the configuration of the recell MC, the number of memory cells MC in one row, etc.

[0391] In FIG. 24A, the peripheral circuit 1411 and the memory cell array 1470 are arranged on the same plane. However, the present embodiment is not limited to this. For example, As shown in FIG. 24B, a memory cell array 1470 is overlapped on a part of the peripheral circuit 1411. For example, the memory cell array 1470 may be provided so as to overlap the memory cell array 1470. A sense amplifier may be provided.

[0392] FIG. 25 illustrates an example of a memory cell configuration that can be applied to the above-mentioned memory cell MC.

[0393] [DOSRAM] 25A to 25C show examples of circuit configurations of memory cells in a DRAM. A DRAM using a one-transistor, one-capacitor type memory cell is called a DOSRAM. (Dynamic Oxide Semiconductor Random Acce. The memory cell 1471 shown in FIG. The transistor M1 has a gate (front end) and a capacitance element CA. The gate is a gate electrode (sometimes called a front gate) and a back gate.

[0394] A first terminal of the transistor M1 is connected to a first terminal of the capacitance element CA, and the transistor M The second terminal of the transistor M1 is connected to the wiring BIL, and the gate of the transistor M1 is connected to the wiring WOL. The back gate of the transistor M1 is connected to the wiring BGL. The second terminal of A is connected to the wiring CAL.

[0395] The wiring BIL functions as a bit line, and the wiring WOL functions as a word line. CAL functions as a wiring for applying a predetermined potential to the second terminal of the capacitive element CA. When writing and reading data, a low level potential is applied to the wiring CAL. The wiring BGL is preferably used for applying a potential to the back gate of the transistor M1. By applying an arbitrary potential to the wiring BGL, The threshold voltage of M1 can be increased or decreased.

[0396] In addition, the memory cell MC is not limited to the memory cell 1471, and the circuit configuration may be changed. For example, the memory cell MC can be configured as a memory cell 1472 shown in FIG. The back gate of the transistor M1 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell 1473 shown in FIG. A transistor M having a single gate structure, i.e., a transistor without a back gate The memory cell may be configured as 1.

[0397] When the semiconductor device described in the above embodiment is used for the memory cell 1471 or the like, The transistor 200 is used as M1, and the capacitance element 100 is used as the capacitance element CA. By using an OS transistor as the transistor M1, This means that the leakage current of the transistor M1 can be made very low. The frequency of memory cell refresh can be reduced by using resistor M1 for long-term retention. In addition, the refresh operation of the memory cells can be eliminated. In addition, since the leakage current is very low, the memory cells 1471, 1472, The memory cell 1473 can hold multi-level data or analog data.

[0398] In addition, in the DOSRAM, as described above, By providing a sense amplifier as described above, the bit line can be shortened. This reduces the bit line capacitance and the storage capacitance of the memory cell.

[0399] [NOSRAM] FIG. 25D to FIG. 25H show a circuit diagram of a gain cell type memory cell having two transistors and one capacitance element. FIG. 25D shows an example of a circuit configuration. The memory cell 1474 shown in FIG. 25D includes a transistor M2 and a transistor The transistor M2 has a front gate. In this specification, the term "gate" refers to a gate that is a semiconductor device that has a gate electrode and a back gate. A memory device having a gain cell type memory cell using an OS transistor as the transistor M2 , NOSRAM(Nonvolatile Oxide Semiconductor It is sometimes called RAM.

[0400] A first terminal of the transistor M2 is connected to a first terminal of the capacitance element CB, and the transistor M The second terminal of the transistor M2 is connected to the wiring WBL, and the gate of the transistor M3 is connected to the wiring WOL. The back gate of the transistor M2 is connected to the wiring BGL. The second terminal of the transistor M1 is connected to the wiring CAL. The first terminal of the transistor M2 is connected to the wiring R BL, the second terminal of the transistor M3 is connected to the line SL, and the second terminal of the transistor M The gate of 3 is connected to a first terminal of the capacitance element CB.

[0401] The wiring WBL functions as a write bit line, and the wiring RBL functions as a read bit line. The wiring WOL functions as a word line. The wiring CAL is connected to the second It functions as a wiring for applying a specific potential to the terminal. During the data read operation, a low level potential is applied to the wiring CAL. The wiring BGL is a wiring for applying a potential to the back gate of the transistor M2. By applying an arbitrary potential to the wiring BGL, The threshold voltage can be increased or decreased.

[0402] In addition, the memory cell MC is not limited to the memory cell 1474, and the circuit configuration may be appropriately changed. For example, the memory cell MC can be a memory cell 1475 shown in FIG. In addition, the back gate of the transistor M2 is connected to the wiring WOL instead of the wiring BGL. For example, the memory cell MC may be a memory cell 1476 shown in FIG. As shown in the figure, a transistor with a single gate structure, i.e., a transistor without a back gate, For example, the memory cell MC may be configured as shown in FIG. As shown in FIG. 5G, the wiring WBL and the wiring RBL are connected to one wiring BIL. The configuration may be such that the above-mentioned components are combined together.

[0403] When the semiconductor device described in the above embodiment is used for the memory cell 1474 or the like, The transistor 200 is used as M2, and the transistor 300 is used as M3. The capacitance element CB can be a capacitance element 100. By using an OS transistor, the leakage current of transistor M2 is made very low. This allows the written data to be held for a long time by the transistor M2. This reduces the frequency of refreshing the memory cells. In addition, the memory cell refresh operation can be eliminated. Since the resistance is extremely low, multi-value data or analog data can be stored in the memory cell 1474. The same is true for memory cells 1475 to 1477.

[0404] The transistor M3 is a transistor having silicon in the channel formation region (hereinafter The conductivity type of the Si transistor may be The Si transistor may be an n-channel type or a p-channel type. In some cases, the field effect mobility is higher than that of the read transistor. A Si transistor may be used as the transistor M3 that functions as the By using a Si transistor for transistor M3, a transistor Since the memory cell can be provided with a transistor M2, the area occupied by the memory cell can be reduced, and the memory device can be made more efficient. Integration can be achieved.

[0405] The transistor M3 may be an OS transistor. When OS transistors are used, the memory cell array 1470 is configured with only n-type transistors. A circuit can be constructed using the same.

[0406] FIG. 25H shows an example of a gain cell type memory cell having three transistors and one capacitor. The memory cell 1478 shown in FIG. 25H includes transistors M4 through M6 and a capacitance element C The memory cell 1478 has wirings BIL, RW L, WWL, BGL, and GNDL. The GNDL line is a low-level The memory cell 1478 is connected to a wiring R instead of the wiring BIL. It may be electrically connected to BL and WBL.

[0407] The transistor M4 is an OS transistor having a back gate. The back gate and gate of the transistor M4 are electrically connected to the wiring BGL. Alternatively, the transistor M4 may have a back gate. It's not necessary.

[0408] The transistors M5 and M6 are n-channel Si transistors or p-channel Alternatively, the transistors M4 to M6 may be OS transistors. In this case, the memory cell array 1470 is circuited using only n-type transistors. A path can be constructed.

[0409] When the semiconductor device described in the above embodiment is used for the memory cell 1478, the transistor M The transistor 200 is used as the transistor M4, and the transistors M5 and M6 are the transistors 300. The capacitance element CC can be a capacitance element 100. By using an OS transistor as the gate driver, the leakage current of transistor M4 is made very low. It can be made easier.

[0410] Note that the peripheral circuit 1411, the memory cell array 1470, and the like shown in this embodiment are The configuration is not limited to the above. The arrangement or functions of lines, circuit elements, etc. may be changed, deleted, or added as necessary. stomach.

[0411] The configuration, method, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The present invention can be used in appropriate combination with other structures, methods, etc.

[0412] (Embodiment 4) In this embodiment, a chip 1200 on which the semiconductor device of the present invention is mounted is shown in FIG. An example of the chip 1200 is shown. A plurality of circuits (systems) are implemented on the chip 1200. The technology of integrating multiple circuits (systems) onto a single chip is called system-on-chip (SCC). This is sometimes called System on Chip (SoC).

[0413] As shown in FIG. 26A, the chip 1200 includes a CPU (Central Processor). ing Unit) 1211, GPU (Graphics Processing Un) it) 1212, one or more analog calculation units 1213, one or more memory controllers controller 1214, one or more interfaces 1215, one or more network The circuit 1216 is a clock circuit.

[0414] The chip 1200 is provided with bumps (not shown), and as shown in FIG. A first surface of a printed circuit board (PCB) 1201 In addition, a plurality of bumps 1202 are provided on the back surface of the first surface of the PCB 1201. 1203.

[0415] The motherboard 1203 is provided with storage devices such as a DRAM 1221 and a flash memory 1222. For example, the DRAM 1221 may be provided with a DOSR as shown in the previous embodiment. For example, the flash memory 1222 may be The NOSRAM shown in FIG.

[0416] The CPU 1211 preferably has multiple CPU cores. It is preferable that the CPU 1211 and the GPU 1 have multiple GPU cores. Each of the CP 212 may have a memory for temporarily storing data. A memory common to U1211 and GPU1212 is provided on chip 1200. The memory may be the above-mentioned NOSRAM or DOSRAM. In addition, the GPU1212 is suitable for parallel calculation of large amounts of data, and is ideal for image processing and multiply-and-accumulate operations. The GPU 1212 can be used as an image processing circuit or the like using the oxide semiconductor of the present invention. By providing a multiply-and-accumulate circuit, image processing and multiply-and-accumulate operations can be performed with low power consumption. This will be possible.

[0417] In addition, the CPU 1211 and GPU 1212 are integrated on the same chip, The wiring between the CPU1211 and the GPU1212 can be shortened, and the Data transfer from the CPU 1211 to the GPU 1212, memory of the CPU 1211 and the GPU 1212 After data transfer between GPU1212 and calculation in GPU1212, the data is transferred from GPU1212 to CPU12. The calculation results can be transferred to 11 at high speed.

[0418] The analog calculation unit 1213 includes an A / D (analog / digital) conversion circuit and a D / A (digital The analog calculation unit 1213 has one or both of a digital / analog conversion circuit and a digital / analog conversion circuit. The multiply-and-accumulate circuit may be provided in the

[0419] The memory controller 1214 is a circuit that functions as a controller for the DRAM 1221. and a circuit that functions as an interface with the flash memory 1222.

[0420] The interface 1215 includes a display device, a speaker, a microphone, a camera, a The controller has an interface circuit for connecting to external devices such as a Such interfaces include computers, mobile phones, keyboards, and game controllers. USB (Universal Serial Bus), HDMI (registered trademark) High-Definition Multimedia Interface) There can be.

[0421] The network circuit 1216 is a LAN (Local Area Network) or the like. It may also have a circuit for network security. stomach.

[0422] The above circuits (systems) can be formed in the chip 1200 in the same manufacturing process. Therefore, even if the number of circuits required for the chip 1200 increases, the manufacturing process can be increased. This eliminates the need for a soldering process, and the chip 1200 can be produced at low cost.

[0423] A PCB 1201 on which a chip 1200 having a GPU 1212 is provided, a DRAM 122 1, and the motherboard 1203 on which the flash memory 1222 is provided is a GPU module. It can be called module 1204.

[0424] The GPU module 1204 includes a chip 1200 using SoC technology. Its size can be reduced. Also, its excellent image processing capabilities make it a smart device. Phones, tablet devices, laptop PCs, portable (portable) game consoles, etc. It is suitable for use in portable electronic devices. Deep Neural Networks (DNNs), Convolutional Neural Networks (CNN), Recurrent Neural Network (RNN), Autoencoder, Deep Boltzmann It can perform operations such as deep belief networks (DBM) and deep belief networks (DBN). Therefore, the chip 1200 is an AI chip, or the GPU module 1204 is an AI system module. It can be used as a module.

[0425] The configuration, method, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The present invention can be used in appropriate combination with other structures, methods, etc.

[0426] (Embodiment 5) In this embodiment mode, an application example of a memory device using the semiconductor device described in the above embodiment will be described. The semiconductor device described in the above embodiment is used in, for example, various electronic devices (e.g., Terminals, computers, smartphones, e-book readers, digital cameras (including video cameras) The present invention can be applied to storage devices such as video recorders, video recorders, and navigation systems. Here, the computer refers to a tablet computer, a notebook computer, or This includes desktop computers as well as large computers such as server systems. Alternatively, the semiconductor device according to the above embodiment may be used in a memory card (e.g., D card), USB memory, SSD (Solid State Drive) and other removable media This is applied to removable storage devices. Figure 27 shows some configuration examples of removable storage devices. For example, the semiconductor device shown in the above embodiment is a packaged memory chip. It is processed into a format and used in various storage devices and removable memory.

[0427] FIG. 27A is a schematic diagram of a USB memory. The USB memory 1100 includes a housing 1101, The device includes a cap 1102, a USB connector 1103, and a board 1104. The board 1104 includes , are housed in a housing 1101. For example, the substrate 1104 includes a memory chip 1105, The controller chip 1106 is attached to the memory chip 110 on the board 1104. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 5 or the like.

[0428] FIG. 27B is a schematic diagram of the external appearance of an SD card, and FIG. 27C is a schematic diagram of the internal structure of an SD card. The SD card 1110 includes a housing 1111, a connector 1112, and a board 111. The substrate 1113 is housed in a housing 1111. For example, the substrate 1113 has , memory chip 1114, and controller chip 1115 are attached to the board 11. By providing a memory chip 1114 on the back side of the SD card 1110, the capacity of the SD card 1110 can be increased. In addition, a wireless chip having a wireless communication function may be provided on the substrate 1113. This allows the memory chip to communicate with the host device and the SD card 1110 wirelessly. The data in the memory chip 1114 on the substrate 1113 can be read and written. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 114 or the like.

[0429] FIG. 27D is a schematic diagram of the external appearance of an SSD, and FIG. 27E is a schematic diagram of the internal structure of the SSD. The SSD 1150 includes a housing 1151, a connector 1152, and a board 1153. The board 1153 is housed in the housing 1151. For example, the board 1153 includes a memory chip. A chip 1154, a memory chip 1155, and a controller chip 1156 are installed. The memory chip 1155 is a working memory for the controller chip 1156, for example, An OSRAM chip can be used. A memory chip 1154 is also provided on the back side of the substrate 1153. By doing so, the capacity of the SSD 1150 can be increased. The semiconductor device described in the above embodiment can be incorporated into the semiconductor device 1154 or the like.

[0430] The configuration, method, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The present invention can be used in appropriate combination with other structures, methods, etc.

[0431] (Embodiment 6) In this embodiment, specific examples of electronic devices that can be used with the semiconductor device of one embodiment of the present invention will be described. This will be explained with reference to FIG.

[0432] More specifically, the semiconductor device according to one embodiment of the present invention includes a processor such as a CPU or a GPU. FIG. 28 shows a CPU or GP according to one embodiment of the present invention. Specific examples of electronic devices equipped with processors or chips such as U are given below.

[0433] <Electronic equipment and systems> A GPU or chip according to an embodiment of the present invention can be installed in various electronic devices. Examples of electronic devices include television sets, desktop or notebook computers, etc. Personal computers, computer monitors, digital signage tal Signage, large game machines such as pachinko machines, etc. In addition to electronic devices with large screens, digital cameras, digital video cameras, digital photos, Examples of the optical fiber include frames, mobile phones, portable game machines, personal digital assistants, and audio playback devices. Furthermore, by providing an integrated circuit or chip according to one embodiment of the present invention in an electronic device, It is possible to equip child devices with artificial intelligence.

[0434] The electronic device according to one embodiment of the present invention may include an antenna. By doing so, it is possible to display images and information on the display unit. And if a secondary battery is included, the antenna may be used for contactless power transmission.

[0435] The electronic device according to one embodiment of the present invention includes a sensor (force, displacement, position, velocity, acceleration, angular velocity, rotation Numbers, distance, light, liquids, magnetism, temperature, chemicals, sound, time, hardness, electric field, current, voltage, power (including the ability to measure radiation, flow rate, humidity, gradient, vibration, odor or infrared rays) It may have.

[0436] The electronic device according to one embodiment of the present invention can have various functions. Functions for displaying still images, videos, text images, etc. on the display, touch panel function, calendar Functions such as displaying date or time, running various software (programs) a function to read out a program or data recorded on a recording medium; It can have functions, etc. FIG. 28 shows an example of an electronic device.

[0437] [mobile phone] FIG. 28A illustrates a mobile phone (smartphone), which is a type of information terminal. The information terminal 5500 includes a housing 5510 and a display unit 5511. As a user interface, a touch panel is provided on the display unit 5511, and buttons are provided on the housing 5510. It is prepared.

[0438] The information terminal 5500 uses artificial intelligence by applying the chip according to one embodiment of the present invention. It can run applications that use artificial intelligence. For example, an application that recognizes a conversation and displays the conversation content on the display unit 5511. The display unit 5511 recognizes characters, figures, etc. input by the user on the touch panel. The application to be displayed on the display unit 5511 and the application to perform biometric authentication such as fingerprint or voiceprint are displayed. Applications, etc.

[0439] [Information terminal 1] FIG. 28B shows a desktop information terminal 5300. The information terminal 5300 includes a main body 5301 of the information terminal, a display 5302, and a keyboard 5303. 303.

[0440] The desktop information terminal 5300 is similar to the information terminal 5500 described above. By applying the chip of the present invention, it is possible to execute applications using artificial intelligence. Examples of applications that use artificial intelligence include design support software. , writing correction software, automatic menu generation software, etc. By using the laptop 5300, it is possible to develop new artificial intelligence.

[0441] In the above description, a smartphone and a desktop information terminal are used as examples of electronic devices. As shown in Figs. 28A and 28B, the smartphone and desktop It can be applied to information terminals other than information terminals. Smartphones and desktop Examples of information terminals other than information terminals include PDAs (Personal Digital Assistants). Assistant, notebook type information terminal, workstation, etc.

[0442] [electric appliances] FIG. 28C shows an electric refrigerator-freezer 5800, which is an example of an electric appliance. The refrigerator 5800 includes a housing 5801, a door for a refrigerator compartment 5802, a door for a freezer compartment 5803, and the like.

[0443] By applying the chip of one embodiment of the present invention to the electric refrigerator-freezer 5800, artificial intelligence By utilizing artificial intelligence, The Electric Freezer Refrigerator 5800 is a refrigerator that can store food and drink. It also has a function to automatically generate menus based on the expiration date of ingredients, and a function to automatically generate menus based on the expiration date of ingredients, and the It can also have a function to automatically adjust the temperature to suit the ingredients being cooked.

[0444] In this example, an electric refrigerator-freezer is described as an electrical appliance, but other electrical appliances may also be used. Examples include vacuum cleaners, microwave ovens, electric ovens, rice cookers, water heaters, and induction cookers. , water servers, heating and cooling appliances including air conditioners, washing machines, dryers, Examples include audiovisual equipment.

[0445] [Game consoles] FIG. 28D shows a portable game machine 5200, which is an example of a game machine. The mobile phone 5200 includes a housing 5201, a display portion 5202, a button 5203, and the like.

[0446] By applying a GPU or chip according to one embodiment of the present invention to the portable game console 5200, It is possible to realize a portable game machine 5200 with low power consumption. In addition, the low power consumption allows: Since heat generation from the circuit can be reduced, the circuit itself, peripheral circuits, and The impact on the module can be reduced.

[0447] Furthermore, by applying a GPU or chip according to one embodiment of the present invention to the portable game machine 5200, This makes it possible to realize a portable game machine 5200 having artificial intelligence.

[0448] Originally, the game progress, the behavior of the creatures that appear in the game, the phenomena that occur in the game, etc. The expression is determined by the program that the game has, but the portable game machine 520 By applying artificial intelligence to 0, it is possible to express things in ways that are not limited to game programs. For example, the content of the player's questions, the game progress, the time, the characters that appear in the game, This makes it possible to express things such as a person's behavior changing as they change.

[0449] In addition, when playing a game that requires multiple players on the portable game machine 5200, the artificial intelligence This allows you to create anthropomorphic game players, so you can make your opponents artificially intelligent. By making the game a game player, you can play the game by yourself.

[0450] In FIG. 28D, a portable game machine is illustrated as an example of a game machine. The game machine to which the GPU or chip of the present invention is applied is not limited to this. Examples of game machines to which the chips can be applied include home game machines, entertainment facilities, etc. Arcade game machines installed in facilities (game centers, amusement parks, etc.), and sports facilities Examples of equipment include a pitching machine for batting practice.

[0451] [Mobile object] The GPU or chip of one embodiment of the present invention is used in automobiles, which are moving objects, and in the vicinity of the driver's seat of the automobile. can be applied to.

[0452] FIG. 28E1 shows an automobile 5700 as an example of a moving object, and FIG. 28E2 shows the interior of the automobile. FIG. 28E2 shows the area around the windshield in the vehicle. In addition to the display panels 5701, 5702, and 5703, An attached display panel 5704 is shown.

[0453] The display panels 5701 to 5703 display a speedometer, a tachometer, It provides various information by displaying the distance traveled, fuel gauge, gear status, air conditioning settings, etc. In addition, the display items and layout displayed on the display panel can be customized by the user. It can be changed as needed to suit your taste, making it possible to enhance the design. The panels 5701 to 5703 can also be used as lighting devices.

[0454] The display panel 5704 displays images from an imaging device (not shown) installed in the automobile 5700. By projecting images, it is possible to compensate for blind spots that are blocked by pillars. That is, by displaying an image from an imaging device provided on the outside of the automobile 5700, This can compensate for blind spots and increase safety. By doing so, the driver can check for safety more naturally and without feeling uneasy. 4 can also be used as a lighting device.

[0455] The GPU or chip of one embodiment of the present invention can be applied as a component of artificial intelligence, e.g. For example, the chip can be used in the autonomous driving system of the 5700 automobile. The chip can be used in systems that provide road guidance, risk prediction, etc. Display panel 57 The display panels 5701 to 5704 are configured to display information such as road guidance and risk prediction. Good too.

[0456] In the above description, an automobile is used as an example of a moving object. For example, the moving object may be a train, a monorail, a ship, an aircraft (helicopter, etc.) These include drones, unmanned aerial vehicles (drones), airplanes, and rockets. Applying the chip of one embodiment of the present invention to a moving object and providing a system using artificial intelligence can be done.

[0457] [Broadcasting System] The GPU or chip according to one embodiment of the present invention can be applied to a broadcasting system.

[0458] FIG. 28F shows a schematic diagram of data transmission in a broadcasting system. 28F is the signal transmitted from broadcasting station 5680 to the television receiver in each home. The diagram shows the path of the signal until it reaches the TV 5600, which is equipped with a receiving device. A broadcast signal received by an antenna 5650 is transmitted via the receiving device (not shown). Transmitted to TV5600.

[0459] In FIG. 28F, antenna 5650 is a UHF (Ultra High Frequency cy) antenna is shown, but as antenna 5650, it is a BS·110°CS antenna. It can also be used for antennas and CS antennas.

[0460] Radio waves 5675A and 5675B are broadcast signals for terrestrial broadcasting, and radio tower 5670 The received radio wave 5675A is amplified and radio wave 5675B is transmitted. By receiving radio waves 5675B with the Na5650, you can watch terrestrial TV broadcasts with the TV5600. The broadcasting system is not limited to the terrestrial broadcasting shown in FIG. 28F, but may be an artificial satellite broadcasting system. It may also be satellite broadcasting using stars, or data broadcasting via optical fiber lines.

[0461] The above-mentioned broadcasting system applies the chip according to one embodiment of the present invention to broadcast programs using artificial intelligence. The broadcasting station 5680 transmits broadcast data to the TV 5600 in each home. When the encoder is turned on, the broadcast data is compressed, and the antenna 5650 receives the broadcast data. When the data is received, the decoder of the receiving device included in the TV 5600 converts the broadcast data into By using artificial intelligence, for example, the compression method of the encoder can be improved. In motion compensation prediction, which is one of the methods, the recognition of display patterns contained in the displayed image It is also possible to perform intraframe prediction using artificial intelligence. For example, low-resolution broadcast data is received and the high-resolution TV5600 displays that broadcast data. When displaying the image, the decoder restores the broadcast data by performing up-conversion, etc. Image interpolation can be performed.

[0462] The AI-based broadcasting system described above is expected to be useful in the future, as the amount of broadcast data increases. It is suitable for revision (UHDTV: 4K, 8K) broadcasting.

[0463] In addition, as an application of artificial intelligence on the TV5600 side, for example, A recording device having the above-mentioned function may be provided. By having artificial intelligence learn the user's preferences, the system can automatically record programs that match the user's preferences. It is possible to draw

[0464] Electronic device described in the present embodiment, functions of the electronic device, application examples of artificial intelligence, and effects thereof etc. can be appropriately combined with the descriptions of other electronic devices.

[0465] The configuration, method, etc. shown in this embodiment may be used in conjunction with the configurations, methods, etc. shown in other embodiments and examples. The present invention can be used in appropriate combination with other structures, methods, etc. EXAMPLES

[0466] In this example, samples 1A, 1B, and 1C having the structures shown in FIG. 29 were fabricated. We then explain the results of analyzing these samples.

[0467] The structure shown in FIG. 29 includes a silicon substrate 10 and a silicon oxide film 12 on the silicon substrate 10. The silicon oxynitride film 14 on the silicon oxide film 12 and the oxide on the silicon oxynitride film 14 A silicon oxynitride film 18 and a silicon oxynitride film 20 on the silicon oxynitride film 18 are provided. Here, the silicon oxynitride film 14 has a nitride layer near the interface with the silicon oxynitride film 18. The region 16 is formed. The silicon oxynitride film 20 contains deuterium D. In Sample 1A, the nitrided region 16 is not formed. In Sample 1B and Sample 1C, the nitrided region 16 is However, the method for forming the nitrided region 16 is different.

[0468] First, the methods for fabricating Samples 1A, 1B, and 1C will be described.

[0469] First, in the samples 1A, 1B, and 1C, the silicon substrate 10 was thermally oxidized to form silicon. A silicon oxide film 12 was formed on the surface of a silicon substrate 10 to a target thickness of 100 nm.

[0470] Next, a 150 nm thick film was formed on each of Samples 1A, 1B, and 1C by using the PECVD method. The silicon oxynitride film 14 was formed with the aim of achieving the above. 4 Gas 5sccm and N 2 The deposition pressure was set to 133.3 Pa, and the deposition power was set to 1000 sccm. The power was 45 W (13.56 MHz), the substrate temperature was 325°C, and the electrode distance was 20 mm. Ta.

[0471] Next, the samples 1B and 1C were subjected to microwave treatment using a microwave treatment device. The microwave treatment was performed with 1000 sccm Ar gas and N 2 Gas 200 The pressure was 12 Pa, the power was 1200 W, and the processing temperature was 400° C. Here, the treatment time for sample 1B was 300 seconds, and the treatment time for sample 1C was 1800 seconds. As a result, a nitride region was formed near the surface of the silicon oxynitride film 14 of each of the samples 1B and 1C. The region 16 is formed. Note that the microwave treatment was not performed on the sample 1A, so the nitrogen The oxidized region 16 is not formed.

[0472] Next, the same film formation conditions as those for the silicon oxynitride film 14 were applied to the samples 1A, 1B, and 1C. Under these conditions, a silicon oxynitride film 18 was formed with a target thickness of 50 nm.

[0473] Next, a 50 nm thick film was formed on each of Samples 1A, 1B, and 1C by using the PECVD method. The silicon oxynitride film 20 was formed with the aim of forming the film. 4 Gas 2sccm, N 2 O gas 800sccm, and D 2 Dilution gas was 200 sccm, and the deposition pressure was 20 0 Pa, the deposition power was 150 W (60 MHz), the substrate temperature was 160° C., and the gap between the electrodes was The distance was set to 35 mm. 2 The dilution gas is based on Ar gas, and 2 Gas is 5 % diluted gas.

[0474] The samples 1A to 1C were prepared using the Hitachi High-Technologies Corporation "HD-2700". Cross-sectional STEM images were taken with an acceleration voltage of 200 kV, and energy dispersive X-ray Spectroscopy (EDX: Energy Dispersive X-ray spectroscopy) Analysis was performed using a copy system.

[0475] In the samples 1A to 1C, the silicon oxynitride film 14 and the silicon oxynitride film 18 are The cross-sectional STEM images of the adjacent regions are shown in Figures 30A to 30C. As shown in Figure 30A, In the sample 1A, which was not subjected to the treatment, a nitrided region 16 was formed in the vicinity of the interface of the silicon oxynitride film 14. In contrast, as shown in Fig. 30B and Fig. 30C, In the vicinity of the interface of the silicon oxynitride film 14 of each of the samples 1B and 1C, a nitride region In sample 1B, the thickness of the nitrided region 16 was about 1.7 nm, and in sample 1C, In the case of the nitridation, the thickness of the nitrided region 16 was about 1.8 nm. Regardless of the thickness, the thickness of the nitrided region 16 was approximately the same.

[0476] Next, the silicon oxynitride film 14 (1A-14) of the sample 1A and the nitrided region (1B -16), silicon oxynitride film 14 (1B-14) of sample 1B, and nitrided region (1 C-16), and silicon oxynitride film 14 of sample 1C (1C-14) The results are shown in Figure 31. Figure 31 is a bar graph showing the quantitative value of nitrogen [atomic %]. .

[0477] In the samples 1B and 1C, the nitrogen concentration in the nitride region 16 was 4, and the surface of the silicon oxynitride film 14 is nitrided by the microwave treatment. This tendency is more pronounced in sample 1C, which was treated with microwaves for a longer time, than in sample 1B. It was noticeable.

[0478] Next, samples having the same structure as samples 1A to 1C were subjected to annealing at 400° C. for 1 hour in a nitrogen atmosphere. In this way, Samples 1D to 1F were fabricated by subjecting the substrate to a heat treatment for 1 h.

[0479] Samples 1A to 1F thus prepared were subjected to SIMS analysis. The diffusion of deuterium D contained in the silicon film 20 was investigated. 1D deuterium D concentration [atoms / cm 3 ] in Fig. 32B for Sample 1B and Sample 1E. Deuterium D concentration [atoms / cm 3 ] is shown in Fig. 32C. Concentration of D [atoms / cm 3 Samples 1A to 1F were analyzed by SIMS. The analysis was carried out from the silicon substrate 10 side, and the adhesive was applied to the silicon oxynitride film 20. The dashed lines in the SIMS graphs shown in FIGS. 32A to 32C indicate the lower limit of measurement. The quantitative layer is made up of a silicon oxynitride film 14, a silicon oxynitride film 18, and an oxide This is a silicon nitride film 20 .

[0480] As shown in FIG. 32A, in the samples 1A and 1D, deuterium D was added to the silicon oxynitride film. 14, which is particularly noticeable in sample 1D that was heat-treated. As shown in Figs. 2B and 32C, in samples 1B, 1C, 1E and 1F, oxidation At the interface between the silicon nitride film 18 and the silicon oxynitride film 14, i.e., the nitrided region 16, The concentration of deuterium D is significantly reduced. It can be seen that deuterium D contained in the silicon film 20 is blocked by the nitride region 16.

[0481] As described above, by forming a nitride region in a silicon oxynitride film by microwave treatment, As a result, a layer having a barrier property against hydrogen can be formed. By using the oxide semiconductor as described in the embodiment, hydrogen diffusion into the oxide semiconductor can be reduced. In this way, an oxide semiconductor in which impurities such as hydrogen are sufficiently reduced can be used for a transistor. By using it in the channel formation region, it is possible to achieve normally-off characteristics, and stable electrical It is possible to improve the reliability while providing the desired characteristics. EXAMPLES

[0482] In this embodiment, a tantalum nitride film formed on a silicon substrate was etched in an atmosphere containing nitrogen. The results of measuring the resistivity of the microwave-treated samples 2A to 2I are described below. Reveal.

[0483] First, the manufacturing methods of Samples 2A to 2I will be described.

[0484] First, in each of Samples 2A to 2I, the silicon substrate is thermally oxidized, and the surface of the silicon substrate is A silicon oxide film was formed with a target thickness of 100 nm.

[0485] Next, samples 2A to 2I were subjected to a DC sputtering method to form a film having a thickness of 20 nm. In the deposition of the tantalum nitride film, a tantalum target was used. The deposition gas used was argon gas at 50 sccm and nitrogen gas at 10 sccm. The deposition pressure was set at 0 The pressure was 0.6 Pa, the deposition power was 1000 W, the substrate temperature was room temperature, and the target-substrate distance was 0.5 mm. The distance was set to 60 mm.

[0486] Next, the samples 2B to 2I were subjected to microwave treatment using a microwave treatment device. The microwave treatment was performed with 1000 sccm Ar gas and N 2 Gas 200s ccm, the power was 1200 W, and the treatment temperature was 400°C. The pressure and time of the microwave treatment for sample 2I were set as shown in Table 1 below.

[0487] [Table 1]

[0488] The sheet resistance of the tantalum nitride film was measured for the prepared samples 2A to 2I. The results are shown in Figures 33A and 33B. Figure 33A shows the results of the experiment with different pressure conditions with the treatment time fixed at 5 minutes. FIG. 33B is a graph comparing samples 2A to 2F, and FIG. 33C is a graph comparing the samples 2A to 2F, and FIG. This is a graph comparing samples 2A, 2G, 2B, 2H, and 2I with different treatment time conditions. In both Figs. 33A and 33B, the resistivity [Ωcm] is plotted on the vertical axis. 2.0×10 -3 The dotted line is drawn at Ωcm, which is the same as the trace shown in the above embodiment. In a transistor, this is a target value for the resistivity of the source electrode and the drain electrode.

[0489] As shown in FIG. 33A, in the samples 2B to 2F that were subjected to the microwave treatment, A slight increase in resistivity was observed compared to sample 2A, which was not subjected to wave treatment, but the resistivity was approximately the same. In addition, the resistivity of samples 2B to 2F was dependent on the pressure of microwave treatment. No gender was observed.

[0490] As shown in FIG. 33B, in the samples 2G, 2B, 2H, and 2I that were subjected to microwave treatment, the resistance The resistivity tended to increase with treatment time. However, samples 2G, 2B, 2H, and 2 The resistivity of I is 2.0×10 -3 The value was sufficiently low for Ωcm.

[0491] In this way, when the nitrided region is formed in the silicon oxynitride film, the source electrode and the drain electrode are The nitrided silicon used for the source and drain electrodes remains stable even when the silicon electrodes are exposed to microwave treatment. It was shown that the resistivity of tantalum does not increase significantly. By using it for the source and drain electrodes, the nitride region is formed in the silicon oxynitride film, and then the source and drain electrodes are Since no special post-treatment is required for the electrode and drain electrode, the productivity of the semiconductor device is improved. It is possible to aim higher. EXAMPLES

[0492] In this embodiment, samples 3A to 3H having the structure shown in FIG. 29 in the first embodiment are The results of the analysis of the samples prepared are as follows. The conditions for forming the nitrided region 16 are different from those of Samples 1A to 1F.

[0493] As in the first embodiment, the structure shown in FIG. 29 includes a silicon substrate 10 and a A silicon oxide film 12, a silicon oxynitride film 14 on the silicon oxide film 12, and a silicon oxynitride film A silicon oxynitride film 18 on the silicon film 14 and a silicon oxynitride film 19 on the silicon oxynitride film 18 are The silicon oxynitride film 14 is a silicon oxynitride film 18. The nitride region 16 is formed in the vicinity of the interface with the silicon oxynitride film 20. In addition, the nitrided region 16 is not formed in the samples 3A and 3E. In B, sample 3C, sample 3D, sample 3F, sample 3G, and sample 3H, the nitrided region 16 was formed. However, the conditions for forming the nitrided region 16 are different.

[0494] First, the manufacturing methods of Samples 3A to 3H will be described.

[0495] First, in each of the samples 3A to 3H, the silicon substrate 10 is thermally oxidized. A silicon oxide film 12 was formed on the silicon substrate 10 with a target thickness of 100 nm.

[0496] Next, samples 3A to 3H were oxidized using the PECVD method to a thickness of 150 nm. A silicon nitride film 14 was formed. The film formation gas was SiH 4 Gas 5sccm and N 2 Oga The deposition pressure was 133.3 Pa, and the deposition power was 45 W (13. The operating frequency was set to 56 MHz, the substrate temperature was set to 325° C., and the electrode distance was set to 20 mm.

[0497] Next, using a microwave processing device, Sample 3B, Sample 3C, Sample 3D, Sample 3F, Microwave treatment was performed on samples 3G and 3H. r gas 1000sccm and N 2 Gas was 200sccm and power was 1200W. The treatment temperature was 400° C. and the treatment time was 300 seconds. The pressure for specimen 3C and specimen 3G was 12 Pa, the pressure for specimen 3D and specimen 3G was 60 Pa, The pressure of sample 3H was set to 400 Pa. As a result, samples 3B, 3C, 3D, and The nitrided region 16 is formed near the surface of the silicon oxynitride film 14 in each of Samples 3F, 3G, and 3H. Note that, since the microwave treatment was not performed on Sample 3A and Sample 3E, Thus, the nitrided region 16 is not formed.

[0498] Next, a silicon oxynitride film having a thickness of 50 mm was formed on each of the samples 3A to 3H under the same film forming conditions as those for the silicon oxynitride film 14. A silicon oxynitride film 18 was formed with a thickness of 100 nm.

[0499] Next, samples 3A to 3H were treated with oxynitride to a thickness of 50 nm using the PECVD method. A silicon hydride film 20 was formed. The film forming gas was SiH 4 Gas 2sccm, N 2 O gas 80 0sccm, and D 2 The dilution gas was 200 sccm, the deposition pressure was 200 Pa, and the deposition The membrane power was 150 W (60 MHz), the substrate temperature was 160°C, and the electrode distance was 35 mm. In addition, D 2 The dilution gas is based on Ar gas, and 2 Gas diluted to 5% It's gas.

[0500] Next, Samples 3E, 3F, 3G, and 3H were heated for 40 Heat treatment was carried out at 0°C for 8 hours.

[0501] Samples 3A to 3H thus prepared were subjected to SIMS analysis. The diffusion of deuterium D contained in the silicon film 20 was examined. Deuterium D concentration [atoms / cm 3 ], and the deuterium oxide of Samples 3E to 3H in FIG. Concentration of element D [atoms / cm 3 Samples 3A to 3H were analyzed by SIMS. The analysis was carried out from the silicon substrate 10 side, and the adhesive was applied to the silicon oxynitride film 20. The dashed lines in the SIMS graphs shown in FIGS. 34A and 34B indicate the lower limit of measurement. The quantitative layer is a silicon oxide film 12, a silicon oxynitride film 14, and a silicon oxynitride film 15. the silicon oxide nitride film 20 .

[0502] As shown in FIG. 34A, in the samples 3B to 3D, which were not subjected to high-temperature heat treatment for a long period of time, Regardless of the pressure of the microwave treatment, deuterium D contained in the silicon oxynitride film 20 is converted into the nitride region. In contrast, as shown in FIG. 34B, when the high-temperature heat treatment is performed for a long time, In the samples 3F to 3H, which were subjected to the above-mentioned test, the nitrided region 16 was not formed, but the nitrided region 16 was not formed in the sample 3E. Deuterium D contained in the silicon oxynitride film 20 is blocked by the nitride region 16. The blocking ability is dependent on the microwave treatment pressure. The diffusion of deuterium D in sample 3G at a pressure of 400 Pa is suppressed more than that in sample 3H at a pressure of 400 Pa. The diffusion of deuterium D in sample 3F at a pressure of 12 Pa is suppressed more than in sample 3G at a pressure of 60 Pa. .

[0503] As described above, by lowering the pressure during microwave treatment, the nitride region is formed in the silicon oxynitride film. By forming such a region, the barrier property against hydrogen can be improved. By using the nitrided region as described in the above embodiment, in the manufacturing process of the semiconductor device, Therefore, hydrogen diffusion into the oxide semiconductor can be reduced even when high-temperature heat treatment is performed for a long period of time. In this way, an oxide semiconductor in which impurities such as hydrogen are sufficiently reduced can be used for a transistor. By using it in the channel formation region, it is possible to achieve normally-off characteristics, and stable electrical It is possible to improve the reliability while providing the desired characteristics. EXAMPLES

[0504] In this example, samples 4A and 4B having the structures shown in FIG. 35 were fabricated. The results of the analysis of the samples are described below.

[0505] The structure shown in FIG. 35 includes a silicon substrate 30 and a silicon oxide film 32 on the silicon substrate 30. A silicon oxide film 34 on the silicon oxide film 32 and a silicon nitride film on the silicon oxide film 34 are formed. In the sample 4B, the silicon oxide film 34 is made of silicon nitride. The nitrided region 36 is formed near the interface with the silicon film 38. 6 is not formed.

[0506] First, a method for fabricating Samples 4A and 4B will be described.

[0507] First, in the samples 4A and 4B, the silicon substrate 30 was thermally oxidized. A silicon oxide film 32 was formed on the surface with a target thickness of 100 nm.

[0508] Next, specimens 4A and 4B were subjected to RF sputtering to a thickness of 100 nm. The silicon oxide film 34 was formed by the deposition of SiO 2 (Anhydrous The deposition gas was oxygen gas at 50 sccm, and the deposition pressure was 0.7 Pa (measured using a Canon Anelva miniature gauge MG-2). The deposition power was 1500 W, the substrate temperature was 170°C, and the target-substrate distance was 60 m. The value was m.

[0509] Next, the sample 4B was subjected to microwave treatment using a microwave treatment device. The treatment was performed with 1000 sccm Ar gas and N 2 Gas 200sccm The power is 1200W, the treatment temperature is 400°C, the pressure is 12Pa, and the treatment time is 3 As a result, a nitride region 36 was formed in the vicinity of the surface of the silicon oxide film 34 of the sample 4B. In addition, since the microwave treatment was not performed on the sample 4A, the nitrided region 3 6 is not formed.

[0510] Next, specimens 4A and 4B were nitrided using the PECVD method to a thickness of 20 nm. A silicon film 38 was formed. The film forming gas was SiH 4 Gas 5sccm, and N 2 Gas 2 The deposition pressure was 100 Pa, and the deposition power was 250 W (13.56 M Hz), the substrate temperature was 350° C., and the distance between the electrodes was 20 mm. Samples 4A and 4B are exposed to a large amount of hydrogen generated within the chamber.

[0511] Samples 4A and 4B were analyzed by SIMS. It was confirmed whether hydrogen was diffused into the silicon oxide film 34 during the formation of the silicon film 38. Hydrogen H concentration [atoms / cm 3 In addition, Sample 4A and For sample 4B, SIMS analysis was performed from the silicon substrate 30 side. An adhesive is formed on the film 38. The dashed line in the SIMS graph shown in FIG. The quantitative layer is the silicon oxide film 34.

[0512] As shown in FIG. 36, hydrogen H diffuses up to the silicon oxide film 34 in the sample 4A. In contrast, in the sample 4B, the interface between the silicon nitride film 38 and the silicon oxide film 34, i.e. In particular, the concentration of hydrogen H is significantly reduced in the nitrided region 36. It can be seen that hydrogen is reduced in the nitrided region 36 during the formation of the silicon nitride film 38. .

[0513] As described above, the nitrided region is formed by microwave treatment, and the nitrided region is exposed. In this state, a deposition method that generates a large amount of hydrogen in the chamber, such as the PECVD method, is used. Even if the nitrided region is formed, hydrogen that diffuses inward from the nitrided region can be reduced. By using the region as described in the above embodiment, hydrogen diffusion into the oxide semiconductor can be reduced. In this way, it is possible to form an oxide semiconductor having a sufficiently reduced amount of impurities such as hydrogen. By using it in the channel formation region of a transistor, it is possible to achieve normally-off characteristics, It is possible to provide the semiconductor device with stable electrical characteristics and improved reliability.

[0514] The configurations, methods, and the like shown in this embodiment may be used in other embodiments and examples. The present invention can be used in appropriate combination with other configurations, structures, methods, etc. [Explanation of symbols]

[0515] 200: transistor, 200_n: transistor, 200_1: transistor, 205 : conductor, 205a: conductor, 205b: conductor, 210: insulator, 212: insulator, 2 14: insulator, 216: insulator, 217: region, 218: conductor, 222: insulator, 22 4: insulator, 230: oxide, 230a: oxide, 230A: oxide film, 230b: oxide , 230B: Oxide film, 230c: Oxide, 230C: Oxide film, 240: Conductor, 240a :Conductor, 240b:Conductor, 241:Area, 241a:Area, 241b:Area, 241 c: region, 242: conductor, 242a: conductor, 242A: conductive film, 242b: conductor, 242B: Conductor layer, 243: Oxide, 243a: Oxide, 243A: Oxide film, 243b :Oxide, 243B:Oxide layer, 244:Region, 244a:Region, 244b:Region, 24 5: area, 246: conductor, 246a: conductor, 246b: conductor, 250: insulator, 2 50A: insulating film, 255a: opening, 255b: opening, 260: conductor, 260a: conductor , 260Aa: conductive film, 260Ab: conductive film, 260b: conductor, 265: sealing part, 26 5a: sealing portion, 265b: sealing portion, 272: insulator, 272a: insulator, 272A: insulation Membrane, 272b: insulator, 272B: insulator layer, 274: insulator, 280: insulator, 281 : valve, 282: insulator, 283: insulator

Claims

[Claim 1] A first oxide; a first conductor having a region overlying the first oxide; a second conductor having a region overlying the first oxide; a first insulator having a region overlying the first conductor; a second insulator having a region overlying the second conductor; a second oxide having a region located above the first oxide and between the first conductor and the second conductor; a third insulator having a region overlying the second oxide; a third conductor having a region located above the third insulator; a fourth insulator having a region in contact with an upper surface of the first insulator, a region in contact with an upper surface of the second insulator, a region in contact with a side surface of the first conductor, and a region in contact with a side surface of the second conductor; a fourth conductor having a region in contact with a side surface of the fourth insulator and a region in contact with the first conductor; a fifth conductor having a region in contact with a side surface of the fourth insulator and a region in contact with the second conductor.

Images