Manufacturing device for display device

Abstract

To reduce a manufacturing cost of a display device that uses a micro LED as a display element, and manufacture a display device that uses a micro LED as a display element with high yield.SOLUTION: In a manufacturing method for a display device, a plurality of transistors are formed in a matrix on a substrate, and a conductor electrically connected to the transistors is formed on the substrate; a plurality of light-emitting elements is formed in the matrix on a film. Each light-emitting element has an electrode on one side, and the other side is in contact with the film; and a conductor and the electrode are opposite each other, and an extrusion mechanism is pushed from the film side to the substrate side to bring the conductor and the electrode into contact, thereby electrically connecting the conductor and the electrode.SELECTED DRAWING: Figure 9

Description

[Technical field]

[0001] One embodiment of the present invention relates to a display device, a manufacturing method of the display device, and an apparatus for manufacturing the display device.

[0002] Note that one embodiment of the present invention is not limited to the above technical fields. The technical field of one embodiment of the present invention is a semiconductor device, a display device, a light-emitting device, a power storage device, a storage device, and a , electronic device, lighting device, input device, input / output device, driving method thereof, or manufacturing method thereof The law can be cited as one example.

[0003] In this specification and the like, a semiconductor device is a device that can function by utilizing semiconductor characteristics. This refers to devices in general. Transistors, semiconductor circuits, arithmetic units, memory devices, etc. are all types of semiconductor devices. In addition, it is also used in imaging devices, electro-optical devices, power generation devices (thin-film solar cells, organic thin-film solar cells, etc.) etc.), and electronic devices may include semiconductor devices. [Background technology]

[0004] In recent years, the uses of display devices have become more diverse. For example, they are now used in portable information terminals, home televisions, and other devices. Television equipment (also known as television or television receiver), digital signage (Digital Signage) tal Signage: Electronic Signage, PID (Public Information Display devices are used in television displays (Television Displays). Representative display devices include Organic EL (Electro Luminescence) elements and light-emitting diodes (LEDs) A display device equipped with a light emitting element such as a light emitting diode (LED), a liquid crystal element and electronic paper that displays images using an electrophoretic method. In addition, the brightness required for display devices is increasing year by year so that they can withstand outdoor use. do.

[0005] A small LED (also called a micro LED) is used as the light-emitting element, and is connected to each pixel electrode. An active matrix type microcomputer uses transistors as switching elements to connect An LED display device is disclosed (Patent Document 1). As a switching element, a metal oxide (hereinafter, also called an oxide semiconductor) that exhibits semiconductor properties is used. Active matrix display devices using transistors as channel forming regions are known. (Patent Document 2 and Patent Document 3). [Prior art documents] [Patent documents]

[0006] [Patent Document 1] U.S. Patent Publication No. 2017 / 0179092 [Patent Document 2] JP 2007-123861 A [Patent Document 3] JP 2007-96055 A Summary of the Invention [Problem to be solved by the invention]

[0007] Display devices that use micro LEDs as display elements require a long process of mounting LEDs on a circuit board. This requires a lot of time, and reducing manufacturing costs is an issue. This increases the number of LEDs to be mounted and increases the time required for mounting. Also, the resolution of the display device The higher the value, the more difficult it is to implement the LED.

[0008] In view of the above, one aspect of the present invention is a manufacturing method and a manufacturing method for a display device using a micro LED as a display element. Another object of the present invention is to reduce costs. One of the objects of the present invention is to manufacture a display device using a black LED as a display element. One aspect of the present invention is a method for manufacturing a display device using a micro LED as a display element at low manufacturing cost. Another object of the present invention is to provide a manufacturing apparatus for a microcomputer with high yield. One of the objectives of the present invention is to provide a manufacturing apparatus for manufacturing a display device using a micro LED as a display element. Let us assume that.

[0009] An object of one embodiment of the present invention is to provide a display device with high luminance. An object of one embodiment of the present invention is to provide a display device with high contrast. An object of one embodiment of the present invention is to provide a display device with a high response speed. An object of one embodiment of the present invention is to provide a display device with low power consumption. An object of one embodiment of the present invention is to provide a display device that can be manufactured at low cost. An object of one embodiment of the present invention is to provide a display device with a long lifetime. An object of the present invention is to provide a novel display device.

[0010] The description of these problems does not preclude the existence of other problems. It is not necessary for one embodiment to solve all of these problems. The subject matter can be extracted from descriptions in the specification, drawings, claims, etc. [Means for solving the problem]

[0011] One embodiment of the present invention is a method for forming a semiconductor device having a semiconductor device, comprising: forming a plurality of transistors in a matrix over a substrate; A conductor electrically connected to the transistor is formed, and a plurality of light-emitting elements are formed on the film. Each light-emitting element is formed in a trix shape, and has an electrode on one side and a film on the other side. The conductor and the electrode are placed opposite each other, and the extrusion mechanism is pushed from the film side to the substrate side. This is a method for manufacturing a display device in which a conductor and an electrode are brought into contact with each other and electrically connected to each other. .

[0012] In the above-mentioned method for manufacturing a display device, after the conductor and the electrode are brought into contact with each other, the conductor is extruded through an extrusion mechanism. It is preferable to apply ultrasonic waves to the conductor and the electrode so as to press the conductor and the electrode together.

[0013] In the above-mentioned method for producing a display device, the film has a tensile modulus of 3 GPa or more and 18 GPa or less. It is preferable that:

[0014] In the above-mentioned method for manufacturing a display device, a film having a plurality of light-emitting elements formed thereon is used for a plurality of It is preferable that

[0015] In the above-mentioned method for manufacturing a display device, at least one of the plurality of light-emitting elements is a micro-L ED is preferred.

[0016] In the above-mentioned method for manufacturing a display device, at least one of the plurality of transistors is a channel transistor. It is preferable to have a metal oxide in the hole-forming region.

[0017] In addition, one aspect of the present invention is a method for manufacturing a liquid crystal display device, comprising: A substrate on which a plurality of transistors are formed in a matrix is ​​held. The holding mechanism has a conductor electrically connected to the transistor, and the holding mechanism has a plurality of light emitting elements. The film is held in a matrix shape, and the light-emitting elements are each The holding mechanism has an electrode on one side and the other side in contact with the film, and the holding mechanism faces the conductor and the electrode. The extrusion mechanism pushes the conductor from the film side to the substrate side to bring the conductor and the electrode into contact. The present invention is an apparatus for manufacturing a display device that has a function of electrically connecting a conductor and an electrode. Effect of the Invention

[0018] According to one embodiment of the present invention, the manufacturing cost of a display device using a micro LED as a display element can be reduced. Alternatively, according to one aspect of the present invention, it is possible to convert micro LEDs into display elements with high yield. According to one embodiment of the present invention, a display device using the micro LED can be manufactured. It is possible to provide a manufacturing apparatus for manufacturing a display device used in the present invention at low manufacturing cost. According to the embodiment, a display device using a micro LED as a display element can be manufactured with high yield. We can provide manufacturing equipment.

[0019] According to one embodiment of the present invention, a display device having high luminance can be provided. According to one embodiment of the present invention, a display device having a high response speed can be provided. According to one embodiment of the present invention, a display device with low power consumption can be provided. According to one embodiment of the present invention, a display device with low manufacturing costs can be provided. According to one embodiment of the present invention, a display device with a long lifetime can be provided. According to one embodiment of the present invention, a novel display device can be provided. According to one embodiment of the present invention, a novel manufacturing apparatus for a display device can be provided. Cut.

[0020] The description of these effects does not preclude the existence of other effects. An embodiment does not necessarily have to have all of these effects. can be extracted from descriptions in the specification, drawings, claims, etc. [Brief description of the drawings]

[0021] [Figure 1] FIG. 1 is a plan view and a perspective view showing a display device. [Diagram 2] 2A1 and 2B1 are perspective views showing a method for manufacturing a display device, and 2A2 and 2B2 are cross-sectional views showing the method for manufacturing a display device. [Diagram 3] Figures 3A1 and 3B1 are perspective views showing a method for producing a display device, and Figures 3A2 and 3B2 are cross-sectional views showing the method for producing a display device. [Figure 4] Figures 4A1 and 4B1 are perspective views showing a method for manufacturing a display device, and Figures 4A2 and 4B2 are cross-sectional views showing a method for manufacturing a display device. [Diagram 5] Figures 5A1 and 5B1 are perspective views showing a method for producing a display device, and Figures 5A2 and 5B2 are cross-sectional views showing a method for producing a display device. [Figure 6] Figures 6A1 and 6B1 are perspective views showing a method for manufacturing a display device, and Figures 6A2 and 6B2 are cross-sectional views showing a method for manufacturing a display device. [Figure 7] FIG. 7 is a perspective view of the device. [Figure 8] FIG. 8 is a schematic diagram showing the configuration of the device. [Figure 9] 9A, 9B, and 9C are cross-sectional views showing a method for manufacturing a display device. [Figure 10] 10A, 10B, 10C, and 10D are cross-sectional views showing a method for manufacturing a display device. [Figure 11] FIG. 11 is a perspective view of the device. [Figure 12] 12A, 12B, and 12C show configuration examples of the display device. [Figure 13] 13A, 13B, and 13C show configuration examples of the display device. [Figure 14] 14A, 14B, and 14C show configuration examples of a light-emitting element. [Figure 15] 15A, 15B, and 15C show configuration examples of a light-emitting element. [Figure 16] 16A, 16B, and 16C show configuration examples of the display device. [Figure 17] 17A, 17B, and 17C are top views of the display device. [Figure 18] FIG. 18 is a cross-sectional view of the display device. [Figure 19] FIG. 19 is a cross-sectional view of the display device. [Figure 20] 20A, 20B, and 20C are diagrams illustrating a method for manufacturing a display device. [Figure 21] 21A and 21B are diagrams illustrating a method for manufacturing a display device. [Figure 22] FIG. 22 is a diagram illustrating a method for manufacturing a display device. [Figure 23] 23A and 23B are diagrams illustrating a method for manufacturing a display device. [Figure 24] FIG. 24 is a cross-sectional view of the display device. [Diagram 25] 25A and 25B are diagrams illustrating a method for manufacturing a display device. [Figure 26] 26A and 26B are diagrams illustrating a method for manufacturing a display device. [Figure 27] 27A1, 27A2, 27B1, 27B2, 27C1, and 27C2 are diagrams illustrating transistors. [Figure 28] 28A1, 28A2, 28B1, 28B2, 28C1, and 28C2 are diagrams illustrating transistors. [Figure 29] 29A1, 29A2, 29B1, 29B2, 29C1, and 29C2 are diagrams illustrating transistors. [Diagram 30]30A1, 30A2, 30B1, 30B2, 30C1, and 30C2 are diagrams illustrating transistors. [Diagram 31] Fig. 31A is a block diagram of a display device, and Fig. 31B is a circuit diagram of the display device. [Diagram 32] 32A, 32B, and 32C are circuit diagrams of the display device. [Diagram 33] Figures 33A, 33C and 33D are circuit diagrams of the display device, and Figure 33B is a timing chart of the display device. [Diagram 34] 34A, 34B, 34C, 34D, and 34E are diagrams for explaining an information processing device. [Diagram 35] 35A, 35B, 35C, 35D, and 35E are diagrams for explaining an information processing device. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0022] The embodiment will be described in detail with reference to the drawings. However, the present invention is not limited to the following description. The present invention is not limited to the above embodiment, and various changes and modifications may be made in the form and details without departing from the spirit and scope of the present invention. It will be easily understood by those skilled in the art that the present invention can be realized by the following embodiments. The present disclosure should not be construed as being limited to the contents of the preceding paragraph.

[0023] In the configuration of the invention described below, the same parts or parts having similar functions are The same reference numerals are used in common between different drawings, and the repeated explanations are omitted. When referring to a function, the hatch pattern may be the same and no particular symbol may be used.

[0024] In each figure described in this specification, the size, layer thickness, or area of ​​each component is indicated by the following formula: The figures may be exaggerated for clarity and are not necessarily limited to scale. stomach.

[0025] In this specification, ordinal numbers such as "first" and "second" are used to avoid confusion of components. The numbers are added for the purpose of convenience and are not intended to be limiting.

[0026] A transistor is a type of semiconductor device that controls the amplification of current or voltage and the conduction or non-conduction of electricity. The transistor in this specification and the like can realize a switching operation that controls an IGF. ET(Insulated Gate Field Effect Transistor) r) and thin film transistors (TFTs). .

[0027] In the following, expressions indicating directions such as "up" and "down" basically correspond to the directions in the drawings. However, for ease of explanation and other purposes, The orientation of "up" or "down" may not be consistent with the drawings. When explaining the stacking order (or formation order) of a laminate, etc., The surface to be bonded (the surface to be formed, the supporting surface, the adhesive surface, the flat surface, etc.) is located above the laminate. Even if the object is placed in a certain position, the direction may be described as "down" and the opposite direction as "up."

[0028] In this specification, a display panel, which is one aspect of a display device, displays (outputs) images on a display surface. Therefore, the display panel is one aspect of an output device.

[0029] In the present specification, the substrate of the display panel is provided with, for example, an FPC (Flexible Printed Circuit). inted Circuit) or TCP (Tape Carrier Packa ge) or COG (Chip On Gauge) connectors attached to the board. Display module is a device that has ICs mounted using a method such as display glass. It may be called a display panel, a display unit, or simply a display panel.

[0030] (Embodiment 1) In this embodiment, a manufacturing method and an apparatus for manufacturing a display device according to one embodiment of the present invention will be described. I will explain about this.

[0031] First, an example of a display device that can be manufactured by a manufacturing method of a display device according to one embodiment of the present invention is shown in FIG. The left side of FIG. 1 is a top view of the display device, and the right side is an enlarged perspective view of a part of the pixel portion. The display device 700 shown in FIG. 1 includes a pixel section 702 and a source driver circuit section 703 on a substrate 800. The pixel portion 702 is provided with a plurality of light emitting diodes (LEDs), a gate driver circuit portion 704, and a gate driver circuit portion 706. An optical element 17 is provided.

[0032] The substrate 800 is preferably provided with a circuit for driving the light emitting element 17. In the area 800, a circuit is formed by, for example, transistors, capacitor elements, wiring, electrodes, etc. Each of the light emitting elements 17 is an active element to which one or more transistors are connected. It is more preferable to use a matrix method. In the pixel portion 702, the transistors are The electrodes 21 and 23 are electrically connected to the light-emitting element 1. 7. That is, the pixel circuit is electrically connected to the light emitting element 7 via the electrodes 21 and 23. In FIG. 1, each light-emitting element 17 is electrically connected to an electrode 21 and an electrode 22. 3 is electrically connected to the two electrodes, but one embodiment of the present invention is not limited to this. According to the number of electrodes of the light emitting element 17, electrodes electrically connected to the pixel circuit are formed. In this embodiment, one of the components provided on the substrate 800 is Although the light-emitting element 17 is shown as an example, the light-emitting element can be rephrased as a light-emitting device. Similarly, the capacitive element may be called a capacitive device.

[0033] Next, a method for manufacturing a display device will be described with reference to FIGS. 1 are perspective views and cross-sectional views of the display device 700 at various stages in the manufacturing process. In the embodiment, an example in which an LED chip is used as the light emitting element 17 is shown.

[0034] Note that an LED chip that can be used in the manufacturing method of a display device according to one embodiment of the present invention The color of the emitted light is not particularly limited. For example, the present invention can be applied to an LED chip that emits white light. It is also suitable for LED chips that emit light in the visible light wavelength range, such as red, green, and blue. It can also be used for LED chips that emit light in the near-infrared and infrared wavelength ranges. Can be used.

[0035] As an LED chip that can be used in the manufacturing method of a display device according to one embodiment of the present invention, From large sizes, there are macro LEDs (also called giant LEDs), mini LEDs, and micro LEDs. Here, LED chips with a side dimension exceeding 1 mm are called macro LEDs. D: Mini LEDs are larger than 100μm and less than 1mm, and micro LEDs are smaller than 100μm. It is called a black LED. It is an LED chip that is applied to pixels, especially mini LED or micro LED. It is preferable to use LEDs. By using micro LEDs, extremely high-definition displays can be achieved. This makes it possible to realize this position.

[0036] It is preferable that a transistor included in the display device has a metal oxide in a channel formation region. A transistor using a metal oxide can reduce power consumption. By combining this with micro LEDs, it is possible to realize a display device with extremely low power consumption. It is possible.

[0037] A plurality of LED chips are formed on the LED chip substrate 900. An example is shown in Figures 2A1 and 2A2. Figure 2A1 is a perspective view of an LED chip substrate 900; FIG. 2A2 is a cross-sectional view taken along dashed line X1-X2 in FIG. 2A1. On the substrate 71A, a semiconductor layer 81 having an n-type semiconductor layer, a light emitting layer, a p-type semiconductor layer, etc., An electrode 85 that functions as a cathode and an electrode 87 that functions as an anode are formed. A plurality of LED chips are formed on the LED chip substrate 900, and the LED chip substrate 900 is By separating along the D-chip section 51A, multiple LED chips can be produced.

[0038] The substrate 71A of the LED chip substrate 900 is ground to thin the substrate 71A to a desired thickness. (FIGS. 2B1 and 2B2). By reducing the thickness of the substrate 71A, Alternatively, the substrate 71A may be removed from the LED chip substrate 900.

[0039] The grinding process will be described in detail. First, the electrodes 85 and 87 of the LED chip substrate 900 are The LED chip substrate 900 and the plate 903 are bonded together. 903 is placed on the table 905. At this time, the plate side is in contact with the table, and the vacuum chamber is The LED chip substrate 900 and the plate 903 are fixed to the table 905 by a bracket or the like. Then, while rotating the table 905 on the surface of the table 905, The substrate 71A is ground with a grindstone 907, and the substrate 71A is obtained. The wheel 909 and the grindstone 907 may be rotated.

[0040] Next, the ground surface is polished with an abrasive (also called a slurry) to flatten the surface of the substrate 71. It is preferable to planarize the surface of the substrate 71 (FIGS. 3A1 and 3A2). This can prevent a decrease in the yield of the process.

[0041] In addition, when grinding and polishing, a filter is provided on the electrode 85 and electrode 87 for protection. It is preferable to provide and fix the sintered body 901 and then perform polishing (see FIG. 2B2). After this, the film 901 is removed.

[0042] Next, a first film 919 is provided on the side of the electrodes 85 and 87, and the LED chip substrate 90 0 and the first film 919 are fixed to the first fixture 921 (FIGS. 3B1 and 3B2). The first film 919 is a film that stretches when pulled (expandable film). As the first film 919, a chloride film is preferably used. Vinyl resin, silicon resin, polyolefin resin, etc. can be used. Film 919 has an adhesive on its surface, and when exposed to light, its adhesive strength weakens. Specifically, when the first film 919 is irradiated with ultraviolet light, A film that has a weak adhesive strength can be preferably used as the first fixing member 921. For example, a ring-shaped jig as shown in FIG. 3B1 can be suitably used.

[0043] Next, a scribe line is formed along the LED chip section 51A of the LED chip substrate 900. The scribe line 911 is formed (FIGS. 4A1 and 4A2). In the machine scribing method, a scribing tool is scribing the substrate. By pressing the substrate 71 against the substrate 71, grooves (also called scribe lines or markings) are mechanically formed in the substrate 71. A diamond blade or the like can be used as the scribing tool.

[0044] The scribe lines 911 may be formed by a laser scribing method. In the scribe method, a laser beam is irradiated onto the substrate 71 to locally heat it, and then the substrate is rapidly cooled. The thermal stress generated by the heat treatment causes a deteriorated layer in the substrate 71, forming the scribe line 911. In the laser scribing method, a scribe line 911 is formed on the substrate 7. The machine scriber may be formed on the surface of the substrate 71 or may be formed inside the surface of the substrate 71. In the scribing method, the scribing tool wears out and needs to be replaced. In the laser scribing method, there is no need to replace the scribing tool.

[0045] Alternatively, the substrate 71 may be diced along the LED chip section 51A using a blade dicing method. The blade dicing method involves rotating a blade at high speed. It can cut into the object and the blade can be made of diamond. When using the blade dicing method, the cut is made halfway through the thickness of the substrate 71. Alternatively, a full cut may be used, which cuts the substrate 71 and the semiconductor layer 81 completely in the thickness direction. It may also be a set.

[0046] Next, the LED chip substrate 900 is separated into individual LED chips. For example, the LED chip substrate 913 is placed on a pedestal 913 having an opening 914. 00 and drive the blade 915 along the scribe line 911 to form the LED The chip substrate 900 can be separated into individual LED chips (FIGS. 4B1 and 4B2). ) Alternatively, the LED chip substrate 900 is sandwiched between rollers, and the rollers are provided with surfaces with different inclination angles. The LED chips may be separated by providing a When separating the substrate 71, a sheet 923 (also called a scribe sheet) is provided on the substrate 71 for protection. It is also possible to provide a light-emitting diode (LED) and then separate it into individual LED chips. The LED chip substrate 900 after the process is shown in FIG. 5A1 and FIG. 5A2.

[0047] Next, the first film 919 is pulled to separate the LED chips 51. The spacing between the LED chips 51 is increased (FIGS. 5B1 and 5B2). This makes subsequent handling easier. To separate the LED chips 51, for example, The plate 924 having an area larger than the area where the LED chip 51 is provided is placed on the first filter. By pushing the first film 919 up from the side of the film 919 to the side of the LED chip 51, When pulled, each LED chip 51 can be separated.

[0048] Next, the second film 927 is fixed to the second fixture 925. A second fixture 925 is provided on the substrate 71 side (FIGS. 6A1 and 6A2).

[0049] In addition, when using LED chips 51 that have already been separated, the display device is manufactured as shown in FIG. 6A1 and 6A2. A second film 927 is provided on the side of the first film 921, and the second film 927 is fixed to a second fixing tool 925. By doing so, it is possible to proceed to the steps described below. As shown in the figure, providing a gap between each LED chip 51 increases the accuracy of the subsequent mounting process. This is preferable because it allows the display device to be manufactured with a high yield. By arranging many of them in a matrix in Room 927, the manufacturing costs of the subsequent mounting process can be reduced. It is possible.

[0050] Next, ultraviolet light is applied from the first film 919 side to The fixture 921 is separated from the LED chip 51 (FIGS. 6B1 and 6B2). In the process of separating the D chips, the first film 919 is stretched, The LED chip 51 may be bent when the first film 919 is separated from the LED chip 51. By fixing the second film 927 to the second film 927, which has less cracks, the accuracy of the subsequent mounting process can be improved and high Display devices can be manufactured with a high yield.

[0051] It is preferable to use a film having elasticity as the second film 927. The film is deformed by the application of force and returns to its original shape when the force is removed. A film having a high tensile modulus of elasticity can be suitably used as the film 927. Film 927: Polyamide resin, polyimide resin, polyethylene naphthalate resin In addition, it is preferable that the second film 927 has high heat resistance. In addition, the second film 927 has an adhesive on the surface thereof, and the second film 927 is provided with L. The ED chip substrate 900 can be fixed. As the second fixing device 925, for example, A ring-shaped jig such as that shown in FIG. 6B1 can be suitably used.

[0052] At this point, it is preferable to inspect the LED chip 51. In addition, a voltage is applied between the electrodes 85 and 87, and the L The light emission state from the ED chip 51 may be inspected. With respect to 51, it is preferable to obtain position information within the second film 927. By acquiring the location information of defective products, it is possible to exclude defective products from being mounted in the subsequent mounting process. .

[0053] Next, a method for mounting the LED chip 51 on the circuit-bearing substrate 800 will be described. do.

[0054] This mounting method can be used in a process of mounting an LED chip 51 on a substrate 800 having a circuit. An example of the device 950 is shown in Figs. 7 and 8. Fig. 7 is a perspective view of the device 950, and Fig. 8 is a perspective view of the device 950. The device 950 includes a stage 951 and a single-axis robot for the X-axis. A single-axis robot 953 for the Y-axis, a single-axis robot 955 for the Y-axis, a gripping mechanism 959, an extrusion mechanism 929, and a control and a control device 961.

[0055] The stage 951 has a function of fixing the substrate 800. For example, the substrate 800 is fixed by The stage 951 is supported by a single-axis robot 953 and a single-axis The robot 955 can move in the XY directions on a plane parallel to the surface of the substrate 800. .

[0056] The gripping mechanism 959 is a second fixing mechanism that fixes the LED chip 51 and the second film 927. The gripping mechanism 959 grips the LED chip 51 and the second film 9 The second fixture 925, which fixes the sensor 27, has a function of moving the second fixture 925 to an arbitrary position.

[0057] The pushing mechanism 929 has a function of moving up and down and placing the LED chip 51 on the substrate 800. The extrusion mechanism 929 has a columnar (including a cylindrical or polygonal columnar) shape and supports the LED chip 51. The tip of the extrusion mechanism 929 that comes into contact with the LED chip 51 may be tapered. It is preferable that the diameter of the LED chip 51 be smaller than the width of the LED chip 51 .

[0058] The control device 961 controls the single-axis robot 953, the single-axis robot 955, the gripping mechanism 959, the extrusion The control unit 929 controls the LED chip 51. The position information of the LED chips that are determined to be defective is input to the control device 961. By inputting the location information of the defective products to 61, the defective products can be excluded from the implementation.

[0059] The apparatus 950 is preferably provided with an alignment mechanism such as a camera 957. The position of the second fixture 925 is controlled based on an alignment marker or the like provided on the do.

[0060] A method for mounting the LED chip 51 on the circuit-containing substrate 800 will be described in detail with reference to FIG. This will be explained using FIG.

[0061] First, a plurality of LED chips 51 are fixed to a second film 927, and a substrate having a circuit When the LED chip 51 is opposed to the LED chip 800, the camera 957 detects the outline of the LED chip 51. It is preferable to obtain the position information of the LED chip 51 by detecting the position of the LED chip 51. Based on the information, the position of the LED chip 51 is adjusted by the gripping mechanism 959, and the The electrodes 85 and 87 are aligned with the electrodes 21 and 23 on the substrate 800 (FIG. 9A). The gripping mechanism 959 grips the substrate 800 in a plane parallel to the surface thereof in the X, Y, and θ directions. It is preferable that the LED can be moved in the X, Y and θ directions. The positions of the electrodes 85 and 87 of the chip 51 and the positions of the electrodes 21 and 23 on the substrate 800 The position can be adjusted with high precision.

[0062] In FIG. 8, the camera 957 is disposed above the second film 927. 927 from above to detect the positions of the electrodes 85 and 87 of the LED chip 51. However, one aspect of the present invention is not limited to this. 800) is placed on the substrate 800 so that the electrodes 85 and 87 of the LED chip 51 are positioned from below the substrate 800. , and the positions of the electrodes 21 and 23 on the substrate 800 may be detected.

[0063] Next, the pushing mechanism 929 is pushed in from the second film 927 side toward the substrate 800. The electrode 85 is brought into contact with the electrode 21, and the electrode 87 is brought into contact with the electrode 23. Next, the extrusion mechanism 92 9, and electrodes 85 and 21, and electrodes 87 and 23 are pressed together (see FIG. 9B). Alternatively, the extrusion mechanism 929 is heated to extrude the electrodes 85 and 21, and the electrodes 87 and 23. The bonding may be performed by applying heat or by applying ultrasonic waves and heat. In the case where the extrusion mechanism 929 is heated, the temperature of the extrusion mechanism 929 is set to the resistance of the second film 927. It is preferable that the temperature of the extrusion mechanism 929 is equal to or lower than the heat resistance of the second film 927. By keeping the temperature at or below this temperature, deformation and bending of second film 927 can be suppressed.

[0064] The extrusion mechanism 929 is connected to a unit 963 shown in FIG. The unit 963 may have a vibrator to apply ultrasonic waves to the extrusion mechanism 929. The unit 963 may have a heating mechanism and may apply heat to the extrusion mechanism 929. The extrusion mechanism 929 has an ultrasonic oscillator and a heating mechanism, and applies ultrasonic waves to the extrusion mechanism 929 and heats the extrusion mechanism 929. The unit 963 is connected to the control device 961, which controls the ultrasonic The timing of application and heating is controlled.

[0065] A conductive bump is provided on each of the electrodes 21 and 23, and the LE is attached to the bump. The D tip 51 may be brought into contact.

[0066] Next, the pushing mechanism 929 is moved away from the second film 927 (FIG. 9C). 1. The electrodes 87 and 23 are pressed against each other, so that the electrodes 21 and 23 The LED chip 51 mounted on the second film 927 is separated from the second film 927. The adhesive strength of the adhesive applied to the surface of 927 is It is preferable that the pressure applied to the second filter is smaller than the pressure applied to the second filter. By using the LED chip 51 in the display device 927, the LED chip 51 can be efficiently mounted on the substrate 800. This can reduce manufacturing costs.

[0067] When the second film 927 is bent, the electrodes 85 and 87 of the LED chip 51 are bent. Then, it becomes difficult to align the electrodes 21 and 23 on the substrate 800, and the electrodes 85 and In this case, a conduction failure may occur between the electrodes 21 and 23 and between the electrodes 87 and 21 and 23. In this case, the second film 927 has elasticity, and the extrusion mechanism 929 is moved away from the second film 927. The second film 927 can then return to its original shape. By returning to the original shape, the second film 927 can be prevented from bending, and the electrodes 85 and 8 The position of the second filter 7 and the positions of the electrodes 21 and 23 can be aligned with high precision. The tensile modulus of elasticity of RUMU927 is preferably 3 GPa or more and 18 GPa or less, and more preferably 5 GPa or more and 16 GPa or less. More preferably, the pressure is 7 GPa or more and 14 GPa or less. By setting the tensile modulus of the film 927 in the above-mentioned range, the LED chip 51 can be attached to the electrodes 21 and When the second film 927 is brought into contact with the electrode 23, the second film 927 is stretched appropriately and the LED chip 51 is When aligning the position, the slack of the second film 927 can be reduced, resulting in a high yield. The display device can be manufactured in a small amount and the manufacturing cost can be reduced.

[0068] Next, the LED chip 51 fixed to the second film 927 and the LED chip 51 The electrodes 21 and 23 are aligned (FIG. 10A). At that time, any one or more of the stage 951, the gripping mechanism 959, and the extrusion mechanism 929 is moved. Any two of the stage 951, the gripping mechanism 959, and the extrusion mechanism 929 can be used. It is more preferable to move the above. By moving any two or more of the structures 929, the electrodes 85 and It is possible to improve the accuracy of alignment between the electrode 87 and the electrodes 21 and 23 on the substrate 800. can.

[0069] Next, the pushing mechanism 929 is pushed in from the second film 927 side toward the substrate 800. The electrode 85 is brought into contact with the electrode 21, and the electrode 87 is brought into contact with the electrode 23. The electrode 21, the electrode 87 and the electrode 23 are compressed together (FIG. 10B). 927 is separated from the second film 927. As a result, the electrodes 21 and 23 mounted on the electrodes 21 and 23 are The LED chip 51 is separated from the second film 927 .

[0070] The above-mentioned operation is repeated until LED chips are mounted on the entire surface of the pixel portion of the substrate 800. The LED chip 51B that is determined to be defective in the inspection process of the LED chip 51 is is incorporated in the control device 961 and is not mounted on the board 800 (FIGS. 10C and 10 D) The defective LED chip position is input to the control device 961, so that the defective LED chip position can be detected. Only the board 51 can be mounted on the board 800 .

[0071] In a method for manufacturing a display device according to one embodiment of the present invention, multiple light emitting devices that emit colors in different wavelength ranges are used. It is also possible to mount several types of LED chips 51 on the substrate 800. For example, The LED chip 51 emits light in the long wavelength region (hereinafter referred to as red light), and the LED chip 52 emits light in the green wavelength region (hereinafter referred to as red light). The LED chip 51 emits light in the blue wavelength region (hereinafter, referred to as blue light). The following describes a case where an LED chip 51 that emits red light (hereinafter referred to as red) is provided on a substrate 800. A second film 927 on which a plurality of LED chips 51 that emit colored light are fixed, and a second fixture 925, the LED chip 51 is mounted on the substrate 800. Next, A second film 927 having a plurality of LED chips 51 fixed thereto and a second fixture 925 are used. Then, the LED chip 51 is mounted on the substrate 800. Next, a plurality of LEDs emitting blue light are The second film 927 to which the ED chip 51 is fixed and the second fixing tool 925 are used. The LED chip 51 is mounted on the substrate 800. The LED chip 51 emits red light, the LED chip 51 emits green light, and the LED chip 51 emits blue light. The LED chips 51 can be mounted in the following order: There is no particular limitation.

[0072] In addition, a set of second films 927 and second fixtures 925 are attached to the substrate 800. Although an example in which the ED chip 51 is mounted has been shown, one embodiment of the present invention is not limited to this. As shown in FIG. 1, a plurality of sets of second films 927 and LED chips 5 are attached to the second fixture 925. By adopting such a configuration, the display device 7 can be manufactured with high productivity. 11, four sets of second films 927, second fixtures 925, However, any number of sets of LED chips 51 may be mounted.

[0073] The above is the description of the method for manufacturing the display device.

[0074] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0075] (Embodiment 2) In this embodiment, a display device according to one embodiment of the present invention, which is described in Embodiment 1, is manufactured by using the method for manufacturing the display device. An example of a display device that can be manufactured by the above method will be described.

[0076] <Configuration example 1> A cross-sectional structure of a display device 10 that can be manufactured using a manufacturing method of a display device according to one embodiment of the present invention. An example is shown in FIG. 12A.

[0077] The display device 10 includes a functional layer 15, a light-emitting element 17, a phosphor layer 18, and a light-emitting device 19 between a substrate 11 and a substrate 13. 35, the colored layer CFR, the colored layer CFG, and the colored layer CFB, etc. In FIG. The substrate 11 side corresponds to the display surface side of the display device 10.

[0078] The light emitting element 17 may be, for example, an OLED (Organic Light Emitting Diode). ng Diode), LED, QLED(Quantum-dot Light Emi) It is possible to use self-luminous light-emitting elements such as a dipping diode and a semiconductor laser. In particular, LEDs have high brightness and contrast, and have a fast response speed, making them ideal light-emitting devices. 17, and has high brightness, contrast and a fast response speed. Since the LED is a self-emitting element, a backlight is not required. In addition, since no polarizing plate is required, the display device has high brightness and consumes low power. In addition, LEDs have a long lifespan and are less susceptible to deterioration because the light-emitting layer is made of inorganic materials. It can be a long display device.

[0079] The functional layer 15 is a layer including a circuit for driving the light-emitting element 17. For example, the functional layer 15 includes: A pixel circuit is composed of transistors, capacitors, wiring, electrodes, etc. The layer 15 is electrically connected to the electrode 21 and the electrode 23. 1 and is electrically connected to the light emitting element 17 via the electrode 23 .

[0080] In addition, an insulating layer 25 is provided between the electrodes 21 and 23 and the functional layer 15. The electrodes 21 and 23 are electrically connected to the functional layer 15 through the openings provided in the insulating layer 25. As a result, the functional layer 15 and the light-emitting element 17 are electrically connected to each other. do.

[0081] The display device 10 has an adhesive layer 27 between the electrodes 21 and 23 and the substrate 11. It can be said that the substrate 11 and the substrate 13 are bonded together by the adhesive layer 27. The light-emitting element 17 is also sealed by the insulating layer 14. Between these substrates, there are a light emitting element 17 and a functional layer 15 for driving the light emitting element.

[0082] The substrate 11 is provided on the substrate 13 side with a colored layer CFR and a colored layer 16 at positions overlapping the light emitting element 17. The color layer CFG and the color layer CFB are provided. The color layers CFB are used as color filters that transmit, for example, red, green, or blue light. The materials that can be used for the colored layers CFR, CFG, and CFB are Examples of the material include metal materials, resin materials, and resin materials containing pigments or dyes.

[0083] A phosphor layer is provided between the colored layer CFR, the colored layer CFG, and the colored layer CFB and each of the light-emitting elements 17. The phosphor layer 35 is formed by using an organic resin layer mixed with phosphor. The phosphor contained in the phosphor layer 35 is excited by the light emitted by the light emitting element 17. A material that emits light of a complementary color to the light emitted by the light emitting element 17 can be used. By adopting such a configuration, the light emitted by the light emitting element 17 and the light emitted by the phosphor are combined, and the phosphor is The light source layer 35 can emit white light.

[0084] For example, the phosphor layer 35 may have a phosphor that emits yellow light, and the light-emitting element 17 may have a phosphor that emits blue light. By adopting this configuration, white light is emitted from the phosphor layer 35. The light emitted by the light emitting element 17 provided with the CFR passes through the phosphor layer 35 and the colored layer CFR. The red light 20R is emitted to the display surface side. Similarly, the light emitting element provided with the colored layer CFG The light emitted from the light-emitting element 17 is emitted as green light 20G. The light emitted by the light emitting element 17 is emitted as blue light 20B. In addition, the display device can display a color image using only one type of light emitting element 17. Therefore, the manufacturing process can be simplified. The display device has high brightness and contrast, a fast response speed, and low power consumption. It is possible.

[0085] For example, the phosphor layer 35 has a phosphor that emits red light, and the light emitting element 17 emits blue-green light. By configuring the phosphor layer 35 to emit white light, a configuration may be adopted in which white light is emitted from the phosphor layer 35.

[0086] The phosphor layer 35 is made up of a phosphor that emits red light, a phosphor that emits green light, and a phosphor that emits blue light. The light emitting element 17 has a phosphor that emits near ultraviolet light or purple light. In this way, a configuration may be adopted in which white light is emitted from the phosphor layer 35.

[0087] In addition, one color is expressed by three sub-pixels of red (R), green (G), and blue (B). However, one embodiment of the present invention is not limited to this. There is no particular limitation on the color elements, and RG Colors other than B may be used. For example, yellow (Y), cyan (C), magenta (M), etc. It may be configured as:

[0088] In addition, as in the display device 10A shown in FIG. 12B, a light-shielding layer 14 is provided adjacent to the light-emitting element 17. It is preferable to provide a light-shielding layer 33 between adjacent light-emitting elements 17. It is preferable to provide a light-shielding layer 33 between adjacent light-emitting elements 17 to prevent light leakage to adjacent pixels. The light-shielding layer 33 is made of a pigment, a dye, or carbon black. In addition, the side surface of the light emitting element 17 is in contact with the light shielding layer 33. By covering the side surface of the light emitting element 17 with the light shielding layer 33, it is possible to prevent the light from reaching the adjacent pixels. In FIG. 12B, the height of the upper surface of the light-shielding layer 33 and the color mixing between pixels can be suppressed. In the illustrated embodiment, the heights of the upper surfaces of the light-emitting elements 17 are approximately the same. The height of the upper surface of the light-shielding layer 33 may be lower than the height of the upper surface of the light-emitting element 17. The height of the upper surface of the light-shielding layer 33 may be higher than the height of the upper surface of the light-emitting element 17. By roughly matching or raising the height of the upper surface of the element 17, light leakage into adjacent pixels, Color mixing between pixels can be effectively suppressed.

[0089] FIG. 12B shows a case where there is a gap between the light emitting element 17 and the phosphor layer 35. One embodiment of the present invention is not limited to this. The colored layer CFR 7 may be in contact with the phosphor layer 35. The distance between the colored layers CFG and CFB and each of the light emitting elements 17 is shortened, and the adjacent pixels This can suppress light leakage into the substrate and color mixing between pixels.

[0090] Also, as in the display device 10C shown in FIG. 13A, a light-shielding layer 31 may be provided. The light-shielding layer 31 is provided between the adjacent colored layers. The light-shielding layer 31 blocks light emitted from the adjacent light-emitting element 17, The color mixture between adjacent light emitting elements 17 is suppressed. and the colored layer CFB are provided so that their ends overlap the light-shielding layer 31, The light-shielding layer 31 is made of a material that blocks light emitted from the light-emitting element 17. For example, a metal material or a resin material containing a pigment or dye can be used. can be done.

[0091] In addition, as in the display device 10D shown in FIG. 13B, each colored layer is The respective overlapping areas of the colored layers may function as a light-shielding layer. In FIG. 13B, one end of the colored layer CFR is connected to one end of the colored layer CFG. The other end of the colored layer CFG overlaps with one end of the colored layer CFB, and the colored layer C Although an example in which the other end of the FB overlaps with the other end of the colored layer CFR has been shown, one embodiment of the present invention is This is not limited to this.

[0092] In addition, as in the display device 10E shown in FIG. 13C, a pixel not including a colored layer is formed. In this case, the pixel can be configured to emit 20W of white light. This allows one color to be expressed using four sub-pixels: R (red), G (green), B (blue), and W (white). With this configuration, the three sub-pixels of red (R), green (G), and blue (B) can be used. A display that can reduce the current flowing through the light emitting element 17 compared to a configuration that displays one color, and consumes less power. The present invention can be an apparatus.

[0093] A light-emitting diode chip (hereinafter referred to as an LED chip) that can be used as the light-emitting element 17 This section explains the following:

[0094] The LED chip includes a light-emitting diode. The configuration of the light-emitting diode is not particularly limited. MIS (Metal Insulator Semiconductor) bonding is also acceptable. A homostructure, heterostructure, or double heterostructure having a PN junction or a PIN junction is used. In addition, it is possible to use a superlattice structure or a single quantum well structure in which thin films that generate quantum effects are stacked. structure or multi-quantum well (MQW) structure Also, an LED chip using nano-columns may be used.

[0095] An example of an LED chip is shown in Figures 14A and 14B. Figure 14A shows a cross-section of an LED chip 51. FIG. 14B shows a top view of the LED chip 51. The LED chip 51 is a semiconductor The semiconductor layer 81 includes an n-type semiconductor layer 75 and a light emitting layer 81 on the n-type semiconductor layer 75. The p-type semiconductor layer 79 is made of a material selected from the group consisting of fluorine, arsenic, ... , which has a larger band gap energy than the light-emitting layer 77, and thus the carriers are confined in the light-emitting layer 77. The LED chip 51 can be made of a material that can be used for the n-type semiconductor layer 75. An electrode 85 serving as a cathode is provided on the p-type semiconductor layer 79, and a contact electrode is provided on the p-type semiconductor layer 79. An electrode 83 that functions as a cathode is provided on the electrode 83, and an electrode 87 that functions as an anode is provided on the electrode 83. The upper and side surfaces of the electrode 83 are preferably covered with an insulating layer 89. It functions as a protective film for the ED chip 51 .

[0096] An example of an enlarged view of the semiconductor layer 81 is shown in FIG. 14C. As shown in FIG. 14C, the n-type semiconductor layer 75 is an n-type contact layer 75a on the substrate 71 side and an n-type cladding layer 75b on the light emitting layer 77 side. The p-type semiconductor layer 79 may have a p-type cladding layer 79 a on the light emitting layer 77 side and a p-type cladding The semiconductor device may have a p-type contact layer 79b on the pad layer 79a.

[0097] The light emitting layer 77 is a multi-quantum well layer in which a barrier layer 77a and a well layer 77b are stacked multiple times. The barrier layer 77a has a band gap larger than that of the well layer 77b. It is preferable to use a material with a large flip energy. Energy can be confined in the well layer 77b, improving quantum efficiency and increasing the efficiency of the LED chip 51. The luminous efficiency can be improved.

[0098] In the face-up type LED chip 51, the electrode 83 is made of a material that transmits light. For example, ITO (In2O3-SnO2), AZO (Al2O3-ZnO), In-Zn oxide (In2O3-ZnO), GZO(GeO2-ZnO), ICO(In 2O3-CeO2) and other oxides can be used. Face-up type LED chip In the case of the face-down type LED chip 51, light is mainly emitted toward the electrode 87 side. The electrode 83 can be made of a material that reflects light, such as silver, aluminum, or rhodium. In the face-down type LED chip 51, the light is It is mainly emitted toward the substrate 71 side.

[0099] The substrate 71 may be a sapphire single crystal (Al2O3), a spinel single crystal (MgAl2O 4) Oxides such as ZnO single crystal, LiAlO2 single crystal, LiGaO2 single crystal, MgO single crystal, etc. Single crystals of semiconductors, single crystals of Si, single crystals of SiC, single crystals of GaAs, single crystals of AlN, single crystals of GaN, A boride single crystal such as ZrB2 can be used. Face-down type LED chip In the embodiment, the substrate 71 is preferably made of a material that transmits light, such as sapphire. A single crystal or the like can be used.

[0100] A buffer layer (not shown) may be provided between the substrate 71 and the n-type semiconductor layer 75. The n-type layer has a function of reducing the difference in lattice constant between the substrate 71 and the n-type semiconductor layer 75 .

[0101] The LED chip 51 that can be used as the light emitting element 17 is a light emitting diode (LED) chip as shown in FIG. A horizontal structure in which the electrodes 85 and 87 are arranged on the same side is preferred. The electrodes 85 and 87 are provided on the same surface side, so that the connection between the electrodes 21 and 23 This makes it easier to form the electrodes 21 and 23, and simplifies the structures of the electrodes 21 and 23. The LED chip 51 that can be used as the terminal 17 is preferably a face-down type. By using a face-down type LED chip 51, the light emitted from the LED chip 51 The light emitted from the display device is efficiently emitted to the display surface side of the display device, resulting in a display device with high brightness. The LED chip 51 may be a commercially available LED chip.

[0102] The phosphor contained in the phosphor layer 35 is an organic resin having a phosphor printed or painted on its surface. The phosphor layer 35 may be an organic resin layer containing a phosphor. Excited by the light emitted by the chip 51, it emits light of a complementary color to the light emitted by the LED chip 51 By adopting such a configuration, the light emitting element 17 can emit light. The light emitted by the phosphor layer 35 is combined with the light emitted by the phosphor, so that white light can be emitted from the phosphor layer 35.

[0103] For example, an LED chip 51 that emits blue light and a fluorescent chip that emits yellow light, which is the complementary color of blue, may be used. By using a light source, it is possible to configure the phosphor layer 35 to emit white light. The LED chip 51 capable of emitting blue light is made of a group 13 nitride compound semiconductor. A typical example of such a diode is the In x Al y Ga 1-x-y N(x is 0 or less (x+y is 0 or more and 1 or less) A typical example of a phosphor that is excited by blue light and emits yellow light is the Y3 AlO 12 :Ce(YAG:Ce), (Ba,Sr,Mg)2SiO4:Eu,Mn etc. There is.

[0104] For example, an LED chip 51 that emits blue-green light and an LED chip 52 that emits red light, which is the complementary color of blue-green, may be used. By using a phosphor having a different color, a configuration can be achieved in which white light is emitted from the phosphor layer 35.

[0105] The phosphor layer 35 may have a plurality of types of phosphors, each of which emits light of a different color. For example, the LED chip 51 may be configured to emit blue light and the LED chip 52 may be configured to emit red light. A phosphor that emits colored light and a phosphor that emits green light are used to emit white light from the phosphor layer 35. A typical phosphor that is excited by blue light and emits red light is Examples include (Ca,Sr)S:Eu, Sr2Si7Al3ON 13 :Eu, etc. Blue Representative examples of phosphors that are excited by colored light and emit green light include SrGa2S4:Eu, S r3Si 13 Al3O2N 21 :Eu, etc.

[0106] In addition, an LED chip 51 that emits near-ultraviolet light or purple light and a phosphor that emits red light A phosphor that emits green light and a phosphor that emits blue light are used to emit white light from the phosphor layer 35. The device can be configured to emit red light when excited by near-ultraviolet light or violet light. Representative examples of phosphors that emit light include (Ca,Sr)S:Eu and Sr2Si7Al3ON1 3:Eu, La2O2S:Eu, etc. It is excited by near-ultraviolet or violet light and emits green light. Representative examples of phosphors that emit light include SrGa2S4:Eu and Sr3Si 13 Al3O2N2 1:Eu, etc. A representative example of a phosphor that is excited by near-ultraviolet or violet light and emits blue light. As for Sr 10 (PO4)6Cl2:Eu, (Sr,Ba,Ca) 10 (PO4)6 Cl2:Eu, etc.

[0107] In addition, near-ultraviolet light has a maximum peak at a wavelength of 200 nm to 380 nm in the emission spectrum. The violet light has a wavelength of 380 nm to 430 nm in the emission spectrum. In addition, blue light has a maximum peak at wavelengths of 430 nm or less in the emission spectrum. The green light has a maximum peak at 490 nm. The yellow light has a maximum peak at 90 nm to 550 nm. The wavelength of red light has a maximum peak at 550 nm to 590 nm. In this case, the wavelength has a maximum peak at 640 nm to 770 nm.

[0108] The phosphor layer 35 has a phosphor that emits yellow light, and the LED chip 51 emits blue light. When used, the light emitted by the LED chip 51 has a wavelength of 330 nm in the emission spectrum. It is preferable that the maximum peak is between 430 nm and 490 nm. It is more preferable that the maximum peak is at wavelength 450 nm to 480 nm. It is more preferable that the phosphor has a peak. This allows efficient excitation of the phosphor. The light emitted by the LED chip 51 has an emission spectrum of 430 nm to 490 nm. By having a maximum peak at 1000 nm, the blue light, which is the excitation light, and the yellow light from the phosphor are mixed together, Furthermore, when the light emitted by the LED chip 51 is 450 nm to 500 nm, it is possible to obtain white light. By having a maximum peak at 480 nm, a highly pure white color can be achieved.

[0109] Various optical members may be disposed on the outside of the substrate 11. Examples of the layers that can be used include a diffusion film, an anti-reflection layer, and a light-collecting film. The outside of the 1 has an antistatic film that prevents dust from sticking to it, a water-repellent film that makes it difficult for dirt to stick to it, A hard coat film or the like that suppresses the occurrence of scratches during use may be disposed.

[0110] In addition, a touch sensor may be provided outside the substrate 11. A configuration including the touch sensor can function as a touch panel.

[0111] <Configuration example 2> A structure different from the above-described display device will be described. An LED package can be used as the light emitting element 17 .

[0112] An LED package that can be used for the light emitting element 17 will be described.

[0113] The light emitting element 17 may be a bullet type or a surface mount type (SMD: Surface Mount Device). device type LED packages, A surface-mount type LED package can be used as the light-emitting element 17. An example of a surface-mount type LED package is shown in FIG. 15A and FIG. 15B. FIG. 15A is a cross-sectional view of the LED package 50, and FIG. 15B is a top view of the LED package 50. The LED package 50 includes an LED chip 51 on a substrate 52, electrodes 55, and a power supply 56. The LED chip 51 has an electrode 57 via a wire 59 and a wire 61. 55 and the electrode 57. Also, a phosphor 65 and a transparent The substrate 52 and the LED chip 51 are attached with an adhesive layer 67. In addition, a commercially available LED package may be used as the light emitting element 17. .

[0114] The LED package that can be used for the light emitting element 17 has a light emitting area of ​​1 mm 2 Less than 10000μm, preferably 2 Less than or equal to 3000 μm, more preferably 3000 μm 2 Below, More preferably 700 μm 2In this specification, the region from which light is emitted is The area is 10,000 μm 2 The following LED packages may be referred to as micro LEDs.

[0115] The substrate 52 may be a glass epoxy resin substrate, a polyimide substrate, a ceramic substrate, an alumina The substrate may be an aluminum nitride substrate or the like.

[0116] The phosphor 65 is an organic resin layer on which the phosphor is printed or painted, An organic resin layer or the like can be used. It is possible to use a material that is excited by the LED chip 51 and emits light of a complementary color. With this configuration, the LED package 50 can emit white light. The phosphor layer 35 may be formed of the phosphor layer 35. Detailed explanation will be omitted.

[0117] For example, an LED chip 51 that emits blue-green light and an LED chip 52 that emits red light, which is the complementary color of blue-green, may be used. By using a phosphor having a phosphor layer, the LED package 50 can be configured to emit white light. do.

[0118] In addition, an LED chip 51 that emits near-ultraviolet light or purple light and a phosphor that emits red light A phosphor that emits green light and a phosphor that emits blue light are used to form an LED package 5. 0 can be configured to emit white light.

[0119] The LED package 50 includes an LED chip 51 that emits blue light and an LED chip 52 that emits yellow light. When the phosphor 65 is used, the light emitted by the LED chip 51 has an emission spectrum of It is preferable that the wavelength has a maximum peak at 330 nm to 500 nm, and the wavelength is 430 It is more preferable that the maximum peak is between 450 nm and 490 nm, and more preferably between 450 nm and 490 nm. It is more preferable that the phosphor 65 has a maximum peak at 480 nm. In addition, the light emitted by the LED chip 51 has an emission spectrum of 43 By having a maximum peak at 400 nm to 490 nm, the blue light, which is the excitation light, and the phosphor 6 The yellow light from the LED chip 51 can be mixed with the white light to produce white light. The light emitted has a maximum peak at 450nm to 480nm, producing a pure white light. It can be said that:

[0120] The resin layer 63 is made of a light-transmitting organic resin. There is no particular limitation on the type of organic resin. Representative examples of the resin include ultraviolet-curable resins such as epoxy resins and silicone resins, and visible light-curable resins. In FIG. 15A, the upper surface of the resin layer 63 is flat. However, one aspect of the present invention is not limited to this. For example, the upper surface of the resin layer 63 may be convex. The shape can be appropriately selected depending on the desired directivity.

[0121] The wires 59 and 61 are made of gold, an alloy containing gold, copper, or an alloy containing copper. For example, thin wires of metal that have been subjected to heat treatment can be used.

[0122] The electrodes 55 and 57 are conductive layers that are electrically connected to the electrodes of the LED chip 51. Nickel, copper, silver, platinum, or gold, or any one of these elements at least 50% The electrodes 55 and 57 and the electrodes of the LED chip 51 are bonded to each other by heat and pressure. The connection is made by wire bonding using the soldering method or ultrasonic bonding method. .

[0123] A reflector 53 made of ceramic or the like is disposed around the LED chip 51. By reflecting some of the light emitted from the LED package 51, more light is directed to the LED package. It is preferable that the light be emitted from the reflector 50. In FIG. Although a tapered shape expanding upward is shown, one embodiment of the present invention is not limited thereto. An appropriate shape can be selected depending on the desired light directionality.

[0124] The LED package 50 shown in FIG. 15A emits light toward the electrode side of the LED chip 51. A configuration using a face-up type LED chip that can be used in one embodiment of the present invention has been shown. The possible configuration of the LED package 50 is not particularly limited.

[0125] An example different from the LED package illustrated in FIG. 15A is shown in FIG. FIG. 15C is a cross-sectional view of the package 50. FIG. 15B can be used as a top view. The package 50 is arranged such that the electrodes of the LED chip 51 face the electrodes 55 and 57. The LED chip 51 has an electrode and an electrode The electrode 55 and the electrode 57 are electrically connected via a conductive bump 90. The LED package 50 has a faceplate that emits light on the opposite side of the electrodes of the LED chip 51. 15A and 15C show a configuration using a water-based LED chip. Although the LED chip 51 has a flat structure, one embodiment of the present invention is not limited to this. The LED chip 51 in the package 50 has an electrode 85 and an electrode 87 on opposite sides. It may also be a vertical structure disposed on a surface.

[0126] In addition, FIG. 15 shows an example in which the LED package 50 has one LED chip 51. However, the configuration of the LED package 50 that can be used in one embodiment of the present invention is not limited to this. The LED package 50 may have a plurality of LED chips 51. For example, the LED chip 51 that emits red light may be omitted. 2, an LED chip 51 that emits green light, and an LED chip 51 that emits green light. By not including the phosphor 65, white light is emitted from the LED package 50. This is also fine.

[0127] The configuration of a display device using an LED package 50 as the light emitting element 17 will be described. .

[0128] An example of a cross-sectional structure of a display device according to one embodiment of the present invention is shown in FIG. The display device 10F includes a functional layer 15, a light-emitting element 17, a coloring layer C, and a light-emitting device 18 between the substrate 11 and the substrate 13. The display device 10F includes a phosphor layer 35 and a color layer FR. 12A to 12C and 13A to 13C in that it does not have the light-shielding layer 33. The main difference is that the display device uses an LED chip as the light emitting element 17. In FIG. The substrate 11 side corresponds to the display surface side of the display device 10F.

[0129] The LED package 50 has a reflector 53 to enhance the directionality of light. When the LED package 50 is used as the light emitting element 17, the light shielding layer 33 is not provided. Even if the light emitting element 17 is not used, light leakage to adjacent pixels and color mixing between pixels can be suppressed. By using the LED package 50 that emits white light, the color can be displayed without providing the phosphor layer 35. Error display can be performed.

[0130] In FIG. 16A, the color layers CFR, CFG, and CFB are connected to the light emitting element 17. Although the case where there is a gap between the colored layers CFR and CFR is shown, the present invention is not limited to this. The color layer CFG and the color layer CFB may be in contact with the light emitting element 17. By doing so, the colored layers CFR, CFG, and CFB and the light-emitting elements 17 The shorter distance makes it possible to suppress light leakage into adjacent pixels and color mixing between pixels.

[0131] Also, as in the display device 10G shown in FIG. 16B, a light-shielding layer 31 may be provided. The light-shielding layer 31 is provided between the adjacent colored layers. The light-shielding layer 31 blocks light emitted from the adjacent light-emitting element 17, The color mixture between adjacent light emitting elements 17 is suppressed. The ends of the colored layer CFB and the colored layer CFB are provided so as to overlap the light-shielding layer 31. The light-shielding layer 31 is made of a material that blocks light emitted from the light-emitting element 17. For example, a metal material or a resin material containing a pigment or dye can be used. can.

[0132] In addition, as in the display device 10H shown in FIG. 16C, each colored layer is The respective overlapping areas of the colored layers may function as a light-shielding layer. In FIG. 16C, one end of the colored layer CFR is connected to one end of the colored layer CFG. The other end of the colored layer CFG overlaps with one end of the colored layer CFB, and the colored layer C Although an example in which the other end of the FB overlaps with the other end of the colored layer CFR has been shown, one embodiment of the present invention is This is not limited to this.

[0133] Furthermore, a pixel not including a colored layer is formed, and white light is emitted from the pixel. With this configuration, R (red), G (green), B (blue), W (white) ) to express one color. A configuration in which one color is expressed by three sub-pixels of red (green), blue (blue), and blue (blue) is applied to the light-emitting element 17. The current can be reduced, and a display device with low power consumption can be obtained.

[0134] The above is a description of the configuration example.

[0135] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0136] (Embodiment 3) In this embodiment, an example of the display device exemplified in the previous embodiment will be described in detail. do.

[0137] <Configuration example> FIG. 17A shows a top view of a display device 700. The display device 700 is made of a sealing material 712. The semiconductor device has a first substrate 701 and a second substrate 705 bonded together. In the region sealed by the second substrate 705 and the sealant 712, A pixel section 702, a source driver circuit section 704, and a gate driver circuit section 706 are provided. The pixel portion 702 is provided with a plurality of display elements.

[0138] In addition, an FPC 716 is connected to a portion of the first substrate 701 that does not overlap with the second substrate 705. The FPC terminal portion 708 is connected to the FPC 716. 8 and a signal line 710, the pixel section 702, the source driver circuit section 704, and the gate Various signals and the like are supplied to each of the driver circuit sections 706 .

[0139] A plurality of gate driver circuit sections 706 may be provided. The path portion 706 and the source driver circuit portion 704 are separately formed on a semiconductor substrate or the like. The IC chip may be in the form of a packaged IC chip. The IC chip may be mounted on the first substrate 70. It can be mounted on FPC716 or FPC716.

[0140] The pixel portion 702, the source driver circuit portion 704, and the gate driver circuit portion 706 have The structure of the transistor is not particularly limited. , polycrystalline semiconductors, microcrystalline semiconductors, amorphous semiconductors, etc., either alone or in combination. Examples of semiconductor materials include silicon and germanium. Also, silicon germanium, silicon carbide, gallium arsenide, oxide Compound semiconductors such as semiconductors, nitride semiconductors, and organic semiconductors can be used.

[0141] When using an organic semiconductor as the semiconductor layer, low molecular weight organic materials with aromatic rings or π-electron conjugates are used. For example, rubrene, tetracene, pentacene, etc. can be used. , perylene diimide, tetracyanoquinodimethane, polythiophene, polyacetylene, poly Paraphenylene vinylene and the like can be used.

[0142] The transistor used in this embodiment is made of a highly purified oxide film in which the formation of oxygen vacancies is suppressed. It is preferable that the transistor has a semiconductor film. The off-state current of the transistor can be reduced. The retention time of electrical signals such as image signals can be extended, and the writing interval can be set longer when the device is on. This reduces the frequency of refresh operations, resulting in reduced power consumption. do.

[0143] In addition, the transistor used in this embodiment has a relatively high field-effect mobility. For example, a transistor capable of such high speed operation can be used for a display device. By using this in a device, the switching transistor in the pixel section and the driver circuit section In other words, the transistors can be formed on the same substrate as the silicon wafer. It is also possible to configure the semiconductor device without using a driving circuit, thereby reducing the number of components in the semiconductor device. The pixel section also uses transistors capable of high-speed operation to provide high-quality images. can.

[0144] A display device 700A shown in FIG. 17B is a display device having a flexible resin substrate instead of a first substrate 701. Example of a display device to which layer 743 can be applied and which can be used as a flexible display It is.

[0145] In the display device 700A, the pixel section 702 is not rectangular, but has arc-shaped corners. As shown in a region P1 in FIG. 17B, the pixel section 702 and a part of the resin layer 743 The pair of gate driver circuit sections 706 are connected to the pixel section 702. The gate driver circuit section 706 is provided on both sides of the pixel section 702. The recess is provided along a circular arc-shaped contour.

[0146] The resin layer 743 has a protruding shape at the portion where the FPC terminal portion 708 is provided. In addition, a part of the resin layer 743 including the FPC terminal portion 708 is folded back in an area P2 in FIG. 17B. By folding back a part of the resin layer 743, the FPC 716 can be attached to the pixel section 70. The display device 700A can be mounted on the back side of the display device 2, and the display device 700A can be mounted on the electrical device. This allows for space saving for electronic devices.

[0147] An IC 717 is mounted on an FPC 716 connected to the display device 700A. The IC 717 has a function as, for example, a source driver circuit. The source driver circuit section 704 in 00A includes a protection circuit, a buffer circuit, a demultiplexer, The configuration may include at least one of a crosstalk circuit, etc.

[0148] The display device 700B shown in FIG. 17C can be suitably used in electronic devices having large screens. For example, television equipment, monitor equipment, personal computers, (including notebook and desktop computers), tablet devices, digital signage, etc. It can be suitably used for the following:

[0149] The display device 700B includes a plurality of source driver ICs 721 and a pair of gate driver circuits. The sensor 722 has a first section 722.

[0150] The source driver ICs 721 are each attached to an FPC 723. In addition, the FPCs 723 are each connected to the substrate 701 at one terminal and to the printed circuit board 72 at the other terminal. 4. By bending the FPC 723, the printed circuit board 724 is It can be mounted on the back side of the pixel section 702 in an electric device, thereby saving space in the electronic device. It is possible to achieve this.

[0151] On the other hand, the gate driver circuit section 722 is formed on the substrate 701. It is possible to realize electronic devices with narrow bezels.

[0152] With this configuration, a large-sized and high-resolution display device can be realized. The surface size is 30 inches or more, 40 inches or more, 50 inches or more, or 60 inches or more diagonally. In addition, it is possible to realize display devices with extremely high resolution such as 4K2K or 8K4K. This makes it possible to realize a high-resolution display device.

[0153] <Cross-section configuration example 1> FIG. 18 is a cross-sectional view taken along dashed line QR shown in FIG. 17A.

[0154] The display device shown in FIG. 17A and FIG. 18 includes a wiring portion 711, a pixel portion 702, and a semiconductor device. The base driver circuit section 704 and the FPC terminal section 708 are provided. The pixel portion 702 includes a signal line 710. The pixel portion 702 includes a transistor 750 and a capacitor 790. The source driver circuit portion 704 includes a transistor 752.

[0155] The capacitor 790 shown in FIG. 18 has the same first gate electrode as the transistor 750. The lower electrode is formed by processing a film of the same metal oxide as the semiconductor layer. and an upper electrode that is connected to the source and drain regions of the transistor 750. The resistance of the transistor 7 is reduced in the same manner as in the upper and lower electrodes. A part of the insulating film that functions as the first gate insulating layer of the capacitor element 50 is provided. The element 790 has a laminated structure in which an insulating film that functions as a dielectric film is sandwiched between a pair of electrodes. In addition, the upper electrode is formed with the same film as the source and drain electrodes of the transistor. The wiring obtained by the above process is connected.

[0156] In addition, an insulating layer 7 is formed over the transistor 750, the transistor 752, and the capacitor 790. The insulating layer 770 functions as a planarization film. The top surfaces of the conductive layer 772 and the conductive layer 774 can be planarized. The conductive layer 772 and the conductive layer 774 are located on the same plane, and the upper surfaces of the conductive layer 772 and the conductive layer 774 are flat. The flatness of the conductive layer 772 and the conductive layer 774 and the light-emitting element 782 can be easily electrically connected to each other. can be effectively connected.

[0157] The conductive layer 772 and the conductive layer 774 and the light-emitting element 782 are connected to the conductive bumps 791 and 18, the light emitting element 782 is electrically connected to the cathode side of the light emitting element 782 through the amplifier 793. The heights of the electrode and the anode side electrode are different, and the heights of the bumps 791 and 793 are The light emitting element 782 has a cathode electrode and an anode electrode. In the case where the heights are the same, the heights of the bumps 791 and 793 are approximately the same. This can be done.

[0158] As shown in FIG. 18, the transistor 750 in the pixel portion 702 is The transistor 750, particularly the channel forming region, By having a region where the conductive layer 772 overlaps with the light emitting element 782, the light emitted from the light emitting element 782 and the external light This can prevent the transistor 750 from being affected by the current, thereby suppressing the fluctuation of the electrical characteristics of the transistor 750. Can be controlled.

[0159] A transistor 750 included in the pixel portion 702 and a transistor 751 included in the source driver circuit portion 704 A transistor having a different structure from the transistor 752 may be used. For example, A top-gate transistor is applied to one side and a bottom-gate transistor is applied to the other side. The gate driver circuit section 706 may also be configured using a source driver. This is similar to the driver circuit section 704.

[0160] The signal line 710 is the same as the source and drain electrodes of the transistors 750 and 752. In this case, if a low-resistance material such as a material containing copper is used, the wiring This is preferable because it reduces signal delays caused by line resistance and enables display on a large screen.

[0161] The FPC terminal portion 708 includes wiring 760, a part of which functions as a connection electrode, and an anisotropic conductive film 78. The wiring 760 is connected to the FPC 710 via an anisotropic conductive film 780. In this example, the wiring 760 is electrically connected to a terminal of the transistor 750, The source electrode and drain electrode 752 are formed from the same conductive film.

[0162] The first substrate 701 and the second substrate 705 are, for example, a glass substrate or a plastic substrate. A flexible substrate such as a plastic substrate can be used as the first substrate 701. When using a substrate that can be used for the first substrate 701, water or water may be provided between the first substrate 701 and the transistor 750, etc. It is preferable to provide an insulating layer having a barrier property against elements.

[0163] On the second substrate 705 side, a light-shielding layer 738, a coloring layer 736, and a phosphor layer 797 are provided. , is provided. The coloring layer 736 is provided on the light emitting element 782. The phosphor layer 797 is The phosphor layer 797 is provided between the light emitting element 782 and the coloring layer 736. 18, the phosphor layer 79 and the color layer 736 have overlapping areas. The end of the colored layer 736 is located outside the end of the light emitting element 782, and the end of the colored layer 736 is located outside the end of the phosphor layer 79. It is preferable that the lens be positioned outside the edge of the lens 7. In addition, the light-shielding layer 736 between the adjacent colored layers 736 can be prevented from leaking light into the adjacent colored layers 736. By providing 738, it is possible to reduce the reflection of external light and create a display device with high contrast. This can be done.

[0164] For example, phosphor layer 797 may have a phosphor that emits yellow light, and light emitting element 782 may have a phosphor that emits blue light. By adopting a configuration in which red light is transmitted through the phosphor layer 797, white light is emitted from the phosphor layer 797. The light emitted from the light emitting element 782 provided in the area overlapping the colored layer 736 is reflected by the phosphor layer 797. The green light is then transmitted through the colored layer 736 and emitted as red light to the display surface side. The light emitted from the light emitting element 782 provided in the region overlapping with the colored layer 736 is emitted as green light. The light emitting element 782 provided in the area overlapping the coloring layer 736 that transmits blue light emits light. The light emitted from the light emitting element 782 is blue light. In addition, since the light emitting element 782 used in the display device is of one type, Therefore, the manufacturing process can be simplified. To provide a display device with high brightness and contrast, fast response speed, and low power consumption. can be done.

[0165] For example, the phosphor layer 797 may have a phosphor that emits red light, and the light emitting element 782 may emit blue-green light. By configuring the phosphor layer 797 to emit white light, good.

[0166] The phosphor layer 797 is made up of a phosphor that emits red light, a phosphor that emits green light, and a phosphor that emits blue light. The light emitting element 782 is configured to emit near ultraviolet light or purple light. This may result in a configuration in which white light is emitted from phosphor layer 797.

[0167] The display device 700 shown in FIG. 18 has a light-emitting element 782. It is preferable to use a horizontally structured, face-down type LED chip as shown in FIG. .

[0168] The colored layer 736 is provided at a position overlapping the light emitting element 782, and the light blocking layer 738 is 736, the lead wiring portion 711, and the source driver circuit portion 704. In addition, the phosphor layer 797, the colored layer 736, and the light-shielding layer 738 are provided on the light-emitting element 7 The space between the electrode 82 and the substrate 82 is filled with a sealing film 732 .

[0169] The light-shielding layer 795 is provided adjacent to the light-emitting element 782. It is preferable to provide a light-shielding layer between adjacent light-emitting elements 782. By providing the light shielding layer 795, it is possible to suppress light leakage to adjacent pixels and color mixing between pixels. For 5, a resin containing a pigment, a dye, or carbon black can be used. Furthermore, it is preferable that the side surface of the light emitting element 782 contacts the light shielding layer 795. By covering the sides with a light-shielding layer 795, light leakage to adjacent pixels and color mixing between pixels can be suppressed. In FIG. 18, the height of the upper surface of the light-shielding layer 795 and the height of the upper surface of the light-emitting element 782 are Although the configuration is roughly the same as that shown in FIG. 1, one embodiment of the present invention is not limited to this. The height of the upper surface may be lower than the height of the upper surface of the light emitting element 782. The height of the upper surface of the light-shielding layer 795 may be approximately the same as the height of the upper surface of the light-emitting element 782. By roughly matching or increasing the brightness, light leakage to adjacent pixels and color mixing between pixels are effectively suppressed. Can be controlled.

[0170] FIG. 19 shows a configuration of a display device that can be suitably applied to a flexible display. FIG. 19 is a cross-sectional view taken along dashed line ST in the display device 700A shown in FIG. 17B. be.

[0171] A display device 700A shown in FIG. 19 includes a support substrate 74 instead of the substrate 701 shown in FIG. 5, an adhesive layer 742, a resin layer 743, and an insulating layer 744 are laminated. The resistor 750, the capacitor element 790, and the like are provided on an insulating layer 744 provided on a resin layer 743. It is being done.

[0172] The support substrate 745 is a substrate that contains organic resin, glass, or the like, and is thin enough to be flexible. The resin layer 743 is a layer containing an organic resin such as polyimide or acrylic. The resin layer 74 includes an inorganic insulating film such as silicon oxide, silicon oxynitride, or silicon nitride. 3 and the support substrate 745 are bonded together by an adhesive layer 742. The resin layer 743 is It is preferably thinner than the supporting substrate 745 .

[0173] 19 includes a protective layer 702 instead of the substrate 705 shown in FIG. The protective layer 740 is attached to the sealing film 732. A glass substrate or a resin film can be used as the protective layer 740. , an optical member such as a scattering plate, an input device such as a touch sensor panel, or two or more of these A top-laminated configuration may also be applied.

[0174] 19 shows a bendable region P2. In the region P2, the support substrate 7 45, in addition to the adhesive layer 742, there is a portion where no inorganic insulating film such as the insulating layer 744 is provided. In the region P2, a resin layer 746 is provided to cover the wiring 760. The bendable region P2 is provided with as little inorganic insulating film as possible, and is provided with a conductive material containing a metal or an alloy. By laminating only layers containing organic materials, cracks do not occur when the material is bent. In addition, by not providing the support substrate 745 in the region P2, A portion of the display device 700A can be bent with a small radius of curvature.

[0175] An example of a method for manufacturing the display device 700 shown in FIG. 3 are schematic cross-sectional views of the display device 700 at various stages in the manufacturing method thereof. be.

[0176] The thin films (insulating films, semiconductor films, conductive films, etc.) constituting the display device are formed by sputtering. , Chemical Vapor Deposition (CVD) method, Vacuum evaporation, Pulsed Laser Deposit (PLD) ion) method, Atomic Layer Deposition (ALD) The CVD method can be plasma enhanced chemical vapor deposition (PECVD) or Alternatively, a thermal CVD method may be used. An example of the thermal CVD method is metal-organic chemical vapor deposition (MOCVD). Alternatively, a (Etal Organic CVD) method may be used.

[0177] In addition, spin-coil is used to form the thin films (insulating films, semiconductor films, conductive films, etc.) that make up the display device. Coating, dip, spray application, inkjet, dispensing, screen printing, off Set printing, doctor knife, slit coat, roll coat, curtain coat, knife Coatings and the like can be used.

[0178] In addition, when processing the thin films that make up the display device, photolithography and other methods are used. Alternatively, island-shaped thin films may be formed by a film formation method using a shielding mask. Alternatively, the thin film is processed by nanoimprinting, sandblasting, lift-off, etc. As the photolithography method, for example, there are the following two methods. A photosensitive resist material is applied onto the thin film to be deposited, exposed through a photomask, and then developed. A resist mask is formed by imaging the thin film, and the thin film is processed by etching or the like. The other method is to remove the resist mask after forming a photosensitive thin film. This method involves processing the thin film into a desired shape by exposure and development.

[0179] In the photolithography method, the light used for exposure is, for example, i-line (wavelength 365 nm), Using g-line (wavelength 436 nm), h-line (wavelength 405 nm), or a mixture of these. In addition, ultraviolet light, KrF laser light, ArF laser light, etc. can be used. The exposure may be performed by immersion lithography. Using extreme ultraviolet (EUV) and X-rays, Also, instead of light for exposure, an electron beam can be used. The use of light, X-rays or electron beams is preferable because it allows extremely fine processing. When exposure is performed by scanning a beam such as an electron beam, the photomask is It is not necessary.

[0180] There are three methods for etching thin films: dry etching, wet etching, and sandblasting. Methods such as the above can be used.

[0181] (Formation of transistors, etc.) First, the conductive layer 301, the conductive layer 303, and the conductive layer 305 are formed on a substrate 701. The conductive layer 301, the conductive layer 303, and the conductive layer 305 are formed by forming a resist mask after forming a conductive film. The conductive film is then etched, and the resist mask is then removed. .

[0182] Next, an insulating layer 3 is formed on the substrate 701, the conductive layer 301, the conductive layer 303, and the conductive layer 305. Form 11.

[0183] Next, the semiconductor layer 321, the semiconductor layer 323, and the semiconductor layer 325 are formed (FIG. 20A). The semiconductor layers 321, 323, and 325 are formed by depositing a semiconductor film. forming a resist mask, etching the semiconductor film, and then removing the resist mask; It can be formed by:

[0184] Next, the insulating layer 331, the conductive layer 341, the conductive layer 351, the insulating layer 333, the conductive layer 343, and The insulating layer 331 and the insulating film which will become the insulating layer 333, the conductive layer 341, and the conductive layer 353 are formed. and a conductive film to be the conductive layer 343, a conductive film to be the conductive layer 351, and a conductive film to be the conductive layer 353, After the formation of the insulating film and the conductive film, a resist mask is formed, and the insulating film and the conductive film are etched. By removing the mask, the insulating layer 331, the conductive layer 341, the conductive layer 351, and the insulating layer 333, a conductive layer 343, and a conductive layer 353 can be formed.

[0185] Subsequently, an insulating layer 361 and an insulating layer 363 are formed (FIG. 20B).

[0186] Next, openings are formed in the insulating layer 361 and the insulating layer 363, and the conductive layer 371 and the conductive layer 373 are a, a conductive layer 373b, a conductive layer 375, a conductive layer 377, and a wiring 760 are formed. 71, the conductive layer 373a, the conductive layer 373b, the conductive layer 375, the conductive layer 377, and the wiring 760. The conductive layer 302 can be formed by a method similar to that for the conductive layer 301 and the like.

[0187] Through the above steps, the signal line 710, the transistor 750, the capacitor element 790, and the transistor Then, the insulating layer 379 is formed. The film functions as a protective film for the transistor 750 and the like.

[0188] Formation of Insulating Layer 770 Next, the insulating layer 770 is formed. By using a photosensitive material for the insulating layer 770, The opening can be formed by a lithography method or the like. After that, a part of the insulating film may be etched using a resist mask to form an opening. When an organic insulating material is used for the insulating layer 770, the flatness of the upper surface can be improved. preferable.

[0189] Alternatively, an inorganic insulating film may be used as the insulating layer 770. Silicon, silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, nitride Inorganic insulating materials such as aluminum, aluminum oxynitride, or aluminum oxynitride The insulating layer 770 can be used as a single layer or a laminate. It functions as a protective layer for the transistor 750 etc.

[0190] The insulating layer 770 may have a stacked structure of an inorganic insulating film and an organic insulating film.

[0191] Next, a part of the insulating layer 379 on the wiring 760 of the FPC terminal portion 708 is removed, and the wiring 76 Expose 0.

[0192] <Formation of Conductive Layer 772 and Conductive Layer 774> Subsequently, a conductive layer 772 and a conductive layer 774 are formed on the insulating layer 770 (FIG. 21A). The insulating layer 770 is electrically connected to the transistor 750 through an opening in the insulating layer 770. The conductive layer 772 and the conductive layer 774 can be formed by a method similar to that for the conductive layer 301, etc. The conductive layer 772 and the conductive layer 774 are preferably made of a material that is reflective to light. For example, the conductive layer 772 and the conductive layer 774 may be made of an alloy of silver, palladium, and copper (A Materials including PC (also called polycarbonate), aluminum, titanium, copper, etc. can be used.

[0193] Subsequently, conductive bumps 791 and 792 are formed on the conductive layers 772 and 774, respectively. The bumps 791 and 793 are formed using gold, silver, tin, or the like (FIG. 21B). Metals such as these, alloys containing these metals, anisotropic conductive films such as conductive resins, conductive The bumps 791 and 793 may be made of, for example, gold. The bumps 791 and 793 can be formed by a printing method, a transfer method, or the like. A discharge method or the like can be used.

[0194] <Arrangement of light-emitting element 782> Next, the light emitting element 782 is disposed on the bumps 791 and 793. As 82, a horizontal structure, face-down type LED chip as shown in FIG. 14 is used. In this arrangement, the cathode side electrode and the anode side electrode of the light emitting element 782 are preferably arranged in a bun The light emitting element 782 is disposed so as to be in contact with the bump 791 and the bump 793. The lamp 793, the light-emitting element 782, the conductive layer 772, and the conductive layer 774 are pressed against each other. A light emitting element 782 is fixed on the conductive layer 774. The conductive layer 774 and the light-emitting element 782 are electrically connected (FIG. 22).

[0195] The light-emitting element 782 can be disposed by using the manufacturing method of the display device shown in the above embodiment. In addition, the arrangement of the light emitting element 782 can be performed by picking up the light emitting element 782 from a predetermined position, A pick and place machine can be used to transport and place the The FSA (Fluidic Self Assembly) method is used to arrange the optical element 782. In the FSA method, a light-emitting layer is formed on the conductive layer 772 and in an area overlapping the conductive layer 774. A recessed insulating layer is formed to fit the element 782, and the light emitting element 782 is self-aligned in the recess in the liquid. In one embodiment of the present invention, the LED chip used as the light emitting element 782 is one type. Since the light emitting elements 782 are of the same type, it is easier to arrange the light emitting elements 782 than when multiple types are used. do.

[0196] <Formation of light-shielding layer 795> Next, a light-shielding film that will become the light-shielding layer 795 is formed on the insulating layer 770 and the light-emitting element 782 (see FIG. 22) Metallic materials, pigments, or resins containing dyes are used as light-shielding films, and the films are then processed by photolithography. At this time, a light-shielding film is also formed on the light-emitting element 782. The thickness of the light-shielding film is adjusted so as to obtain the desired light-shielding effect.

[0197] Next, a part of the light-shielding film that will become the light-shielding layer 795 is removed to expose the upper surface of the light-emitting element 782. (Figure 23A) The light-shielding film can be removed by dry etching or the like. In one embodiment of the invention, one type of LED chip is used as the light-emitting element 782, and the LED chips are arranged in a row. Since the height of the light emitting elements 782 can be made uniform, the upper surfaces of the light emitting elements 782 can be easily uniformly In other words, according to one embodiment of the present invention, A display with high brightness and contrast, fast response speed, and low power consumption at low manufacturing costs. The display device may be a display device.

[0198] <Formation of Colored Layer 736 and Phosphor Layer 797> Subsequently, a light-shielding layer 738 and a colored layer 736 are formed on the substrate 705 .

[0199] The light-shielding layer 738 can be made of a metal material or a resin material. When using a metal material, after forming the conductive film, unnecessary parts are removed by photolithography or the like. The light-shielding layer 738 can be formed by removing the unnecessary portions. When a photosensitive resin material containing a dye is used, the insulating layer can be formed by a photolithography method or the like.

[0200] The colored layer 736 is preferably made of, for example, a photosensitive resin material. After applying a material onto the substrate 705 and the light-shielding layer 738, the material is applied through a photomask. The film can be formed by exposure to light, development, and then heat treatment.

[0201] Next, a phosphor layer 797 is formed on the color layer 736 (FIG. 23B). For example, a screen printing method or a dispense method using an organic resin layer containing a phosphor It can be formed by law, etc.

[0202] <Bonding of substrate 701 and substrate 705> Next, a bonding agent is applied to either or both of the substrates 701 and 705. The adhesive layer is formed so as to surround the area in which the pixels are arranged. The adhesive layer can be formed by, for example, a screen printing method, a dispensing method, or the like. The resin may be a curable resin or a UV-curable resin. Alternatively, a resin that hardens when heated may be used as the adhesive layer. A resin having both radiation curing and heat curing properties may also be used.

[0203] Next, the substrate 701 and the substrate 705 are bonded together, and the adhesive layer is cured to form a sealing film 732. If the bonding is performed under a reduced pressure atmosphere, air bubbles may get mixed between the substrates 701 and 705. This is preferable because it can prevent the above-mentioned problem.

[0204] Next, an anisotropic conductive film 780 is provided on the wiring 760. By placing 716 and bonding it by heat, the wiring 760 and the FPC 716 are electrically connected. Can.

[0205] Through the above steps, the display device 700 can be formed (FIG. 18).

[0206] <Cross-section configuration example 2> An example of a configuration different from the display device 700 shown previously is shown in FIG. 24. FIG. 24 shows the configuration of the display device 700 shown in FIG. The display device 700A shown in FIG. 15 as an example of the LED package 2, and a light-shielding layer 795 and a phosphor layer 79 18 in that it does not have the display device 700 shown in FIG.

[0207] An example of a method for manufacturing the display device 700A shown in FIG. 24 will be described with reference to FIGS. 25 and 26. 25 and 26 show steps in a method for producing the display device 700A. 7 is a schematic cross-sectional view of the display device 7 described above until the insulating layer 770 is formed. Since the description of the manufacturing method of 00 can be used, detailed description will be omitted.

[0208] <Formation of Conductive Layer 772 and Conductive Layer 774> Subsequently, a conductive layer 772 and a conductive layer 774 are formed on the insulating layer 770 (FIG. 25A). The insulating layer 770 is electrically connected to the transistor 750 through an opening in the insulating layer 770. The conductive layer 772 and the conductive layer 774 can be formed by a method similar to that for the conductive layer 301, etc. .

[0209] Subsequently, conductive bumps 791 and 792 are formed on the conductive layers 772 and 774, respectively. The bumps 791 and 793 are formed using gold, silver, tin, or the like (FIG. 25B). Metals such as these, alloys containing these metals, anisotropic conductive films such as conductive resins, conductive The bumps 791 and 793 can be formed by a printing method, a transfer method, or the like. A transfer method, a discharge method, etc. can be used.

[0210] For example, a silver paste is used for the bumps 791 and 793, and a conductive layer 772 and a conductive The conductive layer 774 can be made of one or more of APC, aluminum, titanium, and copper. With such a structure, the light-emitting element 782 can be formed by using the conductive layer 772 and the conductive layer 774. It is possible to achieve good electrical connection with each of them.

[0211] <Arrangement of light-emitting element 782> Next, the light emitting element 782 is disposed on the bumps 791 and 793. It is preferable to use a surface mount type LED package as 82, as exemplified in FIG. At the time of placement, the cathode side electrode and the anode side electrode of the light emitting element 782 are respectively connected to the bumps 791 and The light emitting element 782 is disposed so as to be in contact with the bump 793. The light emitting element 782, the conductive layer 772, and the conductive layer 774 are pressed together, and the conductive layer 772 and the conductive layer 774 are A light-emitting element 782 is fixed on the conductive layer 774. , and the light emitting element 782 are electrically connected (FIG. 26A).

[0212] A pick-and-place device can be used to place the light emitting element 782. In addition, the FSA method may be used for arranging the light-emitting element 782. Since the LED chip used for 782 is one type, it is difficult to compare it with the case where multiple types are used. This makes it easier to arrange the light emitting element 782.

[0213] <Formation of Colored Layer> Next, a light-shielding layer 738 and a colored layer 736 are formed on the substrate 705 (FIG. 26B). The above-described method for producing the display device 700 can be used for the layer 738 and the colored layer 736. , detailed explanation will be omitted.

[0214] <Bonding of substrate 701 and substrate 705> Next, a bonding agent is applied to either or both of the substrates 701 and 705. The substrate 701 and the substrate 705 are bonded together in the same manner as in the manufacturing method of the display device 700 described above. Detailed explanation will be omitted as the explanation in the law can be used.

[0215] Next, an anisotropic conductive film 780 is provided on the wiring 760. By placing 716 and bonding it by heat, the wiring 760 and the FPC 716 are electrically connected. Can.

[0216] Through the above steps, the display device 700A can be formed (FIG. 24).

[0217] <Example of configuration in which an input device is provided on a display device> Moreover, the display devices shown in Figs. 18, 19 and 24 may be provided with an input device. An example of the device is a touch sensor.

[0218] For example, the sensor types include capacitance type, resistive film type, surface acoustic wave type, infrared type, etc. Various methods can be used, such as a pressure-sensitive, optical, or pressure-sensitive method. Or, two or more of these can be used. may be used in combination.

[0219] The touch panel is configured as a so-called in-cell type, in which the input device is formed inside a pair of substrates. A touch panel of the type, an input device is formed on the display device 700, so-called an on-cell type touch panel. A so-called out-cell type touch panel, in which a panel or an input device is attached to the display device 700, is used. There are also chip panels.

[0220] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0221] (Embodiment 4) In this embodiment mode, a transistor that can be used in the display device shown in the previous embodiment mode is An example of the data will be described below.

[0222] The display device of one embodiment of the present invention includes a bottom-gate transistor or a top-gate transistor. The present invention can be implemented using various types of transistors, such as transistors having different shapes, such as transistors having different shapes. The semiconductor layer material and transistor structure can be easily replaced to suit the production line. It is possible.

[0223] <Bottom-gate transistor> FIG. 27A1 shows a channel protection transistor, which is a type of bottom gate transistor. 27A1 is a cross-sectional view of the transistor 1810 in the channel length direction. 10 is formed on a substrate 1771. Also, the transistor 1810 is formed on the substrate 1771. An electrode 1746 is provided on the insulating layer 1772. 26 and has a semiconductor layer 1742. The electrode 1746 can function as a gate electrode. The insulating layer 1726 can function as a gate insulating layer.

[0224] In addition, an insulating layer 1741 is provided over a channel formation region of the semiconductor layer 1742. Electrodes 1744a and 1744b are disposed on the insulating layer 1726 in contact with a portion of the insulating layer 1742. The electrode 1744a can function as either a source electrode or a drain electrode. The electrode 1744b can function as the other of the source and drain electrodes. A portion of electrode 1744 a and a portion of electrode 1744 b are formed on insulating layer 1741 .

[0225] The insulating layer 1741 can function as a channel protection layer. By providing 741, the semiconductor layer generated when forming the electrodes 1744a and 1744b is Therefore, the shape of the electrode 1744a and the electrode 1744b can be prevented from being exposed. This can prevent the channel formation region of the semiconductor layer 1742 from being etched during the formation of the semiconductor layer 1742. According to one embodiment of the present invention, a transistor with favorable electrical characteristics can be provided.

[0226] The transistor 1810 also includes an electrode 1744a, an electrode 1744b, and an insulating layer 174 1 has an insulating layer 1728 thereon, and an insulating layer 1729 thereon.

[0227] When an oxide semiconductor is used for the semiconductor layer 1742, the electrodes 1744a and 1744b At least the portion in contact with the semiconductor layer 1742 is formed by removing oxygen from a portion of the semiconductor layer 1742. It is preferable to use a material that can generate oxygen vacancies. The region where oxygen vacancies occur in the n-type region (n + Therefore, the region functions as a source region or a drain region. When an oxide semiconductor is used for the semiconductor layer 1742, oxygen can be removed from the semiconductor layer 1742. Examples of materials that can remove oxygen and cause oxygen deficiencies include tungsten, titanium, etc. The following can be mentioned.

[0228] The source region and the drain region are formed in the semiconductor layer 1742, whereby the electrode 17 The contact resistance between the semiconductor layer 1742 and the electrodes 1744a and 1744b can be reduced. This makes it possible to improve the electrical characteristics of the transistor, such as the field effect mobility and the threshold voltage. It is possible.

[0229] When a semiconductor such as silicon is used for the semiconductor layer 1742, the semiconductor layer 1742 and the electrode 1 744a and between the semiconductor layer 1742 and the electrode 1744b. It is preferable to provide a layer that functions as a semiconductor. The functional layer can function as a source or drain region of a transistor. .

[0230] The insulating layer 1729 prevents or reduces the diffusion of impurities from the outside into the transistor. It is preferable to form the insulating layer 1729 using a material having a function. can also be omitted.

[0231] The transistor 1811 shown in FIG. 27A2 has a back gate electrode on an insulating layer 1729. The transistor 1723 differs from the transistor 1810 in that it has an electrode 1723 that can function as a can be formed from materials and in a manner similar to that of electrode 1746.

[0232] In general, the back gate electrode is formed of a conductive layer, and the gate electrode and the back gate electrode form a semiconductor. The back gate electrode is disposed so as to sandwich the channel forming region of the gate electrode. The back gate electrode can be made to function in the same manner as the gate electrode. Alternatively, the potential may be a ground potential (GND potential) or an arbitrary potential. By changing the potential of the gate electrode independently of the potential of the gate electrode, the transistor can be The threshold voltage can be varied.

[0233] In addition, both the electrode 1746 and the electrode 1723 can function as gate electrodes. Therefore, the insulating layer 1726, the insulating layer 1741, the insulating layer 1728, and the insulating layer 17 Each of the electrodes 1723 can function as a gate insulating layer. It may be provided between insulating layer 1728 and insulating layer 1729 .

[0234] When one of the electrodes 1746 and 1723 is referred to as a "gate electrode," the other is For example, in the transistor 1811, the electrode 1723 is When referring to a "gate electrode," the electrode 1746 is referred to as a "back gate electrode." When 723 is used as a "gate electrode", the transistor 1811 is a top-gate type It can be considered as a kind of transistor. One of them may be called the "first gate electrode" and the other the "second gate electrode." be.

[0235] By providing the electrode 1746 and the electrode 1723 with the semiconductor layer 1742 interposed therebetween, By setting the electrode 1746 and the electrode 1723 to the same potential, the capacitance is increased in the semiconductor layer 1742. The flow area of ​​the rear becomes larger in the film thickness direction, so the amount of carrier movement increases. As a result, the on-state current of the transistor 1811 is increased and the field effect mobility is also increased. It becomes.

[0236] Therefore, the transistor 1811 is a transistor having a large on-current relative to its area. That is, the occupancy rate of the transistor 1811 is According to one embodiment of the present invention, the area occupied by a transistor can be reduced. Therefore, according to one embodiment of the present invention, a highly integrated semiconductor device can be realized. It can be realized.

[0237] In addition, since the gate electrode and the back gate electrode are formed of a conductive layer, the outside of the transistor The function of preventing the electric field generated by the electrostatic discharge from acting on the semiconductor layer in which the channel is formed (especially the electrostatic discharge The back gate electrode is larger than the semiconductor layer. By forming the semiconductor layer in a thin layer and covering it with a back gate electrode, the electric field shielding function can be improved. do.

[0238] In addition, by forming the back gate electrode with a conductive film having a light shielding property, This prevents light from entering the semiconductor layer from the electrode side. This prevents degradation of electrical characteristics such as a shift in the threshold voltage of a transistor. do.

[0239] According to one embodiment of the present invention, a highly reliable transistor can be provided. As a result, a highly reliable semiconductor device can be realized.

[0240] FIG. 27B1 shows a channel protection type transistor 1820 having a different configuration from that shown in FIG. 27A1. A cross-sectional view in the channel length direction. The transistor 1820 is substantially the same as the transistor 1810. It has a similar structure, but the difference is that the insulating layer 1741 covers the edge of the semiconductor layer 1742. Also, the insulating layer 1741 overlapping the semiconductor layer 1742 is selectively removed to form In the opening, the semiconductor layer 1742 and the electrode 1744a are electrically connected to each other. Another opening is formed by selectively removing a portion of the insulating layer 1741 that overlaps the semiconductor layer 1742. In the portion, the semiconductor layer 1742 and the electrode 1744b are electrically connected to each other. The region of 1 that overlaps with the channel formation region can function as a channel protection layer.

[0241] The transistor 1821 shown in FIG. 27B2 has a back gate electrode on an insulating layer 1729. The transistor 1720 differs from the transistor 1820 in that it has an electrode 1723 that can function as a transistor.

[0242] By providing the insulating layer 1729, the insulating layer 1729 can be prevented from being generated during the formation of the electrodes 1744a and 1744b. Therefore, the electrode 1744a and the semiconductor layer 1742 can be prevented from being exposed. This can prevent the semiconductor layer 1742 from becoming thin when 44b is formed.

[0243] In addition, the transistors 1820 and 1821 are the transistors 1810 and and transistor 1811, the distance between electrode 1744a and electrode 1746, and the distance between electrode 1 The distance between electrode 1744a and electrode 1746 is increased. In addition, the parasitic capacitance between the electrode 1744b and the electrode 1746 can be reduced. According to one aspect of the present invention, the parasitic capacitance occurring between the A good transistor can be realized.

[0244] The transistor 1825 shown in FIG. 27C1 is one of the bottom gate transistors. 18 is a cross-sectional view of a channel-etched transistor 1825 in the channel length direction. The transistor 1825 has electrodes 1744a and 1744b without the insulating layer 1741. Therefore, the semiconductor layer exposed when the electrodes 1744a and 1744b are formed In some cases, a part of the insulating layer 1742 may be etched. The productivity of transistors can be improved.

[0245] A transistor 1826 shown in FIG. 27C2 has a back gate electrode on an insulating layer 1729. The transistor 1723 differs from the transistor 1825 in that it has an electrode 1723 that can function as a transistor.

[0246] In FIG. 28A1 to FIG. 28C2, transistors 1810, 1811, 1820, 1821, 1825 and 1826 are cross-sectional views in the channel width direction, respectively.

[0247] In the structures shown in FIG. 28B2 and FIG. 28C2, the gate electrode and the back gate electrode are connected. The gate electrode and the back gate electrode have the same potential. It is sandwiched between the gate electrode and the back gate electrode.

[0248] The length of each of the gate electrode and the back gate electrode in the channel width direction is The length of the semiconductor layer 1742 in the channel width direction is longer than the length of the semiconductor layer 1742 in the channel width direction. The insulating layers 1726, 1741, 1728, and 1729 are sandwiched between the gate electrode and the backgate electrode. The structure is covered with a gate electrode.

[0249] With this structure, the semiconductor layer 1742 included in the transistor is The gate electrode can be electrically surrounded by the electric field of the back gate electrode.

[0250] As in the transistor 1821 or the transistor 1826, a gate electrode and a back The electric field of the gate electrode electrically connects the semiconductor layer 1742 in which the channel formation region is to be formed. The device structure of the surrounding transistor is called the Surrounded channel (Sc This can be called a channel structure.

[0251] By adopting an S-channel structure, one or both of the gate electrode and back gate electrode By both, an electric field for inducing a channel is effectively applied to the semiconductor layer 1742. This improves the current drive capability of the transistor and provides high on-current characteristics. In addition, since the on-current can be increased, the transistor can be miniaturized. In addition, the S-channel structure improves the functionality of the transistor. The mechanical strength can be increased.

[0252] <Top-gate transistor> The transistor 1842 illustrated in FIG. 29A1 is one of the top-gate transistors. The transistor 1842 is formed by forming an insulating layer 1729 and then forming electrodes 1744a and The transistor 1810 differs from the transistor 1820 in that an electrode 1744b is formed. The electrodes 1744a and 1744b are formed on the insulating layers 1728 and 1729. The insulating layer 1742 is electrically connected to the semiconductor layer 1742 in the opening.

[0253] In addition, a part of the insulating layer 1726 that does not overlap the electrode 1746 is removed, and the electrode 1746 and the removed The remaining insulating layer 1726 is used as a mask to introduce impurities into the semiconductor layer 1742. By this, an impurity region is formed in the semiconductor layer 1742 in a self-aligned manner. The transistor 1842 can be constructed such that the insulating layer 1726 extends beyond the edge of the electrode 1746. A region in which impurities are introduced through the insulating layer 1726 of the semiconductor layer 1742 The impurity concentration in this region is lower than that in a region into which the impurities are introduced without passing through the insulating layer 1726. The semiconductor layer 1742 is doped with LDD (Lightly Doped) in the area not overlapping with the electrode 1746. ed Drain) region is formed.

[0254] The transistor 1843 shown in FIG. 29A2 has an electrode 1723, which is the same as the transistor 1 The transistor 1843 is different from the transistor 842. The electrode 1723 has a region overlapping with the semiconductor layer 1742 via the insulating layer 1772. The electrode 1723 can function as a backgate electrode.

[0255] Also, the transistor 1844 shown in FIG. 29B1 and the transistor 1842 shown in FIG. As shown at 845, all of the insulating layer 1726 in areas that do not overlap with the electrode 1746 may be removed. In addition, the transistor 1846 shown in FIG. 29C1 and the transistor 1847 shown in FIG. As at 847, insulating layer 1726 may be left.

[0256] After the electrode 1746 is formed, the transistors 1843 to 1847 are also The electrode 1746 is used as a mask to introduce impurities into the semiconductor layer 1742, thereby forming a semiconductor layer According to one aspect of the present invention, the impurity region can be formed in a self-aligned manner in the semiconductor substrate 1742. According to one embodiment of the present invention, a transistor having a good integration density can be realized. Therefore, a semiconductor device with high performance can be realized.

[0257] In FIG. 30A1 to FIG. 30C2, transistors 1842, 1843, 1844, 1845, 1846 and 1847 are cross-sectional views in the channel width direction, respectively.

[0258] Transistor 1843, transistor 1845, and transistor 1847 are Each of these has the S-channel structure described above. However, this is not limited to this, and the transistor Transistor 1843, transistor 1845, and transistor 1847 are connected to the S-channel It does not have to be an l structure.

[0259] The following describes metal oxides that can be suitably used for the channel formation region of a transistor. We will explain about this.

[0260] The semiconductor material used in the transistor is preferably a material having an energy gap of 2 eV or more. Metal oxides having a polarization of at least 2.5 eV, more preferably at least 3 eV, can be used. A typical example is a metal oxide containing indium, such as the CAC-OS etc. can be used.

[0261] Metal oxides with a wider band gap and lower carrier concentration than silicon are used. Due to the low off-state current of the transistor, The accumulated charge can be retained for a long period of time.

[0262] The semiconductor layer may be, for example, indium, zinc, and M (aluminum, titanium, gallium, germanium, etc.). Rumanium, yttrium, zirconium, lanthanum, cerium, tin, neodymium or The film can be expressed as an In-M-Zn oxide film containing metals such as hafnium. .

[0263] When the metal oxide constituting the semiconductor layer is an In-M-Zn oxide, The atomic ratio of metal elements in the sputtering target used to deposit a film is In≧M It is preferable that Zn≧M is satisfied. The atomic ratios are In:M:Zn=1:1:1, In:M:Zn=1:1:1.2, In :M:Zn=3:1:2, In:M:Zn=4:2:3, In:M:Zn=4:2:4. 1, In:M:Zn=5:1:6, In:M:Zn=5:1:7, In:M:Zn=5: The atomic ratio of the semiconductor layers to be formed is preferably 1:8 or the like. This includes a ±40% variation in the atomic ratio of metal elements contained in the ring target.

[0264] In particular, hydrogen contained in metal oxides reacts with oxygen that bonds with metal atoms to form water. In this case, oxygen vacancies may be formed in the metal oxide. If a defect is present, the transistor may have normally-on characteristics. The defect where hydrogen has entered the oxygen vacancy acts as a donor and generates electrons as carriers. In addition, some of the hydrogen may bond with oxygen, which bonds with metal atoms, and become carriers. Therefore, transistors using metal oxides containing a large amount of hydrogen may be The starter tends to have normally-on characteristics.

[0265] The defect where hydrogen has entered the oxygen vacancy can function as a donor for the metal oxide. However, it is difficult to quantitatively evaluate the defects. Therefore, in this specification, the term "metal" is used to refer to the carrier concentration rather than the metal concentration. As a parameter of the oxide, instead of the donor concentration, we use the capacitance assuming a state in which no electric field is applied. In other words, the "carrier concentration" described in this specification is the "dop This can sometimes be rephrased as "ner concentration."

[0266] In addition, it is preferable that the amount of hydrogen in the metal oxide is reduced as much as possible. In metal oxides, secondary ion mass spectrometry (SIMS) The hydrogen concentration obtained by mass spectrometry was 1×10 20 ato ms / cm 3 Less than 1 x 10 19 atoms / cm 3 Less than 5, more preferably ×10 18 atoms / cm 3 less than 1×10 18 atoms / cm 3 The metal oxide with sufficiently reduced impurities such as hydrogen is used as the channel of the transistor. By using it in the formation region, stable electrical characteristics can be imparted.

[0267] The carrier concentration of the metal oxide that functions as the channel formation region is 1×10 18 c m -3 It is preferable that the value is less than 1×10 17 cm -3 More preferably, it is less than , 1×10 16 cm -3 More preferably, it is less than 1×10 13 cm -3 Less than More preferably, 1×10 12 cm -3 It is even more preferable that the amount is less than 1000 μm. Regarding the lower limit of the carrier concentration of the metal oxide in the region that functions as the channel formation region, There is no particular limit to the value, but for example, 1×10 -9cm -3 It can be said that:

[0268] The above metal oxides are referred to as high-purity intrinsic or substantially high-purity intrinsic metal oxides. Metal oxides have a low density of defect states and can be said to have stable properties.

[0269] In addition, the semiconductor characteristics and electrical characteristics (electric field characteristics) of the required transistors are not limited to these. A metal oxide having an appropriate composition may be used depending on the material (e.g., effective mobility, threshold voltage, etc.). In order to obtain the required semiconductor characteristics of a transistor, the carrier concentration and impurity concentration of the semiconductor layer are adjusted. The degree of crystallization, defect density, atomic ratio of metal elements to oxygen, interatomic distance, density, etc. must be appropriate. is preferred.

[0270] In the metal oxides that make up the semiconductor layer, silicon and carbon, which are group 14 elements, If it is included, oxygen vacancies will increase in the semiconductor layer, causing it to become n-type. The silicon and carbon concentrations in the layer (obtained by secondary ion mass spectrometry) were calculated by 2× 10 18 atoms / cm 3 Less than or equal to 2 x 10 17 atoms / cm 3 The following do.

[0271] In addition, alkali metals and alkaline earth metals generate carriers when bonded with metal oxides. This may result in an increase in the off-state current of the transistor. Alkaline or alkaline earth metals in body layers obtained by secondary ion mass spectrometry. The concentration of is 1×10 18 atoms / cm 3 Less than or equal to 2 x 10 16 atoms / cm3 To the following:

[0272] In addition, if the metal oxide that makes up the semiconductor layer contains nitrogen, the electrons that act as carriers This causes the carrier concentration to increase, making it easier to convert to n-type. Transistors using this material tend to be normally-on. The nitrogen concentration obtained by secondary ion mass spectrometry is 5×10 18 atoms / cm 3 below It is preferable to set

[0273] Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. As a single-crystal oxide semiconductor, CAAC-OS (c-axis-aligned crystal-like oxide semiconductor) stalline oxide semiconductor), polycrystalline oxide semiconductor, nc-OS(nanocrystalline oxide semiconductor r), pseudo-amorphous oxide semiconductor (a-like OS: amorphous-like Examples of semiconductors include amorphous oxide semiconductors, amorphous oxide semiconductors, and amorphous oxide semiconductors.

[0274] In addition, the semiconductor layer of the transistor disclosed in one embodiment of the present invention may include CAC-OS(Cl oud-Aligned Composite oxide semiconducto r) may also be used.

[0275] Note that the semiconductor layer of the transistor disclosed in one embodiment of the present invention is In addition, a non-single-crystal oxide semiconductor or a CAC-OS can be preferably used. As the OS, nc-OS or CAAC-OS can be preferably used.

[0276] Note that in one embodiment of the present invention, a CAC-OS is used for a semiconductor layer of a transistor. By using CAC-OS, it is possible to provide a transistor with high electrical characteristics or high signal reliability. It can provide reliability.

[0277] The semiconductor layer is divided into a CAAC-OS region, a polycrystalline oxide semiconductor region, and an nc-OS region. a region of a pseudo-amorphous oxide semiconductor, and a region of an amorphous oxide semiconductor. The mixed film may be, for example, a film having two or more of the above-mentioned regions. The layer structure may be a single layer structure including the above-mentioned regions, or a laminate structure.

[0278] The following describes a CAC-O transistor that can be used in the transistor disclosed in one embodiment of the present invention. The configuration of S will be explained.

[0279] CAC-OS is a type of metal oxide in which the elements constituting the metal oxide are 0.5 nm to 10 nm in diameter. Preferably, the material is unevenly distributed in a size range of 1 nm to 2 nm or less, or in the vicinity thereof. In the following, in the case of metal oxides, one or more metal elements are polarized. The region having the metal element has a size of 0.5 nm or more and 10 nm or less, preferably 1 nm or less. A mixed state with a size of 2 nm or less or close to that size is called a mosaic or patch state. Also called.

[0280] The metal oxide preferably contains at least indium. In addition to these, aluminum, gallium, yttrium, and zinc are preferably contained. Thorium, copper, vanadium, beryllium, boron, silicon, titanium, iron, nickel, Rumanium, zirconium, molybdenum, lanthanum, cerium, neodymium, hafnium, Contains one or more of the following: tantalum, tungsten, or magnesium. It may be included.

[0281] For example, CAC-OS in In-Ga-Zn oxide (In- The Ga-Zn oxide may be specifically referred to as CAC-IGZO. (hereinafter referred to as InO X1 (X1 is a real number greater than 0.) or Indium Zinc Oxide (hereinafter, In X2 Zinc Y2 O Z2 (X2, Y2, and Z2 are real numbers greater than 0. ) and gallium oxide (GaO X3 (X3 is a real number greater than 0) ), or gallium zinc oxide (Ga X4 Zinc Y4 O Z4 (X4, Y4, and Z1 and Z2 are real numbers greater than 0.) The material is separated into a mosaic pattern. The mosaic-like InO X1 , or In X2 Zinc Y2 O Z2 is uniformly distributed in the film. This is a configuration (hereinafter also referred to as a cloud-like configuration).

[0282] In other words, CAC-OS is X3 The region where In is the main component and X2 Zinc Y2 O Z2 , or InO X1 A composite metal oxide having a structure in which a region in which In this specification, for example, the atomic ratio of In to the element M in the first region is is greater than the atomic ratio of In to the element M in the second region. Assume that the In concentration is higher than in region 2.

[0283] IGZO is a common name and refers to a compound made of In, Ga, Zn, and O. A typical example is InGaO3(ZnO). m1 (m1 is a natural number), or In (1+x0) Ga (1-x0) O3(ZnO) m0 (-1≦x0≦1, m0 is an arbitrary number) Examples of the crystalline compound include those represented by the following formula:

[0284] The crystalline compound has a single crystal structure, a polycrystalline structure, or a CAAC structure. The CAAC structure is a structure in which multiple IGZO nanocrystals have a c-axis orientation and are aligned on the ab plane. In the case of ZnO, the crystal structure is non-oriented and connected.

[0285] On the other hand, CAC-OS is a material structure of metal oxide. In a material composition containing a, Zn, and O, some of the nanoparticles are observed to be mainly composed of Ga. The regions where the In nanoparticles are observed are the same as those where the In nanoparticles are observed as the main component. This refers to a structure in which the crystals are randomly distributed in a mosaic pattern. Structure is a secondary factor.

[0286] Note that CAC-OS does not include a laminated structure of two or more films with different compositions. For example, a structure consisting of two layers, one containing In as the main component and the other containing Ga as the main component, Not at all.

[0287] In addition, GaO X3 The region where In is the main component and X2 Zinc Y2 OZ2 , or InO X1 In some cases, it may be difficult to observe a clear boundary between the region in which the main component is the

[0288] Instead of gallium, aluminum, yttrium, copper, vanadium, and beryllium are used. Aluminum, boron, silicon, titanium, iron, nickel, germanium, zirconium, molybdenum lanthanum, cerium, neodymium, hafnium, tantalum, tungsten, or magnesium If one or more selected species from the group consisting of uranium, uranium, etc. are included, CAC-OS will In one area, the metal element is observed as a nanoparticle, and in another area, In is observed as a nanoparticle. The nanoparticle-like regions are randomly distributed in a mosaic pattern. This refers to.

[0289] CAC-OS is formed by sputtering without intentionally heating the substrate. In addition, when the CAC-OS is formed by a sputtering method, the deposition gas The gas is selected from an inert gas (typically argon), oxygen gas, and nitrogen gas. One or more of these may be used. The lower the flow rate ratio of the gas, the more preferable. For example, the flow rate ratio of oxygen gas is preferably 0% or more and less than 30%. Or, it is preferable to set it to 0% or more and 10% or less.

[0290] CAC-OS is a method for measuring X-ray diffraction (XRD). When measured using the out-of-plane θ / 2θ scan, In other words, no clear peaks are observed in the X-ray diffraction measurement. It can be seen that no orientation in the ab plane direction or the c-axis direction of the fixed region is observed.

[0291] In addition, CAC-OS uses an electron beam with a probe diameter of 1 nm (also called a nanobeam electron beam). In the electron diffraction pattern obtained by irradiating the sample, a ring-shaped area of ​​high brightness (phosphorescence) is observed. The electron diffraction pattern shows that the ring region is dominated by a number of bright spots. The crystal structure of CAC-OS has no orientation in the planar direction and the cross-sectional direction. It can be seen that it has a c (nano-crystal) structure.

[0292] For example, in the CAC-OS of In-Ga-Zn oxide, the energy dispersive X Energy Dispersive X-ray spectroscopy (EDX) The EDX mapping obtained using scopy revealed that GaO X3 The area where is the main component And, In X2 Zinc Y2 O Z2 , or InO X1 The areas where the main component is It can be confirmed that the compound has a structure similar to that shown in FIG.

[0293] CAC-OS has a structure different from that of IGZO compounds in which metal elements are uniformly distributed. It has different properties from GZO compounds. That is, CAC-OS is GaO X3 The main components are and the region where In X2 Zinc Y2 O Z2 , or InO X1 The region where is the main component and the region where is The phase is gradually separated, and the regions each consisting of one element as a main component are arranged in a mosaic pattern.

[0294] Here, In X2 Zinc Y2 O Z2 , or InO X1The area where GaO is the main component X This is a region with high conductivity compared to the region where In 3 is the main component. X2 Zinc Y2 O Z2 , or InO X1 The carriers flow through the area where the main component is gold. Therefore, the conductivity of In is expressed as a metal oxide. X2 Zinc Y2 O Z2 , or InO X The regions where 1 is the main component are distributed in a cloud-like shape in the metal oxide, which leads to high field effect transfer. Mobility (μ) can be achieved.

[0295] On the other hand, GaO X3 The region where the main components are In X2 Zinc Y2 O Z2 , or InO X1 This region has higher insulating properties than the region where GaO is the main component. X3 etc. The distribution of the region in which the main component is is in the metal oxide suppresses leakage current and provides good switching performance. Switching operation can be achieved.

[0296] Therefore, when CAC-OS is used in a semiconductor device, GaO X3 Insulation and , In X2 Zinc Y2 O Z2 , or InO X1 The conductivity caused by the This results in a high on-state current (I on ), and high field-effect mobility (μ) can be done.

[0297] In addition, semiconductor devices using CAC-OS have high reliability. It is ideal for a variety of semiconductor devices including displays.

[0298] In addition, a transistor having a CAC-OS semiconductor layer has high field-effect mobility and Because of its high dynamic capability, the transistor is connected to a driving circuit, typically a scanning transistor which generates a gate signal. By using this in a line driver circuit, it is possible to provide a display device with a narrow frame width (also called a narrow frame). In addition, the transistor can be used in a signal line driver circuit (particularly, a signal line driver (Demultiplexer connected to the output terminal of a shift register in a drive circuit) Therefore, it is possible to provide a display device having a small number of wires connected to the display device.

[0299] In addition, the transistor with CAC-OS in the semiconductor layer is a transistor using low-temperature polysilicon. Unlike conventional transistors, no laser crystallization process is required. It is possible to reduce the manufacturing cost even for ultra-high visibility display devices. ("4K resolution", "4K2K", "4K"), Super Hi-Vision ("8K resolution" For large display devices with high resolutions such as 8K, 1080p, 1280p, 1600p, 18K4K, 8K) By using a transistor having a CAC-OS semiconductor layer in a driver circuit and a display portion, This is preferable because writing can be performed in a short time and display defects can be reduced.

[0300] Alternatively, silicon may be used as the semiconductor in which the channel of the transistor is formed. Although amorphous silicon may be used as the capacitor, it is particularly preferable to use silicon having crystallinity. For example, microcrystalline silicon, polycrystalline silicon, single crystal silicon, etc. are used. In particular, polycrystalline silicon can be formed at a lower temperature than single crystal silicon. It also has higher field effect mobility and higher reliability than amorphous silicon.

[0301] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0302] (Embodiment 5) In this embodiment, a display device which is one embodiment of the present invention will be described.

[0303] The display device shown in FIG. 31A includes a pixel portion 502, a driver circuit portion 504, and a protection circuit 506. , and a terminal portion 507. Note that the protection circuit 506 does not necessarily have to be provided.

[0304] The transistors in the pixel portion 502 and the driver circuit portion 504 are the transistors of one embodiment of the present invention. In addition, the protection circuit 506 can also use the transistor of one embodiment of the present invention. may be applied.

[0305] The pixel section 502 is a multi-layered pixel array arranged in X rows and Y columns (X and Y are each independently a natural number of 2 or more). The pixel circuit 501 includes a number of pixel circuits 501 for driving a number of display elements.

[0306] The driver circuit unit 504 includes a gate driver that outputs scanning signals to the scanning lines GL_1 to GL_X. 504a, a source driver 50 for supplying data signals to the data lines DL_1 to DL_Y. The gate driver 504a includes at least a shift register. The source driver 504b may be, for example, a plurality of analog switches. Also, the source driver 504b is configured using a shift register, etc. may be configured as follows.

[0307] The terminal unit 507 is a terminal for inputting power, control signals, image signals, etc. from an external circuit to the display device. This refers to the part where terminals are provided for connecting the power supply to the power source.

[0308] When a potential outside a certain range is applied to the wiring to which the protection circuit 506 is connected, the protection circuit The protection circuit 506 shown in FIG. For example, the scanning lines GL_1 to GL_2, which are wiring between the gate driver 504a and the pixel circuit 501, _X, or the data line DL_ which is the wiring between the source driver 504b and the pixel circuit 501 1 to DL_Y.

[0309] The gate driver 504a and the source driver 504b are connected to the pixel section 502 and The gate driver circuit or the source driver circuit may be provided on the same substrate. A separately formed substrate (for example, a driving circuit substrate formed of a single crystal semiconductor film or a polycrystalline semiconductor film) The board is bonded to the substrate by COG or TAB (Tape Automated Bonding). The configuration may be such that the above-mentioned is implemented in the above-mentioned embodiment.

[0310] In addition, the pixel circuits 501 shown in FIG. 31A may be configured as shown in FIG. 31B. The pixel circuit 501 shown in FIG. The pixel circuit 501 includes a pixel electrode 54, a capacitor 562, and a light-emitting element 572. The data line DL_n, the scanning line GL_m, the potential supply line VL_a, the potential supply line VL_b, etc. are connected to It is being done.

[0311] A high power supply potential VDD is applied to one of the potential supply lines VL_a and VL_b. A low power supply potential VSS is applied to the gate of the transistor 554. The current flowing through the light-emitting element 572 is controlled in accordance with the potential applied to the light-emitting element 572. The brightness of the light emitted from 72 is controlled.

[0312] As the transistor 554 in the pixel circuit 501 shown in FIG. An example of using a transistor is shown in FIG. 32A. The pixel includes a pixel 552, a transistor 554a, a capacitor 562, and a light-emitting element 572a. The transistor 552 is an n-channel transistor, and the transistor 554a is an n-channel For example, the transistor 552 may be the same as the transistor 552 shown in the above embodiment. A transistor having an oxide semiconductor in a channel formation region is used as the transistor 55. A transistor having silicon in a channel formation region can be used as 4a.

[0313] For example, the transistor 552 and the transistor 554a may be the same as those in the above embodiment. The transistor having an oxide semiconductor in a channel formation region shown in FIG. This structure reduces the area that the transistor occupies within the pixel, enabling extremely high-resolution images. The image can be displayed.

[0314] In the pixel circuit 501 shown in FIG. 32A, the source or drain of the transistor 552 One of the terminals is electrically connected to the data line DL_n. The other drain is connected to one electrode of the capacitor 562 and the gate of the transistor 554a. The other electrode of the capacitor 562 is electrically connected to the potential supply line VL_a. The gate of the transistor 552 is electrically connected to the scan line GL_m. One of the source and drain of the transistor 554a is electrically connected to the potential supply line VL_a. The other of the source and the drain of the transistor 554a is connected to the The other electrode of the light emitting element 572a is electrically connected to the potential supply line VL_ The potential supply line VL_a is electrically connected to the potential supply line VL_b. A high power supply potential VDD is applied to the supply line VL_b.

[0315] A configuration different from that of the pixel circuit 501 shown in FIG. 32A is shown in FIG. In the circuit 501, one of the source and drain of the transistor 552 is connected to the data line D The other of the source and drain of the transistor 552 is electrically connected to a capacitor One electrode of the capacitor 562 and the gate of the transistor 554a are electrically connected to The gate of the transistor 552 is electrically connected to the scan line GL_m. One of the source and drain of 554a is electrically connected to the potential supply line VL_a. The other of the source and the drain of the transistor 554a is connected to the other electrode of the capacitor 562. and electrically connected to one electrode of the light-emitting element 572a. The electrode is electrically connected to the potential supply line VL_b. A VDD is applied, and a low power supply potential VSS is applied to the potential supply line VL_b.

[0316] As the transistor 554 in the pixel circuit 501 shown in FIG. An example using a transistor is shown in FIG. 32C. The light-emitting element 572a includes a capacitor 552, a transistor 554b, a capacitor 562, and a light-emitting element 572a. The transistor 552 is an n-channel transistor, and the transistor 554b is a p-channel transistor. For example, the transistor 552 may be the same as the transistor 552 shown in the above embodiment. A transistor having an oxide semiconductor in a channel formation region is used as the transistor 55. As 4b, a transistor having silicon in a channel formation region can be used.

[0317] In the pixel circuit 501 shown in FIG. 32C, the source or drain of the transistor 552 One of the terminals is electrically connected to the data line DL_n. The other drain is connected to one electrode of the capacitor 562 and the gate of the transistor 554b. The other electrode of the capacitor 562 is electrically connected to the potential supply line VL_a. The gate of the transistor 552 is electrically connected to the scan line GL_m. One of the source and drain of the transistor 554b is electrically connected to the potential supply line VL_a. The other of the source and the drain of the transistor 554a is connected to the The other electrode of the light emitting element 572a is electrically connected to the potential supply line VL_ A high power supply potential VDD is applied to the potential supply line VL_a, and the potential supply The supply line VL_b is supplied with the low power supply potential VSS.

[0318] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0319] (Embodiment 6) A pixel circuit having a memory for correcting a gray scale displayed in a pixel and a display device having the pixel circuit The transistors exemplified in the above embodiments are used in the following pixel devices. The present invention can be applied to transistors used in circuits.

[0320] <Circuit configuration> FIG. 33A shows a circuit diagram of a pixel circuit 400. The pixel circuit 400 includes a transistor M1, The pixel circuit 400 includes a transistor M2, a capacitor C1, and a circuit 401. S1, the wiring S2, the wiring G1, and the wiring G2 are connected.

[0321] The transistor M1 has a gate connected to a wiring G1, a source and a drain connected to a wiring S1, The other of the source and drain is connected to one electrode of the capacitor C1. M2 has a gate connected to the wiring G2, one of the source and drain connected to the wiring S2, and one of the source and drain connected to the wiring S3. The other end of the input is connected to the other electrode of the capacitor C1 and the circuit 401, respectively.

[0322] The circuit 401 is a circuit including at least one display element. can be applied.

[0323] The node connecting the transistor M1 and the capacitor C1 is designated as N1, and the transistor M2 and the circuit 40 are designated as Let N2 be the node connecting to 1.

[0324] The pixel circuit 400 maintains the potential of the node N1 by turning off the transistor M1. In addition, by turning off the transistor M2, the voltage of the node N2 can be maintained. In addition, when the transistor M2 is in the off state, the transistor By writing a predetermined potential to node N1 via transistor M1, capacitive coupling via capacitor C1 This makes it possible to change the potential of the node N2 in response to a change in the potential of the node N1.

[0325] Here, the transistor M1, the transistor M2, or both of them may be The transistor including an oxide semiconductor, which is described above as an example, can be used. Therefore, the potentials of the nodes N1 and N2 can be maintained for a long period of time due to the extremely low off-current. In addition, when the period for which the potential of each node is held is short (specifically, when In cases where the frame frequency is 30 Hz or more, a transformer using semiconductors such as silicon A resistor may be used.

[0326] <Driving method example> Next, an example of a method of operating the pixel circuit 400 will be described with reference to FIG. 1 is a timing chart relating to the operation of the pixel circuit 400. Therefore, various resistances such as wiring resistance, parasitic capacitances of transistors and wiring, and The influence of the threshold voltage of the transistor, etc. is not taken into consideration.

[0327] In the operation shown in FIG. 33B, one frame period is divided into a period T1 and a period T2. is a period during which a potential is written to node N2, and period T1 is a period during which a potential is written to node N1. It is.

[0328] [Period T1] In the period T1, a potential that turns on the transistor is applied to both the wiring G1 and the wiring G2. In addition, the line S1 is connected to a fixed potential V ref The first data is supplied to the wiring S2. Voltage V w supplies.

[0329] The node N1 is connected to a potential V ref is given. In addition, the node N2 is supplied with a first data potential V wis given. Therefore, the capacitance C1 has a potential difference V w -V ref is held.

[0330] [Period T2] In the next period T2, a potential is applied to the wiring G1 to turn on the transistor M1. A potential for turning off the transistor M2 is applied to the line G2. Data potential V data A predetermined constant potential is applied to the wiring S2, or a floating potential is applied to the wiring S3. It may also be used as a ping.

[0331] A second data potential V data is given. At this time, due to the capacitive coupling of the capacitor C1, the second data potential V data Depending on node N That is, the first data potential Vw and the potential In FIG. 33B, the potential is input with the potential dV added. However, it may be negative. That is, the potential V data is the potential V ref Yo It may be lower.

[0332] Here, the potential dV is roughly determined by the capacitance value of the capacitor C1 and the capacitance value of the circuit 401. When the capacitance value of the capacitor C1 is sufficiently larger than the capacitance value of the circuit 401, the potential dV becomes the second Data potential V data The potential becomes close to

[0333] In this way, the pixel circuit 400 is a circuit including a display element that combines two types of data signals. Since the potential to be supplied to the line 401 can be generated, the gray scale correction can be performed within the pixel circuit 400. It will be possible to do so.

[0334] In addition, the pixel circuit 400 generates a potential that exceeds the maximum potential that can be supplied to the wirings S1 and S2. When light-emitting elements are used, it is possible to achieve high dynamic range (HDR ) display etc.

[0335] The pixel circuit 400EL shown in FIG. 33C includes a circuit 401EL. The device includes a light-emitting element EL, a transistor M3, and a capacitor C2.

[0336] The transistor M3 has a gate connected to the node N2 and one electrode of the capacitor C2, and a source and drain connected to the One of the rains is at potential V L The other is one electrode of the light-emitting element EL. The capacitor C2 is connected to the other electrode at potential V com Connect with the wiring given. The other electrode of the light-emitting element EL is at a potential V H Connect with the wiring given.

[0337] The transistor M3 has a function of controlling the current supplied to the light-emitting element EL. functions as a storage capacitor. Capacitor C2 can be omitted if not required.

[0338] In this example, the cathode side of the light-emitting element EL is connected to the transistor M3. However, as shown in FIG. 33D, a transistor M3 may be connected to the anode side. The potential V H and potential V L You can change the value as appropriate.

[0339] The pixel circuit 400EL generates a light-emitting element by applying a high potential to the gate of the transistor M3. Since a large current can be passed through the child EL, for example, HDR display can be realized. By supplying a correction signal to the wiring S1 or the wiring S2, the transistor M3 and the light-emitting element E It is also possible to correct for variations in the electrical characteristics of L.

[0340] In addition, the circuit is not limited to the circuits shown in FIG. 33C and FIG. 33D, and may include additional transistors, capacitors, etc. An additional configuration may also be used.

[0341] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination.

[0342] (Embodiment 7) In this embodiment, the configuration of a data processing device according to one embodiment of the present invention will be described with reference to FIGS. This will be explained with reference to 5.

[0343] 34 and 35 are diagrams illustrating the configuration of an information processing device according to an embodiment of the present invention. FIG. 34A is a block diagram of an information processing device, and FIG. 34B to FIG. 34E are diagrams showing the configuration of the information processing device. 35A to 35E are perspective views for explaining the configuration of an information processing device. FIG.

[0344] <Information processing device> The information processing device 5200B described in this embodiment includes an arithmetic device 5210 and an input / output device 5220 (see FIG. 34A).

[0345] The arithmetic unit 5210 has a function of receiving operation information, and generates image information based on the operation information. It has the function of supplying

[0346] The input / output device 5220 includes a display unit 5230, an input unit 5240, a detection unit 5250, and a communication unit 5 290, which has a function of supplying operation information and a function of receiving image information. The input device 5220 has a function of providing detection information, a function of providing communication information, and a function of transmitting the communication information. With the functionality provided.

[0347] The input unit 5240 has a function of supplying operation information. For example, the input unit 5240 It supplies operation information based on the operation of the user of the processing device 5200B.

[0348] Specifically, keyboards, hardware buttons, pointing devices, touch sensors The input unit includes a sensor, an illumination sensor, an imaging device, a voice input device, an eye gaze input device, and a posture detection device. Can be used for 5240.

[0349] The display unit 5230 has a display panel and a function for displaying image information. The display device shown in the embodiment can be used as the display portion 5230.

[0350] The detection unit 5250 has a function of supplying detection information. For example, It has the function of detecting the surrounding environment and providing the detected information.

[0351] Specifically, illuminance sensors, imaging devices, attitude detection devices, pressure sensors, human presence sensors, etc. It can be used in the knowledge unit 5250.

[0352] The communication unit 5290 has a function of receiving communication information and a function of supplying communication information. It has the function of connecting to other electronic devices or communication networks via wired or wired communication. Generally, it has functions such as wireless intranet communication, telephone communication, and short-range wireless communication.

[0353] <Configuration example 1 of information processing device> For example, an outer shape along a cylindrical pillar or the like can be applied to the display unit 5230 (see FIG. 3). 4B). The information processing device 5200B changes the display method according to the illuminance of the usage environment. The information processing device 5200B also detects the presence of a person and changes the display content. This allows the information processing device 5200B to be installed, for example, on a pillar of a building. Or, advertisements or information can be displayed. Or, information processing The device 5200B can be used for digital signage and the like.

[0354] <Configuration example 2 of information processing device> The information processing device 5200B generates an image based on the trajectory of a pointer used by a user, for example. It has the function of generating information (see Figure 34C). Specifically, the diagonal length is 20 inches. A display panel of 40 inches or more, preferably 55 inches or more, is used. Alternatively, multiple display panels can be arranged to form a single display area. Alternatively, multiple display panels can be arranged in a multi-screen configuration. The information processing device 5200B can be used, for example, in an electronic whiteboard, an electronic bulletin board, an electronic signboard, etc. This can be done.

[0355] <Configuration example 3 of information processing device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. (See FIG. 34D.) This allows, for example, the consumption of a smart watch (registered trademark). It is possible to reduce power consumption. Images can be displayed on a smartwatch (registered trademark) for optimal use in any situation. Cut.

[0356] <Configuration example 4 of information processing device> The information processing device 5200B includes a display unit 5230. The display unit 5230 includes, for example, The display unit 5 has a curved surface that is gently curved along the side of the housing (see FIG. 34E). 230 includes a display panel, which has a function of displaying information on the front, side and top surfaces, for example. This allows, for example, a mobile phone to display image information not only on the front but also on the sides and top. The information can be displayed.

[0357] <Configuration example 5 of information processing device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This function allows the smartphone to reduce its power consumption (see Figure 35A). Alternatively, the present invention can be suitably used in an environment with strong external light, such as outdoors on a sunny day. Images can be displayed on a smartphone in the same way.

[0358] <Configuration example 6 of information processing device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This function allows the unit to be used even when strong external light shines into the room on a sunny day. The images can be displayed on a television system for convenient use in any environment.

[0359] <Configuration Example 7 of Information Processing Device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This function makes it possible to reduce the amount of light emitted from the outside, for example, in an environment with strong external light, such as outdoors on a clear day. Images can be displayed on a tablet computer for convenient use even when .

[0360] <Configuration Example 8 of Information Processing Device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This function makes it possible to reduce the amount of light emitted from the outside, for example, in an environment with strong external light, such as outdoors on a clear day. The subject can be displayed on the digital camera so that it can be conveniently viewed even if the subject is not in the digital camera.

[0361] <Configuration Example 9 of Information Processing Device> The information processing device 5200B has a function of changing the display method according to the illuminance of the usage environment, for example. This function makes it possible to reduce the amount of light emitted from the outside, for example, in an environment with strong external light, such as outdoors on a clear day. The images can be displayed on a personal computer so that they can be used conveniently even when .

[0362] This embodiment may be combined, at least in part, with other embodiments described in this specification. It can be implemented in combination. [Explanation of symbols]

[0363] C1: Capacitance, C2: Capacity, CFB: Colored layer, CFG: Colored layer, CFR: Colored layer, DL_n : data line, DL_Y: data line, DL_1: data line, EL: light emitting element, G1: wiring, G2: wiring, GL_m: scan line, GL_X: scan line, GL_1: scan line, M1: transistor sta, M2: transistor, M3: transistor, N1: node, N2: node, P1: Area, P2: Area, S1: Wiring, S2: Wiring, T1: Period, T2: Period, 10: Display device , 10A: Display device, 10B: Display device, 10C: Display device, 10D: Display device, 10E : Display device, 10F: Display device, 10G: Display device, 10H: Display device, 11: Board, 1 3: substrate, 15: functional layer, 17: light-emitting element, 20B: blue light, 20G: green light, 20R: Red light, 20W: white light, 21: electrode, 23: electrode, 25: insulating layer, 27: adhesive layer, 31 : light-shielding layer, 33: light-shielding layer, 35: phosphor layer, 50: LED package, 51: LED chip 51A: LED chip section, 51B: LED chip, 52: substrate, 53: reflector 55: electrode, 57: electrode, 59: wire, 61: wire, 63: resin layer, 65: fluorescent Light body, 67: adhesive layer, 71: substrate, 71A: substrate, 75: n-type semiconductor layer, 75a: n-type contact layer, 75b: n-type cladding layer, 77: light-emitting layer, 77a: barrier layer, 77b: well layer 79: p-type semiconductor layer, 79a: p-type cladding layer, 79b: p-type contact layer, 81: semi-conductor layer Conductive layer, 83: electrode, 85: electrode, 87: electrode, 89: insulating layer, 90: bump, 301: Conductive layer, 303: conductive layer, 305: conductive layer, 311: insulating layer, 321: semiconductor layer, 323 : Semiconductor layer, 325: Semiconductor layer, 331: Insulating layer, 333: Insulating layer, 341: Conductive layer, 3 43: conductive layer, 351: conductive layer, 353: conductive layer, 361: insulating layer, 363: insulating layer, 3 71: Conductive layer, 373a: Conductive layer, 373b: Conductive layer, 375: Conductive layer, 377: Conductive layer , 379: insulating layer, 400: pixel circuit, 400EL: pixel circuit, 401: circuit, 401E L: circuit, 501: pixel circuit, 502: pixel section, 504: driving circuit section, 504a: gate driver, 504b: source driver, 506: protection circuit, 507: terminal section, 552: Transistor, 554: transistor, 554a: transistor, 554b: transistor , 562: Capacitor element, 572: Light emitting element, 572a: Light emitting element, 700: Display device, 70 0A: display device, 700B: display device, 701: substrate, 702: pixel portion, 704: source Driver circuit section, 705: substrate, 706: gate driver circuit section, 708: FPC terminal section 710: signal line, 711: wiring section, 712: sealing material, 716: FPC, 717: IC , 721: source driver IC, 722: gate driver circuit section, 723: FPC, 72 4: printed circuit board, 732: sealing film, 736: colored layer, 738: light-shielding layer, 740: protective layer 742: adhesive layer, 743: resin layer, 744: insulating layer, 745: supporting substrate, 746: resin layer, 750: transistor, 752: transistor, 760: wiring, 770: insulating layer, 7 72: Conductive layer, 774: Conductive layer, 780: Anisotropic conductive film, 782: Light-emitting element, 790: Container Quantum element, 791: bump, 793: bump, 795: light shielding layer, 797: phosphor layer, 800 : Substrate, 900: LED chip substrate, 901: Film, 903: Plate, 905: Tape cable, 907: grindstone, 909: grindstone wheel, 911: scribe line, 913: stand , 914: opening, 915: blade, 919: film, 921: fixture, 923: 924: plate, 925: fixture, 927: film, 929: extrusion mechanism, 95 0: Equipment, 951: Stage, 953: Single-axis robot, 955: Single-axis robot, 957: Camera, 959: gripping mechanism, 961: control device, 963: unit, 1723: electrode, 1 726: insulating layer, 1728: insulating layer, 1729: insulating layer, 1741: insulating layer, 1742: Semiconductor layer, 1744a: electrode, 1744b: electrode, 1746: electrode, 1771: substrate, 1 772: insulating layer, 1810: transistor, 1811: transistor, 1820: transistor transistor, 1821: transistor, 1825: transistor, 1826: transistor, 1842: transistor, 1843: transistor, 1844: transistor, 1845 :Transistor, 1846:Transistor, 1847:Transistor, 5200B:Information Processing device, 5210: arithmetic unit, 5220: input / output device, 5230: display unit, 5240: Input unit, 5250: Detection unit, 5290: Communication unit

Claims

[Claim 1] The apparatus includes a stage, a gripping mechanism, and an extrusion mechanism, the stage has a function of holding a substrate on which a plurality of transistors are formed in a matrix; a conductor electrically connected to the transistor is formed on the substrate; the gripping mechanism has a function of gripping a film on which a plurality of light-emitting elements are formed in a matrix, Each of the light-emitting elements has an electrode on one surface and the other surface in contact with the film; the gripping mechanism has a function of opposing the conductor and the electrode, the extrusion mechanism extrudes the conductor from the film side to the substrate side to bring the conductor into contact with the electrode; A display device manufacturing apparatus having a function of electrically connecting the conductor and the electrode.

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