10 digital surround radio

Abstract

To provide a 10 Digital Surround Radio that solves problems of inability to distinguish between surround and stereo signals in a receiver side, as well as poor sound calculation processing due to inability to perform accurate digital processing.SOLUTION: A 10 Digital Surround Radio has a structure in which: an arithmetic amplification circuit reads out addition and multiplication ROM with matrix gates and a circuit for selecting the number of decimal digits of an amplifier section; a circuit controls the sound reflector for continuous movement; a loudspeaker section attached with left and right speakers detects a sound field signal; a solenoid valve control enables heavy bass reproduction; and a hollow pipe is wrapped around a resonance tube that boosts bass sound with a solenoid valve.SELECTED DRAWING: Figure 1

Description

[Technical field]

[0001] The present invention relates to a 10 digital surround radio that can reproduce three-dimensional sound by adding an acoustic calculation device that uses an amplifier including an analog conversion adapter process that performs accurate digital calculations, and enables sound image movement using calculation data that detects surround detection from broadcasts. [Background technology]

[0002] According to the principle of wave superposition, when two waves of the same frequency are made to face each other at the same time, they resonate, doubling the amplitude and quadrupling the energy density. This is used in pipe organs and baffle reflex sound tubes.

[0003] Two microphones are used for stereo broadcasting and three microphones are used for surround broadcasting. In stereo broadcasting, multiplexing is done by adding left + right and left - right, and then adding the center microphone component, creating twice the left signal + C / 2 and twice the right signal + C / 2.

[0004] To switch from stereo to surround, the left channel has a level difference of C / 2 between a left signal that is twice the level and a left signal that is twice the level + C / 2. This is utilized. [Prior art documents]

[0005] [Patent Document 1] Patent Publication 2015-139212 [Patent Document 2] Patent Publication No. 2017-092924 Summary of the Invention [Problem to be solved by the invention]

[0006] There was a drawback in that it was not possible to send a data signal to switch from stereo to surround broadcasting, so the receiving side could not distinguish between stereo and surround sound sources. In terms of sound quality, the bass resonator only produced a rough reproduction of the sound. The sound playback amplifier also had time loss in its digital processing and was unable to process the sound properly. [Means for solving the problem]

[0007] This 3D radio allows you to enjoy three-dimensional sound, and includes a signal distribution means for surround detection, a sound deflection plate driving device system that continuously changes the sound field, and an acoustic tube that expands low-frequency sound to the sub-bass range, as well as an amplifier section with an additional 10 digital calculation circuits. Effect of the Invention

[0008] This invention makes two speakers facing each other resonate simultaneously in a deep bass resonance tube, increasing the sound pressure by four times, and by equipping the receiver with a surround distribution means and changing the angle of the motor drive circuit and sound deflection plate, it is possible to continuously move the sound field forward, backward, left and right. 10 Digital amplifiers have realized even more precise sound. [Brief description of the drawings]

[0009] [Figure 1] Overall configuration of the present invention [Diagram 2] Diagram of signal distribution means [Diagram 3] Sound level comparison chart of the present invention [Figure 4] FIG. 1 is a diagram of a calculation method for sound deflection according to the present invention. [Diagram 5] Sound quality adjustment circuit diagram of the present invention [Figure 6] FIG. 1 is a diagram of a calculation method for sound deflection according to the present invention. [Figure 7] FIG. 1 is a diagram of a sound deflection control circuit according to the present invention. [Figure 8] A diagram of the sound reflector control of the present invention [Figure 9] Diagram of the motor control IC used in the sound reflecting plate of the present invention [Figure 10] A diagram of the joint between the control motor and the sound reflector of the present invention. [Figure 11] Speaker section configuration diagram [Figure 12]Circuit diagram showing how a sampling circuit corrects analog signals [Figure 13] Detailed diagram of FV deviation circuit [Figure 14] 10-digit calculation input circuit diagram of the present invention [Figure 15] TABLE 1 shows the contents of the multiplication operation ROM of the present invention [Figure 16] Table showing the contents of the addition operation ROM of the present invention [Figure 17] Diagram of the digital arithmetic circuit of the present invention [Figure 18] Diagram showing the structure of an acoustic amplifier resonance tube [Figure 19] Diagram showing the relationship between the passive filter and the solenoid valve drive circuit [Figure 20] Passive filter and solenoid valve control circuit diagram [Figure 21] Block diagram of the arithmetic circuit section [Figure 22] Diagram of the ΔT circuit [Figure 23] Diagram showing the path of the decimal digit number switching ROM [Figure 24] Volume control circuit diagram of the present invention [Diagram 25] Five-point driving speaker structure diagram EMBODIMENTS FOR CARRYING OUT THE EMBODIMENT

[0010] Hereinafter, the details of the embodiment of the present invention will be described with reference to the drawings. Fig. 1 is a block diagram of the present invention. The tuner section (1) is connected to a stereo tuner (10), an intermediate amplifier section (11), an FM detector (12), an IF section adjustment section, and a first MPX circuit (13). Separately, deep bass sounds are reproduced from the tuner section (1) through the acoustic calculation circuit section (6) and the amplifier section (7) to the speaker section (8).

[0011] On the other hand, the signal is branched into a route that detects surround sound from the tuner unit (1), passes through a signal distribution means (2) and a path relay (8) and then inputs to an acoustic calculation circuit unit (6) via a second MPX circuit (14), and a route that passes through a first MPX circuit (13) to a calculation circuit unit (3), and further through a sound reflection plate control (40) to change the angle of a sound reflection plate (41) in a sound reflection drive system (4).

[0012] Tuner section (1) distinguishes between stereo and surround broadcasts 2 shows a signal distribution means (2) in which an input is made from an input terminal (21) to a memory (23), and the pulse of a clock pulse oscillator (26) enters a first counter circuit (25) and when the first DAC (24) is "1", the memory (23) writes "2" and reads "3" and resets back to "1". The output of the memory (23) enters the input side A2 of the arithmetic circuit 1 (27) from the input terminal (22), which is the A1 input side of the arithmetic circuit 1 (27). The arithmetic circuit 1 (27) performs a difference calculation, and when (A2-A1) is greater than 0, it turns on a pass relay (28). This will increase the sound level towards the center microphone, shifting the sound field from the left to the center. This allows surround detection.

[0013] The difference between surround and stereo broadcasting is as shown in Figure 3. For Lch, the level is Hm in stereo broadcasting, and Hn in surround broadcasting because sound from the center microphone is added. The level of the signal input to the distribution means (2) is either Hm or Hn, and when Hn>Hm, the pass relay (28) is switched on.

[0014] FIG. 5 is a diagram of the intermediate amplifier section of the MPX circuit. In normal stereo broadcasts, the signal passes through the first MPX circuit (13). In surround broadcasts, the pass relay (28) is turned on and the signal enters the second MPX circuit (14) from the intermediate amplifier section (11) via the stereo tuner (10) of the tuner section (1). The intermediate amplifier section (11) is composed of a rear stage (110) and a first resonator section (111). The first resonator section (111) outputs to the FM detector (12).

[0015] The first resonator (111) is a reflex detection resonator circuit to which a variable capacitance diode (112) and a variable resistor (113) for changing a DC voltage to the variable capacitance diode (112) are added.

[0016] When adjusting the sound quality to increase the sound pressure, adjusting the high frequency range increases the sound energy. It is easier to produce low frequency sounds.

[0017] Figure 7 shows the circuit that generates the signal to control the sound reflector. The arithmetic circuit section (3) is a processing circuit that changes the angle of the sound reflecting plate (41) by a rotary motor or piezoelectric drive as a means for continuously moving the sound field during surround sound. As shown in Fig. 6, the first MPX circuit (13) and the second MPX circuit (14) each have a left channel and a right channel output. Output A of the left channel of the first MPX circuit (13) and output B of the left channel of the second MPX circuit (14) are input to arithmetic circuit 3 (31). Calculation circuit 3 (31) uses a division algorithm, B / A, and its output is C. Next, the output D of the right channel of the first MPX circuit (13) and the output E of the right channel of the second MPX circuit (14) are input to the arithmetic circuit 4 (32). This algorithm is also performed by division. E / D gives an output F.

[0018] As shown in Fig. 8, the sound reflecting plate control (40) of the reflecting plate driving system (4) inputs the motor rotation speed data stored in ROM1 (42) to the rotation speed control terminal P of the motor (450) via a ladder circuit (440) made of parallel connections of multiple resistors (44) connected to a second DAC (43). Then, the motor (450) rotates accurately.

[0019] The angular position of the sound reflecting plate (41) changes depending on how many revolutions the motor (450) makes within a certain time. The motor (450) of the sound reflecting plate (41) uses a motor control IC (453) etc. An angle sensor (452) provided on the sound reflecting plate (41) sends a signal to the motor control IC (453). Please refer to Figures 9 and 10. A spiral spring (451) and an angle sensor (452) are attached to the motor drive circuit (45) and the motor (450), and the sound reflecting plate (41) is attached to the shaft (454), and a bearing (455) is disposed. When the stop signal is received, with IN1 at "1" and IN2 at "0", the motor stops and the sound reflecting plate (41) returns to its original position by the spiral spring (451).

[0020] Alternatively, as shown in FIG. 11, a fifth DAC (80) is connected to the switching relay module (80). An audio signal is input from the input terminals P1, P2, and P3 of the switching relay module (81). P1 outputs to the upper stage of the moving coil (811) of the sound deflection type speaker (82), P2 outputs to the middle stage of the moving coil (821) of the sound deflection type speaker (82), and P3 outputs to the lower stage of the moving coil (821) of the sound deflection type speaker (82).

[0021] The opening (86) has a sound reflecting plate (83) arranged in the forward direction and tilted at 45 degrees to the sound deflection speaker (82). A fixed support part (825) supports the sound reflecting plate (82) facing the sound deflection speaker (82). The stationary sound reflecting plate (824) has a structure in which a piezoelectric element (85) such as crystal or ceramic is sandwiched between two electrodes (84) on the sound reflecting material (83).

[0022] FIG. 11 is a diagram of a sound deflection type speaker. The sound deflection type speaker (82) has a structure in which three diaphragms (810) are inclined and connected to a moving coil A (821), a moving coil B (822), and a moving coil C (823). The diaphragm (810) opens at an angle of 120 degrees. Therefore, the switching relay module (81) can change the direction of the sound by switching P1, P2, and P3 of the switching relay module (80) with the output of the fifth DAC (80). The Lch and Rch outputs of the stereo signal are amplified and output simultaneously to each moving coil of the sound deflection type speaker (82).

[0023] The amplifier section (7) is designed for analog-to-digital conversion. Referring to Figure 12, the analog signal is converted to digital in the sampling circuit (700). The signal is output to the ladder circuit (702) via the connected USBDAC (701), and becomes an analog signal in the form of a staircase or line graph. This is called output 1. When the source wave input, the voice input (703) signal, and the signal route from the ladder circuit (702) are simultaneously input to the difference cancellation circuit (704), a correction signal becomes the output signal. This is input to the FM modulation circuit (705) and the FV shift circuit (707). This is as described in the above-mentioned Patent Document 1. Omitted See Figure 13.

[0024] According to FIG. 23, the signal output from the FV shift circuit (707) is a waveform that includes a triangular portion. This is input into the arithmetic circuit unit (73). With this, the area of ​​the triangle is calculated and a virtual calculation is performed by multiplying it by a constant with the pulse counter value, which corresponds to the time axis. This gives the area. Since the voltage difference corresponds to the height, the angle of the triangle can also be calculated by multiplying it by a constant. The acceleration can also be calculated. Next, the ΔT circuit (76) is connected to the arithmetic circuit 7 (733). The ΔT circuit (76) comprises a high-frequency pulse oscillator (761), which oscillates pulses at a higher frequency, and a high-speed counter (763), which sends the pulse value to the arithmetic circuit 7 (733) to be multiplied by a constant to make the time finer, square it, and multiply this by the acceleration and divide it by 2. The ΔT circuit is shown in Figure 13.

[0025] TIFF2025070907000002.tif13122

[0026] The three-point drive speaker is as shown in FIG. In the driven speaker, output 1 is connected to the main moving coil via an amplifier.

[0027] The amplifier section, as shown in FIG. 24, is connected from the one-shot pulse oscillator (613) to the third counter circuit (614) and the third DAC (612), and the pulses from the one-shot pulse oscillator (613) are counted by the third counter (614). It can be connected to an LED indicator (615) to display the volume. The third DAC (612) provides a digital output of the volume.

[0028] The volume digital input is connected to a first gate circuit (62).

[0029] FIG. 14 is a diagram of a circuit for switching the number of digits according to 10 digital levels. A decimal digital converter (71) is required to convert the output voltage into a decimal number, and an operation to switch the number of digits is required. For each terminal of the USBDAC (701), N digits are stored in decimal: 1, 2, 4, 8, 16, 32, 64, 128, 256, 1024. For each terminal, ROM3 (71) and ROM6 (79) are read. ROM3 (721) stores the number of digits, and ROM6 (79) stores the numerical information. ROM3 (721) and ROM6 (79) divide 8 bits into two, with the lower 4 bits representing numerical information and the upper 4 bits representing the number of digits. Connect the USBDAC (701) to the address encoder (77). The fourth DAC (741) is connected from ROM3 (721) to ROM3 (71) and ROM6 (79), and numerical information is recorded in ROM3 (721) and digit number information is recorded in ROM6 (79). ROM3 (72) is 0 when it is 0, and 1 when it is 1 to 9. In address code 1, P1 of ROM3 is 1, and 1 to 9, so it opens. The lowest bit of ROM6 (79) is 0001, and the rest are all 0000. See Figure 23. In other words, the gate relay is opened. The first column is input to each terminal of the USBDAC (701) as 1, the second column as 2, the third column as 8, and the fourth column as 16, i.e. the numerical values ​​are 1,2,4,6, and the columns as 0,0,0,1. This is the digit number switching module (70), and the first digit is input to D1. The digit number input is input to D1 as the digit number in the 1st place, the numerical value is 0, the second digit is input to D2 as the 10th place, the numerical value is 0, and the numerical value is 2, and these are input to the input terminal Q1 of the first gate circuit (62) and Q2 of the second gate circuit (620).

[0030] FIG. 17 is an explanatory diagram of the amplifier section. A volume digital input terminal (61) is connected to the first gate circuit (62). The amplifier section (7) can amplify and calculate the signal. A second counter circuit (611) to a second gate circuit (620) are connected to the input terminal (610). The first gate circuit (62) is a set of 100 AND gate elements (60). The output of the first gate encoding circuit (64) is 100 address numbers, and the address code is multiplied. The contents shown in FIG. 15 are stored in ROM1 (69), so the contents are output by reading it. The digit of the 1st digit is stored in Dn, and the carry number is stored in Dm. It is 8 bits. Dn is connected to the decimal decoder 1 (65) and a resistor group (66) is connected to the resistor group (66). is connected to. The carry Dm and the output of the multiplication operation ROM2 (691) are input to the third gate circuit (621) and then to the addition operation ROM2 (641) of the next digit via the third gate encoding circuit (631). Connected to decimal decoder 2 (651), input to resistor group (661), voltage "V0" to resistor group (66), voltage "V1" to resistor group (661), voltage "V2" to resistor group (662), these outputs are wired together and combined. The contents of multiplication operation ROM 1 (69) are shown in FIG. 15, and the contents of addition operation ROM (641) are shown in FIG. 16.

[0031] The amplifier section (7) is connected to a decimal digital converter (71) and a main amplifier (72). The resonator is as shown in Figure 18, and the main amplifier (72) is connected by wiring two speakers (94). The two speakers (94) are arranged facing each other and screwed to the flat surface of the resonator tube (9) at the four corners.

[0032] For the resonating part, the resonant frequency of the air column is fm = MV / 4(L+K) In the case of an open tube, the frequency is fm=MV / 2 (L+K) K is the length of the hollow pipe L is the length of the resonance tube.

[0033] The resonance frequency of the air column can be reduced by winding a hollow pipe (90) in a coil shape several times around the resonance tube (9) shown in Figure 19. The hollow pipe (90) corresponding to the air column is a pipe with holes inside. This is wound in a coil shape around the outer circumference of the resonance tube (9). The resonance tube (9) has flat left and right sides, making it easy to attach a speaker (94), and is fixed in place with two speaker lock screws (93) in four places. A speaker net (92) is located in the front, and a solenoid valve (91) is located in the rear.

[0034] The solenoid valve (91) is connected to the solenoid valve drive circuit (5) and the passive filter (50). As mentioned above, the resonant frequency changes depending on whether the solenoid valve 91 is open or closed. The passive filter 50 detects the frequency band of the sound and distinguishes between the deep bass range and the relatively low range.

[0035] The deep bass range is a low frequency range of about 20 Hz. The circuit that resonates at this frequency is the deep bass range detection circuit (51). The deep bass range detection circuit (51) is connected to the second encoding circuit (52). This constant B is a circuit that resonates in a relatively low frequency range, and the low frequency range detection circuit (53) is connected to the third encoding circuit (520). The relatively low range is set to 40hZ. This constant is A. A certain value is set in the CPU (53), and if the same value is B, the CPU (53) issues a command to close the solenoid valve (91). If the value is A, the CPU (53) issues a command to open the solenoid valve (91). The switching frequency is set to 35hZ. This is the configuration. [Explanation of symbols]

[0036] 1 Tuner 10 Stereo Tuner 11 Intermediate amplifier 111 1st resonance section 112 Variable capacitance diode 113 Variable resistor 12 FM detection section 13 First MPX Circuit 14 Second MPX Circuit 2. Signal distribution method 21 Input terminal 1 22 Input terminal 2 23 Memory 24 1st DAC 25 First counter circuit 26 Clock Pulse Oscillator 27 Arithmetic circuit 1 28 Pass Relay 3 Arithmetic circuit section 31 Arithmetic circuit 3 32 Arithmetic circuit 4 4. Sound reflector drive system 41 Sound reflector 42 ROM1 43 Second DAC 44 Resistor 440 1st ladder circuit 45 Motor drive circuit 450 Motor 451 Spiral Spring 452 Angle Sensor 553 Motor Control IC 454 Axis 455 Bearings 6 Acoustic calculation circuit section 60 AND gate element 61 Volume input terminal 1 610 Volume input terminal 2 611 Second counter circuit 612 3rd DAC 613 One-shot Pulse Oscillator 614 3rd counter circuit 615 LED Lamp Indicator 62 First gate circuit 620 Second Gate Circuit 64 First Encoding Circuit 640 ROM1 for multiplication operations 641 ROM1 for addition operations 642 Multiplication operation ROM2 643 Addition operation ROM3 65 Decimal Decoder 66 Resistor group 70 Digit number switching module 700 Sampling Circuit 701 USBDAC 702 Second ladder circuit 703 Source wave input 704 Correction 705 FM Modulation Circuit 706 Sine Wave Oscillator 707 FV deviation circuit 708 Branch Circuit 709 Digital Relay 71 Decimal Digital Conversion 72 ROM3 73 Arithmetic Circuit Unit 731 Arithmetic circuit 5 732 Arithmetic circuit 6 733 Arithmetic circuit 7 74 Decimal DAC3 740 Decimal DAC4 741 4th DAC 77 Address Encoder 78 Gate Relay 79 ROM6 790 First FV Conversion 791 Second FV Conversion 792 Anti-phase circuit 793 Fundamental Wave Oscillation Means 794 Synthesis circuit 8 Speaker section 80 5th DAC 81 Changeover Relay Module 82 Sound deflection speaker 821 Moving Coil A 822 Moving Coil B 823 Moving Coil C 824 Stationary sound reflector 825 Fixed support part 83 Sound-reflecting material 84 electrode 85 Piezoelectric element 86 Opening 9 Resonance tube 90 Hollow Pipe 91 Solenoid valve 910 Red LED lamp lighting circuit 911 Red LED lamp 912 Blue LED lamp lighting circuit 912 Red LED lamp 92 Speaker Net 93 Speaker fixing screw 94 Speaker 940 3-point drive speaker 941 Center Pole Magnet 942 Dunbar 943 Corn 944 Moving Coil

Claims

1. This 10 digital surround radio is characterized by having a digit number switching function in the front stage that reads out a ROM that stores decimal multiplication tables using a matrix gate circuit in the amplifier section of the radio, or a gate relay that specifies the combination of digits in an addition calculation ROM that corresponds to the result of the readout, and a signal from the aforementioned calculation circuit that controls the rotation of the sound reflector using a motor in a calculation circuit section that creates a signal to control the angle of the sound reflector to continuously move the sound field, or a relay that switches a sound deflection speaker that combines diaphragms in directions so that sound is emitted in three directions facing a stationary sound reflector, and is equipped with a resonance tube to enhance the deep bass range.

2. A digital surround radio comprising: a counter for reading and writing data from an arithmetic circuit and a memory, and a signal distribution means for comparing levels, the counter comprising a clock pulse oscillator, for detecting switching between surround and stereo broadcasts.

3. This digital surround radio is characterized by having an electromagnetic valve control for performing a bass reflex effect with a passive filter for detecting a deep bass range, and a structure in which a hollow pipe for compactly extending the resonance tube is wound around the resonance tube.

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