Liquid crystal display device

The liquid crystal display device addresses the challenge of alignment defects in reflective modes by employing a lateral electric field system with specific electrode configurations and liquid crystal alignments, resulting in enhanced reflective mode efficiency and the ability to create an in-cell touch panel.

JP2025073332APending Publication Date: 2025-05-13SHARP DISPLAY TECHNOLOGY CORP
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Patent Information

Application Number
JP2023184016
Authority / Receiving Office
JP · JP
Patent Type
Applications
Current Assignee / Owner
Filing Date
2023-10-26
Publication Date
2025-05-13

AI Technical Summary

Technical Problem

Current reflective liquid crystal display devices face challenges in achieving an in-cell touch panel capable of displaying a reflective mode due to alignment defects and inefficiencies in liquid crystal response.

Method used

A liquid crystal display device with a lateral electric field system, featuring a first substrate with a reflective layer and strip-shaped electrodes, and a second substrate with a horizontal alignment film, utilizing positive liquid crystal molecules with a twist alignment and specific slit angles to suppress orientation defects.

Benefits of technology

The solution effectively suppresses orientation defects and enhances the reflective mode efficiency, allowing for the realization of an in-cell touch panel capable of displaying a reflective mode with improved performance.

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Abstract

To provide a liquid crystal display device sufficiently suppressing the occurrence of alignment defect, and also useful as an in-cell touch panel capable of performing the display in a reflective mode.SOLUTION: A liquid crystal display device comprises a first substrate, a second substrate opposing the first substrate, and a liquid crystal layer provided between the first substrate and the second substrate. The first substrate has a reflective layer for reflecting light, first and second electrodes capable of generating a transverse electric field in the liquid crystal layer, and a first horizontal alignment film in contact with the liquid crystal layer. At least one of the first electrode and the second electrode has a plurality of strip portions and a slit located between two adjacent strip portions among the plurality of strip portions. The plurality of strip portions, in each of pixels, linearly extend substantially parallel to one another in identical directions and include no bent portion. The second substrate has a second horizontal alignment film in contact with the liquid crystal layer. The liquid crystal layer includes liquid crystal molecules having a positive dielectric anisotropy and is in a twist alignment during no voltage application.SELECTED DRAWING: Figure 1
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Description

[Technical field]

[0001] The following disclosure relates to liquid crystal displays. [Background technology]

[0002] Liquid crystal display devices are display devices that use liquid crystal material for display, and are generally broadly classified into transmissive and reflective liquid crystal display devices according to the display method. Transmissive liquid crystal display devices are devices that perform transmissive mode display using transmitted light from a backlight behind the screen, while reflective liquid crystal display devices are devices that perform reflective mode display using external light (also called ambient light) instead of backlight light. As a display device that combines these characteristics, a semi-transmissive liquid crystal display device has been proposed in which each pixel has an area that performs transmissive mode display and an area that performs reflective mode display.

[0003] Liquid crystal display devices can also be broadly classified according to the driving method of the liquid crystal. For example, there are known vertical electric field type liquid crystal display devices that drive a liquid crystal layer with an electric field in a direction substantially perpendicular to the substrate surface to perform display, and horizontal electric field type liquid crystal display devices that drive a liquid crystal layer with an electric field in a direction substantially parallel to the substrate surface to perform display. Examples of the vertical electric field type include the twisted nematic (TN) mode and the multi-domain vertical alignment (MVA) mode, and examples of the horizontal electric field type include the in-plane switching (IPS) mode and the fringe field switching (FFS) mode. For example, Patent Document 1 discloses a liquid crystal display that is suitable as a horizontal electric field type liquid crystal display device. This liquid crystal display is capable of suppressing defects caused by process variations and improving display performance, and is particularly useful as a transmissive liquid crystal display device. [Prior art documents] [Patent documents]

[0004] [Patent Document 1] Patent No. 5756860 Summary of the Invention [Problem to be solved by the invention]

[0005] In recent years, liquid crystal display devices used in smartphones, tablets, and the like are usually provided with a touch sensor function. There are various types of touch sensors known, such as resistive film type, electrostatic capacitance type, and optical type. Liquid crystal display devices equipped with a touch sensor (also called touch panel) include a type in which the touch sensor is attached externally (external type) and a type in which the touch sensor is built-in (built-in type). The built-in type touch panel is advantageous in terms of narrowing the frame, reducing the thickness, and reducing the weight, etc., compared to the external type touch panel, and also has the advantage of increasing the light transmittance.

[0006] Built-in touch panels are classified into on-cell type and in-cell type. The cell means a display panel (also called a liquid crystal panel) that includes an active matrix substrate, typically a thin film transistor (TFT) substrate, an opposing substrate arranged to face the active matrix substrate, and a liquid crystal layer arranged between the substrates. In general, in the in-cell type, a layer that performs the touch sensor function is arranged in the display panel, while in the on-cell type, a layer that performs the touch sensor function is arranged between the display panel and a polarizing plate arranged on the observation surface side of the display panel. Among these, the in-cell type can theoretically realize the thinnest and lightest touch panel. In addition, liquid crystal display devices capable of displaying in a reflective mode are suitable for outdoor use, so that an in-cell type touch panel capable of displaying in a reflective mode is required, but has not yet been realized.

[0007] The reason why this has not been realized is believed to be that in current reflective liquid crystal display devices, one of a pair of electrodes for applying a voltage to the liquid crystal layer (also called a counter electrode or a common electrode) is arranged on the counter substrate side. Therefore, the inventors thought that if a horizontal electric field method such as the FFS mode is used, both of the pair of electrodes are provided only on the active matrix substrate side, and therefore an in-cell type touch panel capable of displaying in the reflective mode can be realized.

[0008] Therefore, further studies were conducted on FFS mode devices that perform display in normally black mode, for example. For example, a device was examined in which a positive-type liquid crystal material was used for the liquid crystal layer and at least one of a pair of electrodes was a slit electrode having a slit-shaped opening. However, it was found that the liquid crystal alignment became unstable immediately after applying a voltage (5V or more) from a no-voltage-applied state (0V), and alignment defects (also called alignment disturbances) in which the liquid crystal alignment becomes discontinuous may occur (see Test Example 4 described later, etc.). When alignment defects occur, problems such as deterioration of liquid crystal response, reduction in reflective mode efficiency, reduction in transmissive mode efficiency, and concerns about roughness when viewed obliquely arise. In particular, liquid crystal display devices with non-uniform and unstable liquid crystal alignment are not suitable for practical use as liquid crystal display devices for displaying moving images.

[0009] The present invention has been made in consideration of the above-mentioned current situation, and aims to provide a liquid crystal display device in which the occurrence of alignment defects is sufficiently suppressed and which is also useful as an in-cell type touch panel capable of reflective mode display. [Means for solving the problem]

[0010] (1) One embodiment of the present invention is a liquid crystal display device having a first substrate, a second substrate opposed to the first substrate, and a liquid crystal layer provided between the first substrate and the second substrate, the liquid crystal display device having a plurality of pixels, the first substrate having a reflective layer that reflects light, a first electrode and a second electrode that can generate a transverse electric field in the liquid crystal layer, and a first horizontal alignment film in contact with the liquid crystal layer, at least one of the first electrode and the second electrode having a plurality of strip portions and a first horizontal alignment film that is in contact with the first electrode and the second electrode. and slits located between the strip-shaped portions, wherein in each pixel, the strip-shaped portions are linearly shaped extending in the same direction and substantially parallel to one another and do not include any bent portions, the second substrate has a second horizontal alignment film in contact with the liquid crystal layer, the liquid crystal layer includes liquid crystal molecules having a positive dielectric anisotropy and adopting a twisted alignment when no voltage is applied, and the alignment direction of the liquid crystal molecules on the first substrate side when no voltage is applied is equal to or greater than 0° and equal to or less than 16°, with the direction in which the strip-shaped portions extend being taken as the reference 0°.

[0011] (2) Moreover, in one embodiment of the present invention, in addition to the configuration (1) above, the plurality of strip-shaped portions do not include any notches.

[0012] (3) Furthermore, in one embodiment of the present invention, in addition to the configuration of (1) or (2) above, the direction in which the multiple strip portions extend is the same at least in adjacent pixels or in the display region.

[0013] (4) Furthermore, in addition to the configuration of (1), (2), or (3), an embodiment of the present invention is a liquid crystal display device including, in this order from a rear side, a first polarizing plate, a first retardation layer, the first substrate, the liquid crystal layer, the second substrate, a second retardation layer, and a second polarizing plate, wherein the first retardation layer includes a first λ / 2 plate and a first λ / 4 plate, the second retardation layer includes a second λ / 2 plate and a second λ / 4 plate, and at least one of the first retardation layer and the second retardation layer further includes a positive C plate.

[0014] (5) Moreover, in an embodiment of the present invention, in addition to the configuration (4), the second retardation layer includes one of the positive C plates, and the first retardation layer does not include a positive C plate or includes two of the positive C plates.

[0015] (6) Furthermore, in an embodiment of the present invention, in addition to the configuration of (4) or (5), the first λ / 2 plate and the first λ / 4 plate are positioned in this order from the rear surface side, the second λ / 2 plate and the second λ / 4 plate are positioned in this order from the observation surface side, the first λ / 2 plate and the second λ / 2 plate have approximately the same in-plane retardation Re, and the first λ / 4 plate and the second λ / 4 plate have approximately the same in-plane retardation Re.

[0016] (7) Furthermore, an embodiment of the present invention is a liquid crystal display device, in which, in addition to the configuration of (4), (5), or (6), a positive C plate is located between the first λ / 2 plate and the first λ / 4 plate, and / or between the second λ / 2 plate and the second λ / 4 plate.

[0017] (8) Furthermore, one embodiment of the present invention is a liquid crystal display device having the configuration as described above in (1), (2), (3), (4), (5), (6), or (7), wherein the twist angle of the liquid crystal layer when no voltage is applied is 58.3° or more and 89.9° or less.

[0018] (9) Furthermore, in one embodiment of the present invention, in addition to the configuration of (1), (2), (3), (4), (5), (6), (7) or (8), the ratio L / S of the width L of each strip portion in a planar view to the width S of each slit in a planar view is 0.4 to 0.7 / 1.

[0019] (10) Furthermore, one embodiment of the present invention is a liquid crystal display device having the configuration described above in (1), (2), (3), (4), (5), (6), (7), (8) or (9), and further having a single domain orientation.

[0020] (11) Furthermore, an embodiment of the present invention is a liquid crystal display device that performs display in a normally black mode in addition to the configuration of (1), (2), (3), (4), (5), (6), (7), (8), (9), or (10) above.

[0021] (12) Furthermore, in an embodiment of the present invention, in addition to the configuration of (1), (2), (3), (4), (5), (6), (7), (8), (9), (10) or (11), one of the first electrode and the second electrode is a pixel electrode provided in each of the plurality of pixels, and the other is a common electrode including a plurality of segments each capable of functioning as a touch sensor electrode, and the first substrate has a plurality of touch wirings each connected to a corresponding one of the touch sensor electrodes.

[0022] (13) Furthermore, an embodiment of the present invention is a liquid crystal display device further comprising a light source in addition to the configuration of (1), (2), (3), (4), (5), (6), (7), (8), (9), (10), (11), or (12) above.

[0023] (14) Furthermore, in one embodiment of the present invention, in addition to the configuration of (1), (2), (3), (4), (5), (6), (7), (8), (9), (10), (11), (12), or (13) above, each pixel has a reflective region that reflects light by the reflective layer to perform display, and a transmissive region that transmits light to perform display. Effect of the Invention

[0024] According to the present invention, it is possible to provide a liquid crystal display device in which the occurrence of alignment defects is sufficiently suppressed and which is also useful as an in-cell type touch panel capable of displaying in a reflective mode. [Brief description of the drawings]

[0025] [Figure 1] 1 is a schematic cross-sectional view of a liquid crystal display device 1. FIG. [Diagram 2] FIG. 2 is a more detailed schematic cross-sectional view of the liquid crystal display device 1. [Diagram 3] FIG. 1 is a schematic plan view of the entire liquid crystal display device 1 as viewed from the observation surface side. [Figure 4]1A and 1B are diagrams for explaining the slit angle of liquid crystal molecules. [Diagram 5] 1 is a schematic plan view showing an example of a pixel structure (angle X is 0°). [Figure 6A] 1 is a schematic plan view showing an example of a pixel arrangement (angle X is 0°). [Figure 6B] 1 is a plan view showing an example of a pixel arrangement (angle X is −10°). FIG. [Figure 6C] 1 is a schematic plan view showing an example of a pixel arrangement (angle X is +10°). [Figure 6D] 1 is a schematic plan view showing an example of a pixel arrangement (angle X is −90°). [Figure 6E] 1 is a schematic plan view showing an example of a pixel arrangement (angle X is −100°). [Figure 6F] FIG. 2 is a plan view showing an example of a pixel arrangement (angle X is −80°). [Figure 7] 2 is a plan view illustrating a schematic arrangement of touch sensor electrodes TX and touch wirings TL included in the liquid crystal display device 1. FIG. [Figure 8] 1 is a schematic cross-sectional view of a liquid crystal display device 1. FIG. [Figure 9] 1 is a schematic cross-sectional view of a liquid crystal display device 1. FIG. [Figure 10] FIG. 2 is a more detailed schematic cross-sectional view of the liquid crystal display device 1. [Figure 11] FIG. 2 is a schematic plan view conceptually illustrating that each pixel P has a reflective region Rf and a transmissive region Tr. [Figure 12] 1 is a schematic plan view showing an example of a pixel structure (angle X is 0°). [Figure 13A] 1 is a schematic plan view showing an example of a pixel arrangement (angle X is 0°). [Figure 13B] 1 is a plan view showing an example of a pixel arrangement (angle X is −10°). FIG. [Figure 13C] 1 is a schematic plan view showing an example of a pixel arrangement (angle X is +10°). [Figure 13D] 1 is a schematic plan view showing an example of a pixel arrangement (angle X is −90°). [Figure 13E] 1 is a schematic plan view showing an example of a pixel arrangement (angle X is −100°). [Figure 13F] FIG. 2 is a plan view showing an example of a pixel arrangement (angle X is −80°). [Figure 14] 1 is a plan view conceptually showing the relationship between the long axis directions of liquid crystal molecules 21 in a liquid crystal layer 20 and the optical axes of each optical film when no voltage is applied. [Figure 15] FIG. 2 is a diagram for explaining the optical axis angle of an optical film. [Figure 16] 1 is a schematic cross-sectional view of a liquid crystal display device 1. FIG. [Figure 17] 1 is a schematic cross-sectional view of a liquid crystal display device 1. FIG. [Figure 18] 1 is a schematic cross-sectional view of a liquid crystal display device 1. FIG. [Figure 19] FIG. 1 is a diagram conceptually showing the most preferable optical axis setting. [Figure 20] 1 is a schematic cross-sectional view of a liquid crystal panel 1X included in a device assumed in Test Example 1. FIG. [Figure 21] 13 is a schematic diagram conceptually showing the electrode structure of a pixel electrode PE and a common electrode CE when the slit angle is 0°. FIG. [Figure 22] 1 is a graph showing the results of Test Example 1. [Figure 23] 1 is a graph showing the results of Test Example 1. [Figure 24] 1 is a graph showing the results of Test Example 1. [Figure 25A] 1 is a schematic plan view showing the structure of a liquid crystal cell 1100 when viewed from the front. [Figure 25B] 25B is a schematic cross-sectional view (cross-sectional view taken along line AA) in FIG. 25A. [Figure 26A] FIG. 1 is a schematic cross-sectional view of a test cell 1000 during reflection observation. [Figure 26B] FIG. 1 is a schematic cross-sectional view of a test cell 1000 during transmission observation. [Figure 27] FIG. 1 shows the results of Test Example 2. [Figure 28A] FIG. 1 is an image diagram showing the results of the study of Test Example 3-1. [Figure 28B] FIG. 1 is an image diagram showing the results of the study of Test Example 3-1. [Figure 28C] FIG. 1 is an image diagram showing the results of the study of Test Example 3-1. [Figure 29A] FIG. 1 is an image diagram showing the results of the study of Test Example 3-1. [Figure 29B] FIG. 1 is an image diagram showing the results of the study of Test Example 3-1. [Figure 29C] FIG. 1 is an image diagram showing the results of testing examples 3-1 and 3-2. [Diagram 30] FIG. 1 shows the results of Test Example 4. [Diagram 31] FIG. 13 is an image diagram showing when a voltage is applied in Test Example 4. [Figure 32A] 1 is a graph showing the results of Test Example 5. [Figure 32B] 1 is a graph showing the results of Test Example 5. [Diagram 33] FIG. 13 is an image diagram showing when a voltage is applied in Test Examples 5 and 6. [Figure 34A] 1 is a graph showing the results of Test Example 6. [Figure 34B] 1 is a graph showing the results of Test Example 6. [Diagram 35] 1 is a graph showing the results of Test Example 7. [Diagram 36] FIG. 13 is an image diagram showing when a voltage is applied in Test Example 7. [Figure 37] 1 is a graph showing the results of Test Example 8. [Figure 38] 1 is a graph showing the results of Test Example 8. [Figure 39A] FIG. 2 is a schematic plan view showing the structure of the test cell 2000 (and the liquid crystal cell 2100) when viewed from the front. [Figure 39B] 39B is a schematic cross-sectional view (cross-sectional view taken along line AA) in FIG. 39A. [Diagram 40] FIG. 2 is a schematic cross-sectional view of a test cell 2000. [Diagram 41] FIG. 13 is a diagram conceptually illustrating the optical axis setting in Test Example 9. [Diagram 42] 1 is a graph showing the results of Test Example 9. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0026] (Definition of terms) In this specification, the observation side means the side closer to the screen (display surface) of the liquid crystal display device, and the rear side means the side farther from the screen (display surface) of the liquid crystal display device.

[0027] The no-voltage-applied state refers to a state in which the voltage applied to the liquid crystal layer is less than the threshold voltage (including no voltage application). The voltage-applied state refers to a state in which the voltage applied to the liquid crystal layer is equal to or greater than the threshold voltage. In this specification, the no-voltage-applied state is also referred to as when no voltage is applied, and the voltage-applied state is also referred to as when a voltage is applied.

[0028] The polar angle means the angle between the direction of interest (for example, the measurement direction) and the normal direction of the screen of the liquid crystal panel. Azimuth refers to the direction of a target direction when it is projected onto the screen of an LCD panel, and is expressed as the angle (azimuth angle) between the target direction and a reference direction. The reference orientation (0°) is the horizontal right direction of the LCD panel screen, unless otherwise specified. Angles and azimuth angles are positive when they are counterclockwise from the reference orientation, and negative when they are clockwise from the reference orientation. Counterclockwise and clockwise both refer to the direction of rotation when the LCD panel screen is viewed from the observation side (front). Additionally, angles refer to values ​​measured when the LCD panel screen is viewed in a flat position, and refer to acute angles unless otherwise specified in terms of the direction of rotation, etc.

[0029] The axial direction of the optical film means the direction of the polarization axis of the polarizing plate if it is a polarizing plate, and means the direction of the slow axis if it is a retardation layer. The polarization axis of the polarizing plate means the absorption axis if it is an absorption type polarizing plate, and means the reflection axis if it is a reflection type polarizing plate. The axial direction of the retardation layer means the direction of the in-plane slow axis of the retardation layer, unless otherwise specified.

[0030] The retardation layer means a layer having at least one of the in-plane retardation (also called in-plane retardation) Re and the thickness direction retardation (also called thickness direction retardation) Rth of 10 nm or more.Preferably, it means a layer having a value of 20 nm or more.In this specification, the numerical values ​​described as Re and Rth are absolute values ​​unless otherwise specified.

[0031] The in-plane retardation Re is defined as Re=(nx-ny)×d. The thickness direction retardation Rth is defined as Rth={nz-(nx+ny) / 2}×d. nx represents the principal refractive index in the slow axis direction in the plane of each retardation layer. ny represents the principal refractive index in the fast axis direction in the plane of each retardation layer. nz represents the principal refractive index in the direction perpendicular to the surface of each retardation layer. The slow axis direction is the direction in which the refractive index is maximum, and the fast axis direction is the direction in which the refractive index is minimum. d represents the thickness of the retardation layer.

[0032] An A plate is a retardation plate that satisfies "nx>ny≒nz."

[0033] The measurement wavelength for optical parameters such as refractive index and phase difference is 550 nm unless otherwise specified.

[0034] "Approximately parallel" means that the angle (absolute value) between the two is within the range of 0°±10°, and this angle is preferably within the range of 0°±5°, and more preferably 0° (i.e., parallel in the narrow sense). "Approximately perpendicular" (or approximately perpendicular) means that the angle (absolute value) between the two is within the range of 90°±10°, and this angle is preferably within the range of 90°±5°, and more preferably 90° (i.e., orthogonal or perpendicular in the narrow sense).

[0035] Hereinafter, a liquid crystal display device according to an embodiment of the present invention will be described. The present invention is not limited to the contents described in the following embodiment, and appropriate design changes can be made within the scope of the configuration of the present invention.

[0036] (Embodiment 1) FIG. 1 is a schematic cross-sectional view of a liquid crystal display device 1 according to an example of the present embodiment, and FIG. 2 is a more detailed schematic cross-sectional view of the liquid crystal display device 1 according to an example of the present embodiment. FIG. 3 is a schematic plan view of the entire liquid crystal display device 1 according to an example of the present embodiment, as viewed from the observation surface side. As shown in FIG. 1, the liquid crystal display device 1 includes, in order from the rear side, a first substrate 10, a liquid crystal layer 20, and a second substrate 30. In this embodiment, a TFT substrate is used as the first substrate 10. Note that a portion or structure having a structure in which the liquid crystal layer 20 is sandwiched between the first substrate 10 and the second substrate 30 is also referred to as a liquid crystal panel 1X.

[0037] The liquid crystal display device 1 has a plurality of pixels P. The plurality of pixels P are preferably arranged in a matrix as shown in FIG. 3. The plurality of pixels P typically include three types of pixels, namely red pixels, green pixels, and blue pixels, but the number of types of pixels may be two or less, or may be four or more. Each pixel P includes a thin film transistor (TFT) 110, and a first electrode 121 and a second electrode 122 capable of generating a transverse electric field in the liquid crystal layer 20. A gate electrode of the TFT 110 is electrically connected to a corresponding gate line (also referred to as a scanning line) GL, and a source electrode of the TFT 110 is electrically connected to a corresponding source line (also referred to as a signal line) SL. A drain electrode of the TFT 110 is electrically connected to the second electrode 122.

[0038] <First substrate> As shown in FIG. 2, the first substrate 10 has, in order from the back side to the observation side, a reflective layer 130 that reflects light, a first electrode 121, a second electrode 122, and a first horizontal alignment film 140 that contacts the liquid crystal layer 20. The first substrate 10 preferably further has a support substrate 100 and a backplane circuit BP on the back side of the reflective layer 130. An insulating layer (also called an insulating film) is provided between each layer, etc., as necessary. For example, a first interlayer insulating layer 151 is provided so as to cover the backplane circuit BP, a second interlayer insulating layer 152 is provided on the first interlayer insulating layer 151 with the reflective layer 130 sandwiched therebetween, and a dielectric layer (also called a third interlayer insulating layer) 153 is provided between the first electrode 121 and the second electrode 122.

[0039] The supporting substrate 100 is preferably transparent and insulating, and examples of the supporting substrate 100 include a glass substrate and a plastic substrate.

[0040] The backplane circuit BP is provided on a support substrate 100. The backplane circuit BP is a circuit for driving a plurality of pixels P, and includes a TFT 110, a gate line GL, a source line SL, etc. Usually, the backplane circuit BP also includes a gate insulating film 150G.

[0041] The TFT 110 is provided in each of the pixels P. The TFT 110 is preferably one including an oxide semiconductor layer as an active layer (also referred to as an oxide semiconductor TFT). The oxide semiconductor included in the oxide semiconductor layer has been attracting attention in recent years as an active layer material to replace amorphous silicon and polycrystalline silicon, and has a higher mobility than amorphous silicon. Therefore, the oxide semiconductor TFT can operate at a higher speed than the amorphous silicon TFT. In addition, the oxide semiconductor layer can be formed by a simpler process than the polycrystalline silicon layer, and can be applied to devices requiring a large area.

[0042] Since oxide semiconductor TFTs also have excellent off-leak characteristics, a driving method can be used to display images by reducing the frequency of rewriting. For example, when displaying a still image, image data can be rewritten once per second. This type of driving method is called pause driving or low-frequency driving, and can significantly reduce the power consumption of a liquid crystal display device. By employing pause driving and performing touch detection during periods when images are not being rewritten, it is possible to suppress a decrease in sensitivity of touch operations due to noise from the driving circuit, and the S / N ratio (signal-to-noise ratio) can be increased, for example, to about 10 times that of conventional devices.

[0043] The oxide semiconductor TFT is also advantageous in terms of reducing the size of the TFT, and therefore can suitably realize a configuration in which a memory circuit is provided for each pixel P (also referred to as MIP (Memory In Pixels)).

[0044] The oxide semiconductor may be an amorphous oxide semiconductor or a crystalline oxide semiconductor having a crystalline portion. Examples of the crystalline oxide semiconductor include a polycrystalline oxide semiconductor, a microcrystalline oxide semiconductor, and a crystalline oxide semiconductor whose c-axis is oriented substantially perpendicular to the layer surface.

[0045] The oxide semiconductor layer may be a single layer or may have a laminated structure of two or more layers. The oxide semiconductor layer having a laminated structure may include an amorphous oxide semiconductor layer and a crystalline oxide semiconductor layer, may include a plurality of crystalline oxide semiconductor layers having different crystal structures, or may include a plurality of amorphous oxide semiconductor layers. When the oxide semiconductor layer has a two-layer structure including an upper layer and a lower layer, the energy gap of the oxide semiconductor included in the lower layer may be different from the energy gap of the oxide semiconductor included in the upper layer.

[0046] The materials and structures of the amorphous oxide semiconductor and each crystalline oxide semiconductor, the film formation method, and the configuration of the oxide semiconductor layer having a laminated structure are described in, for example, JP 2014-007399 A. For reference, the entire disclosure of JP 2014-007399 A is incorporated herein by reference.

[0047] Specifically, the oxide semiconductor layer preferably contains at least one metal element selected from In (indium), Ga (gallium), and Zn (zinc). Among them, an oxide semiconductor film containing a ternary oxide of In, Ga, and Zn is more preferable. A preferred example of the ternary oxide of In, Ga, and Zn is indium gallium zinc oxide. A semiconductor containing a ternary oxide of In, Ga, and Zn is called an In-Ga-Zn-O-based semiconductor, and the ratio (composition ratio) of In, Ga, and Zn in this semiconductor is not particularly limited, and examples thereof include In:Ga:Zn=2:2:1, In:Ga:Zn=1:1:1, and In:Ga:Zn=1:1:2.

[0048] The In-Ga-Zn-O based semiconductor may be amorphous or crystalline. As a crystalline In-Ga-Zn-O based semiconductor, one in which the c-axis is oriented approximately perpendicular to the layer surface is preferable.

[0049] The crystal structure of the crystalline In-Ga-Zn-O-based semiconductor is disclosed in, for example, JP 2014-007399 A, JP 2012-134475 A, JP 2014-209727 A, etc. For reference, the entire disclosures of JP 2012-134475 A and JP 2014-209727 A are incorporated herein by reference. Since a TFT having an In-Ga-Zn-O-based semiconductor layer has high mobility (more than 20 times that of an a-Si TFT) and low leakage current (less than 1 / 100 that of an a-Si TFT), it is suitable for use as a driving TFT (for example, a TFT included in a driving circuit provided on the same substrate as the display area around a display area including a plurality of pixels) and a pixel TFT (a TFT provided in a pixel).

[0050] The oxide semiconductor layer may contain an oxide semiconductor other than an In-Ga-Zn-O-based semiconductor. For example, a ternary oxide of In, Sn (tin) and Zn may be mentioned, and for example, In2O3-SnO2-ZnO; InSnZnO is preferably exemplified. A semiconductor containing a ternary oxide of In, Sn and Zn is called an In-Sn-Zn-O-based semiconductor. Alternatively, the oxide semiconductor layer may include an In-Al-Zn-O based semiconductor, an In-Al-Sn-Zn-O based semiconductor, a Zn-O based semiconductor, an In-Zn-O based semiconductor, a Zn-Ti-O based semiconductor, a Cd-Ge-O based semiconductor, a Cd-Pb-O based semiconductor, CdO (cadmium oxide), an Mg-Zn-O based semiconductor, an In-Ga-Sn-O based semiconductor, an In-Ga-O based semiconductor, a Zr-In-Zn-O based semiconductor, an Hf-In-Zn-O based semiconductor, an Al-Ga-Zn-O based semiconductor, a Ga-Zn-O based semiconductor, an In-Ga-Zn-Sn-O based semiconductor, or the like.

[0051] The first interlayer insulating layer 151 is provided so as to cover the backplane circuit BP. The surface of the first interlayer insulating layer 151 on the reflective layer 130 side preferably has an uneven shape (also referred to as an uneven surface structure). This allows the reflective layer 130 to have an uneven surface structure that reflects this shape. The first interlayer insulating layer 151 having an uneven surface structure can be suitably formed using a photosensitive resin, for example, as described in Japanese Patent No. 3394926.

[0052] The reflective layer (also referred to as a reflective film) 130 is provided on the first interlayer insulating layer 151. The reflective layer 130 is formed from a material that reflects light. In particular, it is preferable that the reflective layer 130 is formed from a metal material having a high reflectance. Examples of materials for the reflective layer 130 include a silver alloy, an aluminum alloy, and an aluminum alloy.

[0053] The reflective layer 130 preferably has an uneven shape that reflects the uneven surface structure that the first interlayer insulating layer 151 preferably has. That is, the reflective layer 130 also preferably has an uneven surface structure. This uneven surface structure is also called MRS (Micro Reflective Structure) and is provided to diffusely reflect ambient light and realize a white display close to paper white. The uneven surface structure is preferably composed of a plurality of convex parts p arranged randomly so that the center distance between adjacent convex parts p is 5 μm or more and 50 μm or less. The center distance between adjacent convex parts p is more preferably 10 μm or more and 20 μm or less. The shape of the convex parts p is preferably approximately circular or approximately polygonal when viewed from the normal direction of the support substrate. The area of ​​the convex parts p that occupies one pixel P is preferably, for example, about 20 to 40%, and the height of the convex parts p is preferably, for example, 1 μm or more and 5 μm or less.

[0054] When the liquid crystal display device 1 includes the reflective layer 130 and a retardation layer with a broadband λ / 4 condition, the polarization conversion (e.g., conversion between circularly polarized light and linearly polarized light) specific to the reflective liquid crystal display device becomes possible, and the loss of light is sufficiently reduced. The broadband λ / 4 condition is a condition under which polarized light close to circularly polarized light can be obtained in a wide range of visible wavelengths.

[0055] The second interlayer insulating layer 152 is provided on the first interlayer insulating layer 151 so as to cover the reflective layer 130. That is, the reflective layer 130 is disposed between the first interlayer insulating layer 151 and the second interlayer insulating layer 152.

[0056] The first interlayer insulating layer 151 and the second interlayer insulating layer 152 are preferably formed from an organic insulating material or an inorganic insulating material. For example, organic insulating films obtained using an organic insulating material include organic films (relative dielectric constant ε=2 to 5) of acrylic resin, polyimide resin, novolac resin, etc., and laminates thereof. The thickness of the organic insulating film is not particularly limited, but is, for example, 2 μm or more and 4 μm or less. For example, inorganic insulating films obtained using an inorganic insulating material include inorganic films (relative dielectric constant ε=5 to 7) of silicon nitride (SiNx), silicon oxide (SiO2), etc., and laminates thereof. The thickness of the inorganic insulating film is not particularly limited, but is, for example, 1500 Å or more and 3500 Å or less. Alternatively, the inorganic insulating film may be a laminate of an organic insulating film and an inorganic insulating film. Among them, it is preferable that the first interlayer insulating layer 151 and the second interlayer insulating layer 152 are organic insulating films.

[0057] From the viewpoint of manufacturing, the interlayer insulating layers 151 and 152 are preferably highly transparent, and are preferably formed of the same material with high transmittance. The first interlayer insulating layer 151, which is farther from the observation surface side than the reflective layer 130, may have a low transmittance or may be opaque. From the viewpoint of light utilization efficiency, the second interlayer insulating layer 152 may be highly transparent, and may be made of a material with high transmittance different from that of the first interlayer insulating layer 151.

[0058] The first electrode 121 is disposed on the reflective layer 130 via the second interlayer insulating layer 152, and a dielectric layer 153 is disposed between the first electrode 121 and the second electrode 122. Therefore, the reflective layer 130 is located on the opposite side of the liquid crystal layer 20 with respect to the first electrode 121 and the second electrode 122 (i.e., on the rear side of the first electrode 121 and the second electrode 122). In this embodiment, of the first electrode 121 and the second electrode 122, the second electrode 122 is located relatively closer to the observation surface, and the first electrode 121 is located on the rear surface. The electrode located relatively closer to the observation surface is also referred to as an upper layer electrode, and the electrode located relatively closer to the rear surface is also referred to as a lower layer electrode.

[0059] One of the first electrode 121 and the second electrode 122 is a pixel electrode PE, and the other is a common electrode CE. The pixel electrode is provided in each of the multiple pixels P. The pixel electrode is electrically connected to the backplane circuit BP. In this embodiment, the first electrode 121 (lower layer electrode) is the common electrode CE, and the second electrode 122 (upper layer electrode) is the pixel electrode PE.

[0060] At least one of the first electrode 121 and the second electrode 122 has a plurality of strip portions SP and a slit Sl located between two adjacent strip portions of the plurality of strip portions. The strip portions SP correspond to electrode portions, and the slits Sl correspond to openings, and such electrodes are also called slit electrodes or finger electrodes. From the viewpoint of easily generating a transverse electric field, it is preferable that at least the upper layer electrode (pixel electrode PE in this embodiment) is a slit electrode. In this case, the lower layer electrode (common electrode CE in this embodiment) may be a planar electrode, that is, a so-called solid electrode, or may be a slit electrode.

[0061] In each pixel P, the strip portions SP constituting the slit electrode (in this embodiment, the second electrode 122 which is the pixel electrode PE) are linearly shaped and extend in the same direction in parallel to each other, and do not include any bent portions. This makes the alignment of the liquid crystal molecules uniform, and sufficiently suppresses the occurrence of alignment defects.

[0062] The band-shaped portion SP being "linear and not including any bent portions" means that the center line of the band-shaped portion SP, not the outer edge of the band-shaped portion SP, is linear and not bent. The center line of the band-shaped portion SP means the line that divides the band-shaped portion SP into two equal parts in the width direction. The width direction means the direction approximately perpendicular to the direction in which the band-shaped portion SP extends in a plan view. Therefore, even if the outer edge of the tip of the band-shaped portion SP is circular, as long as the center line of the band-shaped portion SP is a straight line and not bent, it is included in the shape "linear and not including any bent portions."

[0063] It is also preferable that the strip portion SP does not include a cutout portion. This further suppresses the occurrence of alignment disturbance. "The strip portion SP does not include a cutout portion" means that no part of the strip portion SP is cut out or removed.

[0064] In each pixel P, the directions in which the strip portions SP extend (also referred to as the extension directions of the strip portions SP) are approximately parallel to one another. The extension directions of the strip portions SP may differ for each pixel, but are preferably the same for two or more adjacent pixels. In particular, from the viewpoints of image quality and manufacturing, it is more preferable that the extension directions of the strip portions SP are the same at least for adjacent pixels. Each of Figs. 6A to 6F described later shows an example in which the extension directions of the strip portions SP are the same for adjacent pixels. It is also more preferable that the extension directions of the strip portions SP are the same in the display area.

[0065] The width L of each strip portion SP differs depending on the applied voltage, etc., but is preferably, for example, 0.3 to 10 μm. The above L is more preferably 1 to 5 μm. The interval between two adjacent strip portions SP (i.e., the interval between the center lines of each strip portion) also differs depending on the applied voltage, etc., but is preferably, for example, 0.3 to 10 μm. The above interval is more preferably 1 to 5 μm.

[0066] The ratio L / S (also referred to as the L / S condition) of the width L of each belt-like portion in a plan view to the width S of each slit in a plan view is preferably 0.4 to 0.7 / 1. This improves the reflectance of white display (also referred to as the white reflectance), and thus further improves the contrast ratio (also simply referred to as "contrast"). The L / S condition is, for example, 1.6 / 3 (i.e., 0.533 / 1), L / S=2.2 / 4.1 (i.e., 0.537 / 1), or L / S=3 / 5 (i.e., 0.6 / 1).

[0067] The alignment direction of the liquid crystal molecules 21 on the first substrate 10 side when no voltage is applied (i.e., the alignment direction of the liquid crystal molecules 21A defined by the first horizontal alignment film 140) is 0° or more and 16° or less with respect to the extension direction of the multiple strip-shaped portions SP as the reference (0°). This angle, that is, the angle formed by the alignment direction of the liquid crystal molecules 21 on the first substrate 10 side when no voltage is applied when the extension direction of the multiple strip-shaped portions SP is used as the reference (0°) and the angle rotated clockwise is defined as a positive angle (+) and the angle rotated counterclockwise is defined as a negative angle (-), is referred to as the slit angle. The definition of the slit angle will be described with reference to FIG. 4.

[0068] 4 is a diagram for explaining the slit angle of positive type liquid crystal molecules. The (p) added to the suffix of the symbol of the liquid crystal molecule means positive type. In this specification, the liquid crystal molecule 21 in the vicinity of the first horizontal alignment film 140 (i.e., the liquid crystal molecule on the first substrate 10 side) is also referred to as liquid crystal molecule 21A. The liquid crystal molecule 21 in the vicinity of the second horizontal alignment film 340 (i.e., the liquid crystal molecule on the second substrate 30 side) is also referred to as liquid crystal molecule 21B.

[0069] In the case of positive-type liquid crystal molecules, the alignment direction of the liquid crystal molecules 21A on the first substrate 10 side when no voltage is applied corresponds to the long axis direction of the liquid crystal molecules 21A. When the long axis direction of the liquid crystal molecules 21A and the extension direction of the strip-shaped portions SP are parallel to each other, the slit angle is 0° (see the "0°" column in FIG. 4). When the extension direction of the strip-shaped portions SP rotates clockwise with the long axis direction of the liquid crystal molecules 21A as the reference (0°), the slit angle is a positive angle (+) (see the "Positive (+)" column in FIG. 4). When the extension direction of the strip-shaped portions SP rotates counterclockwise with the long axis direction of the liquid crystal molecules 21A as the reference (0°), the slit angle is a negative angle (-) (see the "Negative (-)" column in FIG. 4).

[0070] Therefore, the slit angle can also be said to be the angle formed by the axis of the liquid crystal molecule 21A on the first substrate 10 side with the extension direction of the multiple strip-shaped portions as the reference (0°) and the axis having the larger absolute value of the dielectric constant when no voltage is applied.

[0071] In this embodiment, the slit angle is 0° or more and 16° or less. When the slit angle is within this range, the rotation directions of the liquid crystal molecules 21A on the first substrate 10 side and the liquid crystal molecules 21B on the second substrate 30 side coincide with each other, and thus the occurrence of alignment defects is sufficiently suppressed. In particular, from the viewpoint of suppressing the occurrence of alignment defects and further increasing the transmission efficiency, the slit angle is preferably 0° or more and 14° or less, more preferably 0° or more and 12° or less, even more preferably 0° or more and 10° or less, particularly preferably 0° or more and 7° or less, and most preferably 0° or more and 4° or less.

[0072] 5 and 6A show an example in which the extension direction of the strip-shaped portions SP is 0° (this angle is referred to as angle X) when the extension direction of the source wiring SL is taken as the reference (0°) and the angle rotated clockwise is taken as a positive angle (+) and the angle rotated counterclockwise is taken as a negative angle (-). Also, examples in which the angle X is -10°, +10°, -90°, -100°, and -80° are shown in Figs. 6B, 6C, 6D, 6E, and 6F, respectively. The aspect in which the angle X is 0° (see Figs. 5 and 6A) corresponds to the aspect in which the extension direction of the strip-shaped portions SP is parallel to the extension direction of the source wiring SL, and the aspect in which the angle X is -90° (see Fig. 6D) corresponds to the aspect in which the extension direction of the strip-shaped portions SP is parallel to the extension direction of the gate wiring GL. Figs. 5 and 6A to 6F are schematic plan views showing specific examples of pixels. 6A to 6F are planar schematic diagrams showing examples of pixel arrangements. The twisted orientation of liquid crystal molecules 21 is also shown in Fig. 6A to 6F.

[0073] The first electrode 121 and the second electrode 122 are preferably each made of a transparent conductive material, such as indium tin oxide (ITO), indium zinc oxide (IZO (registered trademark)), a mixture thereof, or the like.

[0074] In the embodiment shown in FIG. 2, the pixel electrode PE (the second electrode 122 in this embodiment) is electrically connected to the backplane circuit (more specifically, to the drain electrode of the TFT 110) via the contact electrode 160. The contact electrode 160 is formed in the same layer as the reflective layer 130 and is made of the same material (metal film, etc.) as the reflective layer 130. The first interlayer insulating layer 151 is formed with a first contact hole CH1 that exposes a part of the backplane circuit BP (more specifically, at least a part of the drain electrode of the TFT 110), and the contact electrode 160 is connected to the backplane circuit BP at the first contact hole CH1. The second interlayer insulating layer 152 is formed with a second contact hole CH2 that exposes a part of the contact electrode 160, and the pixel electrode PE (the second electrode 122 in this embodiment) is connected to the contact electrode 160 at the second contact hole CH2.

[0075] The dielectric layer 153 is provided so as to cover the first electrode 121. The dielectric layer 153 is preferably formed from an inorganic insulating material. The inorganic insulating film obtained using the inorganic insulating material is as described above.

[0076] The first horizontal alignment film 140 is provided on the second electrode 122 and is in contact with the liquid crystal layer 20. Therefore, it can be said that the first electrode 121 and the second electrode 122 are disposed between the second interlayer insulating layer 152 and the first horizontal alignment film 140.

[0077] The first horizontal alignment film 140 and the second horizontal alignment film 340 described later are each subjected to an alignment treatment, and define the alignment direction (also referred to as the alignment direction) of the liquid crystal molecules 21 contained in the liquid crystal layer 20. For example, the alignment treatment is preferably performed by a photo-alignment treatment or a rubbing treatment. In the photo-alignment treatment, a photodecomposition type photo-alignment film material can be used, and in the rubbing treatment, it is preferable to use an alignment film material such as polyimide.

[0078] Both the first horizontal alignment film 140 and the second horizontal alignment film 340 are horizontal alignment films that align the liquid crystal molecules 21 in a direction horizontal to the first substrate 10 and the second substrate 30 when no voltage is applied to the liquid crystal layer 20. That is, the liquid crystal molecules 21 are horizontally aligned when no voltage is applied to the liquid crystal layer 20. The pretilt angle is substantially 0°.

[0079] The alignment direction of the liquid crystal molecules 21 determined by the first horizontal alignment film 140 is different from the alignment direction of the liquid crystal molecules 21 determined by the second horizontal alignment film 340. Therefore, the liquid crystal layer 20 has a twisted alignment when no voltage is applied (see FIG. 2). When a voltage is applied to the liquid crystal layer 20, that is, when a transverse electric field is generated in the liquid crystal layer 20 by the first electrode 121 and the second electrode 122, the alignment state of the liquid crystal layer 20 changes due to the transverse electric field (fringe electric field).

[0080] In the present embodiment, the pixel electrode PE is provided above the common electrode CE. However, in a relatively large liquid crystal display device, that is, in a liquid crystal display device in which the area of ​​the pixel P is relatively large, it is preferable that the pixel electrode PE is provided above the common electrode CE. In this configuration (also referred to as the V2 structure), since there is no need to form a slit in the common electrode CE, which is the lower electrode, the increase in resistivity (sheet resistivity) of the common electrode CE is suppressed more than in the configuration (also referred to as the V3 structure) in which the common electrode CE is provided above the pixel electrode PE, and therefore the fringe electric field applied to the liquid crystal layer 20 is suppressed from weakening. In this configuration (V2 structure), when the pixel electrode PE is a slit electrode, the resistivity of the pixel electrode PE increases, but since an externally input voltage is applied to the pixel electrode PE, it is easy to reduce the effect of the increase in resistivity (i.e., to suppress the fringe electric field from weakening). In order to suppress the increase in resistivity of the common electrode CE, it is possible to use low-resistance wiring made of a metal material (for example, connecting the low-resistance wiring to the common electrode). However, in such a configuration, adverse effects on the display due to specular reflection from the low-resistance wiring (for example, glare, rainbow-colored diffraction, interference patterns) may occur, making it necessary to block light with a black matrix or the like, and it may not be possible to sufficiently improve the reflective aperture ratio.

[0081] In the configuration in which the pixel electrode PE is provided above the common electrode CE, the common electrode CE is not present in the region in which the second contact hole CH2 is formed, and the region does not contribute to reflective display, so that the reflectance may be lower than in the configuration in which the common electrode CE is provided above the pixel electrode PE. Since the area of ​​the region that does not contribute to reflective display, such as the contact hole, is required to a certain extent regardless of the size of the area of ​​the pixel P, the ratio of the region that does not contribute to reflective display in the pixel P increases as the area of ​​the pixel P decreases (i.e., the resolution increases), and the above-mentioned decrease in reflectance increases. In other words, in a relatively large liquid crystal display device, the ratio of the region that does not contribute to reflective display in the pixel P is easier to reduce, so that the above-mentioned decrease in reflectance is easier to suppress. For these reasons, in a relatively large liquid crystal display device, a configuration in which the pixel electrode PE is provided above the common electrode CE is advantageous.

[0082] On the other hand, as described above, the reduction in reflectance due to the region in which the second contact hole CH2 is formed not contributing to the reflective display becomes greater as the area of ​​the pixel P becomes smaller (i.e., as the resolution increases). Therefore, in a relatively high-resolution liquid crystal display device, i.e., a liquid crystal display device in which the area of ​​the pixel P is relatively small, it is preferable that the common electrode CE is provided above the pixel electrode PE (see Variant 1 of Embodiment 1 described below).

[0083] <Liquid crystal layer> The liquid crystal layer 20 is located between the first substrate 10 and the second substrate 30, and contains a liquid crystal material. In this embodiment, the liquid crystal layer 20 contains positive type liquid crystal molecules. That is, the liquid crystal material constituting the liquid crystal layer 20 is a liquid crystal material with positive type dielectric anisotropy (meaning a nematic liquid crystal material with positive dielectric anisotropy Δε). Note that a negative type liquid crystal material means a liquid crystal material with negative type dielectric anisotropy, that is, a nematic liquid crystal material with negative dielectric anisotropy Δε. The dielectric anisotropy Δε is determined by the dielectric constant ε in the long axis direction of the liquid crystal molecules 21. / / and the dielectric constant in the minor axis direction ε ⊥ (i.e., ε / / -ε ⊥ ).

[0084] From the viewpoint of manufacturing (e.g., yield rate, etc.), the thickness d (also referred to as cell gap or cell thickness) of the liquid crystal layer 20 is preferably 2 μm or more, and the birefringence Δn of the liquid crystal material (i.e., positive type liquid crystal material) is preferably 0.123 or less. From the viewpoint of response, the cell thickness d is preferably 3 μm or less, and the birefringence Δn of the liquid crystal material is preferably 0.082 or less. From the viewpoint of improving reflectance, the birefringence Δn of the liquid crystal material is preferably 0.08 or less, and more preferably 0.07 or less. The dielectric anisotropy Δε of the liquid crystal material is preferably 10 or more in order to suppress the maximum voltage in the voltage-reflectance characteristics and voltage-transmittance characteristics to 6 V or less.

[0085] The liquid crystal layer 20 may further include a chiral agent, if necessary. The liquid crystal layer 20 can be formed by, for example, a dropping method.

[0086] From the viewpoint of suppressing alignment disturbance, the liquid crystal layer 20 is preferably in a single domain alignment (also referred to as monodomain alignment).

[0087] <Second board> The second substrate 30 is disposed opposite the first substrate 10 with the liquid crystal layer 20 interposed therebetween, and has a second horizontal alignment film 340 in contact with the liquid crystal layer 20. The second substrate 30 preferably further has a support substrate 300 and a color filter layer 310. For example, as shown in FIG. 2, the second substrate 30 has, in order from the liquid crystal layer 20 side, the second horizontal alignment film 340, the color filter layer 310, and the support substrate 300. The second substrate 30 preferably also has a plurality of columnar spacers (not shown). Note that the first substrate 10 may have a plurality of columnar spacers.

[0088] The support substrate 300 is preferably transparent and insulating, and examples of the support substrate 300 include a glass substrate and a plastic substrate. A high-resistance transparent conductive film may be formed on the surface of the support substrate 300 opposite to the liquid crystal layer 20 (for example, in FIG. 2, the surface of the support substrate 300 on the retardation layer 40 side) in order to prevent static electricity from sticking to the liquid crystal cell. This high-resistance transparent conductive film may have a multi-layer structure in consideration of suppressing a decrease in transmittance and suppressing an increase in reflectance.

[0089] The color filter layer 310 typically includes a red color filter provided in an area corresponding to a red pixel and transmitting red light, a green color filter provided in an area corresponding to a green pixel and transmitting green light, and a blue color filter provided in an area corresponding to a blue pixel and transmitting blue light. However, the number of types of color filters may be two or less, or four or more. If color display is not performed, the color filter layer 310 is omitted.

[0090] If necessary, an overcoat layer (also called a planarizing layer) may be provided to cover the color filter layer 310. Note that the white display may have a yellowish tinge depending on the material (e.g., transparent conductive material) forming the electrodes, the material forming the interlayer insulating layer and the dielectric layer, and the material forming the alignment film. In that case, the chromaticity of the white display may be adjusted (i.e., blue shift) by forming the overcoat layer from a blue resist, so that the chromaticity of the white display may be brought closer to that of a D65 light source, for example. The D65 light source is the CIE standard illuminant D65.

[0091] <Other configurations etc.> In the liquid crystal display device 1 of this embodiment, display is performed by a lateral electric field mode in which the liquid crystal layer 20 has a twisted orientation when no voltage is applied. This allows the cell gap to be increased, and the contrast fluctuation range with respect to the cell gap fluctuation to be reduced. Therefore, the occurrence of display unevenness is sufficiently suppressed, and the contrast of the reflective display becomes good. The twist angle θ1 of the liquid crystal layer 20 when no voltage is applied is preferably 58.3° or more and 89.9° or less. A more preferable range will be described later.

[0092] The twist angle θ1 of the liquid crystal layer 20 is the angle between the alignment direction of the liquid crystal molecules 21 determined by the first horizontal alignment film 140 and the alignment direction of the liquid crystal molecules 21 determined by the second horizontal alignment film 340. That is, it is the angle between the long axis direction of the liquid crystal molecules 21A (also referred to as the liquid crystal molecules 21A on the first substrate 10 side when no voltage is applied) near the first horizontal alignment film 140 and the long axis direction of the liquid crystal molecules 21B (also referred to as the liquid crystal molecules 21B on the second substrate 30 side when voltage is applied) near the second horizontal alignment film 340.

[0093] From the viewpoint of increasing the contrast ratio, the liquid crystal display device 1 is preferably in a normally black mode. The normally black mode is a display mode in which black is displayed when no voltage is applied and white is displayed when a voltage is applied.

[0094] The liquid crystal display device 1 is also configured with a plurality of components, such as the above-mentioned components, external circuits such as a TCP (tape carrier package) and a PCB (printed wiring board), optical films such as a viewing angle widening film and a brightness enhancing film, and a bezel (frame), and some of the components may be incorporated into other components. These are not particularly limited, and those commonly used in the field of liquid crystal display devices can be used, so their explanation will be omitted.

[0095] <Application Examples> The liquid crystal display device 1 of the present embodiment is suitable for various applications. In particular, it is preferably applicable to touch panels. Whether it is applied to an external touch panel or a built-in touch panel, it is useful because it can be produced at a lower cost than conventional touch panels and has an improved contrast ratio. In particular, it is preferably applicable to a built-in touch panel, and is particularly preferably applicable to an in-cell touch panel. In this way, by using the liquid crystal display device 1 of the present embodiment, an in-cell touch panel capable of displaying in a reflective mode can be preferably realized.

[0096] By realizing an in-cell touch panel capable of displaying in reflective mode, for example, a frame wiring area required for an external touch panel is not required, so that a narrow frame can be achieved, and since the touch panel function can be installed without a cover glass, it contributes to a thinner and lighter touch panel. In addition, since the touch function and the display function are driven in a time-division manner, the touch panel is not affected by LCD (liquid crystal display) noise, which can be the largest noise source in a touch panel. In other words, since no killer pattern occurs, tuning (adjustment) of the touch signal is easy. Furthermore, the loss of reflected light is sufficiently small, and a more natural and natural display can be obtained when writing with a pen. Moreover, compared to an external touch panel, a total cost reduction can be achieved from the user's perspective. Moreover, it is possible to combine finger input with pen input using the electromagnetic induction method (EMR), which allows for highly accurate pen writing.

[0097] An example in which the liquid crystal display device 1 is used in an in-cell touch panel will be further described. Fig. 7 is a plan view schematic illustrating the arrangement relationship between the touch sensor electrodes TX and the touch wirings TL included in the liquid crystal display device 1. As shown in Fig. 7, the liquid crystal display device 1 has a display area DR and a non-display area FR. The display area DR is defined by a plurality of pixels P (see Fig. 3, for example) arranged in a matrix. The non-display area FR is located on the periphery of the display area DR and is also referred to as a peripheral area or a frame area.

[0098] In the display region DR, the common electrode CE is divided into a plurality of segments TX. Each segment (common electrode portion) TX functions as a touch sensor electrode. In the example shown in FIG. 7, each touch sensor electrode TX is provided corresponding to two or more pixels P.

[0099] The liquid crystal display device 1 (more specifically, the first substrate 10) has a plurality of touch wirings TL. Each touch sensor electrode TX is electrically connected to a corresponding touch wiring TL. A connection portion TC between the touch sensor electrode TX and the touch wiring TL is also referred to as a touch wiring contact portion TC.

[0100] The touch wiring TL is connected to a touch driving unit TD provided in the non-display region FR. The touch driving unit TD is configured to switch, for example, between a display mode in which a plurality of touch sensor electrodes TX function as a common electrode CE and a touch detection mode in which the touch sensor electrodes TX function as the touch sensor electrodes TX in a time-division manner. For example, in the display mode, the touch driving unit TD applies a common signal to the touch sensor electrodes TX (common electrodes CE) via the touch wiring TL. On the other hand, in the touch detection mode, the touch driving unit TD applies a touch driving signal to the touch sensor electrodes TX via the touch wiring TL.

[0101] 7, the touch wirings TL extend in the column direction (the same direction as the source wirings SL). Some of the touch wirings TL extend to the corresponding touch sensor electrodes TX, crossing one or more other touch sensor electrodes TX.

[0102] Focusing on a certain touch sensor electrode TX, a first touch wiring TL1 that supplies a signal to the touch sensor electrode TX extends to a touch wiring contact portion TC, and a second touch wiring TL2 that supplies a signal to another touch sensor electrode TX extends across the touch sensor electrode TX. The second touch wiring TL2 and the touch sensor electrode TX overlap with each other via an insulating layer. Depending on the position of the touch sensor electrode TX, two or more touch wirings TL may be arranged to extend across the touch sensor electrode TX, or no touch wiring TL may be arranged to cross the touch sensor electrode TX.

[0103] In addition to the touch drive unit TD, the non-display area FR is provided with peripheral circuits including drive circuits such as a gate driver that supplies gate signals to the gate bus lines (gate wiring) GL and a source driver that supplies source signals to the source bus lines (source wiring) SL (not shown). These drive circuits may be mounted on the first substrate (TFT substrate) 10, for example, or may be formed integrally (monolithically). A semiconductor chip including some or all of the drive circuits may be mounted on the non-display area FR.

[0104] In an in-cell touch panel, it is particularly preferable to use an In-Ga-Zn-O based semiconductor as the TFT 110.

[0105] (Modification 1 of the first embodiment) In the first embodiment, the first electrode 121, which is a lower layer electrode, is the common electrode CE, and the second electrode 122, which is an upper layer electrode, is the pixel electrode PE. However, the second electrode 122 may be the common electrode CE, and the first electrode 121 may be the pixel electrode PE. In this example, the second electrode 122 (upper layer electrode) is the common electrode CE, and the first electrode 121 (lower layer electrode) is the pixel electrode PE (see FIG. 8).

[0106] FIG. 8 is a schematic cross-sectional view of the liquid crystal display device 1 of this example. In this example as well, from the viewpoint of easily generating a transverse electric field, it is preferable that at least the upper layer electrode (common electrode CE in this example) is a slit electrode. The lower layer electrode (pixel electrode PE in this example) may be a planar electrode, i.e., a so-called solid electrode, or may be a slit electrode. As described above, the liquid crystal display device 1 of this modified example is particularly suitable as a relatively high-definition liquid crystal display device, i.e., a liquid crystal display device in which the area of ​​the pixel P is relatively small.

[0107] (Modification 2 of the first embodiment) In the first embodiment, an FFS mode liquid crystal display device has been described, but an IPS mode liquid crystal display device may also be used (however, the liquid crystal layer 20 has a twisted orientation when no voltage is applied). This modification is an IPS mode liquid crystal display device. In this modification, the first electrode 121 and the second electrode 122 are provided in the same layer, and it is preferable that both the first electrode 121 and the second electrode 122 are slit electrodes.

[0108] (Embodiment 2) In this embodiment, features unique to this embodiment will be mainly described, and descriptions of contents overlapping with the above-mentioned embodiment 1 will be omitted. The liquid crystal display device of this embodiment mainly differs from the liquid crystal display device of embodiment 1 in that it has a retardation layer and a polarizing plate on both sides of the liquid crystal panel 1X, and has a light source on the rear side of the liquid crystal layer 20.

[0109] FIG. 9 is a schematic cross-sectional view of a liquid crystal display device 1 according to an example of the present embodiment. FIG. 10 is a more detailed schematic cross-sectional view of a liquid crystal display device 1 according to an example of the present embodiment. As shown in FIG. 9, the liquid crystal display device 1 includes, in order from the rear surface side to the observation surface side, a first polarizing plate 51, a first retardation layer 41, a first substrate 10, a liquid crystal layer 20, a second substrate 30, a second retardation layer 42, and a second polarizing plate 52. The first retardation layer 41 includes a first λ / 2 plate 412 and a first λ / 4 plate 411. The second retardation layer 42 includes a first λ / 2 plate 422 and a first λ / 4 plate 421. At least one of the first retardation layer 41 and the second retardation layer further includes a positive C plate 44. In FIG. 9 and FIG. 10, an example in which the second retardation layer further includes a positive C plate 44 is shown as an example of the present embodiment.

[0110] In the liquid crystal display device 1 of this embodiment, each pixel P has a reflective region Rf (i.e., a region that displays in a reflective mode) that reflects light to perform display, and a transmissive region Tr (a region that displays in a transmissive mode) that transmits light to perform display (see FIG. 11). This allows for good visibility in any environment. Therefore, the liquid crystal display device 1 of this embodiment is a semi-transmissive liquid crystal display device. FIG. 11 is a plan view schematic diagram conceptually showing that each pixel P has a reflective region Rf and a transmissive region Tr in the liquid crystal display device 1 of this embodiment.

[0111] A reflective layer 130 is disposed in the reflective region Rf. For example, light L1 (e.g., external light) enters the liquid crystal display device 1 from the observation surface side, is reflected by the reflective layer 130, and then exits from the observation surface side (see FIG. 10). On the other hand, the reflective layer 130 is not disposed in the transmissive region Tr (see FIG. 11). For example, when a backlight 61 is disposed on the rear side, light L2 from the backlight 61 passes through a region (transmissive region Tr) where the reflective layer 130 is not disposed, and exits from the observation surface side (see FIG. 10).

[0112] The ratio of the area of ​​the transmissive region Tr in each pixel P (aperture ratio) can be set appropriately depending on the application, etc., but is preferably 5% to 95% when the area of ​​one pixel P is 100%. In addition, the position and shape of the transmissive region Tr in the pixel P can also be set appropriately depending on the application, etc.

[0113] 12 and 13A show an example in which the extension direction (angle X) of the strip portions SP is 0° when the extension direction of the source wiring SL is taken as the reference (0°), and the angle rotated clockwise is taken as a positive angle (+), and the angle rotated counterclockwise is taken as a negative angle (-). Also, examples in which the angle X is -10°, +10°, -90°, -100°, and -80° are shown in Figs. 13B, 13C, 13D, 13E, and 13F, respectively. The mode in which the angle X is 0° (see Figs. 12 and 13A) corresponds to the mode in which the extension direction of the strip portions SP is parallel to the extension direction of the source wiring SL, and the mode in which the angle X is -90° (see Fig. 13D) corresponds to the mode in which the extension direction of the strip portions SP is parallel to the extension direction of the gate wiring GL. Fig. 12 and Fig. 13A to Fig. 13F are schematic plan views showing specific examples of pixels in this embodiment. Of these, Fig. 12 is a schematic plan view showing an example of the pixel structure, and Fig. 13A to Fig. 13F are schematic plan views showing an example of the pixel arrangement. Fig. 13A to Fig. 13F also show the twisted orientation of liquid crystal molecules 21.

[0114] <Retardation layer> The first retardation layer 41 is located between the first substrate 10 and the first polarizing plate 51, and includes a λ / 4 plate 411 and a λ / 2 plate 412. The second retardation layer 42 is located between the second substrate 30 and the second polarizing plate 52, and includes a λ / 4 plate 421, a λ / 2 plate 422, and a positive C plate 44. The positional relationship between the λ / 4 plate and the λ / 2 plate in each retardation layer is preferably such that the λ / 2 plate 412 and the λ / 4 plate 411 are arranged in this order from the back surface side in the first retardation layer 41, and such that the λ / 2 plate 422 and the λ / 4 plate 421 are arranged in this order from the observation surface side in the second retardation layer 42.

[0115] The λ / 4 plate means a retardation plate that imparts an in-plane phase difference of 1 / 4 wavelength to incident light of wavelength λ, and is also called a λ / 4 wave plate or QWP (Quarter-Wave Plate). Specifically, the λ / 4 plate can convert linearly polarized light into circularly polarized light or circularly polarized light into linearly polarized light. For example, linearly polarized light incident on the λ / 4 plate becomes circularly polarized light when it is output.

[0116] A λ / 2 plate means a retardation plate that imparts an in-plane phase difference of 1 / 2 wavelength to incident light of wavelength λ, and is also called a λ / 2 wave plate, half wave plate, or HWP (Half-Wave Plate). Specifically, a λ / 2 plate can rotate the vibration direction of an incident light beam by approximately 90°. For example, circularly polarized light that enters a λ / 2 plate becomes circularly polarized light with the rotation direction reversed when it is emitted.

[0117] It is preferable that the first λ / 4 plate 411 and the second λ / 4 plate 421 have substantially the same in-plane retardation Re. Substantially the same means that the difference between these in-plane retardation Re is less than 5 nm. The difference between the in-plane retardation Re is preferably less than 1 nm.

[0118] It is preferable that the first λ / 2 plate 412 and the second λ / 2 plate 422 have substantially the same in-plane retardation Re. Substantially the same means that the difference between these in-plane retardations Re is less than 5 nm. The difference between the in-plane retardations Re is preferably less than 1 nm.

[0119] As the λ / 4 plates 411, 421 and the λ / 2 plates 412, 422, general-purpose retardation plates can be used. More specifically, it is preferable to use retardation plates that are generally distributed as, for example, circularly polarizing plates of anti-reflection films. In the present invention, preferably, by controlling the optical axis setting of each optical film within a predetermined range described later, even if a general-purpose retardation plate is used as the λ / 4 plate and the λ / 2 plate instead of a special retardation plate, the contrast ratio and viewing angle can be improved while being a transverse electric field type semi-transmissive liquid crystal display device, and it is also useful as an in-cell type touch panel, so that cost reduction can be achieved. In particular, from the user's perspective, it is very useful because it can reduce the total cost. Cost reduction can be achieved similarly when the liquid crystal display device of the present invention is used not only as a built-in touch panel such as an in-cell type, but also as an external touch panel.

[0120] Specifically, it is preferable to use uniaxial A-plates as the λ / 4 plates 411 and 421 and the λ / 2 plates 412 and 422.

[0121] As described above, in this embodiment, each of the retardation layers 41 and 42 includes a λ / 4 plate and a λ / 2 plate, and at least one of the retardation layers 41 and 42 further includes a positive C plate. In this case, the obtained liquid crystal display device can achieve excellent viewing angle characteristics and high contrast. In particular, brightness floating during black display (also called black floating) is sufficiently suppressed, and the viewing angle during black display is expanded. From the viewpoint of further exerting the above effect, it is preferable that the positive C plate is located between the λ / 4 plate and the λ / 2 plate. In particular, when the retardation layer includes one positive C plate, this arrangement is preferable. In this embodiment, only the second retardation layer 42 includes one positive C plate 44. In this case, it is preferable that the λ / 4 plate 421, the positive C plate 44, and the λ / 2 plate 422 are located in this order from the liquid crystal layer 20 (and the second substrate 30) side (see FIG. 10).

[0122] The positive C plate 44 (as well as 43, 45, etc. described later) may be made of a single film, or may be a laminate of two or more retardation films.

[0123] In this specification, a portion (structure) that is sandwiched between layers other than the positive C plate and acts as a positive C plate is counted as "one positive C plate". In this case, it does not matter whether the positive C plate is a laminate or not. Therefore, for example, when the retardation layer includes a λ / 4 plate, a multilayered positive C plate, and a λ / 2 plate in this order, it is called "the retardation layer has one positive C plate". In addition, when the retardation layer includes a λ / 4 plate, two commercially available positive C plates, and a λ / 2 plate in this order, it is called "the retardation layer has one positive C plate". When the retardation layer includes a λ / 4 plate, a first positive C plate (whether it is a laminate or not), a λ / 2 plate, and a second positive C plate (whether it is a laminate or not), it is called "the retardation layer has two positive C plates".

[0124] As the positive C plate 44 (and 43, 45, etc. described later), it is preferable to use, for example, a film containing a material with negative intrinsic birefringence as a component, which is biaxially stretched lengthwise and widthwise, or a film coated with a liquid crystal material such as nematic liquid crystal, etc. Examples of materials with negative intrinsic birefringence include resin compositions containing acrylic resins and styrene resins, polystyrene, polyvinyl naphthalene, polyvinyl biphenyl, polyvinyl pyridine, polymethyl methacrylate, polymethyl acrylate, N-substituted maleimide copolymers, polycarbonates having a fluorene skeleton, triacetyl cellulose (especially those with a low degree of acetylation), etc.

[0125] Specific examples of the positive C plate 44 (and 43, 45, etc.) include a positive C plate manufactured by ENEOS Corporation or Hayashi Telempu Corporation, and a Positive-C retardation film manufactured by Nippon Kayaku Co., Ltd.

[0126] In order to enhance the viewing angle improving effect, the thickness direction retardation Rth of the positive C plate 44 (and 43) is preferably 150 to 270 nm, more preferably 160 to 250 nm, and further preferably 170 to 240 nm.

[0127] The thickness of each of the positive C plates 44 (and 43) is preferably, for example, 0.1 to 100 μm. Within this range, mechanical strength and display uniformity are superior. Each of the above thicknesses is more preferably 0.1 to 80 μm, and even more preferably 0.1 to 50 μm. When the positive C plate 44 (and 43) has a laminated structure, it is preferable to set the total thickness of the whole to be within the above range, and the thicknesses of the respective retardation films may be the same or different.

[0128] The retardation layer including a positive C plate (corresponding to the second retardation layer 42 in this embodiment) may have a positive C plate (referred to as a second positive C plate) different from the positive C plate. In this case, it is preferable that the second positive C plate is located between the λ / 2 plate and the polarizing plate. In addition, in the later-described embodiment 3, an embodiment in which the first retardation layer 41 and the second retardation layer 42 each include a first positive C plate and the first retardation layer 41 further includes a second positive C plate will be described in detail.

[0129] From the viewpoint of improving the viewing angle characteristics and contrast, it is particularly preferable that the liquid crystal display device 1 of the present embodiment satisfies the following (i) or (ii). (i) The second retardation layer 42 includes one positive C plate, and the first retardation layer 41 does not include a positive C plate. (ii) The second retardation layer 42 includes one positive C plate, and the first retardation layer 41 includes two positive C plates. In this embodiment, the liquid crystal display device 1 that satisfies the above condition (i) will be described in detail (see, for example, FIGS. 9 and 10). In the embodiment 3 described later, the liquid crystal display device 1 that satisfies the above condition (ii) will be described in detail.

[0130] <Polarizing plate> The first polarizing plate 51 is located closer to the rear surface than the first retardation layer 41. The second polarizing plate 52 is located closer to the observation surface than the second retardation layer 42. The polarizing plates 51 and 52 may be circular polarizing plates or linear polarizing plates. Here, the linear polarizing plate means a polarizing plate having a function of extracting polarized light (linearly polarized light) that vibrates only in a specific direction from unpolarized light (natural light), partially polarized light, or polarized light, and is distinguished from a circular polarizing plate. Among them, a linear polarizing plate is preferable.

[0131] The polarizing plates 51 and 52 may be either an absorptive polarizing plate or a reflective polarizing plate. An absorptive polarizing plate is a polarizing plate that has the function of absorbing light that vibrates in a specific direction and transmitting polarized light (linearly polarized light) that vibrates in a direction perpendicular thereto. A reflective polarizing plate is a polarizing plate that has the function of reflecting light that vibrates in a specific direction and transmitting polarized light (linearly polarized light) that vibrates in a direction perpendicular thereto. Among these, an absorptive polarizing plate is preferred. It is particularly suitable to use an absorptive linear polarizing plate.

[0132] Examples of the absorptive polarizing plate include a polarizing plate obtained by dyeing and adsorbing an anisotropic material such as an iodine complex (or dye) on a polyvinyl alcohol film and then stretching and aligning the film. In general, in order to ensure mechanical strength and resistance to moist heat, the polyvinyl alcohol film is used in practical use with a protective film such as a triacetyl cellulose film laminated on both sides. Examples of the reflective polarizing plate include a film in which multiple dielectric thin films are laminated, a film in which multiple thin films with different refractive index anisotropy are laminated, a nanowire grid polarizing plate, and a polarizing plate using selective reflection of a cholesteric liquid crystal.

[0133] <Light source> It is preferable that the liquid crystal display device 1 further includes a light source. In this embodiment, a light source 61 (also referred to as a backlight) is further provided on the rear side of the liquid crystal layer 20 (see FIG. 9). The light source 61 is not particularly limited as long as it can irradiate light, and may be a direct type, an edge type, or any other type. The light source 61 preferably includes a light source such as a light emitting diode (LED), a light guide plate, and a reflective sheet, and may further include a diffusion sheet or a prism sheet.

[0134] <Preferred Settings> The following further describes the preferred optical axis settings of each optical film (i.e., polarizing plate and retardation layer). An absorptive polarizing plate is used as the polarizing plate. A liquid crystal layer that performs normally black display in a monodomain structure is assumed as the liquid crystal layer 20, and a positive liquid crystal material is used as the liquid crystal material constituting the liquid crystal layer 20. Note that the slow axis angle of the positive C plate is in the direction normal to the film (i.e., 90° when the alignment direction of the liquid crystal molecules 21A defined by the first horizontal alignment film 140 is 0°), so an embodiment without a positive C plate was examined. When a positive C plate is provided, each preferred setting is the same.

[0135] 14 is a plan view conceptually showing the relationship between the long axis direction of the liquid crystal molecules 21A in the liquid crystal layer 20 and the optical axis of each optical film (i.e., the in-plane slow axis of the λ / 4 plate and the λ / 2 plate and the polarization axis of the polarizer) in the liquid crystal display device 1 (see FIG. 9) including, in order from the back side to the observation side, a first polarizer 51, a first retardation layer 41, a first substrate 10, a liquid crystal layer 20, a second substrate 30, a second retardation layer 42, and a second polarizer 52. In FIG. 14, the liquid crystal molecules 21A near the first horizontal alignment film 140 and the liquid crystal molecules 21B near the second horizontal alignment film 340 are shown as the liquid crystal molecules 21.

[0136] In this specification, unless otherwise specified, each angle (e.g., twist angle, optical axis angle, etc.) is an angle when the liquid crystal panel 1X is likened to a clock face, the reference direction, i.e., the direction perpendicular to the extension direction of the multiple strip-shaped parts SP is set to the 0° direction (3 o'clock direction), and the twist direction is set to the positive (counterclockwise) direction (see FIG. 15). FIG. 15 is a diagram for explaining the optical axis angle of the optical film. The twist direction means the direction twisted from the alignment direction of the liquid crystal molecule 21A defined by the first horizontal alignment film 140 to the alignment direction of the liquid crystal molecule 21B defined by the second horizontal alignment film 340 when the liquid crystal display device 1 is viewed from the observation surface side. The liquid crystal molecule 21C is a liquid crystal molecule located between the liquid crystal molecule 21A and the liquid crystal molecule 21B.

[0137] The twist angle θ1 of the liquid crystal layer 20 when no voltage is applied is preferably 58.3° or more and 89.9° or less. This improves the contrast ratio. From the viewpoint of further improving the contrast ratio, the twist angle θ1 is more preferably 70° or more and 85° or less.

[0138] The angle of the polarization axis 51AA of the first polarizing plate 51 (θ2 in FIG. 14) is preferably 83.4 to 91.4°, more preferably 84.0 to 90.9°, further preferably 84.7 to 90.2°, and particularly preferably 85.5 to 89.3°.

[0139] The angle (θ3 in FIG. 14) of the in-plane slow axis 412SA of the first λ / 2 plate 412 is preferably −19.1 to −15.1°, more preferably −18.8 to −15.4°, further preferably −18.5 to −15.7°, and particularly preferably −18.0 to 16.2°.

[0140] The angle (θ4 in FIG. 14) of the in-plane slow axis 411SA of the first λ / 4 plate 411 is preferably −80.0 to −72.2°, more preferably −79.4 to −72.8°, further preferably −78.8 to −73.4°, and particularly preferably −77.9 to −74.3°.

[0141] Therefore, the polarization axis 51AA of the first polarizing plate 51, the in-plane slow axis 412SA of the first λ / 2 plate 412, and the in-plane slow axis 411SA of the first λ / 4 plate 411 are preferably positioned at angles of 83.4 to 91.4°, -19.1 to -15.1°, and -80.0 to -72.2°, respectively, more preferably at angles of 84.0 to 90.9°, -18.8 to -15.4°, and -79.4 to -72.8°, respectively, even more preferably at angles of 84.7 to 90.2°, -18.5 to -15.7°, and -78.8 to -73.4°, respectively, and particularly preferably at angles of 85.5 to 89.3°, -18.0 to 16.2°, and -77.9 to -74.3°, respectively.

[0142] The angle (θ4 in FIG. 14) of the in-plane slow axis 421SA of the second λ / 4 plate 421 is preferably 62.1 to 67.1°, more preferably 63.0 to 67.0°, further preferably 64.0 to 67.0°, and particularly preferably 64.5 to 66.0°.

[0143] The angle (θ3 in FIG. 14) of the in-plane slow axis 422SA of the second λ / 2 plate 422 is preferably 37.5 to 42.5°, more preferably 38.0 to 42.0°, further preferably 39.0 to 41.0°, and particularly preferably 40.0 to 41.0°.

[0144] The angle of the polarization axis 52AA of the second polarizing plate 52 (θ2 in FIG. 14) is preferably 19.5 to 26.5°, more preferably 19.5 to 26.0°, further preferably 19.5 to 25.5°, and particularly preferably 20.0 to 23.7°.

[0145] Therefore, the polarization axis 52AA of the second polarizing plate 52, the in-plane slow axis 422SA of the second λ / 2 plate 422, and the in-plane slow axis 421SA of the second λ / 4 plate 421 are preferably positioned at angles of 19.5 to 26.5°, 37.5 to 42.5°, and 62.1 to 67.1°, respectively, more preferably at angles of 19.5 to 26.0°, 38.0 to 42.0°, and 63.0 to 67.0°, respectively, even more preferably at angles of 19.5 to 25.5°, 39.0 to 41.0°, and 64.0 to 67.0°, respectively, and particularly preferably at angles of 20.0 to 23.7°, 40.0 to 41.0°, and 64.5 to 66.0°, respectively.

[0146] Fig. 19 shows the most preferable optical axis setting from the viewpoint of improving the contrast ratio. Fig. 19 is a conceptual diagram showing the most preferable optical axis setting. In Fig. 19, the in-plane retardation Re of the λ / 4 plates 411 and 421 is 140 nm, and the in-plane retardation Re of the λ / 2 plates 412 and 422 is 270 nm.

[0147] When the slit angle is changed, it is preferable to change the polarization axis direction of the polarizing plate, the slow axis direction of the λ / 4 plate, and the slow axis direction of the λ / 2 plate by the same angle in the same direction.

[0148] (Modification 1 of the second embodiment) In the second embodiment, the first electrode 121, which is a lower layer electrode, is the common electrode CE, and the second electrode 122, which is an upper layer electrode, is the pixel electrode PE. However, the second electrode 122 may be the common electrode CE, and the first electrode 121 may be the pixel electrode PE. In this example, the second electrode 122 (upper layer electrode) is the common electrode CE, and the first electrode 121 (lower layer electrode) is the pixel electrode PE (see FIG. 16).

[0149] FIG. 16 is a schematic cross-sectional view of a liquid crystal display device 1 of this example. In this example as well, from the viewpoint of easily generating a transverse electric field, it is preferable that at least the upper layer electrode (common electrode CE in this example) is a slit electrode. The lower layer electrode (pixel electrode PE in this example) may be a planar electrode, i.e., a so-called solid electrode, or may be a slit electrode. As described above, the liquid crystal display device 1 of this modified example is particularly suitable as a relatively high-definition liquid crystal display device, i.e., a liquid crystal display device in which the area of ​​the pixel P is relatively small.

[0150] (Embodiment 3) In this embodiment, the features unique to this embodiment will be mainly described, and the description of the contents overlapping with the above-mentioned embodiments 1 and 2 will be omitted. In the embodiment 2, the description was given with particular attention to the liquid crystal display device 1 in which only the second retardation layer 42 includes one positive C plate, but in this embodiment, the description will be given with particular attention to the liquid crystal display device 1 in which the first retardation layer 41 includes two positive C plates and the second retardation layer 42 includes one positive C plate (i.e., the liquid crystal display device 1 that satisfies the above (ii)). The liquid crystal display device 1 of this embodiment is substantially the same as the liquid crystal display device 1 of embodiment 2, except that the first retardation layer 41 includes two positive C plates.

[0151] 17 is a schematic cross-sectional view of a liquid crystal display device 1 according to an example of the present embodiment. As shown in FIG. 17, the liquid crystal display device 1 includes, in order from the rear surface side to the observation surface side, a first polarizing plate 51, a first retardation layer 41, a first substrate 10, a liquid crystal layer 20, a second substrate 30, a second retardation layer 42, and a second polarizing plate 52. The first retardation layer 41 includes a first positive C plate 43 and a second positive C plate 45 in addition to a λ / 4 plate 411 and a λ / 2 plate 412. The second retardation layer 42 includes a first positive C plate 44 in addition to a λ / 4 plate 421 and a λ / 2 plate 422.

[0152] From the viewpoint of improving the viewing angle characteristics and contrast, it is preferable that the first positive C plates 43 and 44 are located between the λ / 4 plate and the λ / 2 plate as described above, and it is preferable that the second positive C plate 45 is located between the λ / 2 plate and the polarizing plate. In this embodiment, it is preferable that the first retardation layer 41 includes, in order from the back side, the second positive C plate 45, the λ / 2 plate 412, the first positive C plate 43, and the λ / 4 plate 411, and it is preferable that the second retardation layer 42 includes, in order from the back side, the λ / 4 plate 421, the first positive C plate 44, and the λ / 2 plate 422 (see FIG. 17).

[0153] The second positive C plate 45 may be the same as the first positive C plates 43, 44 (having the same physical properties and thickness, etc.) or different from them, so long as it is a retardation plate that satisfies "nz>nx≈ny". However, from the viewpoint of further exerting the viewing angle improving effect, the thickness direction retardation Rth (absolute value) of the second positive C plate 45 is preferably 50 to 130 nm. The above Rth is more preferably 70 to 120 nm, and further preferably 80 to 115 nm.

[0154] The thickness of the second positive C plate 45 is preferably, for example, 0.1 to 100 μm. Within this range, the mechanical strength and display uniformity are superior. The thickness is more preferably 0.1 to 80 μm, and even more preferably 0.1 to 50 μm. When the positive C plate 45 has a laminated structure, it is preferable to set the total thickness of the whole to be within the above range, and the thicknesses of the respective retardation films may be the same or different.

[0155] (Modification 1 of the third embodiment) In the third embodiment, a configuration has been described in which the first electrode 121, which is a lower layer electrode, is a common electrode CE, and the second electrode 122, which is an upper layer electrode, is a pixel electrode PE. However, the configuration may be reversed, in which the second electrode 122 is a common electrode CE, and the first electrode 121 is a pixel electrode PE.

[0156] (Embodiment 4) In this embodiment, features unique to this embodiment will be mainly described, and descriptions of contents overlapping with the above-mentioned embodiment 1 will be omitted. The liquid crystal display device of this embodiment is mainly different from the liquid crystal display device of embodiment 1 in that a light source is provided on the observation surface side of the liquid crystal layer 20.

[0157] FIG. 18 is a schematic cross-sectional view of a liquid crystal display device 1 according to an example of the present embodiment. The liquid crystal display device 1 according to the present embodiment further includes a light source 62 (also referred to as a front light) on the observation side of the liquid crystal layer 20. More preferably, as shown in FIG. 18, the liquid crystal display device 1 includes, in order from the back side to the observation side, a first polarizing plate 51, a first retardation layer 41, a first substrate 10, a liquid crystal layer 20, a second substrate 30, a second retardation layer 42, and a second polarizing plate 52. It is preferable that the first retardation layer 41 includes a first λ / 2 plate 412 and a first λ / 4 plate 411, and the second retardation layer 42 includes a first λ / 2 plate 422 and a first λ / 4 plate 421. It is preferable that at least one of the first retardation layer 41 and the second retardation layer further includes a positive C plate 44. FIG. 18 shows an example of this embodiment in which the second retardation layer further includes a positive C plate 44.

[0158] The light source 62 (front light) is not particularly limited as long as it can emit light. The light source 62 preferably includes a light source such as a light emitting diode (LED) and a light guide plate. By further including the light source 62, the reflective liquid crystal display device 1 can perform bright reflective display even in an environment where sufficient ambient light cannot be obtained.

[0159] Although the embodiments of the present invention have been described above, the individual matters described above can all be applied to the present invention as a whole.

[0160] The present invention will be described in more detail below with reference to examples, but the present invention is not limited to these examples. In the following, absorption type polarizers are used as the polarizers 51 and 52. The applied voltage for white display is 5 V, and the applied voltage for black display is 0 V (i.e., no voltage is applied).

[0161] (Test Example 1) Assuming a reflective liquid crystal display device 1 using a positive type liquid crystal material, the change in reflective mode efficiency depending on the slit angle was evaluated and analyzed by a 3D optical simulation. The simulation software used was "Shintech LCD Master3D" manufactured by Shintech Co., Ltd.

[0162] In this test example, a liquid crystal display device 1 was assumed to have a configuration in which, on the rear side of a reflective liquid crystal panel 1X using a positive liquid crystal material, a λ / 4 plate 411, a λ / 2 plate 412, and a polarizing plate 51 are provided in that order from the liquid crystal panel 1X side, and on the observation side of the liquid crystal panel 1X, a λ / 4 plate 421, a λ / 2 plate 422, and a polarizing plate 52 are provided in that order from the liquid crystal panel 1X side. The twist angle θ1 was set to 83°, and the retardation dΔn of the liquid crystal layer 20 was set to 245 nm. The λ / 4 plates 411 and 421 were uniaxial retardation plates with a retardation Re of 140 nm, and the λ / 2 plates 412 and 422 were uniaxial retardation plates with a retardation Re of 270 nm, and the wavelength dispersion of these retardation plates was set to be flat.

[0163] The liquid crystal panel 1X has a pixel electrode PE and a common electrode CE arranged on the TFT substrate (first substrate) 10 side for applying a voltage to the liquid crystal layer 20, and the common electrode CE, which is an upper layer electrode (second electrode 122), is a slit electrode having a plurality of strip portions SP and a slit Sl located between two adjacent strip portions (see Figs. 20 and 21). The strip portions SP are linearly shaped and extend substantially parallel to each other in the same direction, and do not include any bent portions. The slit angles of the strip portions SP are set to -10°, -7°, -4°, -2°, 0°, +2°, +4°, +7°, +10°, +12°, +14°, and +16°, respectively. For reference, Fig. 21 shows an example in which the slit angle is 0°. The pixel electrode PE, which is a lower layer electrode (first electrode 121), is a solid electrode. In addition, a liquid crystal layer with a monodomain structure (a liquid crystal layer that provides a normally black display) was assumed.

[0164] The ratio of the width L of one strip portion SP to the width S of one slit Sl (i.e., the L / S condition) is L / S (μm) = 2.2 / 4.1 in test example 1-1, L / S (μm) = 1.6 / 3.0 in test example 1-2, and L / S (μm) = 3.0 / 5.0 in test example 1-3.

[0165] Fig. 20 is a schematic cross-sectional view of a liquid crystal panel 1X assumed in this example. In Fig. 20, the film thickness of some layers is written in parentheses after the reference symbol representing the layer. Fig. 21 is a schematic diagram conceptually showing the electrode structure of the pixel electrode PE and the common electrode CE when the slit angle is 0°. In Fig. 21, the orientation of the liquid crystal molecules 21A on the TFT substrate 10 side when no voltage is applied (i.e., the initial orientation) is shown by the orientation of the positive type liquid crystal molecules 21A(p).

[0166] In the actual simulation, in order to simplify the condition setting, instead of changing the slit angle, the pretwist angle of the liquid crystal molecules 21 and the axial angle of the optical film were changed. However, the twist angle θ1 was fixed at 83°. Specifically, the pretwist angle of the liquid crystal molecules 21 and the axial angle of each optical film were rotated by the same angle as the slit angle, with the axial setting of the optical film as the reference. The optical film means the polarizing plates 51, 52 and the retardation layers 41, 42 (λ / 4 plate and λ / 2 plate in this example). The pretwist angle of the liquid crystal molecules 21 is the initial orientation angle of the liquid crystal molecules 21A on the TFT substrate (first substrate) 10 side with respect to the reference. The reference (0°) here is the 12 o'clock direction when the liquid crystal panel is viewed in plan from the observation surface side.

[0167] The voltage was set to 5 V or 6 V. The average reflective mode efficiency or average transmissive mode efficiency of the luminance distribution was calculated for each slit angle. The results are shown in Figures 22 to 24. The reflective mode efficiency and transmissive mode efficiency were calculated by the following formulas. Reflection mode efficiency (%) = (Luminance with front polarizer) / (Luminance without front polarizer) x 100 Transmissive mode efficiency (%) = (Luminance with front polarizer) / (Luminance without front polarizer) x 100 The front polarizing plate refers to the polarizing plate located on the observation surface side of the liquid crystal panel 1X (that is, the second polarizing plate 52).

[0168] 22 to 24 are graphs showing the results of Test Example 1. Specifically, FIG. 22 is a graph showing the reflective mode efficiency when a voltage of 5 V was applied to the liquid crystal display device of Test Example 1-3. 23 is a graph showing the reflective mode efficiency when a voltage is applied to each of the liquid crystal display devices of Test Examples 1-1, 1-2, and 1-3. Among these, the upper graph (5 V column) is a graph when a voltage of 5 V is applied, and the lower graph (6 V column) is a graph when a voltage of 6 V is applied. 24 is a graph showing the transmissive mode efficiency when a voltage is applied to each of the liquid crystal display devices of Test Examples 1-1, 1-2, and 1-3. Among these, the upper graph (5 V column) is a graph when a voltage of 5 V is applied, and the lower graph (6 V column) is a graph when a voltage of 6 V is applied.

[0169] 22, it is clear that the reflection mode efficiency tends to decrease as the absolute value of the slit angle increases beyond 2°. Note that, as will be described later, if the slit angle is less than 0°, there is a concern that alignment may be disturbed.

[0170] Incidentally, when a VA (Vertical Alignment) type test cell was used, the reflective mode efficiency was 37.2% (when a voltage of 5V was applied), and the transmissive mode efficiency was 15.8%. Considering the efficiency of each mode of this VA type test cell, it was found from Figures 23 and 24 that the pitch of the slit electrodes is particularly preferably 6.3 (μm) or less, and that the L / S condition is particularly preferably 2.2 / 4.1 (i.e., 0.54 / 1) or less. Similarly, considering the efficiency of each mode of the VA type test cell, it was found from the lower graph (6V column) of Figure 24 that the slit angle is particularly preferably 0° or more and 4° or less. The pitch of the slit electrodes is the sum of the width of one strip portion SP and the width of one slit Sl, and is calculated by "L+S".

[0171] (Prototype 1) A test cell 1000 was fabricated as follows. First, as shown in Fig. 25B, the liquid crystal cell 1100 for obtaining the test cell 1000 includes a first substrate 10, a second substrate 30, and a liquid crystal layer 20 provided between these substrates. Fig. 25A is a plan view showing the structure of the liquid crystal cell 1100 as viewed from the front. Fig. 25B is a cross-sectional view taken along line AA in Fig. 25A (cross-sectional view taken along line AA).

[0172] As shown in FIG. 25B, the first substrate 10 includes a glass substrate 100, and includes a common electrode CE as the first electrode 121, a dielectric layer 153, a pixel electrode PE as the second electrode 122, and a first horizontal alignment film 140 on the glass substrate in this order. The common electrode CE is made of ITO, and has a thickness of 100 nm. The dielectric layer 153 is made of silicon nitride (SiNx), and has a thickness of 300 nm. The pixel electrode PE is made of ITO, and has a thickness of 100 nm. The pixel electrode PE has a plurality of strip portions SP and a plurality of slits Sl. The width L of each strip portion SP is 3 μm, and the width S of each slit Sl (the distance between two adjacent strip portions SP) is 5 μm. Therefore, the L / S condition is 3 / 5. Each strip portion SP is bent in a dogleg shape. That is, each strip portion SP includes a first portion SPa extending in a certain direction (first direction) and a second portion SPb extending in a direction (second direction) different from the first direction.

[0173] The second substrate 30 has a glass substrate 300 and a second horizontal alignment film 340 provided on the glass substrate 300, as shown in FIG. 25B.

[0174] The thickness (cell gap) of the liquid crystal layer 20 is determined by plastic beads (not shown).

[0175] The alignment treatment for the first horizontal alignment film 140 and the second horizontal alignment film 340 was carried out by a photo-alignment treatment or a rubbing treatment.

[0176] When photo-alignment treatment was performed, a photodecomposition type photo-alignment film material was used. The photo-alignment film material was applied by spin coating, and the thickness of the alignment film was 1000 Å (i.e., 100 nm). The non-polarized UV light emitted from the UV lamp unit was converted to polarized UV light by a wire grid polarizer, and the alignment film was irradiated with the polarized UV light to perform the photo-alignment treatment. The extinction ratio of the wire grid polarizer was 100:1. The wavelength of UV light effective for photo-alignment was 220 to 260 nm, and the irradiation energy was 300 mJ / cm. 2The alignment direction of the liquid crystal molecules is a direction substantially perpendicular to the transmission axis direction of the polarized UV light (particularly preferably at 90°).

[0177] When rubbing treatment is used, a horizontal alignment film is formed and then rubbed with a rubbing roller (e.g., a roller wrapped with cloth) to perform the alignment treatment. This results in a uniaxial alignment direction of the liquid crystal molecules. As an alignment film material suitable for operating the liquid crystal molecules with a transverse electric field, a polyimide-based material is suitable. In addition, a material that does not generate a pretilt due to the rubbing treatment is suitable, and such materials are commercially available. The liquid crystal molecules are aligned approximately parallel to the rubbing direction.

[0178] For the liquid crystal cell 1100 having the above structure, first, the retardation of the liquid crystal layer 20 was measured using a polarimeter ("AxoScan" manufactured by Axometrics Co., Ltd.) Next, the cell thickness was measured using a cell gap inspection device ("RetsQC" manufactured by Otsuka Electronics Co., Ltd.).

[0179] 26A, a λ / 4 plate 421, a positive C plate 44, a λ / 2 plate 422, and a polarizing plate 52 were attached in this order to the second substrate 30 side of the liquid crystal cell 1100 (adhesive layer is not shown). Thereafter, for reflection observation, a drop of matching oil mo was dropped on a reflector 130 having a concave-convex surface structure (MRS) to reduce loss due to interface reflection, and the liquid crystal cell 1100 was placed on the reflector 130 with the first substrate 10 side facing down for verification (this corresponds to the test cell 1000 for reflection observation. See FIG. 26A). For transmission observation, a λ / 4 plate 411, a λ / 2 plate 412, and a polarizing plate 51 were attached in this order to the first substrate 10 side of the liquid crystal cell 1100 for verification (this corresponds to the test cell 1000 for transmission observation. See FIG. 26B).

[0180] Fig. 26A is a schematic cross-sectional view of the test cell 1000 during reflection observation, and Fig. 26B is a schematic cross-sectional view of the test cell 1000 during transmission observation. Note that Nitto Denko Corporation's "NPF-CRT1794KDUHC3" was used as the polarizing plates 51 and 52, Nitto Denko Corporation's "NZF-UF01A" (retardation: 140 nm) was used as the λ / 4 plates 411 and 421, and Nitto Denko Corporation's "NZF-UF01A" (retardation: 270 nm) was used as the λ / 2 plates 412 and 422. The axial conditions of each optical film were as shown in Table 1.

[0181] Voltage application to the pixel electrode PE and the common electrode CE was performed using a function generator (TEKTRONIX "AFG1022") capable of applying a voltage of 0 V to 10 V with a square wave of 30 Hz. Unless otherwise specified, the reflectance was measured using a spectrophotometer (MINOLTA "CM-2600d"), and the transmittance was measured using a spectrophotometer (TOPCON "SR-UL2").

[0182] [Table 1]

[0183] In Table 1, the front optical film means the optical film located on the observation surface side of the liquid crystal panel 1X, and the rear optical film means the optical film located on the back side of the liquid crystal panel 1X. The axial angle of each optical film is the angle when observed in a planar view from the observation surface side, and when each optical film is likened to a clock face, the 3 o'clock direction is set to 0° and the counterclockwise direction is set to positive.

[0184] (Test Example 2) The slit angle of the first portion SPa and the slit angle of the second portion SPb in the test cell 1000 obtained in prototype example 1 were set to the angles shown in Fig. 27 (Test Examples 2-1 to 2-6). For each test cell, the relationship between the alignment of the liquid crystal molecules and the polarization direction was examined. In this example, the twist angle was fixed at +83°.

[0185] FIG. 27 is a diagram showing the results of Test Example 2. In FIG. 27, the slit angle of the first portion SPa is shown in the slit angle SPa column, and the slit angle of the second portion SPb is shown in the slit angle SPb column. The "liquid crystal orientation diagram" is an image diagram showing the relationship between the slit angle and the orientation direction of liquid crystal molecules. In the "polarization direction" diagram, the angle attached to the dotted arrow is the polarization direction of polarized UV light that has been subjected to a photo-alignment treatment on the second substrate 30, and the angle attached to the solid arrow is the polarization direction of polarized UV light that has been subjected to a photo-alignment treatment on the first substrate 10 (i.e., the TFT substrate including the slit electrode). Note that the orientation direction of the liquid crystal molecules and the polarization direction are mutually perpendicular.

[0186] In this example, an electrode in which a plurality of strip-shaped portions have bent portions was used as a slit electrode (in this example, a pixel electrode), and the first portion SPa and the second portion SPb of the slit electrode were each considered.

[0187] (Test Example 3) In this example, the mechanism by which flow alignment disturbance occurs was investigated. In Test Example 3-1, the alignment defect was examined using the test cell obtained in Test Example 2-2 as the test cell. In Test Example 3-2, the alignment defect was examined using only the portion of the test cell obtained in Test Example 2-5 where the first portion SPa (slit angle is 0°) was located as the test cell.

[0188] 28A, 28B, 28C, and 29C are conceptual diagrams showing the results of the study of Test Example 3-1. Of these, FIG. 28A is a diagram showing the alignment of liquid crystal molecules in a test cell when no voltage is applied. FIG. 28B is a diagram showing the alignment of liquid crystal molecules when a voltage of 5 V is applied to the test cell. FIG. 28C is a cross-sectional view of a portion of the test cell shown in FIG. 28B where the first portion SPa is located. FIG. 29C is a cross-sectional view of a portion of the test cell shown in FIG. 28B where the second portion SPb is located.

[0189] As shown in FIG. 28B and FIG. 28C, when a voltage of 5V is applied to the test cell, in the portion where the first portion SPa is located, the rotation direction of the liquid crystal molecules 21A on the first substrate 10 side and the rotation direction of the liquid crystal molecules 21B on the second substrate 30 side are opposite to each other, so that a linear alignment defect De occurs at the boundary portion of the liquid crystal domain where the rotation directions are different. In FIG. 28C, c(30) indicates the rotation direction of the liquid crystal molecules 21B on the second substrate 30 side. c(10) indicates the rotation direction of the liquid crystal molecules 21A on the first substrate 10 side. The liquid crystal molecules 21C' and 21C are liquid crystal molecules located approximately in the vicinity of the middle between the first substrate 10 and the second substrate 30. As shown in FIG. 28B, a portion where the rotation directions of the liquid crystal molecules do not match occurs in the liquid crystal layer 20 (for example, near X), and an alignment defect (discontinuous point) occurs near this X (see symbol De). For example, an alignment defect may occur immediately after applying a white voltage of 5V (for example, 0.5 seconds after applying the white voltage). When the location where an alignment defect occurs is observed with a crossed Nicol polarizing transmission microscope (Olympus Corporation, "BX51"), the alignment defect is visible as a dark line (for example, see the area surrounded by the dashed line in Figure 30). The alignment defect is a transient defect, and is considered to stabilize about 1 second after the alignment defect occurs.

[0190] On the other hand, as shown in Figures 28B and 29C, in the area where the second portion SPb is located, the rotation direction of the liquid crystal molecules 21A on the first substrate 10 side and the rotation direction of the liquid crystal molecules 21B on the second substrate 30 side are the same, so no alignment defects occur.

[0191] 29A, 29B, and 29C are conceptual diagrams showing the results of the study of Test Example 3-2. Of these, Fig. 29A is a diagram showing the alignment of liquid crystal molecules in a test cell when no voltage is applied. Fig. 29B is a diagram showing the alignment of liquid crystal molecules when a voltage of 5 V is applied to the test cell. Fig. 29C is also a cross-sectional view of the test cell shown in Fig. 29B.

[0192] As shown in Figures 29B and 29C, in the test cell used in test example 3-2, the rotation direction of the liquid crystal molecules 21A on the first substrate 10 side is the same as the rotation direction of the liquid crystal molecules 21B on the second substrate 30 side, so no alignment defects occur.

[0193] (Test Example 4) Using the test cells obtained in Test Examples 2-1 to 2-6, the change in the alignment of liquid crystal molecules when a voltage of 5 V was applied from a no voltage applied state was observed. A crossed Nicol polarizing transmission microscope (Olympus Corporation, "BX51") was used for the observation. Fig. 31 shows an image of the state when a voltage was applied in this example. Fig. 31 shows an image of the state when a voltage was applied in this example.

[0194] In this example, an electrode in which a plurality of strip-shaped portions have bent portions was used as a slit electrode (a pixel electrode in this example), and the first portion SPa and the second portion SPb of the slit electrode were each examined. Test Examples 4-1 to 4-6 are examples in which the alignment of liquid crystal molecules was observed by focusing only on the portion where the first portion SPa was located in the test cells used in Test Examples 2-1 to 2-6, respectively. Test Examples 4-7 to 4-12 are examples in which the alignment of liquid crystal molecules was observed by focusing only on the portion where the second portion SPb was located in the test cells used in Test Examples 2-1 to 2-6, respectively. The results are shown in FIG.

[0195] Fig. 30 is a diagram showing the results of Test Example 4 (see Test Examples 4-1 to 4-12). In Fig. 30, "x" means that an alignment defect (also referred to as flow alignment disturbance) was visually observed, and "o" means that an alignment defect was not visually observed.

[0196] As shown in Fig. 30, in Test Examples 4-1 and 4-2, alignment disturbance occurred in the entire bright pixel with a relatively high light transmittance. In Test Examples 4-3 and 4-4, alignment disturbance occurred in the bright pixel with a relatively high light transmittance (see the area surrounded by the dashed line in Fig. 30). In contrast, alignment disturbance was not observed in Test Examples 4-5 to 4-12. Therefore, it was found that the occurrence of alignment defects was sufficiently suppressed by setting the slit angle to be between 0° and 16°.

[0197] (Test Example 5) The reflective mode efficiency and the transmissive mode efficiency were evaluated when the voltage was increased stepwise from a no-voltage applied state for the test cell obtained in Test Example 2-5. The voltage was set in 0.5 V increments from 0 V to 10 V. The results are shown in Figs. 32A and 32B. Figs. 32A and 32B are graphs showing the results of this example. Figs. 32A and 32B also show data when a VA-type test cell was used. Fig. 33 shows an image of the case where a voltage was applied in this example. Fig. 33 is an image of the case where a voltage was applied in this example.

[0198] (Test Example 6) The reflective mode efficiency and the transmissive mode efficiency were evaluated when the voltage was increased stepwise from a no-voltage applied state to the test cell obtained in Test Example 2-2. The voltage was set in 0.5 V increments from 0 V to 10 V. The results are shown in Figures 34A and 34B. Figures 34A and 34B are graphs showing the results of this example. Figures 34A and 34B also show data when a VA type test cell was used. Figure 33 is also an image diagram when a voltage was applied in this example.

[0199] (Test Example 7) The reflective mode efficiency was evaluated when the voltage was increased stepwise from a no voltage applied state and when the voltage was decreased stepwise from a voltage applied state of 10 V to the test cell obtained in Test Example 2-2. The results are shown in FIG. 35. FIG. 35 is a graph showing the results of this example. FIG. 35 also shows data when a VA type test cell was used. FIG. 36 is an image diagram of the application of voltage in this example.

[0200] From Figure 35, it was found that when the voltage was decreasing, below 5.5 V, the reflectance was lower than when the voltage was increasing. Therefore, it is considered that the alignment defect occurred near 5.5 V when the voltage was decreasing. Note that in Figure 35, (a) indicates the voltage increase, and (b) indicates the voltage decrease.

[0201] (Prototype 2) A test cell 1000' for transmission observation was prepared in the same manner as in Prototype Example 1, except that the positive C-plate 44 was not used.

[0202] (Test Example 8) The slit angle of the first portion SPa and the slit angle of the second portion SPb in the test cell 1000' obtained in prototype example 2 were set to the angles shown in FIG. 27 (see test example 2). The twist angle was fixed at +83°. Using each test cell thus obtained, the relationship between the slit angle and the response time was evaluated. The results are shown in FIG. 37 and FIG. 38.

[0203] 37 and 38 are graphs showing the results of Test Example 8. Of these, FIG. 37 is a graph evaluating the rising response time when a voltage of 5V is applied from a no-voltage applied state (0V→5V), and FIG. 38 is a graph evaluating the rising response time when a voltage of 5V is applied to a no-voltage applied state (5V→0V). Data when a VA type test cell is used is also shown in FIG. 37 and FIG. 38. When a VA type test cell is used, the rising response time is 15.3 milliseconds (ms) and the falling response time is 6.3 milliseconds (ms).

[0204] In this example, for convenience of the experiment, an electrode with multiple strips having bent portions was used as the slit electrode (pixel electrode in this example), and therefore each test cell has a first portion SPa and a second portion SPb with different slit angles. Therefore, the response times plotted in Figures 36 and 37 are the average values ​​of the response times of the liquid crystal in the first portion SPa and the second portion SPb.

[0205] In this example, the response time when the normalized luminance ratio in the response waveform changed from 0.1 to 0.9 was corrected with the reference liquid crystal retardation dΔn (245 nm) to obtain the response time (milliseconds).

[0206] From Fig. 37, it was found that the rise response time was approximately 15 milliseconds (ms) or less when the slit angle was -2° or more, that is, the response time tended to saturate at -2° or more. In addition, in Fig. 37, alignment disturbance occurred in the ranges (a) and (b), but no alignment disturbance occurred in the range (c).

[0207] From FIG. 38, it is found that the fall response time is approximately 20 milliseconds (ms) or less when the slit angle is −4° or more, that is, it tends to become saturated at −4° or more.

[0208] (Test Example 9) The VA type test cell used in Test Examples 5 to 8 was Test Cell 2000 fabricated as follows. As shown in Fig. 39B, the liquid crystal cell 2100 for obtaining the test cell 2000 includes a first substrate 10, a second substrate 30, and a liquid crystal layer 20 provided between these substrates. Fig. 39A is a plan view showing the structure of the test cell 2000 (and the liquid crystal cell 2100) as viewed from the front. Fig. 39B is a cross-sectional view taken along line AA in Fig. 39A (cross-sectional view taken along line AA).

[0209] The first substrate 10 includes a glass substrate 100, on which a pixel electrode PE and a first vertical alignment film (not shown) are disposed in this order. The second substrate 30 includes a glass substrate 300, on which a common electrode CE and a second vertical alignment film (not shown) are disposed in this order. Of the vertical alignment films, only the second vertical alignment film disposed on the observation surface side is subjected to a photo-alignment treatment. The alignment direction of the liquid crystal molecules 21 determined by the first vertical alignment film is the 90° direction (the pretilt angle is 88.4°).

[0210] As shown in FIG. 40, the λ / 4 plate 41, the first λ / 2 plate 42a, the second λ / 2 plate 42b, and the polarizing plate 50 were attached in this order to the second substrate 30 side of the liquid crystal cell 2100 (adhesive layer is not shown). The polarizing plate 50 was made of "NPF-CRT1794KDUHC3" manufactured by Nitto Denko Corporation, the λ / 4 plate 41 was made of "NZF-UF01A" (retardation: 110 nm) manufactured by Nitto Denko Corporation, and the λ / 2 plates 42a and 42b were made of "NZF-UF01A" (retardation: 260 nm) manufactured by Nitto Denko Corporation. Then, a drop of matching oil mo was dropped on the reflecting plate 130 having the MRS, and the liquid crystal cell 2100 was placed on the reflecting plate 130 with the first substrate 10 side facing down. In this manner, the test cell 2000 was produced. FIG. 40 is a schematic cross-sectional view of the test cell 2000.

[0211] Test cell 2000 uses a liquid crystal material with negative dielectric anisotropy, and the display mode is VA mode. The optical axis setting (initial setting) and specifications are shown in Table 2 and FIG. 41. FIG. 41 is a conceptual diagram showing the optical axis setting of test example 9. In Table 2, CH (Chirality) is the twist angle of liquid crystal molecules 21 between the upper and lower substrates (i.e., between the first substrate 10 and the second substrate 30).

[0212] [Table 2]

[0213] The reflective mode efficiency was evaluated when the voltage was increased stepwise from a no voltage applied state to the test cell 2000. The voltage was set in 0.5 V increments from 0 V to 10 V. The results are shown in Figure 42. Figure 42 is a graph showing the results of this example.

[0214] 42, the reflective mode efficiency when no voltage was applied was 0.8%, the reflective mode efficiency when a voltage (5 V) was applied was 37.2%, and the contrast (5 V / 0 V), calculated as the ratio of these, was 48. Since VA mode liquid crystal display devices use a vertical electric field, it is difficult to make them into in-cell type touch panels.

[0215] The above-described aspects of the present invention may be combined as appropriate without departing from the gist of the present invention. [Explanation of symbols]

[0216] 1:LCD display device 1X: LCD panel 10, 30: PCB 20: Liquid crystal layer 21, 21A, 21B, 21C, 21C': Liquid crystal molecules 40: Retardation layer 41:λ / 4 plate 42, 42a, 42b: λ / 2 plate 41SA, 42SA: In-plane slow axis 50, 51, 52: Polarizing plate 50AA: Polarization axis 61, 62: Light source 100, 300: Support substrate 121, 122: Electrode 130: Reflective layer 140, 340: Horizontal alignment film 150G: Gate insulating film 151, 152: Interlayer insulating layer 153: Dielectric layer 160: Contact electrode 310: Color filter layer BP: Backplane circuit CE: Common electrode PE: Pixel electrode CH1, CH2: Contact hole De: Orientation defect DR:Display area FR: Hidden area GL: Gate wiring SL: Source wiring p: protruding part P: Pixel Rf:Reflection area Tr:Transmission area Sl: Slit SP: Belt SPa: 1st part SPb: 2nd part TC: Touch wiring contact part TD: Touch drive unit TL, TL1, TL2: Touch wiring TX: Touch sensor electrode

Claims

1. A first substrate; a second substrate facing the first substrate; a liquid crystal layer provided between the first substrate and the second substrate; A liquid crystal display device having a plurality of pixels, the first substrate has a reflective layer that reflects light, a first electrode and a second electrode that can generate a transverse electric field in the liquid crystal layer, and a first horizontal alignment film that is in contact with the liquid crystal layer; At least one of the first electrode and the second electrode has a plurality of strip portions and a slit located between two adjacent strip portions of the plurality of strip portions, In each pixel, the plurality of strip-shaped portions are linearly shaped and extend substantially parallel to one another in the same direction, and do not include any bent portions; the second substrate has a second horizontal alignment film in contact with the liquid crystal layer, the liquid crystal layer contains liquid crystal molecules having a positive dielectric anisotropy and having a twisted orientation when no voltage is applied; The alignment direction of the liquid crystal molecules on the first substrate side when no voltage is applied is 0° or more and 16° or less, when the direction in which the plurality of strip-shaped portions extend is taken as 0° as a reference. A liquid crystal display device comprising:

2. The plurality of band-shaped portions do not include a notch portion.

2. The liquid crystal display device according to claim 1 .

3. The extending direction of the plurality of strip-shaped portions is the same at least in adjacent pixels or in the display region.

2. The liquid crystal display device according to claim 1 .

4. a first polarizing plate, a first retardation layer, the first substrate, the liquid crystal layer, the second substrate, a second retardation layer, and a second polarizing plate, in this order from a rear surface side; the first retardation layer includes a first λ / 2 plate and a first λ / 4 plate, the second retardation layer includes a second λ / 2 plate and a second λ / 4 plate, At least one of the first retardation layer and the second retardation layer further includes a positive C plate.

2. The liquid crystal display device according to claim 1 .

5. the second retardation layer includes one positive C plate, The first retardation layer does not include a positive C plate or includes two positive C plates.

5. The liquid crystal display device according to claim 4.

6. the first λ / 2 plate and the first λ / 4 plate are located in this order from the rear side, the second λ / 2 plate and the second λ / 4 plate are located in this order from an observation surface side, The in-plane retardation Re of the first λ / 2 plate and the in-plane retardation Re of the second λ / 2 plate are substantially the same, The in-plane retardation Re of the first λ / 4 plate and the in-plane retardation Re of the second λ / 4 plate are substantially the same.

6. The liquid crystal display device according to claim 4, wherein the first and second electrodes are arranged in a first direction.

7. The positive C plate is located between the first λ / 2 plate and the first λ / 4 plate and / or between the second λ / 2 plate and the second λ / 4 plate.

6. The liquid crystal display device according to claim 4, wherein the first and second electrodes are arranged in a first direction.

8. The twist angle of the liquid crystal layer when no voltage is applied is 58.3° or more and 89.9° or less.

2. The liquid crystal display device according to claim 1 .

9. The plurality of band-shaped portions have a ratio L / S of a width L per band-shaped portion in a plan view to a width S per slit in a plan view of 0.4 to 0.7 / 1.

2. The liquid crystal display device according to claim 1 .

10. Single domain orientation 2. The liquid crystal display device according to claim 1 .

11. Display in normally black mode 2. The liquid crystal display device according to claim 1 .

12. One of the first electrode and the second electrode is a pixel electrode provided in each of the plurality of pixels, and the other is a common electrode including a plurality of segments each capable of functioning as a touch sensor electrode; The first substrate has a plurality of touch wirings each connected to a corresponding one of the touch sensor electrodes.

2. The liquid crystal display device according to claim 1 .

13. Further, a light source is provided.

2. The liquid crystal display device according to claim 1 .

14. Each pixel has a reflective area that reflects light by the reflective layer to perform display, and a transmissive area that transmits light to perform display.

14. The liquid crystal display device according to claim 1, 2, 3, 4, 5, 8, 9, 10, 11, 12 or 13.

Citation Information

Patent Citations

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