Multi-phase inverter

Abstract

To provide a multi-phase inverter.SOLUTION: According to an embodiment, a circuit includes: a battery monitoring circuit configured to monitor a positive supply voltage and a negative supply voltage with respect to a neutral node; an inverter configured to provide a plurality of modulated phase voltages representing a reference voltage vector; and a space vector modulator configured to generate modulated drive signals for the inverter based on the reference voltage vector, where duty cycles of the modulated drive signals depend on the monitored positive supply voltage and the monitored negative supply voltage.SELECTED DRAWING: None

Description

[Technical field]

[0001] The present disclosure relates to the field of electronic circuits, and more particularly to multi-phase inverters. [Background technology]

[0002] Polyphase inverters are commonly used to drive synchronous or asynchronous motors. Such motors are also called inverter-fed synchronous / asynchronous motors. Brushless DC motors (which are actually synchronous motors whose excitation field is generated by permanent magnets) can also be driven using inverters. Polyphase inverters often have three phases, but can also have two, four or more phases.

[0003] One common type of inverter is the so-called Active Neutral Point Clamped (ANPC) inverter. ANPC inverters are multilevel inverters that can generate modulated phase voltages that can assume three or more different voltage levels. For example, in a three-level inverter, each phase voltage can assume either the voltage level of the positive supply voltage, 0 (the voltage level of the neutral point) or the voltage level of the negative supply voltage. In the case of a battery-fed inverter, the neutral point is usually divided by the battery voltage U (often called the DC bus voltage) using a capacitive voltage divider. DC is generated / defined by dividing U into equal voltages. In this way, a symmetrical bipolar power supply is provided, with the positive supply voltage being U DC / 2, the neutral voltage is 0 volts by definition, and the negative supply voltage is -U DC / 2.

[0004] In some applications, two batteries (or battery modules) are connected in series and the common circuit node to which the batteries are connected is used as the neutral point. In such a situation, the bipolar power supply can become asymmetric if the two batteries have different states of charge (SoC). At the same time, the DC bus voltage U DC is the sum of the battery voltages of the two batteries.

[0005] Inverters are typically driven by several Pulse Width Modulation (PWM) signals that are used to activate (switch on) and deactivate (switch off) the inverter's transistors. Various suitable PWM schemes are thus known. However, in the case of an asymmetric power supply consisting of two batteries (or battery modules) connected at the neutral point, the known PWM switching schemes may result in the battery with the lower SoC being discharged more than the battery with the higher SoC, thus exacerbating the asymmetry of the bipolar power supply.

[0006] Furthermore, known algorithms used to generate PWM signals assume that the voltage supplies are symmetrical; operation with asymmetric supplies will introduce systematic errors. Summary of the Invention [Means for solving the problem]

[0007] Described herein is a circuit that, according to one embodiment, includes a battery monitoring circuit configured to monitor a positive power supply voltage and a negative power supply voltage relative to a neutral node, an inverter configured to provide a plurality of modulated phase voltages representing a reference voltage vector, and a space vector modulator configured to generate a modulated drive signal for the inverter based on the reference voltage vector, the drive signal having a duty cycle that is dependent on the monitored positive power supply voltage and the monitored negative power supply voltage.

[0008] Further, a corresponding method is described herein. According to one embodiment, the method includes monitoring positive and negative power supply voltages of an inverter relative to a neutral node, and generating, by a space vector modulator, a modulated drive signal for the inverter based on a reference voltage vector. The duty cycle of the modulated drive signal is controlled in response to the monitored positive power supply voltage and the monitored negative power supply voltage. The modulated drive signal is provided to the inverter, thus causing the inverter to provide a plurality of modulated phase voltages that represent the reference voltage vector.

[0009] Further described herein is a three-level inverter system. According to one embodiment, the system includes a first power supply and a second power supply connected to a neutral node and providing a positive and negative power supply voltage. The system further includes a battery monitoring circuit configured to monitor the positive and negative power supply voltages, and an inverter fed by the positive and negative power supply voltages. The space vector modulator is configured to generate a modulated drive signal for the inverter such that the positive and negative power supply voltages are rebalanced or remain substantially balanced.

[0010] The present invention can be better understood with reference to the following drawings and description. The components in the drawings are not necessarily to scale, emphasis instead being placed upon illustrating the principles of the invention. Moreover, in the drawings, like reference numbers indicate corresponding like parts. [Brief description of the drawings]

[0011] [Figure 1] FIG. 1 is a block diagram illustrating an example of a control loop for controlling a three-phase synchronous motor using space vector modulation. [Diagram 2] FIG. 1 is an example block diagram illustrating a PWM modulator and an ANPC inverter that may be used for space vector modulation. [Diagram 3] FIG. 1 illustrates an example of a three-level ANPC inverter having three phases. [Figure 4] In (a)-(d), a diagram is shown visualizing the four different switching states of each inverter phase. [Diagram 5] 1 is a table containing multiple sequences of inverter states that can be used to generate an arbitrary voltage vector. [Figure 6] FIG. 6 is a diagram visualizing the different voltage vectors (space vectors) that can be achieved by the inverter states listed in the table of FIG. 5 for a symmetrical power supply of an inverter. [Figure 7] FIG. 2 is a diagram visualizing a particular modulation sequence. [Figure 8] FIG. 8 visualizes the modulation sequence of FIG. 7 modified according to one embodiment. [Figure 9] FIG. 7 visualizes how the diagram of FIG. 6 is distorted for an inverter fed by an asymmetric power supply. [Figure 10] FIG. 7 illustrates a decomposition of the hexagons in the diagram of FIG. 6 to determine the times associated with the inverter states of the modulation sequence and the determined sequence. [Figure 11] FIG. 7 is another diagram showing a decomposition of the hexagon of the diagram of FIG. 6 to determine the times associated with the inverter states of the modulation sequence and the determined sequence. [Figure 12] FIG. 7 is another diagram showing a decomposition of the hexagon of the diagram of FIG. 6 to determine the times associated with the inverter states of the modulation sequence and the determined sequence. [Figure 13] FIG. 12 is a diagram visualizing the modulation sequence corresponding to the voltage vectors of FIG. 11 . DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Some embodiments of the present invention relate to a method of operating an inverter in a manner suitable for operation with an asymmetrical power supply.

[0013] FIG. 1 is a block diagram illustrating an example of a control loop for controlling a three-phase synchronous motor 100, which is used as an example of a load supplied with a multi-phase voltage. Before discussing examples of PWM modulators and ANPC inverters in more detail, an application example of space vector modulation will be described with reference to FIG. 1.

[0014] The motor 100 is driven using an inverter that is controlled using a space vector modulator. The functional block containing the modulator and the inverter is labeled 200 in Figure 1. In this example, the space vector modulator is a gyro with an amplitude V REF and angle θ (reference space vector V REF *The inverter receives a reference space vector that can be represented by the polar coordinates of U , V V , V W To control the angular velocity of the motor 100, the resulting three phase currents i U , i V , i W In some applications, the angular position θ of the rotor can be measured. S is measured, for example, using a rotary encoder.

[0015] In this example, the phase current i U , i V , i W The measurements of i are subjected to a coordinate transformation commonly referred to as Clarke-Park transformation (Clark transformation followed by Park transformation). The Clarke and Park transformations can be combined into one transformation step, and the corresponding functional block is labeled 220 in FIG. 1. The Clarke-Park transformation 220 transforms the quadrature current signals i d and i q The corresponding Cartesian coordinate system axes are often labeled d and q, and thus the Park transform is also known as the d / q transform. d and i q is provided to the controller 230, which in turn provides a corresponding setpoint V d、SET and V q、SET Receive.

[0016] The controller 230 receives the current signal i d , i q and the set value V d、SET , V q、SET Based on this, the output signal V d , V q The controller output signal V d and V q is subjected to the inverse Park transformation to obtain the corresponding voltage signal V α and V β(not shown in FIG. 1 ), where the subscripts α and β represent the axes of a Cartesian coordinate system in the rotating reference frame. REF * A voltage signal V α and V β is then calculated as the amplitude V REF and is converted to polar coordinates to obtain the angle θ. The function block containing the inverse Park transform and the coordinate conversion to polar coordinates is labeled with the numeral 210 in FIG. 1. In some implementations, the function blocks 210 and 220 convert the measured angular position of the rotor, θ S may be used as an input parameter.

[0017] 1 is generally known as vector control or field-oriented control (FOC), and will not be discussed in further detail herein. However, for the sake of further discussion, it will be understood that the function block 200, and in particular the inverter, is driven by a bipolar voltage supply, e.g., a positive supply voltage +U, relative to a reference voltage at a so-called neutral node n0 (neutral point), which may be defined, without loss of generality, as 0 volts. P and the negative power supply voltage -U N It is important that the bipolar voltage supply is provided by two batteries (or two battery modules containing multiple batteries) connected in series at the neutral node n. Because the states of charge (SoC) of the two batteries (labeled "Battery 1" and "Battery 2" in FIG. 1) are not necessarily identical, the bipolar voltage supply may be asymmetric with respect to the potential of the neutral node n0 (i.e., U P ≠U N (It is.)

[0018] 2 illustrates functional block 200 in more detail. Functional block 200 thus includes an inverter 202 and a space vector modulator 201, which typically uses a PWM switching scheme to control inverter operation. As shown in FIG. 2, inverter 202 receives a number of gate signals from space vector modulator 201 that are provided to control electrodes of transistors contained within inverter 202, and inverter 202 generates corresponding modulated phase voltages V for three-phase motor 100. U , V V , V W Note that in some applications, four or more phases may be used. As previously mentioned, the inverter 202 generates a bipolar power supply (voltage +U with respect to a neutral voltage, which may be defined as 0V). P and -U N ) and the power supply voltage +U P and -U N may be asymmetric about the neutral point due to different states of charge of the batteries. The parameter ρ may be used to quantify the degree of asymmetry of the bipolar power supply. In this example, the parameter ρ is the ratio U N / U DC is defined as U DC is the power supply voltage U P +U N Therefore, the power supply voltage is U N =ρ U DC and U P =(1-ρ)·U DC where the parameter ρ can (theoretically) vary between 0 and 1 (ρ=0 corresponds to U N = 0, and ρ = 1 indicates U P = 0). ρ is therefore called the symmetry parameter, which quantitatively describes the symmetry (or lack of symmetry / asymmetry) of a power supply.

[0019] The circuit shown in Figure 2 connects a positive supply voltage U to the neutral node n0 of the battery. P and the negative supply voltage U N The battery monitoring circuit 203 further includes a battery monitoring circuit 203 configured to monitor the battery voltage U Pand U N Any signal or parameter that represents, for example, the sum U P +U N and the measured U representing the parameter ρ DC Depending on the actual implementation, other signals or parameters may be used. DC and ρ may be communicated to the space vector modulator 201 in any known manner, for example using a digital bus such as a CAN (Controller Area Network) or any other suitable communication link. P and U N may be fed to the space vector modulator 201.

[0020] In addition, the circuit in Figure 2 provides a reference voltage vector V REF * (Amplitude in polar coordinates V REF and angle θ). The space vector modulator 201 includes an inverter 202 configured to provide a plurality of modulated phase voltages representing a reference voltage vector V REF * In the example described herein, a PMW switching scheme is used. If the inverter 202 is configured with a metal-on-semiconductor (MOS) field effect transistor (MOSFET), the aforementioned drive signal is a gate voltage supplied to the gate of the MOSFET. Each drive signal (gate signal) is modulated according to a duty cycle. In the example described herein, the duty cycle of the modulated drive signal is determined based on the monitored positive supply voltage U P and the monitored negative supply voltage -U N In the example shown in Figure 2, the duty cycle of the modulated drive signal depends on the total DC voltage U DC and the parameter ρ (both of which are clearly P and -U N and therefore the voltage U P and -U N (which conveys the same information as

[0021] FIG. 3 illustrates one exemplary embodiment of the inverter 202. According to FIG. 3, the inverter is comprised of three phases, with each phase implemented by a corresponding branch of the inverter. As noted above, in other embodiments, the inverter may have four or more phases. The batteries, labeled "Battery 1" and "Battery 2," are represented in the illustrated example by voltage sources, which are electrically connected at a neutral point n0.

[0022] Each of the three branches of the inverter in FIG.

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[0023] In the example described herein, each phase p of the inverter can be in one of four states, referred to as the P-type state, the U-type state, the L-type state, and the N-type state. These four states are illustrated in Figures 4(a)-(d), where in each illustrated state, the transistors shown as greyed out are inactive (off) and the other transistors are active (on).

[0024] In the P-type state, the transistor

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[0025] In the U-shaped state, the transistor

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[0026] In the L-type state, the transistor

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[0027] In the N-type state, the transistor

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[0028] In the above discussion, it is assumed that the voltage drop across the active transistors is negligible. The states P, U, L and N of a particular branch p of the inverter have been discussed with reference to FIG. 4. Similarly, the states of a three-phase inverter can be represented by three parts such as LNN, LUN, PUN, PUU, PUN, etc. In the example described herein, the only allowable state transitions in a particular branch p of the inverter are:

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[0029] To generate a particular output, the space vector modulator 201 (see FIG. 2) repeatedly generates a particular series of states, called a "modulation sequence," where each state is active for a particular time. FIG. 5 shows a table with 72 different modulation sequences, where each row of the table represents a particular sequence of inverter switching states. In this description, a modulation sequence is defined as: N , μ N , v N , ο P , μ P , v P and the switching state ο N , μ N Each of the tables represents a triplet of LNN, LUN, etc. The variables Σ, σ and

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[0030] The output of the inverter 202 (see FIG. 2) is a reference voltage V REF and the associated angle θ. The space vector modulator 201 is configured such that an inverter 202 (see FIG. 3) PWM The space vector modulator 201 is configured to generate modulated drive signals (e.g., gating signals) for the transistors contained within the inverter 202 to go through a desired sequence of inverter states (switching states of the inverter, see table in FIG. 5) within one cycle period shown as REF and angle θ).

[0031] The "selection" of the modulation sequence and the associated timing of the inverter states described above is controlled by the space vector modulator 201. The space vector modulator 201 is thus configured to generate modulated drive signals such that each inverter state of the selected modulation sequence is active for a particular on-time within one cycle period. In the embodiments described herein, the individual inverter states (in FIG. 5, o N , μ N , v N , ο P , μ P and ν P The on-time of the inverter 202 (denoted as ) is determined by the duty cycle of the drive signal output by the space vector modulator 201 and supplied to the transistors contained within the individual phases / branches of the inverter 202.

[0032] FIG. 6 visualizes the different voltage vectors (space vectors in Cartesian coordinates) that can be generated by the inverter states listed in the table of FIG. 5. FIG. 6 shows the three voltages V output by the inverter (i.e., the inverter states for each inverter state). U =

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[0033] Any three of the inverter output voltages (phase voltages) (V U , V V , V W ) can be transformed into the following (Clark transformation):

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[0034] In Cartesian coordinates, all the states that can be generated by a three-level three-phase inverter as shown in FIG. 3 are located either on a vertex of the inner (smaller) hexagon, on a vertex of the outer (larger) hexagon, or on the center point of the edge of the outer hexagon (i.e., centered between two adjacent vertices). In total, 19 different voltage vectors can be generated: a zero vector at the center, six vectors with end points at the vertices of the inner hexagon, six vectors with end points at the vertices of the outer hexagon, and six vectors with end points at the edge of the outer hexagon. It is clear from FIG. 6 that different inverter states can result in the same vector in Cartesian coordinates. For example, inverter states PPP, NNN, UUU, LLL, LUU, ULU, UUL, ULL, LUL and LLU all result in a 0 vector. Similarly, inverter states LNN, UNN, PLL, PUL, PLU and PUU all result in a vector pointing to the right-most vertex of the inner hexagon. Only the six states PPN, NPN, NPP, NNP, PNP and PNN explicitly represent six vectors that indicate the six vertices of the outer hexagon shown in Figure 6. Note that the scale of the x-axis and y-axis of the diagram in Figure 6 is normalized and is not important to the present discussion. Each state (and therefore each vertex) shown in Figure 6 represents a voltage (expressed in Cartesian coordinates or as a magnitude and angle) that can be generated by the inverter at its output.

[0035] FIG. 6 illustrates an example reference voltage vector (magnitude V REF , angle θ). This reference voltage may be represented by a modulation sequence that includes inverter states associated with adjacent vertices of a triangle surrounding the end point of the reference vector. In the example of FIG. 6, the reference vector may be represented by the modulation sequence PUU, LUU, LUN, LNN, LUN, LUU. This sequence is not included in the table of FIG. 5, which illustrates that the table of FIG. 5 is rather an example and not the only option for selecting a modulation sequence. In this example, space vector modulator 201 is A , T B and T C Determine the time T Ais associated with state PUU and LNN (which are equivalent in the sense that both map to the same space vectors / vertices) and time T B is associated with state LUU (which occurs twice in the modulation sequence described above) and time T C is associated with the Status LUN (which also occurs twice).

[0036] The timing of the above mentioned modulation sequence is visualized in Fig. 7. The two occurrences of state LUU are T B / 2 duration, and two occurrences of the state LUN are T B / 2 and state LNN is T A / 2, and the equivalent state PUU is divided (in time) into two parts. The first part is at the beginning of the array, the second part is at the end of the array, and each part is T A It has a length of 1 / 4. A +T B +T C The sum of these is the PWM cycle time T PWM Equal to time T A , T B , T C clearly determines the duty cycle of the drive signals that control the switching operation of the transistors contained within the inverter.

[0037] As can be seen from Fig. 6, a particular modulation sequence PUU, LUU, LUN, LNN, LUN, LUU, (PUU) is purely a reference voltage vector V REF * To select the appropriate sequence of inverter states, the space vector modulator only needs to determine the three adjacent vertices of the triangle that makes up the hexagon in Figure 6. The time T associated with the states A , T B , T C is also purely a reference voltage vector V REF * and is calculated based on the inverter states contained in the selected sequence. A , T B , T CThe algorithm for calculating V is known as such and will not be discussed in detail here. Essentially, time is determined by calculating the reference vector V using the voltages represented by the three vertices represented by the selected sequence. REF * As mentioned, PUU and LNN represent the same (first) vertex, while LUU and LUN represent the second and third vertices related to the modulation sequence currently considered.

[0038] Reference vector V REF * is the only (non-constant) input parameter, which affects the selection of the modulation sequence and the calculation of the times associated with the inverter states for the selected sequence. As noted above, Figure 6 and the above discussion are based on the assumption of a symmetrical supply for the inverter, as is typically the case in conventional systems, where the DC bus voltage is divided by a 1:1 capacitive divider to obtain the neutral voltage. However, if the supply for the inverter 202 is asymmetric (i.e., ρ ≠ 0.5), the situation is a bit more complicated.

[0039] In the first approach, the selection of the modulation sequence is done as explained above (as if the power supply were symmetric). A , T B and T C can also be determined as described above (e.g., using the center of gravity method). However, the time T A Here, the power supply voltage U P and U N , for example depending on the symmetry parameter p. An example is shown in FIG.

[0040] FIG. 8 shows a modified timing of the above mentioned modulation sequence depending on the actual measured power supply asymmetry. A If state is PUU, T AP For state LNN, T ANThis is almost the same as Figure 7, except that it has been changed to T AN =T A +ΔT and T AP =T A -ΔT, so the total PWM cycle time does not change. This modification does not affect the inverter output voltage when averaged over one cycle, since states PUU and LNN represent the same voltage vector (see FIG. 6; PUU and LNN are associated with the same vertex). However, as can be seen from FIGS. 3 and 4, state PUU couples the load to the first battery (U P ), while state LNN couples the load to the second battery (-U N (providing , ...

[0041] Therefore, in the situation where the SoC of the first battery is lower than the SoC of the second battery (i.e., ρ>0.5, U N >U P ), ΔT may be set to a positive time value to couple the first battery to the load for a shorter time (and the second battery for a longer time). Conversely, in situations where the SoC of the first battery is higher than the SoC of the second battery (i.e., ρ<0.5, U N P ), ΔT may be set to a negative time value to couple the first battery to the load for a longer time (and the second battery for a shorter time). The time difference ΔT may be increased to a higher positive or negative value when the deviation of ρ from its ideal value of 0.5 increases or decreases, respectively. If the SoC of both batteries is approximately equal (e.g., ρ∈[0.5-ε, 0.5+ε], where ε is a small positive value), ΔT may be set to zero.

[0042] The above-mentioned concepts are illustrated with reference to the exemplary modulation sequences of Figs. 7 and 8, which show a reference vector V whose end point is in the first triangle / segment of the inner hexagon (between θ=0° and θ=60°). REF ​* However, as can be seen in FIG. 6, this concept can be applied to all triangles / segments that make up the hexagon in FIG. 6. Note that this concept helps to stabilize the symmetry of the power supply, since it allows more power to be provided from the battery with a higher SoC than from the battery with a lower SoC. In a system where one or more single-phase loads are powered from only one of the batteries, the bipolar power provided by the two batteries will always be asymmetric. Operating the three-phase loads as described above helps to rebalance the power supplies, or at least reduce their asymmetry. Furthermore, a runaway condition can be avoided, where the battery with the lower SoC is discharged more than the other battery.

[0043] In other words, the space vector modulator 201 has a period of one cycle T PWM Within each switching state of the desired modulation sequence (see FIG. 5 , state o N , μ N , v N , ο P , μ P , v P ) is a specific on-time (see also FIG. 13. On-time

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[0044] In the above example, the choice of modulation sequence is determined by the reference vector V under the assumption of a symmetrical source. REF * That is, the space vector modulator basically operates as if the power supply were symmetrical, with only the timing of the sequences being modified as explained above with reference to Figures 7 and 8. This technique helps to keep the power supply approximately balanced, and may further be used to rebalance an asymmetrical power supply. However, the above technique does not guarantee that when the power supply is asymmetrical, the actual average voltage vector produced by the inverter (averaged over one cycle) will be equal to or greater than the reference vector V. REF *This does not take into account the fact that the phases of the two phases do not exactly match. As a result, the DC components may differ from zero and higher harmonics may be generated. The techniques described below allow for accurate three-phase operation of inverters on asymmetric bipolar supplies, even when the asymmetry is significant.

[0045] As mentioned above, FIG. 6 shows that the inverter power supply is symmetrical (i.e., U P =U N , ρ=0.5). If, for some reason, the symmetry parameter ρ is increased to a value above 0.5 or decreased to a value below 0.5, the inner hexagon of FIG. 6 becomes distorted. FIG. 9 shows the situation with ρ=0.6, which is the voltage U of the second battery. N is the voltage of the first battery, U P This means that the vertex is 1.5 times larger than the vertex of the two vertices. The inner hexagon in FIG. 6 is actually two coincident hexagons, and the coincidence is also broken for ρ ≠ 0.5. Thus, inverter states (e.g., PLL and LNN) that generate the same voltage vector according to FIG. 6 no longer result in the same voltage vector. Furthermore, voltage vectors that have their end points on the edges of the outer hexagon (undistorted) will move from the center point between the two vertices towards one of the adjacent vertices for ρ > 0.5 or ρ < 0.5.

[0046] 10 to 12 show a specific reference vector V REF * For the purpose of selecting a suitable modulation sequence for and calculating the times associated with the inverter states of the selected sequence, we show the decomposition of the hexagon in the diagram of FIG. 6 into sectors Σ, sections σ and segments ζ. For the sake of simplicity, FIGS. 10-12 show the situation with ρ=0.5 (undistorted inner hexagon). However, the following approach is generic and also applies to situations where the symmetry parameter ρ is greater or less than 0.5.

[0047] Figure 10 corresponds to the diagram of Figure 6. The outer hexagon is regularly divided into 6 triangles called sectors Σ. Voltage vectors having their endpoints on the vertices of the outer hexagon (not distorted if ρ ≠ 0.5) have angles of 0°, 60°, 120°, 180°, 240° and 300°. Vector V REF * If the angle θ of is in the interval [Σ·π / 3, (Σ+1)·π / 3], then any reference vector V REF * lies in sector Σ. In other words, sector Σ=0 runs from 0 to π / 3 rad (60°), sector Σ=1 runs from π / 3 to 2π / 3 rad (120°), etc.

[0048] As can be seen from Fig. 10, each sector Σ can be divided into two sections σ, with section σ=0 located at a lower angle and section σ=1 located at a higher angle. Note that in Fig. 10, the sections σ=0 and σ=1 have equal size, but this is not necessarily the case in the general situation where ρ≠0.5. In the asymmetric case shown in Fig. 9, in section Σ=0, section σ=0 is larger than section σ=1, but vice versa in sector Σ=1. The angle at which the sector is divided into two sections σ=0 and σ=1 is denoted as φ in Fig. 10, where φ is different in each sector Σ and depends on the power supply voltage U P , U N Depends on.

[0049] Each section of sector Σ is associated with six segments ζ (i.e., ζ=0, 1, ..., 5) shown in Fig. 11 and Fig. 12. In Fig. 11, the shaded area of ​​the figure shows section σ=0 of sector Σ=0. The segments associated with section σ=0 are triangles labeled as ζ=0, 1, ζ=2, 3 and ζ=4, 5 in Fig. 11, respectively. As mentioned above, in the symmetrical case, some inverter states result in the same voltage vector. Thus, segments ζ=0 and ζ=1 are coincident, and segments ζ=2 and ζ=3 as well as segments ζ=4 and ζ=5 are also coincident. However, in the asymmetrical case (ρ ≠ 0.5), the coincidence is destroyed, as can be seen from Fig. 9. Nevertheless, segments that coincide in the symmetrical case may partially overlap in the asymmetrical case.

[0050] In FIG. 12, the shaded area of ​​the diagram indicates section σ=1 of sector Σ=0. The segments associated with section σ=1 are the triangles labeled in FIG. 12 as ζ=0,1, ζ=2,3 and ζ=4,5, respectively. Again, segments ζ=0 and ζ=1 are coincident, as are segments ζ=2 and ζ=3 and segments ζ=4 and ζ=5. The segments in FIG. 11 and FIG. 12 are essentially the four triangles that make up one sector Σ. Each vertex represents one or more inverter states (V U , V V , V W ) corresponding to the voltage vector (V x , V y ) is the end point.

[0051] To select a particular modulation sequence, the space vector modulator 201 selects a reference voltage vector V REF * In order to determine which segment (specified by Σ, σ, and ζ) the end point of V lies in, geometrically, this determination is trivial. The space vector modulator 201 uses the voltage vectors represented by the three vertices of each segment ζ to modulate the reference vector V REF *This determination can be made by calculating the barycentric coordinates of (the barycentric method). If the correct segment is found, this method also yields the times associated with the inverter states corresponding to each vertex. The mathematics behind the problem of determining whether a point is within a triangle is as well known and therefore will not be discussed in further detail herein.

[0052] One result of the decomposition of the outer hexagon of Figs. 10-12 into sectors Σ, sections σ and segments ζ is summarized in the table of Fig. 5 already discussed above. Six sectors, each having two sections associated with six segments, result in 72 possible combinations listed in the table of Fig. 5. However, as discussed above, segments ζ=0 and ζ=1 overlap, as do segments ζ=2 and ζ=3 and segments ζ=4 and ζ=5. Thus, one modulation sequence is composed of subsequences associated with two overlapping segments. In Fig. 5, each line contains one of 36 modulation sequences, the first subsequence (of three inverter states) of each sequence is associated with segments ζ=0, 2 or 4, and the second subsequence (of three inverter states) of each sequence is associated with segments ζ=1, 3 or 5. Together, the two subsequences contain six inverter states forming one modulation sequence.

[0053] Figure 11 shows the reference vector V REF *shows one example where the first sector Σ=0 has its end points at segments ζ=4, ζ=5 in the lower section σ=0 of the first sector Σ=0. These parameters Σ, σ, ζ specify the modulation sequence LNN, PNN, PUN, PUU, PUN, PNN in the third row of the table in FIG. 5. During the modulation sequence, the inverter output jumps between the vertices of the triangle represented by segments ζ=4 and ζ=5 (which are coincident in FIG. 11 but only partially overlapping in the general case as shown in FIG. 9). The resulting switching pattern is further illustrated by the timing diagram in FIG. 13, where the first state LNN is again split into two parts as in the previous examples of FIGS. 7 and 8.

[0054] All vertices in Figure 11 except the vertices of the outer hexagon are connected to the power supply voltage U P and U N Since it depends on the center of gravity method, the on-time shown in Figure 13

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[0055] While the present invention has been illustrated and described with respect to one or more implementations, changes and / or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular, with respect to the various functions performed by the above-described components or structures (units, assemblies, devices, circuits, systems, etc.), the terms used to describe such components (including references to "means") are intended, unless otherwise indicated, to correspond to any component or structure that performs a particular (e.g., functionally equivalent) function of the described component, even if it is not structurally equivalent to the disclosed structures that perform that function in the exemplary implementations of the invention shown herein.

[0056] Moreover, the purpose of the Abstract of the Disclosure is to enable the U.S. Patent and Trademark Office and the public at large, particularly scientists, engineers and practitioners unfamiliar with patent or legal terminology or language, to quickly determine the nature and substance of the technical disclosure of the present application from a cursory inspection. The Abstract of the Disclosure is in no way limiting in scope.

[0057] Finally, Applicant intends that only those claims which expressly include the phrase "means for" or "step for" be construed under 35 U.S.C. § 112. Any claim which does not expressly include the phrase "means for" or "step for" is not to be construed under 35 U.S.C. § 112.

Claims

1. a battery monitoring circuit configured to monitor a positive power supply voltage and a negative power supply voltage relative to a neutral node; an inverter configured to provide a plurality of modulated phase voltages representative of a reference voltage vector; a space vector modulator configured to generate a modulated drive signal for the inverter based on the reference voltage vector, the duty cycle of the modulated drive signal being dependent on the monitored positive power supply voltage and the monitored negative power supply voltage; A circuit comprising:

2. the circuit further comprises a first battery and a second battery connected to the neutral node and configured to provide the positive power supply voltage and the negative power supply voltage; The circuit of claim 1 .

3. The inverter is an active neutral point clamped (ANPC) multilevel converter. The circuit of claim 1 .

4. the ANPC multilevel converter includes three phases, each of the three phases coupled between a first power supply node and a second power supply node and configured to receive a DC power supply voltage corresponding to a difference between the positive power supply voltage and the negative power supply voltage; Each of the three phases is configured to provide a respective one of the three phase voltages by outputting either the positive power supply voltage, the negative power supply voltage, or a neutral point voltage depending on a switching state of the ANPC multilevel converter.

4. The circuit of claim 3.

5. the space vector modulator is configured to generate the modulated drive signal such that the inverter goes through a selectable modulation sequence of switching states within one cycle period, the selectable modulation sequence being selected based on the reference voltage vector. The circuit of claim 1 .

6. the space vector modulator is configured to generate the modulated drive signal such that within one cycle period, each switching state of the selectable modulation sequence is active for a particular on-time; the on-time of the switching state is configured to be determined based on the duty cycle of the modulated drive signal; the duty cycle of the modulated drive signal is configured to be dependent on the monitored positive power supply voltage and the monitored negative power supply voltage.

6. The circuit of claim 5.

7. the selectable modulation sequence includes a first state and a second state; the first state is configured to cause the inverter to generate a positive average load current during a cycle in which the first state is active; the second state is configured to cause the inverter to generate a negative average load current during a cycle in which the second state is active.

6. The circuit of claim 5.

8. the space vector modulator is configured to, in response to the positive power supply voltage having a greater magnitude than the negative power supply voltage, control the duty cycle of the modulated drive signal such that a cumulative on-time of the first state is greater than a cumulative on-time of the second state; the space vector modulator is configured to, in response to the positive power supply voltage having a magnitude less than the negative power supply voltage, control the duty cycle of the modulated drive signal such that the accumulated on-time of the second state is greater than the accumulated on-time of the first state.

8. The circuit of claim 7.

9. monitoring the positive and negative supply voltages of the inverter relative to a neutral node; generating, by a space vector modulator, a modulated drive signal for the inverter based on a reference voltage vector, the duty cycle of the modulated drive signal being dependent on the monitored positive power supply voltage and the monitored negative power supply voltage; providing the modulated drive signal to the inverter, the inverter being configured to provide a plurality of modulated phase voltages representative of the reference voltage vector in response to the modulated drive signal; The method includes:

10. The inverter is an active neutral point clamped (ANPC) multilevel converter.

10. The method of claim 9.

11. The method comprises: providing the positive supply voltage by a first battery connected to the neutral node; providing the negative power supply voltage by a second battery connected to the neutral node; Further comprising:

10. The method of claim 9.

12. a first power supply coupled to the neutral node and configured to provide a positive power supply voltage; a second power supply coupled to the neutral node and configured to provide a negative power supply voltage; a battery monitoring circuit configured to monitor the positive power supply voltage and the negative power supply voltage; an inverter supplied by the positive power supply voltage and the negative power supply voltage; a space vector modulator configured to generate a modulated drive signal for the inverter based on the monitored positive power supply voltage and the negative power supply voltage, the generated modulated drive signal configured to keep the positive power supply voltage and the negative power supply voltage substantially balanced; A three-level inverter system comprising:

13. the inverter is configured to provide a plurality of modulated phase voltages representative of a reference voltage vector; the space vector modulator is configured to generate the modulated drive signal for the inverter based on the reference voltage vector; a duty cycle of the modulated drive signal is dependent on the monitored positive power supply voltage and the monitored negative power supply voltage. The three-level inverter system of claim 12.

14. The inverter is an active neutral point clamped (ANPC) three-level converter. The three-level inverter system of claim 12.

15. the ANPC three-level converter includes three phases, each of the three phases coupled between a first power supply node and a second power supply node and configured to receive a DC power supply voltage corresponding to a difference between the positive power supply voltage and the negative power supply voltage; Each of the three phases is configured to provide a respective one of the three phase voltages by outputting either the positive supply voltage, the negative supply voltage, or a neutral voltage in response to a switching state of the ANPC three-level converter.

15. The three-level inverter system of claim 14.

16. the space vector modulator is configured to generate the modulated drive signal such that the inverter goes through a selectable modulated sequence of switching states within one cycle period; The selectable modulation sequence is configured to be selected based on a reference voltage vector. The three-level inverter system of claim 12.

17. the space vector modulator is configured to generate the modulated drive signal such that the inverter goes through a selected modulated sequence of switching states within one cycle period; the selectable modulation sequence is configured to be determined based on a reference voltage vector such that the positive power supply voltage and the negative power supply voltage remain substantially balanced. The three-level inverter system of claim 12.

18. the space vector modulator is configured to generate the modulated drive signal such that within one cycle period, each switching state of a selectable modulation sequence is active for a particular on-time; the on-time of the switching state is configured to be determined based on a duty cycle of the modulated drive signal; the duty cycle of the modulated drive signal is dependent on the monitored positive power supply voltage and the monitored negative power supply voltage. The three-level inverter system of claim 12.

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