Error correction on quantum device

Abstract

To provide error correction on quantum devices.SOLUTION: A method of quantum error correction may include obtaining a logical qubit including a logical state. The logical qubit may be encoded using a quantum code to determine states for a plurality of physical qubits, the quantum code including a first code generated based on a first set of generators and a second code generated based on a second set of generators, the first set of generators and the second set of generators including different cardinality. The method may further include adjusting physical states of the plurality of physical qubits in quantum hardware based on the determined states. One or more computations may be performed using the quantum hardware and the physical states of the plurality of physical qubits may be decoded using the quantum code to determine the logical state.SELECTED DRAWING: Figure 2

Description

[Technical field]

[0001] The present disclosure relates generally to error correction for quantum devices. [Background technology]

[0002] Quantum computers can use quantum bits ("qubits"), which can represent information as 1, 0, or 1 and 0 simultaneously. Quantum computers can perform some types of calculations, such as optimization problems, integer factorization, simulation modeling, and / or data analysis, more efficiently and / or more accurately than classical computing systems. However, existing quantum computers may be classified as noisy intermediate-scale quantum (NISQ) devices because the state of the qubits can be altered by slight environmental interference. Thus, existing quantum computers may have little fault tolerance and be of limited usefulness.

[0003] The subject matter claimed in this disclosure is not limited to embodiments that solve any shortcomings or that operate only in environments such as those described above. Rather, this background is provided only to illustrate one example technology area where some embodiments described in this disclosure may be practiced. Summary of the Invention [Means for solving the problem]

[0004] According to an aspect of an embodiment, a method of quantum error correction may include obtaining a logical qubit including a logical state. The logical qubit may be encoded using a quantum code to determine a state of a plurality of physical qubits, the quantum code including a first code generated based on a first set of generators and a second code generated based on a second set of generators, the first set of generators and the second set of generators including different cards. The method may further include adjusting a physical state of the plurality of physical qubits in quantum hardware based on the determined state. One or more computations may be performed using the quantum hardware, and the physical state of the plurality of physical qubits may be decoded using the quantum code to determine the logical state.

[0005] The object and advantages of the embodiments will be realized and attained at least by the elements, features, and combinations particularly pointed out in the claims. It is to be understood that both the foregoing general description and the following detailed description are illustrative only and are not restrictive of the invention as claimed. [Brief description of the drawings]

[0006] Example embodiments will be described and explained with additional specificity and detail through the accompanying drawings.

[0007] [Figure 1] 1 is a flow diagram illustrating error correction for a quantum device.

[0008] [Diagram 2] 1 is a flowchart of an exemplary method for computing a quantum code.

[0009] [Diagram 3] 1 is an exemplary graph of a particular subset of potential coding rates corresponding to a first coding rate and a second coding rate that define a quantum coding rate.

[0010] [Figure 4]1 is a flow chart of an exemplary method for quantum error correction.

[0011] [Diagram 5] 1 is an exemplary computing system, all in accordance with one or more embodiments of the present disclosure. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0012] Quantum computers use quantum bits, or "qubits," that are configured to store values ​​of 0, 1, or a superposition of both 0 and 1. Because qubits can store multiple values ​​simultaneously, quantum computers can perform calculations more quickly than classical computers that use classical bits that store values ​​of either 0 or 1. As a result, quantum computers can perform calculations such as optimization problems more efficiently, improving computations in a variety of technological fields, such as physics, chemistry, materials design, drug discovery, and machine learning.

[0013] However, existing quantum computers are sometimes referred to as noisy intermediate-scale quantum (NISQ) devices because the computational performance of such quantum computers is constrained by current physical and technological limitations. The sensitivity and reliability issues of quantum computers to external interference can be caused by the susceptibility of the quantum hardware to errors caused by quantum noise that perturbs the operation of the quantum computer. Quantum noise can result from stray electromagnetic radiation, material defects, or other external obstructions. Furthermore, qubits can exhibit quantum properties for a limited period of time, and the computations performed by quantum computers involve measuring values ​​associated with the qubits during the period of time in which the qubits exhibit quantum properties.

[0014] In some circumstances, quantum noise can impair effective quantum computation by preventing qubits from retaining a coherent quantum state for a practical duration. For example, a qubit can suffer from bit-flip errors and / or phase-flip errors. Bit-flip errors can include instances where the computational state of a qubit flips from 1 to 0 or vice versa. Phase-flip errors can include instances where the phase of a qubit is affected. For example, a qubit can rotate by an angle.

[0015] Thus, current approaches to quantum computing may rely on quantum error correction processes. One approach to quantum error correction involves quantum codes modeled after classical error-correcting codes, such as low-density parity check (LDPC) codes. LDPC codes have been used to mitigate errors during data transmission by expanding the message data (e.g., a binary data source) and encoding the message data with a parity-check matrix that contains 0s and 1s. The expanded message data may be decoded by the receiver (e.g., the message data may be reconstructed to its original state). During decoding, some errors (e.g., flipped bits) may be detected and corrected using the LDPC code.

[0016] In some circumstances, quantum low-density parity check (QLDPC) codes may follow a similar approach as LDPC codes. QLDPC codes may be used to protect quantum information against errors. QLDPC codes may involve encoding logical qubits, including logical states with multiple physical qubits. The states of the physical qubits may represent logical states. One or more quantum logic gates may be performed on the physical qubits to execute a quantum algorithm, during which one or more errors may occur due to faulty quantum logic gates and / or environmental factors such as quantum noise. As a result, the states of the physical qubits may be affected by the one or more errors. QLDPC codes may be used to detect and / or correct the one or more errors, and the physical states may be decoded to determine the logical state originally carried by the logical qubits.

[0017] In some circumstances, a class of QLDPC codes called quantum Tanner codes may be suitable for architectures with long-range gate connections, such as ion traps, silicon photonics, and Rydberg interactions. Quantum Tanner codes may be defined by one or more characteristics, such as a rate and a minimum distance. The rate may represent how effectively a quantum Tanner code uses physical resources (e.g., physical qubits) in the quantum error correction process. For example, the rate may be the ratio of the number of logical qubits to the total number of physical qubits. The minimum distance may represent the ability of a quantum Tanner code to detect and correct errors. For example, the minimum distance may correspond to the minimum number of physical qubits that can contain an error before the quantum Tanner code is no longer able to detect and / or correct the error. For example, a quantum Tanner code may be able to correct an error if the error affects fewer physical qubits than the minimum distance.

[0018] The present disclosure may relate, inter alia, to systems and methods relating to improving quantum Tanner codes by improving their rate and / or minimum distance. Some traditional approaches to generating quantum Tanner codes involve generating quantum Tanner codes using sets of generators of the same cardinality. The cardinality of a set of generators may represent the number of elements in the set. Two or more sets of generators have the same cardinality if there is a one-to-one correspondence between the elements of the sets. However, by allowing the sets of generators to have different cardinality, the rate and minimum distance of quantum Tanner codes may be improved.

[0019] DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS An embodiment of the present invention will be described with reference to the drawings.

[0020] 1 is a flow diagram illustrating an example system 100 of error correction for quantum devices in accordance with one or more embodiments of the present disclosure. In some embodiments, the system 100 may include an encoder 120, quantum hardware 130, and a decoder 140.

[0021] In some embodiments, encoder 120 may include codes, steps, and / or methods used to encode logical qubit 110 into a larger number of physical qubits 125. In these and other embodiments, logical qubit 110 may refer to an abstract representation of a qubit that includes a logical state, where the logical state may refer to the quantum information being stored and / or processed. For example, for a single qubit, the logical state may be 0, 1, or a superposition of |0〉 and / or |1〉. Physical qubit 125 may represent an individual qubit that may be part of a quantum computer. For example, physical qubit 125 may be a fundamental unit of quantum information implemented in physical systems such as superconducting circuits, trapped ions, and photon states.

[0022] In some embodiments, physical qubit 125 may be sensitive to one or more external conditions that may cause errors. For example, physical qubit 125 may be sensitive to noise, temperature fluctuations, electromagnetic radiation, gate errors, etc. In these and other embodiments, errors may be reduced by encoding the information of a single logical qubit into the congruent state of multiple physical qubits. By encoding a single logical qubit into the congruent state of multiple physical qubits, errors caused by the physical qubits during the processing of quantum information may be detected and / or corrected.

[0023] In some embodiments, encoding of logical qubits 110 may involve using a quantum error-correcting code ("quantum code"). For example, the quantum code may define how to encode and / or map the logical state of logical qubit 110 to states of multiple physical qubits 125. In these and other embodiments, different quantum codes may have properties such as the number of physical qubits 125 required, the number of encoded logical qubits, error detection capabilities, error correction capabilities, suitability for different quantum hardware platforms, etc.

[0024] In some embodiments, a quantum code may be characterized and / or described using certain parameters. For example, a quantum code may be characterized by a coding rate. The coding rate of a quantum code may represent the ratio between the number of logical qubits and the number of physical qubits used to encode the logical qubits. For example, the coding rate may be calculated by dividing the number of logical qubits by the number of physical qubits used to encode the logical qubits. In these and other embodiments, a higher coding rate may indicate that a smaller number of physical qubits are required to encode the logical qubits, which may correspond to increased efficiency of the quantum code.

[0025] Additionally or alternatively, a quantum code may be characterized by a minimum distance. The minimum distance of a quantum code may represent an indication of the quantum code's ability to detect and correct errors. For example, the minimum distance may represent how many errors a quantum code can correct, e.g., a particular quantum code with a minimum distance of 5 may be capable of detecting and / or correcting any combination of 4 errors or less. In some embodiments, a larger minimum distance may be preferred to detect and / or correct a larger number of errors.

[0026] In some embodiments, the quantum code may include a quantum Tanner code, which may be a type of quantum low-density parity check (LDPC) code built from the concept of classical Tanner codes used to detect and correct errors in classical information transmission. In some embodiments, the quantum Tanner code may be used in the quantum context to detect and correct errors in quantum information transmission.

[0027] In these and other embodiments, a quantum Tanner code may be determined from a group G and at least two sets of generators of the group G (e.g., a first set A of generators and a second set B of generators). In these and other embodiments, the group G may refer to an algebraic structure that includes one or more elements and a binary operation that combines the elements in some way. In some cases, the group may be empty (e.g., includes no elements). The elements may be characters, such as numbers, letters, or any other characters. For example, the group may include three elements (e.g., {1,2,3}). The group may include all possible permutations of the three elements according to a binary operation of the group. Such binary operations may include identity permutation, commutation, and cyclic permutation of length 3 (3-cycle), among other binary operations that may be applied to the set of elements. In these or other embodiments, the set of generators that may be used to determine the Tanner code may be a subset of elements of the set of groups that may generate all elements of the group through repeated application of a group operation.

[0028] In some examples, the group G may be a non-empty set with elements that satisfy associativity. For example, any element in the group G, such as a, b, and c, may satisfy (a*b)*c=a*(b*c), where "*" represents a binary operation. Furthermore, the group G may contain an identity element e, such that for any element g in the group G, g*e may be equal to e*g. In some cases, the elements of the group G may have inverse elements. For example, for any element a in the group G, there may be a unique element i such that a*i=i*a=e. In some embodiments, the group G may be an infinite group. For example, the group G may contain an uncountable (e.g., real numbers) or countably infinite (e.g., integers) number of elements.

[0029] Some previous approaches towards determining a quantum Tanner code based on a group G, a first set of generators A, and a second set of generators B may include the assumption that the first set of generators A and the second set of generators B contain the same cardinality, i.e., the same number of elements in each set. For example, the first set of generators A and the second set of generators B may be assumed to have the same number of elements that generate all elements of the group (e.g., |A|=|B|, where |A| represents the cardinality of A and |B| represents the cardinality of B).

[0030] In some situations, a group G, a first set of generators A, and a second set of generators B can be expressed as a first classical code C A and the second classical code C B A classical code may be used to generate a first set of classical codes C. A classical code may include an error-correcting code that may be used to correct errors in classical information (e.g., digital and / or binary data). For example, a classical code may be configured to detect and / or correct errors incurred by the classical information during transmission. In these and other embodiments, a first set of generators A may be used to generate a first set of classical codes C. A and the second classical code C B Each of the classical codes may have a code rate. For example, the first classical code C A is the first coding rate ρ A and a second classical code CB is the second coding rate ρ B may have.

[0031] Some previous approaches use a first coding rate ρ A and the second coding rate ρ B This may involve the assumption that the sum of ρ is equal to 1. Mathematically speaking, B =(1-ρ A ) can be assumed.

[0032] In some embodiments, quantum codes based on traditional quantum Tanner codes may be generalized. In some embodiments, the generalized quantum codes may provide improved rates over Leverrier-Zemor quantum codes. In these and other embodiments, the generalized quantum codes may be generated without the assumptions made above. For example, the assumptions may be made that the first set of generators A and the second set of generators B have the same cardinality, or that the first coding rate ρ A and the second coding rate ρ B may not be assumed to sum to 1. In some embodiments, by ignoring these assumptions, the quantum code may be improved. For example, the rate of the quantum code may be improved. An example method for determining a quantum code using two classical codes may be described in further detail with respect to FIG. 2 of this disclosure.

[0033] The rate of a quantum code (e.g., |A| ≠ |B|) according to one or more embodiments of the present disclosure is mathematically given by 2ρ A +2ρ B -4ρ A ρ B −1. In some embodiments, this rate can be proven based on the following steps: 0 and the second tensor code C 1 The dimension of the first tensor code C 0 and the second tensor code C 1(How dimC is determined may be described in more detail with respect to block 208 of FIG. 2 of this disclosure). Mathematically, 0 =dimC A dimC B =k 1 k 2 =ρ A n 1 ρ B n 2 , and dimC 1 =dimC A ⊥ dimC B ⊥ =(n 1 -k 1 )(n 2 -k 2 )=(1-ρ A )n 1 (1-ρ B )n 2 Here, n 1 is the first classical code C A represents the length of (for example, the first discriminant), and n 2 is the second classical code C B represents the length of (e.g., the second discriminant), and k 1 is the first classical code C A represents the dimension of,k 2 is the second classical code C B The number of generators and / or sets of generators for a quantum code is at most |V 0 |dimC 0 +|V 1 |dimC 1 =(ρ A ρ B +(1-ρ A )(1-ρ B ))n 1 n 2 |G|, where G represents a group used to generate the first set of generators and the second set of generators, and V 0 = Gx{0}, and V 1 =Gx1.

[0034] The determined number of generators may provide an upper bound on the number of constraints for the Tanner code generated using the tensor code. As a result, the dimension of the quantum code generated based on the Tanner code may be expressed as:

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[0035] In some embodiments, the first coding rate ρ A and the second coding rate ρ B is (2ρ A +2ρ B -4ρ A ρ B -1) ≥ (2ρ-1) 2 This relationship can be chosen and / or determined to satisfy (1-ρ A )(2ρ A -1) ≧ ρ B (2ρ A -1) and (1-ρ B )(2ρ B -1) ≧ ρ A (2ρ B For example, the rate of the quantum code presented in this disclosure may be further simplified as a first coding rate ρ A and the second coding rate ρ B This can be improved compared to some traditional approaches where the first coding rate ρ A and the second coding rate ρ B The potential range of may be explained in further detail with respect to FIG. 3 of this disclosure.

[0036] In some embodiments, physical qubits 125 may be processed by quantum hardware 130. In these and other embodiments, quantum hardware 130 may refer to any physical device and / or system suitable for quantum information processing. For example, quantum hardware 130 may include superconducting qubits (e.g., qubit circuits made of superconducting materials that can be manipulated by microwave pulses), trapped ion quantum computers, photonic quantum computers, quantum annealers, topological quantum computers, quantum sensors, among others. In general, quantum hardware 130 may include multiple quantum gates configured to manipulate the state of one or more qubits in quantum hardware 130. The quantum gates may manipulate the state of one or more qubits using one or more quantum algorithms. The quantum algorithms may use properties of the qubits, such as entanglement, superposition, and / or parallelism between states, to perform certain functions of the quantum algorithm.

[0037] In some embodiments, quantum hardware 130 may be configured to apply a quantum code to a physical qubit to mitigate the error. For example, quantum hardware may generate and / or determine an error-adjusted physical qubit 135. For example, quantum hardware 130 may apply one or more quantum gates and / or operations to the physical qubit to undo and / or mitigate the error. The one or more quantum gates and / or operations may be determined based on the quantum code.

[0038] In some embodiments, the error-adjusted physical qubit 135 may be obtained by the decoder 140. In these and other embodiments, the decoder 140 may be configured to determine the logical state 145 of the logical qubit 110. For example, the decoder 140 may decode the physical state of the physical qubit using the quantum code to determine the logical state 145. For example, the decoder 140 may be configured to retrieve the encoded quantum information from the physical qubit. The decoder 140 may decode the physical qubit using the encoded quantum information and the quantum code to determine the logical state 145 of the logical qubit 110. For example, the decoder 140 may obtain the state of six physical qubits and determine the logical state of three qubits based on the state information and the quantum code.

[0039] Modifications, additions, or omissions may be made to system 100 without departing from the scope of the present disclosure. For example, the designation of different elements in the manner described is intended to help explain the concepts described herein and is not limiting.

[0040] 2 illustrates a flowchart of an example method 200 for determining a quantum code in accordance with at least one embodiment of the present disclosure. Method 200 may be performed by any suitable system, apparatus, or device. Although illustrated in discrete blocks, steps and operations associated with one or more blocks of method 200 may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the particular implementation.

[0041] The method 200 may begin at block 202, where an infinite family of a group G (e.g., |G|→∞) may be obtained. At block 204, a plurality of sets of generators that define the infinite family of the group may be determined. For example, a first set of generators A and a second set of generators B may be determined. In some embodiments, the first set of generators A and the second set of generators B are determined based on the fact that the geometric complex underlying the quantum code is a complex of the Cay 2 It may be determined that a complex X can be defined as a left-right Cayley complex X defined by (A,G,B), where the first set of generators A and the second set of generators B are symmetric (e.g., A=A -1 , B=B -1 ), and the total no-conjugacy condition (e.g., ag ≠ gb for any g ∈ G, a ∈ A, b ∈ B). A complex X may be composed of vertices and edges. Under some current approaches, the complex X may form a square with the vertices and edges. In accordance with one or more embodiments of the invention, the complex X may form a rectangular complex rather than a square. In these and other embodiments, the set of vertices may be a group G. The edges are {g, ag}, {gb, agb} ∈ E. A ;{g,gb},{ag,agb}∈E B ;{g,agb}∈E 0 ;{ag,gb}∈E 1 where E A is the edge set consisting of edges ((g,0),(ag,1)) for a∈A, and E B is the edge set consisting of the pair ((g,0),(gb,1)) for b ∈ B. The completely non-conjuguous condition on a first set of generators A and a second set of generators B may ensure that each square has four distinct vertices, and each vertex is adjacent to |A||B|.

[0042] In some embodiments, the two Cayley graphs Cay(G,A) and Cay(G,B) may not be bipartite. For example, the Cayley graph may not show a clear separation into two distinct groups of vertices representing physical qubits and check qubits (e.g., redundant qubits used for error detection). However, a bipartite Cayley graph may be used to represent the structure of a Tanner code. In these and other embodiments, a non-bipartite Cayley graph may be used such that the two Cayley graphs are bipartite.

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[0043] In some embodiments, the first set of generators and the second set of generators may include different cardinality (e.g., |A| ≠ |B|). In these and other embodiments, the different cardinality may improve the quantum code in terms of the ratio and minimum distance of the quantum code. For example, the different cardinality may improve the quantum code in terms of the ratio and minimum distance of the first classical code C A and the second classical code C B , which may affect and / or improve the rate and minimum distance of the quantum code.

[0044] At block 206, a first classical code C A and the second classical code C B may be defined from a first set of generators A and a second set of generators B, respectively. In this disclosure, a "classical code" may also refer to a linear code. In some embodiments, the first classical code is a linear code of a first length n A and the second classical code may include a second length n B In these and other embodiments, the first length n A may be defined from a first set A of generators, where n A = |A|. Additionally or alternatively, the second length n B may be defined from a second set of generators B, where n B In some cases, the first set of generators A and the second set of generators B may have different cardinality, so that the first length n A and the second length n B may be different. In some embodiments, the first classical code C A and the second classical code C B is C A ⊂F 2 |A| And C B ⊂F 2 |B| The above formula may be used.

[0045] In some embodiments, the first classical code C A and the second classical code C Bis the first classical code C A and the second classical code C B The dual tensor of

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[0046] In some embodiments, the first classical code C A and the second classical code C B can be constructed and / or determined based on a family of Morgenstern generators. For example, q=2 s As, G i =PGL 2 (q i )=PSL 2 (q i ) is defined as an infinite family of groups G, each of which is s+1 Morgenstern generator A of generators i (where each element has order greater than 2). An infinite family of groups G can contain 2 s+1 Morgenstern generator B of generators i where each element has order 2. In these and other embodiments,

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[0047] In some embodiments, the first classical code C A and the second classical code C B can be constructed and / or determined based on a family of Ramanujan and / or substantially Ramanujan generators. For example, q=2 l As, G i =PGL 2 (q i )=PSL 2 (q i ) is an infinite family of groups G defined as i (where each element has order greater than 2). An infinite family of groups G can contain a Ramanujan generator B i (where each element has order 2). In some cases, any

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[0048] In block 208, a first tensor code C 0 and the second tensor code C 1 But the first classical code CA and the second classical code C B For example, the first tensor code C 0 is the first classical code C A and the second classical code C B and the second tensor code C 1 is the first classical code C A The dual of and the second classical code C B For example, the first tensor code C 0 and the second tensor code C 1 is mathematically

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[0049] In block 210, a bit-flip (Z) generator may be generated from a first tensor code, and a phase-flip (X) generator may be generated from a second tensor code. 0 The first basis β 0 and C 1 The second basis β 1 For example, a first basis β 0 and the second basis β 1 are the first tensor code C 0 and the second tensor code C 1 The first basis β0 and the second basis β 1 is the first tensor code C in the code space. 0 and the second tensor code C 1 For example, the first basis β 0 is C A and C B may represent all possible combinations of basis states for 1 is C A ⊥ and C B ⊥ In these and other embodiments, a classical code (e.g., C A and C B ), may include sequences and / or combinations of binary digits (e.g., 0 and 1) that may exist in a classical code. For quantum codes, the basis states may include valid quantum states in the code space that may be represented as a tensor product of single-qubit basis states (e.g., |0〉 and |1〉). For example, the basis states of a three-qubit tensor code may include |000〉, |001〉, |010〉, |011〉, |100〉, |101〉, |110〉, and |111〉. In these cases, any valid encoded quantum state in the quantum code may be represented as a linear combination of the basis states. Mathematically, the bit-flip generators may be: For each v∈V 0 About x v is β 0 equal to some element of

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[0050] In block 212, the first Tanner code C 0 and the second Tanner code C 1 For example, the first Tanner code C 0 is the first graph G 0 and the first tensor code C 0 and the second Tanner code C 1 is the second graph G 1 and a second tensor code C. In these and other embodiments, the first Tanner code C 0 may be orthogonal to the Z generator, and x v ∈C 0 ⊥ Vector x∈F such that 2 Q The second Tanner code C 1 may be orthogonal to the X generators as well. For example, the first Tanner code C 0 and the second Tanner code C 1 Mathematically,

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[0051] At block 214, the quantum code

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[0052] In some embodiments, the quantum code Q is a first classical code C A The first coding rate ρ A and the second classical code C B The second coding rate ρ B For example, the quantum coding rate may include a quantum coding rate defined using A +2ρ B -4ρ A ρ B In these and other embodiments, the first coding rate ρ A and the second coding rate ρ B is the first tensor code C 0 Dimension of (for example, dimC 0 ) and the second tensor code C 1 Dimension of (for example, dimC 1 )from,

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[0053] In these and other embodiments, the quantum coding rate (e.g., 2ρ A +2ρ B -4ρ A ρ B -1 ≧ (2ρ-1) 2 ) to help increase the first coding rate ρ A and the second coding rate ρ Bmay be selected from a particular subset of potential coding rates. The particular subset may include the first coding rate ρ A 1 to the second coding rate ρ B An example of this particular subset of potential coding rates may be shown in FIG.

[0054] A quantum code Q according to one or more embodiments of the present disclosure may have an improved minimum distance compared to a quantum code determined based on some traditional approaches in which a first set of generators A and a second set of generators B have the same cardinality. For example, the minimum distance of some traditional approaches may be:

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[0055] Modifications, additions, or omissions may be made to method 200 without departing from the scope of the present disclosure. For example, the designation of different elements in the described manner is intended to help explain the concepts described herein and is not limiting. Additionally, method 200 may include any number of other elements or may be implemented in other systems or contexts other than those described.

[0056] 3 illustrates an example graph 300 of a particular subset of potential coding rates that correspond to a first coding rate and a second coding rate that define a quantum coding rate. For example, the particular subset of potential coding rates may correspond to the particular subset discussed in FIG 2. The graph 300 may include a first axis 310 and a second axis 320.

[0057] In some embodiments, the particular subsets may include the first subset 315 and the second subset 325. In these cases, the first coding rate ρ A is selected from the first subset 315 and the second coding rate ρ B is selected from the second subset 325. In these and other embodiments, the first coding rate ρ A and the second coding rate ρ B is the second coding rate ρ B From 1 to the first coding rate ρ A (For example, ρ B =1-ρ A In some embodiments, the quantum coding rate ρ(Q) may be such that ρ(Q)≧(2ρ B -1) 2 This further implies that ρ(Q) ≥ 2ρ A +2ρ B -4ρ A ρ B It may also be represented as -1.

[0058] In these and other embodiments, the first subset 315 is (1−ρ A )(2ρ A -1) ≧ ρ B (2ρA −1), and the second subset 325 may be defined as (1−ρ B )(2ρ B -1) ≧ ρ A (2ρ B -1). In these and other embodiments, the first subset 315 and the second subset 325 may be defined as triangular regions about the first axis 310 and the second axis 320. In some embodiments, the first subset 315 may include a first portion and a second portion. For example, the first portion may be defined using vertices (0,1), (0.5,1), and (0.5,0.5), and the second portion may be defined using vertices (0.5,0), (0.5,0.5), and (1,0). In these and other embodiments, the second subset 325 may include a first portion and a second portion. For example, the first portion may be defined using vertices (0,0.5), (0,1), and (0.5,0.5), and the second portion may be defined using vertices (1,0), (1,0.5), and (0.5,0.5). In some embodiments, first subset 315 and second subset 325 may be defined as areas larger or smaller than those shown in Figure 3. For example, first subset 315 and second subset 325 may be defined as any suitable numbers that satisfy the relationships given above.

[0059] 4 illustrates a flow chart of an exemplary method 400 of quantum error correction. Method 400 may be configured in accordance with at least one embodiment described in this disclosure. In these and other embodiments, one or more of the steps of method 400 may be performed based on execution of instructions stored on one or more non-transitory computer-readable media, or none of the steps of method 200 may be performed based on execution of instructions stored on one or more non-transitory computer-readable media. Although shown as discrete blocks, various blocks may be divided into additional blocks, combined into fewer blocks, or eliminated, depending on the desired implementation.

[0060] Method 400 may include block 402. At block 402, a logical qubit including a logical state may be obtained. In some embodiments, the logical state may correspond to quantum information that is to be encoded and / or protected in order to be transferred and / or processed.

[0061] At block 404, the logical qubits may be encoded using a quantum code to determine states for the plurality of physical qubits. In some embodiments, the quantum code may include a first code generated based on a first set of generators and a second code generated based on a second set of generators. In these and other embodiments, the first set of generators and the second set of generators may include different cards. Additionally or alternatively, the first set of generators and the second set of generators may be subsets of a group. In some embodiments, the group may be an infinite group. In some embodiments, the first code may include bit-flip generators and the second code may include phase-flip generators.

[0062] In some embodiments, the quantum code may include a quantum code rate selected from a particular subset of potential code rates. In some embodiments, the particular subset may be selected such that the quantum code rate is greater than the code rate where the first code rate is equal to one minus a second rate, where the first code rate is for the first code and the second code rate is for the second code. In some embodiments, the first code rate may be determined using a dimension of a first set of generators and the second code rate may be determined using a dimension of a second set of generators.

[0063] In some embodiments, encoding the logical qubits onto the physical qubits may include mapping the logical states of the logical qubits onto the physical qubits. For example, a two-dimensional array of physical qubits may be obtained. In some embodiments, the physical qubits may be organized in the shape of a lattice. In these and other embodiments, the physical qubits may be the basic units of quantum information implemented in a physical system. In some embodiments, the physical states of the physical qubits may be initialized. For example, the physical states may be initialized to a |0> state. The initialized physical states may be conditioned using a quantum code.

[0064] In some embodiments, errors in a physical qubit can be detected, for example, any change in a physical state that corresponds to a logical state can be determined using a quantum code.

[0065] In block 406, the physical states of the multiple physical qubits may be adjusted in quantum hardware based on the determined state. For example, quantum information carried by a logical qubit may be encoded across multiple physical qubits. Redundancy across the multiple physical qubits may be used to discriminate between errors in one or more physical qubits. In some embodiments, errors may be addressed by physically adjusting the physical states of the physical qubits using quantum hardware.

[0066] At block 408, one or more computations may be performed using quantum hardware. For example, the quantum hardware may be used to process and / or manipulate quantum information carried by the physical qubits. For example, quantum computations and / or logical operations may be performed using the physical qubits.

[0067] The physical states of the multiple physical qubits may be decoded using a quantum code to determine a logical state, in block 410. In some embodiments, the quantum code may include an algorithm suitable for recovering the logical state from the physical qubits.

[0068] It is understood that for this and other processes, operations, and methods disclosed herein, the functions and / or operations performed may be implemented in differing orders. Moreover, the outlined functions and operations are provided only as examples, and some of the functions and operations may be optional, combined into fewer functions and operations, or expanded into additional functions and operations without detracting from the essence of the disclosed embodiments.

[0069] Modifications, additions, or omissions may be made to method 400 without departing from the scope of the present disclosure. For example, the designation of different elements in the manner described is intended to help explain the concepts described herein and is not limiting. Additionally, method 400 may include any number of other elements or may be implemented in other systems or contexts other than those described.

[0070] 5 illustrates an exemplary computing system 500 in accordance with at least one embodiment of the present disclosure. Computing system 500 may include a processor 510, a memory 520, a data storage 530, and / or a communication unit 540, all of which may be communicatively coupled. In some embodiments, any steps and / or portions of method 200 of FIG. 2 and method 400 of FIG. 4 that are not performed and / or enacted by quantum hardware or a quantum computer may be implemented by a computing system consistent with computing system 500.

[0071] In general, the processor 510 may include any suitable special purpose or general purpose computer, computing entity, or processing device, including various computer hardware or software modules, and may be configured to execute instructions stored on any applicable computer-readable storage medium. For example, the processor 510 may include a microprocessor, a microcontroller, a digital signal processor (DSP), an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), or any other digital or analog circuitry configured to interpret and / or execute program instructions and / or process data.

[0072] 5 as a single processor, it is understood that processor 510 may include any number of processors distributed across any number of networks or physical locations configured to individually or collectively perform any number of operations described in this disclosure. In some embodiments, processor 510 may interpret and / or execute program instructions and / or process data stored in memory 520, data storage 530, or memory 520 and data storage 530. In some embodiments, processor 510 may fetch program instructions from data storage 530 and load the program instructions into memory 520.

[0073] After the program instructions are loaded into memory 520, processor 510 may execute the program instructions, such as instructions for performing method 200 of Figure 2 and method 400 of Figure 4. For example, processor 510 may obtain a first data distribution, simulate a classical circuit corresponding to the first quantum circuit, obtain a noise-free data distribution, determine error mitigation parameters, and / or apply the error mitigation parameters to a second data distribution.

[0074] Memory 520 and data storage 530 may include a computer-readable storage medium or one or more computer-readable storage media for carrying or storing computer-executable instructions or data structures. Such computer-readable storage media may be any available media that can be accessed by a general-purpose or special-purpose computer, such as processor 510. In some embodiments, computing system 500 may or may not include either memory 520 or data storage 530.

[0075] By way of example, and not limitation, such computer-readable storage media may include non-transitory computer-readable storage media including random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), compact disk read-only memory (CD-ROM) or other optical disk storage, magnetic disk storage or other magnetic storage devices, flash memory devices (e.g., solid-state memory devices), or any other storage medium that can be used to store desired program code in the form of computer-executable instructions or data structures and that can be accessed by a general-purpose or special-purpose computer. Combinations of the above may also be included within the scope of computer-readable storage media. Computer-executable instructions may include, for example, instructions and data configured to cause processor 510 to perform a certain operation or group of operations.

[0076] The communication unit 540 may include any component, device, system, or combination thereof configured to transmit or receive information over a network. In some embodiments, the communication unit 540 may communicate with other devices at other locations, at the same location, or even other components in the same system. For example, the communication unit 540 may include a modem, a network card (wireless or wired), an optical communication device, an infrared communication device, a wireless communication device (such as an antenna), and / or a chipset (such as a Bluetooth device, an 802.6 device (e.g., a metropolitan area network (MAN)), a WiFi device, a WiMax device, a cellular communication facility, etc.). The communication unit 540 may enable data to be exchanged with a network and / or any other device or system described in this disclosure. For example, the communication unit 540 may allow the system 500 to communicate with other systems, such as computing devices and / or other networks.

[0077] Those skilled in the art, after reviewing this disclosure, may recognize that modifications, additions, or omissions may be made to system 500 without departing from the scope of the disclosure. For example, system 500 may include more or fewer components than explicitly illustrated and described.

[0078] The foregoing disclosure is not intended to limit the disclosure to the precise form or specific field of use disclosed. Thus, various alternative embodiments and / or modifications to the disclosure are contemplated in light of the disclosure, whether expressly described or implied herein. Although embodiments of the disclosure have been thus described, it will be recognized that changes can be made in form and details without departing from the scope of the disclosure. Thus, the disclosure is limited only by the scope of the claims.

[0079] In some embodiments, the different components, modules, engines, and services described herein may be implemented as objects or processes (e.g., as separate threads) executing on a computing system. Although some of the systems and processes described herein are generally described as being implemented in software (stored and / or executed on general-purpose hardware), specific hardware implementations, or combinations of software and specific hardware implementations, are also possible and contemplated.

[0080] The terms used in this disclosure, and particularly in the appended claims (e.g., the body of the appended claims), are generally intended as "open terms" (e.g., the term "including" should be interpreted as "including, but not limited to").

[0081] Furthermore, if a specific number of claim recitations to be introduced is intended, such intent is expressly stated in the claim, and in the absence of such a statement, no such intent exists. For example, as an aid to understanding, the following appended claims may include the use of the introductory phrases "at least one" and "one or more" to introduce claim recitations. However, the use of such phrases should not be construed to imply that the introduction of a claim recitation with the indefinite article "a" or "an" limits any particular claim that includes such an introduced claim recitation to an embodiment that includes only one such recitation, even if the same claim includes the introductory phrase "one or more" or "at least one" and an indefinite article such as "a" or "an" (e.g., "a" and / or "an" should be construed to mean "at least one" or "one or more"). The same applies to the use of definite articles used to introduce claim recitations.

[0082] In addition, even when a particular number of introduced claim recitations is explicitly recited, one of ordinary skill in the art will recognize that such recitation should be interpreted to mean at least the recited number (e.g., the recitation "two recitations" without other modifiers means at least two recitations, or more than two recitations). Furthermore, when idiomatic expressions similar to "at least one of A, B, and C, etc." or "one or more of A, B, and C, etc." are used, such constructions are generally intended to include A only, B only, C only, both A and B, both A and C, both B and C, or all of A, B, and C, etc.

[0083] Moreover, any disjunctive phrase preceding two or more alternative terms, whether in the present text, claims, or drawings, should be understood to contemplate the possibility of including one of those terms, either of those terms, or both of those terms. For example, the phrase "A or B" should be understood to include the possibilities of "A" or "B" or "A and B."

[0084] All examples and conditional language described in this disclosure are intended for educational purposes to help the reader understand the concepts contributed by the inventor to further the art, and should be interpreted without limitation to such specifically described examples and conditions. Although the embodiments of the present disclosure have been described in detail, various changes, substitutions, and alterations can be made without departing from the spirit and scope of the present disclosure.

[0085] The following supplementary notes are further disclosed regarding the embodiments including the above examples. (Appendix 1) obtaining a logical qubit comprising a logical state; encoding the logical qubits using a quantum code to determine states of a plurality of physical qubits, the quantum code including a first code generated based on a first set of generators and a second code generated based on a second set of generators, the first set of generators and the second set of generators including different cards; adjusting physical states of the plurality of physical qubits in quantum hardware based on the determined states; performing one or more computations using said quantum hardware; and decoding the physical states of the plurality of physical qubits using the quantum code to determine the logical state. method. (Appendix 2) 2. The method of claim 1, wherein a quantum coding rate of the quantum code is selected from a particular subset of potential coding rates, the particular subset being selected such that the quantum coding rate is greater than a coding rate where a first coding rate is equal to 1 minus a second coding rate, the first coding rate being for the first code and the second coding rate being for the second code. (Appendix 3) 3. The method of claim 2, wherein the first coding rate is determined using a dimensionality of the first set of origins, and the second coding rate is determined using a dimensionality of the second set of origins. (Appendix 4) 3. The method of claim 2, wherein the first coding rate is between 0.5 and 1 and the second coding rate is between 0 and 0.5. (Appendix 5) 3. The method of claim 2, wherein the first coding rate is between 0 and 0.5 and the second coding rate is between 0.5 and 1. (Appendix 6) 2. The method of claim 1, wherein the first set of generators and the second set of generators are symmetric subsets of a group. (Appendix 7) 7. The method of claim 6, wherein the group is an infinite group. (Appendix 8) 2. The method of claim 1, wherein the first code includes a bit-flip generator and the second code includes a phase-flip generator. (Appendix 9) 2. The method of claim 1, wherein encoding the logical qubit with the plurality of physical qubits comprises mapping logical qubit logic states of the logical qubit to the plurality of physical qubits. (Appendix 10) One or more non-transitory computer-readable media storing instructions that, when executed by one or more processors, cause a system to perform operations, the operations including: obtaining a logical qubit comprising a logical state; encoding the logical qubits using a quantum code to determine states of a plurality of physical qubits, the quantum code including a first code generated based on a first set of generators and a second code generated based on a second set of generators, the first set of generators and the second set of generators including different cards; adjusting physical states of the plurality of physical qubits in quantum hardware based on the determined states; performing one or more computations using said quantum hardware; and decoding the physical states of the plurality of physical qubits using the quantum code to determine the logical state. One or more non-transitory computer-readable media. (Appendix 11) 11. The one or more non-transitory computer-readable media of claim 10, wherein a quantum coding rate of the quantum code is selected from a particular subset of potential coding rates, the particular subset selected such that the quantum coding rate is greater than a coding rate where a first coding rate is equal to 1 minus a second coding rate, the first coding rate being for the first code and the second coding rate being for the second code. (Appendix 12) 12. The one or more non-transitory computer-readable media of claim 11, wherein the first coding rate is determined using a dimensionality of the first set of origins and the second coding rate is determined using a dimensionality of the second set of origins. (Appendix 13) 12. The one or more non-transitory computer-readable media of claim 11, wherein the first coding rate is between 0.5 and 1 and the second coding rate is between 0 and 0.5. (Appendix 14) 12. The one or more non-transitory computer-readable media of claim 11, wherein the first coding rate is between 0 and 0.5 and the second coding rate is between 0.5 and 1. (Appendix 15) 11. The one or more non-transitory computer-readable media of claim 10, wherein the first set of generators and the second set of generators are symmetric subsets of a group. (Appendix 16) 16. The one or more non-transitory computer-readable media of claim 15, wherein the group is an infinite group. (Appendix 17) 11. The one or more non-transitory computer-readable media of claim 10, wherein the first code includes a bit-flip generator and the second code includes a phase-flip generator. (Appendix 18) 11. The one or more non-transitory computer-readable media of claim 10, wherein encoding the logical qubit with the plurality of physical qubits comprises mapping a logical qubit logic state of the logical qubit to the plurality of physical qubits. (Appendix 19) one or more processors; and one or more non-transitory computer-readable storage media configured to store instructions that, in response to being executed, cause the system to perform an operation, the operation comprising: obtaining a logical qubit comprising a logical state; encoding the logical qubits using a quantum code to determine states of a plurality of physical qubits, the quantum code including a first code generated based on a first set of generators and a second code generated based on a second set of generators, the first set of generators and the second set of generators including different cards; adjusting physical states of the plurality of physical qubits in quantum hardware based on the determined states; performing one or more computations using said quantum hardware; and decoding the physical states of the plurality of physical qubits using the quantum code to determine the logical state. system. (Appendix 20) 20. The system of claim 19, wherein a quantum coding rate of the quantum code is selected from a particular subset of potential coding rates, the particular subset being selected such that the quantum coding rate is greater than a coding rate where a first coding rate is equal to 1 minus a second coding rate, the first coding rate being for the first code and the second coding rate being for the second code. [Explanation of symbols]

[0086] 110 Logical Qubits 120 Encoder 125 Physics Qubits 130 Quantum Hardware 135 Error-corrected physical qubits 140 Decoder 145 Logic States Obtain an infinite family of 202 groups 204 Determine the first and second generating sets from an infinite family of groups 206 Define the first classical code and the second classical code from the first generating set and the second generating set, respectively. 208 Define the first tensor code and the second tensor code from the first classical code and the second classical code 210 Construct a bit-flip generator using the first tensor code, and a phase-flip generator from the second tensor code. 212 Construct a first Tanner code from a first graph and a first tensor code, and a second Tanner code from a second graph and a second tensor code. 214 Determine a quantum code based on a first Tanner code and a second Tanner code Obtain a logical qubit containing 402 logical states 404 Encode logical qubits using quantum codes to determine the state of multiple physical qubits 406 Adjust the physical states of multiple physical qubits in quantum hardware based on the determined state 408 Use quantum hardware to perform one or more calculations 410 Decode the physical state of multiple physical qubits using quantum codes to determine their logical state 500 Systems 510 Processor 520 Memory 530 Data Storage 540 Communication Unit

Claims

1. obtaining a logical qubit comprising a logical state; encoding the logical qubits using a quantum code to determine states of a plurality of physical qubits, the quantum code including a first code generated based on a first set of generators and a second code generated based on a second set of generators, the first set of generators and the second set of generators including different cards; adjusting physical states of the plurality of physical qubits in quantum hardware based on the determined states; performing one or more computations using said quantum hardware; and decoding the physical states of the plurality of physical qubits using the quantum code to determine the logical state. method.

2. 2. The method of claim 1 , wherein a quantum coding rate of the quantum code is selected from a particular subset of potential coding rates, the particular subset being selected such that the quantum coding rate is greater than a coding rate where a first coding rate is equal to 1 minus a second coding rate, the first coding rate being for the first code and the second coding rate being for the second code.

3. 3. The method of claim 2, wherein the first coding rate is determined using a dimensionality of the first set of generators and the second coding rate is determined using a dimensionality of the second set of generators.

4. The method of claim 2 , wherein the first coding rate is between 0.5 and 1 and the second coding rate is between 0 and 0.

5.

5. The method of claim 2 , wherein the first coding rate is between 0 and 0.5 and the second coding rate is between 0.5 and 1.

6. The method of claim 1 , wherein the first set of generators and the second set of generators are symmetric subsets of a group.

7. The method of claim 6 , wherein the group is an infinite group.

8. 2. The method of claim 1, wherein the first code includes a bit-flip generator and the second code includes a phase-flip generator.

9. 2. The method of claim 1, wherein encoding the logical qubit with the plurality of physical qubits comprises mapping a logical qubit logic state of the logical qubit to the plurality of physical qubits.

10. One or more non-transitory computer-readable media storing instructions that, when executed by one or more processors, cause a system to perform operations, the operations including: obtaining a logical qubit comprising a logical state; encoding the logical qubits using a quantum code to determine states of a plurality of physical qubits, the quantum code including a first code generated based on a first set of generators and a second code generated based on a second set of generators, the first set of generators and the second set of generators including different cards; adjusting physical states of the plurality of physical qubits in quantum hardware based on the determined states; performing one or more computations using said quantum hardware; and decoding the physical states of the plurality of physical qubits using the quantum code to determine the logical state. One or more non-transitory computer-readable media.

11. 11. The one or more non-transitory computer-readable media of claim 10, wherein a quantum coding rate of the quantum code is selected from a particular subset of potential coding rates, the particular subset being selected such that the quantum coding rate is greater than a coding rate where a first coding rate is equal to 1 minus a second coding rate, the first coding rate being for the first code and the second coding rate being for the second code.

12. 12. The one or more non-transitory computer-readable media of claim 11, wherein the first coding rate is determined using a dimensionality of the first set of origins and the second coding rate is determined using a dimensionality of the second set of origins.

13. 12. The one or more non-transitory computer-readable media of claim 11, wherein the first coding rate is between 0.5 and 1 and the second coding rate is between 0 and 0.

5.

14. 12. The one or more non-transitory computer-readable media of claim 11, wherein the first coding rate is between 0 and 0.5 and the second coding rate is between 0.5 and 1.

15. 11. The one or more non-transitory computer-readable media of claim 10, wherein the first set of generators and the second set of generators are symmetric subsets of a group.

16. 16. The one or more non-transitory computer-readable media of claim 15, wherein the group is an infinite group.

17. 11. The one or more non-transitory computer-readable media of claim 10, wherein the first code includes a bit flip generator and the second code includes a phase flip generator.

18. 11. The one or more non-transitory computer-readable media of claim 10, wherein encoding the logical qubit with the plurality of physical qubits comprises mapping a logical qubit logic state of the logical qubit to the plurality of physical qubits.

19. one or more processors; and one or more non-transitory computer-readable storage media configured to store instructions that, in response to being executed, cause the system to perform operations, the operations including: obtaining a logical qubit comprising a logical state; encoding the logical qubits using a quantum code to determine states of a plurality of physical qubits, the quantum code including a first code generated based on a first set of generators and a second code generated based on a second set of generators, the first set of generators and the second set of generators including different cards; adjusting physical states of the plurality of physical qubits in quantum hardware based on the determined states; performing one or more computations using said quantum hardware; and decoding the physical states of the plurality of physical qubits using the quantum code to determine the logical state. system.

20. 20. The system of claim 19, wherein a quantum coding rate of the quantum code is selected from a particular subset of potential coding rates, the particular subset being selected such that the quantum coding rate is greater than a coding rate where a first coding rate is equal to 1 minus a second coding rate, the first coding rate being for the first code and the second coding rate being for the second code.

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