Displace device and repair method for the same

Abstract

To provide a display device and a repair method for the same.SOLUTION: The display device may include: a substrate in which a light emission region and a non-light emission region are defined; first, second and third alignment electrodes which are arranged sequentially in a first direction; first light emitting elements disposed between the first alignment electrode and the second alignment electrode; and a second light emitting elements disposed between the second alignment electrode and the third alignment electrode; a first electrode electrically connected to respective first ends of the first and second light emitting elements; and a second electrode electrically connected to respective second ends of the first and second light emitting elements. The light emission region may include a first region, a third region, and a second region demarcated in a second direction intersecting a first direction. In a plan view, the first region may be an upper edge of the light emission region, the second region may be a lower edge of the light emission region, and the third region may be a middle part of the light emission region. The first electrode may be located in the first region and the second region and disconnected in the third region.SELECTED DRAWING: Figure 6

Description

[Technical field]

[0001] The present invention relates to a display device and a repair method thereof. [Background technology]

[0002] 2. Description of the Related Art In recent years, as interest in information displays has increased, research and development into display devices has been continuously carried out. [Prior art documents] [Patent documents]

[0003] [Patent Document 1] Korean Patent Publication No. 2021-0132260 [Patent Document 2] Korean Patent Publication No. 2020-0085977 [Patent Document 3] Korean Patent Publication No. 2020-0098767 Summary of the Invention [Problem to be solved by the invention]

[0004] Advantageous Effects of Invention The present invention provides a display device and a repair method thereof capable of preventing black dot defects and improving reliability. [Means for solving the problem]

[0005] According to an embodiment, the display device may include a substrate having a light-emitting region and a non-light-emitting region defined therein, first, second and third alignment electrodes sequentially arranged in a first direction, a first light-emitting element disposed between the first alignment electrode and the second alignment electrode, a second light-emitting element disposed between the second alignment electrode and the third alignment electrode, a first electrode electrically connected to a first end of each of the first and second light-emitting elements, and a second electrode electrically connected to a second end of each of the first and second light-emitting elements. The light-emitting region may include a first region, a third region and a second region partitioned in a second direction intersecting with the first direction. In a plan view, the first region may be an upper region of the light-emitting region, the second region may be a lower region of the light-emitting region, and the third region may be a central region of the light-emitting region. The first electrode may be located in the first region and the second region, and may be disconnected in the third region.

[0006] In the embodiment, the second electrode may be located in the first region, the second region, and the third region, and the first electrode may not be located in the third region.

[0007] In the embodiment, the first electrode may include a first pixel electrode and a third pixel electrode spaced apart from each other. The second electrode may include a second pixel electrode and a fourth pixel electrode spaced apart from each other. At least in the light emitting region, the first pixel electrode, the second pixel electrode, the fourth pixel electrode, and the third pixel electrode may be arranged in this order along the first direction.

[0008] In the embodiment, the first pixel electrode may include a 1-1 pixel electrode located in the first region and a 1-2 pixel electrode located in the second region. The second pixel electrode may include a 2-1 pixel electrode located in the first region, a 2-2 pixel electrode located in the second region, and a 2-3 pixel electrode located in the third region. The third pixel electrode may include a 3-1 pixel electrode located in the first region and a 3-2 pixel electrode located in the second region. The fourth pixel electrode may include a 4-1 pixel electrode located in the first region, a 4-2 pixel electrode located in the second region, and a 4-3 pixel electrode located in the third region.

[0009] In the embodiment, the 1-1 pixel electrode and the 1-2 pixel electrode may be disposed apart from each other, and the 3-1 pixel electrode and the 3-2 pixel electrode may be disposed apart from each other.

[0010] In an embodiment, the 2-3 pixel electrode may have a narrower width in the first direction than the 2-1 pixel electrode and the 2-2 pixel electrode, and the 4-3 pixel electrode may have a narrower width in the first direction than the 4-1 pixel electrode and the 4-2 pixel electrode.

[0011] In the embodiment, the display device may further include a contact electrode located in the non-light-emitting region and connecting the 2-1st pixel electrode and the 3-1st pixel electrode.

[0012] In the embodiment, the display device may further include a first sub-electrode located in the non-light-emitting region and electrically connected to the first pixel electrode, and a second sub-electrode located in the non-light-emitting region and electrically connected to the third pixel electrode. The first sub-electrode may include a 1-1 sub-electrode electrically connected to the 1-1 pixel electrode, a 1-2 sub-electrode electrically connected to the 1-2 pixel electrode, and a 1-3 sub-electrode connecting the 1-1 sub-electrode and the 1-2 sub-electrode. The second sub-electrode may include a 2-1 sub-electrode electrically connected to the 3-1 pixel electrode, a 2-2 sub-electrode electrically connected to the 3-2 pixel electrode, and a 2-3 sub-electrode connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

[0013] In an embodiment, the 1-3 sub electrode may have a narrower width in the first direction than the 1-1 sub electrode and the 1-2 sub electrode, and the 2-3 sub electrode may have a narrower width in the first direction than the 2-1 sub electrode and the 2-2 sub electrode.

[0014] In the embodiment, the first light-emitting element may include a 1a light-emitting element located in the first region and electrically connected to the 1-1 and 2-1 pixel electrodes, and a 1b light-emitting element located in the second region and electrically connected to the 1-2 and 2-2 pixel electrodes. The second light-emitting element may include a 2a light-emitting element located in the first region and electrically connected to the 3-1 and 4-1 pixel electrodes, and a 2b light-emitting element located in the second region and electrically connected to the 3-2 and 4-2 pixel electrodes.

[0015] In the embodiment, each of the 1a, 1b, 2a, and 2b light-emitting elements may include a second semiconductor layer located at the first end, a first semiconductor layer located at the second end, and an active layer located between the first semiconductor layer and the second semiconductor layer. The first semiconductor layer may be an n-type semiconductor layer, and the second semiconductor layer may be a p-type semiconductor layer.

[0016] In the embodiment, the display device may further include a color conversion layer disposed on the first and second light emitting elements, and a color filter layer disposed on the color conversion layer.

[0017] A display device according to an embodiment may include a substrate having a light-emitting region and a non-light-emitting region defined therein, the light-emitting region including a first region, a third region, and a second region partitioned along a second direction, first, second, and third alignment electrodes sequentially arranged in a first direction intersecting the second direction, a light-emitting element disposed between the first and third alignment electrodes, a first pixel electrode, a second pixel electrode, a fourth pixel electrode, and a third pixel electrode sequentially arranged along the first direction in at least the light-emitting region, a first sub-electrode located in the non-light-emitting region and electrically connected to the first pixel electrode, and a second sub-electrode located in the non-light-emitting region and electrically connected to the third pixel electrode. Each of the first, second, third, and fourth pixel electrodes may include a first portion located in the first region and a second portion located in the second region. The first sub-electrode may include a 1-1 sub-electrode electrically connected to the first portion of the first pixel electrode, and a 1-2 sub-electrode electrically connected to the second portion of the first pixel electrode. The second sub-electrode may include a 2-1 sub-electrode electrically connected to the first portion of the third pixel electrode and a 2-2 sub-electrode electrically connected to the second portion of the third pixel electrode. Each of the first and third pixel electrodes may be disconnected in the third region.

[0018] In an embodiment, the second pixel electrode may be disconnected in the third region. The fourth pixel electrode may be located in the third region and include a third portion connecting the first portion and the second portion. The first sub-electrode may include a 1-3 sub-electrode connecting the 1-1 sub-electrode and the 1-2 sub-electrode. The second sub-electrode may include a 2-3 sub-electrode connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

[0019] In the embodiment, the third region may include a dummy pattern located between the first portion of the second pixel electrode and the second portion of the second pixel electrode and spaced apart from the first and second portions.

[0020] In an embodiment, the fourth pixel electrode may be disconnected in the third region. The second pixel electrode may be located in the third region and include a third portion connecting the first portion and the second portion. The first sub-electrode may include a 1-3 sub-electrode connecting the 1-1 sub-electrode and the 1-2 sub-electrode. The second sub-electrode may include a 2-3 sub-electrode connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

[0021] In an embodiment, each of the second and fourth pixel electrodes may be located in the third region and may include a third portion connecting the first portion and the second portion. The first sub-electrode may include a 1-3 sub-electrode connecting the 1-1 sub-electrode and the 1-2 sub-electrode. The 2-1 sub-electrode and the 2-2 sub-electrode may be disposed separately and electrically isolated.

[0022] In an embodiment, each of the second and fourth pixel electrodes may be located in the third region and may include a third portion connecting the first portion and the second portion. The second sub-electrode may include a 2-3 sub-electrode connecting the 2-1 sub-electrode and the 2-2 sub-electrode. The 1-1 sub-electrode and the 1-2 sub-electrode may be disposed apart from each other and electrically isolated from each other.

[0023] In a method for repairing a display device according to an embodiment, the display device may include a substrate having a light-emitting region and a non-light-emitting region defined therein, the light-emitting region including a first region, a third region, and a second region partitioned in a second direction, first, second, and third alignment electrodes sequentially arranged in a first direction intersecting the second direction, a plurality of light-emitting elements disposed between the first to third alignment electrodes, a first electrode electrically connected to a first end of each of the light-emitting elements and disconnected in the third region, and a second electrode electrically connected to a second end of each of the light-emitting elements and located in the first to third regions. The repair method may include separating one of the first and second electrodes electrically connected to a normal light-emitting element among the light-emitting elements from one of the first and second electrodes electrically connected to a defective light-emitting element.

[0024] In an embodiment, one of the first and second electrodes electrically connected to the normal light-emitting element may be located in the same column in the second direction as one of the first and second electrodes electrically connected to the defective light-emitting element. Effect of the Invention

[0025] According to the display device and the repair method thereof according to the embodiment, even if a black dot defect occurs in each pixel, the black dot defect can be easily repaired, thereby improving the reliability of the display device.

[0026] According to the display device and the repair method thereof, even if a defective light emitting element is arranged in each pixel, the defective light emitting element can be easily repaired and each pixel can be normally driven using the remaining light emitting elements.

[0027] The effects of the embodiments are not limited to the above examples, and various other effects may be included in this specification. [Brief description of the drawings]

[0028] [Figure 1] 1 is a schematic perspective view illustrating a light emitting device according to an embodiment. [Diagram 2] 2 is a schematic cross-sectional view of the light-emitting element of FIG. 1. [Diagram 3]1 is a schematic plan view showing a display device according to an embodiment. [Figure 4] FIG. 4 is a schematic cross-sectional view showing the display panel of FIG. [Diagram 5] 4 is a schematic circuit diagram showing electrical connections between components included in the pixel of FIG. 3. [Figure 6] 2 is a schematic plan view illustrating a display element layer of a pixel according to an embodiment. [Figure 7] 7 is a schematic plan view showing a first bank, first and second electrodes, and a light-emitting element included in the pixel of FIG. 6. [Figure 8] FIG. 7 is a schematic cross-sectional view taken along line I-I' in FIG. [Figure 9] FIG. 7 is a schematic cross-sectional view taken along line I-I' in FIG. [Figure 10] FIG. 7 is a schematic cross-sectional view taken along line I-I' in FIG. [Figure 11] 7 is a schematic cross-sectional view taken along line II-II' in FIG. [Figure 12] 7 is a schematic cross-sectional view showing a pixel according to an embodiment, taken along line II' in FIG. 6. [Figure 13] 7 is a schematic plan view showing the state of the pixel in FIG. 6 after it has been repaired. FIG. [Figure 14] 7 is a schematic plan view showing the state of the pixel in FIG. 6 after it has been repaired. FIG. [Figure 15] 14 is a schematic cross-sectional view taken along line III-III' in FIG. 13. [Figure 16] 7 is a schematic plan view showing the state of the pixel in FIG. 6 after it has been repaired. FIG. [Figure 17] 17 is a schematic cross-sectional view taken along line IV-IV' in FIG. 16. [Figure 18] 7 is a schematic plan view showing the state of the pixel in FIG. 6 after it has been repaired. FIG. [Figure 19] 19 is a schematic cross-sectional view taken along line VV' in FIG. 18. [Figure 20] 7 is a schematic plan view showing the state of the pixel in FIG. 6 after it has been repaired. FIG. [Figure 21] 21 is a schematic cross-sectional view taken along line VI-VI' in FIG. 20. DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

[0029] Since the present invention can be modified in various ways and can have various forms, specific embodiments are illustrated in the drawings and described in detail in the text, but it is not intended to limit the present invention to the specific disclosed forms, and it should be understood that the present invention includes all modifications, equivalents, and alternatives falling within the technical scope of the present invention.

[0030] In describing the various drawings, like reference numerals are used for like elements. In the accompanying drawings, the dimensions of structures are exaggerated for clarity of the present invention. Terms such as first and second may be used to describe various elements, but the elements should not be limited by the terms. The terms are used only to distinguish one element from another element. For example, the first element may be referred to as the second element, and similarly, the second element may be referred to as the first element, without departing from the scope of the present invention.

[0031] In this application, the terms "comprise" or "have" and the like are used to specify the presence of a feature, number, step, operation, component, part, or combination thereof described in the specification, and are not to be understood as precluding the presence or addition of one or more other features, numbers, steps, operations, components, parts, or combinations thereof. In addition, when a layer, film, region, plate, or other part is said to be "on" another part, it includes not only the case where it is "directly on" the other part, but also the case where there is another part in between. In addition, when a layer, film, region, plate, or other part is said to be formed on another part, the direction of formation is not limited to the upper direction, but also includes the case where it is formed on the side or lower direction. Conversely, when a layer, film, region, plate, or other part is said to be "under" another part, it includes not only the case where it is "directly under" the other part, but also the case where there is another part in between.

[0032] Hereinafter, preferred embodiments of the present invention and other matters necessary for those skilled in the art to easily understand the contents of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the singular expression includes the plural expression unless the context clearly includes only the singular.

[0033] FIG. 1 is a schematic perspective view showing a light-emitting element LD according to an embodiment, and FIG. 2 is a schematic cross-sectional view of the light-emitting element LD of FIG.

[0034] 1 and 2, the light emitting device LD may include a first semiconductor layer 11, a second semiconductor layer 13, and an active layer 12 interposed between the first semiconductor layer 11 and the second semiconductor layer 13. For example, the light emitting device LD may be embodied as a light emitting stack (or a light emitting stack pattern) in which the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13 are sequentially stacked. However, the type and / or shape of the light emitting device LD is not limited to the embodiment shown in FIG.

[0035] The light emitting element LD may be provided in a shape extending in one direction. If the extension direction of the light emitting element LD is the longitudinal direction, the light emitting element LD may include a first end EP1 and a second end EP2 facing each other along the longitudinal direction. The second semiconductor layer 13 may be located at the first end EP1 of the light emitting element LD, and the first semiconductor layer 11 may be located at the second end EP2 of the light emitting element LD, but is not limited thereto.

[0036] The light emitting element LD may have various shapes. For example, the light emitting element LD may be a rod, bar, or column that is long in the longitudinal direction (for example, the aspect ratio is greater than 1) as shown in Fig. 1. The light emitting element LD may include a light emitting diode (LED) that is fabricated to be extremely small, having a diameter D and / or a length L on the order of nano scale (or nanometer) to micro scale (or micrometer).

[0037] When the light-emitting element LD is long in the longitudinal direction, the diameter D of the light-emitting element LD may be about 0.5 μm to 6 μm, and the length L of the light-emitting element LD may be about 1 μm to 10 μm. However, the diameter D and length L of the light-emitting element LD are not limited to these values, and the size of the light-emitting element LD may be changed to suit the required conditions (or design conditions) of the lighting device or self-luminous display device to which the light-emitting element LD is applied.

[0038] The first semiconductor layer 11 may include, for example, at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may be an n-type semiconductor layer including any one of semiconductor materials of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and doped with a first conductive dopant (or an n-type dopant) such as Si, Ge, or Sn. However, the material constituting the first semiconductor layer 11 is not limited thereto, and the first semiconductor layer 11 may be composed of various other materials.

[0039] The active layer 12 (or light emitting layer) is disposed on the first semiconductor layer 11 and may be formed with a single or multiple quantum wells structure. For example, when the active layer 12 is formed with a multiple quantum wells structure, the active layer 12 may be formed by periodically and repeatedly stacking a barrier layer, a strain reinforcing layer, and a well layer as one unit. However, the structure of the active layer 12 is not limited to the above embodiment.

[0040] The active layer 12 may emit light having a wavelength of 400 nm to 900 nm, and may have a double hetero structure. In an embodiment, a clad layer doped with a conductive dopant may be formed on the upper and / or lower parts of the active layer 12 along the longitudinal direction of the light emitting device LD. For example, the clad layer may be an AlGaN layer or an InAlGaN layer. Depending on the embodiment, materials such as AlGaN and InAlGaN may be used to form the active layer 12, and various other materials may be used to form the active layer 12.

[0041] When an electric field of a predetermined voltage or more is applied to both ends of the light-emitting element LD, electron-hole pairs are combined in the active layer 12, causing the light-emitting element LD to emit light. By controlling the light emission of the light-emitting element LD using such a principle, the light-emitting element LD can be used as a light source (or light emission source) of various light-emitting devices including pixels of a display device.

[0042] The second semiconductor layer 13 is disposed on the active layer 12 and may include a semiconductor layer of a different type from the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer. For example, the second semiconductor layer 13 may include at least one semiconductor material of InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include a p-type semiconductor layer doped with a dopant of second conductivity (or a p-type dopant) such as Mg, Zn, Ca, Sr, or Ba. However, the material constituting the second semiconductor layer 13 is not limited to this, and various other materials may be used to constitute the second semiconductor layer 13.

[0043] The first semiconductor layer 11 and the second semiconductor layer 13 may have different thicknesses in the longitudinal direction of the light emitting device LD. For example, the first semiconductor layer 11 may have a relatively thicker thickness than the second semiconductor layer 13 along the longitudinal direction of the light emitting device LD, but is not limited thereto.

[0044] 1 and 2, the first semiconductor layer 11 and the second semiconductor layer 13 are each formed of one layer, but are not limited thereto. In an embodiment, depending on the material of the active layer 12, each of the first semiconductor layer 11 and the second semiconductor layer 13 may further include at least one layer, for example, a cladding layer and / or a tensile strain barrier reducing (TSBR) layer.

[0045] Depending on the embodiment, the light emitting element LD may further include a contact electrode (hereinafter referred to as a "first contact electrode") disposed on the upper portion of the second semiconductor layer 13, in addition to the above-mentioned first semiconductor layer 11, active layer 12, and second semiconductor layer 13. In other embodiments, the light emitting element LD may further include another contact electrode (hereinafter referred to as a "second contact electrode") disposed on one end of the first semiconductor layer 11.

[0046] Each of the first and second contact electrodes may be, but is not limited to, an ohmic contact electrode. Depending on the embodiment, the first and second contact electrodes may be a Schottky contact electrode.

[0047] The materials contained in the first and second contact electrodes may be the same or different. The first and second contact electrodes may be substantially transparent or semi-transparent.

[0048] In the embodiment, the light-emitting element LD may further include an insulating film 14. However, depending on the embodiment, the insulating film 14 may be omitted, or may be provided so as to cover only a part of the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13.

[0049] The insulating film 14 can prevent electrical short circuiting that may occur when the active layer 12 comes into contact with conductive materials other than the first and second semiconductor layers 11 and 13. In addition, the insulating film 14 can minimize surface defects of the light emitting device LD to improve the life and light emitting efficiency of the light emitting device LD. In addition, when a plurality of light emitting devices LD are closely arranged, the insulating film 14 can prevent undesired short circuiting that may occur between the light emitting devices LD. As long as it is possible to prevent a short circuit between the active layer 12 and an external conductive material, the insulating film 14 may or may not be provided.

[0050] The insulating film 14 may be provided in a form that entirely surrounds the outer periphery of the light emitting stack including the first semiconductor layer 11, the active layer 12, and the second semiconductor layer 13, but is not limited thereto.

[0051] The insulating film 14 may include a transparent insulating material. Various materials having insulating properties may be used as the material of the insulating film 14. The insulating film 14 may be provided in the form of a single layer or in the form of multiple layers including a double layer.

[0052] Depending on the embodiment, the light emitting device LD may be embodied as a light emitting pattern having a core-shell structure.

[0053] The light emitting element LD described above may be used as a light source (or a light source) of various display devices. The light emitting element LD can be manufactured through a surface treatment process.

[0054] FIG. 3 is a schematic plan view showing a display device DD according to an embodiment, and FIG. 4 is a schematic cross-sectional view showing a display panel DP of FIG.

[0055] For the sake of convenience, FIGS. 3 and 4 simply show the structure of the display panel DP provided in the display device DD, with the display area DA in which images are displayed at the center.

[0056] 1 to 4, the display device DD according to the embodiment can be classified into a passive matrix type display device and an active matrix type display device according to a method of driving the light emitting element LD. For example, when the display device DD is embodied as an active matrix type, each of the pixels PXL can include a driving transistor for controlling the amount of current supplied to the light emitting element LD and a switching transistor for transmitting a data signal to the driving transistor.

[0057] The display panel DP (or the display device DD) may be provided in various shapes, for example, the display panel DP may be provided in a rectangular plate shape having two pairs of parallel sides, but is not limited thereto. When the display panel DP is provided in a rectangular plate shape, one pair of the two pairs of sides may be longer than the other pair of sides. In FIG. 3, the extension direction of the short sides is indicated as a first direction DR1, and the extension direction of the long sides is indicated as a second direction DR2.

[0058] At least a portion of the display panel DP may have flexibility, and the flexible portion may be folded, but is not limited thereto.

[0059] The display panel DP is capable of displaying an image, and may be a self-emissive display panel or a non-emissive display panel.

[0060] The display panel DP may include a substrate SUB and pixels PXL provided on the substrate SUB.

[0061] The substrate SUB may be made of, but is not limited to, a transparent insulating material to allow light to pass through, and may be a rigid substrate or a flexible substrate.

[0062] The rigid substrate may be, for example, one of a glass substrate, a quartz substrate, a glass-ceramic substrate, and a crystalline glass substrate.

[0063] The flexible substrate may be one of a film substrate containing a polymer organic material and a plastic substrate. For example, the flexible substrate may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, triacetate cellulose, and cellulose acetate propionate.

[0064] One area of ​​the substrate SUB may be provided as a display area DA in which the pixels PXL are arranged, and the remaining area of ​​the substrate SUB may be provided as a non-display area NDA. For example, the substrate SUB may include a display area DA including a pixel area PXA in which the pixels PXL are arranged, and a non-display area NDA arranged around (or adjacent to) the display area DA.

[0065] The non-display area NDA may be located adjacent to the display area DA. The non-display area NDA may be provided on at least one side of the display area DA. For example, the non-display area NDA may surround (or the extreme edge of) the display area DA. The non-display area NDA may be provided with wiring parts connected to each pixel PXL and driving parts connected to the wiring parts for driving the pixels PXL.

[0066] A plurality of pixels PXL may be provided and arranged in a matrix along pixel rows extending in a first direction DR1 and pixel columns extending in a second direction DR2 intersecting the first direction DR1. The arrangement of the pixels PXL is not particularly limited, and the pixels PXL may be arranged in various forms. When a plurality of pixels PXL are provided according to an embodiment, the pixels PXL may be arranged to have different areas (or sizes). For example, when the pixels PXL emit different colors of light, the pixels PXL for each color may have different areas (or sizes) or be arranged in different shapes.

[0067] The driving unit can provide a predetermined signal and a predetermined voltage to each pixel PXL through the wiring unit to control driving of the pixel PXL.

[0068] The display panel DP (or each of the pixels PXL) may include a pixel circuit layer PCL, a display element layer DPL, and an optical layer LCL located on a substrate SUB.

[0069] The pixel circuit layer PCL is provided on a substrate SUB and may include a transistor and a signal wiring connected to the transistor. For example, the transistor may be in a form in which an active pattern (or a semiconductor pattern), a gate electrode, a source electrode, and a drain electrode are sequentially laminated with an insulating layer sandwiched therebetween. The semiconductor pattern may include amorphous silicon, polysilicon, low temperature polysilicon, an organic semiconductor, and / or an oxide semiconductor. The gate electrode, the source electrode, and the drain electrode may include one of aluminum (Al), copper (Cu), titanium (Ti), and molybdenum (Mo), but are not limited thereto. The pixel circuit layer PCL may also include at least one insulating layer.

[0070] A display element layer DPL may be disposed on the pixel circuit layer PCL. A light emitting unit (see "EMU" in FIG. 5) including a light emitting element LD for emitting light may be located on the display element layer DPL. An electrode electrically connected to the light emitting element LD may be disposed on the light emitting unit EMU. A detailed description of the configuration of each pixel PXL will be given later.

[0071] Each pixel PXL may include at least one light emitting element LD driven by corresponding scanning signals and data signals. The light emitting element LD may be small in size, such as nanoscale (or nanometer) to microscale (or micrometer), and may be connected in parallel with adjacent light emitting elements, but is not limited thereto. The light emitting element LD may constitute a light source for each pixel PXL.

[0072] An optical layer LCL may be disposed on the display element layer DPL. The optical layer LCL converts light emitted from the light emitting element LD into light having excellent color reproducibility and emits the light, thereby improving the light output efficiency of each pixel PXL. Depending on the embodiment, the optical layer LCL may include, but is not limited to, a color conversion layer and a color filter.

[0073] FIG. 5 is a schematic circuit diagram showing the electrical connections of the components included in the pixel PXL of FIG.

[0074] For example, Fig. 5 shows electrical connections of components included in a pixel PXL that can be applied to an active matrix display device according to an embodiment, but the connections of the components of each pixel PXL are not limited thereto.

[0075] 1 to 5, the pixel PXL may include a light emitting unit EMU that generates light having a luminance corresponding to a data signal, and may include a pixel circuit PXC for driving the light emitting unit EMU.

[0076] The light emitting unit EMU may include, for example, a first pixel electrode PE1 electrically connected to a first driving power supply VDD via a pixel circuit PXC and a first power supply wiring PL1, a fourth pixel electrode PE4 electrically connected to a second driving power supply VSS via a second power supply wiring PL2, and a plurality of light emitting elements LD electrically connected between the first pixel electrode PE1 and the fourth pixel electrode PE4. The first driving power supply VDD and the second driving power supply VSS may have different potentials so that the light emitting elements LD can emit light. For example, the first driving power supply VDD may be set to a high potential power supply, and the second driving power supply VSS may be set to a low potential power supply.

[0077] In the embodiment, the light emitting unit EMU may include at least one series end. Each series end may include a pair of electrodes (e.g., first and second electrodes) and at least one light emitting element LD electrically connected in the forward direction between the pair of electrodes. In the embodiment, the number of series ends constituting the light emitting unit EMU and the number of light emitting elements LD constituting each series end are not limited. For example, the number of light emitting elements LD constituting each series end may be the same or different, and the number of light emitting elements LD is not particularly limited.

[0078] The light emitting unit EMU may include, for example, a first series end SET1 including at least one first light emitting element LD1, and a second series end SET2 including at least one second light emitting element LD2.

[0079] The first series end SET1 may include a first pixel electrode PE1 (or a first electrode) and a second pixel electrode (or a second electrode), and at least one first light emitting element LD1 electrically connected between the first pixel electrode PE1 and the second pixel electrode PE2. Each of the first light emitting elements LD1 may be forwardly connected between the first pixel electrode PE1 and the second pixel electrode PE2. For example, a first end EP1 of the first light emitting element LD1 may be electrically connected to the first pixel electrode PE1, and a second end EP2 of the first light emitting element LD1 may be electrically connected to the second pixel electrode PE2.

[0080] The second series end SET2 may include a third pixel electrode PE3 (or a first electrode) and a fourth pixel electrode PE4 (or a second electrode), and at least one second light-emitting element LD2 electrically connected between the third pixel electrode PE3 and the fourth pixel electrode PE4. Each second light-emitting element LD2 may be forwardly connected between the third pixel electrode PE3 and the fourth pixel electrode PE4. For example, a first end EP1 of the second light-emitting element LD2 may be electrically connected to the third pixel electrode PE3, and a second end EP2 of the second light-emitting element LD2 may be electrically connected to the fourth pixel electrode PE4.

[0081] The first series end SET1 and the second series end SET2 may be connected in series via a contact electrode CNE.

[0082] The first pixel electrode PE1 and the third pixel electrode PE3 electrically connected to the first end of the light-emitting element LD at each series end can be the first electrode of the corresponding series end (see "EL1" in Figure 6), and the second pixel electrode PE2 and the fourth pixel electrode PE4 electrically connected to the second end of the light-emitting element LD at each series end can be the second electrode of the corresponding series end (see "EL2" in Figure 6).

[0083] The first electrode of the light emitting unit EMU, for example the first pixel electrode PE1, may be the anode of the light emitting unit EMU. The last electrode of the light emitting unit EMU, for example the fourth pixel electrode PE4, may be the cathode.

[0084] When the light emitting elements LD are connected in a series / parallel structure, power efficiency can be improved compared to when the same number of light emitting elements LD are connected only in parallel. Also, in a pixel PXL in which the light emitting elements LD are connected in a series / parallel structure, a predetermined luminance can be expressed through some of the light emitting elements LD at the series end, so that the possibility of black spot defects in the pixel PXL can be reduced. However, the present invention is not limited to this, and the light emitting unit EMU may be configured by connecting the light emitting elements LD only in series, or may be configured by connecting the light emitting elements LD only in parallel.

[0085] The light-emitting element LD may include a first end EP1 (e.g., a p-type end) electrically connected to a first driving power supply VDD via at least one electrode (e.g., a first pixel electrode PE1), a pixel circuit PXC and / or a first power supply wiring PL1, etc., and a second end EP2 (e.g., an n-type end) electrically connected to a second driving power supply VSS via at least one electrode (e.g., a fourth pixel electrode PE4) and a second power supply wiring PL2, etc. For example, the light-emitting element LD may be electrically connected in the forward direction between the first driving power supply VDD and the second driving power supply VSS. The light-emitting element LD electrically connected in the forward direction can constitute an effective light source of the light-emitting unit EMU.

[0086] Depending on the embodiment, the light emitting unit EMU may further include at least one backward light emitting element LDr in addition to the light emitting element LD constituting each effective light source.

[0087] The light emitting element LD of the light emitting unit EMU can emit light with a luminance corresponding to a driving current supplied via a corresponding pixel circuit PXC. For example, during each frame period, the pixel circuit PXC can supply a driving current corresponding to a gray scale value of corresponding frame data to the light emitting unit EMU. The driving current supplied to the light emitting unit EMU can be divided and flowed to each of the light emitting elements LD. As a result, each light emitting element LD can emit light with a luminance corresponding to the current flowing therethrough, and the light emitting unit EMU can emit light with a luminance corresponding to the driving current.

[0088] The pixel circuit PXC may be connected to the scan line Si and data line Dj of the corresponding pixel PXL. For example, when the pixel PXL is arranged in the i-th row and j-th column of the display area DA, the pixel circuit PXC of the pixel PXL may be connected to the i-th scan line Si and j-th data line Dj of the display area DA. Also, the pixel circuit PXC may be connected to the i-th control line CLi and j-th sensing line SENj of the display area DA.

[0089] The above-mentioned pixel circuit PXC may include first to third transistors T1, T2, and T3 and a storage capacitor Cst.

[0090] The first transistor T1 is a driving transistor for controlling a driving current applied to the light-emitting unit EMU, and can be electrically connected between a first driving power supply VDD and the light-emitting unit EMU. Specifically, a first terminal of the first transistor T1 may be electrically connected to the first driving power supply VDD via a first power supply wiring PL1, and a second terminal of the first transistor T1 may be electrically connected to a second node N2. A gate electrode of the first transistor T1 may be electrically connected to the first node N1. The first terminal of the first transistor T1 may be a drain electrode, and the second terminal of the first transistor T1 may be a source electrode.

[0091] The second transistor T2 is a switching transistor that selects the pixel PXL in response to a scan signal and activates the pixel PXL, and may be electrically connected between the jth data line Dj and the first node N1. A first terminal of the second transistor T2 may be electrically connected to the jth data line Dj, a second terminal of the second transistor T2 may be electrically connected to the first node N1 (or a gate electrode of the first transistor T1), and a gate electrode of the second transistor T2 may be electrically connected to the ith scan line Si. The first and second terminals of the second transistor T2 may be different terminals from each other, for example, if the first terminal is a drain electrode, the second terminal may be a source electrode.

[0092] The second transistor T2 may be turned on when a scan signal having a gate-on voltage (e.g., a high level voltage) is supplied from the i-th scan line Si to electrically connect the j-th data line Dj to the first node N1. The first node N1 may be a point where the second terminal of the second transistor T2 and the gate electrode of the first transistor T1 are electrically connected. The second transistor T2 may transmit a data signal to the gate electrode of the first transistor T1.

[0093] The third transistor T3 electrically connects the first transistor T1 to the j-th sensing line SENj, thereby obtaining a sensing signal through the j-th sensing line SENj, and using the sensing signal, the third transistor T3 can detect characteristics of the pixel PXL, including a threshold voltage of the first transistor T1. Information on the characteristics of the pixel PXL may be used to convert image data so that characteristic deviations between the pixels PXL are compensated. The second terminal of the third transistor T3 may be electrically connected to the second terminal of the first transistor T1, the first terminal of the third transistor T3 may be electrically connected to the j-th sensing line SENj, and the gate electrode of the third transistor T3 may be electrically connected to the i-th control line CLi. The first terminal of the third transistor T3 may be a drain electrode, and the second terminal of the third transistor T3 may be a source electrode.

[0094] In addition, a first terminal of the third transistor T3 may be electrically connected to an initialization power supply. The third transistor T3 is an initialization transistor that can initialize the second node N2, and when a sensing control signal is supplied from the i-th control line CLi, the third transistor T3 is turned on to transfer a voltage of the initialization power supply to the second node N2.

[0095] The storage capacitor Cst may include a bottom electrode LE (or a first storage electrode) and an top electrode UE (or a second storage electrode). The bottom electrode LE may be electrically connected to a first node N1, and the top electrode UE may be electrically connected to a second node N2. The storage capacitor Cst charges a gate voltage corresponding to a data signal supplied to the first node N1 during one frame period. Thus, the storage capacitor Cst can store a voltage corresponding to a voltage difference between the gate electrode voltage of the first transistor T1 and the voltage of the second node N2.

[0096] 5, an embodiment in which the first to third transistors T1, T2, and T3 are all N-type transistors is disclosed, but is not limited thereto. For example, at least one of the first to third transistors T1, T2, and T3 described above may be changed to a P-type transistor. Depending on the embodiment, the light emitting unit EMU may be connected between the first driving power supply VDD and the pixel circuit PXCL.

[0097] The structure of the pixel circuit PXC may be implemented in various modifications.

[0098] In the following embodiments, for convenience of explanation, the horizontal direction on the plane is represented as a first direction DR1, the vertical direction on the plane is represented as a second direction DR2, and the vertical direction on the cross section is represented as a third direction DR3.

[0099] FIG. 6 is a schematic plan view showing a display element layer of a pixel PXL according to an embodiment, and FIG. 7 is a schematic plan view showing a first bank BNK, a pixel electrode PE, and a light emitting element LD included in the pixel PXL of FIG.

[0100] 6 and 7, for the sake of convenience, a pixel circuit including a transistor electrically connected to the light emitting element LD is omitted.

[0101] In FIG. 6 and FIG. 7, not only the components included in the pixel PXL but also the region in which the components are located can be collectively referred to as the pixel PXL.

[0102] 1 to 7, the pixel PXL may be located in a pixel area PXA provided on a substrate SUB. The pixel area PXA may include a light emitting area EMA and a non-light emitting area NEA.

[0103] The pixel PXL may include a first bank BNK1 located in the non-light-emitting area NEA, and a light-emitting element LD located in the light-emitting area EMA.

[0104] The first bank BNK1 is a structure that defines each light emitting region EMA of the pixel PXL and the adjacent pixel PXL, and may be, for example, a pixel defining film. The first bank BNK1 can define each light emitting region EMA to which the light emitting element LD is to be supplied during the process of supplying (or inputting) the light emitting element LD. Since the light emitting region EMA of the pixel PXL is defined by the first bank BNK1, a mixture liquid (e.g., ink) containing a desired amount and / or type of light emitting element LD can be supplied (or input) to the light emitting region EMA.

[0105] The first bank BNK1 is configured to include at least one light blocking material and / or reflective material (or scattering material) to prevent light leakage defects between the pixel PXL and the adjacent pixel PXL. According to an embodiment, the first bank BNK1 may include a transparent material (or material). The transparent material may include, but is not limited to, a polyamide resin, a polyimide resin, etc. According to another embodiment, a reflective material layer may be separately provided and / or formed on the first bank BNK1 to further improve the efficiency of light emitted from the pixel PXL.

[0106] The first bank BNK1 may include at least one opening exposing an underlying structure in the pixel area PXA. The light emitting area EMA of the pixel PXL and the opening of the first bank BNK1 may correspond to each other.

[0107] An electrode separation region ESA may be located within the non-light-emitting region NEA of each pixel PXL. The electrode separation region ESA may be a region in which the first and second alignment electrodes ALE1, ALE2 in each pixel PXL are separated from the first and second alignment electrodes ALE1, ALE2 provided in the pixels PXL arranged in the same pixel column.

[0108] The pixel PXL may include a pixel electrode PE disposed in the light emitting area EMA, a light emitting element LD electrically connected to the pixel electrode PE, and an alignment electrode ALE disposed at a position corresponding to the pixel electrode PE. For example, a first pixel electrode PE1, a second pixel electrode PE2, a third pixel electrode PE3, a fourth pixel electrode PE4, a light emitting element LD, and first to third alignment electrodes ALE1, ALE2, and ALE3 may be disposed in the light emitting area EMA. The number, shape, size, and arrangement structure of each of the pixel electrodes PE and / or the alignment electrodes ALE may vary depending on the structure of the pixel PXL (or the light emitting unit EMU).

[0109] Based on one surface of the substrate SUB on which the pixel PXL is provided, the alignment electrode ALE, the light emitting element LD, and the pixel electrode PE may be provided in this order, but are not limited thereto. The laminated structure of the pixel PXL will be described later with reference to FIGS.

[0110] The alignment electrodes ALE are located at least in the light emitting area EMA, and may be spaced apart from each other along a first direction DR1 in the light emitting area EMA and each may extend in a second direction DR2. The alignment electrodes ALE may include a first alignment electrode ALE1, a second alignment electrode ALE2, and a third alignment electrode ALE3 arranged along the first direction DR1. The first, second, and third alignment electrodes ALE1, ALE2, and ALE3 may be arranged spaced apart from each other.

[0111] The first alignment electrode ALE1 may be separated from the first floating pattern FTP1 after the light emitting element LD is supplied and aligned in the light emitting region EMA. Specifically, the first alignment electrode ALE1 may be integrally formed with the first floating pattern FTP1 before the light emitting element LD is aligned in each of the light emitting regions EMA to form a first alignment wiring for aligning the light emitting element LD. The first floating pattern FTP1 may be electrically connected to the first alignment signal wiring through the third contact hole CH3. For example, the first alignment signal wiring may be a first power wiring (see "PL1" in FIG. 5). After the alignment process of the light emitting element LD is completed, the first alignment wiring may be cut in the electrode separation region ESA located around the first floating pattern FTP1, thereby separating the first alignment wiring into the first alignment electrode ALE1 and the first floating pattern FTP1. Also, the first alignment wiring may be cut in the electrode separation region ESA between adjacent pixel columns to separate the first alignment electrodes ALE1 of adjacent pixels PXL. In the embodiment, the first alignment electrode ALE1 may be electrically connected to a part of the pixel circuit PXC through the first contact hole CH1. For example, the first alignment electrode ALE1 may be electrically connected to the first and third transistors T1 and T3 of the pixel circuit PXC.

[0112] The second alignment electrode ALE2 may be separated from the second floating pattern FTP2 after the light emitting element LD is provided and aligned in the light emitting region EMA. Specifically, the second alignment electrode ALE2 may be integrally formed with the second floating pattern FTP2 before the light emitting element LD is aligned in each of the light emitting regions EMA to form a second alignment wiring for aligning the light emitting element LD. The second floating pattern FTP2 may be electrically connected to the second alignment signal wiring through a sixth contact hole CH6. After the alignment process of the light emitting element LD is completed, the second alignment wiring may be cut in the electrode separation region ESA located around the second floating pattern FTP2, thereby separating the second alignment wiring into the second alignment electrode ALE2 and the second floating pattern FTP2. In addition, the second alignment wiring may be cut in the electrode separation region ESA between adjacent pixel columns to separate the second alignment electrodes ALE2 of adjacent pixels PXL.

[0113] The third alignment electrode ALE3 can be electrically connected to the second power supply wiring (see "PL2" in FIG. 5) through the second contact hole CH2 regardless of whether the light emitting element LD is aligned or not. This allows the third alignment electrode ALE3 to receive an alignment signal from the second power supply wiring PL2 before the light emitting element LD is aligned, and to receive the voltage of the second driving power supply VSS from the second power supply wiring PL2 after the light emitting element LD is aligned.

[0114] Each of the first alignment electrode ALE1, the second alignment electrode ALE2, and the third alignment electrode ALE3 may be utilized as an alignment wiring for aligning the light emitting element LD by receiving a signal (e.g., an alignment signal) before the light emitting element LD is aligned in the light emitting area EMA of each pixel PXL.

[0115] The first, second and third alignment electrodes ALE1, ALE2 and ALE3 may be formed in a bar shape having a certain width at least in the light emitting area EMA, but are not limited thereto. The first, second and third alignment electrodes ALE1, ALE2 and ALE3 may or may not have a bent portion in the non-light emitting area NEA, and the shape and / or size in the remaining area excluding the light emitting area EMA are not particularly limited and may vary in various ways.

[0116] At least two or more light emitting elements LD may be aligned in the light emitting area EMA (or pixel area PXA). The light emitting elements LD may be respectively arranged between the first alignment electrode ALE1 and the second alignment electrode ALE2, and between the second alignment electrode ALE2 and the third alignment electrode ALE3. In a plan view, each of the light emitting elements LD may include a first end EP1 and a second end EP2 located at both ends (or facing each other) in its longitudinal direction, for example, in the first direction DR1. A second semiconductor layer including a p-type semiconductor layer (see "13" in FIG. 1) may be located at the first end EP1 (or p-type end), and a first semiconductor layer including an n-type semiconductor layer (see "11" in FIG. 1) may be located at the second end EP2 (or n-type end). The light emitting elements LD may be electrically connected in parallel between the first alignment electrode ALE1 and the second alignment electrode ALE2, and between the second alignment electrode ALE2 and the third alignment electrode ALE3, respectively.

[0117] The light emitting elements LD may be spaced apart from one another and aligned substantially parallel to one another. The spacing between the light emitting elements LD is not particularly limited. According to an embodiment, a plurality of light emitting elements LD may be arranged adjacent to one another to form a group, a plurality of light emitting elements LD may be arranged at regular intervals to form a group, or may be aligned in one direction with non-uniform density.

[0118] The light emitting element LD may be applied (or provided) to the pixel area PXA (or the light emitting area EMA) by an inkjet printing method, a slit coating method, or other various methods. For example, the light emitting element LD may be mixed with a volatile solvent and applied (or provided) to the pixel area PXA by an inkjet printing method or a slit coating method.

[0119] In the embodiment, the light emitting element LD may include a first light emitting element LD1 and a second light emitting element LD2.

[0120] The first light emitting element LD1 may be aligned between the first alignment electrode ALE1 and the left side of the second alignment electrode ALE2 and electrically connected to the first pixel electrode PE1 and the second pixel electrode PE2. The second light emitting element LD2 may be aligned between the third alignment electrode ALE3 and the right side of the second alignment electrode ALE2 and electrically connected to the third pixel electrode PE3 and the fourth pixel electrode PE4.

[0121] A plurality of first light-emitting elements LD1 and second light-emitting elements LD2 may be provided. The first end EP1 of each of the plurality of first light-emitting elements LD1 may be electrically connected to the first pixel electrode PE1 (or the first electrode EL1), and the second end EP2 of each of the plurality of first light-emitting elements LD1 may be electrically connected to the second pixel electrode PE2 (or the second electrode EL2). The first end EP1 of each of the plurality of second light-emitting elements LD2 may be electrically connected to the third pixel electrode PE3 (or the first electrode EL1), and the second end EP2 of each of the plurality of second light-emitting elements LD2 may be electrically connected to the fourth pixel electrode PE4 (or the second electrode EL2).

[0122] The first light emitting element LD1 may be connected in parallel between the first pixel electrode PE1 and the second pixel electrode PE2, and the second light emitting element LD2 may be connected in parallel between the third pixel electrode PE3 and the fourth pixel electrode PE4.

[0123] The pixel electrodes PE are provided in the light emitting area EMA of the pixel PXL, and may be provided at positions corresponding to at least one alignment electrode ALE and light emitting element LD, respectively.

[0124] The pixel electrode PE may include a first pixel electrode PE1, a second pixel electrode PE2, a third pixel electrode PE3, and a fourth pixel electrode PE4 that are spaced apart from each other. The first pixel electrode PE1, the second pixel electrode PE2, the fourth pixel electrode PE4, and the third pixel electrode PE3 may be arranged in this order at least along the first direction DR1 in the light emitting region EMA.

[0125] The first pixel electrode PE1 may be formed on the first alignment electrode ALE1 and the first end EP1 of each of the first light emitting elements LD1 and electrically connected to the first end EP1 of each of the first light emitting elements LD1. The first pixel electrode PE1 may be, but is not limited to, a bar-shaped electrode having a certain width along its extension direction, for example, the second direction DR2.

[0126] The second pixel electrode PE2 may be formed on the left side of the second alignment electrode ALE2 and on the second end EP2 of each of the first light emitting elements LD1, and may be electrically connected to the second end EP2 of each of the first light emitting elements LD1. The second pixel electrode PE2 may be, but is not limited to, a bar-shaped electrode having a certain width along the second direction DR2.

[0127] The third pixel electrode PE3 may be formed on the left side of the third alignment electrode ALE3 and on the first end EP1 of each of the second light emitting elements LD2, and may be electrically connected to the first end EP1 of each of the second light emitting elements LD2. The third pixel electrode PE3 may be, but is not limited to, a bar-shaped electrode having a certain width along the second direction DR2.

[0128] The fourth pixel electrode PE4 may be formed on the right side of the second alignment electrode ALE2 and on the second end EP2 of each of the second light emitting elements LD2, and may be electrically connected to the second end EP2 of each of the second light emitting elements LD2. The fourth pixel electrode PE4 may be, but is not limited to, a bar-shaped electrode having a certain width along the second direction DR2.

[0129] In the embodiment, the second pixel electrode PE2 and the third pixel electrode PE3 may be electrically connected to each other through a contact electrode CNE. For example, the second pixel electrode PE2 and the third pixel electrode PE3 may be electrically connected to each other through a contact electrode CNE located in the non-emitting area NEA. The contact electrode CNE may be integrally formed with the second pixel electrode PE2 and / or the third pixel electrode PE3 and may be electrically and / or physically connected to the second and third pixel electrodes PE2 and PE3.

[0130] The first light emitting element LD1 may be connected in series to the second light emitting element LD2 via the contact electrode CNE. The first pixel electrode PE1 and the second pixel electrode PE2 may form a first series end SET1 together with the first light emitting element LD1 connected in parallel therebetween. The third pixel electrode PE3 and the fourth pixel electrode PE4 may form a second series end SET2 together with the second light emitting element LD2 connected in parallel therebetween. The first pixel electrode PE1 may be the first electrode EL1 of the first series end SET1, and the second pixel electrode PE2 may be the second electrode EL2 of the first series end SET1. The third pixel electrode PE3 may be the first electrode EL1 of the second series end SET2, and the fourth pixel electrode PE4 may be the second electrode EL2 of the second series end SET2. The first pixel electrode PE1 may be the anode of the light emitting unit EMU, and the fourth pixel electrode PE4 may be the cathode of the light emitting unit EMU.

[0131] The first pixel electrode PE1 may contact the first alignment electrode ALE1 through the fourth contact hole CH4 in the non-emitting area NEA and be electrically connected to the first alignment electrode ALE1. The pixel circuit PXC, the first alignment electrode ALE1, and the first pixel electrode PE1 may be electrically connected to each other through the first contact hole CH1 and the fourth contact hole CH4. In the above embodiment, the first alignment electrode ALE1 and the first pixel electrode PE1 are directly connected to each other through the fourth contact hole CH4, but the present invention is not limited thereto. According to the embodiment, in order to prevent defects due to material characteristics of the first alignment electrode ALE1, the first pixel electrode PE1 may be directly connected to the pixel circuit PXC without directly contacting the first alignment electrode ALE1 and be electrically connected to the pixel circuit PXC.

[0132] The fourth pixel electrode PE4 may contact the third alignment electrode ALE3 through the fifth contact hole CH5 in the non-light-emitting area NEA and be electrically connected to the third alignment electrode ALE3. The second power wiring PL2, the third alignment electrode ALE3, and the fourth pixel electrode PE4 may be electrically connected to each other through the second contact hole CH2 and the fifth contact hole CH5. In the above-mentioned embodiment, the third alignment electrode ALE3 and the fourth pixel electrode PE4 are directly connected to each other through the fifth contact hole CH5, but the present invention is not limited thereto. According to the embodiment, in order to prevent defects due to the material characteristics of the third alignment electrode ALE3, the fourth pixel electrode PE4 may be directly connected to the second power wiring PL2 without directly contacting the third alignment electrode ALE3 and be electrically connected to the second power wiring PL2.

[0133] The first light emitting element LD1 and the second light emitting element L2 may be connected in series between the first pixel electrode PE1 and the fourth pixel electrode PE4 via the contact electrode CNE and the second and third pixel electrodes PE2 and PE3. In this manner, the light emitting elements LD aligned in the light emitting area EMA may be connected in a mixed series / parallel structure to configure the light emitting unit EMU of the pixel PXL.

[0134] In the embodiment, the pixel PXL may further include a sub-electrode electrically connected to at least the pixel electrode PE located at the edge (or outside) of the light-emitting area EMA. For example, the pixel PXL may include sub-electrodes electrically connected to at least the first pixel electrode PE1 and the third pixel electrode PE3 located at the edge of the light-emitting area EMA. The sub-electrodes may include a first sub-electrode SLT1 electrically connected to the first pixel electrode PE1 and a second sub-electrode SLT2 electrically connected to the third pixel electrode PE3.

[0135] The first sub-electrode SLT1 may be formed in the same process as the first pixel electrode PE1 and may be integral with the first pixel electrode PE1, but is not limited thereto. The first sub-electrode SLT1 may be located in the non-light-emitting area NEA and may overlap with the first bank BNK1. The second sub-electrode SLT2 may be formed in the same process as the third pixel electrode PE3 and may be integral with the third pixel electrode PE3, but is not limited thereto. The second sub-electrode SLT2 may be located in the non-light-emitting area NEA and may overlap with the first bank BNK1.

[0136] In the embodiment, the light emitting region EMA of the pixel PXL may be divided into a first region A1, a third region A3, and a second region A2 along the second direction DR2. In a plan view, the first region A1 may be an upper region of the light emitting region EMA, the second region A2 may be a lower region of the light emitting region EMA, and the third region A3 may be a central region of the light emitting region EMA.

[0137] The first pixel electrode PE1 may include a 1-1 pixel electrode PE1a (or a first portion) located in the first region A1 and a 1-2 pixel electrode PE1b (or a second portion) located in the second region A2. The first pixel electrode PE1 is not located in the third region A3. That is, the first pixel electrode PE1 may be disconnected in the third region A3. The 1-1 pixel electrode PE1a and the 1-2 pixel electrode PE1b may be disposed apart from each other in the third region A3.

[0138] The second pixel electrode PE2 may include a 2-1 pixel electrode PE2a (or a first portion) located in the first region A1, a 2-2 pixel electrode PE2b (or a second portion) located in the second region A2, and a 2-3 pixel electrode PE2c (or a third portion) located in the third region A3. The 2-3 pixel electrode PE2c is located between the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b, and may connect the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b. In the embodiment, the 2-3 pixel electrode PE2c may have a narrower width in the first direction DR1 than the 2-1 and 2-2 pixel electrodes PE2a and PE2b. The width of the 2-3 pixel electrode PE2c (for example, the width in the first direction DR1) is designed to be narrow in order to facilitate laser cutting in the process of repairing a black spot defect of the pixel PXL. However, the present invention is not limited to this, and the 2-3 pixel electrode PE2c may have the same width as the 2-1 and 2-2 pixel electrodes PE2a and PE2b.

[0139] The third pixel electrode PE3 may include a 3-1 pixel electrode PE3a (or a first portion) located in the first region A1 and a 3-2 pixel electrode PE3b (or a second portion) located in the second region A2. The third pixel electrode PE3 is not located in the third region A3. That is, the third pixel electrode PE3 may be disconnected in the third region A3. The 3-1 pixel electrode PE3a and the 3-2 pixel electrode PE3b may be disposed apart from each other in the third region A3.

[0140] The fourth pixel electrode PE4 may include a 4-1 pixel electrode PE4a (or a first portion) located in the first region A1, a 4-2 pixel electrode PE4b (or a second portion) located in the second region A2, and a 4-3 pixel electrode PE4c (or a third portion) located in the third region A3. The 4-3 pixel electrode PE4c is located between the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b, and may connect the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b. In the embodiment, the 4-3 pixel electrode PE4c may have a narrower width in the first direction DR1 than the 4-1 and 4-2 pixel electrodes PE4a and PE4b. The width of the 4-3 pixel electrode PE4c (for example, the width in the first direction DR1) is designed to be narrow in order to facilitate laser cutting in the process of repairing a black spot defect of the pixel PXL. However, the present invention is not limited to this, and the 4-3 pixel electrode PE4c may have the same width as the 4-1 and 4-2 pixel electrodes PE4a and PE4b.

[0141] At least the first pixel electrode PE1 and the third pixel electrode PE3 located on the outer side of the light emitting region EMA may be disconnected in the third region A3. The second pixel electrode PE2 and the fourth pixel electrode PE4 located on the inner side of the light emitting region EMA may include a third portion connecting the first portion and the second portion.

[0142] The first sub-electrode SLT1 may include a 1-1 sub-electrode SLT1a connected to the 1-1 pixel electrode PE1a, a 1-2 sub-electrode SLT1b connected to the 1-2 pixel electrode PE1b, and a 1-3 sub-electrode SLT1c connecting the 1-1 sub-electrode SLT1a and the 1-2 sub-electrode SLT1b. The 1-1 sub-electrode SLT1a may be located in a non-emitting area NEA corresponding to the first region A1, the 1-2 sub-electrode SLT1b may be located in a non-emitting area NEA corresponding to the second region A2, and the 1-3 sub-electrode SLT1c may be located in a non-emitting area NEA corresponding to the third region A3. The 1-3 sub-electrode SLT1c may have a narrower width in the first direction DR1 than the 1-1 and 1-2 sub-electrodes SLT1a and SLT1b. The width of the 1-3 sub-electrode SLT1c (for example, the width in the first direction DR1) is designed to be narrow in order to facilitate laser cutting in the process of repairing a black spot defect in the pixel PXL, but is not limited thereto, and the 1-3 sub-electrode SLT1c may have the same width as the 1-1 and 1-2 sub-electrodes SLT1a and SLT1b.

[0143] The second sub-electrode SLT2 may include a 2-1 sub-electrode SLT2a connected to the 3-1 pixel electrode PE3a, a 2-2 sub-electrode SLT2b connected to the 3-2 pixel electrode PE3b, and a 2-3 sub-electrode SLT2c connecting the 2-1 sub-electrode SLT2a and the 2-2 sub-electrode SLT2b. The 2-1 sub-electrode SLT2a may be located in a non-emitting area NEA corresponding to the first region A1, the 2-2 sub-electrode SLT2b may be located in a non-emitting area NEA corresponding to the second region A2, and the 2-3 sub-electrode SLT2c may be located in a non-emitting area NEA corresponding to the third region A3. The 2-3 sub-electrode SLT2c may have a narrower width in the first direction DR1 than the 2-1 and 2-2 sub-electrodes SLT2a and SLT2b. The width of the 2-3 sub-electrode SLT2c (e.g., the width in the first direction DR1) is designed to be narrow in order to facilitate laser cutting in the process of repairing a black spot defect in the pixel PXL, but is not limited thereto, and the 2-3 sub-electrode SLT2c may have the same width as the 2-1 and 2-2 sub-electrodes SLT2a and SLT2b.

[0144] In the embodiment, the first light-emitting element LD1 may include a 1a light-emitting element LD1a located in the first region A1 and a 1b light-emitting element LD1b located in the second region A2. The second light-emitting element LD2 may include a 2a light-emitting element LD2a located in the first region A1 and a 2b light-emitting element LD2b located in the second region A2.

[0145] The 1a light-emitting element LD1a may be electrically connected to the 1-1 pixel electrode PE1a and the 2-1 pixel electrode PE2a. The first end EP1 of each of the 1a light-emitting elements LD1a may be electrically connected to the 1-1 pixel electrode PE1a (or the first electrode EL1), and the second end EP2 of each of the 1a light-emitting elements LD1a may be electrically connected to the 2-1 pixel electrode PE2a (or the second electrode EL2).

[0146] The 1b light-emitting element LD1b may be electrically connected to the 1-2 pixel electrode PE1b and the 2-2 pixel electrode PE2b. The first end portion EP1 of each of the 1b light-emitting elements LD1b may be electrically connected to the 1-2 pixel electrode PE1b (or the first electrode EL1), and the second end portion EP2 of each of the 1b light-emitting elements LD1b may be electrically connected to the 2-2 pixel electrode PE2b (or the second electrode EL2).

[0147] The 2a-light-emitting element LD2a may be electrically connected to the 3-1 pixel electrode PE3a and the 4-1 pixel electrode PE4a. The first end EP1 of each of the 2a-light-emitting elements LD2a may be electrically connected to the 3-1 pixel electrode PE3a (or the first electrode EL1), and the second end EP2 of each of the 2a-light-emitting elements LD2a may be electrically connected to the 4-1 pixel electrode PE4a (or the second electrode EL2).

[0148] The 2b light-emitting element LD2b may be electrically connected to the 3-2 pixel electrode PE3b and the 4-2 pixel electrode PE4b. The first end portion EP1 of each of the 2b light-emitting elements LD2b may be electrically connected to the 3-2 pixel electrode PE3b (or the first electrode EL1), and the second end portion EP2 of each of the 2b light-emitting elements LD2b may be electrically connected to the 4-2 pixel electrode PE4b (or the second electrode EL2).

[0149] Hereinafter, the laminated structure (or cross-sectional structure) of the pixel PXL according to the above-mentioned embodiment will be mainly described with reference to FIGS.

[0150] 8 to 10 are schematic cross-sectional views taken along line II' in FIG. 6, and FIG. 11 is a schematic cross-sectional view taken along line II' in FIG.

[0151] 9 and 10 show modified examples of the embodiment of FIG. 8 with respect to the step of forming the pixel electrode PE and the presence or absence of the third insulating layer INS3. For example, FIG. 9 shows an embodiment in which the 1-1 and 4-1 pixel electrodes PE1a and PE4a are formed after the 2-1 and 3-1 pixel electrodes PE2a and PE3a and the third insulating layer INS3 are formed, and FIG. 10 shows an embodiment in which the 2-1 and 3-1 pixel electrodes PE2a and PE3a are formed after the 1-1 and 4-1 pixel electrodes PE1a and PE4a and the third insulating layer INS3 are formed.

[0152] In the embodiment of Figures 8 to 11, the layered structure (or cross-sectional structure) of the pixel PXL is shown in a simplified manner, such as showing each electrode as a single-layer electrode and each insulating layer as a single-layer insulating layer, but this is not limited to this.

[0153] Referring to FIGS. 1 to 11, a pixel PXL may include a substrate SUB, a pixel circuit layer PCL, and a display element layer DPL.

[0154] The pixel circuit layer PCL and the display element layer DPL may be disposed so as to overlap each other on one surface of the substrate SUB. For example, the display area DA of the substrate SUB may include a pixel circuit layer PCL disposed on one surface of the substrate SUB, and a display element layer DPL disposed on the pixel circuit layer PCL. However, the relative positions of the pixel circuit layer PCL and the display element layer DPL on the substrate SUB may vary depending on the embodiment. When the pixel circuit layer PCL and the display element layer DPL are divided into separate layers and overlapped, a sufficient layout space for forming the pixel circuit (see "PXC" in FIG. 5) and the light-emitting unit (see "EMU" in FIG. 5) on a plane can be secured.

[0155] The substrate SUB may include a transparent insulating material and may be light-transmitting, and may be a rigid substrate or a flexible substrate.

[0156] In each pixel region PXA of the pixel circuit layer PCL, circuit elements constituting the pixel circuit PXC of the corresponding pixel PXL and predetermined signal wiring electrically connected to the circuit elements may be arranged. In addition, in each pixel region PXA of the display element layer DPL, an alignment electrode ALE, a light emitting element LD, and a pixel electrode PE constituting the light emitting unit EMU of the corresponding pixel PXL may be arranged.

[0157] The pixel circuit layer PCL may include at least one insulating layer in addition to the circuit elements and the signal wirings. For example, the pixel circuit layer PCL may include a buffer layer BFL, a gate insulating layer GI, an interlayer insulating layer ILD, a passivation layer PSV, and a via layer VIA, which are sequentially stacked on the substrate SUB along the third direction DR3.

[0158] The buffer layer BFL may be disposed over the entire surface of the substrate SUB. The buffer layer BFL can prevent diffusion of impurities into the transistor T included in the pixel circuit PXC. The buffer layer BFL may be an inorganic insulating film including an inorganic material. The buffer layer BFL may be formed of silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x Ny ), aluminum oxide (AlO x ) but is not limited thereto. The buffer layer BFL may be formed as a single film, or may be formed as at least a double film or more multi-films. When the buffer layer BFL is formed as a multi-film, each layer may be formed of the same material or different materials. The buffer layer BFL may be omitted depending on the material and process conditions of the substrate SUB.

[0159] The gate insulating layer GI may be disposed on the entire surface of the buffer layer BFL. The gate insulating layer GI may include the same material as the buffer layer BFL described above, or may include a suitable (or selected) material from the materials exemplified as the constituent materials of the buffer layer BFL. For example, the gate insulating layer GI may be an inorganic insulating film including an inorganic material.

[0160] The interlayer insulating layer ILD may be provided and / or formed on the entire surface of the gate insulating layer GI. The interlayer insulating layer ILD may include the same material as the buffer layer BFL, or may include one or more materials suitable (or selected) from the materials exemplified as the constituent materials of the buffer layer BFL.

[0161] The passivation layer PSV may be provided and / or formed on the entire interlayer dielectric layer ILD. The passivation layer PSV may include the same material as the buffer layer BFL, or may include one or more suitable (or selected) materials from the materials exemplified as the constituent materials of the buffer layer BFL.

[0162] The via layer VIA may be provided and / or formed entirely on the passivation layer PSV. The via layer VIA may be an inorganic insulating film containing an inorganic material or an organic insulating film containing an organic material. The inorganic insulating film may be, for example, silicon oxide (SiO x ), silicon nitride (SiN x ), silicon oxynitride (SiO x N y ), aluminum oxide (AlO xThe organic insulating film may include at least one of, for example, an acrylic resin, an epoxy resin, a phenolic resin, a polyamide resin, a polyimide resin, an unsaturated polyester resin, a polyphenylene ether resin, a polyphenylene sulfide resin, and a benzocyclobutene resin.

[0163] The via layer VIA may include a plurality of contact holes. For example, the via layer VIA may be partially opened to include the first, second, third, and sixth contact holes CH1, CH2, CH3, and CH6.

[0164] The display element layer DPL may be disposed on the via layer VIA.

[0165] The display element layer DPL may be provided with a configuration of a light emitting unit EMU. For example, the display element layer DPL may be provided with a bank pattern BNP, an alignment electrode ALE, a first bank BNK1, a light emitting element LD, and a pixel electrode PE.

[0166] The bank pattern BNP may be located on the via layer VIA. For example, the bank pattern BNP may protrude in the third direction DR3 on one surface of the via layer VIA. In this case, one region of the alignment electrode ALE arranged on the bank pattern BNP may protrude in the third direction DR3 (or the thickness direction of the substrate SUB).

[0167] The bank pattern BNP may include an inorganic insulating film containing an inorganic material or an organic insulating film containing an organic material. According to an embodiment, the bank pattern BNP may include, but is not limited to, a single-layer organic insulating film and / or a single-layer inorganic insulating film. According to an embodiment, the bank pattern BNP may be provided in the form of a multi-layer in which at least one or more organic insulating films and at least one or more inorganic insulating films are stacked. However, the material of the bank pattern BNP is not limited to the above-mentioned embodiment, and depending on the embodiment, the bank pattern BNP may include a conductive substance (or material).

[0168] The bank patterns BNP may be located at least below the first to third alignment electrodes ALE1, ALE2, and ALE3 in the light emitting area EMA, respectively, and overlap with the corresponding alignment electrodes ALE.

[0169] The bank pattern BNP may have a trapezoidal cross section whose width narrows from one surface (or upper surface) of the via layer VIA toward the upper portion in the third direction DR3, but is not limited to this.

[0170] The bank pattern BNP may be used as a reflective member. For example, the bank pattern BNP, together with the alignment electrode ALE arranged thereon, may be used as a reflective member for guiding light emitted from each light emitting element LD in an image display direction of the display device (see "DD" in FIG. 3) to improve the light output efficiency of the pixel PXL.

[0171] The first, second and third alignment electrodes ALE1, ALE2 and ALE3 may be located on the bank pattern BNP.

[0172] The first, second and third alignment electrodes ALE1, ALE2 and ALE3 may be disposed on the same plane and have the same thickness in the third direction DR3. The first, second and third alignment electrodes ALE1, ALE2 and ALE3 may be formed simultaneously in the same process or successively.

[0173] The first, second and third alignment electrodes ALE1, ALE2 and ALE3 may be made of a material having reflectivity to cause the light emitted from the light emitting element LD to travel in the image display direction (or the front direction) of the display device DD. For example, the first, second and third alignment electrodes ALE1, ALE2 and ALE3 may be made of a conductive material (or material). The conductive material may include an opaque metal suitable for reflecting the light emitted from the light emitting element LD in the image display direction of the display device DD.

[0174] Each of the first, second, and third alignment electrodes ALE1, ALE2, and ALE3 may be formed as a single layer, but is not limited thereto. According to an embodiment, each of the first, second, and third alignment electrodes ALE1, ALE2, and ALE3 may be provided and / or formed as a multi-layer in which at least two or more materials selected from metals, alloys, conductive oxides, and conductive polymers are stacked. Each of the first, second, and third alignment electrodes ALE1, ALE2, and ALE3 may be formed as a multi-layer of at least two layers in order to reduce or minimize distortion caused by signal delay when transmitting a signal to each end of the light emitting element LD, for example, the first and second ends EP1 and EP2.

[0175] When the first, second and third alignment electrodes ALE1, ALE2 and ALE3 are made of a conductive material having reflectivity, the light emitted from the first and second ends EP1 and EP2 of the light emitting element LD can further travel in the image display direction of the display device DD.

[0176] A first insulating layer INS1 may be disposed on the first, second and third alignment electrodes ALE1, ALE2 and ALE3.

[0177] The first insulating layer INS1 may be disposed on the alignment electrode ALE and the via layer VIA. The first insulating layer INS1 may be partially opened to expose the underlying structure at least in the non-light emitting area NEA. For example, the first insulating layer INS1 may be partially opened to include a fourth contact hole CH4 in which a region of the first alignment electrode ALE1 is exposed by removing at least a region in the non-light emitting area NEA, and a fifth contact hole CH5 in which another region of the non-light emitting area NEA is removed to expose a region of the third alignment electrode ALE3.

[0178] The first insulating layer INS1 may be made of an inorganic insulating film made of an inorganic material. The first insulating layer INS1 may be provided as a single layer or multiple layers.

[0179] A first bank BNK1 may be located on the first insulating layer INS1.

[0180] The first bank BNK1 may be disposed on the first insulating layer INS1 at least in the non-light-emitting area NEA, but is not limited thereto. The first bank BNK1 may be formed between adjacent pixels PXL to surround the light-emitting area EMA of each pixel PXL, and may constitute a pixel defining film that defines the light-emitting area EMA of the corresponding pixel PXL. The first bank BNK1 may be a dam structure that prevents a solution (or ink) mixed with the light-emitting element LD from flowing into the light-emitting area EMA of the adjacent pixel PXL when the light-emitting element LD is supplied to the light-emitting area EMA, or that controls the supply of a constant amount of solution to each light-emitting area EMA.

[0181] The first bank BNK1 and the bank pattern BNP may be formed in different processes and provided in different layers, but are not limited to this. Depending on the embodiment, the first bank BNK1 and the bank pattern BNP may be formed in different processes but provided in the same layer, or may be formed in the same process and provided in the same layer.

[0182] A light emitting element LD may be provided and aligned in the light emitting area EMA of the pixel PXL in which the first insulating layer INS1 and the first bank BNK1 are formed. For example, the light emitting element LD may be provided (or input) to the light emitting area EMA through an inkjet printing method or the like, and the light emitting element LD may be aligned between the alignment electrodes ALE by an electric field formed by a signal (or alignment signal) applied to each of the alignment electrodes ALE. For example, the light emitting element LD may be aligned between the first alignment electrode ALE1 and the second alignment electrode ALE2, and between the second alignment electrode ALE2 and the third alignment electrode ALE3.

[0183] The light emitting element LD may include a first light emitting element LD1 and a second light emitting element LD2.

[0184] The first light emitting element LD1 may include a 1a light emitting element LD1a located in a first region A1 of the light emitting region EMA and a 1b light emitting element LD1b located in a second region A2 of the light emitting region EMA. The first light emitting element LD1 may include a first end EP1 overlapping the first alignment electrode ALE1 and a second end EP2 overlapping the second alignment electrode ALE2.

[0185] The second light emitting element LD2 may include a 2a light emitting element LD2a located in the first area A1 of the light emitting area EMA and a 2b light emitting element LD2b located in the second area A2 of the light emitting area EMA. The second light emitting element LD2 may include a first end EP1 overlapping the third alignment electrode ALE3 and a second end EP2 overlapping the second alignment electrode ALE2.

[0186] A second insulating layer INS2 (or insulating pattern) may be disposed on each of the 1a, 1b, 2a, and 2b light emitting elements LD1a, LD1b, LD2a, and LD2b.

[0187] The second insulating layer INS2 is located on the 1a, 1b, 2a, and 2b light-emitting elements LD1a, LD1b, LD2a, and LD2b, and partially covers the outer peripheral surfaces (or surfaces) of the 1a, 1b, 2a, and 2b light-emitting elements LD1a, LD1b, LD2a, and LD2b, respectively, to expose the first end EP1 and the second end EP2 of the 1a, 1b, 2a, and 2b light-emitting elements LD1a, LD1b, LD2a, and LD2b, respectively, to the outside.

[0188] The second insulating layer INS2 may include an inorganic insulating film or an organic insulating film containing an inorganic material. For example, the second insulating layer INS2 may include an inorganic insulating film suitable for protecting the active layers (see "12" in FIG. 1) of the 1a, 1b, 2a, and 2b light emitting elements LD1a, LD1b, LD2a, and LD2b from external oxygen and moisture. However, the second insulating layer INS2 is not limited thereto, and may be made of an organic insulating film containing an organic material depending on design conditions of the display device DD (or display panel DP) to which the 1a, 1b, 2a, and 2b light emitting elements LD1a, LD1b, LD2a, and LD2b are applied. The second insulating layer INS2 may be made of a single layer or multiple layers.

[0189] If gaps exist between the 1a, 1b, 2a, and 2b light-emitting elements LD1a, LD1b, LD2a, and LD2b and the first insulating layer INS1 before the formation of the second insulating layer INS2, the gaps may be filled with the second insulating layer INS2 during the process of forming the second insulating layer INS2.

[0190] By forming the second insulating layer INS2 on the light emitting element LD after the alignment is completed, it is possible to prevent the light emitting element LD from moving away from the aligned position.

[0191] On both ends of the light emitting element LD that are not covered by the second insulating layer INS2, for example, on the first and second ends EP1 and EP2, different electrodes from among the first to fourth pixel electrodes PE1, PE2, PE3, and PE4 may be formed. For example, a 1-1 pixel electrode PE1a may be formed on the first end EP1 of the 1a light-emitting element LD1a, a 2-1 pixel electrode PE2a may be formed on the second end EP2 of the 1a light-emitting element LD1a, a 1-2 pixel electrode PE1b may be formed on the first end EP1 of the 1b light-emitting element LD1b, a 2-2 pixel electrode PE2b may be formed on the second end EP2 of the 1b light-emitting element LD1b, a 3-1 pixel electrode PE3a may be formed on the first end EP1 of the 2a light-emitting element LD2a, a 4-1 pixel electrode PE4a may be formed on the second end EP2 of the 2a light-emitting element LD2a, a 3-2 pixel electrode PE3b may be formed on the first end EP1 of the 2b light-emitting element LD2b, and a 4-2 pixel electrode PE4b may be formed on the second end EP2 of the 2b light-emitting element LD2b.

[0192] In the embodiment of Fig. 8, the first, second, third and fourth pixel electrodes PE1, PE2, PE3 and PE4 may be formed simultaneously or sequentially in the same process and arranged in the same layer. When the pixel electrodes PE arranged on the first end EP1 and the second end EP2 of each light emitting element LD are arranged in the same layer and formed simultaneously or sequentially, the manufacturing process of the pixel PXL can be simplified and the process efficiency can be improved. The first sub-electrode SLT1 electrically connected to the first pixel electrode PE1 and the second sub-electrode SLT2 electrically connected to the third pixel electrode PE3 may be formed simultaneously or sequentially in the same process as the first, second, third and fourth pixel electrodes PE1, PE2, PE3 and PE4.

[0193] According to the embodiment, the pixel electrodes PE disposed on the first end EP1 and the second end EP2 of each light emitting element LD may be formed in different processes and disposed in different layers. For example, in the embodiment of FIG. 9, the 2-1 pixel electrode PE2a (or the second pixel electrode PE2) and the 3-1 pixel electrode PE3a (or the third pixel electrode PE3) may be formed first on the second insulating layer INS2. The 2-1 pixel electrode PE2a may be in direct contact with the second end EP2 of the 1a light emitting element LD1a to be electrically connected to the 1a light emitting element LD1a. The 3-1 pixel electrode PE3a may be in direct contact with the first end EP1 of the 2a light emitting element LD2a to be electrically connected to the 2a light emitting element LD2a. In the process of forming the 3-1 pixel electrode PE3a, the 2-1 sub-electrode SLT2a (or the second sub-electrode SLT2) may be formed at the same time. Thereafter, the third insulating layer INS3 may be formed to cover the 2-1 pixel electrode PE2a and the 3-1 pixel electrode PE3a. The third insulating layer INS3 may include an inorganic insulating film made of an inorganic material or an organic insulating film made of an organic material. The third insulating layer INS3 may be formed of a single layer or multiple layers. The 1-1 pixel electrode PE1a (or the first pixel electrode PE1) and the 4-1 pixel electrode PE4a (or the fourth pixel electrode PE4) may be formed on the third insulating layer INS3. The 1-1 pixel electrode PE1a may be in direct contact with the first end EP1 of the 1a light emitting element LD1a to be electrically connected to the 1a light emitting element LD1a. The 4-1 pixel electrode PE4a may be in direct contact with the second end EP2 of the 2a light emitting element LD2a to be electrically connected to the 2a light emitting element LD2a. In the process of forming the 1-1 pixel electrode PE1a, the 1-1 sub-electrode SLT1a (or the first sub-electrode SLT1) may be formed at the same time.

[0194] 10, the 1-1 pixel electrode PE1a (or the first pixel electrode PE1), the 1-1 sub-electrode SLT1a (or the first sub-electrode SLT1), and the 4-1 pixel electrode PE4a (or the fourth pixel electrode PE4) may be formed first on the second insulating layer INS2. Then, the third insulating layer INS3 may be formed to cover the 1-1 and 4-1 pixel electrodes PE1a, PE4a, and the 1-1 sub-electrode SLT1a, and the 2-1 pixel electrode PE2a (or the second pixel electrode PE2), the 3-1 pixel electrode PE3a (or the third pixel electrode PE3), and the 2-1 sub-electrode SLT2a (or the second sub-electrode SLT2) may be formed on the third insulating layer INS3.

[0195] 9 and 10, when the pixel electrodes PE disposed on the first end EP1 and the second end EP2 of each light emitting element LD are disposed on different layers, the pixel electrodes PE can be separated more stably, thereby further ensuring electrical stability between the first and second ends EP1 and EP2 of the light emitting element LD.

[0196] The first, second, third and fourth pixel electrodes PE1, PE2, PE3 and PE4 may be made of various transparent conductive materials. For example, the first, second, third and fourth pixel electrodes PE1, PE2, PE3 and PE4 may include at least one of various transparent conductive materials including indium tin oxide, indium zinc oxide, indium tin zinc oxide, aluminum zinc oxide, gallium zinc oxide, zinc tin oxide or gallium tin oxide, and may be substantially transparent or semi-transparent to meet a predetermined light transmittance. Thus, light emitted from the first and second ends EP1 and EP2 of the light emitting element LD may be emitted to the outside of the display panel DP through the first, second, third and fourth pixel electrodes PE1, PE2, PE3 and PE4.

[0197] At least one overcoat layer (for example, a layer for planarizing the upper surface of the display element layer DPL) may be further disposed on the pixel electrode PE.

[0198] According to another embodiment, an optical layer may be selectively disposed on the display element layer DPL. For example, the optical layer may include a color conversion layer and a color filter layer that convert light emitted from the light emitting element LD into light having excellent color reproducibility and emits the light. The optical layer will be described later with reference to FIG. 12.

[0199] After aligning the light emitting element LD in the light emitting area EMA and forming a pixel electrode PE electrically connected to the light emitting element LD, an inspection can be performed to determine whether or not there is a black spot defect in the pixel PXL. If a defective light emitting element is present in the light emitting area EMA, the light emitting element LD connected in parallel with the defective light emitting element may not be lit. The defect may include, but is not limited to, a defect in the light emitting element LD itself, a short circuit defect in the pixel electrode PE located at both ends of the light emitting element LD, etc. If the light emitting element LD does not light up and the pixel PXL becomes a black spot in the above inspection, a repair process can be performed on the defective light emitting element. For example, a region of an electrode electrically connected to one end of the defective light emitting element is removed by laser cutting, so that the electrode is floated and the remaining light emitting element LD that is not electrically connected to the electrode can be repaired so that it is normally lit. A detailed description of repairing a defective light emitting element will be given later with reference to FIGS. 13 to 15.

[0200] FIG. 12 shows a pixel PXL according to an embodiment, and is a schematic cross-sectional view taken along line I-I' in FIG.

[0201] Regarding the embodiment of FIG. 12, the following description will focus on the differences from the above-mentioned embodiment to avoid duplication.

[0202] Referring to FIGS. 1 to 12, the pixel PXL may include a substrate SUB, a pixel circuit layer PCL, a display element layer DPL, a color filter layer CFL, and an encapsulation layer ENC.

[0203] The display element layer DPL may include a bank pattern BNP, first to third alignment electrodes ALE1, ALE2, ALE3, a first bank BNK1, a light emitting element LD, and first to fourth pixel electrodes PE1, PE2, PE3, PE4. In the embodiment, the display element layer DPL may further include a second bank BNK2 arranged on the first bank BNK1, a color conversion layer CCL arranged on the first to fourth pixel electrodes PE1, PE2, PE3, PE4, and a first capping layer CPL1 arranged on the color conversion layer CCL and the second bank BNK2.

[0204] The second bank BNK2 may be disposed on the first bank BNK1 in the non-light-emitting area NEA of the pixel PXL. The second bank BNK2 may be a dam structure that surrounds the light-emitting area EMA of the pixel PXL and defines the position where the color conversion layer CCL should be provided, thereby ultimately defining the light-emitting area EMA.

[0205] The second bank BNK2 may include a light blocking material. For example, the second bank BNK2 may be, but is not limited to, a black matrix. According to an embodiment, the second bank BNK2 is configured to include at least one light blocking material and / or a reflective material, and can further advance light emitted from the color conversion layer CCL in the image display direction of the display device DD to improve the light output efficiency of the color conversion layer CCL.

[0206] The color conversion layer CCL may include color conversion particles QD corresponding to a specific color. For example, the color conversion layer CCL may include color conversion particles QD that convert a first color light emitted from the light emitting element LD into a second color light (light of a specific color or light with excellent color reproduction ratio). When the pixel PXL is a red pixel (or a red sub-pixel), the color conversion layer CCL of the pixel PXL may include color conversion particles QD of red quantum dots that convert the first color light emitted from the light emitting element LD into a second color light (e.g., red light).

[0207] When the pixel PXL is a green pixel (or a green sub-pixel), the color conversion layer CCL of the pixel PXL may include green quantum dot color conversion particles QD that convert the first color light emitted from the light-emitting element LD into a second color light (e.g., green light).

[0208] When the pixel PXL is a blue pixel (or a blue sub-pixel), the color conversion layer CCL of the pixel PXL may include blue quantum dot color conversion particles QD that convert the first color light emitted from the light emitting element LD into a second color light (e.g., blue light). When the pixel PXL is a blue pixel (or a blue sub-pixel), according to an embodiment, a light scattering layer LSL including light scattering particles SCT may be provided instead of the color conversion layer CCL including the color conversion particles QD. For example, when the light emitting element LD emits blue series light, the pixel PXL may include a light scattering layer LSL including the light scattering particles SCT. The above-mentioned light scattering layer LSL may be omitted depending on the embodiment. When the pixel PXL is a blue pixel (or a blue sub-pixel), according to another embodiment, a transparent polymer may be provided instead of the color conversion layer CCL.

[0209] A first capping layer CPL1 may be disposed on the color conversion layer CCL and the second bank BNK2.

[0210] The first capping layer CPL1 may be provided over the entire display area DA in which the pixels PXL are located, to cover the second bank BNK2 and the color conversion layer CCL.

[0211] The first capping layer CPL1 may be an inorganic insulating film containing an inorganic material. The first capping layer CPL1 may be a silicon nitride (SiN x ), silicon oxide (SiO x ), silicon oxynitride (SiO x N y ), aluminum oxide (AlO x The first capping layer CPL1 entirely covers the second bank BNK2 and the color conversion layer CCL to prevent moisture or oxygen from entering the color conversion layer CCL from the outside.

[0212] According to the embodiment, the first capping layer CPL1 can reduce the step caused by the structure disposed thereunder and have a flat surface. For example, the first capping layer CPL1 can include, but is not limited to, an organic insulating film including an organic material. The first capping layer CPL1 can be a common layer provided in common to the display area DA.

[0213] A color filter layer CFL may be disposed on the first capping layer CPL1.

[0214] The color filter layer CFL may include color filters CF corresponding to the light-emitting regions EMA of the pixels PXL. For example, the color filter layer CFL may include a first color filter CF1 arranged on a color conversion layer CCL of one pixel PXL (hereinafter referred to as a "first pixel"), a second color filter CF2 arranged on a color conversion layer of an adjacent pixel (hereinafter referred to as a "second pixel") adjacent to the first pixel PXL, and a third color filter CF3 arranged on a color conversion layer of the adjacent pixel adjacent to the second pixel.

[0215] The first, second, and third color filters CF1, CF2, and CF3 may be arranged to overlap each other in the non-light-emitting area NEA and may be used as light blocking members that block optical interference between adjacent pixels PXL. Each of the first, second, and third color filters CF1, CF2, and CF3 may include a color filter material that selectively transmits the second color light converted by the corresponding color conversion layer CCL. For example, the first color filter CF1 may be a red color filter, the second color filter CF2 may be a green color filter, and the third color filter CF3 may be a blue color filter, but is not limited thereto.

[0216] An encapsulation layer ENC may be disposed on the color filter layer CFL.

[0217] The encapsulation layer ENC may include a second capping layer CPL2. The second capping layer CPL2 may be an inorganic insulating film including an inorganic material or an organic insulating film including an organic material. The second capping layer CPL2 entirely covers the underlying structure to prevent moisture or humidity from entering the color filter layer CFL and the display element layer DPL from the outside. According to an embodiment, the second capping layer CPL2 may be used as a planarization layer to reduce steps caused by the underlying color filter layer CFL and the display element layer DPL.

[0218] The second capping layer CPL2 may be composed of multiple layers. For example, the second capping layer CPL2 may include at least two inorganic insulating layers and at least one organic insulating layer interposed between the at least two inorganic insulating layers. However, the constituent material and / or structure of the second capping layer CPL2 may vary. In addition, depending on the embodiment, at least one overcoat layer, filler layer, and / or other substrate may be further disposed on the second capping layer CPL2.

[0219] The pixel PXL according to the above-described embodiment has a color conversion layer CCL and a color filter layer CFL disposed on the light emitting element LD through a continuous process, and emits light having excellent color reproducibility through the color conversion layer CCL and the color filter layer CFL, thereby improving the light output efficiency.

[0220] According to the embodiment, the color conversion layer CCL and the color filter layer CFL may be formed in a continuous process on one surface of a base substrate (not shown) to constitute an upper substrate separate from the substrate SUB on which the first to fourth pixel electrodes PE1, PE2, PE3, and PE4 are arranged. The upper substrate may be coupled to the display element layer DPL including the first to fourth pixel electrodes PE1, PE2, PE3, and PE4 via an intermediate layer made of a material having insulating and adhesive properties.

[0221] 13 and 14 are schematic plan views showing the state of the pixel PXL in FIG. 6 after repair, and FIG. 15 is a schematic cross-sectional view taken along line III-III' in FIG.

[0222] Referring to Figures 5, 6, and 13 to 15, the pixel PXL may include an emission unit (see "EMU" in Figure 5) configured by connecting a first series end (see "SET1" in Figure 5) and a second series end (see "SET2" in Figure 5) in series.

[0223] The first series end SET1 may include a first light-emitting element LD1 connected in parallel between the first pixel electrode PE1 and the second pixel electrode (see "PE2" in FIG. 6), and the second series end SET2 may include a second light-emitting element LD2 connected in parallel between the third pixel electrode PE3 and the fourth pixel electrode PE4. In a plan view, the first series end SET1 may be located on a first side (e.g., left side) of the light-emitting area EMA, and the second series end SET2 may be located on a second side (e.g., right side) of the light-emitting area EMA.

[0224] The pixel PXL may include a third light-emitting element LD3 connected between the 1-2 pixel electrode PE1b (or the first electrode EL1) and the 2-2 pixel electrode PE2b (or the second electrode EL2). The third light-emitting element LD3 may be a defective light-emitting element. If the third light-emitting element LD3 is present in the pixel PXL, the light-emitting element LD connected in parallel with the third light-emitting element LD3, for example, the first light-emitting element LD1, may not be driven normally. In this case, one area of ​​the light-emitting area EMA in which the first light-emitting element LD1 is arranged (for example, the first side of the light-emitting area EMA where the first series end SET1 is located) may not be lit. As a result, only the other area of ​​the light-emitting area EMA (for example, the second side of the light-emitting area EMA where the second series end SET2 is located) of the pixel PXL is lit, resulting in a light-emitting efficiency of 50%. If the pixel PXL has a light-emitting efficiency of 50%, the pixel PXL may be determined to have a black spot defect, and even the light-emitting element LD that operates normally may be wasted unnecessarily. Therefore, in this embodiment, a repair process for reducing the possibility of a black spot defect in the pixel PXL is performed, and it is possible to prevent the light emitting element LD that operates normally from being unnecessarily wasted.

[0225] The above-mentioned repair process may be performed by confirming the position of the defective light-emitting element and using a process such as laser cutting, but is not limited thereto. The repair process may repair the pixel PXL with a black dot defect by, for example, removing a part of the second pixel electrode PE2, which is an electrode electrically connected to the third light-emitting element LD3 (or the defective light-emitting element), using a laser. Specifically, when the position of the third light-emitting element LD3, which is the defective light-emitting element, is identified, the 2-3 pixel electrode (see "PE2c" in FIG. 6) is removed from the second pixel electrode PE2 using a laser to float the 2-2 pixel electrode PE2b electrically connected to the third light-emitting element LD3. The above-mentioned repair process may electrically separate the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b of the second pixel electrode PE2. That is, the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b, which are located in the same column in the second direction DR2 and constitute the second electrode PE2, may be disconnected in the third area A3 of the light-emitting area EMA. As a result, the 1a light-emitting element LD1a electrically connected to the 2-1 pixel electrode PE2a is electrically isolated from the third light-emitting element LD3 (or the defective light-emitting element) electrically connected to the 2-2 pixel electrode PE2b, allowing the 1a light-emitting element LD1a to operate normally.

[0226] As described above, when the 1a light-emitting element LD1a is normally driven, it can light up to a region of the light-emitting area EMA where the 1a light-emitting element LD1a is located (for example, the upper end of the first side of the light-emitting area EMA). The remaining light-emitting elements LD except for the third light-emitting element LD3 electrically connected to the floating 2-2 pixel electrode PE2b and the 1b light-emitting element LD1b can be lit, thereby improving the light-emitting efficiency of the pixel PXL determined to have a black spot defect. For example, when both the 1a light-emitting element LD1a and the second light-emitting element LD2 are lit, the pixel PXL determined to have a black spot defect can have a light-emitting efficiency of 75%. As a result, the pixel PXL can be repaired and the reliability of the display device (see "DD" in FIG. 3) can be improved.

[0227] According to the above-described embodiment, it is possible to reduce the possibility of a black spot defect in the pixel PXL and prevent a normally operating light emitting element LD from being unnecessarily wasted.

[0228] In the above-mentioned repair process, the 2-3 pixel electrode PE2c of the second pixel electrode PE2 may be completely removed using a laser, but is not limited thereto. According to an embodiment, as shown in FIG. 14, a floating dummy pattern DMP may be formed in the third area A3 of the light emitting area EMA, cutting between the 2-1 pixel electrode PE2a and the 2-3 pixel electrode PE2c and between the 2-2 pixel electrode PE2b and the 2-3 pixel electrode PE2c. The dummy pattern DMP may be a part of the 2-3 pixel electrode PE2c remaining in the third area A3. The dummy pattern DMP may be electrically isolated from each of the 2-1 pixel electrode PE2a and the 2-2 pixel electrode PE2b.

[0229] FIG. 16 is a schematic plan view showing the state of the pixel PXL in FIG. 6 after it has been repaired, and FIG. 17 is a schematic cross-sectional view taken along line IV-IV' in FIG.

[0230] Regarding the embodiment of Figs. 16 and 17, the following description will focus on the differences from the above-mentioned embodiment to avoid duplication.

[0231] 5, 6, 16, and 17, the pixel PXL may include a fourth light emitting element LD4 connected between the 3-1 pixel electrode PE3a (or the first electrode EL1) and the 4-1 pixel electrode PE4a (or the second electrode EL2). The fourth light emitting element LD4 may be a defective light emitting element. If the fourth light emitting element LD4 exists in the pixel PXL, the light emitting element LD connected in parallel with the fourth light emitting element LD4, for example, the second light emitting element LD2, may not be driven normally. In this case, one area of ​​the light emitting area EMA in which the second light emitting element LD2 is arranged (for example, the second side of the light emitting area EMA where the second series end SET2 is located) may not be lit. As a result, the pixel PXL has a light emitting efficiency of 50% because only the other area of ​​the light emitting area EMA (for example, the first side of the light emitting area EMA where the first light emitting element LD1 of the first series end SET1 is located) is lit. If the pixel PXL has a light emitting efficiency of 50%, the pixel PXL may be determined to have a black spot defect, and even the light emitting element LD that operates normally may be wasted. Therefore, in this embodiment, a repair process for reducing the possibility of a black spot defect in the pixel PXL is performed, and it is possible to prevent the light emitting element LD that operates normally from being unnecessarily wasted.

[0232] The pixel PXL having a black dot defect can be repaired by removing a part of the fourth pixel electrode (see "PE4" in FIG. 6) that is an electrode electrically connected to the fourth light-emitting element LD4 (or a defective light-emitting element) using a laser. Specifically, when the position of the fourth light-emitting element LD4 that is a defective light-emitting element is identified, the 4-3 pixel electrode (see "PE4c" in FIG. 6) is removed from the fourth pixel electrode PE4 using a laser to float the 4-1 pixel electrode PE4a that is electrically connected to the fourth light-emitting element LD4. The above-mentioned repair process can electrically separate the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b of the fourth pixel electrode PE4. That is, the 4-1 pixel electrode PE4a and the 4-2 pixel electrode PE4b that are located in the same column in the second direction DR2 and that constitute the fourth pixel electrode PE4 can be disconnected in the third area A3 of the light-emitting area EMA. As a result, the 2b light-emitting element LD2b electrically connected to the 4-2 pixel electrode PE4b is electrically isolated from the fourth light-emitting element LD4 (or the defective light-emitting element) electrically connected to the 4-1 pixel electrode PE4a, allowing the 2b light-emitting element LD2b to operate normally.

[0233] As described above, when the 2b light-emitting element LD2b is normally driven, it is possible to light up to a region of the light-emitting area EMA where the 2b light-emitting element LD2b is located (for example, the lower end of the second side of the light-emitting area EMA). The remaining light-emitting elements LD, excluding the fourth light-emitting element LD4 and the 2a light-emitting element LD2a electrically connected to the floating 4-1 pixel electrode PE4a, are lit, so that the light-emitting efficiency of the pixel PXL determined to have a black spot defect can be improved. For example, when both the first light-emitting element LD1 and the 2b light-emitting element LD2b are lit, the pixel PXL determined to have a black spot defect can have a light-emitting efficiency of 75%. As a result, the pixel PXL is repaired and the reliability of the display device (see "DD" in FIG. 3) can be improved.

[0234] According to the above-described embodiment, it is possible to reduce the possibility of a black spot defect in the pixel PXL and prevent a normally operating light emitting element LD from being unnecessarily wasted.

[0235] FIG. 18 is a schematic plan view showing the state of the pixel PXL in FIG. 6 after it has been repaired, and FIG. 19 is a schematic cross-sectional view taken along line VV' in FIG.

[0236] Regarding the embodiment of Figs. 18 and 19, the following description will focus on the differences from the above-mentioned embodiment to avoid duplication.

[0237] 5, 6, 18, and 19, the pixel PXL may include a fifth light emitting element LD5 connected between the 3-2 pixel electrode PE3b (or the first electrode) and the 4-2 pixel electrode PE4b (or the second electrode). The fifth light emitting element LD5 may be a defective light emitting element. If the fifth light emitting element LD5 exists in the pixel PXL, the light emitting element LD connected in parallel with the fifth light emitting element LD5, for example, the second light emitting element LD2, may not be driven normally. In this case, one area of ​​the light emitting area EMA in which the second light emitting element LD2 is arranged (for example, the second side of the light emitting area EMA where the second series end SET2 is located) may not be lit. As a result, the pixel PXL has a light emitting efficiency of 50% because only the other area of ​​the light emitting area EMA (for example, the first side of the light emitting area EMA where the first light emitting element LD1 of the first series end SET1 is located) is lit. If the pixel PXL has a light emitting efficiency of 50%, the pixel PXL may be determined to have a black spot defect, and even the light emitting element LD that operates normally may be wasted. Therefore, in this embodiment, a repair process for reducing the possibility of a black spot defect in the pixel PXL is performed, and it is possible to prevent the light emitting element LD that operates normally from being unnecessarily wasted.

[0238] The pixel PXL can be repaired by removing a part of the second sub-electrode SLT2, an electrode electrically connected to the fifth light-emitting element LD5 (or a defective light-emitting element), using a laser. Specifically, when the position of the fifth light-emitting element LD5, which is a defective light-emitting element, is identified, the second sub-electrode (see "SLT2" in FIG. 6) is removed from the second sub-electrode (see "SLT2c" in FIG. 6) using a laser to float the 3-2 pixel electrode PE3b electrically connected to the fifth light-emitting element LD5. Through the above-mentioned repair process, the 2-1 sub-electrode SLT2a and the 2-2 sub-electrode SLT2b, which are located in the same column in the second direction DR2 and constitute the second sub-electrode SLT2, can be disconnected in the non-light-emitting area NEA corresponding to the third area A3 of the light-emitting area EMA. As a result, the 3-1 pixel electrode PE3a connected to the 2-1 sub-electrode SLT2a and the 3-2 pixel electrode PE3b connected to the 2-2 sub-electrode SLT2b can be electrically separated. As a result, the 2a light-emitting element LD2a electrically connected to the 3-1 pixel electrode PE3a is electrically isolated from the fifth light-emitting element LD5 (or a defective light-emitting element) electrically connected to the 3-2 pixel electrode PE3b, and the 2a light-emitting element LD2a can be driven normally.

[0239] As described above, when the 2a light-emitting element LD2a is normally driven, it can light up to a region of the light-emitting area EMA where the 2a light-emitting element LD2a is located (for example, the upper end of the second side of the light-emitting area EMA). The remaining light-emitting elements LD except for the fifth light-emitting element LD5 and the 2b light-emitting element LD2b electrically connected to the floating 3-2 pixel electrode PE3b are lighted, so that the light-emitting efficiency of the pixel PXL determined to have a black spot defect can be improved. For example, when both the first light-emitting element LD1 and the 2a light-emitting element LD2a are lighted, the pixel PXL determined to have a black spot defect can have a light-emitting efficiency of 75%. As a result, the pixel PXL is repaired and the reliability of the display device (see "DD" in FIG. 3) can be improved.

[0240] According to the above embodiment, it is possible to reduce the possibility of a black spot defect in the pixel PXL and prevent a normally operating light emitting element LD from being unnecessarily wasted.

[0241] FIG. 20 is a schematic plan view showing the state of the pixel PXL in FIG. 6 after repair, and FIG. 21 is a schematic cross-sectional view taken along the line VI-VI' in FIG.

[0242] Regarding the embodiment of Figs. 20 and 21, the following description will focus on the differences from the above-mentioned embodiment to avoid duplication.

[0243] 5, 6, 20, and 21, the pixel PXL may include a sixth light-emitting element LD6 connected between the 1-1 pixel electrode PE1a (or the first electrode) and the 2-1 pixel electrode PE2a (or the second electrode). The sixth light-emitting element LD6 may be a defective light-emitting element. If the sixth light-emitting element LD6 is present in the pixel PXL, the light-emitting element LD connected in parallel with the sixth light-emitting element LD6, for example, the first light-emitting element LD1, may not be driven normally. In this case, one area of ​​the light-emitting area EMA in which the first light-emitting element LD1 is arranged (for example, the first side of the light-emitting area EMA where the first series end SET1 is located) may not be lit. As a result, only the other area of ​​the light-emitting area EMA (for example, the second side of the light-emitting area EMA where the second light-emitting element LD2 of the second series end SET2 is located) of the pixel PXL is lit, resulting in a light-emitting efficiency of 50%. If the pixel PXL has a light-emitting efficiency of 50%, the pixel PXL may be determined to have a black spot defect, and even the light-emitting element LD that operates normally may be wasted. Therefore, in this embodiment, a repair process for reducing the possibility of a black spot defect in the pixel PXL is performed, and it is possible to prevent the light emitting element LD that operates normally from being unnecessarily wasted.

[0244] The pixel PXL can be repaired by removing a part of one electrode, the first sub-electrode (see "SLT1" in FIG. 6), electrically connected to the sixth light-emitting element LD6 (or the defective light-emitting element). Specifically, when the position of the sixth light-emitting element LD6, which is the defective light-emitting element, is identified, the first sub-electrode SLT1 to the 1-3 sub-electrode (see "SLT1c" in FIG. 6) are removed using a laser to float the 1-1 pixel electrode PE1a electrically connected to the sixth light-emitting element LD6. Through the above-mentioned repair process, the 1-1 sub-electrode SLT1a and the 1-2 sub-electrode SLT1b, which are located in the same column in the second direction DR2 and constitute the first sub-electrode SLT1, can be disconnected in the non-light-emitting area NEA corresponding to the third area A3 of the light-emitting area EMA. As a result, the 1-1 pixel electrode PE1a connected to the 1-1 sub-electrode SLT1a and the 1-2 pixel electrode PE1b connected to the 1-2 sub-electrode SLT1b can be electrically separated. As a result, the 1b light-emitting element LD1b electrically connected to the 1-2 pixel electrode PE1b is electrically isolated from the 6th light-emitting element LD6 (or the defective light-emitting element) electrically connected to the 1-1 pixel electrode PE1a, and the 1b light-emitting element LD1b can be driven normally.

[0245] As described above, when the 1b light-emitting element LD1b is normally driven, it is possible to light up to a region of the light-emitting area EMA where the 1b light-emitting element LD1b is located (for example, the lower end of the first side of the light-emitting area EMA). The remaining light-emitting elements LD, excluding the 6th light-emitting element LD6 and the 1a light-emitting element LD1a electrically connected to the floating 1-1 pixel electrode PE1a, are lit, so that the light-emitting efficiency of the pixel PXL determined to have a black spot defect can be improved. For example, when both the 1b light-emitting element LD1b and the second light-emitting element LD2 are lit, the pixel PXL determined to have a black spot defect can have a light-emitting efficiency of 75%. As a result, the pixel PXL is repaired, and the reliability of the display device (see "DD" in FIG. 3) can be improved.

[0246] According to the above-described embodiment, it is possible to reduce the possibility of a black spot defect in the pixel PXL and prevent a normally operating light emitting element LD from being unnecessarily wasted.

[0247] Although the present invention has been described above with reference to preferred embodiments thereof, it will be understood that a person skilled in the art or having ordinary knowledge in the art may make various modifications and variations to the present invention without departing from the technical scope of the present invention as set forth in the appended claims.

[0248] Therefore, the technical scope of the present invention should not be limited to the contents described in the detailed description of the specification, but should be defined by the claims. [Explanation of symbols]

[0249] DD display device SUB board PXL Pixel PCL Pixel circuit layer DPL display element layer EMA Emission Area A1, A2, A3 1st, 2nd, 3rd area LD light emitting element LD1, LD2 First and second light emitting elements ALE1, ALE2, ALE3 First, second, and third alignment electrodes PE1, PE2, PE3, PE4: 1st, 2nd, 3rd, 4th pixel electrodes EL1, EL2 First and second electrodes SLT1, SLT2 First and second sub-electrodes PE1a, PE1b 1-1st and 1-2nd pixel electrodes PE2a, PE2b, PE2c 2-1st, 2-2nd, 2-3rd pixel electrodes PE3a, PE3b 3-1st and 3-2nd pixel electrodes PE4a, PE4b, PE4c 4-1, 4-2, 4-3 pixel electrodes

Claims

1. a substrate having defined emissive and non-emissive regions; First, second and third alignment electrodes sequentially arranged in a first direction; a first light emitting element disposed between the first alignment electrode and the second alignment electrode, and a second light emitting element disposed between the second alignment electrode and the third alignment electrode; a first electrode electrically connected to a first end of each of the first and second light emitting elements; a second electrode electrically connected to each of the second ends of the first and second light emitting elements; The light emitting region includes a first region, a third region, and a second region that are partitioned in a second direction intersecting the first direction, In a plan view, the first region is an upper region of the light emitting region, the second region is a lower region of the light emitting region, and the third region is a central region of the light emitting region, The first electrode is located in the first region and the second region, and is disconnected in the third region.

2. the second electrode is located in the first region, the second region, and the third region; The display device according to claim 1 , wherein the first electrode is not located in the third region.

3. The first electrode includes a first pixel electrode and a third pixel electrode spaced apart from each other, the second electrode includes a second pixel electrode and a fourth pixel electrode spaced apart from each other; The display device according to claim 2 , wherein the first pixel electrode, the second pixel electrode, the fourth pixel electrode, and the third pixel electrode are arranged in this order along the first direction at least in the light-emitting region.

4. the first pixel electrode includes a 1-1 pixel electrode located in the first region and a 1-2 pixel electrode located in the second region; the second pixel electrode includes a 2-1 pixel electrode located in the first region, a 2-2 pixel electrode located in the second region, and a 2-3 pixel electrode located in the third region; the third pixel electrode includes a 3-1 pixel electrode located in the first region and a 3-2 pixel electrode located in the second region; 4. The display device of claim 3, wherein the fourth pixel electrodes include a 4-1 pixel electrode located in the first region, a 4-2 pixel electrode located in the second region, and a 4-3 pixel electrode located in the third region.

5. The 1-1 pixel electrode and the 1-2 pixel electrode are disposed apart from each other, The display device of claim 4 , wherein the 3-1 pixel electrode and the 3-2 pixel electrode are disposed apart from each other.

6. the 2-3 pixel electrode has a width narrower in the first direction than the 2-1 pixel electrode and the 2-2 pixel electrode; 5. The display device of claim 4, wherein the 4-3 pixel electrode has a narrower width in the first direction than the 4-1 pixel electrode and the 4-2 pixel electrode.

7. 5. The display device of claim 4, further comprising a contact electrode located in the non-light-emitting region and connecting the 2-1st pixel electrode and the 3-1st pixel electrode.

8. a first sub-electrode located in the non-light-emitting region and electrically connected to the first pixel electrode; a second sub-electrode located in the non-light-emitting region and electrically connected to the third pixel electrode, the first sub-electrode includes a 1-1 sub-electrode electrically connected to the 1-1 pixel electrode, a 1-2 sub-electrode electrically connected to the 1-2 pixel electrode, and a 1-3 sub-electrode connecting the 1-1 sub-electrode and the 1-2 sub-electrode; 5. The display device of claim 4, wherein the second sub-electrode includes a 2-1 sub-electrode electrically connected to the 3-1 pixel electrode, a 2-2 sub-electrode electrically connected to the 3-2 pixel electrode, and a 2-3 sub-electrode connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

9. the 1-3 sub-electrode has a width narrower in the first direction than the 1-1 sub-electrode and the 1-2 sub-electrode; 9. The display device of claim 8, wherein the 2-3 sub-electrode has a width narrower in the first direction than the 2-1 sub-electrode and the 2-2 sub-electrode.

10. The first light emitting element is a first-a light emitting element located in the first region and electrically connected to the first-1 and second-1 pixel electrodes; a 1b light emitting element located in the second region and electrically connected to the 1-2 and 2-2 pixel electrodes; The second light emitting element is a second light emitting element located in the first region and electrically connected to the third-1 and fourth-1 pixel electrodes; 5. The display device of claim 4, further comprising: a 2b light-emitting element located in the second region and electrically connected to the 3-2 and 4-2 pixel electrodes.

11. Each of the 1a, 1b, 2a, and 2b light emitting elements is a second semiconductor layer located at the first end; a first semiconductor layer located at the second end; an active layer located between the first semiconductor layer and the second semiconductor layer; The display device according to claim 10 , wherein the first semiconductor layer is an n-type semiconductor layer, and the second semiconductor layer is a p-type semiconductor layer.

12. a color conversion layer disposed on the first and second light emitting elements; The display device according to claim 1 , further comprising a color filter layer disposed on the color conversion layer.

13. a substrate having a light emitting region and a non-light emitting region defined therein, the light emitting region including a first region, a third region, and a second region partitioned along a second direction; first, second and third alignment electrodes sequentially arranged in a first direction intersecting the second direction; a light emitting element disposed between the first to third alignment electrodes; a first pixel electrode, a second pixel electrode, a fourth pixel electrode, and a third pixel electrode sequentially arranged along the first direction in at least the light emitting region; a first sub-electrode located in the non-light-emitting region and electrically connected to the first pixel electrode; a second sub-electrode located in the non-light-emitting region and electrically connected to the third pixel electrode; each of the first, second, third and fourth pixel electrodes includes a first portion located in the first region and a second portion located in the second region; the first sub-electrode includes a 1-1 sub-electrode electrically connected to the first portion of the first pixel electrode and a 1-2 sub-electrode electrically connected to the second portion of the first pixel electrode; the second sub-electrode includes a 2-1 sub-electrode electrically connected to the first portion of the third pixel electrode, and a 2-2 sub-electrode electrically connected to the second portion of the third pixel electrode; The first and third pixel electrodes are each disconnected in the third region.

14. the second pixel electrode is disconnected in the third region; the fourth pixel electrode is located in the third region and includes a third portion connecting the first portion and the second portion; the first sub-electrode includes a 1-3 sub-electrode connecting the 1-1 sub-electrode and the 1-2 sub-electrode; 14. The display device of claim 13, wherein the second sub-electrodes include a 2-3 sub-electrode connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

15. 15. The display device of claim 14, further comprising a dummy pattern located between the first portion of the second pixel electrode and the second portion of the second pixel electrode in the third region and spaced apart from the first and second portions.

16. the fourth pixel electrode is disconnected in the third region; the second pixel electrode is located in the third region and includes a third portion connecting the first portion and the second portion; the first sub-electrode includes a 1-3 sub-electrode connecting the 1-1 sub-electrode and the 1-2 sub-electrode; 14. The display device of claim 13, wherein the second sub-electrodes include a 2-3 sub-electrode connecting the 2-1 sub-electrode and the 2-2 sub-electrode.

17. each of the second and fourth pixel electrodes is located in the third region and includes a third portion connecting the first portion and the second portion; the first sub-electrode includes a 1-3 sub-electrode connecting the 1-1 sub-electrode and the 1-2 sub-electrode; 14. The display device of claim 13, wherein the 2-1 sub-electrode and the 2-2 sub-electrode are disposed separately and electrically isolated from each other.

18. each of the second and fourth pixel electrodes is located in the third region and includes a third portion connecting the first portion and the second portion; the second sub-electrode includes a 2-3 sub-electrode connecting the 2-1 sub-electrode and the 2-2 sub-electrode; 14. The display device of claim 13, wherein the first-1 sub-electrode and the first-2 sub-electrode are disposed apart from each other and are electrically isolated from each other.

19. A method for repairing a display device, comprising: The display device includes: a substrate having a light emitting region and a non-light emitting region defined therein, the light emitting region including a first region, a third region, and a second region partitioned in a second direction; first, second and third alignment electrodes sequentially arranged in a first direction intersecting the second direction; A plurality of light emitting elements disposed between the first to third alignment electrodes; a first electrode electrically connected to a first end of each of the light emitting elements and disconnected at the third region; a second electrode electrically connected to each second end of the light emitting element and located in the first to third regions; The repair method includes: A method for repairing a display device, comprising: separating one of the first and second electrodes electrically connected to a normal light emitting element among the light emitting elements from one of the first and second electrodes electrically connected to a defective light emitting element.

20. 20. The method of claim 19, wherein one of the first and second electrodes electrically connected to the normal light emitting element is located in the same column in the second direction as one of the first and second electrodes electrically connected to the defective light emitting element.

Images